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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[deliverable/linux.git] / drivers / net / cxgb4 / cxgb4.h
CommitLineData
625ba2c2
DM		 1/*
2 * This file is part of the Chelsio T4 Ethernet driver for Linux.
3 *
4 * Copyright (c) 2003-2010 Chelsio Communications, Inc. All rights reserved.
5 *
6 * This software is available to you under a choice of one of two
7 * licenses. You may choose to be licensed under the terms of the GNU
8 * General Public License (GPL) Version 2, available from the file
9 * COPYING in the main directory of this source tree, or the
10 * OpenIB.org BSD license below:
11 *
12 * Redistribution and use in source and binary forms, with or
13 * without modification, are permitted provided that the following
14 * conditions are met:
15 *
16 * - Redistributions of source code must retain the above
17 * copyright notice, this list of conditions and the following
18 * disclaimer.
19 *
20 * - Redistributions in binary form must reproduce the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer in the documentation and/or other materials
23 * provided with the distribution.
24 *
25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
32 * SOFTWARE.
33 */
34
35#ifndef __CXGB4_H__
36#define __CXGB4_H__
37
38#include <linux/bitops.h>
39#include <linux/cache.h>
40#include <linux/interrupt.h>
41#include <linux/list.h>
42#include <linux/netdevice.h>
43#include <linux/pci.h>
44#include <linux/spinlock.h>
45#include <linux/timer.h>
46#include <asm/io.h>
47#include "cxgb4_uld.h"
48#include "t4_hw.h"
49
50#define FW_VERSION_MAJOR 1
51#define FW_VERSION_MINOR 1
52#define FW_VERSION_MICRO 0
53
54enum {
55 MAX_NPORTS = 4, /* max # of ports */
47d54d65 56 SERNUM_LEN = 24, /* Serial # length */
625ba2c2
DM		 57 EC_LEN = 16, /* E/C length */
58 ID_LEN = 16, /* ID length */
59};
60
61enum {
62 MEM_EDC0,
63 MEM_EDC1,
64 MEM_MC
65};
66
67enum dev_master {
68 MASTER_CANT,
69 MASTER_MAY,
70 MASTER_MUST
71};
72
73enum dev_state {
74 DEV_STATE_UNINIT,
75 DEV_STATE_INIT,
76 DEV_STATE_ERR
77};
78
79enum {
80 PAUSE_RX = 1 << 0,
81 PAUSE_TX = 1 << 1,
82 PAUSE_AUTONEG = 1 << 2
83};
84
85struct port_stats {
86 u64 tx_octets; /* total # of octets in good frames */
87 u64 tx_frames; /* all good frames */
88 u64 tx_bcast_frames; /* all broadcast frames */
89 u64 tx_mcast_frames; /* all multicast frames */
90 u64 tx_ucast_frames; /* all unicast frames */
91 u64 tx_error_frames; /* all error frames */
92
93 u64 tx_frames_64; /* # of Tx frames in a particular range */
94 u64 tx_frames_65_127;
95 u64 tx_frames_128_255;
96 u64 tx_frames_256_511;
97 u64 tx_frames_512_1023;
98 u64 tx_frames_1024_1518;
99 u64 tx_frames_1519_max;
100
101 u64 tx_drop; /* # of dropped Tx frames */
102 u64 tx_pause; /* # of transmitted pause frames */
103 u64 tx_ppp0; /* # of transmitted PPP prio 0 frames */
104 u64 tx_ppp1; /* # of transmitted PPP prio 1 frames */
105 u64 tx_ppp2; /* # of transmitted PPP prio 2 frames */
106 u64 tx_ppp3; /* # of transmitted PPP prio 3 frames */
107 u64 tx_ppp4; /* # of transmitted PPP prio 4 frames */
108 u64 tx_ppp5; /* # of transmitted PPP prio 5 frames */
109 u64 tx_ppp6; /* # of transmitted PPP prio 6 frames */
110 u64 tx_ppp7; /* # of transmitted PPP prio 7 frames */
111
112 u64 rx_octets; /* total # of octets in good frames */
113 u64 rx_frames; /* all good frames */
114 u64 rx_bcast_frames; /* all broadcast frames */
115 u64 rx_mcast_frames; /* all multicast frames */
116 u64 rx_ucast_frames; /* all unicast frames */
117 u64 rx_too_long; /* # of frames exceeding MTU */
118 u64 rx_jabber; /* # of jabber frames */
119 u64 rx_fcs_err; /* # of received frames with bad FCS */
120 u64 rx_len_err; /* # of received frames with length error */
121 u64 rx_symbol_err; /* symbol errors */
122 u64 rx_runt; /* # of short frames */
123
124 u64 rx_frames_64; /* # of Rx frames in a particular range */
125 u64 rx_frames_65_127;
126 u64 rx_frames_128_255;
127 u64 rx_frames_256_511;
128 u64 rx_frames_512_1023;
129 u64 rx_frames_1024_1518;
130 u64 rx_frames_1519_max;
131
132 u64 rx_pause; /* # of received pause frames */
133 u64 rx_ppp0; /* # of received PPP prio 0 frames */
134 u64 rx_ppp1; /* # of received PPP prio 1 frames */
135 u64 rx_ppp2; /* # of received PPP prio 2 frames */
136 u64 rx_ppp3; /* # of received PPP prio 3 frames */
137 u64 rx_ppp4; /* # of received PPP prio 4 frames */
138 u64 rx_ppp5; /* # of received PPP prio 5 frames */
139 u64 rx_ppp6; /* # of received PPP prio 6 frames */
140 u64 rx_ppp7; /* # of received PPP prio 7 frames */
141
142 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */
143 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */
144 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */
145 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */
146 u64 rx_trunc0; /* buffer-group 0 truncated packets */
147 u64 rx_trunc1; /* buffer-group 1 truncated packets */
148 u64 rx_trunc2; /* buffer-group 2 truncated packets */
149 u64 rx_trunc3; /* buffer-group 3 truncated packets */
150};
151
152struct lb_port_stats {
153 u64 octets;
154 u64 frames;
155 u64 bcast_frames;
156 u64 mcast_frames;
157 u64 ucast_frames;
158 u64 error_frames;
159
160 u64 frames_64;
161 u64 frames_65_127;
162 u64 frames_128_255;
163 u64 frames_256_511;
164 u64 frames_512_1023;
165 u64 frames_1024_1518;
166 u64 frames_1519_max;
167
168 u64 drop;
169
170 u64 ovflow0;
171 u64 ovflow1;
172 u64 ovflow2;
173 u64 ovflow3;
174 u64 trunc0;
175 u64 trunc1;
176 u64 trunc2;
177 u64 trunc3;
178};
179
180struct tp_tcp_stats {
181 u32 tcpOutRsts;
182 u64 tcpInSegs;
183 u64 tcpOutSegs;
184 u64 tcpRetransSegs;
185};
186
187struct tp_err_stats {
188 u32 macInErrs[4];
189 u32 hdrInErrs[4];
190 u32 tcpInErrs[4];
191 u32 tnlCongDrops[4];
192 u32 ofldChanDrops[4];
193 u32 tnlTxDrops[4];
194 u32 ofldVlanDrops[4];
195 u32 tcp6InErrs[4];
196 u32 ofldNoNeigh;
197 u32 ofldCongDefer;
198};
199
200struct tp_params {
201 unsigned int ntxchan; /* # of Tx channels */
202 unsigned int tre; /* log2 of core clocks per TP tick */
203};
204
205struct vpd_params {
206 unsigned int cclk;
207 u8 ec[EC_LEN + 1];
208 u8 sn[SERNUM_LEN + 1];
209 u8 id[ID_LEN + 1];
210};
211
212struct pci_params {
213 unsigned char speed;
214 unsigned char width;
215};
216
217struct adapter_params {
218 struct tp_params tp;
219 struct vpd_params vpd;
220 struct pci_params pci;
221
222 unsigned int fw_vers;
223 unsigned int tp_vers;
224 u8 api_vers[7];
225
226 unsigned short mtus[NMTUS];
227 unsigned short a_wnd[NCCTRL_WIN];
228 unsigned short b_wnd[NCCTRL_WIN];
229
230 unsigned char nports; /* # of ethernet ports */
231 unsigned char portvec;
232 unsigned char rev; /* chip revision */
233 unsigned char offload;
234
235 unsigned int ofldq_wr_cred;
236};
237
238struct trace_params {
239 u32 data[TRACE_LEN / 4];
240 u32 mask[TRACE_LEN / 4];
241 unsigned short snap_len;
242 unsigned short min_len;
243 unsigned char skip_ofst;
244 unsigned char skip_len;
245 unsigned char invert;
246 unsigned char port;
247};
248
249struct link_config {
250 unsigned short supported; /* link capabilities */
251 unsigned short advertising; /* advertised capabilities */
252 unsigned short requested_speed; /* speed user has requested */
253 unsigned short speed; /* actual link speed */
254 unsigned char requested_fc; /* flow control user has requested */
255 unsigned char fc; /* actual link flow control */
256 unsigned char autoneg; /* autonegotiating? */
257 unsigned char link_ok; /* link up? */
258};
259
260#define FW_LEN16(fw_struct) FW_CMD_LEN16(sizeof(fw_struct) / 16)
261
262enum {
263 MAX_ETH_QSETS = 32, /* # of Ethernet Tx/Rx queue sets */
264 MAX_OFLD_QSETS = 16, /* # of offload Tx/Rx queue sets */
265 MAX_CTRL_QUEUES = NCHAN, /* # of control Tx queues */
266 MAX_RDMA_QUEUES = NCHAN, /* # of streaming RDMA Rx queues */
267};
268
269enum {
270 MAX_EGRQ = 128, /* max # of egress queues, including FLs */
271 MAX_INGQ = 64 /* max # of interrupt-capable ingress queues */
272};
273
274struct adapter;
275struct vlan_group;
276struct sge_rspq;
277
278struct port_info {
279 struct adapter *adapter;
280 struct vlan_group *vlan_grp;
281 u16 viid;
282 s16 xact_addr_filt; /* index of exact MAC address filter */
283 u16 rss_size; /* size of VI's RSS table slice */
284 s8 mdio_addr;
285 u8 port_type;
286 u8 mod_type;
287 u8 port_id;
288 u8 tx_chan;
289 u8 lport; /* associated offload logical port */
290 u8 rx_offload; /* CSO, etc */
291 u8 nqsets; /* # of qsets */
292 u8 first_qset; /* index of first qset */
293 struct link_config link_cfg;
294};
295
296/* port_info.rx_offload flags */
297enum {
298 RX_CSO = 1 << 0,
299};
300
301struct dentry;
302struct work_struct;
303
304enum { /* adapter flags */
305 FULL_INIT_DONE = (1 << 0),
306 USING_MSI = (1 << 1),
307 USING_MSIX = (1 << 2),
308 QUEUES_BOUND = (1 << 3),
309 FW_OK = (1 << 4),
310};
311
312struct rx_sw_desc;
313
314struct sge_fl { /* SGE free-buffer queue state */
315 unsigned int avail; /* # of available Rx buffers */
316 unsigned int pend_cred; /* new buffers since last FL DB ring */
317 unsigned int cidx; /* consumer index */
318 unsigned int pidx; /* producer index */
319 unsigned long alloc_failed; /* # of times buffer allocation failed */
320 unsigned long large_alloc_failed;
321 unsigned long starving;
322 /* RO fields */
323 unsigned int cntxt_id; /* SGE context id for the free list */
324 unsigned int size; /* capacity of free list */
325 struct rx_sw_desc *sdesc; /* address of SW Rx descriptor ring */
326 __be64 *desc; /* address of HW Rx descriptor ring */
327 dma_addr_t addr; /* bus address of HW ring start */
328};
329
330/* A packet gather list */
331struct pkt_gl {
332 skb_frag_t frags[MAX_SKB_FRAGS];
333 void *va; /* virtual address of first byte */
334 unsigned int nfrags; /* # of fragments */
335 unsigned int tot_len; /* total length of fragments */
336};
337
338typedef int (*rspq_handler_t)(struct sge_rspq *q, const __be64 *rsp,
339 const struct pkt_gl *gl);
340
341struct sge_rspq { /* state for an SGE response queue */
342 struct napi_struct napi;
343 const __be64 *cur_desc; /* current descriptor in queue */
344 unsigned int cidx; /* consumer index */
345 u8 gen; /* current generation bit */
346 u8 intr_params; /* interrupt holdoff parameters */
347 u8 next_intr_params; /* holdoff params for next interrupt */
348 u8 pktcnt_idx; /* interrupt packet threshold */
349 u8 uld; /* ULD handling this queue */
350 u8 idx; /* queue index within its group */
351 int offset; /* offset into current Rx buffer */
352 u16 cntxt_id; /* SGE context id for the response q */
353 u16 abs_id; /* absolute SGE id for the response q */
354 __be64 *desc; /* address of HW response ring */
355 dma_addr_t phys_addr; /* physical address of the ring */
356 unsigned int iqe_len; /* entry size */
357 unsigned int size; /* capacity of response queue */
358 struct adapter *adap;
359 struct net_device *netdev; /* associated net device */
360 rspq_handler_t handler;
361};
362
363struct sge_eth_stats { /* Ethernet queue statistics */
364 unsigned long pkts; /* # of ethernet packets */
365 unsigned long lro_pkts; /* # of LRO super packets */
366 unsigned long lro_merged; /* # of wire packets merged by LRO */
367 unsigned long rx_cso; /* # of Rx checksum offloads */
368 unsigned long vlan_ex; /* # of Rx VLAN extractions */
369 unsigned long rx_drops; /* # of packets dropped due to no mem */
370};
371
372struct sge_eth_rxq { /* SW Ethernet Rx queue */
373 struct sge_rspq rspq;
374 struct sge_fl fl;
375 struct sge_eth_stats stats;
376} ____cacheline_aligned_in_smp;
377
378struct sge_ofld_stats { /* offload queue statistics */
379 unsigned long pkts; /* # of packets */
380 unsigned long imm; /* # of immediate-data packets */
381 unsigned long an; /* # of asynchronous notifications */
382 unsigned long nomem; /* # of responses deferred due to no mem */
383};
384
385struct sge_ofld_rxq { /* SW offload Rx queue */
386 struct sge_rspq rspq;
387 struct sge_fl fl;
388 struct sge_ofld_stats stats;
389} ____cacheline_aligned_in_smp;
390
391struct tx_desc {
392 __be64 flit[8];
393};
394
395struct tx_sw_desc;
396
397struct sge_txq {
398 unsigned int in_use; /* # of in-use Tx descriptors */
399 unsigned int size; /* # of descriptors */
400 unsigned int cidx; /* SW consumer index */
401 unsigned int pidx; /* producer index */
402 unsigned long stops; /* # of times q has been stopped */
403 unsigned long restarts; /* # of queue restarts */
404 unsigned int cntxt_id; /* SGE context id for the Tx q */
405 struct tx_desc *desc; /* address of HW Tx descriptor ring */
406 struct tx_sw_desc *sdesc; /* address of SW Tx descriptor ring */
407 struct sge_qstat *stat; /* queue status entry */
408 dma_addr_t phys_addr; /* physical address of the ring */
409};
410
411struct sge_eth_txq { /* state for an SGE Ethernet Tx queue */
412 struct sge_txq q;
413 struct netdev_queue *txq; /* associated netdev TX queue */
414 unsigned long tso; /* # of TSO requests */
415 unsigned long tx_cso; /* # of Tx checksum offloads */
416 unsigned long vlan_ins; /* # of Tx VLAN insertions */
417 unsigned long mapping_err; /* # of I/O MMU packet mapping errors */
418} ____cacheline_aligned_in_smp;
419
420struct sge_ofld_txq { /* state for an SGE offload Tx queue */
421 struct sge_txq q;
422 struct adapter *adap;
423 struct sk_buff_head sendq; /* list of backpressured packets */
424 struct tasklet_struct qresume_tsk; /* restarts the queue */
425 u8 full; /* the Tx ring is full */
426 unsigned long mapping_err; /* # of I/O MMU packet mapping errors */
427} ____cacheline_aligned_in_smp;
428
429struct sge_ctrl_txq { /* state for an SGE control Tx queue */
430 struct sge_txq q;
431 struct adapter *adap;
432 struct sk_buff_head sendq; /* list of backpressured packets */
433 struct tasklet_struct qresume_tsk; /* restarts the queue */
434 u8 full; /* the Tx ring is full */
435} ____cacheline_aligned_in_smp;
436
437struct sge {
438 struct sge_eth_txq ethtxq[MAX_ETH_QSETS];
439 struct sge_ofld_txq ofldtxq[MAX_OFLD_QSETS];
440 struct sge_ctrl_txq ctrlq[MAX_CTRL_QUEUES];
441
442 struct sge_eth_rxq ethrxq[MAX_ETH_QSETS];
443 struct sge_ofld_rxq ofldrxq[MAX_OFLD_QSETS];
444 struct sge_ofld_rxq rdmarxq[MAX_RDMA_QUEUES];
445 struct sge_rspq fw_evtq ____cacheline_aligned_in_smp;
446
447 struct sge_rspq intrq ____cacheline_aligned_in_smp;
448 spinlock_t intrq_lock;
449
450 u16 max_ethqsets; /* # of available Ethernet queue sets */
451 u16 ethqsets; /* # of active Ethernet queue sets */
452 u16 ethtxq_rover; /* Tx queue to clean up next */
453 u16 ofldqsets; /* # of active offload queue sets */
454 u16 rdmaqs; /* # of available RDMA Rx queues */
455 u16 ofld_rxq[MAX_OFLD_QSETS];
456 u16 rdma_rxq[NCHAN];
457 u16 timer_val[SGE_NTIMERS];
458 u8 counter_val[SGE_NCOUNTERS];
459 unsigned int starve_thres;
460 u8 idma_state[2];
461 void *egr_map[MAX_EGRQ]; /* qid->queue egress queue map */
462 struct sge_rspq *ingr_map[MAX_INGQ]; /* qid->queue ingress queue map */
463 DECLARE_BITMAP(starving_fl, MAX_EGRQ);
464 DECLARE_BITMAP(txq_maperr, MAX_EGRQ);
465 struct timer_list rx_timer; /* refills starving FLs */
466 struct timer_list tx_timer; /* checks Tx queues */
467};
468
469#define for_each_ethrxq(sge, i) for (i = 0; i < (sge)->ethqsets; i++)
470#define for_each_ofldrxq(sge, i) for (i = 0; i < (sge)->ofldqsets; i++)
471#define for_each_rdmarxq(sge, i) for (i = 0; i < (sge)->rdmaqs; i++)
472
473struct l2t_data;
474
475struct adapter {
476 void __iomem *regs;
477 struct pci_dev *pdev;
478 struct device *pdev_dev;
479 unsigned long registered_device_map;
625ba2c2
DM		 480 unsigned long flags;
481
482 const char *name;
483 int msg_enable;
484
485 struct adapter_params params;
486 struct cxgb4_virt_res vres;
487 unsigned int swintr;
488
489 unsigned int wol;
490
491 struct {
492 unsigned short vec;
493 char desc[14];
494 } msix_info[MAX_INGQ + 1];
495
496 struct sge sge;
497
498 struct net_device *port[MAX_NPORTS];
499 u8 chan_map[NCHAN]; /* channel -> port map */
500
501 struct l2t_data *l2t;
502 void *uld_handle[CXGB4_ULD_MAX];
503 struct list_head list_node;
504
505 struct tid_info tids;
506 void **tid_release_head;
507 spinlock_t tid_release_lock;
508 struct work_struct tid_release_task;
509 bool tid_release_task_busy;
510
511 struct dentry *debugfs_root;
512
513 spinlock_t stats_lock;
514};
515
516static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr)
517{
518 return readl(adap->regs + reg_addr);
519}
520
521static inline void t4_write_reg(struct adapter *adap, u32 reg_addr, u32 val)
522{
523 writel(val, adap->regs + reg_addr);
524}
525
526#ifndef readq
527static inline u64 readq(const volatile void __iomem *addr)
528{
529 return readl(addr) + ((u64)readl(addr + 4) << 32);
530}
531
532static inline void writeq(u64 val, volatile void __iomem *addr)
533{
534 writel(val, addr);
535 writel(val >> 32, addr + 4);
536}
537#endif
538
539static inline u64 t4_read_reg64(struct adapter *adap, u32 reg_addr)
540{
541 return readq(adap->regs + reg_addr);
542}
543
544static inline void t4_write_reg64(struct adapter *adap, u32 reg_addr, u64 val)
545{
546 writeq(val, adap->regs + reg_addr);
547}
548
549/**
550 * netdev2pinfo - return the port_info structure associated with a net_device
551 * @dev: the netdev
552 *
553 * Return the struct port_info associated with a net_device
554 */
555static inline struct port_info *netdev2pinfo(const struct net_device *dev)
556{
557 return netdev_priv(dev);
558}
559
560/**
561 * adap2pinfo - return the port_info of a port
562 * @adap: the adapter
563 * @idx: the port index
564 *
565 * Return the port_info structure for the port of the given index.
566 */
567static inline struct port_info *adap2pinfo(struct adapter *adap, int idx)
568{
569 return netdev_priv(adap->port[idx]);
570}
571
572/**
573 * netdev2adap - return the adapter structure associated with a net_device
574 * @dev: the netdev
575 *
576 * Return the struct adapter associated with a net_device
577 */
578static inline struct adapter *netdev2adap(const struct net_device *dev)
579{
580 return netdev2pinfo(dev)->adapter;
581}
582
583void t4_os_portmod_changed(const struct adapter *adap, int port_id);
584void t4_os_link_changed(struct adapter *adap, int port_id, int link_stat);
585
586void *t4_alloc_mem(size_t size);
587void t4_free_mem(void *addr);
588
589void t4_free_sge_resources(struct adapter *adap);
590irq_handler_t t4_intr_handler(struct adapter *adap);
591netdev_tx_t t4_eth_xmit(struct sk_buff *skb, struct net_device *dev);
592int t4_ethrx_handler(struct sge_rspq *q, const __be64 *rsp,
593 const struct pkt_gl *gl);
594int t4_mgmt_tx(struct adapter *adap, struct sk_buff *skb);
595int t4_ofld_send(struct adapter *adap, struct sk_buff *skb);
596int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq,
597 struct net_device *dev, int intr_idx,
598 struct sge_fl *fl, rspq_handler_t hnd);
599int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq,
600 struct net_device *dev, struct netdev_queue *netdevq,
601 unsigned int iqid);
602int t4_sge_alloc_ctrl_txq(struct adapter *adap, struct sge_ctrl_txq *txq,
603 struct net_device *dev, unsigned int iqid,
604 unsigned int cmplqid);
605int t4_sge_alloc_ofld_txq(struct adapter *adap, struct sge_ofld_txq *txq,
606 struct net_device *dev, unsigned int iqid);
607irqreturn_t t4_sge_intr_msix(int irq, void *cookie);
608void t4_sge_init(struct adapter *adap);
609void t4_sge_start(struct adapter *adap);
610void t4_sge_stop(struct adapter *adap);
611
612#define for_each_port(adapter, iter) \
613 for (iter = 0; iter < (adapter)->params.nports; ++iter)
614
615static inline unsigned int core_ticks_per_usec(const struct adapter *adap)
616{
617 return adap->params.vpd.cclk / 1000;
618}
619
620static inline unsigned int us_to_core_ticks(const struct adapter *adap,
621 unsigned int us)
622{
623 return (us * adap->params.vpd.cclk) / 1000;
624}
625
626void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask,
627 u32 val);
628
629int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size,
630 void *rpl, bool sleep_ok);
631
632static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd,
633 int size, void *rpl)
634{
635 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true);
636}
637
638static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd,
639 int size, void *rpl)
640{
641 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false);
642}
643
644void t4_intr_enable(struct adapter *adapter);
645void t4_intr_disable(struct adapter *adapter);
646void t4_intr_clear(struct adapter *adapter);
647int t4_slow_intr_handler(struct adapter *adapter);
648
649int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port,
650 struct link_config *lc);
651int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
652int t4_seeprom_wp(struct adapter *adapter, bool enable);
625ba2c2
DM		 653int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size);
654int t4_check_fw_version(struct adapter *adapter);
655int t4_prep_adapter(struct adapter *adapter);
656int t4_port_init(struct adapter *adap, int mbox, int pf, int vf);
657void t4_fatal_err(struct adapter *adapter);
625ba2c2
DM		 658int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp,
659 int filter_index, int enable);
660void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp,
661 int filter_index, int *enabled);
662int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid,
663 int start, int n, const u16 *rspq, unsigned int nrspq);
664int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode,
665 unsigned int flags);
666int t4_read_rss(struct adapter *adapter, u16 *entries);
667int t4_mc_read(struct adapter *adap, u32 addr, __be32 *data, u64 *parity);
668int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data,
669 u64 *parity);
670
671void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p);
672void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p);
673
674void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log);
675void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st);
676void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4,
677 struct tp_tcp_stats *v6);
678void t4_load_mtus(struct adapter *adap, const unsigned short *mtus,
679 const unsigned short *alpha, const unsigned short *beta);
680
681void t4_wol_magic_enable(struct adapter *adap, unsigned int port,
682 const u8 *addr);
683int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
684 u64 mask0, u64 mask1, unsigned int crc, bool enable);
685
686int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox,
687 enum dev_master master, enum dev_state *state);
688int t4_fw_bye(struct adapter *adap, unsigned int mbox);
689int t4_early_init(struct adapter *adap, unsigned int mbox);
690int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset);
691int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
692 unsigned int vf, unsigned int nparams, const u32 *params,
693 u32 *val);
694int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
695 unsigned int vf, unsigned int nparams, const u32 *params,
696 const u32 *val);
697int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf,
698 unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl,
699 unsigned int rxqi, unsigned int rxq, unsigned int tc,
700 unsigned int vi, unsigned int cmask, unsigned int pmask,
701 unsigned int nexact, unsigned int rcaps, unsigned int wxcaps);
702int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
703 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,
704 unsigned int *rss_size);
705int t4_free_vi(struct adapter *adap, unsigned int mbox, unsigned int pf,
706 unsigned int vf, unsigned int viid);
707int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid,
f8f5aafa
DM		 708 int mtu, int promisc, int all_multi, int bcast, int vlanex,
709 bool sleep_ok);
625ba2c2
DM		 710int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox,
711 unsigned int viid, bool free, unsigned int naddr,
712 const u8 **addr, u16 *idx, u64 *hash, bool sleep_ok);
713int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
714 int idx, const u8 *addr, bool persist, bool add_smt);
715int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid,
716 bool ucast, u64 vec, bool sleep_ok);
717int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid,
718 bool rx_en, bool tx_en);
719int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid,
720 unsigned int nblinks);
721int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
722 unsigned int mmd, unsigned int reg, u16 *valp);
723int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
724 unsigned int mmd, unsigned int reg, u16 val);
725int t4_iq_start_stop(struct adapter *adap, unsigned int mbox, bool start,
726 unsigned int pf, unsigned int vf, unsigned int iqid,
727 unsigned int fl0id, unsigned int fl1id);
728int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
729 unsigned int vf, unsigned int iqtype, unsigned int iqid,
730 unsigned int fl0id, unsigned int fl1id);
731int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
732 unsigned int vf, unsigned int eqid);
733int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
734 unsigned int vf, unsigned int eqid);
735int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
736 unsigned int vf, unsigned int eqid);
737int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);
738#endif /* __CXGB4_H__ */
Linux kernel - Deliverables
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