[deliverable/linux.git] / drivers / net / dsa / b53 / b53_mmap.c

/*
 * B53 register access through memory mapped registers
 *
 * Copyright (C) 2012-2013 Jonas Gorski <jogo@openwrt.org>
 *
 * Permission to use, copy, modify, and/or distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */

#include <linux/kernel.h>
#include <linux/kconfig.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/platform_data/b53.h>

#include "b53_priv.h"

struct b53_mmap_priv {
	void __iomem *regs;
};

static int b53_mmap_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
{
	u8 __iomem *regs = dev->priv;

	*val = readb(regs + (page << 8) + reg);

	return 0;
}

static int b53_mmap_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
{
	u8 __iomem *regs = dev->priv;

	if (WARN_ON(reg % 2))
		return -EINVAL;

	if (dev->pdata && dev->pdata->big_endian)
		*val = ioread16be(regs + (page << 8) + reg);
	else
		*val = readw(regs + (page << 8) + reg);

	return 0;
}

static int b53_mmap_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)
{
	u8 __iomem *regs = dev->priv;

	if (WARN_ON(reg % 4))
		return -EINVAL;

	if (dev->pdata && dev->pdata->big_endian)
		*val = ioread32be(regs + (page << 8) + reg);
	else
		*val = readl(regs + (page << 8) + reg);

	return 0;
}

static int b53_mmap_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
{
	u8 __iomem *regs = dev->priv;

	if (WARN_ON(reg % 2))
		return -EINVAL;

	if (reg % 4) {
		u16 lo;
		u32 hi;

		if (dev->pdata && dev->pdata->big_endian) {
			lo = ioread16be(regs + (page << 8) + reg);
			hi = ioread32be(regs + (page << 8) + reg + 2);
		} else {
			lo = readw(regs + (page << 8) + reg);
			hi = readl(regs + (page << 8) + reg + 2);
		}

		*val = ((u64)hi << 16) | lo;
	} else {
		u32 lo;
		u16 hi;

		if (dev->pdata && dev->pdata->big_endian) {
			lo = ioread32be(regs + (page << 8) + reg);
			hi = ioread16be(regs + (page << 8) + reg + 4);
		} else {
			lo = readl(regs + (page << 8) + reg);
			hi = readw(regs + (page << 8) + reg + 4);
		}

		*val = ((u64)hi << 32) | lo;
	}

	return 0;
}

static int b53_mmap_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)
{
	u8 __iomem *regs = dev->priv;
	u32 hi, lo;

	if (WARN_ON(reg % 4))
		return -EINVAL;

	if (dev->pdata && dev->pdata->big_endian) {
		lo = ioread32be(regs + (page << 8) + reg);
		hi = ioread32be(regs + (page << 8) + reg + 4);
	} else {
		lo = readl(regs + (page << 8) + reg);
		hi = readl(regs + (page << 8) + reg + 4);
	}

	*val = ((u64)hi << 32) | lo;

	return 0;
}

static int b53_mmap_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
{
	u8 __iomem *regs = dev->priv;

	writeb(value, regs + (page << 8) + reg);

	return 0;
}

static int b53_mmap_write16(struct b53_device *dev, u8 page, u8 reg,
			    u16 value)
{
	u8 __iomem *regs = dev->priv;

	if (WARN_ON(reg % 2))
		return -EINVAL;

	if (dev->pdata && dev->pdata->big_endian)
		iowrite16be(value, regs + (page << 8) + reg);
	else
		writew(value, regs + (page << 8) + reg);

	return 0;
}

static int b53_mmap_write32(struct b53_device *dev, u8 page, u8 reg,
			    u32 value)
{
	u8 __iomem *regs = dev->priv;

	if (WARN_ON(reg % 4))
		return -EINVAL;

	if (dev->pdata && dev->pdata->big_endian)
		iowrite32be(value, regs + (page << 8) + reg);
	else
		writel(value, regs + (page << 8) + reg);

	return 0;
}

static int b53_mmap_write48(struct b53_device *dev, u8 page, u8 reg,
			    u64 value)
{
	if (WARN_ON(reg % 2))
		return -EINVAL;

	if (reg % 4) {
		u32 hi = (u32)(value >> 16);
		u16 lo = (u16)value;

		b53_mmap_write16(dev, page, reg, lo);
		b53_mmap_write32(dev, page, reg + 2, hi);
	} else {
		u16 hi = (u16)(value >> 32);
		u32 lo = (u32)value;

		b53_mmap_write32(dev, page, reg, lo);
		b53_mmap_write16(dev, page, reg + 4, hi);
	}

	return 0;
}

static int b53_mmap_write64(struct b53_device *dev, u8 page, u8 reg,
			    u64 value)
{
	u32 hi, lo;

	hi = upper_32_bits(value);
	lo = lower_32_bits(value);

	if (WARN_ON(reg % 4))
		return -EINVAL;

	b53_mmap_write32(dev, page, reg, lo);
	b53_mmap_write32(dev, page, reg + 4, hi);

	return 0;
}

static const struct b53_io_ops b53_mmap_ops = {
	.read8 = b53_mmap_read8,
	.read16 = b53_mmap_read16,
	.read32 = b53_mmap_read32,
	.read48 = b53_mmap_read48,
	.read64 = b53_mmap_read64,
	.write8 = b53_mmap_write8,
	.write16 = b53_mmap_write16,
	.write32 = b53_mmap_write32,
	.write48 = b53_mmap_write48,
	.write64 = b53_mmap_write64,
};

static int b53_mmap_probe(struct platform_device *pdev)
{
	struct b53_platform_data *pdata = pdev->dev.platform_data;
	struct b53_device *dev;

	if (!pdata)
		return -EINVAL;

	dev = b53_switch_alloc(&pdev->dev, &b53_mmap_ops, pdata->regs);
	if (!dev)
		return -ENOMEM;

	dev->pdata = pdata;

	platform_set_drvdata(pdev, dev);

	return b53_switch_register(dev);
}

static int b53_mmap_remove(struct platform_device *pdev)
{
	struct b53_device *dev = platform_get_drvdata(pdev);

	if (dev)
		b53_switch_remove(dev);

	return 0;
}

static const struct of_device_id b53_mmap_of_table[] = {
	{ .compatible = "brcm,bcm3384-switch" },
	{ .compatible = "brcm,bcm6328-switch" },
	{ .compatible = "brcm,bcm6368-switch" },
	{ .compatible = "brcm,bcm63xx-switch" },
	{ /* sentinel */ },
};

static struct platform_driver b53_mmap_driver = {
	.probe = b53_mmap_probe,
	.remove = b53_mmap_remove,
	.driver = {
		.name = "b53-switch",
		.of_match_table = b53_mmap_of_table,
	},
};

module_platform_driver(b53_mmap_driver);
MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
MODULE_DESCRIPTION("B53 MMAP access driver");
MODULE_LICENSE("Dual BSD/GPL");
Commit	Line	Data
967dd82f FF	1	/*
	2	* B53 register access through memory mapped registers
	3	*
	4	* Copyright (C) 2012-2013 Jonas Gorski <jogo@openwrt.org>
	5	*
	6	* Permission to use, copy, modify, and/or distribute this software for any
	7	* purpose with or without fee is hereby granted, provided that the above
	8	* copyright notice and this permission notice appear in all copies.
	9	*
	10	* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
	11	* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
	12	* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
	13	* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
	14	* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
	15	* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
	16	* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
	17	*/
	18
	19	#include <linux/kernel.h>
	20	#include <linux/kconfig.h>
	21	#include <linux/module.h>
	22	#include <linux/io.h>
	23	#include <linux/platform_device.h>
	24	#include <linux/platform_data/b53.h>
	25
	26	#include "b53_priv.h"
	27
	28	struct b53_mmap_priv {
	29	void __iomem *regs;
	30	};
	31
	32	static int b53_mmap_read8(struct b53_device dev, u8 page, u8 reg, u8 val)
	33	{
	34	u8 __iomem *regs = dev->priv;
	35
	36	*val = readb(regs + (page << 8) + reg);
	37
	38	return 0;
	39	}
	40
	41	static int b53_mmap_read16(struct b53_device dev, u8 page, u8 reg, u16 val)
	42	{
	43	u8 __iomem *regs = dev->priv;
	44
	45	if (WARN_ON(reg % 2))
	46	return -EINVAL;
	47
55e7f6ab AB	48	if (dev->pdata && dev->pdata->big_endian)
55e7f6ab AB	49	*val = ioread16be(regs + (page << 8) + reg);
967dd82f FF	50	else
	51	*val = readw(regs + (page << 8) + reg);
	52
	53	return 0;
	54	}
	55
	56	static int b53_mmap_read32(struct b53_device dev, u8 page, u8 reg, u32 val)
	57	{
	58	u8 __iomem *regs = dev->priv;
	59
	60	if (WARN_ON(reg % 4))
	61	return -EINVAL;
	62
55e7f6ab AB	63	if (dev->pdata && dev->pdata->big_endian)
55e7f6ab AB	64	*val = ioread32be(regs + (page << 8) + reg);
967dd82f FF	65	else
	66	*val = readl(regs + (page << 8) + reg);
	67
	68	return 0;
	69	}
	70
	71	static int b53_mmap_read48(struct b53_device dev, u8 page, u8 reg, u64 val)
	72	{
5eca2914 AB	73	u8 __iomem *regs = dev->priv;
5eca2914 AB	74
967dd82f FF	75	if (WARN_ON(reg % 2))
	76	return -EINVAL;
	77
	78	if (reg % 4) {
	79	u16 lo;
	80	u32 hi;
	81
5eca2914 AB	82	if (dev->pdata && dev->pdata->big_endian) {
	83	lo = ioread16be(regs + (page << 8) + reg);
	84	hi = ioread32be(regs + (page << 8) + reg + 2);
	85	} else {
	86	lo = readw(regs + (page << 8) + reg);
	87	hi = readl(regs + (page << 8) + reg + 2);
	88	}
967dd82f FF	89
	90	*val = ((u64)hi << 16) \| lo;
	91	} else {
	92	u32 lo;
	93	u16 hi;
	94
5eca2914 AB	95	if (dev->pdata && dev->pdata->big_endian) {
	96	lo = ioread32be(regs + (page << 8) + reg);
	97	hi = ioread16be(regs + (page << 8) + reg + 4);
	98	} else {
	99	lo = readl(regs + (page << 8) + reg);
	100	hi = readw(regs + (page << 8) + reg + 4);
	101	}
967dd82f FF	102
	103	*val = ((u64)hi << 32) \| lo;
	104	}
	105
	106	return 0;
	107	}
	108
	109	static int b53_mmap_read64(struct b53_device dev, u8 page, u8 reg, u64 val)
	110	{
5eca2914	111	u8 __iomem *regs = dev->priv;
967dd82f FF	112	u32 hi, lo;
	113
	114	if (WARN_ON(reg % 4))
	115	return -EINVAL;
	116
5eca2914 AB	117	if (dev->pdata && dev->pdata->big_endian) {
	118	lo = ioread32be(regs + (page << 8) + reg);
	119	hi = ioread32be(regs + (page << 8) + reg + 4);
	120	} else {
	121	lo = readl(regs + (page << 8) + reg);
	122	hi = readl(regs + (page << 8) + reg + 4);
	123	}
967dd82f FF	124
	125	*val = ((u64)hi << 32) \| lo;
	126
	127	return 0;
	128	}
	129
	130	static int b53_mmap_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
	131	{
	132	u8 __iomem *regs = dev->priv;
	133
	134	writeb(value, regs + (page << 8) + reg);
	135
	136	return 0;
	137	}
	138
	139	static int b53_mmap_write16(struct b53_device *dev, u8 page, u8 reg,
	140	u16 value)
	141	{
	142	u8 __iomem *regs = dev->priv;
	143
	144	if (WARN_ON(reg % 2))
	145	return -EINVAL;
	146
55e7f6ab AB	147	if (dev->pdata && dev->pdata->big_endian)
55e7f6ab AB	148	iowrite16be(value, regs + (page << 8) + reg);
967dd82f FF	149	else
	150	writew(value, regs + (page << 8) + reg);
	151
	152	return 0;
	153	}
	154
	155	static int b53_mmap_write32(struct b53_device *dev, u8 page, u8 reg,
	156	u32 value)
	157	{
	158	u8 __iomem *regs = dev->priv;
	159
	160	if (WARN_ON(reg % 4))
	161	return -EINVAL;
	162
55e7f6ab AB	163	if (dev->pdata && dev->pdata->big_endian)
55e7f6ab AB	164	iowrite32be(value, regs + (page << 8) + reg);
967dd82f FF	165	else
	166	writel(value, regs + (page << 8) + reg);
	167
	168	return 0;
	169	}
	170
	171	static int b53_mmap_write48(struct b53_device *dev, u8 page, u8 reg,
	172	u64 value)
	173	{
	174	if (WARN_ON(reg % 2))
	175	return -EINVAL;
	176
	177	if (reg % 4) {
	178	u32 hi = (u32)(value >> 16);
	179	u16 lo = (u16)value;
	180
	181	b53_mmap_write16(dev, page, reg, lo);
	182	b53_mmap_write32(dev, page, reg + 2, hi);
	183	} else {
	184	u16 hi = (u16)(value >> 32);
	185	u32 lo = (u32)value;
	186
	187	b53_mmap_write32(dev, page, reg, lo);
	188	b53_mmap_write16(dev, page, reg + 4, hi);
	189	}
	190
	191	return 0;
	192	}
	193
	194	static int b53_mmap_write64(struct b53_device *dev, u8 page, u8 reg,
	195	u64 value)
	196	{
	197	u32 hi, lo;
	198
	199	hi = upper_32_bits(value);
	200	lo = lower_32_bits(value);
	201
	202	if (WARN_ON(reg % 4))
	203	return -EINVAL;
	204
	205	b53_mmap_write32(dev, page, reg, lo);
	206	b53_mmap_write32(dev, page, reg + 4, hi);
	207
	208	return 0;
	209	}
	210
0dff88d3	211	static const struct b53_io_ops b53_mmap_ops = {
967dd82f FF	212	.read8 = b53_mmap_read8,
	213	.read16 = b53_mmap_read16,
	214	.read32 = b53_mmap_read32,
	215	.read48 = b53_mmap_read48,
	216	.read64 = b53_mmap_read64,
	217	.write8 = b53_mmap_write8,
	218	.write16 = b53_mmap_write16,
	219	.write32 = b53_mmap_write32,
	220	.write48 = b53_mmap_write48,
	221	.write64 = b53_mmap_write64,
	222	};
	223
	224	static int b53_mmap_probe(struct platform_device *pdev)
	225	{
	226	struct b53_platform_data *pdata = pdev->dev.platform_data;
	227	struct b53_device *dev;
	228
	229	if (!pdata)
	230	return -EINVAL;
	231
	232	dev = b53_switch_alloc(&pdev->dev, &b53_mmap_ops, pdata->regs);
	233	if (!dev)
	234	return -ENOMEM;
	235
58d5aaea	236	dev->pdata = pdata;
967dd82f FF	237
	238	platform_set_drvdata(pdev, dev);
	239
	240	return b53_switch_register(dev);
	241	}
	242
	243	static int b53_mmap_remove(struct platform_device *pdev)
	244	{
	245	struct b53_device *dev = platform_get_drvdata(pdev);
	246
	247	if (dev)
	248	b53_switch_remove(dev);
	249
	250	return 0;
	251	}
	252
	253	static const struct of_device_id b53_mmap_of_table[] = {
	254	{ .compatible = "brcm,bcm3384-switch" },
	255	{ .compatible = "brcm,bcm6328-switch" },
	256	{ .compatible = "brcm,bcm6368-switch" },
	257	{ .compatible = "brcm,bcm63xx-switch" },
	258	{ /* sentinel */ },
	259	};
	260
	261	static struct platform_driver b53_mmap_driver = {
	262	.probe = b53_mmap_probe,
	263	.remove = b53_mmap_remove,
	264	.driver = {
	265	.name = "b53-switch",
	266	.of_match_table = b53_mmap_of_table,
	267	},
	268	};
	269
	270	module_platform_driver(b53_mmap_driver);
	271	MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
	272	MODULE_DESCRIPTION("B53 MMAP access driver");
	273	MODULE_LICENSE("Dual BSD/GPL");