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e100, e1000, ixgb: Fix an impossible memory overwrite bug
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
1da177e4 31char e1000_driver_name[] = "e1000";
3ad2cc67 32static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 33#ifndef CONFIG_E1000_NAPI
34#define DRIVERNAPI
35#else
36#define DRIVERNAPI "-NAPI"
37#endif
7cc33234 38#define DRV_VERSION "7.2.7-k2"DRIVERNAPI
1da177e4 39char e1000_driver_version[] = DRV_VERSION;
3d41e30a 40static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
49static struct pci_device_id e1000_pci_tbl[] = {
50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 101 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
b7ee49db 102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
1da177e4
LT		 106 /* required last entry */
107 {0,}
108};
109
110MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
111
3ad2cc67 112static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 113 struct e1000_tx_ring *txdr);
3ad2cc67 114static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 115 struct e1000_rx_ring *rxdr);
3ad2cc67 116static void e1000_free_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 117 struct e1000_tx_ring *tx_ring);
3ad2cc67 118static void e1000_free_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 119 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 120
121/* Local Function Prototypes */
122
123static int e1000_init_module(void);
124static void e1000_exit_module(void);
125static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
126static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 127static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 128static int e1000_sw_init(struct e1000_adapter *adapter);
129static int e1000_open(struct net_device *netdev);
130static int e1000_close(struct net_device *netdev);
131static void e1000_configure_tx(struct e1000_adapter *adapter);
132static void e1000_configure_rx(struct e1000_adapter *adapter);
133static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 134static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
135static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
136static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
137 struct e1000_tx_ring *tx_ring);
138static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
139 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 140static void e1000_set_multi(struct net_device *netdev);
141static void e1000_update_phy_info(unsigned long data);
142static void e1000_watchdog(unsigned long data);
1da177e4
LT		 143static void e1000_82547_tx_fifo_stall(unsigned long data);
144static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
145static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
146static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
147static int e1000_set_mac(struct net_device *netdev, void *p);
148static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 149static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
150 struct e1000_tx_ring *tx_ring);
1da177e4 151#ifdef CONFIG_E1000_NAPI
581d708e 152static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 153static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 154 struct e1000_rx_ring *rx_ring,
1da177e4 155 int *work_done, int work_to_do);
2d7edb92 156static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 157 struct e1000_rx_ring *rx_ring,
2d7edb92 158 int *work_done, int work_to_do);
1da177e4 159#else
581d708e
MC		 160static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
161 struct e1000_rx_ring *rx_ring);
162static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
163 struct e1000_rx_ring *rx_ring);
1da177e4 164#endif
581d708e 165static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 166 struct e1000_rx_ring *rx_ring,
167 int cleaned_count);
581d708e 168static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 169 struct e1000_rx_ring *rx_ring,
170 int cleaned_count);
1da177e4
LT		 171static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
172static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
173 int cmd);
1da177e4
LT		 174static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
175static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
176static void e1000_tx_timeout(struct net_device *dev);
87041639 177static void e1000_reset_task(struct net_device *dev);
1da177e4 178static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 179static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
180 struct sk_buff *skb);
1da177e4
LT		 181
182static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
183static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
184static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
185static void e1000_restore_vlan(struct e1000_adapter *adapter);
186
977e74b5 187static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 188#ifdef CONFIG_PM
1da177e4
LT		 189static int e1000_resume(struct pci_dev *pdev);
190#endif
c653e635 191static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 192
193#ifdef CONFIG_NET_POLL_CONTROLLER
194/* for netdump / net console */
195static void e1000_netpoll (struct net_device *netdev);
196#endif
197
9026729b
AK		 198static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
199 pci_channel_state_t state);
200static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
201static void e1000_io_resume(struct pci_dev *pdev);
202
203static struct pci_error_handlers e1000_err_handler = {
204 .error_detected = e1000_io_error_detected,
205 .slot_reset = e1000_io_slot_reset,
206 .resume = e1000_io_resume,
207};
24025e4e 208
1da177e4
LT		 209static struct pci_driver e1000_driver = {
210 .name = e1000_driver_name,
211 .id_table = e1000_pci_tbl,
212 .probe = e1000_probe,
213 .remove = __devexit_p(e1000_remove),
214 /* Power Managment Hooks */
1da177e4 215 .suspend = e1000_suspend,
6fdfef16 216#ifdef CONFIG_PM
c653e635 217 .resume = e1000_resume,
1da177e4 218#endif
9026729b
AK		 219 .shutdown = e1000_shutdown,
220 .err_handler = &e1000_err_handler
1da177e4
LT		 221};
222
223MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
224MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
225MODULE_LICENSE("GPL");
226MODULE_VERSION(DRV_VERSION);
227
228static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
229module_param(debug, int, 0);
230MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
231
232/**
233 * e1000_init_module - Driver Registration Routine
234 *
235 * e1000_init_module is the first routine called when the driver is
236 * loaded. All it does is register with the PCI subsystem.
237 **/
238
239static int __init
240e1000_init_module(void)
241{
242 int ret;
243 printk(KERN_INFO "%s - version %s\n",
244 e1000_driver_string, e1000_driver_version);
245
246 printk(KERN_INFO "%s\n", e1000_copyright);
247
29917620 248 ret = pci_register_driver(&e1000_driver);
8b378def 249
1da177e4
LT		 250 return ret;
251}
252
253module_init(e1000_init_module);
254
255/**
256 * e1000_exit_module - Driver Exit Cleanup Routine
257 *
258 * e1000_exit_module is called just before the driver is removed
259 * from memory.
260 **/
261
262static void __exit
263e1000_exit_module(void)
264{
1da177e4
LT		 265 pci_unregister_driver(&e1000_driver);
266}
267
268module_exit(e1000_exit_module);
269
2db10a08
AK		 270static int e1000_request_irq(struct e1000_adapter *adapter)
271{
272 struct net_device *netdev = adapter->netdev;
273 int flags, err = 0;
274
c0bc8721 275 flags = IRQF_SHARED;
2db10a08
AK		 276#ifdef CONFIG_PCI_MSI
277 if (adapter->hw.mac_type > e1000_82547_rev_2) {
278 adapter->have_msi = TRUE;
279 if ((err = pci_enable_msi(adapter->pdev))) {
280 DPRINTK(PROBE, ERR,
281 "Unable to allocate MSI interrupt Error: %d\n", err);
282 adapter->have_msi = FALSE;
283 }
284 }
285 if (adapter->have_msi)
61ef5c00 286 flags &= ~IRQF_SHARED;
2db10a08
AK		 287#endif
288 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
289 netdev->name, netdev)))
290 DPRINTK(PROBE, ERR,
291 "Unable to allocate interrupt Error: %d\n", err);
292
293 return err;
294}
295
296static void e1000_free_irq(struct e1000_adapter *adapter)
297{
298 struct net_device *netdev = adapter->netdev;
299
300 free_irq(adapter->pdev->irq, netdev);
301
302#ifdef CONFIG_PCI_MSI
303 if (adapter->have_msi)
304 pci_disable_msi(adapter->pdev);
305#endif
306}
307
1da177e4
LT		 308/**
309 * e1000_irq_disable - Mask off interrupt generation on the NIC
310 * @adapter: board private structure
311 **/
312
e619d523 313static void
1da177e4
LT		 314e1000_irq_disable(struct e1000_adapter *adapter)
315{
316 atomic_inc(&adapter->irq_sem);
317 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
318 E1000_WRITE_FLUSH(&adapter->hw);
319 synchronize_irq(adapter->pdev->irq);
320}
321
322/**
323 * e1000_irq_enable - Enable default interrupt generation settings
324 * @adapter: board private structure
325 **/
326
e619d523 327static void
1da177e4
LT		 328e1000_irq_enable(struct e1000_adapter *adapter)
329{
96838a40 330 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 331 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
332 E1000_WRITE_FLUSH(&adapter->hw);
333 }
334}
3ad2cc67
AB		 335
336static void
2d7edb92
MC		 337e1000_update_mng_vlan(struct e1000_adapter *adapter)
338{
339 struct net_device *netdev = adapter->netdev;
340 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
341 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 342 if (adapter->vlgrp) {
343 if (!adapter->vlgrp->vlan_devices[vid]) {
344 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 345 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
346 e1000_vlan_rx_add_vid(netdev, vid);
347 adapter->mng_vlan_id = vid;
348 } else
349 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 350
351 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
352 (vid != old_vid) &&
2d7edb92
MC		 353 !adapter->vlgrp->vlan_devices[old_vid])
354 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 355 } else
356 adapter->mng_vlan_id = vid;
2d7edb92
MC		 357 }
358}
b55ccb35
JK		 359
360/**
361 * e1000_release_hw_control - release control of the h/w to f/w
362 * @adapter: address of board private structure
363 *
364 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
365 * For ASF and Pass Through versions of f/w this means that the
366 * driver is no longer loaded. For AMT version (only with 82573) i
367 * of the f/w this means that the netowrk i/f is closed.
76c224bc 368 *
b55ccb35
JK		 369 **/
370
e619d523 371static void
b55ccb35
JK		 372e1000_release_hw_control(struct e1000_adapter *adapter)
373{
374 uint32_t ctrl_ext;
375 uint32_t swsm;
cd94dd0b 376 uint32_t extcnf;
b55ccb35
JK		 377
378 /* Let firmware taken over control of h/w */
379 switch (adapter->hw.mac_type) {
380 case e1000_82571:
381 case e1000_82572:
4cc15f54 382 case e1000_80003es2lan:
b55ccb35
JK		 383 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
384 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
385 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
386 break;
387 case e1000_82573:
388 swsm = E1000_READ_REG(&adapter->hw, SWSM);
389 E1000_WRITE_REG(&adapter->hw, SWSM,
390 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 391 case e1000_ich8lan:
392 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
393 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
394 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
395 break;
b55ccb35
JK		 396 default:
397 break;
398 }
399}
400
401/**
402 * e1000_get_hw_control - get control of the h/w from f/w
403 * @adapter: address of board private structure
404 *
405 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 406 * For ASF and Pass Through versions of f/w this means that
407 * the driver is loaded. For AMT version (only with 82573)
b55ccb35 408 * of the f/w this means that the netowrk i/f is open.
76c224bc 409 *
b55ccb35
JK		 410 **/
411
e619d523 412static void
b55ccb35
JK		 413e1000_get_hw_control(struct e1000_adapter *adapter)
414{
415 uint32_t ctrl_ext;
416 uint32_t swsm;
cd94dd0b 417 uint32_t extcnf;
b55ccb35
JK		 418 /* Let firmware know the driver has taken over */
419 switch (adapter->hw.mac_type) {
420 case e1000_82571:
421 case e1000_82572:
4cc15f54 422 case e1000_80003es2lan:
b55ccb35
JK		 423 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
424 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
425 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
426 break;
427 case e1000_82573:
428 swsm = E1000_READ_REG(&adapter->hw, SWSM);
429 E1000_WRITE_REG(&adapter->hw, SWSM,
430 swsm | E1000_SWSM_DRV_LOAD);
431 break;
cd94dd0b
AK		 432 case e1000_ich8lan:
433 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
434 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
435 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
436 break;
b55ccb35
JK		 437 default:
438 break;
439 }
440}
441
1da177e4
LT		 442int
443e1000_up(struct e1000_adapter *adapter)
444{
445 struct net_device *netdev = adapter->netdev;
2db10a08 446 int i;
1da177e4
LT		 447
448 /* hardware has been reset, we need to reload some things */
449
1da177e4
LT		 450 e1000_set_multi(netdev);
451
452 e1000_restore_vlan(adapter);
453
454 e1000_configure_tx(adapter);
455 e1000_setup_rctl(adapter);
456 e1000_configure_rx(adapter);
72d64a43
JK		 457 /* call E1000_DESC_UNUSED which always leaves
458 * at least 1 descriptor unused to make sure
459 * next_to_use != next_to_clean */
f56799ea 460 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 461 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 462 adapter->alloc_rx_buf(adapter, ring,
463 E1000_DESC_UNUSED(ring));
f56799ea 464 }
1da177e4 465
7bfa4816
JK		 466 adapter->tx_queue_len = netdev->tx_queue_len;
467
1da177e4 468 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 469
470#ifdef CONFIG_E1000_NAPI
471 netif_poll_enable(netdev);
472#endif
5de55624
MC		 473 e1000_irq_enable(adapter);
474
1da177e4
LT		 475 return 0;
476}
477
79f05bf0
AK		 478/**
479 * e1000_power_up_phy - restore link in case the phy was powered down
480 * @adapter: address of board private structure
481 *
482 * The phy may be powered down to save power and turn off link when the
483 * driver is unloaded and wake on lan is not enabled (among others)
484 * *** this routine MUST be followed by a call to e1000_reset ***
485 *
486 **/
487
d658266e 488void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 489{
490 uint16_t mii_reg = 0;
491
492 /* Just clear the power down bit to wake the phy back up */
493 if (adapter->hw.media_type == e1000_media_type_copper) {
494 /* according to the manual, the phy will retain its
495 * settings across a power-down/up cycle */
496 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
497 mii_reg &= ~MII_CR_POWER_DOWN;
498 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
499 }
500}
501
502static void e1000_power_down_phy(struct e1000_adapter *adapter)
503{
504 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
505 e1000_check_mng_mode(&adapter->hw);
506 /* Power down the PHY so no link is implied when interface is down
507 * The PHY cannot be powered down if any of the following is TRUE
508 * (a) WoL is enabled
509 * (b) AMT is active
510 * (c) SoL/IDER session is active */
511 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 512 adapter->hw.mac_type != e1000_ich8lan &&
79f05bf0
AK		 513 adapter->hw.media_type == e1000_media_type_copper &&
514 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
515 !mng_mode_enabled &&
516 !e1000_check_phy_reset_block(&adapter->hw)) {
517 uint16_t mii_reg = 0;
518 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
519 mii_reg |= MII_CR_POWER_DOWN;
520 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
521 mdelay(1);
522 }
523}
524
1da177e4
LT		 525void
526e1000_down(struct e1000_adapter *adapter)
527{
528 struct net_device *netdev = adapter->netdev;
529
530 e1000_irq_disable(adapter);
c1605eb3 531
1da177e4
LT		 532 del_timer_sync(&adapter->tx_fifo_stall_timer);
533 del_timer_sync(&adapter->watchdog_timer);
534 del_timer_sync(&adapter->phy_info_timer);
535
536#ifdef CONFIG_E1000_NAPI
537 netif_poll_disable(netdev);
538#endif
7bfa4816 539 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 540 adapter->link_speed = 0;
541 adapter->link_duplex = 0;
542 netif_carrier_off(netdev);
543 netif_stop_queue(netdev);
544
545 e1000_reset(adapter);
581d708e
MC		 546 e1000_clean_all_tx_rings(adapter);
547 e1000_clean_all_rx_rings(adapter);
1da177e4 548}
1da177e4 549
2db10a08
AK		 550void
551e1000_reinit_locked(struct e1000_adapter *adapter)
552{
553 WARN_ON(in_interrupt());
554 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
555 msleep(1);
556 e1000_down(adapter);
557 e1000_up(adapter);
558 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 559}
560
561void
562e1000_reset(struct e1000_adapter *adapter)
563{
2d7edb92 564 uint32_t pba, manc;
1125ecbc 565 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 566
567 /* Repartition Pba for greater than 9k mtu
568 * To take effect CTRL.RST is required.
569 */
570
2d7edb92
MC		 571 switch (adapter->hw.mac_type) {
572 case e1000_82547:
0e6ef3e0 573 case e1000_82547_rev_2:
2d7edb92
MC		 574 pba = E1000_PBA_30K;
575 break;
868d5309
MC		 576 case e1000_82571:
577 case e1000_82572:
6418ecc6 578 case e1000_80003es2lan:
868d5309
MC		 579 pba = E1000_PBA_38K;
580 break;
2d7edb92
MC		 581 case e1000_82573:
582 pba = E1000_PBA_12K;
583 break;
cd94dd0b
AK		 584 case e1000_ich8lan:
585 pba = E1000_PBA_8K;
586 break;
2d7edb92
MC		 587 default:
588 pba = E1000_PBA_48K;
589 break;
590 }
591
96838a40 592 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 593 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 594 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 595
596
96838a40 597 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 598 adapter->tx_fifo_head = 0;
599 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
600 adapter->tx_fifo_size =
601 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
602 atomic_set(&adapter->tx_fifo_stall, 0);
603 }
2d7edb92 604
1da177e4
LT		 605 E1000_WRITE_REG(&adapter->hw, PBA, pba);
606
607 /* flow control settings */
f11b7f85
JK		 608 /* Set the FC high water mark to 90% of the FIFO size.
609 * Required to clear last 3 LSB */
610 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 611 /* We can't use 90% on small FIFOs because the remainder
612 * would be less than 1 full frame. In this case, we size
613 * it to allow at least a full frame above the high water
614 * mark. */
615 if (pba < E1000_PBA_16K)
616 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 617
618 adapter->hw.fc_high_water = fc_high_water_mark;
619 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 620 if (adapter->hw.mac_type == e1000_80003es2lan)
621 adapter->hw.fc_pause_time = 0xFFFF;
622 else
623 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 624 adapter->hw.fc_send_xon = 1;
625 adapter->hw.fc = adapter->hw.original_fc;
626
2d7edb92 627 /* Allow time for pending master requests to run */
1da177e4 628 e1000_reset_hw(&adapter->hw);
96838a40 629 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 630 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 631 if (e1000_init_hw(&adapter->hw))
1da177e4 632 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 633 e1000_update_mng_vlan(adapter);
1da177e4
LT		 634 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
635 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
636
637 e1000_reset_adaptive(&adapter->hw);
638 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 639
640 if (!adapter->smart_power_down &&
641 (adapter->hw.mac_type == e1000_82571 ||
642 adapter->hw.mac_type == e1000_82572)) {
643 uint16_t phy_data = 0;
644 /* speed up time to link by disabling smart power down, ignore
645 * the return value of this function because there is nothing
646 * different we would do if it failed */
647 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
648 &phy_data);
649 phy_data &= ~IGP02E1000_PM_SPD;
650 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
651 phy_data);
652 }
653
cd94dd0b
AK		 654 if (adapter->hw.mac_type < e1000_ich8lan)
655 /* FIXME: this code is duplicate and wrong for PCI Express */
2d7edb92
MC		 656 if (adapter->en_mng_pt) {
657 manc = E1000_READ_REG(&adapter->hw, MANC);
658 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
659 E1000_WRITE_REG(&adapter->hw, MANC, manc);
660 }
1da177e4
LT		 661}
662
663/**
664 * e1000_probe - Device Initialization Routine
665 * @pdev: PCI device information struct
666 * @ent: entry in e1000_pci_tbl
667 *
668 * Returns 0 on success, negative on failure
669 *
670 * e1000_probe initializes an adapter identified by a pci_dev structure.
671 * The OS initialization, configuring of the adapter private structure,
672 * and a hardware reset occur.
673 **/
674
675static int __devinit
676e1000_probe(struct pci_dev *pdev,
677 const struct pci_device_id *ent)
678{
679 struct net_device *netdev;
680 struct e1000_adapter *adapter;
2d7edb92 681 unsigned long mmio_start, mmio_len;
cd94dd0b 682 unsigned long flash_start, flash_len;
2d7edb92 683
1da177e4 684 static int cards_found = 0;
120cd576 685 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 686 int i, err, pci_using_dac;
120cd576 687 uint16_t eeprom_data = 0;
1da177e4 688 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 689 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 690 return err;
691
cd94dd0b
AK		 692 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
693 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 694 pci_using_dac = 1;
695 } else {
cd94dd0b
AK		 696 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
697 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 698 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 699 goto err_dma;
1da177e4
LT		 700 }
701 pci_using_dac = 0;
702 }
703
96838a40 704 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 705 goto err_pci_reg;
1da177e4
LT		 706
707 pci_set_master(pdev);
708
6dd62ab0 709 err = -ENOMEM;
1da177e4 710 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 711 if (!netdev)
1da177e4 712 goto err_alloc_etherdev;
1da177e4
LT		 713
714 SET_MODULE_OWNER(netdev);
715 SET_NETDEV_DEV(netdev, &pdev->dev);
716
717 pci_set_drvdata(pdev, netdev);
60490fe0 718 adapter = netdev_priv(netdev);
1da177e4
LT		 719 adapter->netdev = netdev;
720 adapter->pdev = pdev;
721 adapter->hw.back = adapter;
722 adapter->msg_enable = (1 << debug) - 1;
723
724 mmio_start = pci_resource_start(pdev, BAR_0);
725 mmio_len = pci_resource_len(pdev, BAR_0);
726
6dd62ab0 727 err = -EIO;
1da177e4 728 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 729 if (!adapter->hw.hw_addr)
1da177e4 730 goto err_ioremap;
1da177e4 731
96838a40
JB		 732 for (i = BAR_1; i <= BAR_5; i++) {
733 if (pci_resource_len(pdev, i) == 0)
1da177e4 734 continue;
96838a40 735 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 736 adapter->hw.io_base = pci_resource_start(pdev, i);
737 break;
738 }
739 }
740
741 netdev->open = &e1000_open;
742 netdev->stop = &e1000_close;
743 netdev->hard_start_xmit = &e1000_xmit_frame;
744 netdev->get_stats = &e1000_get_stats;
745 netdev->set_multicast_list = &e1000_set_multi;
746 netdev->set_mac_address = &e1000_set_mac;
747 netdev->change_mtu = &e1000_change_mtu;
748 netdev->do_ioctl = &e1000_ioctl;
749 e1000_set_ethtool_ops(netdev);
750 netdev->tx_timeout = &e1000_tx_timeout;
751 netdev->watchdog_timeo = 5 * HZ;
752#ifdef CONFIG_E1000_NAPI
753 netdev->poll = &e1000_clean;
754 netdev->weight = 64;
755#endif
756 netdev->vlan_rx_register = e1000_vlan_rx_register;
757 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
758 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
759#ifdef CONFIG_NET_POLL_CONTROLLER
760 netdev->poll_controller = e1000_netpoll;
761#endif
0eb5a34c 762 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 763
764 netdev->mem_start = mmio_start;
765 netdev->mem_end = mmio_start + mmio_len;
766 netdev->base_addr = adapter->hw.io_base;
767
768 adapter->bd_number = cards_found;
769
770 /* setup the private structure */
771
96838a40 772 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 773 goto err_sw_init;
774
6dd62ab0 775 err = -EIO;
cd94dd0b
AK		 776 /* Flash BAR mapping must happen after e1000_sw_init
777 * because it depends on mac_type */
778 if ((adapter->hw.mac_type == e1000_ich8lan) &&
779 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
780 flash_start = pci_resource_start(pdev, 1);
781 flash_len = pci_resource_len(pdev, 1);
782 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 783 if (!adapter->hw.flash_address)
cd94dd0b 784 goto err_flashmap;
cd94dd0b
AK		 785 }
786
6dd62ab0 787 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 788 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
789
96838a40 790 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 791 netdev->features = NETIF_F_SG |
792 NETIF_F_HW_CSUM |
793 NETIF_F_HW_VLAN_TX |
794 NETIF_F_HW_VLAN_RX |
795 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 796 if (adapter->hw.mac_type == e1000_ich8lan)
797 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 798 }
799
800#ifdef NETIF_F_TSO
96838a40 801 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 802 (adapter->hw.mac_type != e1000_82547))
803 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 804
805#ifdef NETIF_F_TSO_IPV6
96838a40 806 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 807 netdev->features |= NETIF_F_TSO_IPV6;
808#endif
1da177e4 809#endif
96838a40 810 if (pci_using_dac)
1da177e4
LT		 811 netdev->features |= NETIF_F_HIGHDMA;
812
76c224bc
AK		 813 netdev->features |= NETIF_F_LLTX;
814
2d7edb92
MC		 815 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
816
cd94dd0b
AK		 817 /* initialize eeprom parameters */
818
819 if (e1000_init_eeprom_params(&adapter->hw)) {
820 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 821 goto err_eeprom;
cd94dd0b
AK		 822 }
823
96838a40 824 /* before reading the EEPROM, reset the controller to
1da177e4 825 * put the device in a known good starting state */
96838a40 826
1da177e4
LT		 827 e1000_reset_hw(&adapter->hw);
828
829 /* make sure the EEPROM is good */
830
96838a40 831 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 832 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 833 goto err_eeprom;
834 }
835
836 /* copy the MAC address out of the EEPROM */
837
96838a40 838 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 839 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
840 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 841 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 842
96838a40 843 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 844 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 845 goto err_eeprom;
846 }
847
1da177e4
LT		 848 e1000_get_bus_info(&adapter->hw);
849
850 init_timer(&adapter->tx_fifo_stall_timer);
851 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
852 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
853
854 init_timer(&adapter->watchdog_timer);
855 adapter->watchdog_timer.function = &e1000_watchdog;
856 adapter->watchdog_timer.data = (unsigned long) adapter;
857
1da177e4
LT		 858 init_timer(&adapter->phy_info_timer);
859 adapter->phy_info_timer.function = &e1000_update_phy_info;
860 adapter->phy_info_timer.data = (unsigned long) adapter;
861
87041639
JK		 862 INIT_WORK(&adapter->reset_task,
863 (void (*)(void *))e1000_reset_task, netdev);
1da177e4
LT		 864
865 /* we're going to reset, so assume we have no link for now */
866
867 netif_carrier_off(netdev);
868 netif_stop_queue(netdev);
869
870 e1000_check_options(adapter);
871
872 /* Initial Wake on LAN setting
873 * If APM wake is enabled in the EEPROM,
874 * enable the ACPI Magic Packet filter
875 */
876
96838a40 877 switch (adapter->hw.mac_type) {
1da177e4
LT		 878 case e1000_82542_rev2_0:
879 case e1000_82542_rev2_1:
880 case e1000_82543:
881 break;
882 case e1000_82544:
883 e1000_read_eeprom(&adapter->hw,
884 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
885 eeprom_apme_mask = E1000_EEPROM_82544_APM;
886 break;
cd94dd0b
AK		 887 case e1000_ich8lan:
888 e1000_read_eeprom(&adapter->hw,
889 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
890 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
891 break;
1da177e4
LT		 892 case e1000_82546:
893 case e1000_82546_rev_3:
fd803241 894 case e1000_82571:
6418ecc6 895 case e1000_80003es2lan:
96838a40 896 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 897 e1000_read_eeprom(&adapter->hw,
898 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
899 break;
900 }
901 /* Fall Through */
902 default:
903 e1000_read_eeprom(&adapter->hw,
904 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
905 break;
906 }
96838a40 907 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 908 adapter->eeprom_wol |= E1000_WUFC_MAG;
909
910 /* now that we have the eeprom settings, apply the special cases
911 * where the eeprom may be wrong or the board simply won't support
912 * wake on lan on a particular port */
913 switch (pdev->device) {
914 case E1000_DEV_ID_82546GB_PCIE:
915 adapter->eeprom_wol = 0;
916 break;
917 case E1000_DEV_ID_82546EB_FIBER:
918 case E1000_DEV_ID_82546GB_FIBER:
919 case E1000_DEV_ID_82571EB_FIBER:
920 /* Wake events only supported on port A for dual fiber
921 * regardless of eeprom setting */
922 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
923 adapter->eeprom_wol = 0;
924 break;
925 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 926 case E1000_DEV_ID_82571EB_QUAD_COPPER:
120cd576
JB		 927 /* if quad port adapter, disable WoL on all but port A */
928 if (global_quad_port_a != 0)
929 adapter->eeprom_wol = 0;
930 else
931 adapter->quad_port_a = 1;
932 /* Reset for multiple quad port adapters */
933 if (++global_quad_port_a == 4)
934 global_quad_port_a = 0;
935 break;
936 }
937
938 /* initialize the wol settings based on the eeprom settings */
939 adapter->wol = adapter->eeprom_wol;
1da177e4 940
fb3d47d4
JK		 941 /* print bus type/speed/width info */
942 {
943 struct e1000_hw *hw = &adapter->hw;
944 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
945 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
946 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
947 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
948 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
949 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
950 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
951 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
952 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
953 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
954 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
955 "32-bit"));
956 }
957
958 for (i = 0; i < 6; i++)
959 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
960
1da177e4
LT		 961 /* reset the hardware with the new settings */
962 e1000_reset(adapter);
963
b55ccb35
JK		 964 /* If the controller is 82573 and f/w is AMT, do not set
965 * DRV_LOAD until the interface is up. For all other cases,
966 * let the f/w know that the h/w is now under the control
967 * of the driver. */
968 if (adapter->hw.mac_type != e1000_82573 ||
969 !e1000_check_mng_mode(&adapter->hw))
970 e1000_get_hw_control(adapter);
2d7edb92 971
1da177e4 972 strcpy(netdev->name, "eth%d");
96838a40 973 if ((err = register_netdev(netdev)))
1da177e4
LT		 974 goto err_register;
975
976 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
977
978 cards_found++;
979 return 0;
980
981err_register:
6dd62ab0
VA		 982 e1000_release_hw_control(adapter);
983err_eeprom:
984 if (!e1000_check_phy_reset_block(&adapter->hw))
985 e1000_phy_hw_reset(&adapter->hw);
986
cd94dd0b
AK		 987 if (adapter->hw.flash_address)
988 iounmap(adapter->hw.flash_address);
989err_flashmap:
6dd62ab0
VA		 990#ifdef CONFIG_E1000_NAPI
991 for (i = 0; i < adapter->num_rx_queues; i++)
992 dev_put(&adapter->polling_netdev[i]);
993#endif
994
995 kfree(adapter->tx_ring);
996 kfree(adapter->rx_ring);
997#ifdef CONFIG_E1000_NAPI
998 kfree(adapter->polling_netdev);
999#endif
1da177e4 1000err_sw_init:
1da177e4
LT		 1001 iounmap(adapter->hw.hw_addr);
1002err_ioremap:
1003 free_netdev(netdev);
1004err_alloc_etherdev:
1005 pci_release_regions(pdev);
6dd62ab0
VA		 1006err_pci_reg:
1007err_dma:
1008 pci_disable_device(pdev);
1da177e4
LT		 1009 return err;
1010}
1011
1012/**
1013 * e1000_remove - Device Removal Routine
1014 * @pdev: PCI device information struct
1015 *
1016 * e1000_remove is called by the PCI subsystem to alert the driver
1017 * that it should release a PCI device. The could be caused by a
1018 * Hot-Plug event, or because the driver is going to be removed from
1019 * memory.
1020 **/
1021
1022static void __devexit
1023e1000_remove(struct pci_dev *pdev)
1024{
1025 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1026 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 1027 uint32_t manc;
581d708e
MC		 1028#ifdef CONFIG_E1000_NAPI
1029 int i;
1030#endif
1da177e4 1031
be2b28ed
JG		 1032 flush_scheduled_work();
1033
96838a40 1034 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 1035 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 1036 adapter->hw.media_type == e1000_media_type_copper) {
1037 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 1038 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 1039 manc |= E1000_MANC_ARP_EN;
1040 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1041 }
1042 }
1043
b55ccb35
JK		 1044 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1045 * would have already happened in close and is redundant. */
1046 e1000_release_hw_control(adapter);
2d7edb92 1047
1da177e4 1048 unregister_netdev(netdev);
581d708e 1049#ifdef CONFIG_E1000_NAPI
f56799ea 1050 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1051 dev_put(&adapter->polling_netdev[i]);
581d708e 1052#endif
1da177e4 1053
96838a40 1054 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1055 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1056
24025e4e
MC		 1057 kfree(adapter->tx_ring);
1058 kfree(adapter->rx_ring);
1059#ifdef CONFIG_E1000_NAPI
1060 kfree(adapter->polling_netdev);
1061#endif
1062
1da177e4 1063 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1064 if (adapter->hw.flash_address)
1065 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1066 pci_release_regions(pdev);
1067
1068 free_netdev(netdev);
1069
1070 pci_disable_device(pdev);
1071}
1072
1073/**
1074 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1075 * @adapter: board private structure to initialize
1076 *
1077 * e1000_sw_init initializes the Adapter private data structure.
1078 * Fields are initialized based on PCI device information and
1079 * OS network device settings (MTU size).
1080 **/
1081
1082static int __devinit
1083e1000_sw_init(struct e1000_adapter *adapter)
1084{
1085 struct e1000_hw *hw = &adapter->hw;
1086 struct net_device *netdev = adapter->netdev;
1087 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1088#ifdef CONFIG_E1000_NAPI
1089 int i;
1090#endif
1da177e4
LT		 1091
1092 /* PCI config space info */
1093
1094 hw->vendor_id = pdev->vendor;
1095 hw->device_id = pdev->device;
1096 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1097 hw->subsystem_id = pdev->subsystem_device;
1098
1099 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1100
1101 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1102
eb0f8054 1103 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1104 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1105 hw->max_frame_size = netdev->mtu +
1106 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1107 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1108
1109 /* identify the MAC */
1110
96838a40 1111 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1112 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1113 return -EIO;
1114 }
1115
96838a40 1116 switch (hw->mac_type) {
1da177e4
LT		 1117 default:
1118 break;
1119 case e1000_82541:
1120 case e1000_82547:
1121 case e1000_82541_rev_2:
1122 case e1000_82547_rev_2:
1123 hw->phy_init_script = 1;
1124 break;
1125 }
1126
1127 e1000_set_media_type(hw);
1128
1129 hw->wait_autoneg_complete = FALSE;
1130 hw->tbi_compatibility_en = TRUE;
1131 hw->adaptive_ifs = TRUE;
1132
1133 /* Copper options */
1134
96838a40 1135 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1136 hw->mdix = AUTO_ALL_MODES;
1137 hw->disable_polarity_correction = FALSE;
1138 hw->master_slave = E1000_MASTER_SLAVE;
1139 }
1140
f56799ea
JK		 1141 adapter->num_tx_queues = 1;
1142 adapter->num_rx_queues = 1;
581d708e
MC		 1143
1144 if (e1000_alloc_queues(adapter)) {
1145 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1146 return -ENOMEM;
1147 }
1148
1149#ifdef CONFIG_E1000_NAPI
f56799ea 1150 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1151 adapter->polling_netdev[i].priv = adapter;
1152 adapter->polling_netdev[i].poll = &e1000_clean;
1153 adapter->polling_netdev[i].weight = 64;
1154 dev_hold(&adapter->polling_netdev[i]);
1155 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1156 }
7bfa4816 1157 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1158#endif
1159
1da177e4
LT		 1160 atomic_set(&adapter->irq_sem, 1);
1161 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1162
1163 return 0;
1164}
1165
581d708e
MC		 1166/**
1167 * e1000_alloc_queues - Allocate memory for all rings
1168 * @adapter: board private structure to initialize
1169 *
1170 * We allocate one ring per queue at run-time since we don't know the
1171 * number of queues at compile-time. The polling_netdev array is
1172 * intended for Multiqueue, but should work fine with a single queue.
1173 **/
1174
1175static int __devinit
1176e1000_alloc_queues(struct e1000_adapter *adapter)
1177{
1178 int size;
1179
f56799ea 1180 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1181 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1182 if (!adapter->tx_ring)
1183 return -ENOMEM;
1184 memset(adapter->tx_ring, 0, size);
1185
f56799ea 1186 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1187 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1188 if (!adapter->rx_ring) {
1189 kfree(adapter->tx_ring);
1190 return -ENOMEM;
1191 }
1192 memset(adapter->rx_ring, 0, size);
1193
1194#ifdef CONFIG_E1000_NAPI
f56799ea 1195 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1196 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1197 if (!adapter->polling_netdev) {
1198 kfree(adapter->tx_ring);
1199 kfree(adapter->rx_ring);
1200 return -ENOMEM;
1201 }
1202 memset(adapter->polling_netdev, 0, size);
1203#endif
1204
1205 return E1000_SUCCESS;
1206}
1207
1da177e4
LT		 1208/**
1209 * e1000_open - Called when a network interface is made active
1210 * @netdev: network interface device structure
1211 *
1212 * Returns 0 on success, negative value on failure
1213 *
1214 * The open entry point is called when a network interface is made
1215 * active by the system (IFF_UP). At this point all resources needed
1216 * for transmit and receive operations are allocated, the interrupt
1217 * handler is registered with the OS, the watchdog timer is started,
1218 * and the stack is notified that the interface is ready.
1219 **/
1220
1221static int
1222e1000_open(struct net_device *netdev)
1223{
60490fe0 1224 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1225 int err;
1226
2db10a08
AK		 1227 /* disallow open during test */
1228 if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
1229 return -EBUSY;
1230
1da177e4
LT		 1231 /* allocate transmit descriptors */
1232
581d708e 1233 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1234 goto err_setup_tx;
1235
1236 /* allocate receive descriptors */
1237
581d708e 1238 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1239 goto err_setup_rx;
1240
2db10a08
AK		 1241 err = e1000_request_irq(adapter);
1242 if (err)
401a552b 1243 goto err_req_irq;
2db10a08 1244
79f05bf0
AK		 1245 e1000_power_up_phy(adapter);
1246
96838a40 1247 if ((err = e1000_up(adapter)))
1da177e4 1248 goto err_up;
2d7edb92 1249 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1250 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1251 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1252 e1000_update_mng_vlan(adapter);
1253 }
1da177e4 1254
b55ccb35
JK		 1255 /* If AMT is enabled, let the firmware know that the network
1256 * interface is now open */
1257 if (adapter->hw.mac_type == e1000_82573 &&
1258 e1000_check_mng_mode(&adapter->hw))
1259 e1000_get_hw_control(adapter);
1260
1da177e4
LT		 1261 return E1000_SUCCESS;
1262
1263err_up:
401a552b
VA		 1264 e1000_power_down_phy(adapter);
1265 e1000_free_irq(adapter);
1266err_req_irq:
581d708e 1267 e1000_free_all_rx_resources(adapter);
1da177e4 1268err_setup_rx:
581d708e 1269 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1270err_setup_tx:
1271 e1000_reset(adapter);
1272
1273 return err;
1274}
1275
1276/**
1277 * e1000_close - Disables a network interface
1278 * @netdev: network interface device structure
1279 *
1280 * Returns 0, this is not allowed to fail
1281 *
1282 * The close entry point is called when an interface is de-activated
1283 * by the OS. The hardware is still under the drivers control, but
1284 * needs to be disabled. A global MAC reset is issued to stop the
1285 * hardware, and all transmit and receive resources are freed.
1286 **/
1287
1288static int
1289e1000_close(struct net_device *netdev)
1290{
60490fe0 1291 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1292
2db10a08 1293 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1294 e1000_down(adapter);
79f05bf0 1295 e1000_power_down_phy(adapter);
2db10a08 1296 e1000_free_irq(adapter);
1da177e4 1297
581d708e
MC		 1298 e1000_free_all_tx_resources(adapter);
1299 e1000_free_all_rx_resources(adapter);
1da177e4 1300
96838a40 1301 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1302 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1303 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1304 }
b55ccb35
JK		 1305
1306 /* If AMT is enabled, let the firmware know that the network
1307 * interface is now closed */
1308 if (adapter->hw.mac_type == e1000_82573 &&
1309 e1000_check_mng_mode(&adapter->hw))
1310 e1000_release_hw_control(adapter);
1311
1da177e4
LT		 1312 return 0;
1313}
1314
1315/**
1316 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1317 * @adapter: address of board private structure
2d7edb92
MC		 1318 * @start: address of beginning of memory
1319 * @len: length of memory
1da177e4 1320 **/
e619d523 1321static boolean_t
1da177e4
LT		 1322e1000_check_64k_bound(struct e1000_adapter *adapter,
1323 void *start, unsigned long len)
1324{
1325 unsigned long begin = (unsigned long) start;
1326 unsigned long end = begin + len;
1327
2648345f
MC		 1328 /* First rev 82545 and 82546 need to not allow any memory
1329 * write location to cross 64k boundary due to errata 23 */
1da177e4 1330 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1331 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1332 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1333 }
1334
1335 return TRUE;
1336}
1337
1338/**
1339 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1340 * @adapter: board private structure
581d708e 1341 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1342 *
1343 * Return 0 on success, negative on failure
1344 **/
1345
3ad2cc67 1346static int
581d708e
MC		 1347e1000_setup_tx_resources(struct e1000_adapter *adapter,
1348 struct e1000_tx_ring *txdr)
1da177e4 1349{
1da177e4
LT		 1350 struct pci_dev *pdev = adapter->pdev;
1351 int size;
1352
1353 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1354 txdr->buffer_info = vmalloc(size);
96838a40 1355 if (!txdr->buffer_info) {
2648345f
MC		 1356 DPRINTK(PROBE, ERR,
1357 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1358 return -ENOMEM;
1359 }
1360 memset(txdr->buffer_info, 0, size);
1361
1362 /* round up to nearest 4K */
1363
1364 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1365 E1000_ROUNDUP(txdr->size, 4096);
1366
1367 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1368 if (!txdr->desc) {
1da177e4 1369setup_tx_desc_die:
1da177e4 1370 vfree(txdr->buffer_info);
2648345f
MC		 1371 DPRINTK(PROBE, ERR,
1372 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1373 return -ENOMEM;
1374 }
1375
2648345f 1376 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1377 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1378 void *olddesc = txdr->desc;
1379 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1380 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1381 "at %p\n", txdr->size, txdr->desc);
1382 /* Try again, without freeing the previous */
1da177e4 1383 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1384 /* Failed allocation, critical failure */
96838a40 1385 if (!txdr->desc) {
1da177e4
LT		 1386 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1387 goto setup_tx_desc_die;
1388 }
1389
1390 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1391 /* give up */
2648345f
MC		 1392 pci_free_consistent(pdev, txdr->size, txdr->desc,
1393 txdr->dma);
1da177e4
LT		 1394 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1395 DPRINTK(PROBE, ERR,
2648345f
MC		 1396 "Unable to allocate aligned memory "
1397 "for the transmit descriptor ring\n");
1da177e4
LT		 1398 vfree(txdr->buffer_info);
1399 return -ENOMEM;
1400 } else {
2648345f 1401 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1402 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1403 }
1404 }
1405 memset(txdr->desc, 0, txdr->size);
1406
1407 txdr->next_to_use = 0;
1408 txdr->next_to_clean = 0;
2ae76d98 1409 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1410
1411 return 0;
1412}
1413
581d708e
MC		 1414/**
1415 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1416 * (Descriptors) for all queues
1417 * @adapter: board private structure
1418 *
581d708e
MC		 1419 * Return 0 on success, negative on failure
1420 **/
1421
1422int
1423e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1424{
1425 int i, err = 0;
1426
f56799ea 1427 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1428 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1429 if (err) {
1430 DPRINTK(PROBE, ERR,
1431 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1432 for (i-- ; i >= 0; i--)
1433 e1000_free_tx_resources(adapter,
1434 &adapter->tx_ring[i]);
581d708e
MC		 1435 break;
1436 }
1437 }
1438
1439 return err;
1440}
1441
1da177e4
LT		 1442/**
1443 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1444 * @adapter: board private structure
1445 *
1446 * Configure the Tx unit of the MAC after a reset.
1447 **/
1448
1449static void
1450e1000_configure_tx(struct e1000_adapter *adapter)
1451{
581d708e
MC		 1452 uint64_t tdba;
1453 struct e1000_hw *hw = &adapter->hw;
1454 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1455 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1456
1457 /* Setup the HW Tx Head and Tail descriptor pointers */
1458
f56799ea 1459 switch (adapter->num_tx_queues) {
24025e4e
MC		 1460 case 1:
1461 default:
581d708e
MC		 1462 tdba = adapter->tx_ring[0].dma;
1463 tdlen = adapter->tx_ring[0].count *
1464 sizeof(struct e1000_tx_desc);
581d708e 1465 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1466 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1467 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1468 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1469 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1470 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1471 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1472 break;
1473 }
1da177e4
LT		 1474
1475 /* Set the default values for the Tx Inter Packet Gap timer */
1476
0fadb059
JK		 1477 if (hw->media_type == e1000_media_type_fiber ||
1478 hw->media_type == e1000_media_type_internal_serdes)
1479 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1480 else
1481 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1482
581d708e 1483 switch (hw->mac_type) {
1da177e4
LT		 1484 case e1000_82542_rev2_0:
1485 case e1000_82542_rev2_1:
1486 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1487 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1488 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1489 break;
87041639
JK		 1490 case e1000_80003es2lan:
1491 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1492 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1493 break;
1da177e4 1494 default:
0fadb059
JK		 1495 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1496 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1497 break;
1da177e4 1498 }
0fadb059
JK		 1499 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1500 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1501 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1502
1503 /* Set the Tx Interrupt Delay register */
1504
581d708e
MC		 1505 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1506 if (hw->mac_type >= e1000_82540)
1507 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1508
1509 /* Program the Transmit Control Register */
1510
581d708e 1511 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1512
1513 tctl &= ~E1000_TCTL_CT;
7e6c9861 1514 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1515 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1516
7e6c9861
JK		 1517#ifdef DISABLE_MULR
1518 /* disable Multiple Reads for debugging */
1519 tctl &= ~E1000_TCTL_MULR;
1520#endif
1da177e4 1521
2ae76d98
MC		 1522 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1523 tarc = E1000_READ_REG(hw, TARC0);
1524 tarc |= ((1 << 25) | (1 << 21));
1525 E1000_WRITE_REG(hw, TARC0, tarc);
1526 tarc = E1000_READ_REG(hw, TARC1);
1527 tarc |= (1 << 25);
1528 if (tctl & E1000_TCTL_MULR)
1529 tarc &= ~(1 << 28);
1530 else
1531 tarc |= (1 << 28);
1532 E1000_WRITE_REG(hw, TARC1, tarc);
87041639
JK		 1533 } else if (hw->mac_type == e1000_80003es2lan) {
1534 tarc = E1000_READ_REG(hw, TARC0);
1535 tarc |= 1;
87041639
JK		 1536 E1000_WRITE_REG(hw, TARC0, tarc);
1537 tarc = E1000_READ_REG(hw, TARC1);
1538 tarc |= 1;
1539 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1540 }
1541
581d708e 1542 e1000_config_collision_dist(hw);
1da177e4
LT		 1543
1544 /* Setup Transmit Descriptor Settings for eop descriptor */
1545 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1546 E1000_TXD_CMD_IFCS;
1547
581d708e 1548 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1549 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1550 else
1551 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1552
1553 /* Cache if we're 82544 running in PCI-X because we'll
1554 * need this to apply a workaround later in the send path. */
581d708e
MC		 1555 if (hw->mac_type == e1000_82544 &&
1556 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1557 adapter->pcix_82544 = 1;
7e6c9861
JK		 1558
1559 E1000_WRITE_REG(hw, TCTL, tctl);
1560
1da177e4
LT		 1561}
1562
1563/**
1564 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1565 * @adapter: board private structure
581d708e 1566 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1567 *
1568 * Returns 0 on success, negative on failure
1569 **/
1570
3ad2cc67 1571static int
581d708e
MC		 1572e1000_setup_rx_resources(struct e1000_adapter *adapter,
1573 struct e1000_rx_ring *rxdr)
1da177e4 1574{
1da177e4 1575 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1576 int size, desc_len;
1da177e4
LT		 1577
1578 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1579 rxdr->buffer_info = vmalloc(size);
581d708e 1580 if (!rxdr->buffer_info) {
2648345f
MC		 1581 DPRINTK(PROBE, ERR,
1582 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1583 return -ENOMEM;
1584 }
1585 memset(rxdr->buffer_info, 0, size);
1586
2d7edb92
MC		 1587 size = sizeof(struct e1000_ps_page) * rxdr->count;
1588 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1589 if (!rxdr->ps_page) {
2d7edb92
MC		 1590 vfree(rxdr->buffer_info);
1591 DPRINTK(PROBE, ERR,
1592 "Unable to allocate memory for the receive descriptor ring\n");
1593 return -ENOMEM;
1594 }
1595 memset(rxdr->ps_page, 0, size);
1596
1597 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1598 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1599 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1600 vfree(rxdr->buffer_info);
1601 kfree(rxdr->ps_page);
1602 DPRINTK(PROBE, ERR,
1603 "Unable to allocate memory for the receive descriptor ring\n");
1604 return -ENOMEM;
1605 }
1606 memset(rxdr->ps_page_dma, 0, size);
1607
96838a40 1608 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1609 desc_len = sizeof(struct e1000_rx_desc);
1610 else
1611 desc_len = sizeof(union e1000_rx_desc_packet_split);
1612
1da177e4
LT		 1613 /* Round up to nearest 4K */
1614
2d7edb92 1615 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1616 E1000_ROUNDUP(rxdr->size, 4096);
1617
1618 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1619
581d708e
MC		 1620 if (!rxdr->desc) {
1621 DPRINTK(PROBE, ERR,
1622 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1623setup_rx_desc_die:
1da177e4 1624 vfree(rxdr->buffer_info);
2d7edb92
MC		 1625 kfree(rxdr->ps_page);
1626 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1627 return -ENOMEM;
1628 }
1629
2648345f 1630 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1631 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1632 void *olddesc = rxdr->desc;
1633 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1634 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1635 "at %p\n", rxdr->size, rxdr->desc);
1636 /* Try again, without freeing the previous */
1da177e4 1637 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1638 /* Failed allocation, critical failure */
581d708e 1639 if (!rxdr->desc) {
1da177e4 1640 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1641 DPRINTK(PROBE, ERR,
1642 "Unable to allocate memory "
1643 "for the receive descriptor ring\n");
1da177e4
LT		 1644 goto setup_rx_desc_die;
1645 }
1646
1647 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1648 /* give up */
2648345f
MC		 1649 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1650 rxdr->dma);
1da177e4 1651 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1652 DPRINTK(PROBE, ERR,
1653 "Unable to allocate aligned memory "
1654 "for the receive descriptor ring\n");
581d708e 1655 goto setup_rx_desc_die;
1da177e4 1656 } else {
2648345f 1657 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1658 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1659 }
1660 }
1661 memset(rxdr->desc, 0, rxdr->size);
1662
1663 rxdr->next_to_clean = 0;
1664 rxdr->next_to_use = 0;
1665
1666 return 0;
1667}
1668
581d708e
MC		 1669/**
1670 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1671 * (Descriptors) for all queues
1672 * @adapter: board private structure
1673 *
581d708e
MC		 1674 * Return 0 on success, negative on failure
1675 **/
1676
1677int
1678e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1679{
1680 int i, err = 0;
1681
f56799ea 1682 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1683 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1684 if (err) {
1685 DPRINTK(PROBE, ERR,
1686 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1687 for (i-- ; i >= 0; i--)
1688 e1000_free_rx_resources(adapter,
1689 &adapter->rx_ring[i]);
581d708e
MC		 1690 break;
1691 }
1692 }
1693
1694 return err;
1695}
1696
1da177e4 1697/**
2648345f 1698 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1699 * @adapter: Board private structure
1700 **/
e4c811c9
MC		 1701#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1702 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1703static void
1704e1000_setup_rctl(struct e1000_adapter *adapter)
1705{
2d7edb92
MC		 1706 uint32_t rctl, rfctl;
1707 uint32_t psrctl = 0;
35ec56bb 1708#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1709 uint32_t pages = 0;
1710#endif
1da177e4
LT		 1711
1712 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1713
1714 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1715
1716 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1717 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1718 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1719
0fadb059 1720 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1721 rctl |= E1000_RCTL_SBP;
1722 else
1723 rctl &= ~E1000_RCTL_SBP;
1724
2d7edb92
MC		 1725 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1726 rctl &= ~E1000_RCTL_LPE;
1727 else
1728 rctl |= E1000_RCTL_LPE;
1729
1da177e4 1730 /* Setup buffer sizes */
9e2feace
AK		 1731 rctl &= ~E1000_RCTL_SZ_4096;
1732 rctl |= E1000_RCTL_BSEX;
1733 switch (adapter->rx_buffer_len) {
1734 case E1000_RXBUFFER_256:
1735 rctl |= E1000_RCTL_SZ_256;
1736 rctl &= ~E1000_RCTL_BSEX;
1737 break;
1738 case E1000_RXBUFFER_512:
1739 rctl |= E1000_RCTL_SZ_512;
1740 rctl &= ~E1000_RCTL_BSEX;
1741 break;
1742 case E1000_RXBUFFER_1024:
1743 rctl |= E1000_RCTL_SZ_1024;
1744 rctl &= ~E1000_RCTL_BSEX;
1745 break;
a1415ee6
JK		 1746 case E1000_RXBUFFER_2048:
1747 default:
1748 rctl |= E1000_RCTL_SZ_2048;
1749 rctl &= ~E1000_RCTL_BSEX;
1750 break;
1751 case E1000_RXBUFFER_4096:
1752 rctl |= E1000_RCTL_SZ_4096;
1753 break;
1754 case E1000_RXBUFFER_8192:
1755 rctl |= E1000_RCTL_SZ_8192;
1756 break;
1757 case E1000_RXBUFFER_16384:
1758 rctl |= E1000_RCTL_SZ_16384;
1759 break;
2d7edb92
MC		 1760 }
1761
35ec56bb 1762#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1763 /* 82571 and greater support packet-split where the protocol
1764 * header is placed in skb->data and the packet data is
1765 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1766 * In the case of a non-split, skb->data is linearly filled,
1767 * followed by the page buffers. Therefore, skb->data is
1768 * sized to hold the largest protocol header.
1769 */
e4c811c9
MC		 1770 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1771 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1772 PAGE_SIZE <= 16384)
1773 adapter->rx_ps_pages = pages;
1774 else
1775 adapter->rx_ps_pages = 0;
2d7edb92 1776#endif
e4c811c9 1777 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1778 /* Configure extra packet-split registers */
1779 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1780 rfctl |= E1000_RFCTL_EXTEN;
1781 /* disable IPv6 packet split support */
1782 rfctl |= E1000_RFCTL_IPV6_DIS;
1783 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1784
7dfee0cb 1785 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1786
2d7edb92
MC		 1787 psrctl |= adapter->rx_ps_bsize0 >>
1788 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1789
1790 switch (adapter->rx_ps_pages) {
1791 case 3:
1792 psrctl |= PAGE_SIZE <<
1793 E1000_PSRCTL_BSIZE3_SHIFT;
1794 case 2:
1795 psrctl |= PAGE_SIZE <<
1796 E1000_PSRCTL_BSIZE2_SHIFT;
1797 case 1:
1798 psrctl |= PAGE_SIZE >>
1799 E1000_PSRCTL_BSIZE1_SHIFT;
1800 break;
1801 }
2d7edb92
MC		 1802
1803 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1804 }
1805
1806 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1807}
1808
1809/**
1810 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1811 * @adapter: board private structure
1812 *
1813 * Configure the Rx unit of the MAC after a reset.
1814 **/
1815
1816static void
1817e1000_configure_rx(struct e1000_adapter *adapter)
1818{
581d708e
MC		 1819 uint64_t rdba;
1820 struct e1000_hw *hw = &adapter->hw;
1821 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1822
e4c811c9 1823 if (adapter->rx_ps_pages) {
0f15a8fa 1824 /* this is a 32 byte descriptor */
581d708e 1825 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1826 sizeof(union e1000_rx_desc_packet_split);
1827 adapter->clean_rx = e1000_clean_rx_irq_ps;
1828 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1829 } else {
581d708e
MC		 1830 rdlen = adapter->rx_ring[0].count *
1831 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1832 adapter->clean_rx = e1000_clean_rx_irq;
1833 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1834 }
1da177e4
LT		 1835
1836 /* disable receives while setting up the descriptors */
581d708e
MC		 1837 rctl = E1000_READ_REG(hw, RCTL);
1838 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1839
1840 /* set the Receive Delay Timer Register */
581d708e 1841 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1842
581d708e
MC		 1843 if (hw->mac_type >= e1000_82540) {
1844 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1845 if (adapter->itr > 1)
581d708e 1846 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1847 1000000000 / (adapter->itr * 256));
1848 }
1849
2ae76d98 1850 if (hw->mac_type >= e1000_82571) {
2ae76d98 1851 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1852 /* Reset delay timers after every interrupt */
6fc7a7ec 1853 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1854#ifdef CONFIG_E1000_NAPI
1855 /* Auto-Mask interrupts upon ICR read. */
1856 ctrl_ext |= E1000_CTRL_EXT_IAME;
1857#endif
2ae76d98 1858 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1859 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1860 E1000_WRITE_FLUSH(hw);
1861 }
1862
581d708e
MC		 1863 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1864 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1865 switch (adapter->num_rx_queues) {
24025e4e
MC		 1866 case 1:
1867 default:
581d708e 1868 rdba = adapter->rx_ring[0].dma;
581d708e 1869 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1870 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1871 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1872 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1873 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 1874 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1875 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1876 break;
24025e4e
MC		 1877 }
1878
1da177e4 1879 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1880 if (hw->mac_type >= e1000_82543) {
1881 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1882 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1883 rxcsum |= E1000_RXCSUM_TUOFL;
1884
868d5309 1885 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1886 * Must be used in conjunction with packet-split. */
96838a40
JB		 1887 if ((hw->mac_type >= e1000_82571) &&
1888 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1889 rxcsum |= E1000_RXCSUM_IPPCSE;
1890 }
1891 } else {
1892 rxcsum &= ~E1000_RXCSUM_TUOFL;
1893 /* don't need to clear IPPCSE as it defaults to 0 */
1894 }
581d708e 1895 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1896 }
1897
1898 /* Enable Receives */
581d708e 1899 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1900}
1901
1902/**
581d708e 1903 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1904 * @adapter: board private structure
581d708e 1905 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1906 *
1907 * Free all transmit software resources
1908 **/
1909
3ad2cc67 1910static void
581d708e
MC		 1911e1000_free_tx_resources(struct e1000_adapter *adapter,
1912 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1913{
1914 struct pci_dev *pdev = adapter->pdev;
1915
581d708e 1916 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1917
581d708e
MC		 1918 vfree(tx_ring->buffer_info);
1919 tx_ring->buffer_info = NULL;
1da177e4 1920
581d708e 1921 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1922
581d708e
MC		 1923 tx_ring->desc = NULL;
1924}
1925
1926/**
1927 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1928 * @adapter: board private structure
1929 *
1930 * Free all transmit software resources
1931 **/
1932
1933void
1934e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1935{
1936 int i;
1937
f56799ea 1938 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1939 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1940}
1941
e619d523 1942static void
1da177e4
LT		 1943e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1944 struct e1000_buffer *buffer_info)
1945{
96838a40 1946 if (buffer_info->dma) {
2648345f
MC		 1947 pci_unmap_page(adapter->pdev,
1948 buffer_info->dma,
1949 buffer_info->length,
1950 PCI_DMA_TODEVICE);
1da177e4 1951 }
8241e35e 1952 if (buffer_info->skb)
1da177e4 1953 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1954 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1955}
1956
1957/**
1958 * e1000_clean_tx_ring - Free Tx Buffers
1959 * @adapter: board private structure
581d708e 1960 * @tx_ring: ring to be cleaned
1da177e4
LT		 1961 **/
1962
1963static void
581d708e
MC		 1964e1000_clean_tx_ring(struct e1000_adapter *adapter,
1965 struct e1000_tx_ring *tx_ring)
1da177e4 1966{
1da177e4
LT		 1967 struct e1000_buffer *buffer_info;
1968 unsigned long size;
1969 unsigned int i;
1970
1971 /* Free all the Tx ring sk_buffs */
1972
96838a40 1973 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1974 buffer_info = &tx_ring->buffer_info[i];
1975 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1976 }
1977
1978 size = sizeof(struct e1000_buffer) * tx_ring->count;
1979 memset(tx_ring->buffer_info, 0, size);
1980
1981 /* Zero out the descriptor ring */
1982
1983 memset(tx_ring->desc, 0, tx_ring->size);
1984
1985 tx_ring->next_to_use = 0;
1986 tx_ring->next_to_clean = 0;
fd803241 1987 tx_ring->last_tx_tso = 0;
1da177e4 1988
581d708e
MC		 1989 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1990 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1991}
1992
1993/**
1994 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1995 * @adapter: board private structure
1996 **/
1997
1998static void
1999e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2000{
2001 int i;
2002
f56799ea 2003 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2004 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2005}
2006
2007/**
2008 * e1000_free_rx_resources - Free Rx Resources
2009 * @adapter: board private structure
581d708e 2010 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2011 *
2012 * Free all receive software resources
2013 **/
2014
3ad2cc67 2015static void
581d708e
MC		 2016e1000_free_rx_resources(struct e1000_adapter *adapter,
2017 struct e1000_rx_ring *rx_ring)
1da177e4 2018{
1da177e4
LT		 2019 struct pci_dev *pdev = adapter->pdev;
2020
581d708e 2021 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2022
2023 vfree(rx_ring->buffer_info);
2024 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2025 kfree(rx_ring->ps_page);
2026 rx_ring->ps_page = NULL;
2027 kfree(rx_ring->ps_page_dma);
2028 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2029
2030 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2031
2032 rx_ring->desc = NULL;
2033}
2034
2035/**
581d708e 2036 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2037 * @adapter: board private structure
581d708e
MC		 2038 *
2039 * Free all receive software resources
2040 **/
2041
2042void
2043e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2044{
2045 int i;
2046
f56799ea 2047 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2048 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2049}
2050
2051/**
2052 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2053 * @adapter: board private structure
2054 * @rx_ring: ring to free buffers from
1da177e4
LT		 2055 **/
2056
2057static void
581d708e
MC		 2058e1000_clean_rx_ring(struct e1000_adapter *adapter,
2059 struct e1000_rx_ring *rx_ring)
1da177e4 2060{
1da177e4 2061 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2062 struct e1000_ps_page *ps_page;
2063 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2064 struct pci_dev *pdev = adapter->pdev;
2065 unsigned long size;
2d7edb92 2066 unsigned int i, j;
1da177e4
LT		 2067
2068 /* Free all the Rx ring sk_buffs */
96838a40 2069 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2070 buffer_info = &rx_ring->buffer_info[i];
96838a40 2071 if (buffer_info->skb) {
1da177e4
LT		 2072 pci_unmap_single(pdev,
2073 buffer_info->dma,
2074 buffer_info->length,
2075 PCI_DMA_FROMDEVICE);
2076
2077 dev_kfree_skb(buffer_info->skb);
2078 buffer_info->skb = NULL;
997f5cbd
JK		 2079 }
2080 ps_page = &rx_ring->ps_page[i];
2081 ps_page_dma = &rx_ring->ps_page_dma[i];
2082 for (j = 0; j < adapter->rx_ps_pages; j++) {
2083 if (!ps_page->ps_page[j]) break;
2084 pci_unmap_page(pdev,
2085 ps_page_dma->ps_page_dma[j],
2086 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2087 ps_page_dma->ps_page_dma[j] = 0;
2088 put_page(ps_page->ps_page[j]);
2089 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2090 }
2091 }
2092
2093 size = sizeof(struct e1000_buffer) * rx_ring->count;
2094 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2095 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2096 memset(rx_ring->ps_page, 0, size);
2097 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2098 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2099
2100 /* Zero out the descriptor ring */
2101
2102 memset(rx_ring->desc, 0, rx_ring->size);
2103
2104 rx_ring->next_to_clean = 0;
2105 rx_ring->next_to_use = 0;
2106
581d708e
MC		 2107 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2108 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2109}
2110
2111/**
2112 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2113 * @adapter: board private structure
2114 **/
2115
2116static void
2117e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2118{
2119 int i;
2120
f56799ea 2121 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2122 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2123}
2124
2125/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2126 * and memory write and invalidate disabled for certain operations
2127 */
2128static void
2129e1000_enter_82542_rst(struct e1000_adapter *adapter)
2130{
2131 struct net_device *netdev = adapter->netdev;
2132 uint32_t rctl;
2133
2134 e1000_pci_clear_mwi(&adapter->hw);
2135
2136 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2137 rctl |= E1000_RCTL_RST;
2138 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2139 E1000_WRITE_FLUSH(&adapter->hw);
2140 mdelay(5);
2141
96838a40 2142 if (netif_running(netdev))
581d708e 2143 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2144}
2145
2146static void
2147e1000_leave_82542_rst(struct e1000_adapter *adapter)
2148{
2149 struct net_device *netdev = adapter->netdev;
2150 uint32_t rctl;
2151
2152 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2153 rctl &= ~E1000_RCTL_RST;
2154 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2155 E1000_WRITE_FLUSH(&adapter->hw);
2156 mdelay(5);
2157
96838a40 2158 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2159 e1000_pci_set_mwi(&adapter->hw);
2160
96838a40 2161 if (netif_running(netdev)) {
72d64a43
JK		 2162 /* No need to loop, because 82542 supports only 1 queue */
2163 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2164 e1000_configure_rx(adapter);
72d64a43 2165 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2166 }
2167}
2168
2169/**
2170 * e1000_set_mac - Change the Ethernet Address of the NIC
2171 * @netdev: network interface device structure
2172 * @p: pointer to an address structure
2173 *
2174 * Returns 0 on success, negative on failure
2175 **/
2176
2177static int
2178e1000_set_mac(struct net_device *netdev, void *p)
2179{
60490fe0 2180 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2181 struct sockaddr *addr = p;
2182
96838a40 2183 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2184 return -EADDRNOTAVAIL;
2185
2186 /* 82542 2.0 needs to be in reset to write receive address registers */
2187
96838a40 2188 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2189 e1000_enter_82542_rst(adapter);
2190
2191 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2192 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2193
2194 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2195
868d5309
MC		 2196 /* With 82571 controllers, LAA may be overwritten (with the default)
2197 * due to controller reset from the other port. */
2198 if (adapter->hw.mac_type == e1000_82571) {
2199 /* activate the work around */
2200 adapter->hw.laa_is_present = 1;
2201
96838a40
JB		 2202 /* Hold a copy of the LAA in RAR[14] This is done so that
2203 * between the time RAR[0] gets clobbered and the time it
2204 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2205 * of the RARs and no incoming packets directed to this port
96838a40 2206 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2207 * RAR[14] */
96838a40 2208 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2209 E1000_RAR_ENTRIES - 1);
2210 }
2211
96838a40 2212 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2213 e1000_leave_82542_rst(adapter);
2214
2215 return 0;
2216}
2217
2218/**
2219 * e1000_set_multi - Multicast and Promiscuous mode set
2220 * @netdev: network interface device structure
2221 *
2222 * The set_multi entry point is called whenever the multicast address
2223 * list or the network interface flags are updated. This routine is
2224 * responsible for configuring the hardware for proper multicast,
2225 * promiscuous mode, and all-multi behavior.
2226 **/
2227
2228static void
2229e1000_set_multi(struct net_device *netdev)
2230{
60490fe0 2231 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2232 struct e1000_hw *hw = &adapter->hw;
2233 struct dev_mc_list *mc_ptr;
2234 uint32_t rctl;
2235 uint32_t hash_value;
868d5309 2236 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2237 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2238 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2239 E1000_NUM_MTA_REGISTERS;
2240
2241 if (adapter->hw.mac_type == e1000_ich8lan)
2242 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2243
868d5309
MC		 2244 /* reserve RAR[14] for LAA over-write work-around */
2245 if (adapter->hw.mac_type == e1000_82571)
2246 rar_entries--;
1da177e4 2247
2648345f
MC		 2248 /* Check for Promiscuous and All Multicast modes */
2249
1da177e4
LT		 2250 rctl = E1000_READ_REG(hw, RCTL);
2251
96838a40 2252 if (netdev->flags & IFF_PROMISC) {
1da177e4 2253 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2254 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2255 rctl |= E1000_RCTL_MPE;
2256 rctl &= ~E1000_RCTL_UPE;
2257 } else {
2258 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2259 }
2260
2261 E1000_WRITE_REG(hw, RCTL, rctl);
2262
2263 /* 82542 2.0 needs to be in reset to write receive address registers */
2264
96838a40 2265 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2266 e1000_enter_82542_rst(adapter);
2267
2268 /* load the first 14 multicast address into the exact filters 1-14
2269 * RAR 0 is used for the station MAC adddress
2270 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2271 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2272 */
2273 mc_ptr = netdev->mc_list;
2274
96838a40 2275 for (i = 1; i < rar_entries; i++) {
868d5309 2276 if (mc_ptr) {
1da177e4
LT		 2277 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2278 mc_ptr = mc_ptr->next;
2279 } else {
2280 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2281 E1000_WRITE_FLUSH(hw);
1da177e4 2282 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2283 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2284 }
2285 }
2286
2287 /* clear the old settings from the multicast hash table */
2288
cd94dd0b 2289 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2290 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2291 E1000_WRITE_FLUSH(hw);
2292 }
1da177e4
LT		 2293
2294 /* load any remaining addresses into the hash table */
2295
96838a40 2296 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2297 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2298 e1000_mta_set(hw, hash_value);
2299 }
2300
96838a40 2301 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2302 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2303}
2304
2305/* Need to wait a few seconds after link up to get diagnostic information from
2306 * the phy */
2307
2308static void
2309e1000_update_phy_info(unsigned long data)
2310{
2311 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2312 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2313}
2314
2315/**
2316 * e1000_82547_tx_fifo_stall - Timer Call-back
2317 * @data: pointer to adapter cast into an unsigned long
2318 **/
2319
2320static void
2321e1000_82547_tx_fifo_stall(unsigned long data)
2322{
2323 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2324 struct net_device *netdev = adapter->netdev;
2325 uint32_t tctl;
2326
96838a40
JB		 2327 if (atomic_read(&adapter->tx_fifo_stall)) {
2328 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2329 E1000_READ_REG(&adapter->hw, TDH)) &&
2330 (E1000_READ_REG(&adapter->hw, TDFT) ==
2331 E1000_READ_REG(&adapter->hw, TDFH)) &&
2332 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2333 E1000_READ_REG(&adapter->hw, TDFHS))) {
2334 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2335 E1000_WRITE_REG(&adapter->hw, TCTL,
2336 tctl & ~E1000_TCTL_EN);
2337 E1000_WRITE_REG(&adapter->hw, TDFT,
2338 adapter->tx_head_addr);
2339 E1000_WRITE_REG(&adapter->hw, TDFH,
2340 adapter->tx_head_addr);
2341 E1000_WRITE_REG(&adapter->hw, TDFTS,
2342 adapter->tx_head_addr);
2343 E1000_WRITE_REG(&adapter->hw, TDFHS,
2344 adapter->tx_head_addr);
2345 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2346 E1000_WRITE_FLUSH(&adapter->hw);
2347
2348 adapter->tx_fifo_head = 0;
2349 atomic_set(&adapter->tx_fifo_stall, 0);
2350 netif_wake_queue(netdev);
2351 } else {
2352 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2353 }
2354 }
2355}
2356
2357/**
2358 * e1000_watchdog - Timer Call-back
2359 * @data: pointer to adapter cast into an unsigned long
2360 **/
2361static void
2362e1000_watchdog(unsigned long data)
2363{
2364 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2365 struct net_device *netdev = adapter->netdev;
545c67c0 2366 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2367 uint32_t link, tctl;
cd94dd0b
AK		 2368 int32_t ret_val;
2369
2370 ret_val = e1000_check_for_link(&adapter->hw);
2371 if ((ret_val == E1000_ERR_PHY) &&
2372 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2373 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2374 /* See e1000_kumeran_lock_loss_workaround() */
2375 DPRINTK(LINK, INFO,
2376 "Gigabit has been disabled, downgrading speed\n");
2377 }
2d7edb92
MC		 2378 if (adapter->hw.mac_type == e1000_82573) {
2379 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2380 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2381 e1000_update_mng_vlan(adapter);
96838a40 2382 }
1da177e4 2383
96838a40 2384 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2385 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2386 link = !adapter->hw.serdes_link_down;
2387 else
2388 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2389
96838a40
JB		 2390 if (link) {
2391 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2392 boolean_t txb2b = 1;
1da177e4
LT		 2393 e1000_get_speed_and_duplex(&adapter->hw,
2394 &adapter->link_speed,
2395 &adapter->link_duplex);
2396
2397 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2398 adapter->link_speed,
2399 adapter->link_duplex == FULL_DUPLEX ?
2400 "Full Duplex" : "Half Duplex");
2401
7e6c9861
JK		 2402 /* tweak tx_queue_len according to speed/duplex
2403 * and adjust the timeout factor */
66a2b0a3
JK		 2404 netdev->tx_queue_len = adapter->tx_queue_len;
2405 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2406 switch (adapter->link_speed) {
2407 case SPEED_10:
fe7fe28e 2408 txb2b = 0;
7e6c9861
JK		 2409 netdev->tx_queue_len = 10;
2410 adapter->tx_timeout_factor = 8;
2411 break;
2412 case SPEED_100:
fe7fe28e 2413 txb2b = 0;
7e6c9861
JK		 2414 netdev->tx_queue_len = 100;
2415 /* maybe add some timeout factor ? */
2416 break;
2417 }
2418
fe7fe28e 2419 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2420 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2421 txb2b == 0) {
7e6c9861
JK		 2422#define SPEED_MODE_BIT (1 << 21)
2423 uint32_t tarc0;
2424 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2425 tarc0 &= ~SPEED_MODE_BIT;
2426 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2427 }
2428
2429#ifdef NETIF_F_TSO
2430 /* disable TSO for pcie and 10/100 speeds, to avoid
2431 * some hardware issues */
2432 if (!adapter->tso_force &&
2433 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2434 switch (adapter->link_speed) {
2435 case SPEED_10:
66a2b0a3 2436 case SPEED_100:
7e6c9861
JK		 2437 DPRINTK(PROBE,INFO,
2438 "10/100 speed: disabling TSO\n");
2439 netdev->features &= ~NETIF_F_TSO;
2440 break;
2441 case SPEED_1000:
2442 netdev->features |= NETIF_F_TSO;
2443 break;
2444 default:
2445 /* oops */
66a2b0a3
JK		 2446 break;
2447 }
2448 }
7e6c9861
JK		 2449#endif
2450
2451 /* enable transmits in the hardware, need to do this
2452 * after setting TARC0 */
2453 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2454 tctl |= E1000_TCTL_EN;
2455 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2456
1da177e4
LT		 2457 netif_carrier_on(netdev);
2458 netif_wake_queue(netdev);
2459 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2460 adapter->smartspeed = 0;
2461 }
2462 } else {
96838a40 2463 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2464 adapter->link_speed = 0;
2465 adapter->link_duplex = 0;
2466 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2467 netif_carrier_off(netdev);
2468 netif_stop_queue(netdev);
2469 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2470
2471 /* 80003ES2LAN workaround--
2472 * For packet buffer work-around on link down event;
2473 * disable receives in the ISR and
2474 * reset device here in the watchdog
2475 */
8fc897b0 2476 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2477 /* reset device */
2478 schedule_work(&adapter->reset_task);
1da177e4
LT		 2479 }
2480
2481 e1000_smartspeed(adapter);
2482 }
2483
2484 e1000_update_stats(adapter);
2485
2486 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2487 adapter->tpt_old = adapter->stats.tpt;
2488 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2489 adapter->colc_old = adapter->stats.colc;
2490
2491 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2492 adapter->gorcl_old = adapter->stats.gorcl;
2493 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2494 adapter->gotcl_old = adapter->stats.gotcl;
2495
2496 e1000_update_adaptive(&adapter->hw);
2497
f56799ea 2498 if (!netif_carrier_ok(netdev)) {
581d708e 2499 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2500 /* We've lost link, so the controller stops DMA,
2501 * but we've got queued Tx work that's never going
2502 * to get done, so reset controller to flush Tx.
2503 * (Do the reset outside of interrupt context). */
87041639
JK		 2504 adapter->tx_timeout_count++;
2505 schedule_work(&adapter->reset_task);
1da177e4
LT		 2506 }
2507 }
2508
2509 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2510 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2511 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2512 * asymmetrical Tx or Rx gets ITR=8000; everyone
2513 * else is between 2000-8000. */
2514 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2515 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2516 adapter->gotcl - adapter->gorcl :
2517 adapter->gorcl - adapter->gotcl) / 10000;
2518 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2519 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2520 }
2521
2522 /* Cause software interrupt to ensure rx ring is cleaned */
2523 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2524
2648345f 2525 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2526 adapter->detect_tx_hung = TRUE;
2527
96838a40 2528 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2529 * reset from the other port. Set the appropriate LAA in RAR[0] */
2530 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2531 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2532
1da177e4
LT		 2533 /* Reset the timer */
2534 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2535}
2536
2537#define E1000_TX_FLAGS_CSUM 0x00000001
2538#define E1000_TX_FLAGS_VLAN 0x00000002
2539#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2540#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2541#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2542#define E1000_TX_FLAGS_VLAN_SHIFT 16
2543
e619d523 2544static int
581d708e
MC		 2545e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2546 struct sk_buff *skb)
1da177e4
LT		 2547{
2548#ifdef NETIF_F_TSO
2549 struct e1000_context_desc *context_desc;
545c67c0 2550 struct e1000_buffer *buffer_info;
1da177e4
LT		 2551 unsigned int i;
2552 uint32_t cmd_length = 0;
2d7edb92 2553 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2554 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2555 int err;
2556
89114afd 2557 if (skb_is_gso(skb)) {
1da177e4
LT		 2558 if (skb_header_cloned(skb)) {
2559 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2560 if (err)
2561 return err;
2562 }
2563
2564 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 2565 mss = skb_shinfo(skb)->gso_size;
60828236 2566 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2567 skb->nh.iph->tot_len = 0;
2568 skb->nh.iph->check = 0;
2569 skb->h.th->check =
2570 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2571 skb->nh.iph->daddr,
2572 0,
2573 IPPROTO_TCP,
2574 0);
2575 cmd_length = E1000_TXD_CMD_IP;
2576 ipcse = skb->h.raw - skb->data - 1;
2577#ifdef NETIF_F_TSO_IPV6
e15fdd03 2578 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2d7edb92
MC		 2579 skb->nh.ipv6h->payload_len = 0;
2580 skb->h.th->check =
2581 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2582 &skb->nh.ipv6h->daddr,
2583 0,
2584 IPPROTO_TCP,
2585 0);
2586 ipcse = 0;
2587#endif
2588 }
1da177e4
LT		 2589 ipcss = skb->nh.raw - skb->data;
2590 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2591 tucss = skb->h.raw - skb->data;
2592 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2593 tucse = 0;
2594
2595 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2596 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2597
581d708e
MC		 2598 i = tx_ring->next_to_use;
2599 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2600 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2601
2602 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2603 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2604 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2605 context_desc->upper_setup.tcp_fields.tucss = tucss;
2606 context_desc->upper_setup.tcp_fields.tucso = tucso;
2607 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2608 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2609 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2610 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2611
545c67c0
JK		 2612 buffer_info->time_stamp = jiffies;
2613
581d708e
MC		 2614 if (++i == tx_ring->count) i = 0;
2615 tx_ring->next_to_use = i;
1da177e4 2616
8241e35e 2617 return TRUE;
1da177e4
LT		 2618 }
2619#endif
2620
8241e35e 2621 return FALSE;
1da177e4
LT		 2622}
2623
e619d523 2624static boolean_t
581d708e
MC		 2625e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2626 struct sk_buff *skb)
1da177e4
LT		 2627{
2628 struct e1000_context_desc *context_desc;
545c67c0 2629 struct e1000_buffer *buffer_info;
1da177e4
LT		 2630 unsigned int i;
2631 uint8_t css;
2632
84fa7933 2633 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1da177e4
LT		 2634 css = skb->h.raw - skb->data;
2635
581d708e 2636 i = tx_ring->next_to_use;
545c67c0 2637 buffer_info = &tx_ring->buffer_info[i];
581d708e 2638 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2639
2640 context_desc->upper_setup.tcp_fields.tucss = css;
2641 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2642 context_desc->upper_setup.tcp_fields.tucse = 0;
2643 context_desc->tcp_seg_setup.data = 0;
2644 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2645
545c67c0
JK		 2646 buffer_info->time_stamp = jiffies;
2647
581d708e
MC		 2648 if (unlikely(++i == tx_ring->count)) i = 0;
2649 tx_ring->next_to_use = i;
1da177e4
LT		 2650
2651 return TRUE;
2652 }
2653
2654 return FALSE;
2655}
2656
2657#define E1000_MAX_TXD_PWR 12
2658#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2659
e619d523 2660static int
581d708e
MC		 2661e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2662 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2663 unsigned int nr_frags, unsigned int mss)
1da177e4 2664{
1da177e4
LT		 2665 struct e1000_buffer *buffer_info;
2666 unsigned int len = skb->len;
2667 unsigned int offset = 0, size, count = 0, i;
2668 unsigned int f;
2669 len -= skb->data_len;
2670
2671 i = tx_ring->next_to_use;
2672
96838a40 2673 while (len) {
1da177e4
LT		 2674 buffer_info = &tx_ring->buffer_info[i];
2675 size = min(len, max_per_txd);
2676#ifdef NETIF_F_TSO
fd803241
JK		 2677 /* Workaround for Controller erratum --
2678 * descriptor for non-tso packet in a linear SKB that follows a
2679 * tso gets written back prematurely before the data is fully
0f15a8fa 2680 * DMA'd to the controller */
fd803241 2681 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2682 !skb_is_gso(skb)) {
fd803241
JK		 2683 tx_ring->last_tx_tso = 0;
2684 size -= 4;
2685 }
2686
1da177e4
LT		 2687 /* Workaround for premature desc write-backs
2688 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2689 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2690 size -= 4;
2691#endif
97338bde
MC		 2692 /* work-around for errata 10 and it applies
2693 * to all controllers in PCI-X mode
2694 * The fix is to make sure that the first descriptor of a
2695 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2696 */
96838a40 2697 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2698 (size > 2015) && count == 0))
2699 size = 2015;
96838a40 2700
1da177e4
LT		 2701 /* Workaround for potential 82544 hang in PCI-X. Avoid
2702 * terminating buffers within evenly-aligned dwords. */
96838a40 2703 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2704 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2705 size > 4))
2706 size -= 4;
2707
2708 buffer_info->length = size;
2709 buffer_info->dma =
2710 pci_map_single(adapter->pdev,
2711 skb->data + offset,
2712 size,
2713 PCI_DMA_TODEVICE);
2714 buffer_info->time_stamp = jiffies;
2715
2716 len -= size;
2717 offset += size;
2718 count++;
96838a40 2719 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2720 }
2721
96838a40 2722 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2723 struct skb_frag_struct *frag;
2724
2725 frag = &skb_shinfo(skb)->frags[f];
2726 len = frag->size;
2727 offset = frag->page_offset;
2728
96838a40 2729 while (len) {
1da177e4
LT		 2730 buffer_info = &tx_ring->buffer_info[i];
2731 size = min(len, max_per_txd);
2732#ifdef NETIF_F_TSO
2733 /* Workaround for premature desc write-backs
2734 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2735 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2736 size -= 4;
2737#endif
2738 /* Workaround for potential 82544 hang in PCI-X.
2739 * Avoid terminating buffers within evenly-aligned
2740 * dwords. */
96838a40 2741 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2742 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2743 size > 4))
2744 size -= 4;
2745
2746 buffer_info->length = size;
2747 buffer_info->dma =
2748 pci_map_page(adapter->pdev,
2749 frag->page,
2750 offset,
2751 size,
2752 PCI_DMA_TODEVICE);
2753 buffer_info->time_stamp = jiffies;
2754
2755 len -= size;
2756 offset += size;
2757 count++;
96838a40 2758 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2759 }
2760 }
2761
2762 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2763 tx_ring->buffer_info[i].skb = skb;
2764 tx_ring->buffer_info[first].next_to_watch = i;
2765
2766 return count;
2767}
2768
e619d523 2769static void
581d708e
MC		 2770e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2771 int tx_flags, int count)
1da177e4 2772{
1da177e4
LT		 2773 struct e1000_tx_desc *tx_desc = NULL;
2774 struct e1000_buffer *buffer_info;
2775 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2776 unsigned int i;
2777
96838a40 2778 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2779 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2780 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2781 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2782
96838a40 2783 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2784 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2785 }
2786
96838a40 2787 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2788 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2789 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2790 }
2791
96838a40 2792 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2793 txd_lower |= E1000_TXD_CMD_VLE;
2794 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2795 }
2796
2797 i = tx_ring->next_to_use;
2798
96838a40 2799 while (count--) {
1da177e4
LT		 2800 buffer_info = &tx_ring->buffer_info[i];
2801 tx_desc = E1000_TX_DESC(*tx_ring, i);
2802 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2803 tx_desc->lower.data =
2804 cpu_to_le32(txd_lower | buffer_info->length);
2805 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2806 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2807 }
2808
2809 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2810
2811 /* Force memory writes to complete before letting h/w
2812 * know there are new descriptors to fetch. (Only
2813 * applicable for weak-ordered memory model archs,
2814 * such as IA-64). */
2815 wmb();
2816
2817 tx_ring->next_to_use = i;
581d708e 2818 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2819}
2820
2821/**
2822 * 82547 workaround to avoid controller hang in half-duplex environment.
2823 * The workaround is to avoid queuing a large packet that would span
2824 * the internal Tx FIFO ring boundary by notifying the stack to resend
2825 * the packet at a later time. This gives the Tx FIFO an opportunity to
2826 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2827 * to the beginning of the Tx FIFO.
2828 **/
2829
2830#define E1000_FIFO_HDR 0x10
2831#define E1000_82547_PAD_LEN 0x3E0
2832
e619d523 2833static int
1da177e4
LT		 2834e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2835{
2836 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2837 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2838
2839 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2840
96838a40 2841 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2842 goto no_fifo_stall_required;
2843
96838a40 2844 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2845 return 1;
2846
96838a40 2847 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2848 atomic_set(&adapter->tx_fifo_stall, 1);
2849 return 1;
2850 }
2851
2852no_fifo_stall_required:
2853 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2854 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2855 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2856 return 0;
2857}
2858
2d7edb92 2859#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2860static int
2d7edb92
MC		 2861e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2862{
2863 struct e1000_hw *hw = &adapter->hw;
2864 uint16_t length, offset;
96838a40
JB		 2865 if (vlan_tx_tag_present(skb)) {
2866 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2867 ( adapter->hw.mng_cookie.status &
2868 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2869 return 0;
2870 }
20a44028 2871 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2872 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2873 if ((htons(ETH_P_IP) == eth->h_proto)) {
2874 const struct iphdr *ip =
2d7edb92 2875 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2876 if (IPPROTO_UDP == ip->protocol) {
2877 struct udphdr *udp =
2878 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2879 (ip->ihl << 2));
96838a40 2880 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2881 offset = (uint8_t *)udp + 8 - skb->data;
2882 length = skb->len - offset;
2883
2884 return e1000_mng_write_dhcp_info(hw,
96838a40 2885 (uint8_t *)udp + 8,
2d7edb92
MC		 2886 length);
2887 }
2888 }
2889 }
2890 }
2891 return 0;
2892}
2893
1da177e4
LT		 2894#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2895static int
2896e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2897{
60490fe0 2898 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2899 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2900 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2901 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2902 unsigned int tx_flags = 0;
2903 unsigned int len = skb->len;
2904 unsigned long flags;
2905 unsigned int nr_frags = 0;
2906 unsigned int mss = 0;
2907 int count = 0;
76c224bc 2908 int tso;
1da177e4
LT		 2909 unsigned int f;
2910 len -= skb->data_len;
2911
581d708e 2912 tx_ring = adapter->tx_ring;
24025e4e 2913
581d708e 2914 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2915 dev_kfree_skb_any(skb);
2916 return NETDEV_TX_OK;
2917 }
2918
2919#ifdef NETIF_F_TSO
7967168c 2920 mss = skb_shinfo(skb)->gso_size;
76c224bc 2921 /* The controller does a simple calculation to
1da177e4
LT		 2922 * make sure there is enough room in the FIFO before
2923 * initiating the DMA for each buffer. The calc is:
2924 * 4 = ceil(buffer len/mss). To make sure we don't
2925 * overrun the FIFO, adjust the max buffer len if mss
2926 * drops. */
96838a40 2927 if (mss) {
9a3056da 2928 uint8_t hdr_len;
1da177e4
LT		 2929 max_per_txd = min(mss << 2, max_per_txd);
2930 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2931
9f687888 2932 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2933 * points to just header, pull a few bytes of payload from
2934 * frags into skb->data */
2935 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2936 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2937 switch (adapter->hw.mac_type) {
2938 unsigned int pull_size;
2939 case e1000_82571:
2940 case e1000_82572:
2941 case e1000_82573:
cd94dd0b 2942 case e1000_ich8lan:
9f687888
JK		 2943 pull_size = min((unsigned int)4, skb->data_len);
2944 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2945 DPRINTK(DRV, ERR,
9f687888
JK		 2946 "__pskb_pull_tail failed.\n");
2947 dev_kfree_skb_any(skb);
749dfc70 2948 return NETDEV_TX_OK;
9f687888
JK		 2949 }
2950 len = skb->len - skb->data_len;
2951 break;
2952 default:
2953 /* do nothing */
2954 break;
d74bbd3b 2955 }
9a3056da 2956 }
1da177e4
LT		 2957 }
2958
9a3056da 2959 /* reserve a descriptor for the offload context */
84fa7933 2960 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 2961 count++;
2648345f 2962 count++;
1da177e4 2963#else
84fa7933 2964 if (skb->ip_summed == CHECKSUM_PARTIAL)
1da177e4
LT		 2965 count++;
2966#endif
fd803241
JK		 2967
2968#ifdef NETIF_F_TSO
2969 /* Controller Erratum workaround */
89114afd 2970 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241
JK		 2971 count++;
2972#endif
2973
1da177e4
LT		 2974 count += TXD_USE_COUNT(len, max_txd_pwr);
2975
96838a40 2976 if (adapter->pcix_82544)
1da177e4
LT		 2977 count++;
2978
96838a40 2979 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2980 * in PCI-X mode, so add one more descriptor to the count
2981 */
96838a40 2982 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2983 (len > 2015)))
2984 count++;
2985
1da177e4 2986 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2987 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2988 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2989 max_txd_pwr);
96838a40 2990 if (adapter->pcix_82544)
1da177e4
LT		 2991 count += nr_frags;
2992
0f15a8fa
JK		 2993
2994 if (adapter->hw.tx_pkt_filtering &&
2995 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 2996 e1000_transfer_dhcp_info(adapter, skb);
2997
581d708e
MC		 2998 local_irq_save(flags);
2999 if (!spin_trylock(&tx_ring->tx_lock)) {
3000 /* Collision - tell upper layer to requeue */
3001 local_irq_restore(flags);
3002 return NETDEV_TX_LOCKED;
3003 }
1da177e4
LT		 3004
3005 /* need: count + 2 desc gap to keep tail from touching
3006 * head, otherwise try next time */
581d708e 3007 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 3008 netif_stop_queue(netdev);
581d708e 3009 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3010 return NETDEV_TX_BUSY;
3011 }
3012
96838a40
JB		 3013 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3014 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 3015 netif_stop_queue(netdev);
3016 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 3017 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3018 return NETDEV_TX_BUSY;
3019 }
3020 }
3021
96838a40 3022 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3023 tx_flags |= E1000_TX_FLAGS_VLAN;
3024 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3025 }
3026
581d708e 3027 first = tx_ring->next_to_use;
96838a40 3028
581d708e 3029 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3030 if (tso < 0) {
3031 dev_kfree_skb_any(skb);
581d708e 3032 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3033 return NETDEV_TX_OK;
3034 }
3035
fd803241
JK		 3036 if (likely(tso)) {
3037 tx_ring->last_tx_tso = 1;
1da177e4 3038 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3039 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3040 tx_flags |= E1000_TX_FLAGS_CSUM;
3041
2d7edb92 3042 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3043 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3044 * no longer assume, we must. */
60828236 3045 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3046 tx_flags |= E1000_TX_FLAGS_IPV4;
3047
581d708e
MC		 3048 e1000_tx_queue(adapter, tx_ring, tx_flags,
3049 e1000_tx_map(adapter, tx_ring, skb, first,
3050 max_per_txd, nr_frags, mss));
1da177e4
LT		 3051
3052 netdev->trans_start = jiffies;
3053
3054 /* Make sure there is space in the ring for the next send. */
581d708e 3055 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 3056 netif_stop_queue(netdev);
3057
581d708e 3058 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3059 return NETDEV_TX_OK;
3060}
3061
3062/**
3063 * e1000_tx_timeout - Respond to a Tx Hang
3064 * @netdev: network interface device structure
3065 **/
3066
3067static void
3068e1000_tx_timeout(struct net_device *netdev)
3069{
60490fe0 3070 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3071
3072 /* Do the reset outside of interrupt context */
87041639
JK		 3073 adapter->tx_timeout_count++;
3074 schedule_work(&adapter->reset_task);
1da177e4
LT		 3075}
3076
3077static void
87041639 3078e1000_reset_task(struct net_device *netdev)
1da177e4 3079{
60490fe0 3080 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3081
2db10a08 3082 e1000_reinit_locked(adapter);
1da177e4
LT		 3083}
3084
3085/**
3086 * e1000_get_stats - Get System Network Statistics
3087 * @netdev: network interface device structure
3088 *
3089 * Returns the address of the device statistics structure.
3090 * The statistics are actually updated from the timer callback.
3091 **/
3092
3093static struct net_device_stats *
3094e1000_get_stats(struct net_device *netdev)
3095{
60490fe0 3096 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3097
6b7660cd 3098 /* only return the current stats */
1da177e4
LT		 3099 return &adapter->net_stats;
3100}
3101
3102/**
3103 * e1000_change_mtu - Change the Maximum Transfer Unit
3104 * @netdev: network interface device structure
3105 * @new_mtu: new value for maximum frame size
3106 *
3107 * Returns 0 on success, negative on failure
3108 **/
3109
3110static int
3111e1000_change_mtu(struct net_device *netdev, int new_mtu)
3112{
60490fe0 3113 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3114 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3115 uint16_t eeprom_data = 0;
1da177e4 3116
96838a40
JB		 3117 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3118 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3119 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3120 return -EINVAL;
2d7edb92 3121 }
1da177e4 3122
997f5cbd
JK		 3123 /* Adapter-specific max frame size limits. */
3124 switch (adapter->hw.mac_type) {
9e2feace 3125 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3126 case e1000_ich8lan:
997f5cbd
JK		 3127 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3128 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3129 return -EINVAL;
2d7edb92 3130 }
997f5cbd 3131 break;
85b22eb6
JK		 3132 case e1000_82573:
3133 /* only enable jumbo frames if ASPM is disabled completely
3134 * this means both bits must be zero in 0x1A bits 3:2 */
3135 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3136 &eeprom_data);
3137 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3138 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3139 DPRINTK(PROBE, ERR,
3140 "Jumbo Frames not supported.\n");
3141 return -EINVAL;
3142 }
3143 break;
3144 }
3145 /* fall through to get support */
997f5cbd
JK		 3146 case e1000_82571:
3147 case e1000_82572:
87041639 3148 case e1000_80003es2lan:
997f5cbd
JK		 3149#define MAX_STD_JUMBO_FRAME_SIZE 9234
3150 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3151 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3152 return -EINVAL;
3153 }
3154 break;
3155 default:
3156 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3157 break;
1da177e4
LT		 3158 }
3159
87f5032e 3160 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3161 * means we reserve 2 more, this pushes us to allocate from the next
3162 * larger slab size
3163 * i.e. RXBUFFER_2048 --> size-4096 slab */
3164
3165 if (max_frame <= E1000_RXBUFFER_256)
3166 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3167 else if (max_frame <= E1000_RXBUFFER_512)
3168 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3169 else if (max_frame <= E1000_RXBUFFER_1024)
3170 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3171 else if (max_frame <= E1000_RXBUFFER_2048)
3172 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3173 else if (max_frame <= E1000_RXBUFFER_4096)
3174 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3175 else if (max_frame <= E1000_RXBUFFER_8192)
3176 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3177 else if (max_frame <= E1000_RXBUFFER_16384)
3178 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3179
3180 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3181 if (!adapter->hw.tbi_compatibility_on &&
3182 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3183 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3184 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3185
2d7edb92
MC		 3186 netdev->mtu = new_mtu;
3187
2db10a08
AK		 3188 if (netif_running(netdev))
3189 e1000_reinit_locked(adapter);
1da177e4 3190
1da177e4
LT		 3191 adapter->hw.max_frame_size = max_frame;
3192
3193 return 0;
3194}
3195
3196/**
3197 * e1000_update_stats - Update the board statistics counters
3198 * @adapter: board private structure
3199 **/
3200
3201void
3202e1000_update_stats(struct e1000_adapter *adapter)
3203{
3204 struct e1000_hw *hw = &adapter->hw;
282f33c9 3205 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3206 unsigned long flags;
3207 uint16_t phy_tmp;
3208
3209#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3210
282f33c9
LV		 3211 /*
3212 * Prevent stats update while adapter is being reset, or if the pci
3213 * connection is down.
3214 */
9026729b 3215 if (adapter->link_speed == 0)
282f33c9
LV		 3216 return;
3217 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3218 return;
3219
1da177e4
LT		 3220 spin_lock_irqsave(&adapter->stats_lock, flags);
3221
3222 /* these counters are modified from e1000_adjust_tbi_stats,
3223 * called from the interrupt context, so they must only
3224 * be written while holding adapter->stats_lock
3225 */
3226
3227 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3228 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3229 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3230 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3231 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3232 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3233 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3234
3235 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3236 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3237 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3238 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3239 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3240 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3241 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3242 }
1da177e4
LT		 3243
3244 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3245 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3246 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3247 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3248 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3249 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3250 adapter->stats.dc += E1000_READ_REG(hw, DC);
3251 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3252 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3253 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3254 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3255 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3256 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3257 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3258 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3259 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3260 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3261 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3262 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3263 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3264 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3265 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3266 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3267 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3268 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3269 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3270
3271 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3272 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3273 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3274 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3275 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3276 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3277 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3278 }
3279
1da177e4
LT		 3280 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3281 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3282
3283 /* used for adaptive IFS */
3284
3285 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3286 adapter->stats.tpt += hw->tx_packet_delta;
3287 hw->collision_delta = E1000_READ_REG(hw, COLC);
3288 adapter->stats.colc += hw->collision_delta;
3289
96838a40 3290 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3291 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3292 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3293 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3294 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3295 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3296 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3297 }
96838a40 3298 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3299 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3300 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3301
3302 if (adapter->hw.mac_type != e1000_ich8lan) {
2d7edb92
MC		 3303 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3304 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3305 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3306 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3307 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3308 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3309 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3310 }
2d7edb92 3311 }
1da177e4
LT		 3312
3313 /* Fill out the OS statistics structure */
3314
3315 adapter->net_stats.rx_packets = adapter->stats.gprc;
3316 adapter->net_stats.tx_packets = adapter->stats.gptc;
3317 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3318 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3319 adapter->net_stats.multicast = adapter->stats.mprc;
3320 adapter->net_stats.collisions = adapter->stats.colc;
3321
3322 /* Rx Errors */
3323
87041639
JK		 3324 /* RLEC on some newer hardware can be incorrect so build
3325 * our own version based on RUC and ROC */
1da177e4
LT		 3326 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3327 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3328 adapter->stats.ruc + adapter->stats.roc +
3329 adapter->stats.cexterr;
87041639
JK		 3330 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3331 adapter->stats.roc;
1da177e4
LT		 3332 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3333 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3334 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3335
3336 /* Tx Errors */
3337
3338 adapter->net_stats.tx_errors = adapter->stats.ecol +
3339 adapter->stats.latecol;
3340 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3341 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3342 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3343
3344 /* Tx Dropped needs to be maintained elsewhere */
3345
3346 /* Phy Stats */
3347
96838a40
JB		 3348 if (hw->media_type == e1000_media_type_copper) {
3349 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3350 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3351 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3352 adapter->phy_stats.idle_errors += phy_tmp;
3353 }
3354
96838a40 3355 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3356 (hw->phy_type == e1000_phy_m88) &&
3357 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3358 adapter->phy_stats.receive_errors += phy_tmp;
3359 }
3360
3361 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3362}
3363
3364/**
3365 * e1000_intr - Interrupt Handler
3366 * @irq: interrupt number
3367 * @data: pointer to a network interface device structure
3368 * @pt_regs: CPU registers structure
3369 **/
3370
3371static irqreturn_t
3372e1000_intr(int irq, void *data, struct pt_regs *regs)
3373{
3374 struct net_device *netdev = data;
60490fe0 3375 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3376 struct e1000_hw *hw = &adapter->hw;
87041639 3377 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3378#ifndef CONFIG_E1000_NAPI
581d708e 3379 int i;
1e613fd9
JK		 3380#else
3381 /* Interrupt Auto-Mask...upon reading ICR,
3382 * interrupts are masked. No need for the
3383 * IMC write, but it does mean we should
3384 * account for it ASAP. */
3385 if (likely(hw->mac_type >= e1000_82571))
3386 atomic_inc(&adapter->irq_sem);
be2b28ed 3387#endif
1da177e4 3388
1e613fd9
JK		 3389 if (unlikely(!icr)) {
3390#ifdef CONFIG_E1000_NAPI
3391 if (hw->mac_type >= e1000_82571)
3392 e1000_irq_enable(adapter);
3393#endif
1da177e4 3394 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3395 }
1da177e4 3396
96838a40 3397 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3398 hw->get_link_status = 1;
87041639
JK		 3399 /* 80003ES2LAN workaround--
3400 * For packet buffer work-around on link down event;
3401 * disable receives here in the ISR and
3402 * reset adapter in watchdog
3403 */
3404 if (netif_carrier_ok(netdev) &&
3405 (adapter->hw.mac_type == e1000_80003es2lan)) {
3406 /* disable receives */
3407 rctl = E1000_READ_REG(hw, RCTL);
3408 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3409 }
1da177e4
LT		 3410 mod_timer(&adapter->watchdog_timer, jiffies);
3411 }
3412
3413#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3414 if (unlikely(hw->mac_type < e1000_82571)) {
3415 atomic_inc(&adapter->irq_sem);
3416 E1000_WRITE_REG(hw, IMC, ~0);
3417 E1000_WRITE_FLUSH(hw);
3418 }
d3d9e484
AK		 3419 if (likely(netif_rx_schedule_prep(netdev)))
3420 __netif_rx_schedule(netdev);
581d708e
MC		 3421 else
3422 e1000_irq_enable(adapter);
c1605eb3 3423#else
1da177e4 3424 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3425 * Due to Hub Link bus being occupied, an interrupt
3426 * de-assertion message is not able to be sent.
3427 * When an interrupt assertion message is generated later,
3428 * two messages are re-ordered and sent out.
3429 * That causes APIC to think 82547 is in de-assertion
3430 * state, while 82547 is in assertion state, resulting
3431 * in dead lock. Writing IMC forces 82547 into
3432 * de-assertion state.
3433 */
3434 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3435 atomic_inc(&adapter->irq_sem);
2648345f 3436 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3437 }
3438
96838a40
JB		 3439 for (i = 0; i < E1000_MAX_INTR; i++)
3440 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3441 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3442 break;
3443
96838a40 3444 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3445 e1000_irq_enable(adapter);
581d708e 3446
c1605eb3 3447#endif
1da177e4
LT		 3448
3449 return IRQ_HANDLED;
3450}
3451
3452#ifdef CONFIG_E1000_NAPI
3453/**
3454 * e1000_clean - NAPI Rx polling callback
3455 * @adapter: board private structure
3456 **/
3457
3458static int
581d708e 3459e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3460{
581d708e
MC		 3461 struct e1000_adapter *adapter;
3462 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3463 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3464
3465 /* Must NOT use netdev_priv macro here. */
3466 adapter = poll_dev->priv;
3467
3468 /* Keep link state information with original netdev */
d3d9e484 3469 if (!netif_carrier_ok(poll_dev))
581d708e 3470 goto quit_polling;
2648345f 3471
d3d9e484
AK		 3472 /* e1000_clean is called per-cpu. This lock protects
3473 * tx_ring[0] from being cleaned by multiple cpus
3474 * simultaneously. A failure obtaining the lock means
3475 * tx_ring[0] is currently being cleaned anyway. */
3476 if (spin_trylock(&adapter->tx_queue_lock)) {
3477 tx_cleaned = e1000_clean_tx_irq(adapter,
3478 &adapter->tx_ring[0]);
3479 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3480 }
3481
d3d9e484 3482 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3483 &work_done, work_to_do);
1da177e4
LT		 3484
3485 *budget -= work_done;
581d708e 3486 poll_dev->quota -= work_done;
96838a40 3487
2b02893e 3488 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3489 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3490 !netif_running(poll_dev)) {
581d708e
MC		 3491quit_polling:
3492 netif_rx_complete(poll_dev);
1da177e4
LT		 3493 e1000_irq_enable(adapter);
3494 return 0;
3495 }
3496
3497 return 1;
3498}
3499
3500#endif
3501/**
3502 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3503 * @adapter: board private structure
3504 **/
3505
3506static boolean_t
581d708e
MC		 3507e1000_clean_tx_irq(struct e1000_adapter *adapter,
3508 struct e1000_tx_ring *tx_ring)
1da177e4 3509{
1da177e4
LT		 3510 struct net_device *netdev = adapter->netdev;
3511 struct e1000_tx_desc *tx_desc, *eop_desc;
3512 struct e1000_buffer *buffer_info;
3513 unsigned int i, eop;
2a1af5d7
JK		 3514#ifdef CONFIG_E1000_NAPI
3515 unsigned int count = 0;
3516#endif
1da177e4
LT		 3517 boolean_t cleaned = FALSE;
3518
3519 i = tx_ring->next_to_clean;
3520 eop = tx_ring->buffer_info[i].next_to_watch;
3521 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3522
581d708e 3523 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3524 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3525 tx_desc = E1000_TX_DESC(*tx_ring, i);
3526 buffer_info = &tx_ring->buffer_info[i];
3527 cleaned = (i == eop);
3528
fd803241 3529 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3530 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3531
96838a40 3532 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3533 }
581d708e 3534
7bfa4816 3535
1da177e4
LT		 3536 eop = tx_ring->buffer_info[i].next_to_watch;
3537 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3538#ifdef CONFIG_E1000_NAPI
3539#define E1000_TX_WEIGHT 64
3540 /* weight of a sort for tx, to avoid endless transmit cleanup */
3541 if (count++ == E1000_TX_WEIGHT) break;
3542#endif
1da177e4
LT		 3543 }
3544
3545 tx_ring->next_to_clean = i;
3546
77b2aad5 3547#define TX_WAKE_THRESHOLD 32
96838a40 3548 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
77b2aad5
AK		 3549 netif_carrier_ok(netdev))) {
3550 spin_lock(&tx_ring->tx_lock);
3551 if (netif_queue_stopped(netdev) &&
3552 (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
3553 netif_wake_queue(netdev);
3554 spin_unlock(&tx_ring->tx_lock);
3555 }
2648345f 3556
581d708e 3557 if (adapter->detect_tx_hung) {
2648345f 3558 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3559 * check with the clearing of time_stamp and movement of i */
3560 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3561 if (tx_ring->buffer_info[eop].dma &&
3562 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3563 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3564 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3565 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3566
3567 /* detected Tx unit hang */
c6963ef5 3568 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3569 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3570 " TDH <%x>\n"
3571 " TDT <%x>\n"
3572 " next_to_use <%x>\n"
3573 " next_to_clean <%x>\n"
3574 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3575 " time_stamp <%lx>\n"
3576 " next_to_watch <%x>\n"
3577 " jiffies <%lx>\n"
3578 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3579 (unsigned long)((tx_ring - adapter->tx_ring) /
3580 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3581 readl(adapter->hw.hw_addr + tx_ring->tdh),
3582 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3583 tx_ring->next_to_use,
392137fa
JK		 3584 tx_ring->next_to_clean,
3585 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3586 eop,
3587 jiffies,
3588 eop_desc->upper.fields.status);
1da177e4 3589 netif_stop_queue(netdev);
70b8f1e1 3590 }
1da177e4 3591 }
1da177e4
LT		 3592 return cleaned;
3593}
3594
3595/**
3596 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3597 * @adapter: board private structure
3598 * @status_err: receive descriptor status and error fields
3599 * @csum: receive descriptor csum field
3600 * @sk_buff: socket buffer with received data
1da177e4
LT		 3601 **/
3602
e619d523 3603static void
1da177e4 3604e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3605 uint32_t status_err, uint32_t csum,
3606 struct sk_buff *skb)
1da177e4 3607{
2d7edb92
MC		 3608 uint16_t status = (uint16_t)status_err;
3609 uint8_t errors = (uint8_t)(status_err >> 24);
3610 skb->ip_summed = CHECKSUM_NONE;
3611
1da177e4 3612 /* 82543 or newer only */
96838a40 3613 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3614 /* Ignore Checksum bit is set */
96838a40 3615 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3616 /* TCP/UDP checksum error bit is set */
96838a40 3617 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3618 /* let the stack verify checksum errors */
1da177e4 3619 adapter->hw_csum_err++;
2d7edb92
MC		 3620 return;
3621 }
3622 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3623 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3624 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3625 return;
1da177e4 3626 } else {
96838a40 3627 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3628 return;
3629 }
3630 /* It must be a TCP or UDP packet with a valid checksum */
3631 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3632 /* TCP checksum is good */
3633 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3634 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3635 /* IP fragment with UDP payload */
3636 /* Hardware complements the payload checksum, so we undo it
3637 * and then put the value in host order for further stack use.
3638 */
3639 csum = ntohl(csum ^ 0xFFFF);
3640 skb->csum = csum;
84fa7933 3641 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3642 }
2d7edb92 3643 adapter->hw_csum_good++;
1da177e4
LT		 3644}
3645
3646/**
2d7edb92 3647 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3648 * @adapter: board private structure
3649 **/
3650
3651static boolean_t
3652#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3653e1000_clean_rx_irq(struct e1000_adapter *adapter,
3654 struct e1000_rx_ring *rx_ring,
3655 int *work_done, int work_to_do)
1da177e4 3656#else
581d708e
MC		 3657e1000_clean_rx_irq(struct e1000_adapter *adapter,
3658 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3659#endif
3660{
1da177e4
LT		 3661 struct net_device *netdev = adapter->netdev;
3662 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3663 struct e1000_rx_desc *rx_desc, *next_rxd;
3664 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3665 unsigned long flags;
3666 uint32_t length;
3667 uint8_t last_byte;
3668 unsigned int i;
72d64a43 3669 int cleaned_count = 0;
a1415ee6 3670 boolean_t cleaned = FALSE;
1da177e4
LT		 3671
3672 i = rx_ring->next_to_clean;
3673 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3674 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3675
b92ff8ee 3676 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3677 struct sk_buff *skb;
a292ca6e 3678 u8 status;
1da177e4 3679#ifdef CONFIG_E1000_NAPI
96838a40 3680 if (*work_done >= work_to_do)
1da177e4
LT		 3681 break;
3682 (*work_done)++;
3683#endif
a292ca6e 3684 status = rx_desc->status;
b92ff8ee 3685 skb = buffer_info->skb;
86c3d59f
JB		 3686 buffer_info->skb = NULL;
3687
30320be8
JK		 3688 prefetch(skb->data - NET_IP_ALIGN);
3689
86c3d59f
JB		 3690 if (++i == rx_ring->count) i = 0;
3691 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3692 prefetch(next_rxd);
3693
86c3d59f 3694 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3695
72d64a43
JK		 3696 cleaned = TRUE;
3697 cleaned_count++;
a292ca6e
JK		 3698 pci_unmap_single(pdev,
3699 buffer_info->dma,
3700 buffer_info->length,
1da177e4
LT		 3701 PCI_DMA_FROMDEVICE);
3702
1da177e4
LT		 3703 length = le16_to_cpu(rx_desc->length);
3704
f235a2ab
AK		 3705 /* adjust length to remove Ethernet CRC */
3706 length -= 4;
3707
a1415ee6
JK		 3708 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3709 /* All receives must fit into a single buffer */
3710 E1000_DBG("%s: Receive packet consumed multiple"
3711 " buffers\n", netdev->name);
864c4e45 3712 /* recycle */
8fc897b0 3713 buffer_info->skb = skb;
1da177e4
LT		 3714 goto next_desc;
3715 }
3716
96838a40 3717 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3718 last_byte = *(skb->data + length - 1);
b92ff8ee 3719 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3720 rx_desc->errors, length, last_byte)) {
3721 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3722 e1000_tbi_adjust_stats(&adapter->hw,
3723 &adapter->stats,
1da177e4
LT		 3724 length, skb->data);
3725 spin_unlock_irqrestore(&adapter->stats_lock,
3726 flags);
3727 length--;
3728 } else {
9e2feace
AK		 3729 /* recycle */
3730 buffer_info->skb = skb;
1da177e4
LT		 3731 goto next_desc;
3732 }
1cb5821f 3733 }
1da177e4 3734
a292ca6e
JK		 3735 /* code added for copybreak, this should improve
3736 * performance for small packets with large amounts
3737 * of reassembly being done in the stack */
3738#define E1000_CB_LENGTH 256
a1415ee6 3739 if (length < E1000_CB_LENGTH) {
a292ca6e 3740 struct sk_buff *new_skb =
87f5032e 3741 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 3742 if (new_skb) {
3743 skb_reserve(new_skb, NET_IP_ALIGN);
a292ca6e
JK		 3744 memcpy(new_skb->data - NET_IP_ALIGN,
3745 skb->data - NET_IP_ALIGN,
3746 length + NET_IP_ALIGN);
3747 /* save the skb in buffer_info as good */
3748 buffer_info->skb = skb;
3749 skb = new_skb;
3750 skb_put(skb, length);
3751 }
a1415ee6
JK		 3752 } else
3753 skb_put(skb, length);
a292ca6e
JK		 3754
3755 /* end copybreak code */
1da177e4
LT		 3756
3757 /* Receive Checksum Offload */
a292ca6e
JK		 3758 e1000_rx_checksum(adapter,
3759 (uint32_t)(status) |
2d7edb92 3760 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3761 le16_to_cpu(rx_desc->csum), skb);
96838a40 3762
1da177e4
LT		 3763 skb->protocol = eth_type_trans(skb, netdev);
3764#ifdef CONFIG_E1000_NAPI
96838a40 3765 if (unlikely(adapter->vlgrp &&
a292ca6e 3766 (status & E1000_RXD_STAT_VP))) {
1da177e4 3767 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3768 le16_to_cpu(rx_desc->special) &
3769 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3770 } else {
3771 netif_receive_skb(skb);
3772 }
3773#else /* CONFIG_E1000_NAPI */
96838a40 3774 if (unlikely(adapter->vlgrp &&
b92ff8ee 3775 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3776 vlan_hwaccel_rx(skb, adapter->vlgrp,
3777 le16_to_cpu(rx_desc->special) &
3778 E1000_RXD_SPC_VLAN_MASK);
3779 } else {
3780 netif_rx(skb);
3781 }
3782#endif /* CONFIG_E1000_NAPI */
3783 netdev->last_rx = jiffies;
3784
3785next_desc:
3786 rx_desc->status = 0;
1da177e4 3787
72d64a43
JK		 3788 /* return some buffers to hardware, one at a time is too slow */
3789 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3790 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3791 cleaned_count = 0;
3792 }
3793
30320be8 3794 /* use prefetched values */
86c3d59f
JB		 3795 rx_desc = next_rxd;
3796 buffer_info = next_buffer;
1da177e4 3797 }
1da177e4 3798 rx_ring->next_to_clean = i;
72d64a43
JK		 3799
3800 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3801 if (cleaned_count)
3802 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3803
3804 return cleaned;
3805}
3806
3807/**
3808 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3809 * @adapter: board private structure
3810 **/
3811
3812static boolean_t
3813#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3814e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3815 struct e1000_rx_ring *rx_ring,
3816 int *work_done, int work_to_do)
2d7edb92 3817#else
581d708e
MC		 3818e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3819 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3820#endif
3821{
86c3d59f 3822 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3823 struct net_device *netdev = adapter->netdev;
3824 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3825 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3826 struct e1000_ps_page *ps_page;
3827 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3828 struct sk_buff *skb;
2d7edb92
MC		 3829 unsigned int i, j;
3830 uint32_t length, staterr;
72d64a43 3831 int cleaned_count = 0;
2d7edb92
MC		 3832 boolean_t cleaned = FALSE;
3833
3834 i = rx_ring->next_to_clean;
3835 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3836 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3837 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3838
96838a40 3839 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3840 ps_page = &rx_ring->ps_page[i];
3841 ps_page_dma = &rx_ring->ps_page_dma[i];
3842#ifdef CONFIG_E1000_NAPI
96838a40 3843 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3844 break;
3845 (*work_done)++;
3846#endif
86c3d59f
JB		 3847 skb = buffer_info->skb;
3848
30320be8
JK		 3849 /* in the packet split case this is header only */
3850 prefetch(skb->data - NET_IP_ALIGN);
3851
86c3d59f
JB		 3852 if (++i == rx_ring->count) i = 0;
3853 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3854 prefetch(next_rxd);
3855
86c3d59f 3856 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3857
2d7edb92 3858 cleaned = TRUE;
72d64a43 3859 cleaned_count++;
2d7edb92
MC		 3860 pci_unmap_single(pdev, buffer_info->dma,
3861 buffer_info->length,
3862 PCI_DMA_FROMDEVICE);
3863
96838a40 3864 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3865 E1000_DBG("%s: Packet Split buffers didn't pick up"
3866 " the full packet\n", netdev->name);
3867 dev_kfree_skb_irq(skb);
3868 goto next_desc;
3869 }
1da177e4 3870
96838a40 3871 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3872 dev_kfree_skb_irq(skb);
3873 goto next_desc;
3874 }
3875
3876 length = le16_to_cpu(rx_desc->wb.middle.length0);
3877
96838a40 3878 if (unlikely(!length)) {
2d7edb92
MC		 3879 E1000_DBG("%s: Last part of the packet spanning"
3880 " multiple descriptors\n", netdev->name);
3881 dev_kfree_skb_irq(skb);
3882 goto next_desc;
3883 }
3884
3885 /* Good Receive */
3886 skb_put(skb, length);
3887
dc7c6add
JK		 3888 {
3889 /* this looks ugly, but it seems compiler issues make it
3890 more efficient than reusing j */
3891 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3892
3893 /* page alloc/put takes too long and effects small packet
3894 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 3895 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 3896 u8 *vaddr;
76c224bc 3897 /* there is no documentation about how to call
dc7c6add
JK		 3898 * kmap_atomic, so we can't hold the mapping
3899 * very long */
3900 pci_dma_sync_single_for_cpu(pdev,
3901 ps_page_dma->ps_page_dma[0],
3902 PAGE_SIZE,
3903 PCI_DMA_FROMDEVICE);
3904 vaddr = kmap_atomic(ps_page->ps_page[0],
3905 KM_SKB_DATA_SOFTIRQ);
3906 memcpy(skb->tail, vaddr, l1);
3907 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3908 pci_dma_sync_single_for_device(pdev,
3909 ps_page_dma->ps_page_dma[0],
3910 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 3911 /* remove the CRC */
3912 l1 -= 4;
dc7c6add 3913 skb_put(skb, l1);
dc7c6add
JK		 3914 goto copydone;
3915 } /* if */
3916 }
3917
96838a40 3918 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3919 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3920 break;
2d7edb92
MC		 3921 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3922 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3923 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3924 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3925 length);
2d7edb92 3926 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3927 skb->len += length;
3928 skb->data_len += length;
5d51b80f 3929 skb->truesize += length;
2d7edb92
MC		 3930 }
3931
f235a2ab
AK		 3932 /* strip the ethernet crc, problem is we're using pages now so
3933 * this whole operation can get a little cpu intensive */
3934 pskb_trim(skb, skb->len - 4);
3935
dc7c6add 3936copydone:
2d7edb92 3937 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 3938 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 3939 skb->protocol = eth_type_trans(skb, netdev);
3940
96838a40 3941 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 3942 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 3943 adapter->rx_hdr_split++;
2d7edb92 3944#ifdef CONFIG_E1000_NAPI
96838a40 3945 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3946 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3947 le16_to_cpu(rx_desc->wb.middle.vlan) &
3948 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3949 } else {
3950 netif_receive_skb(skb);
3951 }
3952#else /* CONFIG_E1000_NAPI */
96838a40 3953 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3954 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3955 le16_to_cpu(rx_desc->wb.middle.vlan) &
3956 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3957 } else {
3958 netif_rx(skb);
3959 }
3960#endif /* CONFIG_E1000_NAPI */
3961 netdev->last_rx = jiffies;
3962
3963next_desc:
c3d7a3a4 3964 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 3965 buffer_info->skb = NULL;
2d7edb92 3966
72d64a43
JK		 3967 /* return some buffers to hardware, one at a time is too slow */
3968 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3969 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3970 cleaned_count = 0;
3971 }
3972
30320be8 3973 /* use prefetched values */
86c3d59f
JB		 3974 rx_desc = next_rxd;
3975 buffer_info = next_buffer;
3976
683a38f3 3977 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3978 }
3979 rx_ring->next_to_clean = i;
72d64a43
JK		 3980
3981 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3982 if (cleaned_count)
3983 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3984
3985 return cleaned;
3986}
3987
3988/**
2d7edb92 3989 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3990 * @adapter: address of board private structure
3991 **/
3992
3993static void
581d708e 3994e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3995 struct e1000_rx_ring *rx_ring,
a292ca6e 3996 int cleaned_count)
1da177e4 3997{
1da177e4
LT		 3998 struct net_device *netdev = adapter->netdev;
3999 struct pci_dev *pdev = adapter->pdev;
4000 struct e1000_rx_desc *rx_desc;
4001 struct e1000_buffer *buffer_info;
4002 struct sk_buff *skb;
2648345f
MC		 4003 unsigned int i;
4004 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4005
4006 i = rx_ring->next_to_use;
4007 buffer_info = &rx_ring->buffer_info[i];
4008
a292ca6e 4009 while (cleaned_count--) {
ca6f7224
CH		 4010 skb = buffer_info->skb;
4011 if (skb) {
a292ca6e
JK		 4012 skb_trim(skb, 0);
4013 goto map_skb;
4014 }
4015
ca6f7224 4016 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4017 if (unlikely(!skb)) {
1da177e4 4018 /* Better luck next round */
72d64a43 4019 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4020 break;
4021 }
4022
2648345f 4023 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4024 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4025 struct sk_buff *oldskb = skb;
2648345f
MC		 4026 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4027 "at %p\n", bufsz, skb->data);
4028 /* Try again, without freeing the previous */
87f5032e 4029 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4030 /* Failed allocation, critical failure */
1da177e4
LT		 4031 if (!skb) {
4032 dev_kfree_skb(oldskb);
4033 break;
4034 }
2648345f 4035
1da177e4
LT		 4036 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4037 /* give up */
4038 dev_kfree_skb(skb);
4039 dev_kfree_skb(oldskb);
4040 break; /* while !buffer_info->skb */
1da177e4 4041 }
ca6f7224
CH		 4042
4043 /* Use new allocation */
4044 dev_kfree_skb(oldskb);
1da177e4 4045 }
1da177e4
LT		 4046 /* Make buffer alignment 2 beyond a 16 byte boundary
4047 * this will result in a 16 byte aligned IP header after
4048 * the 14 byte MAC header is removed
4049 */
4050 skb_reserve(skb, NET_IP_ALIGN);
4051
1da177e4
LT		 4052 buffer_info->skb = skb;
4053 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4054map_skb:
1da177e4
LT		 4055 buffer_info->dma = pci_map_single(pdev,
4056 skb->data,
4057 adapter->rx_buffer_len,
4058 PCI_DMA_FROMDEVICE);
4059
2648345f
MC		 4060 /* Fix for errata 23, can't cross 64kB boundary */
4061 if (!e1000_check_64k_bound(adapter,
4062 (void *)(unsigned long)buffer_info->dma,
4063 adapter->rx_buffer_len)) {
4064 DPRINTK(RX_ERR, ERR,
4065 "dma align check failed: %u bytes at %p\n",
4066 adapter->rx_buffer_len,
4067 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4068 dev_kfree_skb(skb);
4069 buffer_info->skb = NULL;
4070
2648345f 4071 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4072 adapter->rx_buffer_len,
4073 PCI_DMA_FROMDEVICE);
4074
4075 break; /* while !buffer_info->skb */
4076 }
1da177e4
LT		 4077 rx_desc = E1000_RX_DESC(*rx_ring, i);
4078 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4079
96838a40
JB		 4080 if (unlikely(++i == rx_ring->count))
4081 i = 0;
1da177e4
LT		 4082 buffer_info = &rx_ring->buffer_info[i];
4083 }
4084
b92ff8ee
JB		 4085 if (likely(rx_ring->next_to_use != i)) {
4086 rx_ring->next_to_use = i;
4087 if (unlikely(i-- == 0))
4088 i = (rx_ring->count - 1);
4089
4090 /* Force memory writes to complete before letting h/w
4091 * know there are new descriptors to fetch. (Only
4092 * applicable for weak-ordered memory model archs,
4093 * such as IA-64). */
4094 wmb();
4095 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4096 }
1da177e4
LT		 4097}
4098
2d7edb92
MC		 4099/**
4100 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4101 * @adapter: address of board private structure
4102 **/
4103
4104static void
581d708e 4105e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4106 struct e1000_rx_ring *rx_ring,
4107 int cleaned_count)
2d7edb92 4108{
2d7edb92
MC		 4109 struct net_device *netdev = adapter->netdev;
4110 struct pci_dev *pdev = adapter->pdev;
4111 union e1000_rx_desc_packet_split *rx_desc;
4112 struct e1000_buffer *buffer_info;
4113 struct e1000_ps_page *ps_page;
4114 struct e1000_ps_page_dma *ps_page_dma;
4115 struct sk_buff *skb;
4116 unsigned int i, j;
4117
4118 i = rx_ring->next_to_use;
4119 buffer_info = &rx_ring->buffer_info[i];
4120 ps_page = &rx_ring->ps_page[i];
4121 ps_page_dma = &rx_ring->ps_page_dma[i];
4122
72d64a43 4123 while (cleaned_count--) {
2d7edb92
MC		 4124 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4125
96838a40 4126 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4127 if (j < adapter->rx_ps_pages) {
4128 if (likely(!ps_page->ps_page[j])) {
4129 ps_page->ps_page[j] =
4130 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4131 if (unlikely(!ps_page->ps_page[j])) {
4132 adapter->alloc_rx_buff_failed++;
e4c811c9 4133 goto no_buffers;
b92ff8ee 4134 }
e4c811c9
MC		 4135 ps_page_dma->ps_page_dma[j] =
4136 pci_map_page(pdev,
4137 ps_page->ps_page[j],
4138 0, PAGE_SIZE,
4139 PCI_DMA_FROMDEVICE);
4140 }
4141 /* Refresh the desc even if buffer_addrs didn't
96838a40 4142 * change because each write-back erases
e4c811c9
MC		 4143 * this info.
4144 */
4145 rx_desc->read.buffer_addr[j+1] =
4146 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4147 } else
4148 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4149 }
4150
87f5032e
DM		 4151 skb = netdev_alloc_skb(netdev,
4152 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4153
b92ff8ee
JB		 4154 if (unlikely(!skb)) {
4155 adapter->alloc_rx_buff_failed++;
2d7edb92 4156 break;
b92ff8ee 4157 }
2d7edb92
MC		 4158
4159 /* Make buffer alignment 2 beyond a 16 byte boundary
4160 * this will result in a 16 byte aligned IP header after
4161 * the 14 byte MAC header is removed
4162 */
4163 skb_reserve(skb, NET_IP_ALIGN);
4164
2d7edb92
MC		 4165 buffer_info->skb = skb;
4166 buffer_info->length = adapter->rx_ps_bsize0;
4167 buffer_info->dma = pci_map_single(pdev, skb->data,
4168 adapter->rx_ps_bsize0,
4169 PCI_DMA_FROMDEVICE);
4170
4171 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4172
96838a40 4173 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4174 buffer_info = &rx_ring->buffer_info[i];
4175 ps_page = &rx_ring->ps_page[i];
4176 ps_page_dma = &rx_ring->ps_page_dma[i];
4177 }
4178
4179no_buffers:
b92ff8ee
JB		 4180 if (likely(rx_ring->next_to_use != i)) {
4181 rx_ring->next_to_use = i;
4182 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4183
4184 /* Force memory writes to complete before letting h/w
4185 * know there are new descriptors to fetch. (Only
4186 * applicable for weak-ordered memory model archs,
4187 * such as IA-64). */
4188 wmb();
4189 /* Hardware increments by 16 bytes, but packet split
4190 * descriptors are 32 bytes...so we increment tail
4191 * twice as much.
4192 */
4193 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4194 }
2d7edb92
MC		 4195}
4196
1da177e4
LT		 4197/**
4198 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4199 * @adapter:
4200 **/
4201
4202static void
4203e1000_smartspeed(struct e1000_adapter *adapter)
4204{
4205 uint16_t phy_status;
4206 uint16_t phy_ctrl;
4207
96838a40 4208 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4209 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4210 return;
4211
96838a40 4212 if (adapter->smartspeed == 0) {
1da177e4
LT		 4213 /* If Master/Slave config fault is asserted twice,
4214 * we assume back-to-back */
4215 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4216 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4217 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4218 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4219 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4220 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4221 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4222 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4223 phy_ctrl);
4224 adapter->smartspeed++;
96838a40 4225 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4226 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4227 &phy_ctrl)) {
4228 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4229 MII_CR_RESTART_AUTO_NEG);
4230 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4231 phy_ctrl);
4232 }
4233 }
4234 return;
96838a40 4235 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4236 /* If still no link, perhaps using 2/3 pair cable */
4237 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4238 phy_ctrl |= CR_1000T_MS_ENABLE;
4239 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4240 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4241 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4242 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4243 MII_CR_RESTART_AUTO_NEG);
4244 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4245 }
4246 }
4247 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4248 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4249 adapter->smartspeed = 0;
4250}
4251
4252/**
4253 * e1000_ioctl -
4254 * @netdev:
4255 * @ifreq:
4256 * @cmd:
4257 **/
4258
4259static int
4260e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4261{
4262 switch (cmd) {
4263 case SIOCGMIIPHY:
4264 case SIOCGMIIREG:
4265 case SIOCSMIIREG:
4266 return e1000_mii_ioctl(netdev, ifr, cmd);
4267 default:
4268 return -EOPNOTSUPP;
4269 }
4270}
4271
4272/**
4273 * e1000_mii_ioctl -
4274 * @netdev:
4275 * @ifreq:
4276 * @cmd:
4277 **/
4278
4279static int
4280e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4281{
60490fe0 4282 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4283 struct mii_ioctl_data *data = if_mii(ifr);
4284 int retval;
4285 uint16_t mii_reg;
4286 uint16_t spddplx;
97876fc6 4287 unsigned long flags;
1da177e4 4288
96838a40 4289 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4290 return -EOPNOTSUPP;
4291
4292 switch (cmd) {
4293 case SIOCGMIIPHY:
4294 data->phy_id = adapter->hw.phy_addr;
4295 break;
4296 case SIOCGMIIREG:
96838a40 4297 if (!capable(CAP_NET_ADMIN))
1da177e4 4298 return -EPERM;
97876fc6 4299 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4300 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4301 &data->val_out)) {
4302 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4303 return -EIO;
97876fc6
MC		 4304 }
4305 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4306 break;
4307 case SIOCSMIIREG:
96838a40 4308 if (!capable(CAP_NET_ADMIN))
1da177e4 4309 return -EPERM;
96838a40 4310 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4311 return -EFAULT;
4312 mii_reg = data->val_in;
97876fc6 4313 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4314 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4315 mii_reg)) {
4316 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4317 return -EIO;
97876fc6 4318 }
dc86d32a 4319 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4320 switch (data->reg_num) {
4321 case PHY_CTRL:
96838a40 4322 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4323 break;
96838a40 4324 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4325 adapter->hw.autoneg = 1;
4326 adapter->hw.autoneg_advertised = 0x2F;
4327 } else {
4328 if (mii_reg & 0x40)
4329 spddplx = SPEED_1000;
4330 else if (mii_reg & 0x2000)
4331 spddplx = SPEED_100;
4332 else
4333 spddplx = SPEED_10;
4334 spddplx += (mii_reg & 0x100)
cb764326
JK		 4335 ? DUPLEX_FULL :
4336 DUPLEX_HALF;
1da177e4
LT		 4337 retval = e1000_set_spd_dplx(adapter,
4338 spddplx);
96838a40 4339 if (retval) {
97876fc6 4340 spin_unlock_irqrestore(
96838a40 4341 &adapter->stats_lock,
97876fc6 4342 flags);
1da177e4 4343 return retval;
97876fc6 4344 }
1da177e4 4345 }
2db10a08
AK		 4346 if (netif_running(adapter->netdev))
4347 e1000_reinit_locked(adapter);
4348 else
1da177e4
LT		 4349 e1000_reset(adapter);
4350 break;
4351 case M88E1000_PHY_SPEC_CTRL:
4352 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4353 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4354 spin_unlock_irqrestore(
4355 &adapter->stats_lock, flags);
1da177e4 4356 return -EIO;
97876fc6 4357 }
1da177e4
LT		 4358 break;
4359 }
4360 } else {
4361 switch (data->reg_num) {
4362 case PHY_CTRL:
96838a40 4363 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4364 break;
2db10a08
AK		 4365 if (netif_running(adapter->netdev))
4366 e1000_reinit_locked(adapter);
4367 else
1da177e4
LT		 4368 e1000_reset(adapter);
4369 break;
4370 }
4371 }
97876fc6 4372 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4373 break;
4374 default:
4375 return -EOPNOTSUPP;
4376 }
4377 return E1000_SUCCESS;
4378}
4379
4380void
4381e1000_pci_set_mwi(struct e1000_hw *hw)
4382{
4383 struct e1000_adapter *adapter = hw->back;
2648345f 4384 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4385
96838a40 4386 if (ret_val)
2648345f 4387 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4388}
4389
4390void
4391e1000_pci_clear_mwi(struct e1000_hw *hw)
4392{
4393 struct e1000_adapter *adapter = hw->back;
4394
4395 pci_clear_mwi(adapter->pdev);
4396}
4397
4398void
4399e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4400{
4401 struct e1000_adapter *adapter = hw->back;
4402
4403 pci_read_config_word(adapter->pdev, reg, value);
4404}
4405
4406void
4407e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4408{
4409 struct e1000_adapter *adapter = hw->back;
4410
4411 pci_write_config_word(adapter->pdev, reg, *value);
4412}
4413
e4c780b1 4414#if 0
1da177e4
LT		 4415uint32_t
4416e1000_io_read(struct e1000_hw *hw, unsigned long port)
4417{
4418 return inl(port);
4419}
e4c780b1 4420#endif /* 0 */
1da177e4
LT		 4421
4422void
4423e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4424{
4425 outl(value, port);
4426}
4427
4428static void
4429e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4430{
60490fe0 4431 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4432 uint32_t ctrl, rctl;
4433
4434 e1000_irq_disable(adapter);
4435 adapter->vlgrp = grp;
4436
96838a40 4437 if (grp) {
1da177e4
LT		 4438 /* enable VLAN tag insert/strip */
4439 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4440 ctrl |= E1000_CTRL_VME;
4441 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4442
cd94dd0b 4443 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4444 /* enable VLAN receive filtering */
4445 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4446 rctl |= E1000_RCTL_VFE;
4447 rctl &= ~E1000_RCTL_CFIEN;
4448 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4449 e1000_update_mng_vlan(adapter);
cd94dd0b 4450 }
1da177e4
LT		 4451 } else {
4452 /* disable VLAN tag insert/strip */
4453 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4454 ctrl &= ~E1000_CTRL_VME;
4455 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4456
cd94dd0b 4457 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4458 /* disable VLAN filtering */
4459 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4460 rctl &= ~E1000_RCTL_VFE;
4461 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4462 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4463 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4464 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4465 }
cd94dd0b 4466 }
1da177e4
LT		 4467 }
4468
4469 e1000_irq_enable(adapter);
4470}
4471
4472static void
4473e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4474{
60490fe0 4475 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4476 uint32_t vfta, index;
96838a40
JB		 4477
4478 if ((adapter->hw.mng_cookie.status &
4479 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4480 (vid == adapter->mng_vlan_id))
2d7edb92 4481 return;
1da177e4
LT		 4482 /* add VID to filter table */
4483 index = (vid >> 5) & 0x7F;
4484 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4485 vfta |= (1 << (vid & 0x1F));
4486 e1000_write_vfta(&adapter->hw, index, vfta);
4487}
4488
4489static void
4490e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4491{
60490fe0 4492 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4493 uint32_t vfta, index;
4494
4495 e1000_irq_disable(adapter);
4496
96838a40 4497 if (adapter->vlgrp)
1da177e4
LT		 4498 adapter->vlgrp->vlan_devices[vid] = NULL;
4499
4500 e1000_irq_enable(adapter);
4501
96838a40
JB		 4502 if ((adapter->hw.mng_cookie.status &
4503 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4504 (vid == adapter->mng_vlan_id)) {
4505 /* release control to f/w */
4506 e1000_release_hw_control(adapter);
2d7edb92 4507 return;
ff147013
JK		 4508 }
4509
1da177e4
LT		 4510 /* remove VID from filter table */
4511 index = (vid >> 5) & 0x7F;
4512 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4513 vfta &= ~(1 << (vid & 0x1F));
4514 e1000_write_vfta(&adapter->hw, index, vfta);
4515}
4516
4517static void
4518e1000_restore_vlan(struct e1000_adapter *adapter)
4519{
4520 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4521
96838a40 4522 if (adapter->vlgrp) {
1da177e4 4523 uint16_t vid;
96838a40
JB		 4524 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4525 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4526 continue;
4527 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4528 }
4529 }
4530}
4531
4532int
4533e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4534{
4535 adapter->hw.autoneg = 0;
4536
6921368f 4537 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4538 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4539 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4540 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4541 return -EINVAL;
4542 }
4543
96838a40 4544 switch (spddplx) {
1da177e4
LT		 4545 case SPEED_10 + DUPLEX_HALF:
4546 adapter->hw.forced_speed_duplex = e1000_10_half;
4547 break;
4548 case SPEED_10 + DUPLEX_FULL:
4549 adapter->hw.forced_speed_duplex = e1000_10_full;
4550 break;
4551 case SPEED_100 + DUPLEX_HALF:
4552 adapter->hw.forced_speed_duplex = e1000_100_half;
4553 break;
4554 case SPEED_100 + DUPLEX_FULL:
4555 adapter->hw.forced_speed_duplex = e1000_100_full;
4556 break;
4557 case SPEED_1000 + DUPLEX_FULL:
4558 adapter->hw.autoneg = 1;
4559 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4560 break;
4561 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4562 default:
2648345f 4563 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4564 return -EINVAL;
4565 }
4566 return 0;
4567}
4568
b6a1d5f8 4569#ifdef CONFIG_PM
0f15a8fa
JK		 4570/* Save/restore 16 or 64 dwords of PCI config space depending on which
4571 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4572 */
4573#define PCIE_CONFIG_SPACE_LEN 256
4574#define PCI_CONFIG_SPACE_LEN 64
4575static int
4576e1000_pci_save_state(struct e1000_adapter *adapter)
4577{
4578 struct pci_dev *dev = adapter->pdev;
4579 int size;
4580 int i;
0f15a8fa 4581
2f82665f
JB		 4582 if (adapter->hw.mac_type >= e1000_82571)
4583 size = PCIE_CONFIG_SPACE_LEN;
4584 else
4585 size = PCI_CONFIG_SPACE_LEN;
4586
4587 WARN_ON(adapter->config_space != NULL);
4588
4589 adapter->config_space = kmalloc(size, GFP_KERNEL);
4590 if (!adapter->config_space) {
4591 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4592 return -ENOMEM;
4593 }
4594 for (i = 0; i < (size / 4); i++)
4595 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4596 return 0;
4597}
4598
4599static void
4600e1000_pci_restore_state(struct e1000_adapter *adapter)
4601{
4602 struct pci_dev *dev = adapter->pdev;
4603 int size;
4604 int i;
0f15a8fa 4605
2f82665f
JB		 4606 if (adapter->config_space == NULL)
4607 return;
0f15a8fa 4608
2f82665f
JB		 4609 if (adapter->hw.mac_type >= e1000_82571)
4610 size = PCIE_CONFIG_SPACE_LEN;
4611 else
4612 size = PCI_CONFIG_SPACE_LEN;
4613 for (i = 0; i < (size / 4); i++)
4614 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4615 kfree(adapter->config_space);
4616 adapter->config_space = NULL;
4617 return;
4618}
4619#endif /* CONFIG_PM */
4620
1da177e4 4621static int
829ca9a3 4622e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4623{
4624 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4625 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4626 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4627 uint32_t wufc = adapter->wol;
6fdfef16 4628#ifdef CONFIG_PM
240b1710 4629 int retval = 0;
6fdfef16 4630#endif
1da177e4
LT		 4631
4632 netif_device_detach(netdev);
4633
2db10a08
AK		 4634 if (netif_running(netdev)) {
4635 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4636 e1000_down(adapter);
2db10a08 4637 }
1da177e4 4638
2f82665f 4639#ifdef CONFIG_PM
0f15a8fa
JK		 4640 /* Implement our own version of pci_save_state(pdev) because pci-
4641 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4642 retval = e1000_pci_save_state(adapter);
4643 if (retval)
4644 return retval;
4645#endif
4646
1da177e4 4647 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4648 if (status & E1000_STATUS_LU)
1da177e4
LT		 4649 wufc &= ~E1000_WUFC_LNKC;
4650
96838a40 4651 if (wufc) {
1da177e4
LT		 4652 e1000_setup_rctl(adapter);
4653 e1000_set_multi(netdev);
4654
4655 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4656 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 4657 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4658 rctl |= E1000_RCTL_MPE;
4659 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4660 }
4661
96838a40 4662 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4663 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4664 /* advertise wake from D3Cold */
4665 #define E1000_CTRL_ADVD3WUC 0x00100000
4666 /* phy power management enable */
4667 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4668 ctrl |= E1000_CTRL_ADVD3WUC |
4669 E1000_CTRL_EN_PHY_PWR_MGMT;
4670 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4671 }
4672
96838a40 4673 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4674 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4675 /* keep the laser running in D3 */
4676 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4677 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4678 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4679 }
4680
2d7edb92
MC		 4681 /* Allow time for pending master requests to run */
4682 e1000_disable_pciex_master(&adapter->hw);
4683
1da177e4
LT		 4684 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4685 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4686 pci_enable_wake(pdev, PCI_D3hot, 1);
4687 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4688 } else {
4689 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4690 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4691 pci_enable_wake(pdev, PCI_D3hot, 0);
4692 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4693 }
4694
cd94dd0b 4695 /* FIXME: this code is incorrect for PCI Express */
96838a40 4696 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 4697 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 4698 adapter->hw.media_type == e1000_media_type_copper) {
4699 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4700 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4701 manc |= E1000_MANC_ARP_EN;
4702 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4703 pci_enable_wake(pdev, PCI_D3hot, 1);
4704 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4705 }
4706 }
4707
cd94dd0b
AK		 4708 if (adapter->hw.phy_type == e1000_phy_igp_3)
4709 e1000_phy_powerdown_workaround(&adapter->hw);
4710
b55ccb35
JK		 4711 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4712 * would have already happened in close and is redundant. */
4713 e1000_release_hw_control(adapter);
2d7edb92 4714
1da177e4 4715 pci_disable_device(pdev);
240b1710 4716
d0e027db 4717 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4718
4719 return 0;
4720}
4721
2f82665f 4722#ifdef CONFIG_PM
1da177e4
LT		 4723static int
4724e1000_resume(struct pci_dev *pdev)
4725{
4726 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4727 struct e1000_adapter *adapter = netdev_priv(netdev);
3d1dd8cb 4728 uint32_t manc, err;
1da177e4 4729
d0e027db 4730 pci_set_power_state(pdev, PCI_D0);
2f82665f 4731 e1000_pci_restore_state(adapter);
3d1dd8cb
AK		 4732 if ((err = pci_enable_device(pdev))) {
4733 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4734 return err;
4735 }
a4cb847d 4736 pci_set_master(pdev);
1da177e4 4737
d0e027db
AK		 4738 pci_enable_wake(pdev, PCI_D3hot, 0);
4739 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4740
4741 e1000_reset(adapter);
4742 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4743
96838a40 4744 if (netif_running(netdev))
1da177e4
LT		 4745 e1000_up(adapter);
4746
4747 netif_device_attach(netdev);
4748
cd94dd0b 4749 /* FIXME: this code is incorrect for PCI Express */
96838a40 4750 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 4751 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 4752 adapter->hw.media_type == e1000_media_type_copper) {
4753 manc = E1000_READ_REG(&adapter->hw, MANC);
4754 manc &= ~(E1000_MANC_ARP_EN);
4755 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4756 }
4757
b55ccb35
JK		 4758 /* If the controller is 82573 and f/w is AMT, do not set
4759 * DRV_LOAD until the interface is up. For all other cases,
4760 * let the f/w know that the h/w is now under the control
4761 * of the driver. */
4762 if (adapter->hw.mac_type != e1000_82573 ||
4763 !e1000_check_mng_mode(&adapter->hw))
4764 e1000_get_hw_control(adapter);
2d7edb92 4765
1da177e4
LT		 4766 return 0;
4767}
4768#endif
c653e635
AK		 4769
4770static void e1000_shutdown(struct pci_dev *pdev)
4771{
4772 e1000_suspend(pdev, PMSG_SUSPEND);
4773}
4774
1da177e4
LT		 4775#ifdef CONFIG_NET_POLL_CONTROLLER
4776/*
4777 * Polling 'interrupt' - used by things like netconsole to send skbs
4778 * without having to re-enable interrupts. It's not called while
4779 * the interrupt routine is executing.
4780 */
4781static void
2648345f 4782e1000_netpoll(struct net_device *netdev)
1da177e4 4783{
60490fe0 4784 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4785
1da177e4
LT		 4786 disable_irq(adapter->pdev->irq);
4787 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4788 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4789#ifndef CONFIG_E1000_NAPI
4790 adapter->clean_rx(adapter, adapter->rx_ring);
4791#endif
1da177e4
LT		 4792 enable_irq(adapter->pdev->irq);
4793}
4794#endif
4795
9026729b
AK		 4796/**
4797 * e1000_io_error_detected - called when PCI error is detected
4798 * @pdev: Pointer to PCI device
4799 * @state: The current pci conneection state
4800 *
4801 * This function is called after a PCI bus error affecting
4802 * this device has been detected.
4803 */
4804static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4805{
4806 struct net_device *netdev = pci_get_drvdata(pdev);
4807 struct e1000_adapter *adapter = netdev->priv;
4808
4809 netif_device_detach(netdev);
4810
4811 if (netif_running(netdev))
4812 e1000_down(adapter);
72e8d6bb 4813 pci_disable_device(pdev);
9026729b
AK		 4814
4815 /* Request a slot slot reset. */
4816 return PCI_ERS_RESULT_NEED_RESET;
4817}
4818
4819/**
4820 * e1000_io_slot_reset - called after the pci bus has been reset.
4821 * @pdev: Pointer to PCI device
4822 *
4823 * Restart the card from scratch, as if from a cold-boot. Implementation
4824 * resembles the first-half of the e1000_resume routine.
4825 */
4826static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4827{
4828 struct net_device *netdev = pci_get_drvdata(pdev);
4829 struct e1000_adapter *adapter = netdev->priv;
4830
4831 if (pci_enable_device(pdev)) {
4832 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4833 return PCI_ERS_RESULT_DISCONNECT;
4834 }
4835 pci_set_master(pdev);
4836
4837 pci_enable_wake(pdev, 3, 0);
4838 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4839
4840 /* Perform card reset only on one instance of the card */
4841 if (PCI_FUNC (pdev->devfn) != 0)
4842 return PCI_ERS_RESULT_RECOVERED;
4843
4844 e1000_reset(adapter);
4845 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4846
4847 return PCI_ERS_RESULT_RECOVERED;
4848}
4849
4850/**
4851 * e1000_io_resume - called when traffic can start flowing again.
4852 * @pdev: Pointer to PCI device
4853 *
4854 * This callback is called when the error recovery driver tells us that
4855 * its OK to resume normal operation. Implementation resembles the
4856 * second-half of the e1000_resume routine.
4857 */
4858static void e1000_io_resume(struct pci_dev *pdev)
4859{
4860 struct net_device *netdev = pci_get_drvdata(pdev);
4861 struct e1000_adapter *adapter = netdev->priv;
4862 uint32_t manc, swsm;
4863
4864 if (netif_running(netdev)) {
4865 if (e1000_up(adapter)) {
4866 printk("e1000: can't bring device back up after reset\n");
4867 return;
4868 }
4869 }
4870
4871 netif_device_attach(netdev);
4872
4873 if (adapter->hw.mac_type >= e1000_82540 &&
4874 adapter->hw.media_type == e1000_media_type_copper) {
4875 manc = E1000_READ_REG(&adapter->hw, MANC);
4876 manc &= ~(E1000_MANC_ARP_EN);
4877 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4878 }
4879
4880 switch (adapter->hw.mac_type) {
4881 case e1000_82573:
4882 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4883 E1000_WRITE_REG(&adapter->hw, SWSM,
4884 swsm | E1000_SWSM_DRV_LOAD);
4885 break;
4886 default:
4887 break;
4888 }
4889
4890 if (netif_running(netdev))
4891 mod_timer(&adapter->watchdog_timer, jiffies);
4892}
4893
1da177e4 4894/* e1000_main.c */
Linux kernel - Deliverables
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