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e1000: remove unused code and make symbols static
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
1da177e4 31char e1000_driver_name[] = "e1000";
3ad2cc67 32static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 33#ifndef CONFIG_E1000_NAPI
34#define DRIVERNAPI
35#else
36#define DRIVERNAPI "-NAPI"
37#endif
7cc33234 38#define DRV_VERSION "7.2.7-k2"DRIVERNAPI
1da177e4 39char e1000_driver_version[] = DRV_VERSION;
3d41e30a 40static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
49static struct pci_device_id e1000_pci_tbl[] = {
50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 101 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
b7ee49db 102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
1da177e4
LT		 106 /* required last entry */
107 {0,}
108};
109
110MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
111
35574764
NN		 112int e1000_up(struct e1000_adapter *adapter);
113void e1000_down(struct e1000_adapter *adapter);
114void e1000_reinit_locked(struct e1000_adapter *adapter);
115void e1000_reset(struct e1000_adapter *adapter);
116int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
117int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
118int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
119void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
120void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 121static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 122 struct e1000_tx_ring *txdr);
3ad2cc67 123static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 124 struct e1000_rx_ring *rxdr);
3ad2cc67 125static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 126 struct e1000_tx_ring *tx_ring);
3ad2cc67 127static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 128 struct e1000_rx_ring *rx_ring);
129void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 130
131static int e1000_init_module(void);
132static void e1000_exit_module(void);
133static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
134static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 135static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 136static int e1000_sw_init(struct e1000_adapter *adapter);
137static int e1000_open(struct net_device *netdev);
138static int e1000_close(struct net_device *netdev);
139static void e1000_configure_tx(struct e1000_adapter *adapter);
140static void e1000_configure_rx(struct e1000_adapter *adapter);
141static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 142static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
143static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
144static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
145 struct e1000_tx_ring *tx_ring);
146static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 148static void e1000_set_multi(struct net_device *netdev);
149static void e1000_update_phy_info(unsigned long data);
150static void e1000_watchdog(unsigned long data);
1da177e4
LT		 151static void e1000_82547_tx_fifo_stall(unsigned long data);
152static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155static int e1000_set_mac(struct net_device *netdev, void *p);
156static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 157static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
1da177e4 159#ifdef CONFIG_E1000_NAPI
581d708e 160static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 161static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 162 struct e1000_rx_ring *rx_ring,
1da177e4 163 int *work_done, int work_to_do);
2d7edb92 164static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 165 struct e1000_rx_ring *rx_ring,
2d7edb92 166 int *work_done, int work_to_do);
1da177e4 167#else
581d708e
MC		 168static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
1da177e4 172#endif
581d708e 173static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 174 struct e1000_rx_ring *rx_ring,
175 int cleaned_count);
581d708e 176static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 177 struct e1000_rx_ring *rx_ring,
178 int cleaned_count);
1da177e4
LT		 179static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
180static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
181 int cmd);
35574764 182void e1000_set_ethtool_ops(struct net_device *netdev);
1da177e4
LT		 183static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
184static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
185static void e1000_tx_timeout(struct net_device *dev);
87041639 186static void e1000_reset_task(struct net_device *dev);
1da177e4 187static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 188static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
189 struct sk_buff *skb);
1da177e4
LT		 190
191static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
192static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
193static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
194static void e1000_restore_vlan(struct e1000_adapter *adapter);
195
977e74b5 196static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 197#ifdef CONFIG_PM
1da177e4
LT		 198static int e1000_resume(struct pci_dev *pdev);
199#endif
c653e635 200static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 201
202#ifdef CONFIG_NET_POLL_CONTROLLER
203/* for netdump / net console */
204static void e1000_netpoll (struct net_device *netdev);
205#endif
206
35574764
NN		 207extern void e1000_check_options(struct e1000_adapter *adapter);
208
9026729b
AK		 209static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
210 pci_channel_state_t state);
211static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
212static void e1000_io_resume(struct pci_dev *pdev);
213
214static struct pci_error_handlers e1000_err_handler = {
215 .error_detected = e1000_io_error_detected,
216 .slot_reset = e1000_io_slot_reset,
217 .resume = e1000_io_resume,
218};
24025e4e 219
1da177e4
LT		 220static struct pci_driver e1000_driver = {
221 .name = e1000_driver_name,
222 .id_table = e1000_pci_tbl,
223 .probe = e1000_probe,
224 .remove = __devexit_p(e1000_remove),
c4e24f01 225#ifdef CONFIG_PM
1da177e4 226 /* Power Managment Hooks */
1da177e4 227 .suspend = e1000_suspend,
c653e635 228 .resume = e1000_resume,
1da177e4 229#endif
9026729b
AK		 230 .shutdown = e1000_shutdown,
231 .err_handler = &e1000_err_handler
1da177e4
LT		 232};
233
234MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
235MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
236MODULE_LICENSE("GPL");
237MODULE_VERSION(DRV_VERSION);
238
239static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
240module_param(debug, int, 0);
241MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
242
243/**
244 * e1000_init_module - Driver Registration Routine
245 *
246 * e1000_init_module is the first routine called when the driver is
247 * loaded. All it does is register with the PCI subsystem.
248 **/
249
250static int __init
251e1000_init_module(void)
252{
253 int ret;
254 printk(KERN_INFO "%s - version %s\n",
255 e1000_driver_string, e1000_driver_version);
256
257 printk(KERN_INFO "%s\n", e1000_copyright);
258
29917620 259 ret = pci_register_driver(&e1000_driver);
8b378def 260
1da177e4
LT		 261 return ret;
262}
263
264module_init(e1000_init_module);
265
266/**
267 * e1000_exit_module - Driver Exit Cleanup Routine
268 *
269 * e1000_exit_module is called just before the driver is removed
270 * from memory.
271 **/
272
273static void __exit
274e1000_exit_module(void)
275{
1da177e4
LT		 276 pci_unregister_driver(&e1000_driver);
277}
278
279module_exit(e1000_exit_module);
280
2db10a08
AK		 281static int e1000_request_irq(struct e1000_adapter *adapter)
282{
283 struct net_device *netdev = adapter->netdev;
284 int flags, err = 0;
285
c0bc8721 286 flags = IRQF_SHARED;
2db10a08
AK		 287#ifdef CONFIG_PCI_MSI
288 if (adapter->hw.mac_type > e1000_82547_rev_2) {
289 adapter->have_msi = TRUE;
290 if ((err = pci_enable_msi(adapter->pdev))) {
291 DPRINTK(PROBE, ERR,
292 "Unable to allocate MSI interrupt Error: %d\n", err);
293 adapter->have_msi = FALSE;
294 }
295 }
296 if (adapter->have_msi)
61ef5c00 297 flags &= ~IRQF_SHARED;
2db10a08
AK		 298#endif
299 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
300 netdev->name, netdev)))
301 DPRINTK(PROBE, ERR,
302 "Unable to allocate interrupt Error: %d\n", err);
303
304 return err;
305}
306
307static void e1000_free_irq(struct e1000_adapter *adapter)
308{
309 struct net_device *netdev = adapter->netdev;
310
311 free_irq(adapter->pdev->irq, netdev);
312
313#ifdef CONFIG_PCI_MSI
314 if (adapter->have_msi)
315 pci_disable_msi(adapter->pdev);
316#endif
317}
318
1da177e4
LT		 319/**
320 * e1000_irq_disable - Mask off interrupt generation on the NIC
321 * @adapter: board private structure
322 **/
323
e619d523 324static void
1da177e4
LT		 325e1000_irq_disable(struct e1000_adapter *adapter)
326{
327 atomic_inc(&adapter->irq_sem);
328 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
329 E1000_WRITE_FLUSH(&adapter->hw);
330 synchronize_irq(adapter->pdev->irq);
331}
332
333/**
334 * e1000_irq_enable - Enable default interrupt generation settings
335 * @adapter: board private structure
336 **/
337
e619d523 338static void
1da177e4
LT		 339e1000_irq_enable(struct e1000_adapter *adapter)
340{
96838a40 341 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 342 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
343 E1000_WRITE_FLUSH(&adapter->hw);
344 }
345}
3ad2cc67
AB		 346
347static void
2d7edb92
MC		 348e1000_update_mng_vlan(struct e1000_adapter *adapter)
349{
350 struct net_device *netdev = adapter->netdev;
351 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
352 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 353 if (adapter->vlgrp) {
354 if (!adapter->vlgrp->vlan_devices[vid]) {
355 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 356 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
357 e1000_vlan_rx_add_vid(netdev, vid);
358 adapter->mng_vlan_id = vid;
359 } else
360 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 361
362 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
363 (vid != old_vid) &&
2d7edb92
MC		 364 !adapter->vlgrp->vlan_devices[old_vid])
365 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 366 } else
367 adapter->mng_vlan_id = vid;
2d7edb92
MC		 368 }
369}
b55ccb35
JK		 370
371/**
372 * e1000_release_hw_control - release control of the h/w to f/w
373 * @adapter: address of board private structure
374 *
375 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
376 * For ASF and Pass Through versions of f/w this means that the
377 * driver is no longer loaded. For AMT version (only with 82573) i
378 * of the f/w this means that the netowrk i/f is closed.
76c224bc 379 *
b55ccb35
JK		 380 **/
381
e619d523 382static void
b55ccb35
JK		 383e1000_release_hw_control(struct e1000_adapter *adapter)
384{
385 uint32_t ctrl_ext;
386 uint32_t swsm;
cd94dd0b 387 uint32_t extcnf;
b55ccb35
JK		 388
389 /* Let firmware taken over control of h/w */
390 switch (adapter->hw.mac_type) {
391 case e1000_82571:
392 case e1000_82572:
4cc15f54 393 case e1000_80003es2lan:
b55ccb35
JK		 394 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
395 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
396 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
397 break;
398 case e1000_82573:
399 swsm = E1000_READ_REG(&adapter->hw, SWSM);
400 E1000_WRITE_REG(&adapter->hw, SWSM,
401 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 402 case e1000_ich8lan:
403 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
404 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
405 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
406 break;
b55ccb35
JK		 407 default:
408 break;
409 }
410}
411
412/**
413 * e1000_get_hw_control - get control of the h/w from f/w
414 * @adapter: address of board private structure
415 *
416 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 417 * For ASF and Pass Through versions of f/w this means that
418 * the driver is loaded. For AMT version (only with 82573)
b55ccb35 419 * of the f/w this means that the netowrk i/f is open.
76c224bc 420 *
b55ccb35
JK		 421 **/
422
e619d523 423static void
b55ccb35
JK		 424e1000_get_hw_control(struct e1000_adapter *adapter)
425{
426 uint32_t ctrl_ext;
427 uint32_t swsm;
cd94dd0b 428 uint32_t extcnf;
b55ccb35
JK		 429 /* Let firmware know the driver has taken over */
430 switch (adapter->hw.mac_type) {
431 case e1000_82571:
432 case e1000_82572:
4cc15f54 433 case e1000_80003es2lan:
b55ccb35
JK		 434 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
435 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
436 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
437 break;
438 case e1000_82573:
439 swsm = E1000_READ_REG(&adapter->hw, SWSM);
440 E1000_WRITE_REG(&adapter->hw, SWSM,
441 swsm | E1000_SWSM_DRV_LOAD);
442 break;
cd94dd0b
AK		 443 case e1000_ich8lan:
444 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
445 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
446 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
447 break;
b55ccb35
JK		 448 default:
449 break;
450 }
451}
452
1da177e4
LT		 453int
454e1000_up(struct e1000_adapter *adapter)
455{
456 struct net_device *netdev = adapter->netdev;
2db10a08 457 int i;
1da177e4
LT		 458
459 /* hardware has been reset, we need to reload some things */
460
1da177e4
LT		 461 e1000_set_multi(netdev);
462
463 e1000_restore_vlan(adapter);
464
465 e1000_configure_tx(adapter);
466 e1000_setup_rctl(adapter);
467 e1000_configure_rx(adapter);
72d64a43
JK		 468 /* call E1000_DESC_UNUSED which always leaves
469 * at least 1 descriptor unused to make sure
470 * next_to_use != next_to_clean */
f56799ea 471 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 472 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 473 adapter->alloc_rx_buf(adapter, ring,
474 E1000_DESC_UNUSED(ring));
f56799ea 475 }
1da177e4 476
7bfa4816
JK		 477 adapter->tx_queue_len = netdev->tx_queue_len;
478
1da177e4 479 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 480
481#ifdef CONFIG_E1000_NAPI
482 netif_poll_enable(netdev);
483#endif
5de55624
MC		 484 e1000_irq_enable(adapter);
485
1da177e4
LT		 486 return 0;
487}
488
79f05bf0
AK		 489/**
490 * e1000_power_up_phy - restore link in case the phy was powered down
491 * @adapter: address of board private structure
492 *
493 * The phy may be powered down to save power and turn off link when the
494 * driver is unloaded and wake on lan is not enabled (among others)
495 * *** this routine MUST be followed by a call to e1000_reset ***
496 *
497 **/
498
d658266e 499void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 500{
501 uint16_t mii_reg = 0;
502
503 /* Just clear the power down bit to wake the phy back up */
504 if (adapter->hw.media_type == e1000_media_type_copper) {
505 /* according to the manual, the phy will retain its
506 * settings across a power-down/up cycle */
507 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
508 mii_reg &= ~MII_CR_POWER_DOWN;
509 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
510 }
511}
512
513static void e1000_power_down_phy(struct e1000_adapter *adapter)
514{
515 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
516 e1000_check_mng_mode(&adapter->hw);
517 /* Power down the PHY so no link is implied when interface is down
518 * The PHY cannot be powered down if any of the following is TRUE
519 * (a) WoL is enabled
520 * (b) AMT is active
521 * (c) SoL/IDER session is active */
522 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 523 adapter->hw.mac_type != e1000_ich8lan &&
79f05bf0
AK		 524 adapter->hw.media_type == e1000_media_type_copper &&
525 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
526 !mng_mode_enabled &&
527 !e1000_check_phy_reset_block(&adapter->hw)) {
528 uint16_t mii_reg = 0;
529 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
530 mii_reg |= MII_CR_POWER_DOWN;
531 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
532 mdelay(1);
533 }
534}
535
1da177e4
LT		 536void
537e1000_down(struct e1000_adapter *adapter)
538{
539 struct net_device *netdev = adapter->netdev;
540
541 e1000_irq_disable(adapter);
c1605eb3 542
1da177e4
LT		 543 del_timer_sync(&adapter->tx_fifo_stall_timer);
544 del_timer_sync(&adapter->watchdog_timer);
545 del_timer_sync(&adapter->phy_info_timer);
546
547#ifdef CONFIG_E1000_NAPI
548 netif_poll_disable(netdev);
549#endif
7bfa4816 550 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 551 adapter->link_speed = 0;
552 adapter->link_duplex = 0;
553 netif_carrier_off(netdev);
554 netif_stop_queue(netdev);
555
556 e1000_reset(adapter);
581d708e
MC		 557 e1000_clean_all_tx_rings(adapter);
558 e1000_clean_all_rx_rings(adapter);
1da177e4 559}
1da177e4 560
2db10a08
AK		 561void
562e1000_reinit_locked(struct e1000_adapter *adapter)
563{
564 WARN_ON(in_interrupt());
565 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
566 msleep(1);
567 e1000_down(adapter);
568 e1000_up(adapter);
569 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 570}
571
572void
573e1000_reset(struct e1000_adapter *adapter)
574{
2d7edb92 575 uint32_t pba, manc;
1125ecbc 576 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 577
578 /* Repartition Pba for greater than 9k mtu
579 * To take effect CTRL.RST is required.
580 */
581
2d7edb92
MC		 582 switch (adapter->hw.mac_type) {
583 case e1000_82547:
0e6ef3e0 584 case e1000_82547_rev_2:
2d7edb92
MC		 585 pba = E1000_PBA_30K;
586 break;
868d5309
MC		 587 case e1000_82571:
588 case e1000_82572:
6418ecc6 589 case e1000_80003es2lan:
868d5309
MC		 590 pba = E1000_PBA_38K;
591 break;
2d7edb92
MC		 592 case e1000_82573:
593 pba = E1000_PBA_12K;
594 break;
cd94dd0b
AK		 595 case e1000_ich8lan:
596 pba = E1000_PBA_8K;
597 break;
2d7edb92
MC		 598 default:
599 pba = E1000_PBA_48K;
600 break;
601 }
602
96838a40 603 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 604 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 605 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 606
607
96838a40 608 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 609 adapter->tx_fifo_head = 0;
610 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
611 adapter->tx_fifo_size =
612 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
613 atomic_set(&adapter->tx_fifo_stall, 0);
614 }
2d7edb92 615
1da177e4
LT		 616 E1000_WRITE_REG(&adapter->hw, PBA, pba);
617
618 /* flow control settings */
f11b7f85
JK		 619 /* Set the FC high water mark to 90% of the FIFO size.
620 * Required to clear last 3 LSB */
621 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 622 /* We can't use 90% on small FIFOs because the remainder
623 * would be less than 1 full frame. In this case, we size
624 * it to allow at least a full frame above the high water
625 * mark. */
626 if (pba < E1000_PBA_16K)
627 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 628
629 adapter->hw.fc_high_water = fc_high_water_mark;
630 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 631 if (adapter->hw.mac_type == e1000_80003es2lan)
632 adapter->hw.fc_pause_time = 0xFFFF;
633 else
634 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 635 adapter->hw.fc_send_xon = 1;
636 adapter->hw.fc = adapter->hw.original_fc;
637
2d7edb92 638 /* Allow time for pending master requests to run */
1da177e4 639 e1000_reset_hw(&adapter->hw);
96838a40 640 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 641 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 642 if (e1000_init_hw(&adapter->hw))
1da177e4 643 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 644 e1000_update_mng_vlan(adapter);
1da177e4
LT		 645 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
646 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
647
648 e1000_reset_adaptive(&adapter->hw);
649 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 650
651 if (!adapter->smart_power_down &&
652 (adapter->hw.mac_type == e1000_82571 ||
653 adapter->hw.mac_type == e1000_82572)) {
654 uint16_t phy_data = 0;
655 /* speed up time to link by disabling smart power down, ignore
656 * the return value of this function because there is nothing
657 * different we would do if it failed */
658 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
659 &phy_data);
660 phy_data &= ~IGP02E1000_PM_SPD;
661 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
662 phy_data);
663 }
664
cd94dd0b
AK		 665 if (adapter->hw.mac_type < e1000_ich8lan)
666 /* FIXME: this code is duplicate and wrong for PCI Express */
2d7edb92
MC		 667 if (adapter->en_mng_pt) {
668 manc = E1000_READ_REG(&adapter->hw, MANC);
669 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
670 E1000_WRITE_REG(&adapter->hw, MANC, manc);
671 }
1da177e4
LT		 672}
673
674/**
675 * e1000_probe - Device Initialization Routine
676 * @pdev: PCI device information struct
677 * @ent: entry in e1000_pci_tbl
678 *
679 * Returns 0 on success, negative on failure
680 *
681 * e1000_probe initializes an adapter identified by a pci_dev structure.
682 * The OS initialization, configuring of the adapter private structure,
683 * and a hardware reset occur.
684 **/
685
686static int __devinit
687e1000_probe(struct pci_dev *pdev,
688 const struct pci_device_id *ent)
689{
690 struct net_device *netdev;
691 struct e1000_adapter *adapter;
2d7edb92 692 unsigned long mmio_start, mmio_len;
cd94dd0b 693 unsigned long flash_start, flash_len;
2d7edb92 694
1da177e4 695 static int cards_found = 0;
120cd576 696 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 697 int i, err, pci_using_dac;
120cd576 698 uint16_t eeprom_data = 0;
1da177e4 699 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 700 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 701 return err;
702
cd94dd0b
AK		 703 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
704 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 705 pci_using_dac = 1;
706 } else {
cd94dd0b
AK		 707 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
708 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 709 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 710 goto err_dma;
1da177e4
LT		 711 }
712 pci_using_dac = 0;
713 }
714
96838a40 715 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 716 goto err_pci_reg;
1da177e4
LT		 717
718 pci_set_master(pdev);
719
6dd62ab0 720 err = -ENOMEM;
1da177e4 721 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 722 if (!netdev)
1da177e4 723 goto err_alloc_etherdev;
1da177e4
LT		 724
725 SET_MODULE_OWNER(netdev);
726 SET_NETDEV_DEV(netdev, &pdev->dev);
727
728 pci_set_drvdata(pdev, netdev);
60490fe0 729 adapter = netdev_priv(netdev);
1da177e4
LT		 730 adapter->netdev = netdev;
731 adapter->pdev = pdev;
732 adapter->hw.back = adapter;
733 adapter->msg_enable = (1 << debug) - 1;
734
735 mmio_start = pci_resource_start(pdev, BAR_0);
736 mmio_len = pci_resource_len(pdev, BAR_0);
737
6dd62ab0 738 err = -EIO;
1da177e4 739 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 740 if (!adapter->hw.hw_addr)
1da177e4 741 goto err_ioremap;
1da177e4 742
96838a40
JB		 743 for (i = BAR_1; i <= BAR_5; i++) {
744 if (pci_resource_len(pdev, i) == 0)
1da177e4 745 continue;
96838a40 746 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 747 adapter->hw.io_base = pci_resource_start(pdev, i);
748 break;
749 }
750 }
751
752 netdev->open = &e1000_open;
753 netdev->stop = &e1000_close;
754 netdev->hard_start_xmit = &e1000_xmit_frame;
755 netdev->get_stats = &e1000_get_stats;
756 netdev->set_multicast_list = &e1000_set_multi;
757 netdev->set_mac_address = &e1000_set_mac;
758 netdev->change_mtu = &e1000_change_mtu;
759 netdev->do_ioctl = &e1000_ioctl;
760 e1000_set_ethtool_ops(netdev);
761 netdev->tx_timeout = &e1000_tx_timeout;
762 netdev->watchdog_timeo = 5 * HZ;
763#ifdef CONFIG_E1000_NAPI
764 netdev->poll = &e1000_clean;
765 netdev->weight = 64;
766#endif
767 netdev->vlan_rx_register = e1000_vlan_rx_register;
768 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
769 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
770#ifdef CONFIG_NET_POLL_CONTROLLER
771 netdev->poll_controller = e1000_netpoll;
772#endif
0eb5a34c 773 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 774
775 netdev->mem_start = mmio_start;
776 netdev->mem_end = mmio_start + mmio_len;
777 netdev->base_addr = adapter->hw.io_base;
778
779 adapter->bd_number = cards_found;
780
781 /* setup the private structure */
782
96838a40 783 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 784 goto err_sw_init;
785
6dd62ab0 786 err = -EIO;
cd94dd0b
AK		 787 /* Flash BAR mapping must happen after e1000_sw_init
788 * because it depends on mac_type */
789 if ((adapter->hw.mac_type == e1000_ich8lan) &&
790 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
791 flash_start = pci_resource_start(pdev, 1);
792 flash_len = pci_resource_len(pdev, 1);
793 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 794 if (!adapter->hw.flash_address)
cd94dd0b 795 goto err_flashmap;
cd94dd0b
AK		 796 }
797
6dd62ab0 798 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 799 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
800
96838a40 801 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 802 netdev->features = NETIF_F_SG |
803 NETIF_F_HW_CSUM |
804 NETIF_F_HW_VLAN_TX |
805 NETIF_F_HW_VLAN_RX |
806 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 807 if (adapter->hw.mac_type == e1000_ich8lan)
808 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 809 }
810
811#ifdef NETIF_F_TSO
96838a40 812 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 813 (adapter->hw.mac_type != e1000_82547))
814 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 815
816#ifdef NETIF_F_TSO_IPV6
96838a40 817 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 818 netdev->features |= NETIF_F_TSO_IPV6;
819#endif
1da177e4 820#endif
96838a40 821 if (pci_using_dac)
1da177e4
LT		 822 netdev->features |= NETIF_F_HIGHDMA;
823
76c224bc
AK		 824 netdev->features |= NETIF_F_LLTX;
825
2d7edb92
MC		 826 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
827
cd94dd0b
AK		 828 /* initialize eeprom parameters */
829
830 if (e1000_init_eeprom_params(&adapter->hw)) {
831 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 832 goto err_eeprom;
cd94dd0b
AK		 833 }
834
96838a40 835 /* before reading the EEPROM, reset the controller to
1da177e4 836 * put the device in a known good starting state */
96838a40 837
1da177e4
LT		 838 e1000_reset_hw(&adapter->hw);
839
840 /* make sure the EEPROM is good */
841
96838a40 842 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 843 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 844 goto err_eeprom;
845 }
846
847 /* copy the MAC address out of the EEPROM */
848
96838a40 849 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 850 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
851 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 852 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 853
96838a40 854 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 855 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 856 goto err_eeprom;
857 }
858
1da177e4
LT		 859 e1000_get_bus_info(&adapter->hw);
860
861 init_timer(&adapter->tx_fifo_stall_timer);
862 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
863 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
864
865 init_timer(&adapter->watchdog_timer);
866 adapter->watchdog_timer.function = &e1000_watchdog;
867 adapter->watchdog_timer.data = (unsigned long) adapter;
868
1da177e4
LT		 869 init_timer(&adapter->phy_info_timer);
870 adapter->phy_info_timer.function = &e1000_update_phy_info;
871 adapter->phy_info_timer.data = (unsigned long) adapter;
872
87041639
JK		 873 INIT_WORK(&adapter->reset_task,
874 (void (*)(void *))e1000_reset_task, netdev);
1da177e4
LT		 875
876 /* we're going to reset, so assume we have no link for now */
877
878 netif_carrier_off(netdev);
879 netif_stop_queue(netdev);
880
881 e1000_check_options(adapter);
882
883 /* Initial Wake on LAN setting
884 * If APM wake is enabled in the EEPROM,
885 * enable the ACPI Magic Packet filter
886 */
887
96838a40 888 switch (adapter->hw.mac_type) {
1da177e4
LT		 889 case e1000_82542_rev2_0:
890 case e1000_82542_rev2_1:
891 case e1000_82543:
892 break;
893 case e1000_82544:
894 e1000_read_eeprom(&adapter->hw,
895 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
896 eeprom_apme_mask = E1000_EEPROM_82544_APM;
897 break;
cd94dd0b
AK		 898 case e1000_ich8lan:
899 e1000_read_eeprom(&adapter->hw,
900 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
901 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
902 break;
1da177e4
LT		 903 case e1000_82546:
904 case e1000_82546_rev_3:
fd803241 905 case e1000_82571:
6418ecc6 906 case e1000_80003es2lan:
96838a40 907 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 908 e1000_read_eeprom(&adapter->hw,
909 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
910 break;
911 }
912 /* Fall Through */
913 default:
914 e1000_read_eeprom(&adapter->hw,
915 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
916 break;
917 }
96838a40 918 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 919 adapter->eeprom_wol |= E1000_WUFC_MAG;
920
921 /* now that we have the eeprom settings, apply the special cases
922 * where the eeprom may be wrong or the board simply won't support
923 * wake on lan on a particular port */
924 switch (pdev->device) {
925 case E1000_DEV_ID_82546GB_PCIE:
926 adapter->eeprom_wol = 0;
927 break;
928 case E1000_DEV_ID_82546EB_FIBER:
929 case E1000_DEV_ID_82546GB_FIBER:
930 case E1000_DEV_ID_82571EB_FIBER:
931 /* Wake events only supported on port A for dual fiber
932 * regardless of eeprom setting */
933 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
934 adapter->eeprom_wol = 0;
935 break;
936 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 937 case E1000_DEV_ID_82571EB_QUAD_COPPER:
120cd576
JB		 938 /* if quad port adapter, disable WoL on all but port A */
939 if (global_quad_port_a != 0)
940 adapter->eeprom_wol = 0;
941 else
942 adapter->quad_port_a = 1;
943 /* Reset for multiple quad port adapters */
944 if (++global_quad_port_a == 4)
945 global_quad_port_a = 0;
946 break;
947 }
948
949 /* initialize the wol settings based on the eeprom settings */
950 adapter->wol = adapter->eeprom_wol;
1da177e4 951
fb3d47d4
JK		 952 /* print bus type/speed/width info */
953 {
954 struct e1000_hw *hw = &adapter->hw;
955 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
956 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
957 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
958 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
959 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
960 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
961 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
962 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
963 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
964 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
965 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
966 "32-bit"));
967 }
968
969 for (i = 0; i < 6; i++)
970 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
971
1da177e4
LT		 972 /* reset the hardware with the new settings */
973 e1000_reset(adapter);
974
b55ccb35
JK		 975 /* If the controller is 82573 and f/w is AMT, do not set
976 * DRV_LOAD until the interface is up. For all other cases,
977 * let the f/w know that the h/w is now under the control
978 * of the driver. */
979 if (adapter->hw.mac_type != e1000_82573 ||
980 !e1000_check_mng_mode(&adapter->hw))
981 e1000_get_hw_control(adapter);
2d7edb92 982
1da177e4 983 strcpy(netdev->name, "eth%d");
96838a40 984 if ((err = register_netdev(netdev)))
1da177e4
LT		 985 goto err_register;
986
987 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
988
989 cards_found++;
990 return 0;
991
992err_register:
6dd62ab0
VA		 993 e1000_release_hw_control(adapter);
994err_eeprom:
995 if (!e1000_check_phy_reset_block(&adapter->hw))
996 e1000_phy_hw_reset(&adapter->hw);
997
cd94dd0b
AK		 998 if (adapter->hw.flash_address)
999 iounmap(adapter->hw.flash_address);
1000err_flashmap:
6dd62ab0
VA		 1001#ifdef CONFIG_E1000_NAPI
1002 for (i = 0; i < adapter->num_rx_queues; i++)
1003 dev_put(&adapter->polling_netdev[i]);
1004#endif
1005
1006 kfree(adapter->tx_ring);
1007 kfree(adapter->rx_ring);
1008#ifdef CONFIG_E1000_NAPI
1009 kfree(adapter->polling_netdev);
1010#endif
1da177e4 1011err_sw_init:
1da177e4
LT		 1012 iounmap(adapter->hw.hw_addr);
1013err_ioremap:
1014 free_netdev(netdev);
1015err_alloc_etherdev:
1016 pci_release_regions(pdev);
6dd62ab0
VA		 1017err_pci_reg:
1018err_dma:
1019 pci_disable_device(pdev);
1da177e4
LT		 1020 return err;
1021}
1022
1023/**
1024 * e1000_remove - Device Removal Routine
1025 * @pdev: PCI device information struct
1026 *
1027 * e1000_remove is called by the PCI subsystem to alert the driver
1028 * that it should release a PCI device. The could be caused by a
1029 * Hot-Plug event, or because the driver is going to be removed from
1030 * memory.
1031 **/
1032
1033static void __devexit
1034e1000_remove(struct pci_dev *pdev)
1035{
1036 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1037 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 1038 uint32_t manc;
581d708e
MC		 1039#ifdef CONFIG_E1000_NAPI
1040 int i;
1041#endif
1da177e4 1042
be2b28ed
JG		 1043 flush_scheduled_work();
1044
96838a40 1045 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 1046 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 1047 adapter->hw.media_type == e1000_media_type_copper) {
1048 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 1049 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 1050 manc |= E1000_MANC_ARP_EN;
1051 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1052 }
1053 }
1054
b55ccb35
JK		 1055 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1056 * would have already happened in close and is redundant. */
1057 e1000_release_hw_control(adapter);
2d7edb92 1058
1da177e4 1059 unregister_netdev(netdev);
581d708e 1060#ifdef CONFIG_E1000_NAPI
f56799ea 1061 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1062 dev_put(&adapter->polling_netdev[i]);
581d708e 1063#endif
1da177e4 1064
96838a40 1065 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1066 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1067
24025e4e
MC		 1068 kfree(adapter->tx_ring);
1069 kfree(adapter->rx_ring);
1070#ifdef CONFIG_E1000_NAPI
1071 kfree(adapter->polling_netdev);
1072#endif
1073
1da177e4 1074 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1075 if (adapter->hw.flash_address)
1076 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1077 pci_release_regions(pdev);
1078
1079 free_netdev(netdev);
1080
1081 pci_disable_device(pdev);
1082}
1083
1084/**
1085 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1086 * @adapter: board private structure to initialize
1087 *
1088 * e1000_sw_init initializes the Adapter private data structure.
1089 * Fields are initialized based on PCI device information and
1090 * OS network device settings (MTU size).
1091 **/
1092
1093static int __devinit
1094e1000_sw_init(struct e1000_adapter *adapter)
1095{
1096 struct e1000_hw *hw = &adapter->hw;
1097 struct net_device *netdev = adapter->netdev;
1098 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1099#ifdef CONFIG_E1000_NAPI
1100 int i;
1101#endif
1da177e4
LT		 1102
1103 /* PCI config space info */
1104
1105 hw->vendor_id = pdev->vendor;
1106 hw->device_id = pdev->device;
1107 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1108 hw->subsystem_id = pdev->subsystem_device;
1109
1110 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1111
1112 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1113
eb0f8054 1114 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1115 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1116 hw->max_frame_size = netdev->mtu +
1117 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1118 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1119
1120 /* identify the MAC */
1121
96838a40 1122 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1123 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1124 return -EIO;
1125 }
1126
96838a40 1127 switch (hw->mac_type) {
1da177e4
LT		 1128 default:
1129 break;
1130 case e1000_82541:
1131 case e1000_82547:
1132 case e1000_82541_rev_2:
1133 case e1000_82547_rev_2:
1134 hw->phy_init_script = 1;
1135 break;
1136 }
1137
1138 e1000_set_media_type(hw);
1139
1140 hw->wait_autoneg_complete = FALSE;
1141 hw->tbi_compatibility_en = TRUE;
1142 hw->adaptive_ifs = TRUE;
1143
1144 /* Copper options */
1145
96838a40 1146 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1147 hw->mdix = AUTO_ALL_MODES;
1148 hw->disable_polarity_correction = FALSE;
1149 hw->master_slave = E1000_MASTER_SLAVE;
1150 }
1151
f56799ea
JK		 1152 adapter->num_tx_queues = 1;
1153 adapter->num_rx_queues = 1;
581d708e
MC		 1154
1155 if (e1000_alloc_queues(adapter)) {
1156 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1157 return -ENOMEM;
1158 }
1159
1160#ifdef CONFIG_E1000_NAPI
f56799ea 1161 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1162 adapter->polling_netdev[i].priv = adapter;
1163 adapter->polling_netdev[i].poll = &e1000_clean;
1164 adapter->polling_netdev[i].weight = 64;
1165 dev_hold(&adapter->polling_netdev[i]);
1166 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1167 }
7bfa4816 1168 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1169#endif
1170
1da177e4
LT		 1171 atomic_set(&adapter->irq_sem, 1);
1172 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1173
1174 return 0;
1175}
1176
581d708e
MC		 1177/**
1178 * e1000_alloc_queues - Allocate memory for all rings
1179 * @adapter: board private structure to initialize
1180 *
1181 * We allocate one ring per queue at run-time since we don't know the
1182 * number of queues at compile-time. The polling_netdev array is
1183 * intended for Multiqueue, but should work fine with a single queue.
1184 **/
1185
1186static int __devinit
1187e1000_alloc_queues(struct e1000_adapter *adapter)
1188{
1189 int size;
1190
f56799ea 1191 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1192 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1193 if (!adapter->tx_ring)
1194 return -ENOMEM;
1195 memset(adapter->tx_ring, 0, size);
1196
f56799ea 1197 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1198 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1199 if (!adapter->rx_ring) {
1200 kfree(adapter->tx_ring);
1201 return -ENOMEM;
1202 }
1203 memset(adapter->rx_ring, 0, size);
1204
1205#ifdef CONFIG_E1000_NAPI
f56799ea 1206 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1207 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1208 if (!adapter->polling_netdev) {
1209 kfree(adapter->tx_ring);
1210 kfree(adapter->rx_ring);
1211 return -ENOMEM;
1212 }
1213 memset(adapter->polling_netdev, 0, size);
1214#endif
1215
1216 return E1000_SUCCESS;
1217}
1218
1da177e4
LT		 1219/**
1220 * e1000_open - Called when a network interface is made active
1221 * @netdev: network interface device structure
1222 *
1223 * Returns 0 on success, negative value on failure
1224 *
1225 * The open entry point is called when a network interface is made
1226 * active by the system (IFF_UP). At this point all resources needed
1227 * for transmit and receive operations are allocated, the interrupt
1228 * handler is registered with the OS, the watchdog timer is started,
1229 * and the stack is notified that the interface is ready.
1230 **/
1231
1232static int
1233e1000_open(struct net_device *netdev)
1234{
60490fe0 1235 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1236 int err;
1237
2db10a08
AK		 1238 /* disallow open during test */
1239 if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
1240 return -EBUSY;
1241
1da177e4
LT		 1242 /* allocate transmit descriptors */
1243
581d708e 1244 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1245 goto err_setup_tx;
1246
1247 /* allocate receive descriptors */
1248
581d708e 1249 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1250 goto err_setup_rx;
1251
2db10a08
AK		 1252 err = e1000_request_irq(adapter);
1253 if (err)
401a552b 1254 goto err_req_irq;
2db10a08 1255
79f05bf0
AK		 1256 e1000_power_up_phy(adapter);
1257
96838a40 1258 if ((err = e1000_up(adapter)))
1da177e4 1259 goto err_up;
2d7edb92 1260 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1261 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1262 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1263 e1000_update_mng_vlan(adapter);
1264 }
1da177e4 1265
b55ccb35
JK		 1266 /* If AMT is enabled, let the firmware know that the network
1267 * interface is now open */
1268 if (adapter->hw.mac_type == e1000_82573 &&
1269 e1000_check_mng_mode(&adapter->hw))
1270 e1000_get_hw_control(adapter);
1271
1da177e4
LT		 1272 return E1000_SUCCESS;
1273
1274err_up:
401a552b
VA		 1275 e1000_power_down_phy(adapter);
1276 e1000_free_irq(adapter);
1277err_req_irq:
581d708e 1278 e1000_free_all_rx_resources(adapter);
1da177e4 1279err_setup_rx:
581d708e 1280 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1281err_setup_tx:
1282 e1000_reset(adapter);
1283
1284 return err;
1285}
1286
1287/**
1288 * e1000_close - Disables a network interface
1289 * @netdev: network interface device structure
1290 *
1291 * Returns 0, this is not allowed to fail
1292 *
1293 * The close entry point is called when an interface is de-activated
1294 * by the OS. The hardware is still under the drivers control, but
1295 * needs to be disabled. A global MAC reset is issued to stop the
1296 * hardware, and all transmit and receive resources are freed.
1297 **/
1298
1299static int
1300e1000_close(struct net_device *netdev)
1301{
60490fe0 1302 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1303
2db10a08 1304 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1305 e1000_down(adapter);
79f05bf0 1306 e1000_power_down_phy(adapter);
2db10a08 1307 e1000_free_irq(adapter);
1da177e4 1308
581d708e
MC		 1309 e1000_free_all_tx_resources(adapter);
1310 e1000_free_all_rx_resources(adapter);
1da177e4 1311
96838a40 1312 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1313 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1314 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1315 }
b55ccb35
JK		 1316
1317 /* If AMT is enabled, let the firmware know that the network
1318 * interface is now closed */
1319 if (adapter->hw.mac_type == e1000_82573 &&
1320 e1000_check_mng_mode(&adapter->hw))
1321 e1000_release_hw_control(adapter);
1322
1da177e4
LT		 1323 return 0;
1324}
1325
1326/**
1327 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1328 * @adapter: address of board private structure
2d7edb92
MC		 1329 * @start: address of beginning of memory
1330 * @len: length of memory
1da177e4 1331 **/
e619d523 1332static boolean_t
1da177e4
LT		 1333e1000_check_64k_bound(struct e1000_adapter *adapter,
1334 void *start, unsigned long len)
1335{
1336 unsigned long begin = (unsigned long) start;
1337 unsigned long end = begin + len;
1338
2648345f
MC		 1339 /* First rev 82545 and 82546 need to not allow any memory
1340 * write location to cross 64k boundary due to errata 23 */
1da177e4 1341 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1342 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1343 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1344 }
1345
1346 return TRUE;
1347}
1348
1349/**
1350 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1351 * @adapter: board private structure
581d708e 1352 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1353 *
1354 * Return 0 on success, negative on failure
1355 **/
1356
3ad2cc67 1357static int
581d708e
MC		 1358e1000_setup_tx_resources(struct e1000_adapter *adapter,
1359 struct e1000_tx_ring *txdr)
1da177e4 1360{
1da177e4
LT		 1361 struct pci_dev *pdev = adapter->pdev;
1362 int size;
1363
1364 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1365 txdr->buffer_info = vmalloc(size);
96838a40 1366 if (!txdr->buffer_info) {
2648345f
MC		 1367 DPRINTK(PROBE, ERR,
1368 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1369 return -ENOMEM;
1370 }
1371 memset(txdr->buffer_info, 0, size);
1372
1373 /* round up to nearest 4K */
1374
1375 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1376 E1000_ROUNDUP(txdr->size, 4096);
1377
1378 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1379 if (!txdr->desc) {
1da177e4 1380setup_tx_desc_die:
1da177e4 1381 vfree(txdr->buffer_info);
2648345f
MC		 1382 DPRINTK(PROBE, ERR,
1383 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1384 return -ENOMEM;
1385 }
1386
2648345f 1387 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1388 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1389 void *olddesc = txdr->desc;
1390 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1391 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1392 "at %p\n", txdr->size, txdr->desc);
1393 /* Try again, without freeing the previous */
1da177e4 1394 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1395 /* Failed allocation, critical failure */
96838a40 1396 if (!txdr->desc) {
1da177e4
LT		 1397 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1398 goto setup_tx_desc_die;
1399 }
1400
1401 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1402 /* give up */
2648345f
MC		 1403 pci_free_consistent(pdev, txdr->size, txdr->desc,
1404 txdr->dma);
1da177e4
LT		 1405 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1406 DPRINTK(PROBE, ERR,
2648345f
MC		 1407 "Unable to allocate aligned memory "
1408 "for the transmit descriptor ring\n");
1da177e4
LT		 1409 vfree(txdr->buffer_info);
1410 return -ENOMEM;
1411 } else {
2648345f 1412 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1413 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1414 }
1415 }
1416 memset(txdr->desc, 0, txdr->size);
1417
1418 txdr->next_to_use = 0;
1419 txdr->next_to_clean = 0;
2ae76d98 1420 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1421
1422 return 0;
1423}
1424
581d708e
MC		 1425/**
1426 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1427 * (Descriptors) for all queues
1428 * @adapter: board private structure
1429 *
581d708e
MC		 1430 * Return 0 on success, negative on failure
1431 **/
1432
1433int
1434e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1435{
1436 int i, err = 0;
1437
f56799ea 1438 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1439 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1440 if (err) {
1441 DPRINTK(PROBE, ERR,
1442 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1443 for (i-- ; i >= 0; i--)
1444 e1000_free_tx_resources(adapter,
1445 &adapter->tx_ring[i]);
581d708e
MC		 1446 break;
1447 }
1448 }
1449
1450 return err;
1451}
1452
1da177e4
LT		 1453/**
1454 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1455 * @adapter: board private structure
1456 *
1457 * Configure the Tx unit of the MAC after a reset.
1458 **/
1459
1460static void
1461e1000_configure_tx(struct e1000_adapter *adapter)
1462{
581d708e
MC		 1463 uint64_t tdba;
1464 struct e1000_hw *hw = &adapter->hw;
1465 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1466 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1467
1468 /* Setup the HW Tx Head and Tail descriptor pointers */
1469
f56799ea 1470 switch (adapter->num_tx_queues) {
24025e4e
MC		 1471 case 1:
1472 default:
581d708e
MC		 1473 tdba = adapter->tx_ring[0].dma;
1474 tdlen = adapter->tx_ring[0].count *
1475 sizeof(struct e1000_tx_desc);
581d708e 1476 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1477 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1478 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1479 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1480 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1481 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1482 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1483 break;
1484 }
1da177e4
LT		 1485
1486 /* Set the default values for the Tx Inter Packet Gap timer */
1487
0fadb059
JK		 1488 if (hw->media_type == e1000_media_type_fiber ||
1489 hw->media_type == e1000_media_type_internal_serdes)
1490 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1491 else
1492 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1493
581d708e 1494 switch (hw->mac_type) {
1da177e4
LT		 1495 case e1000_82542_rev2_0:
1496 case e1000_82542_rev2_1:
1497 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1498 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1499 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1500 break;
87041639
JK		 1501 case e1000_80003es2lan:
1502 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1503 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1504 break;
1da177e4 1505 default:
0fadb059
JK		 1506 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1507 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1508 break;
1da177e4 1509 }
0fadb059
JK		 1510 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1511 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1512 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1513
1514 /* Set the Tx Interrupt Delay register */
1515
581d708e
MC		 1516 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1517 if (hw->mac_type >= e1000_82540)
1518 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1519
1520 /* Program the Transmit Control Register */
1521
581d708e 1522 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1523
1524 tctl &= ~E1000_TCTL_CT;
7e6c9861 1525 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1526 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1527
7e6c9861
JK		 1528#ifdef DISABLE_MULR
1529 /* disable Multiple Reads for debugging */
1530 tctl &= ~E1000_TCTL_MULR;
1531#endif
1da177e4 1532
2ae76d98
MC		 1533 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1534 tarc = E1000_READ_REG(hw, TARC0);
1535 tarc |= ((1 << 25) | (1 << 21));
1536 E1000_WRITE_REG(hw, TARC0, tarc);
1537 tarc = E1000_READ_REG(hw, TARC1);
1538 tarc |= (1 << 25);
1539 if (tctl & E1000_TCTL_MULR)
1540 tarc &= ~(1 << 28);
1541 else
1542 tarc |= (1 << 28);
1543 E1000_WRITE_REG(hw, TARC1, tarc);
87041639
JK		 1544 } else if (hw->mac_type == e1000_80003es2lan) {
1545 tarc = E1000_READ_REG(hw, TARC0);
1546 tarc |= 1;
87041639
JK		 1547 E1000_WRITE_REG(hw, TARC0, tarc);
1548 tarc = E1000_READ_REG(hw, TARC1);
1549 tarc |= 1;
1550 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1551 }
1552
581d708e 1553 e1000_config_collision_dist(hw);
1da177e4
LT		 1554
1555 /* Setup Transmit Descriptor Settings for eop descriptor */
1556 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1557 E1000_TXD_CMD_IFCS;
1558
581d708e 1559 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1560 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1561 else
1562 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1563
1564 /* Cache if we're 82544 running in PCI-X because we'll
1565 * need this to apply a workaround later in the send path. */
581d708e
MC		 1566 if (hw->mac_type == e1000_82544 &&
1567 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1568 adapter->pcix_82544 = 1;
7e6c9861
JK		 1569
1570 E1000_WRITE_REG(hw, TCTL, tctl);
1571
1da177e4
LT		 1572}
1573
1574/**
1575 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1576 * @adapter: board private structure
581d708e 1577 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1578 *
1579 * Returns 0 on success, negative on failure
1580 **/
1581
3ad2cc67 1582static int
581d708e
MC		 1583e1000_setup_rx_resources(struct e1000_adapter *adapter,
1584 struct e1000_rx_ring *rxdr)
1da177e4 1585{
1da177e4 1586 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1587 int size, desc_len;
1da177e4
LT		 1588
1589 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1590 rxdr->buffer_info = vmalloc(size);
581d708e 1591 if (!rxdr->buffer_info) {
2648345f
MC		 1592 DPRINTK(PROBE, ERR,
1593 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1594 return -ENOMEM;
1595 }
1596 memset(rxdr->buffer_info, 0, size);
1597
2d7edb92
MC		 1598 size = sizeof(struct e1000_ps_page) * rxdr->count;
1599 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1600 if (!rxdr->ps_page) {
2d7edb92
MC		 1601 vfree(rxdr->buffer_info);
1602 DPRINTK(PROBE, ERR,
1603 "Unable to allocate memory for the receive descriptor ring\n");
1604 return -ENOMEM;
1605 }
1606 memset(rxdr->ps_page, 0, size);
1607
1608 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1609 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1610 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1611 vfree(rxdr->buffer_info);
1612 kfree(rxdr->ps_page);
1613 DPRINTK(PROBE, ERR,
1614 "Unable to allocate memory for the receive descriptor ring\n");
1615 return -ENOMEM;
1616 }
1617 memset(rxdr->ps_page_dma, 0, size);
1618
96838a40 1619 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1620 desc_len = sizeof(struct e1000_rx_desc);
1621 else
1622 desc_len = sizeof(union e1000_rx_desc_packet_split);
1623
1da177e4
LT		 1624 /* Round up to nearest 4K */
1625
2d7edb92 1626 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1627 E1000_ROUNDUP(rxdr->size, 4096);
1628
1629 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1630
581d708e
MC		 1631 if (!rxdr->desc) {
1632 DPRINTK(PROBE, ERR,
1633 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1634setup_rx_desc_die:
1da177e4 1635 vfree(rxdr->buffer_info);
2d7edb92
MC		 1636 kfree(rxdr->ps_page);
1637 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1638 return -ENOMEM;
1639 }
1640
2648345f 1641 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1642 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1643 void *olddesc = rxdr->desc;
1644 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1645 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1646 "at %p\n", rxdr->size, rxdr->desc);
1647 /* Try again, without freeing the previous */
1da177e4 1648 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1649 /* Failed allocation, critical failure */
581d708e 1650 if (!rxdr->desc) {
1da177e4 1651 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1652 DPRINTK(PROBE, ERR,
1653 "Unable to allocate memory "
1654 "for the receive descriptor ring\n");
1da177e4
LT		 1655 goto setup_rx_desc_die;
1656 }
1657
1658 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1659 /* give up */
2648345f
MC		 1660 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1661 rxdr->dma);
1da177e4 1662 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1663 DPRINTK(PROBE, ERR,
1664 "Unable to allocate aligned memory "
1665 "for the receive descriptor ring\n");
581d708e 1666 goto setup_rx_desc_die;
1da177e4 1667 } else {
2648345f 1668 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1669 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1670 }
1671 }
1672 memset(rxdr->desc, 0, rxdr->size);
1673
1674 rxdr->next_to_clean = 0;
1675 rxdr->next_to_use = 0;
1676
1677 return 0;
1678}
1679
581d708e
MC		 1680/**
1681 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1682 * (Descriptors) for all queues
1683 * @adapter: board private structure
1684 *
581d708e
MC		 1685 * Return 0 on success, negative on failure
1686 **/
1687
1688int
1689e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1690{
1691 int i, err = 0;
1692
f56799ea 1693 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1694 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1695 if (err) {
1696 DPRINTK(PROBE, ERR,
1697 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1698 for (i-- ; i >= 0; i--)
1699 e1000_free_rx_resources(adapter,
1700 &adapter->rx_ring[i]);
581d708e
MC		 1701 break;
1702 }
1703 }
1704
1705 return err;
1706}
1707
1da177e4 1708/**
2648345f 1709 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1710 * @adapter: Board private structure
1711 **/
e4c811c9
MC		 1712#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1713 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1714static void
1715e1000_setup_rctl(struct e1000_adapter *adapter)
1716{
2d7edb92
MC		 1717 uint32_t rctl, rfctl;
1718 uint32_t psrctl = 0;
35ec56bb 1719#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1720 uint32_t pages = 0;
1721#endif
1da177e4
LT		 1722
1723 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1724
1725 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1726
1727 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1728 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1729 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1730
0fadb059 1731 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1732 rctl |= E1000_RCTL_SBP;
1733 else
1734 rctl &= ~E1000_RCTL_SBP;
1735
2d7edb92
MC		 1736 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1737 rctl &= ~E1000_RCTL_LPE;
1738 else
1739 rctl |= E1000_RCTL_LPE;
1740
1da177e4 1741 /* Setup buffer sizes */
9e2feace
AK		 1742 rctl &= ~E1000_RCTL_SZ_4096;
1743 rctl |= E1000_RCTL_BSEX;
1744 switch (adapter->rx_buffer_len) {
1745 case E1000_RXBUFFER_256:
1746 rctl |= E1000_RCTL_SZ_256;
1747 rctl &= ~E1000_RCTL_BSEX;
1748 break;
1749 case E1000_RXBUFFER_512:
1750 rctl |= E1000_RCTL_SZ_512;
1751 rctl &= ~E1000_RCTL_BSEX;
1752 break;
1753 case E1000_RXBUFFER_1024:
1754 rctl |= E1000_RCTL_SZ_1024;
1755 rctl &= ~E1000_RCTL_BSEX;
1756 break;
a1415ee6
JK		 1757 case E1000_RXBUFFER_2048:
1758 default:
1759 rctl |= E1000_RCTL_SZ_2048;
1760 rctl &= ~E1000_RCTL_BSEX;
1761 break;
1762 case E1000_RXBUFFER_4096:
1763 rctl |= E1000_RCTL_SZ_4096;
1764 break;
1765 case E1000_RXBUFFER_8192:
1766 rctl |= E1000_RCTL_SZ_8192;
1767 break;
1768 case E1000_RXBUFFER_16384:
1769 rctl |= E1000_RCTL_SZ_16384;
1770 break;
2d7edb92
MC		 1771 }
1772
35ec56bb 1773#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1774 /* 82571 and greater support packet-split where the protocol
1775 * header is placed in skb->data and the packet data is
1776 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1777 * In the case of a non-split, skb->data is linearly filled,
1778 * followed by the page buffers. Therefore, skb->data is
1779 * sized to hold the largest protocol header.
1780 */
e4c811c9
MC		 1781 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1782 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1783 PAGE_SIZE <= 16384)
1784 adapter->rx_ps_pages = pages;
1785 else
1786 adapter->rx_ps_pages = 0;
2d7edb92 1787#endif
e4c811c9 1788 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1789 /* Configure extra packet-split registers */
1790 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1791 rfctl |= E1000_RFCTL_EXTEN;
1792 /* disable IPv6 packet split support */
1793 rfctl |= E1000_RFCTL_IPV6_DIS;
1794 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1795
7dfee0cb 1796 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1797
2d7edb92
MC		 1798 psrctl |= adapter->rx_ps_bsize0 >>
1799 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1800
1801 switch (adapter->rx_ps_pages) {
1802 case 3:
1803 psrctl |= PAGE_SIZE <<
1804 E1000_PSRCTL_BSIZE3_SHIFT;
1805 case 2:
1806 psrctl |= PAGE_SIZE <<
1807 E1000_PSRCTL_BSIZE2_SHIFT;
1808 case 1:
1809 psrctl |= PAGE_SIZE >>
1810 E1000_PSRCTL_BSIZE1_SHIFT;
1811 break;
1812 }
2d7edb92
MC		 1813
1814 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1815 }
1816
1817 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1818}
1819
1820/**
1821 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1822 * @adapter: board private structure
1823 *
1824 * Configure the Rx unit of the MAC after a reset.
1825 **/
1826
1827static void
1828e1000_configure_rx(struct e1000_adapter *adapter)
1829{
581d708e
MC		 1830 uint64_t rdba;
1831 struct e1000_hw *hw = &adapter->hw;
1832 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1833
e4c811c9 1834 if (adapter->rx_ps_pages) {
0f15a8fa 1835 /* this is a 32 byte descriptor */
581d708e 1836 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1837 sizeof(union e1000_rx_desc_packet_split);
1838 adapter->clean_rx = e1000_clean_rx_irq_ps;
1839 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1840 } else {
581d708e
MC		 1841 rdlen = adapter->rx_ring[0].count *
1842 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1843 adapter->clean_rx = e1000_clean_rx_irq;
1844 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1845 }
1da177e4
LT		 1846
1847 /* disable receives while setting up the descriptors */
581d708e
MC		 1848 rctl = E1000_READ_REG(hw, RCTL);
1849 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1850
1851 /* set the Receive Delay Timer Register */
581d708e 1852 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1853
581d708e
MC		 1854 if (hw->mac_type >= e1000_82540) {
1855 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1856 if (adapter->itr > 1)
581d708e 1857 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1858 1000000000 / (adapter->itr * 256));
1859 }
1860
2ae76d98 1861 if (hw->mac_type >= e1000_82571) {
2ae76d98 1862 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1863 /* Reset delay timers after every interrupt */
6fc7a7ec 1864 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1865#ifdef CONFIG_E1000_NAPI
1866 /* Auto-Mask interrupts upon ICR read. */
1867 ctrl_ext |= E1000_CTRL_EXT_IAME;
1868#endif
2ae76d98 1869 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1870 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1871 E1000_WRITE_FLUSH(hw);
1872 }
1873
581d708e
MC		 1874 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1875 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1876 switch (adapter->num_rx_queues) {
24025e4e
MC		 1877 case 1:
1878 default:
581d708e 1879 rdba = adapter->rx_ring[0].dma;
581d708e 1880 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1881 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1882 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1883 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1884 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 1885 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1886 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1887 break;
24025e4e
MC		 1888 }
1889
1da177e4 1890 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1891 if (hw->mac_type >= e1000_82543) {
1892 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1893 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1894 rxcsum |= E1000_RXCSUM_TUOFL;
1895
868d5309 1896 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1897 * Must be used in conjunction with packet-split. */
96838a40
JB		 1898 if ((hw->mac_type >= e1000_82571) &&
1899 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1900 rxcsum |= E1000_RXCSUM_IPPCSE;
1901 }
1902 } else {
1903 rxcsum &= ~E1000_RXCSUM_TUOFL;
1904 /* don't need to clear IPPCSE as it defaults to 0 */
1905 }
581d708e 1906 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1907 }
1908
1909 /* Enable Receives */
581d708e 1910 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1911}
1912
1913/**
581d708e 1914 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1915 * @adapter: board private structure
581d708e 1916 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1917 *
1918 * Free all transmit software resources
1919 **/
1920
3ad2cc67 1921static void
581d708e
MC		 1922e1000_free_tx_resources(struct e1000_adapter *adapter,
1923 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1924{
1925 struct pci_dev *pdev = adapter->pdev;
1926
581d708e 1927 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1928
581d708e
MC		 1929 vfree(tx_ring->buffer_info);
1930 tx_ring->buffer_info = NULL;
1da177e4 1931
581d708e 1932 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1933
581d708e
MC		 1934 tx_ring->desc = NULL;
1935}
1936
1937/**
1938 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1939 * @adapter: board private structure
1940 *
1941 * Free all transmit software resources
1942 **/
1943
1944void
1945e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1946{
1947 int i;
1948
f56799ea 1949 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1950 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1951}
1952
e619d523 1953static void
1da177e4
LT		 1954e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1955 struct e1000_buffer *buffer_info)
1956{
96838a40 1957 if (buffer_info->dma) {
2648345f
MC		 1958 pci_unmap_page(adapter->pdev,
1959 buffer_info->dma,
1960 buffer_info->length,
1961 PCI_DMA_TODEVICE);
1da177e4 1962 }
8241e35e 1963 if (buffer_info->skb)
1da177e4 1964 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1965 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1966}
1967
1968/**
1969 * e1000_clean_tx_ring - Free Tx Buffers
1970 * @adapter: board private structure
581d708e 1971 * @tx_ring: ring to be cleaned
1da177e4
LT		 1972 **/
1973
1974static void
581d708e
MC		 1975e1000_clean_tx_ring(struct e1000_adapter *adapter,
1976 struct e1000_tx_ring *tx_ring)
1da177e4 1977{
1da177e4
LT		 1978 struct e1000_buffer *buffer_info;
1979 unsigned long size;
1980 unsigned int i;
1981
1982 /* Free all the Tx ring sk_buffs */
1983
96838a40 1984 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1985 buffer_info = &tx_ring->buffer_info[i];
1986 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1987 }
1988
1989 size = sizeof(struct e1000_buffer) * tx_ring->count;
1990 memset(tx_ring->buffer_info, 0, size);
1991
1992 /* Zero out the descriptor ring */
1993
1994 memset(tx_ring->desc, 0, tx_ring->size);
1995
1996 tx_ring->next_to_use = 0;
1997 tx_ring->next_to_clean = 0;
fd803241 1998 tx_ring->last_tx_tso = 0;
1da177e4 1999
581d708e
MC		 2000 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2001 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2002}
2003
2004/**
2005 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2006 * @adapter: board private structure
2007 **/
2008
2009static void
2010e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2011{
2012 int i;
2013
f56799ea 2014 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2015 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2016}
2017
2018/**
2019 * e1000_free_rx_resources - Free Rx Resources
2020 * @adapter: board private structure
581d708e 2021 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2022 *
2023 * Free all receive software resources
2024 **/
2025
3ad2cc67 2026static void
581d708e
MC		 2027e1000_free_rx_resources(struct e1000_adapter *adapter,
2028 struct e1000_rx_ring *rx_ring)
1da177e4 2029{
1da177e4
LT		 2030 struct pci_dev *pdev = adapter->pdev;
2031
581d708e 2032 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2033
2034 vfree(rx_ring->buffer_info);
2035 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2036 kfree(rx_ring->ps_page);
2037 rx_ring->ps_page = NULL;
2038 kfree(rx_ring->ps_page_dma);
2039 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2040
2041 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2042
2043 rx_ring->desc = NULL;
2044}
2045
2046/**
581d708e 2047 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2048 * @adapter: board private structure
581d708e
MC		 2049 *
2050 * Free all receive software resources
2051 **/
2052
2053void
2054e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2055{
2056 int i;
2057
f56799ea 2058 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2059 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2060}
2061
2062/**
2063 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2064 * @adapter: board private structure
2065 * @rx_ring: ring to free buffers from
1da177e4
LT		 2066 **/
2067
2068static void
581d708e
MC		 2069e1000_clean_rx_ring(struct e1000_adapter *adapter,
2070 struct e1000_rx_ring *rx_ring)
1da177e4 2071{
1da177e4 2072 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2073 struct e1000_ps_page *ps_page;
2074 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2075 struct pci_dev *pdev = adapter->pdev;
2076 unsigned long size;
2d7edb92 2077 unsigned int i, j;
1da177e4
LT		 2078
2079 /* Free all the Rx ring sk_buffs */
96838a40 2080 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2081 buffer_info = &rx_ring->buffer_info[i];
96838a40 2082 if (buffer_info->skb) {
1da177e4
LT		 2083 pci_unmap_single(pdev,
2084 buffer_info->dma,
2085 buffer_info->length,
2086 PCI_DMA_FROMDEVICE);
2087
2088 dev_kfree_skb(buffer_info->skb);
2089 buffer_info->skb = NULL;
997f5cbd
JK		 2090 }
2091 ps_page = &rx_ring->ps_page[i];
2092 ps_page_dma = &rx_ring->ps_page_dma[i];
2093 for (j = 0; j < adapter->rx_ps_pages; j++) {
2094 if (!ps_page->ps_page[j]) break;
2095 pci_unmap_page(pdev,
2096 ps_page_dma->ps_page_dma[j],
2097 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2098 ps_page_dma->ps_page_dma[j] = 0;
2099 put_page(ps_page->ps_page[j]);
2100 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2101 }
2102 }
2103
2104 size = sizeof(struct e1000_buffer) * rx_ring->count;
2105 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2106 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2107 memset(rx_ring->ps_page, 0, size);
2108 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2109 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2110
2111 /* Zero out the descriptor ring */
2112
2113 memset(rx_ring->desc, 0, rx_ring->size);
2114
2115 rx_ring->next_to_clean = 0;
2116 rx_ring->next_to_use = 0;
2117
581d708e
MC		 2118 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2119 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2120}
2121
2122/**
2123 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2124 * @adapter: board private structure
2125 **/
2126
2127static void
2128e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2129{
2130 int i;
2131
f56799ea 2132 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2133 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2134}
2135
2136/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2137 * and memory write and invalidate disabled for certain operations
2138 */
2139static void
2140e1000_enter_82542_rst(struct e1000_adapter *adapter)
2141{
2142 struct net_device *netdev = adapter->netdev;
2143 uint32_t rctl;
2144
2145 e1000_pci_clear_mwi(&adapter->hw);
2146
2147 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2148 rctl |= E1000_RCTL_RST;
2149 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2150 E1000_WRITE_FLUSH(&adapter->hw);
2151 mdelay(5);
2152
96838a40 2153 if (netif_running(netdev))
581d708e 2154 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2155}
2156
2157static void
2158e1000_leave_82542_rst(struct e1000_adapter *adapter)
2159{
2160 struct net_device *netdev = adapter->netdev;
2161 uint32_t rctl;
2162
2163 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2164 rctl &= ~E1000_RCTL_RST;
2165 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2166 E1000_WRITE_FLUSH(&adapter->hw);
2167 mdelay(5);
2168
96838a40 2169 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2170 e1000_pci_set_mwi(&adapter->hw);
2171
96838a40 2172 if (netif_running(netdev)) {
72d64a43
JK		 2173 /* No need to loop, because 82542 supports only 1 queue */
2174 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2175 e1000_configure_rx(adapter);
72d64a43 2176 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2177 }
2178}
2179
2180/**
2181 * e1000_set_mac - Change the Ethernet Address of the NIC
2182 * @netdev: network interface device structure
2183 * @p: pointer to an address structure
2184 *
2185 * Returns 0 on success, negative on failure
2186 **/
2187
2188static int
2189e1000_set_mac(struct net_device *netdev, void *p)
2190{
60490fe0 2191 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2192 struct sockaddr *addr = p;
2193
96838a40 2194 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2195 return -EADDRNOTAVAIL;
2196
2197 /* 82542 2.0 needs to be in reset to write receive address registers */
2198
96838a40 2199 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2200 e1000_enter_82542_rst(adapter);
2201
2202 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2203 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2204
2205 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2206
868d5309
MC		 2207 /* With 82571 controllers, LAA may be overwritten (with the default)
2208 * due to controller reset from the other port. */
2209 if (adapter->hw.mac_type == e1000_82571) {
2210 /* activate the work around */
2211 adapter->hw.laa_is_present = 1;
2212
96838a40
JB		 2213 /* Hold a copy of the LAA in RAR[14] This is done so that
2214 * between the time RAR[0] gets clobbered and the time it
2215 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2216 * of the RARs and no incoming packets directed to this port
96838a40 2217 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2218 * RAR[14] */
96838a40 2219 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2220 E1000_RAR_ENTRIES - 1);
2221 }
2222
96838a40 2223 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2224 e1000_leave_82542_rst(adapter);
2225
2226 return 0;
2227}
2228
2229/**
2230 * e1000_set_multi - Multicast and Promiscuous mode set
2231 * @netdev: network interface device structure
2232 *
2233 * The set_multi entry point is called whenever the multicast address
2234 * list or the network interface flags are updated. This routine is
2235 * responsible for configuring the hardware for proper multicast,
2236 * promiscuous mode, and all-multi behavior.
2237 **/
2238
2239static void
2240e1000_set_multi(struct net_device *netdev)
2241{
60490fe0 2242 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2243 struct e1000_hw *hw = &adapter->hw;
2244 struct dev_mc_list *mc_ptr;
2245 uint32_t rctl;
2246 uint32_t hash_value;
868d5309 2247 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2248 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2249 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2250 E1000_NUM_MTA_REGISTERS;
2251
2252 if (adapter->hw.mac_type == e1000_ich8lan)
2253 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2254
868d5309
MC		 2255 /* reserve RAR[14] for LAA over-write work-around */
2256 if (adapter->hw.mac_type == e1000_82571)
2257 rar_entries--;
1da177e4 2258
2648345f
MC		 2259 /* Check for Promiscuous and All Multicast modes */
2260
1da177e4
LT		 2261 rctl = E1000_READ_REG(hw, RCTL);
2262
96838a40 2263 if (netdev->flags & IFF_PROMISC) {
1da177e4 2264 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2265 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2266 rctl |= E1000_RCTL_MPE;
2267 rctl &= ~E1000_RCTL_UPE;
2268 } else {
2269 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2270 }
2271
2272 E1000_WRITE_REG(hw, RCTL, rctl);
2273
2274 /* 82542 2.0 needs to be in reset to write receive address registers */
2275
96838a40 2276 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2277 e1000_enter_82542_rst(adapter);
2278
2279 /* load the first 14 multicast address into the exact filters 1-14
2280 * RAR 0 is used for the station MAC adddress
2281 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2282 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2283 */
2284 mc_ptr = netdev->mc_list;
2285
96838a40 2286 for (i = 1; i < rar_entries; i++) {
868d5309 2287 if (mc_ptr) {
1da177e4
LT		 2288 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2289 mc_ptr = mc_ptr->next;
2290 } else {
2291 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2292 E1000_WRITE_FLUSH(hw);
1da177e4 2293 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2294 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2295 }
2296 }
2297
2298 /* clear the old settings from the multicast hash table */
2299
cd94dd0b 2300 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2301 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2302 E1000_WRITE_FLUSH(hw);
2303 }
1da177e4
LT		 2304
2305 /* load any remaining addresses into the hash table */
2306
96838a40 2307 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2308 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2309 e1000_mta_set(hw, hash_value);
2310 }
2311
96838a40 2312 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2313 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2314}
2315
2316/* Need to wait a few seconds after link up to get diagnostic information from
2317 * the phy */
2318
2319static void
2320e1000_update_phy_info(unsigned long data)
2321{
2322 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2323 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2324}
2325
2326/**
2327 * e1000_82547_tx_fifo_stall - Timer Call-back
2328 * @data: pointer to adapter cast into an unsigned long
2329 **/
2330
2331static void
2332e1000_82547_tx_fifo_stall(unsigned long data)
2333{
2334 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2335 struct net_device *netdev = adapter->netdev;
2336 uint32_t tctl;
2337
96838a40
JB		 2338 if (atomic_read(&adapter->tx_fifo_stall)) {
2339 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2340 E1000_READ_REG(&adapter->hw, TDH)) &&
2341 (E1000_READ_REG(&adapter->hw, TDFT) ==
2342 E1000_READ_REG(&adapter->hw, TDFH)) &&
2343 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2344 E1000_READ_REG(&adapter->hw, TDFHS))) {
2345 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2346 E1000_WRITE_REG(&adapter->hw, TCTL,
2347 tctl & ~E1000_TCTL_EN);
2348 E1000_WRITE_REG(&adapter->hw, TDFT,
2349 adapter->tx_head_addr);
2350 E1000_WRITE_REG(&adapter->hw, TDFH,
2351 adapter->tx_head_addr);
2352 E1000_WRITE_REG(&adapter->hw, TDFTS,
2353 adapter->tx_head_addr);
2354 E1000_WRITE_REG(&adapter->hw, TDFHS,
2355 adapter->tx_head_addr);
2356 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2357 E1000_WRITE_FLUSH(&adapter->hw);
2358
2359 adapter->tx_fifo_head = 0;
2360 atomic_set(&adapter->tx_fifo_stall, 0);
2361 netif_wake_queue(netdev);
2362 } else {
2363 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2364 }
2365 }
2366}
2367
2368/**
2369 * e1000_watchdog - Timer Call-back
2370 * @data: pointer to adapter cast into an unsigned long
2371 **/
2372static void
2373e1000_watchdog(unsigned long data)
2374{
2375 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2376 struct net_device *netdev = adapter->netdev;
545c67c0 2377 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2378 uint32_t link, tctl;
cd94dd0b
AK		 2379 int32_t ret_val;
2380
2381 ret_val = e1000_check_for_link(&adapter->hw);
2382 if ((ret_val == E1000_ERR_PHY) &&
2383 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2384 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2385 /* See e1000_kumeran_lock_loss_workaround() */
2386 DPRINTK(LINK, INFO,
2387 "Gigabit has been disabled, downgrading speed\n");
2388 }
2d7edb92
MC		 2389 if (adapter->hw.mac_type == e1000_82573) {
2390 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2391 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2392 e1000_update_mng_vlan(adapter);
96838a40 2393 }
1da177e4 2394
96838a40 2395 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2396 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2397 link = !adapter->hw.serdes_link_down;
2398 else
2399 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2400
96838a40
JB		 2401 if (link) {
2402 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2403 boolean_t txb2b = 1;
1da177e4
LT		 2404 e1000_get_speed_and_duplex(&adapter->hw,
2405 &adapter->link_speed,
2406 &adapter->link_duplex);
2407
2408 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2409 adapter->link_speed,
2410 adapter->link_duplex == FULL_DUPLEX ?
2411 "Full Duplex" : "Half Duplex");
2412
7e6c9861
JK		 2413 /* tweak tx_queue_len according to speed/duplex
2414 * and adjust the timeout factor */
66a2b0a3
JK		 2415 netdev->tx_queue_len = adapter->tx_queue_len;
2416 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2417 switch (adapter->link_speed) {
2418 case SPEED_10:
fe7fe28e 2419 txb2b = 0;
7e6c9861
JK		 2420 netdev->tx_queue_len = 10;
2421 adapter->tx_timeout_factor = 8;
2422 break;
2423 case SPEED_100:
fe7fe28e 2424 txb2b = 0;
7e6c9861
JK		 2425 netdev->tx_queue_len = 100;
2426 /* maybe add some timeout factor ? */
2427 break;
2428 }
2429
fe7fe28e 2430 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2431 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2432 txb2b == 0) {
7e6c9861
JK		 2433#define SPEED_MODE_BIT (1 << 21)
2434 uint32_t tarc0;
2435 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2436 tarc0 &= ~SPEED_MODE_BIT;
2437 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2438 }
2439
2440#ifdef NETIF_F_TSO
2441 /* disable TSO for pcie and 10/100 speeds, to avoid
2442 * some hardware issues */
2443 if (!adapter->tso_force &&
2444 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2445 switch (adapter->link_speed) {
2446 case SPEED_10:
66a2b0a3 2447 case SPEED_100:
7e6c9861
JK		 2448 DPRINTK(PROBE,INFO,
2449 "10/100 speed: disabling TSO\n");
2450 netdev->features &= ~NETIF_F_TSO;
2451 break;
2452 case SPEED_1000:
2453 netdev->features |= NETIF_F_TSO;
2454 break;
2455 default:
2456 /* oops */
66a2b0a3
JK		 2457 break;
2458 }
2459 }
7e6c9861
JK		 2460#endif
2461
2462 /* enable transmits in the hardware, need to do this
2463 * after setting TARC0 */
2464 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2465 tctl |= E1000_TCTL_EN;
2466 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2467
1da177e4
LT		 2468 netif_carrier_on(netdev);
2469 netif_wake_queue(netdev);
2470 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2471 adapter->smartspeed = 0;
2472 }
2473 } else {
96838a40 2474 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2475 adapter->link_speed = 0;
2476 adapter->link_duplex = 0;
2477 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2478 netif_carrier_off(netdev);
2479 netif_stop_queue(netdev);
2480 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2481
2482 /* 80003ES2LAN workaround--
2483 * For packet buffer work-around on link down event;
2484 * disable receives in the ISR and
2485 * reset device here in the watchdog
2486 */
8fc897b0 2487 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2488 /* reset device */
2489 schedule_work(&adapter->reset_task);
1da177e4
LT		 2490 }
2491
2492 e1000_smartspeed(adapter);
2493 }
2494
2495 e1000_update_stats(adapter);
2496
2497 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2498 adapter->tpt_old = adapter->stats.tpt;
2499 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2500 adapter->colc_old = adapter->stats.colc;
2501
2502 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2503 adapter->gorcl_old = adapter->stats.gorcl;
2504 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2505 adapter->gotcl_old = adapter->stats.gotcl;
2506
2507 e1000_update_adaptive(&adapter->hw);
2508
f56799ea 2509 if (!netif_carrier_ok(netdev)) {
581d708e 2510 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2511 /* We've lost link, so the controller stops DMA,
2512 * but we've got queued Tx work that's never going
2513 * to get done, so reset controller to flush Tx.
2514 * (Do the reset outside of interrupt context). */
87041639
JK		 2515 adapter->tx_timeout_count++;
2516 schedule_work(&adapter->reset_task);
1da177e4
LT		 2517 }
2518 }
2519
2520 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2521 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2522 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2523 * asymmetrical Tx or Rx gets ITR=8000; everyone
2524 * else is between 2000-8000. */
2525 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2526 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2527 adapter->gotcl - adapter->gorcl :
2528 adapter->gorcl - adapter->gotcl) / 10000;
2529 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2530 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2531 }
2532
2533 /* Cause software interrupt to ensure rx ring is cleaned */
2534 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2535
2648345f 2536 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2537 adapter->detect_tx_hung = TRUE;
2538
96838a40 2539 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2540 * reset from the other port. Set the appropriate LAA in RAR[0] */
2541 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2542 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2543
1da177e4
LT		 2544 /* Reset the timer */
2545 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2546}
2547
2548#define E1000_TX_FLAGS_CSUM 0x00000001
2549#define E1000_TX_FLAGS_VLAN 0x00000002
2550#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2551#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2552#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2553#define E1000_TX_FLAGS_VLAN_SHIFT 16
2554
e619d523 2555static int
581d708e
MC		 2556e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2557 struct sk_buff *skb)
1da177e4
LT		 2558{
2559#ifdef NETIF_F_TSO
2560 struct e1000_context_desc *context_desc;
545c67c0 2561 struct e1000_buffer *buffer_info;
1da177e4
LT		 2562 unsigned int i;
2563 uint32_t cmd_length = 0;
2d7edb92 2564 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2565 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2566 int err;
2567
89114afd 2568 if (skb_is_gso(skb)) {
1da177e4
LT		 2569 if (skb_header_cloned(skb)) {
2570 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2571 if (err)
2572 return err;
2573 }
2574
2575 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 2576 mss = skb_shinfo(skb)->gso_size;
60828236 2577 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2578 skb->nh.iph->tot_len = 0;
2579 skb->nh.iph->check = 0;
2580 skb->h.th->check =
2581 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2582 skb->nh.iph->daddr,
2583 0,
2584 IPPROTO_TCP,
2585 0);
2586 cmd_length = E1000_TXD_CMD_IP;
2587 ipcse = skb->h.raw - skb->data - 1;
2588#ifdef NETIF_F_TSO_IPV6
e15fdd03 2589 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2d7edb92
MC		 2590 skb->nh.ipv6h->payload_len = 0;
2591 skb->h.th->check =
2592 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2593 &skb->nh.ipv6h->daddr,
2594 0,
2595 IPPROTO_TCP,
2596 0);
2597 ipcse = 0;
2598#endif
2599 }
1da177e4
LT		 2600 ipcss = skb->nh.raw - skb->data;
2601 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2602 tucss = skb->h.raw - skb->data;
2603 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2604 tucse = 0;
2605
2606 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2607 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2608
581d708e
MC		 2609 i = tx_ring->next_to_use;
2610 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2611 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2612
2613 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2614 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2615 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2616 context_desc->upper_setup.tcp_fields.tucss = tucss;
2617 context_desc->upper_setup.tcp_fields.tucso = tucso;
2618 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2619 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2620 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2621 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2622
545c67c0
JK		 2623 buffer_info->time_stamp = jiffies;
2624
581d708e
MC		 2625 if (++i == tx_ring->count) i = 0;
2626 tx_ring->next_to_use = i;
1da177e4 2627
8241e35e 2628 return TRUE;
1da177e4
LT		 2629 }
2630#endif
2631
8241e35e 2632 return FALSE;
1da177e4
LT		 2633}
2634
e619d523 2635static boolean_t
581d708e
MC		 2636e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2637 struct sk_buff *skb)
1da177e4
LT		 2638{
2639 struct e1000_context_desc *context_desc;
545c67c0 2640 struct e1000_buffer *buffer_info;
1da177e4
LT		 2641 unsigned int i;
2642 uint8_t css;
2643
84fa7933 2644 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1da177e4
LT		 2645 css = skb->h.raw - skb->data;
2646
581d708e 2647 i = tx_ring->next_to_use;
545c67c0 2648 buffer_info = &tx_ring->buffer_info[i];
581d708e 2649 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2650
2651 context_desc->upper_setup.tcp_fields.tucss = css;
2652 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2653 context_desc->upper_setup.tcp_fields.tucse = 0;
2654 context_desc->tcp_seg_setup.data = 0;
2655 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2656
545c67c0
JK		 2657 buffer_info->time_stamp = jiffies;
2658
581d708e
MC		 2659 if (unlikely(++i == tx_ring->count)) i = 0;
2660 tx_ring->next_to_use = i;
1da177e4
LT		 2661
2662 return TRUE;
2663 }
2664
2665 return FALSE;
2666}
2667
2668#define E1000_MAX_TXD_PWR 12
2669#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2670
e619d523 2671static int
581d708e
MC		 2672e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2673 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2674 unsigned int nr_frags, unsigned int mss)
1da177e4 2675{
1da177e4
LT		 2676 struct e1000_buffer *buffer_info;
2677 unsigned int len = skb->len;
2678 unsigned int offset = 0, size, count = 0, i;
2679 unsigned int f;
2680 len -= skb->data_len;
2681
2682 i = tx_ring->next_to_use;
2683
96838a40 2684 while (len) {
1da177e4
LT		 2685 buffer_info = &tx_ring->buffer_info[i];
2686 size = min(len, max_per_txd);
2687#ifdef NETIF_F_TSO
fd803241
JK		 2688 /* Workaround for Controller erratum --
2689 * descriptor for non-tso packet in a linear SKB that follows a
2690 * tso gets written back prematurely before the data is fully
0f15a8fa 2691 * DMA'd to the controller */
fd803241 2692 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2693 !skb_is_gso(skb)) {
fd803241
JK		 2694 tx_ring->last_tx_tso = 0;
2695 size -= 4;
2696 }
2697
1da177e4
LT		 2698 /* Workaround for premature desc write-backs
2699 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2700 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2701 size -= 4;
2702#endif
97338bde
MC		 2703 /* work-around for errata 10 and it applies
2704 * to all controllers in PCI-X mode
2705 * The fix is to make sure that the first descriptor of a
2706 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2707 */
96838a40 2708 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2709 (size > 2015) && count == 0))
2710 size = 2015;
96838a40 2711
1da177e4
LT		 2712 /* Workaround for potential 82544 hang in PCI-X. Avoid
2713 * terminating buffers within evenly-aligned dwords. */
96838a40 2714 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2715 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2716 size > 4))
2717 size -= 4;
2718
2719 buffer_info->length = size;
2720 buffer_info->dma =
2721 pci_map_single(adapter->pdev,
2722 skb->data + offset,
2723 size,
2724 PCI_DMA_TODEVICE);
2725 buffer_info->time_stamp = jiffies;
2726
2727 len -= size;
2728 offset += size;
2729 count++;
96838a40 2730 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2731 }
2732
96838a40 2733 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2734 struct skb_frag_struct *frag;
2735
2736 frag = &skb_shinfo(skb)->frags[f];
2737 len = frag->size;
2738 offset = frag->page_offset;
2739
96838a40 2740 while (len) {
1da177e4
LT		 2741 buffer_info = &tx_ring->buffer_info[i];
2742 size = min(len, max_per_txd);
2743#ifdef NETIF_F_TSO
2744 /* Workaround for premature desc write-backs
2745 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2746 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2747 size -= 4;
2748#endif
2749 /* Workaround for potential 82544 hang in PCI-X.
2750 * Avoid terminating buffers within evenly-aligned
2751 * dwords. */
96838a40 2752 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2753 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2754 size > 4))
2755 size -= 4;
2756
2757 buffer_info->length = size;
2758 buffer_info->dma =
2759 pci_map_page(adapter->pdev,
2760 frag->page,
2761 offset,
2762 size,
2763 PCI_DMA_TODEVICE);
2764 buffer_info->time_stamp = jiffies;
2765
2766 len -= size;
2767 offset += size;
2768 count++;
96838a40 2769 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2770 }
2771 }
2772
2773 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2774 tx_ring->buffer_info[i].skb = skb;
2775 tx_ring->buffer_info[first].next_to_watch = i;
2776
2777 return count;
2778}
2779
e619d523 2780static void
581d708e
MC		 2781e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2782 int tx_flags, int count)
1da177e4 2783{
1da177e4
LT		 2784 struct e1000_tx_desc *tx_desc = NULL;
2785 struct e1000_buffer *buffer_info;
2786 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2787 unsigned int i;
2788
96838a40 2789 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2790 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2791 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2792 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2793
96838a40 2794 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2795 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2796 }
2797
96838a40 2798 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2799 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2800 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2801 }
2802
96838a40 2803 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2804 txd_lower |= E1000_TXD_CMD_VLE;
2805 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2806 }
2807
2808 i = tx_ring->next_to_use;
2809
96838a40 2810 while (count--) {
1da177e4
LT		 2811 buffer_info = &tx_ring->buffer_info[i];
2812 tx_desc = E1000_TX_DESC(*tx_ring, i);
2813 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2814 tx_desc->lower.data =
2815 cpu_to_le32(txd_lower | buffer_info->length);
2816 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2817 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2818 }
2819
2820 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2821
2822 /* Force memory writes to complete before letting h/w
2823 * know there are new descriptors to fetch. (Only
2824 * applicable for weak-ordered memory model archs,
2825 * such as IA-64). */
2826 wmb();
2827
2828 tx_ring->next_to_use = i;
581d708e 2829 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2830}
2831
2832/**
2833 * 82547 workaround to avoid controller hang in half-duplex environment.
2834 * The workaround is to avoid queuing a large packet that would span
2835 * the internal Tx FIFO ring boundary by notifying the stack to resend
2836 * the packet at a later time. This gives the Tx FIFO an opportunity to
2837 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2838 * to the beginning of the Tx FIFO.
2839 **/
2840
2841#define E1000_FIFO_HDR 0x10
2842#define E1000_82547_PAD_LEN 0x3E0
2843
e619d523 2844static int
1da177e4
LT		 2845e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2846{
2847 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2848 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2849
2850 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2851
96838a40 2852 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2853 goto no_fifo_stall_required;
2854
96838a40 2855 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2856 return 1;
2857
96838a40 2858 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2859 atomic_set(&adapter->tx_fifo_stall, 1);
2860 return 1;
2861 }
2862
2863no_fifo_stall_required:
2864 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2865 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2866 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2867 return 0;
2868}
2869
2d7edb92 2870#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2871static int
2d7edb92
MC		 2872e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2873{
2874 struct e1000_hw *hw = &adapter->hw;
2875 uint16_t length, offset;
96838a40
JB		 2876 if (vlan_tx_tag_present(skb)) {
2877 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2878 ( adapter->hw.mng_cookie.status &
2879 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2880 return 0;
2881 }
20a44028 2882 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2883 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2884 if ((htons(ETH_P_IP) == eth->h_proto)) {
2885 const struct iphdr *ip =
2d7edb92 2886 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2887 if (IPPROTO_UDP == ip->protocol) {
2888 struct udphdr *udp =
2889 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2890 (ip->ihl << 2));
96838a40 2891 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2892 offset = (uint8_t *)udp + 8 - skb->data;
2893 length = skb->len - offset;
2894
2895 return e1000_mng_write_dhcp_info(hw,
96838a40 2896 (uint8_t *)udp + 8,
2d7edb92
MC		 2897 length);
2898 }
2899 }
2900 }
2901 }
2902 return 0;
2903}
2904
1da177e4
LT		 2905#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2906static int
2907e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2908{
60490fe0 2909 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2910 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2911 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2912 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2913 unsigned int tx_flags = 0;
2914 unsigned int len = skb->len;
2915 unsigned long flags;
2916 unsigned int nr_frags = 0;
2917 unsigned int mss = 0;
2918 int count = 0;
76c224bc 2919 int tso;
1da177e4
LT		 2920 unsigned int f;
2921 len -= skb->data_len;
2922
581d708e 2923 tx_ring = adapter->tx_ring;
24025e4e 2924
581d708e 2925 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2926 dev_kfree_skb_any(skb);
2927 return NETDEV_TX_OK;
2928 }
2929
2930#ifdef NETIF_F_TSO
7967168c 2931 mss = skb_shinfo(skb)->gso_size;
76c224bc 2932 /* The controller does a simple calculation to
1da177e4
LT		 2933 * make sure there is enough room in the FIFO before
2934 * initiating the DMA for each buffer. The calc is:
2935 * 4 = ceil(buffer len/mss). To make sure we don't
2936 * overrun the FIFO, adjust the max buffer len if mss
2937 * drops. */
96838a40 2938 if (mss) {
9a3056da 2939 uint8_t hdr_len;
1da177e4
LT		 2940 max_per_txd = min(mss << 2, max_per_txd);
2941 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2942
9f687888 2943 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2944 * points to just header, pull a few bytes of payload from
2945 * frags into skb->data */
2946 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2947 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2948 switch (adapter->hw.mac_type) {
2949 unsigned int pull_size;
2950 case e1000_82571:
2951 case e1000_82572:
2952 case e1000_82573:
cd94dd0b 2953 case e1000_ich8lan:
9f687888
JK		 2954 pull_size = min((unsigned int)4, skb->data_len);
2955 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2956 DPRINTK(DRV, ERR,
9f687888
JK		 2957 "__pskb_pull_tail failed.\n");
2958 dev_kfree_skb_any(skb);
749dfc70 2959 return NETDEV_TX_OK;
9f687888
JK		 2960 }
2961 len = skb->len - skb->data_len;
2962 break;
2963 default:
2964 /* do nothing */
2965 break;
d74bbd3b 2966 }
9a3056da 2967 }
1da177e4
LT		 2968 }
2969
9a3056da 2970 /* reserve a descriptor for the offload context */
84fa7933 2971 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 2972 count++;
2648345f 2973 count++;
1da177e4 2974#else
84fa7933 2975 if (skb->ip_summed == CHECKSUM_PARTIAL)
1da177e4
LT		 2976 count++;
2977#endif
fd803241
JK		 2978
2979#ifdef NETIF_F_TSO
2980 /* Controller Erratum workaround */
89114afd 2981 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241
JK		 2982 count++;
2983#endif
2984
1da177e4
LT		 2985 count += TXD_USE_COUNT(len, max_txd_pwr);
2986
96838a40 2987 if (adapter->pcix_82544)
1da177e4
LT		 2988 count++;
2989
96838a40 2990 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2991 * in PCI-X mode, so add one more descriptor to the count
2992 */
96838a40 2993 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2994 (len > 2015)))
2995 count++;
2996
1da177e4 2997 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2998 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2999 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3000 max_txd_pwr);
96838a40 3001 if (adapter->pcix_82544)
1da177e4
LT		 3002 count += nr_frags;
3003
0f15a8fa
JK		 3004
3005 if (adapter->hw.tx_pkt_filtering &&
3006 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 3007 e1000_transfer_dhcp_info(adapter, skb);
3008
581d708e
MC		 3009 local_irq_save(flags);
3010 if (!spin_trylock(&tx_ring->tx_lock)) {
3011 /* Collision - tell upper layer to requeue */
3012 local_irq_restore(flags);
3013 return NETDEV_TX_LOCKED;
3014 }
1da177e4
LT		 3015
3016 /* need: count + 2 desc gap to keep tail from touching
3017 * head, otherwise try next time */
581d708e 3018 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 3019 netif_stop_queue(netdev);
581d708e 3020 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3021 return NETDEV_TX_BUSY;
3022 }
3023
96838a40
JB		 3024 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3025 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 3026 netif_stop_queue(netdev);
3027 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 3028 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3029 return NETDEV_TX_BUSY;
3030 }
3031 }
3032
96838a40 3033 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3034 tx_flags |= E1000_TX_FLAGS_VLAN;
3035 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3036 }
3037
581d708e 3038 first = tx_ring->next_to_use;
96838a40 3039
581d708e 3040 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3041 if (tso < 0) {
3042 dev_kfree_skb_any(skb);
581d708e 3043 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3044 return NETDEV_TX_OK;
3045 }
3046
fd803241
JK		 3047 if (likely(tso)) {
3048 tx_ring->last_tx_tso = 1;
1da177e4 3049 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3050 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3051 tx_flags |= E1000_TX_FLAGS_CSUM;
3052
2d7edb92 3053 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3054 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3055 * no longer assume, we must. */
60828236 3056 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3057 tx_flags |= E1000_TX_FLAGS_IPV4;
3058
581d708e
MC		 3059 e1000_tx_queue(adapter, tx_ring, tx_flags,
3060 e1000_tx_map(adapter, tx_ring, skb, first,
3061 max_per_txd, nr_frags, mss));
1da177e4
LT		 3062
3063 netdev->trans_start = jiffies;
3064
3065 /* Make sure there is space in the ring for the next send. */
581d708e 3066 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 3067 netif_stop_queue(netdev);
3068
581d708e 3069 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3070 return NETDEV_TX_OK;
3071}
3072
3073/**
3074 * e1000_tx_timeout - Respond to a Tx Hang
3075 * @netdev: network interface device structure
3076 **/
3077
3078static void
3079e1000_tx_timeout(struct net_device *netdev)
3080{
60490fe0 3081 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3082
3083 /* Do the reset outside of interrupt context */
87041639
JK		 3084 adapter->tx_timeout_count++;
3085 schedule_work(&adapter->reset_task);
1da177e4
LT		 3086}
3087
3088static void
87041639 3089e1000_reset_task(struct net_device *netdev)
1da177e4 3090{
60490fe0 3091 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3092
2db10a08 3093 e1000_reinit_locked(adapter);
1da177e4
LT		 3094}
3095
3096/**
3097 * e1000_get_stats - Get System Network Statistics
3098 * @netdev: network interface device structure
3099 *
3100 * Returns the address of the device statistics structure.
3101 * The statistics are actually updated from the timer callback.
3102 **/
3103
3104static struct net_device_stats *
3105e1000_get_stats(struct net_device *netdev)
3106{
60490fe0 3107 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3108
6b7660cd 3109 /* only return the current stats */
1da177e4
LT		 3110 return &adapter->net_stats;
3111}
3112
3113/**
3114 * e1000_change_mtu - Change the Maximum Transfer Unit
3115 * @netdev: network interface device structure
3116 * @new_mtu: new value for maximum frame size
3117 *
3118 * Returns 0 on success, negative on failure
3119 **/
3120
3121static int
3122e1000_change_mtu(struct net_device *netdev, int new_mtu)
3123{
60490fe0 3124 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3125 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3126 uint16_t eeprom_data = 0;
1da177e4 3127
96838a40
JB		 3128 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3129 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3130 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3131 return -EINVAL;
2d7edb92 3132 }
1da177e4 3133
997f5cbd
JK		 3134 /* Adapter-specific max frame size limits. */
3135 switch (adapter->hw.mac_type) {
9e2feace 3136 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3137 case e1000_ich8lan:
997f5cbd
JK		 3138 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3139 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3140 return -EINVAL;
2d7edb92 3141 }
997f5cbd 3142 break;
85b22eb6
JK		 3143 case e1000_82573:
3144 /* only enable jumbo frames if ASPM is disabled completely
3145 * this means both bits must be zero in 0x1A bits 3:2 */
3146 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3147 &eeprom_data);
3148 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3149 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3150 DPRINTK(PROBE, ERR,
3151 "Jumbo Frames not supported.\n");
3152 return -EINVAL;
3153 }
3154 break;
3155 }
3156 /* fall through to get support */
997f5cbd
JK		 3157 case e1000_82571:
3158 case e1000_82572:
87041639 3159 case e1000_80003es2lan:
997f5cbd
JK		 3160#define MAX_STD_JUMBO_FRAME_SIZE 9234
3161 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3162 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3163 return -EINVAL;
3164 }
3165 break;
3166 default:
3167 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3168 break;
1da177e4
LT		 3169 }
3170
87f5032e 3171 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3172 * means we reserve 2 more, this pushes us to allocate from the next
3173 * larger slab size
3174 * i.e. RXBUFFER_2048 --> size-4096 slab */
3175
3176 if (max_frame <= E1000_RXBUFFER_256)
3177 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3178 else if (max_frame <= E1000_RXBUFFER_512)
3179 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3180 else if (max_frame <= E1000_RXBUFFER_1024)
3181 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3182 else if (max_frame <= E1000_RXBUFFER_2048)
3183 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3184 else if (max_frame <= E1000_RXBUFFER_4096)
3185 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3186 else if (max_frame <= E1000_RXBUFFER_8192)
3187 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3188 else if (max_frame <= E1000_RXBUFFER_16384)
3189 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3190
3191 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3192 if (!adapter->hw.tbi_compatibility_on &&
3193 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3194 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3195 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3196
2d7edb92
MC		 3197 netdev->mtu = new_mtu;
3198
2db10a08
AK		 3199 if (netif_running(netdev))
3200 e1000_reinit_locked(adapter);
1da177e4 3201
1da177e4
LT		 3202 adapter->hw.max_frame_size = max_frame;
3203
3204 return 0;
3205}
3206
3207/**
3208 * e1000_update_stats - Update the board statistics counters
3209 * @adapter: board private structure
3210 **/
3211
3212void
3213e1000_update_stats(struct e1000_adapter *adapter)
3214{
3215 struct e1000_hw *hw = &adapter->hw;
282f33c9 3216 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3217 unsigned long flags;
3218 uint16_t phy_tmp;
3219
3220#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3221
282f33c9
LV		 3222 /*
3223 * Prevent stats update while adapter is being reset, or if the pci
3224 * connection is down.
3225 */
9026729b 3226 if (adapter->link_speed == 0)
282f33c9
LV		 3227 return;
3228 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3229 return;
3230
1da177e4
LT		 3231 spin_lock_irqsave(&adapter->stats_lock, flags);
3232
3233 /* these counters are modified from e1000_adjust_tbi_stats,
3234 * called from the interrupt context, so they must only
3235 * be written while holding adapter->stats_lock
3236 */
3237
3238 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3239 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3240 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3241 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3242 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3243 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3244 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3245
3246 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3247 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3248 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3249 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3250 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3251 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3252 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3253 }
1da177e4
LT		 3254
3255 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3256 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3257 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3258 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3259 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3260 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3261 adapter->stats.dc += E1000_READ_REG(hw, DC);
3262 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3263 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3264 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3265 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3266 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3267 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3268 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3269 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3270 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3271 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3272 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3273 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3274 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3275 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3276 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3277 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3278 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3279 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3280 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3281
3282 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3283 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3284 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3285 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3286 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3287 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3288 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3289 }
3290
1da177e4
LT		 3291 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3292 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3293
3294 /* used for adaptive IFS */
3295
3296 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3297 adapter->stats.tpt += hw->tx_packet_delta;
3298 hw->collision_delta = E1000_READ_REG(hw, COLC);
3299 adapter->stats.colc += hw->collision_delta;
3300
96838a40 3301 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3302 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3303 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3304 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3305 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3306 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3307 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3308 }
96838a40 3309 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3310 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3311 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3312
3313 if (adapter->hw.mac_type != e1000_ich8lan) {
2d7edb92
MC		 3314 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3315 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3316 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3317 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3318 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3319 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3320 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3321 }
2d7edb92 3322 }
1da177e4
LT		 3323
3324 /* Fill out the OS statistics structure */
3325
3326 adapter->net_stats.rx_packets = adapter->stats.gprc;
3327 adapter->net_stats.tx_packets = adapter->stats.gptc;
3328 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3329 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3330 adapter->net_stats.multicast = adapter->stats.mprc;
3331 adapter->net_stats.collisions = adapter->stats.colc;
3332
3333 /* Rx Errors */
3334
87041639
JK		 3335 /* RLEC on some newer hardware can be incorrect so build
3336 * our own version based on RUC and ROC */
1da177e4
LT		 3337 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3338 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3339 adapter->stats.ruc + adapter->stats.roc +
3340 adapter->stats.cexterr;
87041639
JK		 3341 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3342 adapter->stats.roc;
1da177e4
LT		 3343 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3344 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3345 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3346
3347 /* Tx Errors */
3348
3349 adapter->net_stats.tx_errors = adapter->stats.ecol +
3350 adapter->stats.latecol;
3351 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3352 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3353 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3354
3355 /* Tx Dropped needs to be maintained elsewhere */
3356
3357 /* Phy Stats */
3358
96838a40
JB		 3359 if (hw->media_type == e1000_media_type_copper) {
3360 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3361 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3362 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3363 adapter->phy_stats.idle_errors += phy_tmp;
3364 }
3365
96838a40 3366 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3367 (hw->phy_type == e1000_phy_m88) &&
3368 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3369 adapter->phy_stats.receive_errors += phy_tmp;
3370 }
3371
3372 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3373}
3374
3375/**
3376 * e1000_intr - Interrupt Handler
3377 * @irq: interrupt number
3378 * @data: pointer to a network interface device structure
3379 * @pt_regs: CPU registers structure
3380 **/
3381
3382static irqreturn_t
3383e1000_intr(int irq, void *data, struct pt_regs *regs)
3384{
3385 struct net_device *netdev = data;
60490fe0 3386 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3387 struct e1000_hw *hw = &adapter->hw;
87041639 3388 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3389#ifndef CONFIG_E1000_NAPI
581d708e 3390 int i;
1e613fd9
JK		 3391#else
3392 /* Interrupt Auto-Mask...upon reading ICR,
3393 * interrupts are masked. No need for the
3394 * IMC write, but it does mean we should
3395 * account for it ASAP. */
3396 if (likely(hw->mac_type >= e1000_82571))
3397 atomic_inc(&adapter->irq_sem);
be2b28ed 3398#endif
1da177e4 3399
1e613fd9
JK		 3400 if (unlikely(!icr)) {
3401#ifdef CONFIG_E1000_NAPI
3402 if (hw->mac_type >= e1000_82571)
3403 e1000_irq_enable(adapter);
3404#endif
1da177e4 3405 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3406 }
1da177e4 3407
96838a40 3408 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3409 hw->get_link_status = 1;
87041639
JK		 3410 /* 80003ES2LAN workaround--
3411 * For packet buffer work-around on link down event;
3412 * disable receives here in the ISR and
3413 * reset adapter in watchdog
3414 */
3415 if (netif_carrier_ok(netdev) &&
3416 (adapter->hw.mac_type == e1000_80003es2lan)) {
3417 /* disable receives */
3418 rctl = E1000_READ_REG(hw, RCTL);
3419 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3420 }
1da177e4
LT		 3421 mod_timer(&adapter->watchdog_timer, jiffies);
3422 }
3423
3424#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3425 if (unlikely(hw->mac_type < e1000_82571)) {
3426 atomic_inc(&adapter->irq_sem);
3427 E1000_WRITE_REG(hw, IMC, ~0);
3428 E1000_WRITE_FLUSH(hw);
3429 }
d3d9e484
AK		 3430 if (likely(netif_rx_schedule_prep(netdev)))
3431 __netif_rx_schedule(netdev);
581d708e
MC		 3432 else
3433 e1000_irq_enable(adapter);
c1605eb3 3434#else
1da177e4 3435 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3436 * Due to Hub Link bus being occupied, an interrupt
3437 * de-assertion message is not able to be sent.
3438 * When an interrupt assertion message is generated later,
3439 * two messages are re-ordered and sent out.
3440 * That causes APIC to think 82547 is in de-assertion
3441 * state, while 82547 is in assertion state, resulting
3442 * in dead lock. Writing IMC forces 82547 into
3443 * de-assertion state.
3444 */
3445 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3446 atomic_inc(&adapter->irq_sem);
2648345f 3447 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3448 }
3449
96838a40
JB		 3450 for (i = 0; i < E1000_MAX_INTR; i++)
3451 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3452 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3453 break;
3454
96838a40 3455 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3456 e1000_irq_enable(adapter);
581d708e 3457
c1605eb3 3458#endif
1da177e4
LT		 3459
3460 return IRQ_HANDLED;
3461}
3462
3463#ifdef CONFIG_E1000_NAPI
3464/**
3465 * e1000_clean - NAPI Rx polling callback
3466 * @adapter: board private structure
3467 **/
3468
3469static int
581d708e 3470e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3471{
581d708e
MC		 3472 struct e1000_adapter *adapter;
3473 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3474 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3475
3476 /* Must NOT use netdev_priv macro here. */
3477 adapter = poll_dev->priv;
3478
3479 /* Keep link state information with original netdev */
d3d9e484 3480 if (!netif_carrier_ok(poll_dev))
581d708e 3481 goto quit_polling;
2648345f 3482
d3d9e484
AK		 3483 /* e1000_clean is called per-cpu. This lock protects
3484 * tx_ring[0] from being cleaned by multiple cpus
3485 * simultaneously. A failure obtaining the lock means
3486 * tx_ring[0] is currently being cleaned anyway. */
3487 if (spin_trylock(&adapter->tx_queue_lock)) {
3488 tx_cleaned = e1000_clean_tx_irq(adapter,
3489 &adapter->tx_ring[0]);
3490 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3491 }
3492
d3d9e484 3493 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3494 &work_done, work_to_do);
1da177e4
LT		 3495
3496 *budget -= work_done;
581d708e 3497 poll_dev->quota -= work_done;
96838a40 3498
2b02893e 3499 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3500 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3501 !netif_running(poll_dev)) {
581d708e
MC		 3502quit_polling:
3503 netif_rx_complete(poll_dev);
1da177e4
LT		 3504 e1000_irq_enable(adapter);
3505 return 0;
3506 }
3507
3508 return 1;
3509}
3510
3511#endif
3512/**
3513 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3514 * @adapter: board private structure
3515 **/
3516
3517static boolean_t
581d708e
MC		 3518e1000_clean_tx_irq(struct e1000_adapter *adapter,
3519 struct e1000_tx_ring *tx_ring)
1da177e4 3520{
1da177e4
LT		 3521 struct net_device *netdev = adapter->netdev;
3522 struct e1000_tx_desc *tx_desc, *eop_desc;
3523 struct e1000_buffer *buffer_info;
3524 unsigned int i, eop;
2a1af5d7
JK		 3525#ifdef CONFIG_E1000_NAPI
3526 unsigned int count = 0;
3527#endif
1da177e4
LT		 3528 boolean_t cleaned = FALSE;
3529
3530 i = tx_ring->next_to_clean;
3531 eop = tx_ring->buffer_info[i].next_to_watch;
3532 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3533
581d708e 3534 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3535 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3536 tx_desc = E1000_TX_DESC(*tx_ring, i);
3537 buffer_info = &tx_ring->buffer_info[i];
3538 cleaned = (i == eop);
3539
fd803241 3540 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3541 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3542
96838a40 3543 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3544 }
581d708e 3545
7bfa4816 3546
1da177e4
LT		 3547 eop = tx_ring->buffer_info[i].next_to_watch;
3548 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3549#ifdef CONFIG_E1000_NAPI
3550#define E1000_TX_WEIGHT 64
3551 /* weight of a sort for tx, to avoid endless transmit cleanup */
3552 if (count++ == E1000_TX_WEIGHT) break;
3553#endif
1da177e4
LT		 3554 }
3555
3556 tx_ring->next_to_clean = i;
3557
77b2aad5 3558#define TX_WAKE_THRESHOLD 32
96838a40 3559 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
77b2aad5
AK		 3560 netif_carrier_ok(netdev))) {
3561 spin_lock(&tx_ring->tx_lock);
3562 if (netif_queue_stopped(netdev) &&
3563 (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
3564 netif_wake_queue(netdev);
3565 spin_unlock(&tx_ring->tx_lock);
3566 }
2648345f 3567
581d708e 3568 if (adapter->detect_tx_hung) {
2648345f 3569 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3570 * check with the clearing of time_stamp and movement of i */
3571 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3572 if (tx_ring->buffer_info[eop].dma &&
3573 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3574 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3575 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3576 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3577
3578 /* detected Tx unit hang */
c6963ef5 3579 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3580 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3581 " TDH <%x>\n"
3582 " TDT <%x>\n"
3583 " next_to_use <%x>\n"
3584 " next_to_clean <%x>\n"
3585 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3586 " time_stamp <%lx>\n"
3587 " next_to_watch <%x>\n"
3588 " jiffies <%lx>\n"
3589 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3590 (unsigned long)((tx_ring - adapter->tx_ring) /
3591 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3592 readl(adapter->hw.hw_addr + tx_ring->tdh),
3593 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3594 tx_ring->next_to_use,
392137fa
JK		 3595 tx_ring->next_to_clean,
3596 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3597 eop,
3598 jiffies,
3599 eop_desc->upper.fields.status);
1da177e4 3600 netif_stop_queue(netdev);
70b8f1e1 3601 }
1da177e4 3602 }
1da177e4
LT		 3603 return cleaned;
3604}
3605
3606/**
3607 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3608 * @adapter: board private structure
3609 * @status_err: receive descriptor status and error fields
3610 * @csum: receive descriptor csum field
3611 * @sk_buff: socket buffer with received data
1da177e4
LT		 3612 **/
3613
e619d523 3614static void
1da177e4 3615e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3616 uint32_t status_err, uint32_t csum,
3617 struct sk_buff *skb)
1da177e4 3618{
2d7edb92
MC		 3619 uint16_t status = (uint16_t)status_err;
3620 uint8_t errors = (uint8_t)(status_err >> 24);
3621 skb->ip_summed = CHECKSUM_NONE;
3622
1da177e4 3623 /* 82543 or newer only */
96838a40 3624 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3625 /* Ignore Checksum bit is set */
96838a40 3626 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3627 /* TCP/UDP checksum error bit is set */
96838a40 3628 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3629 /* let the stack verify checksum errors */
1da177e4 3630 adapter->hw_csum_err++;
2d7edb92
MC		 3631 return;
3632 }
3633 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3634 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3635 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3636 return;
1da177e4 3637 } else {
96838a40 3638 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3639 return;
3640 }
3641 /* It must be a TCP or UDP packet with a valid checksum */
3642 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3643 /* TCP checksum is good */
3644 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3645 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3646 /* IP fragment with UDP payload */
3647 /* Hardware complements the payload checksum, so we undo it
3648 * and then put the value in host order for further stack use.
3649 */
3650 csum = ntohl(csum ^ 0xFFFF);
3651 skb->csum = csum;
84fa7933 3652 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3653 }
2d7edb92 3654 adapter->hw_csum_good++;
1da177e4
LT		 3655}
3656
3657/**
2d7edb92 3658 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3659 * @adapter: board private structure
3660 **/
3661
3662static boolean_t
3663#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3664e1000_clean_rx_irq(struct e1000_adapter *adapter,
3665 struct e1000_rx_ring *rx_ring,
3666 int *work_done, int work_to_do)
1da177e4 3667#else
581d708e
MC		 3668e1000_clean_rx_irq(struct e1000_adapter *adapter,
3669 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3670#endif
3671{
1da177e4
LT		 3672 struct net_device *netdev = adapter->netdev;
3673 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3674 struct e1000_rx_desc *rx_desc, *next_rxd;
3675 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3676 unsigned long flags;
3677 uint32_t length;
3678 uint8_t last_byte;
3679 unsigned int i;
72d64a43 3680 int cleaned_count = 0;
a1415ee6 3681 boolean_t cleaned = FALSE;
1da177e4
LT		 3682
3683 i = rx_ring->next_to_clean;
3684 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3685 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3686
b92ff8ee 3687 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3688 struct sk_buff *skb;
a292ca6e 3689 u8 status;
1da177e4 3690#ifdef CONFIG_E1000_NAPI
96838a40 3691 if (*work_done >= work_to_do)
1da177e4
LT		 3692 break;
3693 (*work_done)++;
3694#endif
a292ca6e 3695 status = rx_desc->status;
b92ff8ee 3696 skb = buffer_info->skb;
86c3d59f
JB		 3697 buffer_info->skb = NULL;
3698
30320be8
JK		 3699 prefetch(skb->data - NET_IP_ALIGN);
3700
86c3d59f
JB		 3701 if (++i == rx_ring->count) i = 0;
3702 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3703 prefetch(next_rxd);
3704
86c3d59f 3705 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3706
72d64a43
JK		 3707 cleaned = TRUE;
3708 cleaned_count++;
a292ca6e
JK		 3709 pci_unmap_single(pdev,
3710 buffer_info->dma,
3711 buffer_info->length,
1da177e4
LT		 3712 PCI_DMA_FROMDEVICE);
3713
1da177e4
LT		 3714 length = le16_to_cpu(rx_desc->length);
3715
f235a2ab
AK		 3716 /* adjust length to remove Ethernet CRC */
3717 length -= 4;
3718
a1415ee6
JK		 3719 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3720 /* All receives must fit into a single buffer */
3721 E1000_DBG("%s: Receive packet consumed multiple"
3722 " buffers\n", netdev->name);
864c4e45 3723 /* recycle */
8fc897b0 3724 buffer_info->skb = skb;
1da177e4
LT		 3725 goto next_desc;
3726 }
3727
96838a40 3728 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3729 last_byte = *(skb->data + length - 1);
b92ff8ee 3730 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3731 rx_desc->errors, length, last_byte)) {
3732 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3733 e1000_tbi_adjust_stats(&adapter->hw,
3734 &adapter->stats,
1da177e4
LT		 3735 length, skb->data);
3736 spin_unlock_irqrestore(&adapter->stats_lock,
3737 flags);
3738 length--;
3739 } else {
9e2feace
AK		 3740 /* recycle */
3741 buffer_info->skb = skb;
1da177e4
LT		 3742 goto next_desc;
3743 }
1cb5821f 3744 }
1da177e4 3745
a292ca6e
JK		 3746 /* code added for copybreak, this should improve
3747 * performance for small packets with large amounts
3748 * of reassembly being done in the stack */
3749#define E1000_CB_LENGTH 256
a1415ee6 3750 if (length < E1000_CB_LENGTH) {
a292ca6e 3751 struct sk_buff *new_skb =
87f5032e 3752 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 3753 if (new_skb) {
3754 skb_reserve(new_skb, NET_IP_ALIGN);
a292ca6e
JK		 3755 memcpy(new_skb->data - NET_IP_ALIGN,
3756 skb->data - NET_IP_ALIGN,
3757 length + NET_IP_ALIGN);
3758 /* save the skb in buffer_info as good */
3759 buffer_info->skb = skb;
3760 skb = new_skb;
3761 skb_put(skb, length);
3762 }
a1415ee6
JK		 3763 } else
3764 skb_put(skb, length);
a292ca6e
JK		 3765
3766 /* end copybreak code */
1da177e4
LT		 3767
3768 /* Receive Checksum Offload */
a292ca6e
JK		 3769 e1000_rx_checksum(adapter,
3770 (uint32_t)(status) |
2d7edb92 3771 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3772 le16_to_cpu(rx_desc->csum), skb);
96838a40 3773
1da177e4
LT		 3774 skb->protocol = eth_type_trans(skb, netdev);
3775#ifdef CONFIG_E1000_NAPI
96838a40 3776 if (unlikely(adapter->vlgrp &&
a292ca6e 3777 (status & E1000_RXD_STAT_VP))) {
1da177e4 3778 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3779 le16_to_cpu(rx_desc->special) &
3780 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3781 } else {
3782 netif_receive_skb(skb);
3783 }
3784#else /* CONFIG_E1000_NAPI */
96838a40 3785 if (unlikely(adapter->vlgrp &&
b92ff8ee 3786 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3787 vlan_hwaccel_rx(skb, adapter->vlgrp,
3788 le16_to_cpu(rx_desc->special) &
3789 E1000_RXD_SPC_VLAN_MASK);
3790 } else {
3791 netif_rx(skb);
3792 }
3793#endif /* CONFIG_E1000_NAPI */
3794 netdev->last_rx = jiffies;
3795
3796next_desc:
3797 rx_desc->status = 0;
1da177e4 3798
72d64a43
JK		 3799 /* return some buffers to hardware, one at a time is too slow */
3800 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3801 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3802 cleaned_count = 0;
3803 }
3804
30320be8 3805 /* use prefetched values */
86c3d59f
JB		 3806 rx_desc = next_rxd;
3807 buffer_info = next_buffer;
1da177e4 3808 }
1da177e4 3809 rx_ring->next_to_clean = i;
72d64a43
JK		 3810
3811 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3812 if (cleaned_count)
3813 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3814
3815 return cleaned;
3816}
3817
3818/**
3819 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3820 * @adapter: board private structure
3821 **/
3822
3823static boolean_t
3824#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3825e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3826 struct e1000_rx_ring *rx_ring,
3827 int *work_done, int work_to_do)
2d7edb92 3828#else
581d708e
MC		 3829e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3830 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3831#endif
3832{
86c3d59f 3833 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3834 struct net_device *netdev = adapter->netdev;
3835 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3836 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3837 struct e1000_ps_page *ps_page;
3838 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3839 struct sk_buff *skb;
2d7edb92
MC		 3840 unsigned int i, j;
3841 uint32_t length, staterr;
72d64a43 3842 int cleaned_count = 0;
2d7edb92
MC		 3843 boolean_t cleaned = FALSE;
3844
3845 i = rx_ring->next_to_clean;
3846 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3847 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3848 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3849
96838a40 3850 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3851 ps_page = &rx_ring->ps_page[i];
3852 ps_page_dma = &rx_ring->ps_page_dma[i];
3853#ifdef CONFIG_E1000_NAPI
96838a40 3854 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3855 break;
3856 (*work_done)++;
3857#endif
86c3d59f
JB		 3858 skb = buffer_info->skb;
3859
30320be8
JK		 3860 /* in the packet split case this is header only */
3861 prefetch(skb->data - NET_IP_ALIGN);
3862
86c3d59f
JB		 3863 if (++i == rx_ring->count) i = 0;
3864 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3865 prefetch(next_rxd);
3866
86c3d59f 3867 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3868
2d7edb92 3869 cleaned = TRUE;
72d64a43 3870 cleaned_count++;
2d7edb92
MC		 3871 pci_unmap_single(pdev, buffer_info->dma,
3872 buffer_info->length,
3873 PCI_DMA_FROMDEVICE);
3874
96838a40 3875 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3876 E1000_DBG("%s: Packet Split buffers didn't pick up"
3877 " the full packet\n", netdev->name);
3878 dev_kfree_skb_irq(skb);
3879 goto next_desc;
3880 }
1da177e4 3881
96838a40 3882 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3883 dev_kfree_skb_irq(skb);
3884 goto next_desc;
3885 }
3886
3887 length = le16_to_cpu(rx_desc->wb.middle.length0);
3888
96838a40 3889 if (unlikely(!length)) {
2d7edb92
MC		 3890 E1000_DBG("%s: Last part of the packet spanning"
3891 " multiple descriptors\n", netdev->name);
3892 dev_kfree_skb_irq(skb);
3893 goto next_desc;
3894 }
3895
3896 /* Good Receive */
3897 skb_put(skb, length);
3898
dc7c6add
JK		 3899 {
3900 /* this looks ugly, but it seems compiler issues make it
3901 more efficient than reusing j */
3902 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3903
3904 /* page alloc/put takes too long and effects small packet
3905 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 3906 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 3907 u8 *vaddr;
76c224bc 3908 /* there is no documentation about how to call
dc7c6add
JK		 3909 * kmap_atomic, so we can't hold the mapping
3910 * very long */
3911 pci_dma_sync_single_for_cpu(pdev,
3912 ps_page_dma->ps_page_dma[0],
3913 PAGE_SIZE,
3914 PCI_DMA_FROMDEVICE);
3915 vaddr = kmap_atomic(ps_page->ps_page[0],
3916 KM_SKB_DATA_SOFTIRQ);
3917 memcpy(skb->tail, vaddr, l1);
3918 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3919 pci_dma_sync_single_for_device(pdev,
3920 ps_page_dma->ps_page_dma[0],
3921 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 3922 /* remove the CRC */
3923 l1 -= 4;
dc7c6add 3924 skb_put(skb, l1);
dc7c6add
JK		 3925 goto copydone;
3926 } /* if */
3927 }
3928
96838a40 3929 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3930 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3931 break;
2d7edb92
MC		 3932 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3933 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3934 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3935 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3936 length);
2d7edb92 3937 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3938 skb->len += length;
3939 skb->data_len += length;
5d51b80f 3940 skb->truesize += length;
2d7edb92
MC		 3941 }
3942
f235a2ab
AK		 3943 /* strip the ethernet crc, problem is we're using pages now so
3944 * this whole operation can get a little cpu intensive */
3945 pskb_trim(skb, skb->len - 4);
3946
dc7c6add 3947copydone:
2d7edb92 3948 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 3949 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 3950 skb->protocol = eth_type_trans(skb, netdev);
3951
96838a40 3952 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 3953 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 3954 adapter->rx_hdr_split++;
2d7edb92 3955#ifdef CONFIG_E1000_NAPI
96838a40 3956 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3957 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3958 le16_to_cpu(rx_desc->wb.middle.vlan) &
3959 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3960 } else {
3961 netif_receive_skb(skb);
3962 }
3963#else /* CONFIG_E1000_NAPI */
96838a40 3964 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3965 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3966 le16_to_cpu(rx_desc->wb.middle.vlan) &
3967 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3968 } else {
3969 netif_rx(skb);
3970 }
3971#endif /* CONFIG_E1000_NAPI */
3972 netdev->last_rx = jiffies;
3973
3974next_desc:
c3d7a3a4 3975 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 3976 buffer_info->skb = NULL;
2d7edb92 3977
72d64a43
JK		 3978 /* return some buffers to hardware, one at a time is too slow */
3979 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3980 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3981 cleaned_count = 0;
3982 }
3983
30320be8 3984 /* use prefetched values */
86c3d59f
JB		 3985 rx_desc = next_rxd;
3986 buffer_info = next_buffer;
3987
683a38f3 3988 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3989 }
3990 rx_ring->next_to_clean = i;
72d64a43
JK		 3991
3992 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3993 if (cleaned_count)
3994 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3995
3996 return cleaned;
3997}
3998
3999/**
2d7edb92 4000 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4001 * @adapter: address of board private structure
4002 **/
4003
4004static void
581d708e 4005e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 4006 struct e1000_rx_ring *rx_ring,
a292ca6e 4007 int cleaned_count)
1da177e4 4008{
1da177e4
LT		 4009 struct net_device *netdev = adapter->netdev;
4010 struct pci_dev *pdev = adapter->pdev;
4011 struct e1000_rx_desc *rx_desc;
4012 struct e1000_buffer *buffer_info;
4013 struct sk_buff *skb;
2648345f
MC		 4014 unsigned int i;
4015 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4016
4017 i = rx_ring->next_to_use;
4018 buffer_info = &rx_ring->buffer_info[i];
4019
a292ca6e 4020 while (cleaned_count--) {
ca6f7224
CH		 4021 skb = buffer_info->skb;
4022 if (skb) {
a292ca6e
JK		 4023 skb_trim(skb, 0);
4024 goto map_skb;
4025 }
4026
ca6f7224 4027 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4028 if (unlikely(!skb)) {
1da177e4 4029 /* Better luck next round */
72d64a43 4030 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4031 break;
4032 }
4033
2648345f 4034 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4035 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4036 struct sk_buff *oldskb = skb;
2648345f
MC		 4037 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4038 "at %p\n", bufsz, skb->data);
4039 /* Try again, without freeing the previous */
87f5032e 4040 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4041 /* Failed allocation, critical failure */
1da177e4
LT		 4042 if (!skb) {
4043 dev_kfree_skb(oldskb);
4044 break;
4045 }
2648345f 4046
1da177e4
LT		 4047 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4048 /* give up */
4049 dev_kfree_skb(skb);
4050 dev_kfree_skb(oldskb);
4051 break; /* while !buffer_info->skb */
1da177e4 4052 }
ca6f7224
CH		 4053
4054 /* Use new allocation */
4055 dev_kfree_skb(oldskb);
1da177e4 4056 }
1da177e4
LT		 4057 /* Make buffer alignment 2 beyond a 16 byte boundary
4058 * this will result in a 16 byte aligned IP header after
4059 * the 14 byte MAC header is removed
4060 */
4061 skb_reserve(skb, NET_IP_ALIGN);
4062
1da177e4
LT		 4063 buffer_info->skb = skb;
4064 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4065map_skb:
1da177e4
LT		 4066 buffer_info->dma = pci_map_single(pdev,
4067 skb->data,
4068 adapter->rx_buffer_len,
4069 PCI_DMA_FROMDEVICE);
4070
2648345f
MC		 4071 /* Fix for errata 23, can't cross 64kB boundary */
4072 if (!e1000_check_64k_bound(adapter,
4073 (void *)(unsigned long)buffer_info->dma,
4074 adapter->rx_buffer_len)) {
4075 DPRINTK(RX_ERR, ERR,
4076 "dma align check failed: %u bytes at %p\n",
4077 adapter->rx_buffer_len,
4078 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4079 dev_kfree_skb(skb);
4080 buffer_info->skb = NULL;
4081
2648345f 4082 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4083 adapter->rx_buffer_len,
4084 PCI_DMA_FROMDEVICE);
4085
4086 break; /* while !buffer_info->skb */
4087 }
1da177e4
LT		 4088 rx_desc = E1000_RX_DESC(*rx_ring, i);
4089 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4090
96838a40
JB		 4091 if (unlikely(++i == rx_ring->count))
4092 i = 0;
1da177e4
LT		 4093 buffer_info = &rx_ring->buffer_info[i];
4094 }
4095
b92ff8ee
JB		 4096 if (likely(rx_ring->next_to_use != i)) {
4097 rx_ring->next_to_use = i;
4098 if (unlikely(i-- == 0))
4099 i = (rx_ring->count - 1);
4100
4101 /* Force memory writes to complete before letting h/w
4102 * know there are new descriptors to fetch. (Only
4103 * applicable for weak-ordered memory model archs,
4104 * such as IA-64). */
4105 wmb();
4106 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4107 }
1da177e4
LT		 4108}
4109
2d7edb92
MC		 4110/**
4111 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4112 * @adapter: address of board private structure
4113 **/
4114
4115static void
581d708e 4116e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4117 struct e1000_rx_ring *rx_ring,
4118 int cleaned_count)
2d7edb92 4119{
2d7edb92
MC		 4120 struct net_device *netdev = adapter->netdev;
4121 struct pci_dev *pdev = adapter->pdev;
4122 union e1000_rx_desc_packet_split *rx_desc;
4123 struct e1000_buffer *buffer_info;
4124 struct e1000_ps_page *ps_page;
4125 struct e1000_ps_page_dma *ps_page_dma;
4126 struct sk_buff *skb;
4127 unsigned int i, j;
4128
4129 i = rx_ring->next_to_use;
4130 buffer_info = &rx_ring->buffer_info[i];
4131 ps_page = &rx_ring->ps_page[i];
4132 ps_page_dma = &rx_ring->ps_page_dma[i];
4133
72d64a43 4134 while (cleaned_count--) {
2d7edb92
MC		 4135 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4136
96838a40 4137 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4138 if (j < adapter->rx_ps_pages) {
4139 if (likely(!ps_page->ps_page[j])) {
4140 ps_page->ps_page[j] =
4141 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4142 if (unlikely(!ps_page->ps_page[j])) {
4143 adapter->alloc_rx_buff_failed++;
e4c811c9 4144 goto no_buffers;
b92ff8ee 4145 }
e4c811c9
MC		 4146 ps_page_dma->ps_page_dma[j] =
4147 pci_map_page(pdev,
4148 ps_page->ps_page[j],
4149 0, PAGE_SIZE,
4150 PCI_DMA_FROMDEVICE);
4151 }
4152 /* Refresh the desc even if buffer_addrs didn't
96838a40 4153 * change because each write-back erases
e4c811c9
MC		 4154 * this info.
4155 */
4156 rx_desc->read.buffer_addr[j+1] =
4157 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4158 } else
4159 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4160 }
4161
87f5032e
DM		 4162 skb = netdev_alloc_skb(netdev,
4163 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4164
b92ff8ee
JB		 4165 if (unlikely(!skb)) {
4166 adapter->alloc_rx_buff_failed++;
2d7edb92 4167 break;
b92ff8ee 4168 }
2d7edb92
MC		 4169
4170 /* Make buffer alignment 2 beyond a 16 byte boundary
4171 * this will result in a 16 byte aligned IP header after
4172 * the 14 byte MAC header is removed
4173 */
4174 skb_reserve(skb, NET_IP_ALIGN);
4175
2d7edb92
MC		 4176 buffer_info->skb = skb;
4177 buffer_info->length = adapter->rx_ps_bsize0;
4178 buffer_info->dma = pci_map_single(pdev, skb->data,
4179 adapter->rx_ps_bsize0,
4180 PCI_DMA_FROMDEVICE);
4181
4182 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4183
96838a40 4184 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4185 buffer_info = &rx_ring->buffer_info[i];
4186 ps_page = &rx_ring->ps_page[i];
4187 ps_page_dma = &rx_ring->ps_page_dma[i];
4188 }
4189
4190no_buffers:
b92ff8ee
JB		 4191 if (likely(rx_ring->next_to_use != i)) {
4192 rx_ring->next_to_use = i;
4193 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4194
4195 /* Force memory writes to complete before letting h/w
4196 * know there are new descriptors to fetch. (Only
4197 * applicable for weak-ordered memory model archs,
4198 * such as IA-64). */
4199 wmb();
4200 /* Hardware increments by 16 bytes, but packet split
4201 * descriptors are 32 bytes...so we increment tail
4202 * twice as much.
4203 */
4204 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4205 }
2d7edb92
MC		 4206}
4207
1da177e4
LT		 4208/**
4209 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4210 * @adapter:
4211 **/
4212
4213static void
4214e1000_smartspeed(struct e1000_adapter *adapter)
4215{
4216 uint16_t phy_status;
4217 uint16_t phy_ctrl;
4218
96838a40 4219 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4220 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4221 return;
4222
96838a40 4223 if (adapter->smartspeed == 0) {
1da177e4
LT		 4224 /* If Master/Slave config fault is asserted twice,
4225 * we assume back-to-back */
4226 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4227 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4228 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4229 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4230 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4231 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4232 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4233 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4234 phy_ctrl);
4235 adapter->smartspeed++;
96838a40 4236 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4237 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4238 &phy_ctrl)) {
4239 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4240 MII_CR_RESTART_AUTO_NEG);
4241 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4242 phy_ctrl);
4243 }
4244 }
4245 return;
96838a40 4246 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4247 /* If still no link, perhaps using 2/3 pair cable */
4248 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4249 phy_ctrl |= CR_1000T_MS_ENABLE;
4250 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4251 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4252 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4253 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4254 MII_CR_RESTART_AUTO_NEG);
4255 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4256 }
4257 }
4258 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4259 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4260 adapter->smartspeed = 0;
4261}
4262
4263/**
4264 * e1000_ioctl -
4265 * @netdev:
4266 * @ifreq:
4267 * @cmd:
4268 **/
4269
4270static int
4271e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4272{
4273 switch (cmd) {
4274 case SIOCGMIIPHY:
4275 case SIOCGMIIREG:
4276 case SIOCSMIIREG:
4277 return e1000_mii_ioctl(netdev, ifr, cmd);
4278 default:
4279 return -EOPNOTSUPP;
4280 }
4281}
4282
4283/**
4284 * e1000_mii_ioctl -
4285 * @netdev:
4286 * @ifreq:
4287 * @cmd:
4288 **/
4289
4290static int
4291e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4292{
60490fe0 4293 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4294 struct mii_ioctl_data *data = if_mii(ifr);
4295 int retval;
4296 uint16_t mii_reg;
4297 uint16_t spddplx;
97876fc6 4298 unsigned long flags;
1da177e4 4299
96838a40 4300 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4301 return -EOPNOTSUPP;
4302
4303 switch (cmd) {
4304 case SIOCGMIIPHY:
4305 data->phy_id = adapter->hw.phy_addr;
4306 break;
4307 case SIOCGMIIREG:
96838a40 4308 if (!capable(CAP_NET_ADMIN))
1da177e4 4309 return -EPERM;
97876fc6 4310 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4311 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4312 &data->val_out)) {
4313 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4314 return -EIO;
97876fc6
MC		 4315 }
4316 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4317 break;
4318 case SIOCSMIIREG:
96838a40 4319 if (!capable(CAP_NET_ADMIN))
1da177e4 4320 return -EPERM;
96838a40 4321 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4322 return -EFAULT;
4323 mii_reg = data->val_in;
97876fc6 4324 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4325 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4326 mii_reg)) {
4327 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4328 return -EIO;
97876fc6 4329 }
dc86d32a 4330 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4331 switch (data->reg_num) {
4332 case PHY_CTRL:
96838a40 4333 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4334 break;
96838a40 4335 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4336 adapter->hw.autoneg = 1;
4337 adapter->hw.autoneg_advertised = 0x2F;
4338 } else {
4339 if (mii_reg & 0x40)
4340 spddplx = SPEED_1000;
4341 else if (mii_reg & 0x2000)
4342 spddplx = SPEED_100;
4343 else
4344 spddplx = SPEED_10;
4345 spddplx += (mii_reg & 0x100)
cb764326
JK		 4346 ? DUPLEX_FULL :
4347 DUPLEX_HALF;
1da177e4
LT		 4348 retval = e1000_set_spd_dplx(adapter,
4349 spddplx);
96838a40 4350 if (retval) {
97876fc6 4351 spin_unlock_irqrestore(
96838a40 4352 &adapter->stats_lock,
97876fc6 4353 flags);
1da177e4 4354 return retval;
97876fc6 4355 }
1da177e4 4356 }
2db10a08
AK		 4357 if (netif_running(adapter->netdev))
4358 e1000_reinit_locked(adapter);
4359 else
1da177e4
LT		 4360 e1000_reset(adapter);
4361 break;
4362 case M88E1000_PHY_SPEC_CTRL:
4363 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4364 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4365 spin_unlock_irqrestore(
4366 &adapter->stats_lock, flags);
1da177e4 4367 return -EIO;
97876fc6 4368 }
1da177e4
LT		 4369 break;
4370 }
4371 } else {
4372 switch (data->reg_num) {
4373 case PHY_CTRL:
96838a40 4374 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4375 break;
2db10a08
AK		 4376 if (netif_running(adapter->netdev))
4377 e1000_reinit_locked(adapter);
4378 else
1da177e4
LT		 4379 e1000_reset(adapter);
4380 break;
4381 }
4382 }
97876fc6 4383 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4384 break;
4385 default:
4386 return -EOPNOTSUPP;
4387 }
4388 return E1000_SUCCESS;
4389}
4390
4391void
4392e1000_pci_set_mwi(struct e1000_hw *hw)
4393{
4394 struct e1000_adapter *adapter = hw->back;
2648345f 4395 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4396
96838a40 4397 if (ret_val)
2648345f 4398 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4399}
4400
4401void
4402e1000_pci_clear_mwi(struct e1000_hw *hw)
4403{
4404 struct e1000_adapter *adapter = hw->back;
4405
4406 pci_clear_mwi(adapter->pdev);
4407}
4408
4409void
4410e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4411{
4412 struct e1000_adapter *adapter = hw->back;
4413
4414 pci_read_config_word(adapter->pdev, reg, value);
4415}
4416
4417void
4418e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4419{
4420 struct e1000_adapter *adapter = hw->back;
4421
4422 pci_write_config_word(adapter->pdev, reg, *value);
4423}
4424
1da177e4
LT		 4425void
4426e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4427{
4428 outl(value, port);
4429}
4430
4431static void
4432e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4433{
60490fe0 4434 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4435 uint32_t ctrl, rctl;
4436
4437 e1000_irq_disable(adapter);
4438 adapter->vlgrp = grp;
4439
96838a40 4440 if (grp) {
1da177e4
LT		 4441 /* enable VLAN tag insert/strip */
4442 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4443 ctrl |= E1000_CTRL_VME;
4444 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4445
cd94dd0b 4446 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4447 /* enable VLAN receive filtering */
4448 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4449 rctl |= E1000_RCTL_VFE;
4450 rctl &= ~E1000_RCTL_CFIEN;
4451 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4452 e1000_update_mng_vlan(adapter);
cd94dd0b 4453 }
1da177e4
LT		 4454 } else {
4455 /* disable VLAN tag insert/strip */
4456 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4457 ctrl &= ~E1000_CTRL_VME;
4458 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4459
cd94dd0b 4460 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4461 /* disable VLAN filtering */
4462 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4463 rctl &= ~E1000_RCTL_VFE;
4464 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4465 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4466 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4467 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4468 }
cd94dd0b 4469 }
1da177e4
LT		 4470 }
4471
4472 e1000_irq_enable(adapter);
4473}
4474
4475static void
4476e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4477{
60490fe0 4478 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4479 uint32_t vfta, index;
96838a40
JB		 4480
4481 if ((adapter->hw.mng_cookie.status &
4482 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4483 (vid == adapter->mng_vlan_id))
2d7edb92 4484 return;
1da177e4
LT		 4485 /* add VID to filter table */
4486 index = (vid >> 5) & 0x7F;
4487 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4488 vfta |= (1 << (vid & 0x1F));
4489 e1000_write_vfta(&adapter->hw, index, vfta);
4490}
4491
4492static void
4493e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4494{
60490fe0 4495 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4496 uint32_t vfta, index;
4497
4498 e1000_irq_disable(adapter);
4499
96838a40 4500 if (adapter->vlgrp)
1da177e4
LT		 4501 adapter->vlgrp->vlan_devices[vid] = NULL;
4502
4503 e1000_irq_enable(adapter);
4504
96838a40
JB		 4505 if ((adapter->hw.mng_cookie.status &
4506 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4507 (vid == adapter->mng_vlan_id)) {
4508 /* release control to f/w */
4509 e1000_release_hw_control(adapter);
2d7edb92 4510 return;
ff147013
JK		 4511 }
4512
1da177e4
LT		 4513 /* remove VID from filter table */
4514 index = (vid >> 5) & 0x7F;
4515 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4516 vfta &= ~(1 << (vid & 0x1F));
4517 e1000_write_vfta(&adapter->hw, index, vfta);
4518}
4519
4520static void
4521e1000_restore_vlan(struct e1000_adapter *adapter)
4522{
4523 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4524
96838a40 4525 if (adapter->vlgrp) {
1da177e4 4526 uint16_t vid;
96838a40
JB		 4527 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4528 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4529 continue;
4530 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4531 }
4532 }
4533}
4534
4535int
4536e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4537{
4538 adapter->hw.autoneg = 0;
4539
6921368f 4540 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4541 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4542 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4543 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4544 return -EINVAL;
4545 }
4546
96838a40 4547 switch (spddplx) {
1da177e4
LT		 4548 case SPEED_10 + DUPLEX_HALF:
4549 adapter->hw.forced_speed_duplex = e1000_10_half;
4550 break;
4551 case SPEED_10 + DUPLEX_FULL:
4552 adapter->hw.forced_speed_duplex = e1000_10_full;
4553 break;
4554 case SPEED_100 + DUPLEX_HALF:
4555 adapter->hw.forced_speed_duplex = e1000_100_half;
4556 break;
4557 case SPEED_100 + DUPLEX_FULL:
4558 adapter->hw.forced_speed_duplex = e1000_100_full;
4559 break;
4560 case SPEED_1000 + DUPLEX_FULL:
4561 adapter->hw.autoneg = 1;
4562 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4563 break;
4564 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4565 default:
2648345f 4566 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4567 return -EINVAL;
4568 }
4569 return 0;
4570}
4571
b6a1d5f8 4572#ifdef CONFIG_PM
0f15a8fa
JK		 4573/* Save/restore 16 or 64 dwords of PCI config space depending on which
4574 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4575 */
4576#define PCIE_CONFIG_SPACE_LEN 256
4577#define PCI_CONFIG_SPACE_LEN 64
4578static int
4579e1000_pci_save_state(struct e1000_adapter *adapter)
4580{
4581 struct pci_dev *dev = adapter->pdev;
4582 int size;
4583 int i;
0f15a8fa 4584
2f82665f
JB		 4585 if (adapter->hw.mac_type >= e1000_82571)
4586 size = PCIE_CONFIG_SPACE_LEN;
4587 else
4588 size = PCI_CONFIG_SPACE_LEN;
4589
4590 WARN_ON(adapter->config_space != NULL);
4591
4592 adapter->config_space = kmalloc(size, GFP_KERNEL);
4593 if (!adapter->config_space) {
4594 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4595 return -ENOMEM;
4596 }
4597 for (i = 0; i < (size / 4); i++)
4598 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4599 return 0;
4600}
4601
4602static void
4603e1000_pci_restore_state(struct e1000_adapter *adapter)
4604{
4605 struct pci_dev *dev = adapter->pdev;
4606 int size;
4607 int i;
0f15a8fa 4608
2f82665f
JB		 4609 if (adapter->config_space == NULL)
4610 return;
0f15a8fa 4611
2f82665f
JB		 4612 if (adapter->hw.mac_type >= e1000_82571)
4613 size = PCIE_CONFIG_SPACE_LEN;
4614 else
4615 size = PCI_CONFIG_SPACE_LEN;
4616 for (i = 0; i < (size / 4); i++)
4617 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4618 kfree(adapter->config_space);
4619 adapter->config_space = NULL;
4620 return;
4621}
4622#endif /* CONFIG_PM */
4623
1da177e4 4624static int
829ca9a3 4625e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4626{
4627 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4628 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4629 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4630 uint32_t wufc = adapter->wol;
6fdfef16 4631#ifdef CONFIG_PM
240b1710 4632 int retval = 0;
6fdfef16 4633#endif
1da177e4
LT		 4634
4635 netif_device_detach(netdev);
4636
2db10a08
AK		 4637 if (netif_running(netdev)) {
4638 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4639 e1000_down(adapter);
2db10a08 4640 }
1da177e4 4641
2f82665f 4642#ifdef CONFIG_PM
0f15a8fa
JK		 4643 /* Implement our own version of pci_save_state(pdev) because pci-
4644 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4645 retval = e1000_pci_save_state(adapter);
4646 if (retval)
4647 return retval;
4648#endif
4649
1da177e4 4650 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4651 if (status & E1000_STATUS_LU)
1da177e4
LT		 4652 wufc &= ~E1000_WUFC_LNKC;
4653
96838a40 4654 if (wufc) {
1da177e4
LT		 4655 e1000_setup_rctl(adapter);
4656 e1000_set_multi(netdev);
4657
4658 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4659 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 4660 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4661 rctl |= E1000_RCTL_MPE;
4662 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4663 }
4664
96838a40 4665 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4666 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4667 /* advertise wake from D3Cold */
4668 #define E1000_CTRL_ADVD3WUC 0x00100000
4669 /* phy power management enable */
4670 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4671 ctrl |= E1000_CTRL_ADVD3WUC |
4672 E1000_CTRL_EN_PHY_PWR_MGMT;
4673 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4674 }
4675
96838a40 4676 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4677 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4678 /* keep the laser running in D3 */
4679 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4680 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4681 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4682 }
4683
2d7edb92
MC		 4684 /* Allow time for pending master requests to run */
4685 e1000_disable_pciex_master(&adapter->hw);
4686
1da177e4
LT		 4687 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4688 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4689 pci_enable_wake(pdev, PCI_D3hot, 1);
4690 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4691 } else {
4692 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4693 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4694 pci_enable_wake(pdev, PCI_D3hot, 0);
4695 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4696 }
4697
cd94dd0b 4698 /* FIXME: this code is incorrect for PCI Express */
96838a40 4699 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 4700 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 4701 adapter->hw.media_type == e1000_media_type_copper) {
4702 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4703 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4704 manc |= E1000_MANC_ARP_EN;
4705 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4706 pci_enable_wake(pdev, PCI_D3hot, 1);
4707 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4708 }
4709 }
4710
cd94dd0b
AK		 4711 if (adapter->hw.phy_type == e1000_phy_igp_3)
4712 e1000_phy_powerdown_workaround(&adapter->hw);
4713
b55ccb35
JK		 4714 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4715 * would have already happened in close and is redundant. */
4716 e1000_release_hw_control(adapter);
2d7edb92 4717
1da177e4 4718 pci_disable_device(pdev);
240b1710 4719
d0e027db 4720 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4721
4722 return 0;
4723}
4724
2f82665f 4725#ifdef CONFIG_PM
1da177e4
LT		 4726static int
4727e1000_resume(struct pci_dev *pdev)
4728{
4729 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4730 struct e1000_adapter *adapter = netdev_priv(netdev);
3d1dd8cb 4731 uint32_t manc, err;
1da177e4 4732
d0e027db 4733 pci_set_power_state(pdev, PCI_D0);
2f82665f 4734 e1000_pci_restore_state(adapter);
3d1dd8cb
AK		 4735 if ((err = pci_enable_device(pdev))) {
4736 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4737 return err;
4738 }
a4cb847d 4739 pci_set_master(pdev);
1da177e4 4740
d0e027db
AK		 4741 pci_enable_wake(pdev, PCI_D3hot, 0);
4742 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4743
4744 e1000_reset(adapter);
4745 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4746
96838a40 4747 if (netif_running(netdev))
1da177e4
LT		 4748 e1000_up(adapter);
4749
4750 netif_device_attach(netdev);
4751
cd94dd0b 4752 /* FIXME: this code is incorrect for PCI Express */
96838a40 4753 if (adapter->hw.mac_type >= e1000_82540 &&
cd94dd0b 4754 adapter->hw.mac_type != e1000_ich8lan &&
1da177e4
LT		 4755 adapter->hw.media_type == e1000_media_type_copper) {
4756 manc = E1000_READ_REG(&adapter->hw, MANC);
4757 manc &= ~(E1000_MANC_ARP_EN);
4758 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4759 }
4760
b55ccb35
JK		 4761 /* If the controller is 82573 and f/w is AMT, do not set
4762 * DRV_LOAD until the interface is up. For all other cases,
4763 * let the f/w know that the h/w is now under the control
4764 * of the driver. */
4765 if (adapter->hw.mac_type != e1000_82573 ||
4766 !e1000_check_mng_mode(&adapter->hw))
4767 e1000_get_hw_control(adapter);
2d7edb92 4768
1da177e4
LT		 4769 return 0;
4770}
4771#endif
c653e635
AK		 4772
4773static void e1000_shutdown(struct pci_dev *pdev)
4774{
4775 e1000_suspend(pdev, PMSG_SUSPEND);
4776}
4777
1da177e4
LT		 4778#ifdef CONFIG_NET_POLL_CONTROLLER
4779/*
4780 * Polling 'interrupt' - used by things like netconsole to send skbs
4781 * without having to re-enable interrupts. It's not called while
4782 * the interrupt routine is executing.
4783 */
4784static void
2648345f 4785e1000_netpoll(struct net_device *netdev)
1da177e4 4786{
60490fe0 4787 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4788
1da177e4
LT		 4789 disable_irq(adapter->pdev->irq);
4790 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4791 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4792#ifndef CONFIG_E1000_NAPI
4793 adapter->clean_rx(adapter, adapter->rx_ring);
4794#endif
1da177e4
LT		 4795 enable_irq(adapter->pdev->irq);
4796}
4797#endif
4798
9026729b
AK		 4799/**
4800 * e1000_io_error_detected - called when PCI error is detected
4801 * @pdev: Pointer to PCI device
4802 * @state: The current pci conneection state
4803 *
4804 * This function is called after a PCI bus error affecting
4805 * this device has been detected.
4806 */
4807static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4808{
4809 struct net_device *netdev = pci_get_drvdata(pdev);
4810 struct e1000_adapter *adapter = netdev->priv;
4811
4812 netif_device_detach(netdev);
4813
4814 if (netif_running(netdev))
4815 e1000_down(adapter);
72e8d6bb 4816 pci_disable_device(pdev);
9026729b
AK		 4817
4818 /* Request a slot slot reset. */
4819 return PCI_ERS_RESULT_NEED_RESET;
4820}
4821
4822/**
4823 * e1000_io_slot_reset - called after the pci bus has been reset.
4824 * @pdev: Pointer to PCI device
4825 *
4826 * Restart the card from scratch, as if from a cold-boot. Implementation
4827 * resembles the first-half of the e1000_resume routine.
4828 */
4829static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4830{
4831 struct net_device *netdev = pci_get_drvdata(pdev);
4832 struct e1000_adapter *adapter = netdev->priv;
4833
4834 if (pci_enable_device(pdev)) {
4835 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4836 return PCI_ERS_RESULT_DISCONNECT;
4837 }
4838 pci_set_master(pdev);
4839
4840 pci_enable_wake(pdev, 3, 0);
4841 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4842
4843 /* Perform card reset only on one instance of the card */
4844 if (PCI_FUNC (pdev->devfn) != 0)
4845 return PCI_ERS_RESULT_RECOVERED;
4846
4847 e1000_reset(adapter);
4848 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4849
4850 return PCI_ERS_RESULT_RECOVERED;
4851}
4852
4853/**
4854 * e1000_io_resume - called when traffic can start flowing again.
4855 * @pdev: Pointer to PCI device
4856 *
4857 * This callback is called when the error recovery driver tells us that
4858 * its OK to resume normal operation. Implementation resembles the
4859 * second-half of the e1000_resume routine.
4860 */
4861static void e1000_io_resume(struct pci_dev *pdev)
4862{
4863 struct net_device *netdev = pci_get_drvdata(pdev);
4864 struct e1000_adapter *adapter = netdev->priv;
4865 uint32_t manc, swsm;
4866
4867 if (netif_running(netdev)) {
4868 if (e1000_up(adapter)) {
4869 printk("e1000: can't bring device back up after reset\n");
4870 return;
4871 }
4872 }
4873
4874 netif_device_attach(netdev);
4875
4876 if (adapter->hw.mac_type >= e1000_82540 &&
4877 adapter->hw.media_type == e1000_media_type_copper) {
4878 manc = E1000_READ_REG(&adapter->hw, MANC);
4879 manc &= ~(E1000_MANC_ARP_EN);
4880 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4881 }
4882
4883 switch (adapter->hw.mac_type) {
4884 case e1000_82573:
4885 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4886 E1000_WRITE_REG(&adapter->hw, SWSM,
4887 swsm | E1000_SWSM_DRV_LOAD);
4888 break;
4889 default:
4890 break;
4891 }
4892
4893 if (netif_running(netdev))
4894 mod_timer(&adapter->watchdog_timer, jiffies);
4895}
4896
1da177e4 4897/* e1000_main.c */
Linux kernel - Deliverables
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