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e1000: don't strip vlan ID if 8021q claims it
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
1da177e4 31char e1000_driver_name[] = "e1000";
3ad2cc67 32static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 33#ifndef CONFIG_E1000_NAPI
34#define DRIVERNAPI
35#else
36#define DRIVERNAPI "-NAPI"
37#endif
7cc33234 38#define DRV_VERSION "7.2.7-k2"DRIVERNAPI
1da177e4 39char e1000_driver_version[] = DRV_VERSION;
3d41e30a 40static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
49static struct pci_device_id e1000_pci_tbl[] = {
50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 101 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
b7ee49db 102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
1da177e4
LT		 106 /* required last entry */
107 {0,}
108};
109
110MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
111
35574764
NN		 112int e1000_up(struct e1000_adapter *adapter);
113void e1000_down(struct e1000_adapter *adapter);
114void e1000_reinit_locked(struct e1000_adapter *adapter);
115void e1000_reset(struct e1000_adapter *adapter);
116int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
117int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
118int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
119void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
120void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 121static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 122 struct e1000_tx_ring *txdr);
3ad2cc67 123static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 124 struct e1000_rx_ring *rxdr);
3ad2cc67 125static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 126 struct e1000_tx_ring *tx_ring);
3ad2cc67 127static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 128 struct e1000_rx_ring *rx_ring);
129void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 130
131static int e1000_init_module(void);
132static void e1000_exit_module(void);
133static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
134static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 135static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 136static int e1000_sw_init(struct e1000_adapter *adapter);
137static int e1000_open(struct net_device *netdev);
138static int e1000_close(struct net_device *netdev);
139static void e1000_configure_tx(struct e1000_adapter *adapter);
140static void e1000_configure_rx(struct e1000_adapter *adapter);
141static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 142static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
143static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
144static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
145 struct e1000_tx_ring *tx_ring);
146static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 148static void e1000_set_multi(struct net_device *netdev);
149static void e1000_update_phy_info(unsigned long data);
150static void e1000_watchdog(unsigned long data);
1da177e4
LT		 151static void e1000_82547_tx_fifo_stall(unsigned long data);
152static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155static int e1000_set_mac(struct net_device *netdev, void *p);
156static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 157static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
1da177e4 159#ifdef CONFIG_E1000_NAPI
581d708e 160static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 161static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 162 struct e1000_rx_ring *rx_ring,
1da177e4 163 int *work_done, int work_to_do);
2d7edb92 164static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 165 struct e1000_rx_ring *rx_ring,
2d7edb92 166 int *work_done, int work_to_do);
1da177e4 167#else
581d708e
MC		 168static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
1da177e4 172#endif
581d708e 173static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 174 struct e1000_rx_ring *rx_ring,
175 int cleaned_count);
581d708e 176static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 177 struct e1000_rx_ring *rx_ring,
178 int cleaned_count);
1da177e4
LT		 179static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
180static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
181 int cmd);
35574764 182void e1000_set_ethtool_ops(struct net_device *netdev);
1da177e4
LT		 183static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
184static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
185static void e1000_tx_timeout(struct net_device *dev);
87041639 186static void e1000_reset_task(struct net_device *dev);
1da177e4 187static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 188static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
189 struct sk_buff *skb);
1da177e4
LT		 190
191static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
192static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
193static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
194static void e1000_restore_vlan(struct e1000_adapter *adapter);
195
977e74b5 196static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 197#ifdef CONFIG_PM
1da177e4
LT		 198static int e1000_resume(struct pci_dev *pdev);
199#endif
c653e635 200static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 201
202#ifdef CONFIG_NET_POLL_CONTROLLER
203/* for netdump / net console */
204static void e1000_netpoll (struct net_device *netdev);
205#endif
206
35574764
NN		 207extern void e1000_check_options(struct e1000_adapter *adapter);
208
9026729b
AK		 209static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
210 pci_channel_state_t state);
211static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
212static void e1000_io_resume(struct pci_dev *pdev);
213
214static struct pci_error_handlers e1000_err_handler = {
215 .error_detected = e1000_io_error_detected,
216 .slot_reset = e1000_io_slot_reset,
217 .resume = e1000_io_resume,
218};
24025e4e 219
1da177e4
LT		 220static struct pci_driver e1000_driver = {
221 .name = e1000_driver_name,
222 .id_table = e1000_pci_tbl,
223 .probe = e1000_probe,
224 .remove = __devexit_p(e1000_remove),
c4e24f01 225#ifdef CONFIG_PM
1da177e4 226 /* Power Managment Hooks */
1da177e4 227 .suspend = e1000_suspend,
c653e635 228 .resume = e1000_resume,
1da177e4 229#endif
9026729b
AK		 230 .shutdown = e1000_shutdown,
231 .err_handler = &e1000_err_handler
1da177e4
LT		 232};
233
234MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
235MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
236MODULE_LICENSE("GPL");
237MODULE_VERSION(DRV_VERSION);
238
239static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
240module_param(debug, int, 0);
241MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
242
243/**
244 * e1000_init_module - Driver Registration Routine
245 *
246 * e1000_init_module is the first routine called when the driver is
247 * loaded. All it does is register with the PCI subsystem.
248 **/
249
250static int __init
251e1000_init_module(void)
252{
253 int ret;
254 printk(KERN_INFO "%s - version %s\n",
255 e1000_driver_string, e1000_driver_version);
256
257 printk(KERN_INFO "%s\n", e1000_copyright);
258
29917620 259 ret = pci_register_driver(&e1000_driver);
8b378def 260
1da177e4
LT		 261 return ret;
262}
263
264module_init(e1000_init_module);
265
266/**
267 * e1000_exit_module - Driver Exit Cleanup Routine
268 *
269 * e1000_exit_module is called just before the driver is removed
270 * from memory.
271 **/
272
273static void __exit
274e1000_exit_module(void)
275{
1da177e4
LT		 276 pci_unregister_driver(&e1000_driver);
277}
278
279module_exit(e1000_exit_module);
280
2db10a08
AK		 281static int e1000_request_irq(struct e1000_adapter *adapter)
282{
283 struct net_device *netdev = adapter->netdev;
284 int flags, err = 0;
285
c0bc8721 286 flags = IRQF_SHARED;
2db10a08
AK		 287#ifdef CONFIG_PCI_MSI
288 if (adapter->hw.mac_type > e1000_82547_rev_2) {
289 adapter->have_msi = TRUE;
290 if ((err = pci_enable_msi(adapter->pdev))) {
291 DPRINTK(PROBE, ERR,
292 "Unable to allocate MSI interrupt Error: %d\n", err);
293 adapter->have_msi = FALSE;
294 }
295 }
296 if (adapter->have_msi)
61ef5c00 297 flags &= ~IRQF_SHARED;
2db10a08
AK		 298#endif
299 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
300 netdev->name, netdev)))
301 DPRINTK(PROBE, ERR,
302 "Unable to allocate interrupt Error: %d\n", err);
303
304 return err;
305}
306
307static void e1000_free_irq(struct e1000_adapter *adapter)
308{
309 struct net_device *netdev = adapter->netdev;
310
311 free_irq(adapter->pdev->irq, netdev);
312
313#ifdef CONFIG_PCI_MSI
314 if (adapter->have_msi)
315 pci_disable_msi(adapter->pdev);
316#endif
317}
318
1da177e4
LT		 319/**
320 * e1000_irq_disable - Mask off interrupt generation on the NIC
321 * @adapter: board private structure
322 **/
323
e619d523 324static void
1da177e4
LT		 325e1000_irq_disable(struct e1000_adapter *adapter)
326{
327 atomic_inc(&adapter->irq_sem);
328 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
329 E1000_WRITE_FLUSH(&adapter->hw);
330 synchronize_irq(adapter->pdev->irq);
331}
332
333/**
334 * e1000_irq_enable - Enable default interrupt generation settings
335 * @adapter: board private structure
336 **/
337
e619d523 338static void
1da177e4
LT		 339e1000_irq_enable(struct e1000_adapter *adapter)
340{
96838a40 341 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 342 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
343 E1000_WRITE_FLUSH(&adapter->hw);
344 }
345}
3ad2cc67
AB		 346
347static void
2d7edb92
MC		 348e1000_update_mng_vlan(struct e1000_adapter *adapter)
349{
350 struct net_device *netdev = adapter->netdev;
351 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
352 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 353 if (adapter->vlgrp) {
354 if (!adapter->vlgrp->vlan_devices[vid]) {
355 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 356 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
357 e1000_vlan_rx_add_vid(netdev, vid);
358 adapter->mng_vlan_id = vid;
359 } else
360 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 361
362 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
363 (vid != old_vid) &&
2d7edb92
MC		 364 !adapter->vlgrp->vlan_devices[old_vid])
365 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 366 } else
367 adapter->mng_vlan_id = vid;
2d7edb92
MC		 368 }
369}
b55ccb35
JK		 370
371/**
372 * e1000_release_hw_control - release control of the h/w to f/w
373 * @adapter: address of board private structure
374 *
375 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
376 * For ASF and Pass Through versions of f/w this means that the
377 * driver is no longer loaded. For AMT version (only with 82573) i
378 * of the f/w this means that the netowrk i/f is closed.
76c224bc 379 *
b55ccb35
JK		 380 **/
381
e619d523 382static void
b55ccb35
JK		 383e1000_release_hw_control(struct e1000_adapter *adapter)
384{
385 uint32_t ctrl_ext;
386 uint32_t swsm;
cd94dd0b 387 uint32_t extcnf;
b55ccb35
JK		 388
389 /* Let firmware taken over control of h/w */
390 switch (adapter->hw.mac_type) {
391 case e1000_82571:
392 case e1000_82572:
4cc15f54 393 case e1000_80003es2lan:
b55ccb35
JK		 394 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
395 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
396 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
397 break;
398 case e1000_82573:
399 swsm = E1000_READ_REG(&adapter->hw, SWSM);
400 E1000_WRITE_REG(&adapter->hw, SWSM,
401 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 402 case e1000_ich8lan:
403 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
404 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
405 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
406 break;
b55ccb35
JK		 407 default:
408 break;
409 }
410}
411
412/**
413 * e1000_get_hw_control - get control of the h/w from f/w
414 * @adapter: address of board private structure
415 *
416 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 417 * For ASF and Pass Through versions of f/w this means that
418 * the driver is loaded. For AMT version (only with 82573)
b55ccb35 419 * of the f/w this means that the netowrk i/f is open.
76c224bc 420 *
b55ccb35
JK		 421 **/
422
e619d523 423static void
b55ccb35
JK		 424e1000_get_hw_control(struct e1000_adapter *adapter)
425{
426 uint32_t ctrl_ext;
427 uint32_t swsm;
cd94dd0b 428 uint32_t extcnf;
b55ccb35
JK		 429 /* Let firmware know the driver has taken over */
430 switch (adapter->hw.mac_type) {
431 case e1000_82571:
432 case e1000_82572:
4cc15f54 433 case e1000_80003es2lan:
b55ccb35
JK		 434 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
435 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
436 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
437 break;
438 case e1000_82573:
439 swsm = E1000_READ_REG(&adapter->hw, SWSM);
440 E1000_WRITE_REG(&adapter->hw, SWSM,
441 swsm | E1000_SWSM_DRV_LOAD);
442 break;
cd94dd0b
AK		 443 case e1000_ich8lan:
444 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
445 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
446 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
447 break;
b55ccb35
JK		 448 default:
449 break;
450 }
451}
452
1da177e4
LT		 453int
454e1000_up(struct e1000_adapter *adapter)
455{
456 struct net_device *netdev = adapter->netdev;
2db10a08 457 int i;
1da177e4
LT		 458
459 /* hardware has been reset, we need to reload some things */
460
1da177e4
LT		 461 e1000_set_multi(netdev);
462
463 e1000_restore_vlan(adapter);
464
465 e1000_configure_tx(adapter);
466 e1000_setup_rctl(adapter);
467 e1000_configure_rx(adapter);
72d64a43
JK		 468 /* call E1000_DESC_UNUSED which always leaves
469 * at least 1 descriptor unused to make sure
470 * next_to_use != next_to_clean */
f56799ea 471 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 472 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 473 adapter->alloc_rx_buf(adapter, ring,
474 E1000_DESC_UNUSED(ring));
f56799ea 475 }
1da177e4 476
7bfa4816
JK		 477 adapter->tx_queue_len = netdev->tx_queue_len;
478
1da177e4
LT		 479#ifdef CONFIG_E1000_NAPI
480 netif_poll_enable(netdev);
481#endif
5de55624
MC		 482 e1000_irq_enable(adapter);
483
1314bbf3
AK		 484 clear_bit(__E1000_DOWN, &adapter->flags);
485
486 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1da177e4
LT		 487 return 0;
488}
489
79f05bf0
AK		 490/**
491 * e1000_power_up_phy - restore link in case the phy was powered down
492 * @adapter: address of board private structure
493 *
494 * The phy may be powered down to save power and turn off link when the
495 * driver is unloaded and wake on lan is not enabled (among others)
496 * *** this routine MUST be followed by a call to e1000_reset ***
497 *
498 **/
499
d658266e 500void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 501{
502 uint16_t mii_reg = 0;
503
504 /* Just clear the power down bit to wake the phy back up */
505 if (adapter->hw.media_type == e1000_media_type_copper) {
506 /* according to the manual, the phy will retain its
507 * settings across a power-down/up cycle */
508 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
509 mii_reg &= ~MII_CR_POWER_DOWN;
510 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
511 }
512}
513
514static void e1000_power_down_phy(struct e1000_adapter *adapter)
515{
61c2505f
BA		 516 /* Power down the PHY so no link is implied when interface is down *
517 * The PHY cannot be powered down if any of the following is TRUE *
79f05bf0
AK		 518 * (a) WoL is enabled
519 * (b) AMT is active
520 * (c) SoL/IDER session is active */
521 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
61c2505f 522 adapter->hw.media_type == e1000_media_type_copper) {
79f05bf0 523 uint16_t mii_reg = 0;
61c2505f
BA		 524
525 switch (adapter->hw.mac_type) {
526 case e1000_82540:
527 case e1000_82545:
528 case e1000_82545_rev_3:
529 case e1000_82546:
530 case e1000_82546_rev_3:
531 case e1000_82541:
532 case e1000_82541_rev_2:
533 case e1000_82547:
534 case e1000_82547_rev_2:
535 if (E1000_READ_REG(&adapter->hw, MANC) &
536 E1000_MANC_SMBUS_EN)
537 goto out;
538 break;
539 case e1000_82571:
540 case e1000_82572:
541 case e1000_82573:
542 case e1000_80003es2lan:
543 case e1000_ich8lan:
544 if (e1000_check_mng_mode(&adapter->hw) ||
545 e1000_check_phy_reset_block(&adapter->hw))
546 goto out;
547 break;
548 default:
549 goto out;
550 }
79f05bf0
AK		 551 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
552 mii_reg |= MII_CR_POWER_DOWN;
553 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
554 mdelay(1);
555 }
61c2505f
BA		 556out:
557 return;
79f05bf0
AK		 558}
559
1da177e4
LT		 560void
561e1000_down(struct e1000_adapter *adapter)
562{
563 struct net_device *netdev = adapter->netdev;
564
1314bbf3
AK		 565 /* signal that we're down so the interrupt handler does not
566 * reschedule our watchdog timer */
567 set_bit(__E1000_DOWN, &adapter->flags);
568
1da177e4 569 e1000_irq_disable(adapter);
c1605eb3 570
1da177e4
LT		 571 del_timer_sync(&adapter->tx_fifo_stall_timer);
572 del_timer_sync(&adapter->watchdog_timer);
573 del_timer_sync(&adapter->phy_info_timer);
574
575#ifdef CONFIG_E1000_NAPI
576 netif_poll_disable(netdev);
577#endif
7bfa4816 578 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 579 adapter->link_speed = 0;
580 adapter->link_duplex = 0;
581 netif_carrier_off(netdev);
582 netif_stop_queue(netdev);
583
584 e1000_reset(adapter);
581d708e
MC		 585 e1000_clean_all_tx_rings(adapter);
586 e1000_clean_all_rx_rings(adapter);
1da177e4 587}
1da177e4 588
2db10a08
AK		 589void
590e1000_reinit_locked(struct e1000_adapter *adapter)
591{
592 WARN_ON(in_interrupt());
593 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
594 msleep(1);
595 e1000_down(adapter);
596 e1000_up(adapter);
597 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 598}
599
600void
601e1000_reset(struct e1000_adapter *adapter)
602{
2d7edb92 603 uint32_t pba, manc;
09ae3e88
JK		 604#ifdef DISABLE_MULR
605 uint32_t tctl;
606#endif
1125ecbc 607 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 608
609 /* Repartition Pba for greater than 9k mtu
610 * To take effect CTRL.RST is required.
611 */
612
2d7edb92
MC		 613 switch (adapter->hw.mac_type) {
614 case e1000_82547:
0e6ef3e0 615 case e1000_82547_rev_2:
2d7edb92
MC		 616 pba = E1000_PBA_30K;
617 break;
868d5309
MC		 618 case e1000_82571:
619 case e1000_82572:
6418ecc6 620 case e1000_80003es2lan:
868d5309
MC		 621 pba = E1000_PBA_38K;
622 break;
2d7edb92
MC		 623 case e1000_82573:
624 pba = E1000_PBA_12K;
625 break;
cd94dd0b
AK		 626 case e1000_ich8lan:
627 pba = E1000_PBA_8K;
628 break;
2d7edb92
MC		 629 default:
630 pba = E1000_PBA_48K;
631 break;
632 }
633
96838a40 634 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 635 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 636 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 637
638
96838a40 639 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 640 adapter->tx_fifo_head = 0;
641 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
642 adapter->tx_fifo_size =
643 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
644 atomic_set(&adapter->tx_fifo_stall, 0);
645 }
2d7edb92 646
1da177e4
LT		 647 E1000_WRITE_REG(&adapter->hw, PBA, pba);
648
649 /* flow control settings */
f11b7f85
JK		 650 /* Set the FC high water mark to 90% of the FIFO size.
651 * Required to clear last 3 LSB */
652 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 653 /* We can't use 90% on small FIFOs because the remainder
654 * would be less than 1 full frame. In this case, we size
655 * it to allow at least a full frame above the high water
656 * mark. */
657 if (pba < E1000_PBA_16K)
658 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 659
660 adapter->hw.fc_high_water = fc_high_water_mark;
661 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 662 if (adapter->hw.mac_type == e1000_80003es2lan)
663 adapter->hw.fc_pause_time = 0xFFFF;
664 else
665 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 666 adapter->hw.fc_send_xon = 1;
667 adapter->hw.fc = adapter->hw.original_fc;
668
2d7edb92 669 /* Allow time for pending master requests to run */
1da177e4 670 e1000_reset_hw(&adapter->hw);
96838a40 671 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 672 E1000_WRITE_REG(&adapter->hw, WUC, 0);
09ae3e88
JK		 673#ifdef DISABLE_MULR
674 /* disable Multiple Reads in Transmit Control Register for debugging */
675 tctl = E1000_READ_REG(hw, TCTL);
676 E1000_WRITE_REG(hw, TCTL, tctl & ~E1000_TCTL_MULR);
677
678#endif
96838a40 679 if (e1000_init_hw(&adapter->hw))
1da177e4 680 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 681 e1000_update_mng_vlan(adapter);
1da177e4
LT		 682 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
683 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
684
685 e1000_reset_adaptive(&adapter->hw);
686 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 687
688 if (!adapter->smart_power_down &&
689 (adapter->hw.mac_type == e1000_82571 ||
690 adapter->hw.mac_type == e1000_82572)) {
691 uint16_t phy_data = 0;
692 /* speed up time to link by disabling smart power down, ignore
693 * the return value of this function because there is nothing
694 * different we would do if it failed */
695 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
696 &phy_data);
697 phy_data &= ~IGP02E1000_PM_SPD;
698 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
699 phy_data);
700 }
701
5f01607a 702 if ((adapter->en_mng_pt) && (adapter->hw.mac_type < e1000_82571)) {
2d7edb92
MC		 703 manc = E1000_READ_REG(&adapter->hw, MANC);
704 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
705 E1000_WRITE_REG(&adapter->hw, MANC, manc);
706 }
1da177e4
LT		 707}
708
709/**
710 * e1000_probe - Device Initialization Routine
711 * @pdev: PCI device information struct
712 * @ent: entry in e1000_pci_tbl
713 *
714 * Returns 0 on success, negative on failure
715 *
716 * e1000_probe initializes an adapter identified by a pci_dev structure.
717 * The OS initialization, configuring of the adapter private structure,
718 * and a hardware reset occur.
719 **/
720
721static int __devinit
722e1000_probe(struct pci_dev *pdev,
723 const struct pci_device_id *ent)
724{
725 struct net_device *netdev;
726 struct e1000_adapter *adapter;
2d7edb92 727 unsigned long mmio_start, mmio_len;
cd94dd0b 728 unsigned long flash_start, flash_len;
2d7edb92 729
1da177e4 730 static int cards_found = 0;
120cd576 731 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 732 int i, err, pci_using_dac;
120cd576 733 uint16_t eeprom_data = 0;
1da177e4 734 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 735 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 736 return err;
737
cd94dd0b
AK		 738 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
739 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 740 pci_using_dac = 1;
741 } else {
cd94dd0b
AK		 742 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
743 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 744 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 745 goto err_dma;
1da177e4
LT		 746 }
747 pci_using_dac = 0;
748 }
749
96838a40 750 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 751 goto err_pci_reg;
1da177e4
LT		 752
753 pci_set_master(pdev);
754
6dd62ab0 755 err = -ENOMEM;
1da177e4 756 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 757 if (!netdev)
1da177e4 758 goto err_alloc_etherdev;
1da177e4
LT		 759
760 SET_MODULE_OWNER(netdev);
761 SET_NETDEV_DEV(netdev, &pdev->dev);
762
763 pci_set_drvdata(pdev, netdev);
60490fe0 764 adapter = netdev_priv(netdev);
1da177e4
LT		 765 adapter->netdev = netdev;
766 adapter->pdev = pdev;
767 adapter->hw.back = adapter;
768 adapter->msg_enable = (1 << debug) - 1;
769
770 mmio_start = pci_resource_start(pdev, BAR_0);
771 mmio_len = pci_resource_len(pdev, BAR_0);
772
6dd62ab0 773 err = -EIO;
1da177e4 774 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 775 if (!adapter->hw.hw_addr)
1da177e4 776 goto err_ioremap;
1da177e4 777
96838a40
JB		 778 for (i = BAR_1; i <= BAR_5; i++) {
779 if (pci_resource_len(pdev, i) == 0)
1da177e4 780 continue;
96838a40 781 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 782 adapter->hw.io_base = pci_resource_start(pdev, i);
783 break;
784 }
785 }
786
787 netdev->open = &e1000_open;
788 netdev->stop = &e1000_close;
789 netdev->hard_start_xmit = &e1000_xmit_frame;
790 netdev->get_stats = &e1000_get_stats;
791 netdev->set_multicast_list = &e1000_set_multi;
792 netdev->set_mac_address = &e1000_set_mac;
793 netdev->change_mtu = &e1000_change_mtu;
794 netdev->do_ioctl = &e1000_ioctl;
795 e1000_set_ethtool_ops(netdev);
796 netdev->tx_timeout = &e1000_tx_timeout;
797 netdev->watchdog_timeo = 5 * HZ;
798#ifdef CONFIG_E1000_NAPI
799 netdev->poll = &e1000_clean;
800 netdev->weight = 64;
801#endif
802 netdev->vlan_rx_register = e1000_vlan_rx_register;
803 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
804 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
805#ifdef CONFIG_NET_POLL_CONTROLLER
806 netdev->poll_controller = e1000_netpoll;
807#endif
0eb5a34c 808 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 809
810 netdev->mem_start = mmio_start;
811 netdev->mem_end = mmio_start + mmio_len;
812 netdev->base_addr = adapter->hw.io_base;
813
814 adapter->bd_number = cards_found;
815
816 /* setup the private structure */
817
96838a40 818 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 819 goto err_sw_init;
820
6dd62ab0 821 err = -EIO;
cd94dd0b
AK		 822 /* Flash BAR mapping must happen after e1000_sw_init
823 * because it depends on mac_type */
824 if ((adapter->hw.mac_type == e1000_ich8lan) &&
825 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
826 flash_start = pci_resource_start(pdev, 1);
827 flash_len = pci_resource_len(pdev, 1);
828 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 829 if (!adapter->hw.flash_address)
cd94dd0b 830 goto err_flashmap;
cd94dd0b
AK		 831 }
832
6dd62ab0 833 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 834 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
835
96838a40 836 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 837 netdev->features = NETIF_F_SG |
838 NETIF_F_HW_CSUM |
839 NETIF_F_HW_VLAN_TX |
840 NETIF_F_HW_VLAN_RX |
841 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 842 if (adapter->hw.mac_type == e1000_ich8lan)
843 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 844 }
845
846#ifdef NETIF_F_TSO
96838a40 847 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 848 (adapter->hw.mac_type != e1000_82547))
849 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 850
851#ifdef NETIF_F_TSO_IPV6
96838a40 852 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 853 netdev->features |= NETIF_F_TSO_IPV6;
854#endif
1da177e4 855#endif
96838a40 856 if (pci_using_dac)
1da177e4
LT		 857 netdev->features |= NETIF_F_HIGHDMA;
858
76c224bc
AK		 859 netdev->features |= NETIF_F_LLTX;
860
2d7edb92
MC		 861 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
862
cd94dd0b
AK		 863 /* initialize eeprom parameters */
864
865 if (e1000_init_eeprom_params(&adapter->hw)) {
866 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 867 goto err_eeprom;
cd94dd0b
AK		 868 }
869
96838a40 870 /* before reading the EEPROM, reset the controller to
1da177e4 871 * put the device in a known good starting state */
96838a40 872
1da177e4
LT		 873 e1000_reset_hw(&adapter->hw);
874
875 /* make sure the EEPROM is good */
876
96838a40 877 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 878 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 879 goto err_eeprom;
880 }
881
882 /* copy the MAC address out of the EEPROM */
883
96838a40 884 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 885 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
886 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 887 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 888
96838a40 889 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 890 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 891 goto err_eeprom;
892 }
893
1da177e4
LT		 894 e1000_get_bus_info(&adapter->hw);
895
896 init_timer(&adapter->tx_fifo_stall_timer);
897 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
898 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
899
900 init_timer(&adapter->watchdog_timer);
901 adapter->watchdog_timer.function = &e1000_watchdog;
902 adapter->watchdog_timer.data = (unsigned long) adapter;
903
1da177e4
LT		 904 init_timer(&adapter->phy_info_timer);
905 adapter->phy_info_timer.function = &e1000_update_phy_info;
906 adapter->phy_info_timer.data = (unsigned long) adapter;
907
87041639
JK		 908 INIT_WORK(&adapter->reset_task,
909 (void (*)(void *))e1000_reset_task, netdev);
1da177e4 910
1da177e4
LT		 911 e1000_check_options(adapter);
912
913 /* Initial Wake on LAN setting
914 * If APM wake is enabled in the EEPROM,
915 * enable the ACPI Magic Packet filter
916 */
917
96838a40 918 switch (adapter->hw.mac_type) {
1da177e4
LT		 919 case e1000_82542_rev2_0:
920 case e1000_82542_rev2_1:
921 case e1000_82543:
922 break;
923 case e1000_82544:
924 e1000_read_eeprom(&adapter->hw,
925 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
926 eeprom_apme_mask = E1000_EEPROM_82544_APM;
927 break;
cd94dd0b
AK		 928 case e1000_ich8lan:
929 e1000_read_eeprom(&adapter->hw,
930 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
931 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
932 break;
1da177e4
LT		 933 case e1000_82546:
934 case e1000_82546_rev_3:
fd803241 935 case e1000_82571:
6418ecc6 936 case e1000_80003es2lan:
96838a40 937 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 938 e1000_read_eeprom(&adapter->hw,
939 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
940 break;
941 }
942 /* Fall Through */
943 default:
944 e1000_read_eeprom(&adapter->hw,
945 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
946 break;
947 }
96838a40 948 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 949 adapter->eeprom_wol |= E1000_WUFC_MAG;
950
951 /* now that we have the eeprom settings, apply the special cases
952 * where the eeprom may be wrong or the board simply won't support
953 * wake on lan on a particular port */
954 switch (pdev->device) {
955 case E1000_DEV_ID_82546GB_PCIE:
956 adapter->eeprom_wol = 0;
957 break;
958 case E1000_DEV_ID_82546EB_FIBER:
959 case E1000_DEV_ID_82546GB_FIBER:
960 case E1000_DEV_ID_82571EB_FIBER:
961 /* Wake events only supported on port A for dual fiber
962 * regardless of eeprom setting */
963 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
964 adapter->eeprom_wol = 0;
965 break;
966 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 967 case E1000_DEV_ID_82571EB_QUAD_COPPER:
120cd576
JB		 968 /* if quad port adapter, disable WoL on all but port A */
969 if (global_quad_port_a != 0)
970 adapter->eeprom_wol = 0;
971 else
972 adapter->quad_port_a = 1;
973 /* Reset for multiple quad port adapters */
974 if (++global_quad_port_a == 4)
975 global_quad_port_a = 0;
976 break;
977 }
978
979 /* initialize the wol settings based on the eeprom settings */
980 adapter->wol = adapter->eeprom_wol;
1da177e4 981
fb3d47d4
JK		 982 /* print bus type/speed/width info */
983 {
984 struct e1000_hw *hw = &adapter->hw;
985 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
986 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
987 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
988 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
989 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
990 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
991 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
992 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
993 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
994 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
995 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
996 "32-bit"));
997 }
998
999 for (i = 0; i < 6; i++)
1000 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1001
1da177e4
LT		 1002 /* reset the hardware with the new settings */
1003 e1000_reset(adapter);
1004
b55ccb35
JK		 1005 /* If the controller is 82573 and f/w is AMT, do not set
1006 * DRV_LOAD until the interface is up. For all other cases,
1007 * let the f/w know that the h/w is now under the control
1008 * of the driver. */
1009 if (adapter->hw.mac_type != e1000_82573 ||
1010 !e1000_check_mng_mode(&adapter->hw))
1011 e1000_get_hw_control(adapter);
2d7edb92 1012
1da177e4 1013 strcpy(netdev->name, "eth%d");
96838a40 1014 if ((err = register_netdev(netdev)))
1da177e4
LT		 1015 goto err_register;
1016
1314bbf3
AK		 1017 /* tell the stack to leave us alone until e1000_open() is called */
1018 netif_carrier_off(netdev);
1019 netif_stop_queue(netdev);
1020
1da177e4
LT		 1021 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1022
1023 cards_found++;
1024 return 0;
1025
1026err_register:
6dd62ab0
VA		 1027 e1000_release_hw_control(adapter);
1028err_eeprom:
1029 if (!e1000_check_phy_reset_block(&adapter->hw))
1030 e1000_phy_hw_reset(&adapter->hw);
1031
cd94dd0b
AK		 1032 if (adapter->hw.flash_address)
1033 iounmap(adapter->hw.flash_address);
1034err_flashmap:
6dd62ab0
VA		 1035#ifdef CONFIG_E1000_NAPI
1036 for (i = 0; i < adapter->num_rx_queues; i++)
1037 dev_put(&adapter->polling_netdev[i]);
1038#endif
1039
1040 kfree(adapter->tx_ring);
1041 kfree(adapter->rx_ring);
1042#ifdef CONFIG_E1000_NAPI
1043 kfree(adapter->polling_netdev);
1044#endif
1da177e4 1045err_sw_init:
1da177e4
LT		 1046 iounmap(adapter->hw.hw_addr);
1047err_ioremap:
1048 free_netdev(netdev);
1049err_alloc_etherdev:
1050 pci_release_regions(pdev);
6dd62ab0
VA		 1051err_pci_reg:
1052err_dma:
1053 pci_disable_device(pdev);
1da177e4
LT		 1054 return err;
1055}
1056
1057/**
1058 * e1000_remove - Device Removal Routine
1059 * @pdev: PCI device information struct
1060 *
1061 * e1000_remove is called by the PCI subsystem to alert the driver
1062 * that it should release a PCI device. The could be caused by a
1063 * Hot-Plug event, or because the driver is going to be removed from
1064 * memory.
1065 **/
1066
1067static void __devexit
1068e1000_remove(struct pci_dev *pdev)
1069{
1070 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1071 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 1072 uint32_t manc;
581d708e
MC		 1073#ifdef CONFIG_E1000_NAPI
1074 int i;
1075#endif
1da177e4 1076
be2b28ed
JG		 1077 flush_scheduled_work();
1078
5f01607a 1079 if (adapter->hw.mac_type < e1000_82571 &&
1da177e4
LT		 1080 adapter->hw.media_type == e1000_media_type_copper) {
1081 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 1082 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 1083 manc |= E1000_MANC_ARP_EN;
1084 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1085 }
1086 }
1087
b55ccb35
JK		 1088 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1089 * would have already happened in close and is redundant. */
1090 e1000_release_hw_control(adapter);
2d7edb92 1091
1da177e4 1092 unregister_netdev(netdev);
581d708e 1093#ifdef CONFIG_E1000_NAPI
f56799ea 1094 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1095 dev_put(&adapter->polling_netdev[i]);
581d708e 1096#endif
1da177e4 1097
96838a40 1098 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1099 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1100
24025e4e
MC		 1101 kfree(adapter->tx_ring);
1102 kfree(adapter->rx_ring);
1103#ifdef CONFIG_E1000_NAPI
1104 kfree(adapter->polling_netdev);
1105#endif
1106
1da177e4 1107 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1108 if (adapter->hw.flash_address)
1109 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1110 pci_release_regions(pdev);
1111
1112 free_netdev(netdev);
1113
1114 pci_disable_device(pdev);
1115}
1116
1117/**
1118 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1119 * @adapter: board private structure to initialize
1120 *
1121 * e1000_sw_init initializes the Adapter private data structure.
1122 * Fields are initialized based on PCI device information and
1123 * OS network device settings (MTU size).
1124 **/
1125
1126static int __devinit
1127e1000_sw_init(struct e1000_adapter *adapter)
1128{
1129 struct e1000_hw *hw = &adapter->hw;
1130 struct net_device *netdev = adapter->netdev;
1131 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1132#ifdef CONFIG_E1000_NAPI
1133 int i;
1134#endif
1da177e4
LT		 1135
1136 /* PCI config space info */
1137
1138 hw->vendor_id = pdev->vendor;
1139 hw->device_id = pdev->device;
1140 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1141 hw->subsystem_id = pdev->subsystem_device;
1142
1143 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1144
1145 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1146
eb0f8054 1147 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1148 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1149 hw->max_frame_size = netdev->mtu +
1150 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1151 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1152
1153 /* identify the MAC */
1154
96838a40 1155 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1156 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1157 return -EIO;
1158 }
1159
96838a40 1160 switch (hw->mac_type) {
1da177e4
LT		 1161 default:
1162 break;
1163 case e1000_82541:
1164 case e1000_82547:
1165 case e1000_82541_rev_2:
1166 case e1000_82547_rev_2:
1167 hw->phy_init_script = 1;
1168 break;
1169 }
1170
1171 e1000_set_media_type(hw);
1172
1173 hw->wait_autoneg_complete = FALSE;
1174 hw->tbi_compatibility_en = TRUE;
1175 hw->adaptive_ifs = TRUE;
1176
1177 /* Copper options */
1178
96838a40 1179 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1180 hw->mdix = AUTO_ALL_MODES;
1181 hw->disable_polarity_correction = FALSE;
1182 hw->master_slave = E1000_MASTER_SLAVE;
1183 }
1184
f56799ea
JK		 1185 adapter->num_tx_queues = 1;
1186 adapter->num_rx_queues = 1;
581d708e
MC		 1187
1188 if (e1000_alloc_queues(adapter)) {
1189 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1190 return -ENOMEM;
1191 }
1192
1193#ifdef CONFIG_E1000_NAPI
f56799ea 1194 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1195 adapter->polling_netdev[i].priv = adapter;
1196 adapter->polling_netdev[i].poll = &e1000_clean;
1197 adapter->polling_netdev[i].weight = 64;
1198 dev_hold(&adapter->polling_netdev[i]);
1199 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1200 }
7bfa4816 1201 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1202#endif
1203
1da177e4
LT		 1204 atomic_set(&adapter->irq_sem, 1);
1205 spin_lock_init(&adapter->stats_lock);
1da177e4 1206
1314bbf3
AK		 1207 set_bit(__E1000_DOWN, &adapter->flags);
1208
1da177e4
LT		 1209 return 0;
1210}
1211
581d708e
MC		 1212/**
1213 * e1000_alloc_queues - Allocate memory for all rings
1214 * @adapter: board private structure to initialize
1215 *
1216 * We allocate one ring per queue at run-time since we don't know the
1217 * number of queues at compile-time. The polling_netdev array is
1218 * intended for Multiqueue, but should work fine with a single queue.
1219 **/
1220
1221static int __devinit
1222e1000_alloc_queues(struct e1000_adapter *adapter)
1223{
1224 int size;
1225
f56799ea 1226 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1227 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1228 if (!adapter->tx_ring)
1229 return -ENOMEM;
1230 memset(adapter->tx_ring, 0, size);
1231
f56799ea 1232 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1233 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1234 if (!adapter->rx_ring) {
1235 kfree(adapter->tx_ring);
1236 return -ENOMEM;
1237 }
1238 memset(adapter->rx_ring, 0, size);
1239
1240#ifdef CONFIG_E1000_NAPI
f56799ea 1241 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1242 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1243 if (!adapter->polling_netdev) {
1244 kfree(adapter->tx_ring);
1245 kfree(adapter->rx_ring);
1246 return -ENOMEM;
1247 }
1248 memset(adapter->polling_netdev, 0, size);
1249#endif
1250
1251 return E1000_SUCCESS;
1252}
1253
1da177e4
LT		 1254/**
1255 * e1000_open - Called when a network interface is made active
1256 * @netdev: network interface device structure
1257 *
1258 * Returns 0 on success, negative value on failure
1259 *
1260 * The open entry point is called when a network interface is made
1261 * active by the system (IFF_UP). At this point all resources needed
1262 * for transmit and receive operations are allocated, the interrupt
1263 * handler is registered with the OS, the watchdog timer is started,
1264 * and the stack is notified that the interface is ready.
1265 **/
1266
1267static int
1268e1000_open(struct net_device *netdev)
1269{
60490fe0 1270 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1271 int err;
1272
2db10a08 1273 /* disallow open during test */
1314bbf3 1274 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1275 return -EBUSY;
1276
1da177e4
LT		 1277 /* allocate transmit descriptors */
1278
581d708e 1279 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1280 goto err_setup_tx;
1281
1282 /* allocate receive descriptors */
1283
581d708e 1284 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1285 goto err_setup_rx;
1286
2db10a08
AK		 1287 err = e1000_request_irq(adapter);
1288 if (err)
401a552b 1289 goto err_req_irq;
2db10a08 1290
79f05bf0
AK		 1291 e1000_power_up_phy(adapter);
1292
96838a40 1293 if ((err = e1000_up(adapter)))
1da177e4 1294 goto err_up;
2d7edb92 1295 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1296 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1297 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1298 e1000_update_mng_vlan(adapter);
1299 }
1da177e4 1300
b55ccb35
JK		 1301 /* If AMT is enabled, let the firmware know that the network
1302 * interface is now open */
1303 if (adapter->hw.mac_type == e1000_82573 &&
1304 e1000_check_mng_mode(&adapter->hw))
1305 e1000_get_hw_control(adapter);
1306
1da177e4
LT		 1307 return E1000_SUCCESS;
1308
1309err_up:
401a552b
VA		 1310 e1000_power_down_phy(adapter);
1311 e1000_free_irq(adapter);
1312err_req_irq:
581d708e 1313 e1000_free_all_rx_resources(adapter);
1da177e4 1314err_setup_rx:
581d708e 1315 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1316err_setup_tx:
1317 e1000_reset(adapter);
1318
1319 return err;
1320}
1321
1322/**
1323 * e1000_close - Disables a network interface
1324 * @netdev: network interface device structure
1325 *
1326 * Returns 0, this is not allowed to fail
1327 *
1328 * The close entry point is called when an interface is de-activated
1329 * by the OS. The hardware is still under the drivers control, but
1330 * needs to be disabled. A global MAC reset is issued to stop the
1331 * hardware, and all transmit and receive resources are freed.
1332 **/
1333
1334static int
1335e1000_close(struct net_device *netdev)
1336{
60490fe0 1337 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1338
2db10a08 1339 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1340 e1000_down(adapter);
79f05bf0 1341 e1000_power_down_phy(adapter);
2db10a08 1342 e1000_free_irq(adapter);
1da177e4 1343
581d708e
MC		 1344 e1000_free_all_tx_resources(adapter);
1345 e1000_free_all_rx_resources(adapter);
1da177e4 1346
4666560a
BA		 1347 /* kill manageability vlan ID if supported, but not if a vlan with
1348 * the same ID is registered on the host OS (let 8021q kill it) */
96838a40 1349 if ((adapter->hw.mng_cookie.status &
4666560a
BA		 1350 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1351 !(adapter->vlgrp &&
1352 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
2d7edb92
MC		 1353 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1354 }
b55ccb35
JK		 1355
1356 /* If AMT is enabled, let the firmware know that the network
1357 * interface is now closed */
1358 if (adapter->hw.mac_type == e1000_82573 &&
1359 e1000_check_mng_mode(&adapter->hw))
1360 e1000_release_hw_control(adapter);
1361
1da177e4
LT		 1362 return 0;
1363}
1364
1365/**
1366 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1367 * @adapter: address of board private structure
2d7edb92
MC		 1368 * @start: address of beginning of memory
1369 * @len: length of memory
1da177e4 1370 **/
e619d523 1371static boolean_t
1da177e4
LT		 1372e1000_check_64k_bound(struct e1000_adapter *adapter,
1373 void *start, unsigned long len)
1374{
1375 unsigned long begin = (unsigned long) start;
1376 unsigned long end = begin + len;
1377
2648345f
MC		 1378 /* First rev 82545 and 82546 need to not allow any memory
1379 * write location to cross 64k boundary due to errata 23 */
1da177e4 1380 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1381 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1382 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1383 }
1384
1385 return TRUE;
1386}
1387
1388/**
1389 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1390 * @adapter: board private structure
581d708e 1391 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1392 *
1393 * Return 0 on success, negative on failure
1394 **/
1395
3ad2cc67 1396static int
581d708e
MC		 1397e1000_setup_tx_resources(struct e1000_adapter *adapter,
1398 struct e1000_tx_ring *txdr)
1da177e4 1399{
1da177e4
LT		 1400 struct pci_dev *pdev = adapter->pdev;
1401 int size;
1402
1403 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1404 txdr->buffer_info = vmalloc(size);
96838a40 1405 if (!txdr->buffer_info) {
2648345f
MC		 1406 DPRINTK(PROBE, ERR,
1407 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1408 return -ENOMEM;
1409 }
1410 memset(txdr->buffer_info, 0, size);
1411
1412 /* round up to nearest 4K */
1413
1414 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1415 E1000_ROUNDUP(txdr->size, 4096);
1416
1417 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1418 if (!txdr->desc) {
1da177e4 1419setup_tx_desc_die:
1da177e4 1420 vfree(txdr->buffer_info);
2648345f
MC		 1421 DPRINTK(PROBE, ERR,
1422 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1423 return -ENOMEM;
1424 }
1425
2648345f 1426 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1427 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1428 void *olddesc = txdr->desc;
1429 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1430 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1431 "at %p\n", txdr->size, txdr->desc);
1432 /* Try again, without freeing the previous */
1da177e4 1433 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1434 /* Failed allocation, critical failure */
96838a40 1435 if (!txdr->desc) {
1da177e4
LT		 1436 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1437 goto setup_tx_desc_die;
1438 }
1439
1440 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1441 /* give up */
2648345f
MC		 1442 pci_free_consistent(pdev, txdr->size, txdr->desc,
1443 txdr->dma);
1da177e4
LT		 1444 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1445 DPRINTK(PROBE, ERR,
2648345f
MC		 1446 "Unable to allocate aligned memory "
1447 "for the transmit descriptor ring\n");
1da177e4
LT		 1448 vfree(txdr->buffer_info);
1449 return -ENOMEM;
1450 } else {
2648345f 1451 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1452 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1453 }
1454 }
1455 memset(txdr->desc, 0, txdr->size);
1456
1457 txdr->next_to_use = 0;
1458 txdr->next_to_clean = 0;
2ae76d98 1459 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1460
1461 return 0;
1462}
1463
581d708e
MC		 1464/**
1465 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1466 * (Descriptors) for all queues
1467 * @adapter: board private structure
1468 *
581d708e
MC		 1469 * Return 0 on success, negative on failure
1470 **/
1471
1472int
1473e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1474{
1475 int i, err = 0;
1476
f56799ea 1477 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1478 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1479 if (err) {
1480 DPRINTK(PROBE, ERR,
1481 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1482 for (i-- ; i >= 0; i--)
1483 e1000_free_tx_resources(adapter,
1484 &adapter->tx_ring[i]);
581d708e
MC		 1485 break;
1486 }
1487 }
1488
1489 return err;
1490}
1491
1da177e4
LT		 1492/**
1493 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1494 * @adapter: board private structure
1495 *
1496 * Configure the Tx unit of the MAC after a reset.
1497 **/
1498
1499static void
1500e1000_configure_tx(struct e1000_adapter *adapter)
1501{
581d708e
MC		 1502 uint64_t tdba;
1503 struct e1000_hw *hw = &adapter->hw;
1504 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1505 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1506
1507 /* Setup the HW Tx Head and Tail descriptor pointers */
1508
f56799ea 1509 switch (adapter->num_tx_queues) {
24025e4e
MC		 1510 case 1:
1511 default:
581d708e
MC		 1512 tdba = adapter->tx_ring[0].dma;
1513 tdlen = adapter->tx_ring[0].count *
1514 sizeof(struct e1000_tx_desc);
581d708e 1515 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1516 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1517 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1518 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1519 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1520 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1521 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1522 break;
1523 }
1da177e4
LT		 1524
1525 /* Set the default values for the Tx Inter Packet Gap timer */
1526
0fadb059
JK		 1527 if (hw->media_type == e1000_media_type_fiber ||
1528 hw->media_type == e1000_media_type_internal_serdes)
1529 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1530 else
1531 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1532
581d708e 1533 switch (hw->mac_type) {
1da177e4
LT		 1534 case e1000_82542_rev2_0:
1535 case e1000_82542_rev2_1:
1536 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1537 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1538 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1539 break;
87041639
JK		 1540 case e1000_80003es2lan:
1541 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1542 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1543 break;
1da177e4 1544 default:
0fadb059
JK		 1545 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1546 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1547 break;
1da177e4 1548 }
0fadb059
JK		 1549 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1550 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1551 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1552
1553 /* Set the Tx Interrupt Delay register */
1554
581d708e
MC		 1555 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1556 if (hw->mac_type >= e1000_82540)
1557 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1558
1559 /* Program the Transmit Control Register */
1560
581d708e 1561 tctl = E1000_READ_REG(hw, TCTL);
1da177e4 1562 tctl &= ~E1000_TCTL_CT;
7e6c9861 1563 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1564 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1565
2ae76d98
MC		 1566 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1567 tarc = E1000_READ_REG(hw, TARC0);
09ae3e88 1568 tarc |= (1 << 21);
2ae76d98 1569 E1000_WRITE_REG(hw, TARC0, tarc);
87041639
JK		 1570 } else if (hw->mac_type == e1000_80003es2lan) {
1571 tarc = E1000_READ_REG(hw, TARC0);
1572 tarc |= 1;
87041639
JK		 1573 E1000_WRITE_REG(hw, TARC0, tarc);
1574 tarc = E1000_READ_REG(hw, TARC1);
1575 tarc |= 1;
1576 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1577 }
1578
581d708e 1579 e1000_config_collision_dist(hw);
1da177e4
LT		 1580
1581 /* Setup Transmit Descriptor Settings for eop descriptor */
1582 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1583 E1000_TXD_CMD_IFCS;
1584
581d708e 1585 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1586 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1587 else
1588 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1589
1590 /* Cache if we're 82544 running in PCI-X because we'll
1591 * need this to apply a workaround later in the send path. */
581d708e
MC		 1592 if (hw->mac_type == e1000_82544 &&
1593 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1594 adapter->pcix_82544 = 1;
7e6c9861
JK		 1595
1596 E1000_WRITE_REG(hw, TCTL, tctl);
1597
1da177e4
LT		 1598}
1599
1600/**
1601 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1602 * @adapter: board private structure
581d708e 1603 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1604 *
1605 * Returns 0 on success, negative on failure
1606 **/
1607
3ad2cc67 1608static int
581d708e
MC		 1609e1000_setup_rx_resources(struct e1000_adapter *adapter,
1610 struct e1000_rx_ring *rxdr)
1da177e4 1611{
1da177e4 1612 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1613 int size, desc_len;
1da177e4
LT		 1614
1615 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1616 rxdr->buffer_info = vmalloc(size);
581d708e 1617 if (!rxdr->buffer_info) {
2648345f
MC		 1618 DPRINTK(PROBE, ERR,
1619 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1620 return -ENOMEM;
1621 }
1622 memset(rxdr->buffer_info, 0, size);
1623
2d7edb92
MC		 1624 size = sizeof(struct e1000_ps_page) * rxdr->count;
1625 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1626 if (!rxdr->ps_page) {
2d7edb92
MC		 1627 vfree(rxdr->buffer_info);
1628 DPRINTK(PROBE, ERR,
1629 "Unable to allocate memory for the receive descriptor ring\n");
1630 return -ENOMEM;
1631 }
1632 memset(rxdr->ps_page, 0, size);
1633
1634 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1635 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1636 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1637 vfree(rxdr->buffer_info);
1638 kfree(rxdr->ps_page);
1639 DPRINTK(PROBE, ERR,
1640 "Unable to allocate memory for the receive descriptor ring\n");
1641 return -ENOMEM;
1642 }
1643 memset(rxdr->ps_page_dma, 0, size);
1644
96838a40 1645 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1646 desc_len = sizeof(struct e1000_rx_desc);
1647 else
1648 desc_len = sizeof(union e1000_rx_desc_packet_split);
1649
1da177e4
LT		 1650 /* Round up to nearest 4K */
1651
2d7edb92 1652 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1653 E1000_ROUNDUP(rxdr->size, 4096);
1654
1655 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1656
581d708e
MC		 1657 if (!rxdr->desc) {
1658 DPRINTK(PROBE, ERR,
1659 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1660setup_rx_desc_die:
1da177e4 1661 vfree(rxdr->buffer_info);
2d7edb92
MC		 1662 kfree(rxdr->ps_page);
1663 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1664 return -ENOMEM;
1665 }
1666
2648345f 1667 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1668 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1669 void *olddesc = rxdr->desc;
1670 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1671 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1672 "at %p\n", rxdr->size, rxdr->desc);
1673 /* Try again, without freeing the previous */
1da177e4 1674 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1675 /* Failed allocation, critical failure */
581d708e 1676 if (!rxdr->desc) {
1da177e4 1677 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1678 DPRINTK(PROBE, ERR,
1679 "Unable to allocate memory "
1680 "for the receive descriptor ring\n");
1da177e4
LT		 1681 goto setup_rx_desc_die;
1682 }
1683
1684 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1685 /* give up */
2648345f
MC		 1686 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1687 rxdr->dma);
1da177e4 1688 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1689 DPRINTK(PROBE, ERR,
1690 "Unable to allocate aligned memory "
1691 "for the receive descriptor ring\n");
581d708e 1692 goto setup_rx_desc_die;
1da177e4 1693 } else {
2648345f 1694 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1695 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1696 }
1697 }
1698 memset(rxdr->desc, 0, rxdr->size);
1699
1700 rxdr->next_to_clean = 0;
1701 rxdr->next_to_use = 0;
1702
1703 return 0;
1704}
1705
581d708e
MC		 1706/**
1707 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1708 * (Descriptors) for all queues
1709 * @adapter: board private structure
1710 *
581d708e
MC		 1711 * Return 0 on success, negative on failure
1712 **/
1713
1714int
1715e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1716{
1717 int i, err = 0;
1718
f56799ea 1719 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1720 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1721 if (err) {
1722 DPRINTK(PROBE, ERR,
1723 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1724 for (i-- ; i >= 0; i--)
1725 e1000_free_rx_resources(adapter,
1726 &adapter->rx_ring[i]);
581d708e
MC		 1727 break;
1728 }
1729 }
1730
1731 return err;
1732}
1733
1da177e4 1734/**
2648345f 1735 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1736 * @adapter: Board private structure
1737 **/
e4c811c9
MC		 1738#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1739 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1740static void
1741e1000_setup_rctl(struct e1000_adapter *adapter)
1742{
2d7edb92
MC		 1743 uint32_t rctl, rfctl;
1744 uint32_t psrctl = 0;
35ec56bb 1745#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1746 uint32_t pages = 0;
1747#endif
1da177e4
LT		 1748
1749 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1750
1751 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1752
1753 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1754 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1755 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1756
0fadb059 1757 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1758 rctl |= E1000_RCTL_SBP;
1759 else
1760 rctl &= ~E1000_RCTL_SBP;
1761
2d7edb92
MC		 1762 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1763 rctl &= ~E1000_RCTL_LPE;
1764 else
1765 rctl |= E1000_RCTL_LPE;
1766
1da177e4 1767 /* Setup buffer sizes */
9e2feace
AK		 1768 rctl &= ~E1000_RCTL_SZ_4096;
1769 rctl |= E1000_RCTL_BSEX;
1770 switch (adapter->rx_buffer_len) {
1771 case E1000_RXBUFFER_256:
1772 rctl |= E1000_RCTL_SZ_256;
1773 rctl &= ~E1000_RCTL_BSEX;
1774 break;
1775 case E1000_RXBUFFER_512:
1776 rctl |= E1000_RCTL_SZ_512;
1777 rctl &= ~E1000_RCTL_BSEX;
1778 break;
1779 case E1000_RXBUFFER_1024:
1780 rctl |= E1000_RCTL_SZ_1024;
1781 rctl &= ~E1000_RCTL_BSEX;
1782 break;
a1415ee6
JK		 1783 case E1000_RXBUFFER_2048:
1784 default:
1785 rctl |= E1000_RCTL_SZ_2048;
1786 rctl &= ~E1000_RCTL_BSEX;
1787 break;
1788 case E1000_RXBUFFER_4096:
1789 rctl |= E1000_RCTL_SZ_4096;
1790 break;
1791 case E1000_RXBUFFER_8192:
1792 rctl |= E1000_RCTL_SZ_8192;
1793 break;
1794 case E1000_RXBUFFER_16384:
1795 rctl |= E1000_RCTL_SZ_16384;
1796 break;
2d7edb92
MC		 1797 }
1798
35ec56bb 1799#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1800 /* 82571 and greater support packet-split where the protocol
1801 * header is placed in skb->data and the packet data is
1802 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1803 * In the case of a non-split, skb->data is linearly filled,
1804 * followed by the page buffers. Therefore, skb->data is
1805 * sized to hold the largest protocol header.
1806 */
e4c811c9
MC		 1807 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1808 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1809 PAGE_SIZE <= 16384)
1810 adapter->rx_ps_pages = pages;
1811 else
1812 adapter->rx_ps_pages = 0;
2d7edb92 1813#endif
e4c811c9 1814 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1815 /* Configure extra packet-split registers */
1816 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1817 rfctl |= E1000_RFCTL_EXTEN;
1818 /* disable IPv6 packet split support */
1819 rfctl |= E1000_RFCTL_IPV6_DIS;
1820 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1821
7dfee0cb 1822 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1823
2d7edb92
MC		 1824 psrctl |= adapter->rx_ps_bsize0 >>
1825 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1826
1827 switch (adapter->rx_ps_pages) {
1828 case 3:
1829 psrctl |= PAGE_SIZE <<
1830 E1000_PSRCTL_BSIZE3_SHIFT;
1831 case 2:
1832 psrctl |= PAGE_SIZE <<
1833 E1000_PSRCTL_BSIZE2_SHIFT;
1834 case 1:
1835 psrctl |= PAGE_SIZE >>
1836 E1000_PSRCTL_BSIZE1_SHIFT;
1837 break;
1838 }
2d7edb92
MC		 1839
1840 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1841 }
1842
1843 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1844}
1845
1846/**
1847 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1848 * @adapter: board private structure
1849 *
1850 * Configure the Rx unit of the MAC after a reset.
1851 **/
1852
1853static void
1854e1000_configure_rx(struct e1000_adapter *adapter)
1855{
581d708e
MC		 1856 uint64_t rdba;
1857 struct e1000_hw *hw = &adapter->hw;
1858 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1859
e4c811c9 1860 if (adapter->rx_ps_pages) {
0f15a8fa 1861 /* this is a 32 byte descriptor */
581d708e 1862 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1863 sizeof(union e1000_rx_desc_packet_split);
1864 adapter->clean_rx = e1000_clean_rx_irq_ps;
1865 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1866 } else {
581d708e
MC		 1867 rdlen = adapter->rx_ring[0].count *
1868 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1869 adapter->clean_rx = e1000_clean_rx_irq;
1870 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1871 }
1da177e4
LT		 1872
1873 /* disable receives while setting up the descriptors */
581d708e
MC		 1874 rctl = E1000_READ_REG(hw, RCTL);
1875 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1876
1877 /* set the Receive Delay Timer Register */
581d708e 1878 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1879
581d708e
MC		 1880 if (hw->mac_type >= e1000_82540) {
1881 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1882 if (adapter->itr > 1)
581d708e 1883 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1884 1000000000 / (adapter->itr * 256));
1885 }
1886
2ae76d98 1887 if (hw->mac_type >= e1000_82571) {
2ae76d98 1888 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1889 /* Reset delay timers after every interrupt */
6fc7a7ec 1890 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1891#ifdef CONFIG_E1000_NAPI
1892 /* Auto-Mask interrupts upon ICR read. */
1893 ctrl_ext |= E1000_CTRL_EXT_IAME;
1894#endif
2ae76d98 1895 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1896 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1897 E1000_WRITE_FLUSH(hw);
1898 }
1899
581d708e
MC		 1900 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1901 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1902 switch (adapter->num_rx_queues) {
24025e4e
MC		 1903 case 1:
1904 default:
581d708e 1905 rdba = adapter->rx_ring[0].dma;
581d708e 1906 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1907 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1908 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1909 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1910 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 1911 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1912 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1913 break;
24025e4e
MC		 1914 }
1915
1da177e4 1916 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1917 if (hw->mac_type >= e1000_82543) {
1918 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1919 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1920 rxcsum |= E1000_RXCSUM_TUOFL;
1921
868d5309 1922 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1923 * Must be used in conjunction with packet-split. */
96838a40
JB		 1924 if ((hw->mac_type >= e1000_82571) &&
1925 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1926 rxcsum |= E1000_RXCSUM_IPPCSE;
1927 }
1928 } else {
1929 rxcsum &= ~E1000_RXCSUM_TUOFL;
1930 /* don't need to clear IPPCSE as it defaults to 0 */
1931 }
581d708e 1932 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1933 }
1934
1935 /* Enable Receives */
581d708e 1936 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1937}
1938
1939/**
581d708e 1940 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1941 * @adapter: board private structure
581d708e 1942 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1943 *
1944 * Free all transmit software resources
1945 **/
1946
3ad2cc67 1947static void
581d708e
MC		 1948e1000_free_tx_resources(struct e1000_adapter *adapter,
1949 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1950{
1951 struct pci_dev *pdev = adapter->pdev;
1952
581d708e 1953 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1954
581d708e
MC		 1955 vfree(tx_ring->buffer_info);
1956 tx_ring->buffer_info = NULL;
1da177e4 1957
581d708e 1958 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1959
581d708e
MC		 1960 tx_ring->desc = NULL;
1961}
1962
1963/**
1964 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1965 * @adapter: board private structure
1966 *
1967 * Free all transmit software resources
1968 **/
1969
1970void
1971e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1972{
1973 int i;
1974
f56799ea 1975 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1976 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1977}
1978
e619d523 1979static void
1da177e4
LT		 1980e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1981 struct e1000_buffer *buffer_info)
1982{
96838a40 1983 if (buffer_info->dma) {
2648345f
MC		 1984 pci_unmap_page(adapter->pdev,
1985 buffer_info->dma,
1986 buffer_info->length,
1987 PCI_DMA_TODEVICE);
1da177e4 1988 }
8241e35e 1989 if (buffer_info->skb)
1da177e4 1990 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1991 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1992}
1993
1994/**
1995 * e1000_clean_tx_ring - Free Tx Buffers
1996 * @adapter: board private structure
581d708e 1997 * @tx_ring: ring to be cleaned
1da177e4
LT		 1998 **/
1999
2000static void
581d708e
MC		 2001e1000_clean_tx_ring(struct e1000_adapter *adapter,
2002 struct e1000_tx_ring *tx_ring)
1da177e4 2003{
1da177e4
LT		 2004 struct e1000_buffer *buffer_info;
2005 unsigned long size;
2006 unsigned int i;
2007
2008 /* Free all the Tx ring sk_buffs */
2009
96838a40 2010 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2011 buffer_info = &tx_ring->buffer_info[i];
2012 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2013 }
2014
2015 size = sizeof(struct e1000_buffer) * tx_ring->count;
2016 memset(tx_ring->buffer_info, 0, size);
2017
2018 /* Zero out the descriptor ring */
2019
2020 memset(tx_ring->desc, 0, tx_ring->size);
2021
2022 tx_ring->next_to_use = 0;
2023 tx_ring->next_to_clean = 0;
fd803241 2024 tx_ring->last_tx_tso = 0;
1da177e4 2025
581d708e
MC		 2026 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2027 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2028}
2029
2030/**
2031 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2032 * @adapter: board private structure
2033 **/
2034
2035static void
2036e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2037{
2038 int i;
2039
f56799ea 2040 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2041 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2042}
2043
2044/**
2045 * e1000_free_rx_resources - Free Rx Resources
2046 * @adapter: board private structure
581d708e 2047 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2048 *
2049 * Free all receive software resources
2050 **/
2051
3ad2cc67 2052static void
581d708e
MC		 2053e1000_free_rx_resources(struct e1000_adapter *adapter,
2054 struct e1000_rx_ring *rx_ring)
1da177e4 2055{
1da177e4
LT		 2056 struct pci_dev *pdev = adapter->pdev;
2057
581d708e 2058 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2059
2060 vfree(rx_ring->buffer_info);
2061 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2062 kfree(rx_ring->ps_page);
2063 rx_ring->ps_page = NULL;
2064 kfree(rx_ring->ps_page_dma);
2065 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2066
2067 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2068
2069 rx_ring->desc = NULL;
2070}
2071
2072/**
581d708e 2073 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2074 * @adapter: board private structure
581d708e
MC		 2075 *
2076 * Free all receive software resources
2077 **/
2078
2079void
2080e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2081{
2082 int i;
2083
f56799ea 2084 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2085 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2086}
2087
2088/**
2089 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2090 * @adapter: board private structure
2091 * @rx_ring: ring to free buffers from
1da177e4
LT		 2092 **/
2093
2094static void
581d708e
MC		 2095e1000_clean_rx_ring(struct e1000_adapter *adapter,
2096 struct e1000_rx_ring *rx_ring)
1da177e4 2097{
1da177e4 2098 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2099 struct e1000_ps_page *ps_page;
2100 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2101 struct pci_dev *pdev = adapter->pdev;
2102 unsigned long size;
2d7edb92 2103 unsigned int i, j;
1da177e4
LT		 2104
2105 /* Free all the Rx ring sk_buffs */
96838a40 2106 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2107 buffer_info = &rx_ring->buffer_info[i];
96838a40 2108 if (buffer_info->skb) {
1da177e4
LT		 2109 pci_unmap_single(pdev,
2110 buffer_info->dma,
2111 buffer_info->length,
2112 PCI_DMA_FROMDEVICE);
2113
2114 dev_kfree_skb(buffer_info->skb);
2115 buffer_info->skb = NULL;
997f5cbd
JK		 2116 }
2117 ps_page = &rx_ring->ps_page[i];
2118 ps_page_dma = &rx_ring->ps_page_dma[i];
2119 for (j = 0; j < adapter->rx_ps_pages; j++) {
2120 if (!ps_page->ps_page[j]) break;
2121 pci_unmap_page(pdev,
2122 ps_page_dma->ps_page_dma[j],
2123 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2124 ps_page_dma->ps_page_dma[j] = 0;
2125 put_page(ps_page->ps_page[j]);
2126 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2127 }
2128 }
2129
2130 size = sizeof(struct e1000_buffer) * rx_ring->count;
2131 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2132 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2133 memset(rx_ring->ps_page, 0, size);
2134 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2135 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2136
2137 /* Zero out the descriptor ring */
2138
2139 memset(rx_ring->desc, 0, rx_ring->size);
2140
2141 rx_ring->next_to_clean = 0;
2142 rx_ring->next_to_use = 0;
2143
581d708e
MC		 2144 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2145 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2146}
2147
2148/**
2149 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2150 * @adapter: board private structure
2151 **/
2152
2153static void
2154e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2155{
2156 int i;
2157
f56799ea 2158 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2159 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2160}
2161
2162/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2163 * and memory write and invalidate disabled for certain operations
2164 */
2165static void
2166e1000_enter_82542_rst(struct e1000_adapter *adapter)
2167{
2168 struct net_device *netdev = adapter->netdev;
2169 uint32_t rctl;
2170
2171 e1000_pci_clear_mwi(&adapter->hw);
2172
2173 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2174 rctl |= E1000_RCTL_RST;
2175 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2176 E1000_WRITE_FLUSH(&adapter->hw);
2177 mdelay(5);
2178
96838a40 2179 if (netif_running(netdev))
581d708e 2180 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2181}
2182
2183static void
2184e1000_leave_82542_rst(struct e1000_adapter *adapter)
2185{
2186 struct net_device *netdev = adapter->netdev;
2187 uint32_t rctl;
2188
2189 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2190 rctl &= ~E1000_RCTL_RST;
2191 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2192 E1000_WRITE_FLUSH(&adapter->hw);
2193 mdelay(5);
2194
96838a40 2195 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2196 e1000_pci_set_mwi(&adapter->hw);
2197
96838a40 2198 if (netif_running(netdev)) {
72d64a43
JK		 2199 /* No need to loop, because 82542 supports only 1 queue */
2200 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2201 e1000_configure_rx(adapter);
72d64a43 2202 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2203 }
2204}
2205
2206/**
2207 * e1000_set_mac - Change the Ethernet Address of the NIC
2208 * @netdev: network interface device structure
2209 * @p: pointer to an address structure
2210 *
2211 * Returns 0 on success, negative on failure
2212 **/
2213
2214static int
2215e1000_set_mac(struct net_device *netdev, void *p)
2216{
60490fe0 2217 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2218 struct sockaddr *addr = p;
2219
96838a40 2220 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2221 return -EADDRNOTAVAIL;
2222
2223 /* 82542 2.0 needs to be in reset to write receive address registers */
2224
96838a40 2225 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2226 e1000_enter_82542_rst(adapter);
2227
2228 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2229 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2230
2231 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2232
868d5309
MC		 2233 /* With 82571 controllers, LAA may be overwritten (with the default)
2234 * due to controller reset from the other port. */
2235 if (adapter->hw.mac_type == e1000_82571) {
2236 /* activate the work around */
2237 adapter->hw.laa_is_present = 1;
2238
96838a40
JB		 2239 /* Hold a copy of the LAA in RAR[14] This is done so that
2240 * between the time RAR[0] gets clobbered and the time it
2241 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2242 * of the RARs and no incoming packets directed to this port
96838a40 2243 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2244 * RAR[14] */
96838a40 2245 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2246 E1000_RAR_ENTRIES - 1);
2247 }
2248
96838a40 2249 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2250 e1000_leave_82542_rst(adapter);
2251
2252 return 0;
2253}
2254
2255/**
2256 * e1000_set_multi - Multicast and Promiscuous mode set
2257 * @netdev: network interface device structure
2258 *
2259 * The set_multi entry point is called whenever the multicast address
2260 * list or the network interface flags are updated. This routine is
2261 * responsible for configuring the hardware for proper multicast,
2262 * promiscuous mode, and all-multi behavior.
2263 **/
2264
2265static void
2266e1000_set_multi(struct net_device *netdev)
2267{
60490fe0 2268 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2269 struct e1000_hw *hw = &adapter->hw;
2270 struct dev_mc_list *mc_ptr;
2271 uint32_t rctl;
2272 uint32_t hash_value;
868d5309 2273 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2274 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2275 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2276 E1000_NUM_MTA_REGISTERS;
2277
2278 if (adapter->hw.mac_type == e1000_ich8lan)
2279 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2280
868d5309
MC		 2281 /* reserve RAR[14] for LAA over-write work-around */
2282 if (adapter->hw.mac_type == e1000_82571)
2283 rar_entries--;
1da177e4 2284
2648345f
MC		 2285 /* Check for Promiscuous and All Multicast modes */
2286
1da177e4
LT		 2287 rctl = E1000_READ_REG(hw, RCTL);
2288
96838a40 2289 if (netdev->flags & IFF_PROMISC) {
1da177e4 2290 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2291 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2292 rctl |= E1000_RCTL_MPE;
2293 rctl &= ~E1000_RCTL_UPE;
2294 } else {
2295 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2296 }
2297
2298 E1000_WRITE_REG(hw, RCTL, rctl);
2299
2300 /* 82542 2.0 needs to be in reset to write receive address registers */
2301
96838a40 2302 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2303 e1000_enter_82542_rst(adapter);
2304
2305 /* load the first 14 multicast address into the exact filters 1-14
2306 * RAR 0 is used for the station MAC adddress
2307 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2308 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2309 */
2310 mc_ptr = netdev->mc_list;
2311
96838a40 2312 for (i = 1; i < rar_entries; i++) {
868d5309 2313 if (mc_ptr) {
1da177e4
LT		 2314 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2315 mc_ptr = mc_ptr->next;
2316 } else {
2317 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2318 E1000_WRITE_FLUSH(hw);
1da177e4 2319 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2320 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2321 }
2322 }
2323
2324 /* clear the old settings from the multicast hash table */
2325
cd94dd0b 2326 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2327 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2328 E1000_WRITE_FLUSH(hw);
2329 }
1da177e4
LT		 2330
2331 /* load any remaining addresses into the hash table */
2332
96838a40 2333 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2334 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2335 e1000_mta_set(hw, hash_value);
2336 }
2337
96838a40 2338 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2339 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2340}
2341
2342/* Need to wait a few seconds after link up to get diagnostic information from
2343 * the phy */
2344
2345static void
2346e1000_update_phy_info(unsigned long data)
2347{
2348 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2349 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2350}
2351
2352/**
2353 * e1000_82547_tx_fifo_stall - Timer Call-back
2354 * @data: pointer to adapter cast into an unsigned long
2355 **/
2356
2357static void
2358e1000_82547_tx_fifo_stall(unsigned long data)
2359{
2360 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2361 struct net_device *netdev = adapter->netdev;
2362 uint32_t tctl;
2363
96838a40
JB		 2364 if (atomic_read(&adapter->tx_fifo_stall)) {
2365 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2366 E1000_READ_REG(&adapter->hw, TDH)) &&
2367 (E1000_READ_REG(&adapter->hw, TDFT) ==
2368 E1000_READ_REG(&adapter->hw, TDFH)) &&
2369 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2370 E1000_READ_REG(&adapter->hw, TDFHS))) {
2371 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2372 E1000_WRITE_REG(&adapter->hw, TCTL,
2373 tctl & ~E1000_TCTL_EN);
2374 E1000_WRITE_REG(&adapter->hw, TDFT,
2375 adapter->tx_head_addr);
2376 E1000_WRITE_REG(&adapter->hw, TDFH,
2377 adapter->tx_head_addr);
2378 E1000_WRITE_REG(&adapter->hw, TDFTS,
2379 adapter->tx_head_addr);
2380 E1000_WRITE_REG(&adapter->hw, TDFHS,
2381 adapter->tx_head_addr);
2382 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2383 E1000_WRITE_FLUSH(&adapter->hw);
2384
2385 adapter->tx_fifo_head = 0;
2386 atomic_set(&adapter->tx_fifo_stall, 0);
2387 netif_wake_queue(netdev);
2388 } else {
2389 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2390 }
2391 }
2392}
2393
2394/**
2395 * e1000_watchdog - Timer Call-back
2396 * @data: pointer to adapter cast into an unsigned long
2397 **/
2398static void
2399e1000_watchdog(unsigned long data)
2400{
2401 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2402 struct net_device *netdev = adapter->netdev;
545c67c0 2403 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2404 uint32_t link, tctl;
cd94dd0b
AK		 2405 int32_t ret_val;
2406
2407 ret_val = e1000_check_for_link(&adapter->hw);
2408 if ((ret_val == E1000_ERR_PHY) &&
2409 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2410 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2411 /* See e1000_kumeran_lock_loss_workaround() */
2412 DPRINTK(LINK, INFO,
2413 "Gigabit has been disabled, downgrading speed\n");
2414 }
2d7edb92
MC		 2415 if (adapter->hw.mac_type == e1000_82573) {
2416 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2417 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2418 e1000_update_mng_vlan(adapter);
96838a40 2419 }
1da177e4 2420
96838a40 2421 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2422 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2423 link = !adapter->hw.serdes_link_down;
2424 else
2425 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2426
96838a40
JB		 2427 if (link) {
2428 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2429 boolean_t txb2b = 1;
1da177e4
LT		 2430 e1000_get_speed_and_duplex(&adapter->hw,
2431 &adapter->link_speed,
2432 &adapter->link_duplex);
2433
2434 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2435 adapter->link_speed,
2436 adapter->link_duplex == FULL_DUPLEX ?
2437 "Full Duplex" : "Half Duplex");
2438
7e6c9861
JK		 2439 /* tweak tx_queue_len according to speed/duplex
2440 * and adjust the timeout factor */
66a2b0a3
JK		 2441 netdev->tx_queue_len = adapter->tx_queue_len;
2442 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2443 switch (adapter->link_speed) {
2444 case SPEED_10:
fe7fe28e 2445 txb2b = 0;
7e6c9861
JK		 2446 netdev->tx_queue_len = 10;
2447 adapter->tx_timeout_factor = 8;
2448 break;
2449 case SPEED_100:
fe7fe28e 2450 txb2b = 0;
7e6c9861
JK		 2451 netdev->tx_queue_len = 100;
2452 /* maybe add some timeout factor ? */
2453 break;
2454 }
2455
fe7fe28e 2456 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2457 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2458 txb2b == 0) {
7e6c9861
JK		 2459#define SPEED_MODE_BIT (1 << 21)
2460 uint32_t tarc0;
2461 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2462 tarc0 &= ~SPEED_MODE_BIT;
2463 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2464 }
2465
2466#ifdef NETIF_F_TSO
2467 /* disable TSO for pcie and 10/100 speeds, to avoid
2468 * some hardware issues */
2469 if (!adapter->tso_force &&
2470 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2471 switch (adapter->link_speed) {
2472 case SPEED_10:
66a2b0a3 2473 case SPEED_100:
7e6c9861
JK		 2474 DPRINTK(PROBE,INFO,
2475 "10/100 speed: disabling TSO\n");
2476 netdev->features &= ~NETIF_F_TSO;
2477 break;
2478 case SPEED_1000:
2479 netdev->features |= NETIF_F_TSO;
2480 break;
2481 default:
2482 /* oops */
66a2b0a3
JK		 2483 break;
2484 }
2485 }
7e6c9861
JK		 2486#endif
2487
2488 /* enable transmits in the hardware, need to do this
2489 * after setting TARC0 */
2490 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2491 tctl |= E1000_TCTL_EN;
2492 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2493
1da177e4
LT		 2494 netif_carrier_on(netdev);
2495 netif_wake_queue(netdev);
2496 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2497 adapter->smartspeed = 0;
2498 }
2499 } else {
96838a40 2500 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2501 adapter->link_speed = 0;
2502 adapter->link_duplex = 0;
2503 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2504 netif_carrier_off(netdev);
2505 netif_stop_queue(netdev);
2506 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2507
2508 /* 80003ES2LAN workaround--
2509 * For packet buffer work-around on link down event;
2510 * disable receives in the ISR and
2511 * reset device here in the watchdog
2512 */
8fc897b0 2513 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2514 /* reset device */
2515 schedule_work(&adapter->reset_task);
1da177e4
LT		 2516 }
2517
2518 e1000_smartspeed(adapter);
2519 }
2520
2521 e1000_update_stats(adapter);
2522
2523 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2524 adapter->tpt_old = adapter->stats.tpt;
2525 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2526 adapter->colc_old = adapter->stats.colc;
2527
2528 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2529 adapter->gorcl_old = adapter->stats.gorcl;
2530 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2531 adapter->gotcl_old = adapter->stats.gotcl;
2532
2533 e1000_update_adaptive(&adapter->hw);
2534
f56799ea 2535 if (!netif_carrier_ok(netdev)) {
581d708e 2536 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2537 /* We've lost link, so the controller stops DMA,
2538 * but we've got queued Tx work that's never going
2539 * to get done, so reset controller to flush Tx.
2540 * (Do the reset outside of interrupt context). */
87041639
JK		 2541 adapter->tx_timeout_count++;
2542 schedule_work(&adapter->reset_task);
1da177e4
LT		 2543 }
2544 }
2545
2546 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2547 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2548 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2549 * asymmetrical Tx or Rx gets ITR=8000; everyone
2550 * else is between 2000-8000. */
2551 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2552 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2553 adapter->gotcl - adapter->gorcl :
2554 adapter->gorcl - adapter->gotcl) / 10000;
2555 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2556 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2557 }
2558
2559 /* Cause software interrupt to ensure rx ring is cleaned */
2560 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2561
2648345f 2562 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2563 adapter->detect_tx_hung = TRUE;
2564
96838a40 2565 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2566 * reset from the other port. Set the appropriate LAA in RAR[0] */
2567 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2568 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2569
1da177e4
LT		 2570 /* Reset the timer */
2571 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2572}
2573
2574#define E1000_TX_FLAGS_CSUM 0x00000001
2575#define E1000_TX_FLAGS_VLAN 0x00000002
2576#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2577#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2578#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2579#define E1000_TX_FLAGS_VLAN_SHIFT 16
2580
e619d523 2581static int
581d708e
MC		 2582e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2583 struct sk_buff *skb)
1da177e4
LT		 2584{
2585#ifdef NETIF_F_TSO
2586 struct e1000_context_desc *context_desc;
545c67c0 2587 struct e1000_buffer *buffer_info;
1da177e4
LT		 2588 unsigned int i;
2589 uint32_t cmd_length = 0;
2d7edb92 2590 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2591 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2592 int err;
2593
89114afd 2594 if (skb_is_gso(skb)) {
1da177e4
LT		 2595 if (skb_header_cloned(skb)) {
2596 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2597 if (err)
2598 return err;
2599 }
2600
2601 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 2602 mss = skb_shinfo(skb)->gso_size;
60828236 2603 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2604 skb->nh.iph->tot_len = 0;
2605 skb->nh.iph->check = 0;
2606 skb->h.th->check =
2607 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2608 skb->nh.iph->daddr,
2609 0,
2610 IPPROTO_TCP,
2611 0);
2612 cmd_length = E1000_TXD_CMD_IP;
2613 ipcse = skb->h.raw - skb->data - 1;
2614#ifdef NETIF_F_TSO_IPV6
e15fdd03 2615 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2d7edb92
MC		 2616 skb->nh.ipv6h->payload_len = 0;
2617 skb->h.th->check =
2618 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2619 &skb->nh.ipv6h->daddr,
2620 0,
2621 IPPROTO_TCP,
2622 0);
2623 ipcse = 0;
2624#endif
2625 }
1da177e4
LT		 2626 ipcss = skb->nh.raw - skb->data;
2627 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2628 tucss = skb->h.raw - skb->data;
2629 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2630 tucse = 0;
2631
2632 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2633 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2634
581d708e
MC		 2635 i = tx_ring->next_to_use;
2636 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2637 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2638
2639 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2640 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2641 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2642 context_desc->upper_setup.tcp_fields.tucss = tucss;
2643 context_desc->upper_setup.tcp_fields.tucso = tucso;
2644 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2645 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2646 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2647 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2648
545c67c0
JK		 2649 buffer_info->time_stamp = jiffies;
2650
581d708e
MC		 2651 if (++i == tx_ring->count) i = 0;
2652 tx_ring->next_to_use = i;
1da177e4 2653
8241e35e 2654 return TRUE;
1da177e4
LT		 2655 }
2656#endif
2657
8241e35e 2658 return FALSE;
1da177e4
LT		 2659}
2660
e619d523 2661static boolean_t
581d708e
MC		 2662e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2663 struct sk_buff *skb)
1da177e4
LT		 2664{
2665 struct e1000_context_desc *context_desc;
545c67c0 2666 struct e1000_buffer *buffer_info;
1da177e4
LT		 2667 unsigned int i;
2668 uint8_t css;
2669
84fa7933 2670 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1da177e4
LT		 2671 css = skb->h.raw - skb->data;
2672
581d708e 2673 i = tx_ring->next_to_use;
545c67c0 2674 buffer_info = &tx_ring->buffer_info[i];
581d708e 2675 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2676
2677 context_desc->upper_setup.tcp_fields.tucss = css;
2678 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2679 context_desc->upper_setup.tcp_fields.tucse = 0;
2680 context_desc->tcp_seg_setup.data = 0;
2681 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2682
545c67c0
JK		 2683 buffer_info->time_stamp = jiffies;
2684
581d708e
MC		 2685 if (unlikely(++i == tx_ring->count)) i = 0;
2686 tx_ring->next_to_use = i;
1da177e4
LT		 2687
2688 return TRUE;
2689 }
2690
2691 return FALSE;
2692}
2693
2694#define E1000_MAX_TXD_PWR 12
2695#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2696
e619d523 2697static int
581d708e
MC		 2698e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2699 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2700 unsigned int nr_frags, unsigned int mss)
1da177e4 2701{
1da177e4
LT		 2702 struct e1000_buffer *buffer_info;
2703 unsigned int len = skb->len;
2704 unsigned int offset = 0, size, count = 0, i;
2705 unsigned int f;
2706 len -= skb->data_len;
2707
2708 i = tx_ring->next_to_use;
2709
96838a40 2710 while (len) {
1da177e4
LT		 2711 buffer_info = &tx_ring->buffer_info[i];
2712 size = min(len, max_per_txd);
2713#ifdef NETIF_F_TSO
fd803241
JK		 2714 /* Workaround for Controller erratum --
2715 * descriptor for non-tso packet in a linear SKB that follows a
2716 * tso gets written back prematurely before the data is fully
0f15a8fa 2717 * DMA'd to the controller */
fd803241 2718 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2719 !skb_is_gso(skb)) {
fd803241
JK		 2720 tx_ring->last_tx_tso = 0;
2721 size -= 4;
2722 }
2723
1da177e4
LT		 2724 /* Workaround for premature desc write-backs
2725 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2726 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2727 size -= 4;
2728#endif
97338bde
MC		 2729 /* work-around for errata 10 and it applies
2730 * to all controllers in PCI-X mode
2731 * The fix is to make sure that the first descriptor of a
2732 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2733 */
96838a40 2734 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2735 (size > 2015) && count == 0))
2736 size = 2015;
96838a40 2737
1da177e4
LT		 2738 /* Workaround for potential 82544 hang in PCI-X. Avoid
2739 * terminating buffers within evenly-aligned dwords. */
96838a40 2740 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2741 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2742 size > 4))
2743 size -= 4;
2744
2745 buffer_info->length = size;
2746 buffer_info->dma =
2747 pci_map_single(adapter->pdev,
2748 skb->data + offset,
2749 size,
2750 PCI_DMA_TODEVICE);
2751 buffer_info->time_stamp = jiffies;
2752
2753 len -= size;
2754 offset += size;
2755 count++;
96838a40 2756 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2757 }
2758
96838a40 2759 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2760 struct skb_frag_struct *frag;
2761
2762 frag = &skb_shinfo(skb)->frags[f];
2763 len = frag->size;
2764 offset = frag->page_offset;
2765
96838a40 2766 while (len) {
1da177e4
LT		 2767 buffer_info = &tx_ring->buffer_info[i];
2768 size = min(len, max_per_txd);
2769#ifdef NETIF_F_TSO
2770 /* Workaround for premature desc write-backs
2771 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2772 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2773 size -= 4;
2774#endif
2775 /* Workaround for potential 82544 hang in PCI-X.
2776 * Avoid terminating buffers within evenly-aligned
2777 * dwords. */
96838a40 2778 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2779 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2780 size > 4))
2781 size -= 4;
2782
2783 buffer_info->length = size;
2784 buffer_info->dma =
2785 pci_map_page(adapter->pdev,
2786 frag->page,
2787 offset,
2788 size,
2789 PCI_DMA_TODEVICE);
2790 buffer_info->time_stamp = jiffies;
2791
2792 len -= size;
2793 offset += size;
2794 count++;
96838a40 2795 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2796 }
2797 }
2798
2799 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2800 tx_ring->buffer_info[i].skb = skb;
2801 tx_ring->buffer_info[first].next_to_watch = i;
2802
2803 return count;
2804}
2805
e619d523 2806static void
581d708e
MC		 2807e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2808 int tx_flags, int count)
1da177e4 2809{
1da177e4
LT		 2810 struct e1000_tx_desc *tx_desc = NULL;
2811 struct e1000_buffer *buffer_info;
2812 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2813 unsigned int i;
2814
96838a40 2815 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2816 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2817 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2818 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2819
96838a40 2820 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2821 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2822 }
2823
96838a40 2824 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2825 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2826 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2827 }
2828
96838a40 2829 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2830 txd_lower |= E1000_TXD_CMD_VLE;
2831 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2832 }
2833
2834 i = tx_ring->next_to_use;
2835
96838a40 2836 while (count--) {
1da177e4
LT		 2837 buffer_info = &tx_ring->buffer_info[i];
2838 tx_desc = E1000_TX_DESC(*tx_ring, i);
2839 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2840 tx_desc->lower.data =
2841 cpu_to_le32(txd_lower | buffer_info->length);
2842 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2843 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2844 }
2845
2846 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2847
2848 /* Force memory writes to complete before letting h/w
2849 * know there are new descriptors to fetch. (Only
2850 * applicable for weak-ordered memory model archs,
2851 * such as IA-64). */
2852 wmb();
2853
2854 tx_ring->next_to_use = i;
581d708e 2855 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2856}
2857
2858/**
2859 * 82547 workaround to avoid controller hang in half-duplex environment.
2860 * The workaround is to avoid queuing a large packet that would span
2861 * the internal Tx FIFO ring boundary by notifying the stack to resend
2862 * the packet at a later time. This gives the Tx FIFO an opportunity to
2863 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2864 * to the beginning of the Tx FIFO.
2865 **/
2866
2867#define E1000_FIFO_HDR 0x10
2868#define E1000_82547_PAD_LEN 0x3E0
2869
e619d523 2870static int
1da177e4
LT		 2871e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2872{
2873 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2874 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2875
2876 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2877
96838a40 2878 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2879 goto no_fifo_stall_required;
2880
96838a40 2881 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2882 return 1;
2883
96838a40 2884 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2885 atomic_set(&adapter->tx_fifo_stall, 1);
2886 return 1;
2887 }
2888
2889no_fifo_stall_required:
2890 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2891 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2892 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2893 return 0;
2894}
2895
2d7edb92 2896#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2897static int
2d7edb92
MC		 2898e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2899{
2900 struct e1000_hw *hw = &adapter->hw;
2901 uint16_t length, offset;
96838a40
JB		 2902 if (vlan_tx_tag_present(skb)) {
2903 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2904 ( adapter->hw.mng_cookie.status &
2905 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2906 return 0;
2907 }
20a44028 2908 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2909 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2910 if ((htons(ETH_P_IP) == eth->h_proto)) {
2911 const struct iphdr *ip =
2d7edb92 2912 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2913 if (IPPROTO_UDP == ip->protocol) {
2914 struct udphdr *udp =
2915 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2916 (ip->ihl << 2));
96838a40 2917 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2918 offset = (uint8_t *)udp + 8 - skb->data;
2919 length = skb->len - offset;
2920
2921 return e1000_mng_write_dhcp_info(hw,
96838a40 2922 (uint8_t *)udp + 8,
2d7edb92
MC		 2923 length);
2924 }
2925 }
2926 }
2927 }
2928 return 0;
2929}
2930
65c7973f
JB		 2931static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2932{
2933 struct e1000_adapter *adapter = netdev_priv(netdev);
2934 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2935
2936 netif_stop_queue(netdev);
2937 /* Herbert's original patch had:
2938 * smp_mb__after_netif_stop_queue();
2939 * but since that doesn't exist yet, just open code it. */
2940 smp_mb();
2941
2942 /* We need to check again in a case another CPU has just
2943 * made room available. */
2944 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2945 return -EBUSY;
2946
2947 /* A reprieve! */
2948 netif_start_queue(netdev);
2949 return 0;
2950}
2951
2952static int e1000_maybe_stop_tx(struct net_device *netdev,
2953 struct e1000_tx_ring *tx_ring, int size)
2954{
2955 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2956 return 0;
2957 return __e1000_maybe_stop_tx(netdev, size);
2958}
2959
1da177e4
LT		 2960#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2961static int
2962e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2963{
60490fe0 2964 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2965 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2966 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2967 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2968 unsigned int tx_flags = 0;
2969 unsigned int len = skb->len;
2970 unsigned long flags;
2971 unsigned int nr_frags = 0;
2972 unsigned int mss = 0;
2973 int count = 0;
76c224bc 2974 int tso;
1da177e4
LT		 2975 unsigned int f;
2976 len -= skb->data_len;
2977
65c7973f
JB		 2978 /* This goes back to the question of how to logically map a tx queue
2979 * to a flow. Right now, performance is impacted slightly negatively
2980 * if using multiple tx queues. If the stack breaks away from a
2981 * single qdisc implementation, we can look at this again. */
581d708e 2982 tx_ring = adapter->tx_ring;
24025e4e 2983
581d708e 2984 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2985 dev_kfree_skb_any(skb);
2986 return NETDEV_TX_OK;
2987 }
2988
2989#ifdef NETIF_F_TSO
7967168c 2990 mss = skb_shinfo(skb)->gso_size;
76c224bc 2991 /* The controller does a simple calculation to
1da177e4
LT		 2992 * make sure there is enough room in the FIFO before
2993 * initiating the DMA for each buffer. The calc is:
2994 * 4 = ceil(buffer len/mss). To make sure we don't
2995 * overrun the FIFO, adjust the max buffer len if mss
2996 * drops. */
96838a40 2997 if (mss) {
9a3056da 2998 uint8_t hdr_len;
1da177e4
LT		 2999 max_per_txd = min(mss << 2, max_per_txd);
3000 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3001
9f687888 3002 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 3003 * points to just header, pull a few bytes of payload from
3004 * frags into skb->data */
3005 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 3006 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3007 switch (adapter->hw.mac_type) {
3008 unsigned int pull_size;
3009 case e1000_82571:
3010 case e1000_82572:
3011 case e1000_82573:
cd94dd0b 3012 case e1000_ich8lan:
9f687888
JK		 3013 pull_size = min((unsigned int)4, skb->data_len);
3014 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3015 DPRINTK(DRV, ERR,
9f687888
JK		 3016 "__pskb_pull_tail failed.\n");
3017 dev_kfree_skb_any(skb);
749dfc70 3018 return NETDEV_TX_OK;
9f687888
JK		 3019 }
3020 len = skb->len - skb->data_len;
3021 break;
3022 default:
3023 /* do nothing */
3024 break;
d74bbd3b 3025 }
9a3056da 3026 }
1da177e4
LT		 3027 }
3028
9a3056da 3029 /* reserve a descriptor for the offload context */
84fa7933 3030 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3031 count++;
2648345f 3032 count++;
1da177e4 3033#else
84fa7933 3034 if (skb->ip_summed == CHECKSUM_PARTIAL)
1da177e4
LT		 3035 count++;
3036#endif
fd803241
JK		 3037
3038#ifdef NETIF_F_TSO
3039 /* Controller Erratum workaround */
89114afd 3040 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241
JK		 3041 count++;
3042#endif
3043
1da177e4
LT		 3044 count += TXD_USE_COUNT(len, max_txd_pwr);
3045
96838a40 3046 if (adapter->pcix_82544)
1da177e4
LT		 3047 count++;
3048
96838a40 3049 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3050 * in PCI-X mode, so add one more descriptor to the count
3051 */
96838a40 3052 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3053 (len > 2015)))
3054 count++;
3055
1da177e4 3056 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3057 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3058 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3059 max_txd_pwr);
96838a40 3060 if (adapter->pcix_82544)
1da177e4
LT		 3061 count += nr_frags;
3062
0f15a8fa
JK		 3063
3064 if (adapter->hw.tx_pkt_filtering &&
3065 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 3066 e1000_transfer_dhcp_info(adapter, skb);
3067
581d708e
MC		 3068 local_irq_save(flags);
3069 if (!spin_trylock(&tx_ring->tx_lock)) {
3070 /* Collision - tell upper layer to requeue */
3071 local_irq_restore(flags);
3072 return NETDEV_TX_LOCKED;
3073 }
1da177e4
LT		 3074
3075 /* need: count + 2 desc gap to keep tail from touching
3076 * head, otherwise try next time */
65c7973f 3077 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3078 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3079 return NETDEV_TX_BUSY;
3080 }
3081
96838a40
JB		 3082 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3083 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3084 netif_stop_queue(netdev);
1314bbf3 3085 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3086 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3087 return NETDEV_TX_BUSY;
3088 }
3089 }
3090
96838a40 3091 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3092 tx_flags |= E1000_TX_FLAGS_VLAN;
3093 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3094 }
3095
581d708e 3096 first = tx_ring->next_to_use;
96838a40 3097
581d708e 3098 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3099 if (tso < 0) {
3100 dev_kfree_skb_any(skb);
581d708e 3101 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3102 return NETDEV_TX_OK;
3103 }
3104
fd803241
JK		 3105 if (likely(tso)) {
3106 tx_ring->last_tx_tso = 1;
1da177e4 3107 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3108 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3109 tx_flags |= E1000_TX_FLAGS_CSUM;
3110
2d7edb92 3111 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3112 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3113 * no longer assume, we must. */
60828236 3114 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3115 tx_flags |= E1000_TX_FLAGS_IPV4;
3116
581d708e
MC		 3117 e1000_tx_queue(adapter, tx_ring, tx_flags,
3118 e1000_tx_map(adapter, tx_ring, skb, first,
3119 max_per_txd, nr_frags, mss));
1da177e4
LT		 3120
3121 netdev->trans_start = jiffies;
3122
3123 /* Make sure there is space in the ring for the next send. */
65c7973f 3124 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3125
581d708e 3126 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3127 return NETDEV_TX_OK;
3128}
3129
3130/**
3131 * e1000_tx_timeout - Respond to a Tx Hang
3132 * @netdev: network interface device structure
3133 **/
3134
3135static void
3136e1000_tx_timeout(struct net_device *netdev)
3137{
60490fe0 3138 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3139
3140 /* Do the reset outside of interrupt context */
87041639
JK		 3141 adapter->tx_timeout_count++;
3142 schedule_work(&adapter->reset_task);
1da177e4
LT		 3143}
3144
3145static void
87041639 3146e1000_reset_task(struct net_device *netdev)
1da177e4 3147{
60490fe0 3148 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3149
2db10a08 3150 e1000_reinit_locked(adapter);
1da177e4
LT		 3151}
3152
3153/**
3154 * e1000_get_stats - Get System Network Statistics
3155 * @netdev: network interface device structure
3156 *
3157 * Returns the address of the device statistics structure.
3158 * The statistics are actually updated from the timer callback.
3159 **/
3160
3161static struct net_device_stats *
3162e1000_get_stats(struct net_device *netdev)
3163{
60490fe0 3164 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3165
6b7660cd 3166 /* only return the current stats */
1da177e4
LT		 3167 return &adapter->net_stats;
3168}
3169
3170/**
3171 * e1000_change_mtu - Change the Maximum Transfer Unit
3172 * @netdev: network interface device structure
3173 * @new_mtu: new value for maximum frame size
3174 *
3175 * Returns 0 on success, negative on failure
3176 **/
3177
3178static int
3179e1000_change_mtu(struct net_device *netdev, int new_mtu)
3180{
60490fe0 3181 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3182 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3183 uint16_t eeprom_data = 0;
1da177e4 3184
96838a40
JB		 3185 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3186 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3187 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3188 return -EINVAL;
2d7edb92 3189 }
1da177e4 3190
997f5cbd
JK		 3191 /* Adapter-specific max frame size limits. */
3192 switch (adapter->hw.mac_type) {
9e2feace 3193 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3194 case e1000_ich8lan:
997f5cbd
JK		 3195 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3196 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3197 return -EINVAL;
2d7edb92 3198 }
997f5cbd 3199 break;
85b22eb6 3200 case e1000_82573:
249d71d6
BA		 3201 /* Jumbo Frames not supported if:
3202 * - this is not an 82573L device
3203 * - ASPM is enabled in any way (0x1A bits 3:2) */
85b22eb6
JK		 3204 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3205 &eeprom_data);
249d71d6
BA		 3206 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3207 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3208 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3209 DPRINTK(PROBE, ERR,
3210 "Jumbo Frames not supported.\n");
3211 return -EINVAL;
3212 }
3213 break;
3214 }
249d71d6
BA		 3215 /* ERT will be enabled later to enable wire speed receives */
3216
85b22eb6 3217 /* fall through to get support */
997f5cbd
JK		 3218 case e1000_82571:
3219 case e1000_82572:
87041639 3220 case e1000_80003es2lan:
997f5cbd
JK		 3221#define MAX_STD_JUMBO_FRAME_SIZE 9234
3222 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3223 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3224 return -EINVAL;
3225 }
3226 break;
3227 default:
3228 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3229 break;
1da177e4
LT		 3230 }
3231
87f5032e 3232 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3233 * means we reserve 2 more, this pushes us to allocate from the next
3234 * larger slab size
3235 * i.e. RXBUFFER_2048 --> size-4096 slab */
3236
3237 if (max_frame <= E1000_RXBUFFER_256)
3238 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3239 else if (max_frame <= E1000_RXBUFFER_512)
3240 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3241 else if (max_frame <= E1000_RXBUFFER_1024)
3242 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3243 else if (max_frame <= E1000_RXBUFFER_2048)
3244 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3245 else if (max_frame <= E1000_RXBUFFER_4096)
3246 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3247 else if (max_frame <= E1000_RXBUFFER_8192)
3248 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3249 else if (max_frame <= E1000_RXBUFFER_16384)
3250 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3251
3252 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3253 if (!adapter->hw.tbi_compatibility_on &&
3254 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3255 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3256 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3257
2d7edb92
MC		 3258 netdev->mtu = new_mtu;
3259
2db10a08
AK		 3260 if (netif_running(netdev))
3261 e1000_reinit_locked(adapter);
1da177e4 3262
1da177e4
LT		 3263 adapter->hw.max_frame_size = max_frame;
3264
3265 return 0;
3266}
3267
3268/**
3269 * e1000_update_stats - Update the board statistics counters
3270 * @adapter: board private structure
3271 **/
3272
3273void
3274e1000_update_stats(struct e1000_adapter *adapter)
3275{
3276 struct e1000_hw *hw = &adapter->hw;
282f33c9 3277 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3278 unsigned long flags;
3279 uint16_t phy_tmp;
3280
3281#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3282
282f33c9
LV		 3283 /*
3284 * Prevent stats update while adapter is being reset, or if the pci
3285 * connection is down.
3286 */
9026729b 3287 if (adapter->link_speed == 0)
282f33c9
LV		 3288 return;
3289 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3290 return;
3291
1da177e4
LT		 3292 spin_lock_irqsave(&adapter->stats_lock, flags);
3293
3294 /* these counters are modified from e1000_adjust_tbi_stats,
3295 * called from the interrupt context, so they must only
3296 * be written while holding adapter->stats_lock
3297 */
3298
3299 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3300 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3301 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3302 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3303 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3304 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3305 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3306
3307 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3308 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3309 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3310 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3311 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3312 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3313 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3314 }
1da177e4
LT		 3315
3316 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3317 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3318 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3319 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3320 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3321 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3322 adapter->stats.dc += E1000_READ_REG(hw, DC);
3323 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3324 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3325 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3326 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3327 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3328 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3329 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3330 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3331 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3332 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3333 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3334 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3335 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3336 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3337 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3338 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3339 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3340 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3341 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3342
3343 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 3344 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3345 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3346 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3347 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3348 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3349 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3350 }
3351
1da177e4
LT		 3352 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3353 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3354
3355 /* used for adaptive IFS */
3356
3357 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3358 adapter->stats.tpt += hw->tx_packet_delta;
3359 hw->collision_delta = E1000_READ_REG(hw, COLC);
3360 adapter->stats.colc += hw->collision_delta;
3361
96838a40 3362 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3363 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3364 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3365 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3366 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3367 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3368 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3369 }
96838a40 3370 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3371 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3372 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3373
3374 if (adapter->hw.mac_type != e1000_ich8lan) {
2d7edb92
MC		 3375 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3376 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3377 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3378 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3379 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3380 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3381 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3382 }
2d7edb92 3383 }
1da177e4
LT		 3384
3385 /* Fill out the OS statistics structure */
3386
3387 adapter->net_stats.rx_packets = adapter->stats.gprc;
3388 adapter->net_stats.tx_packets = adapter->stats.gptc;
3389 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3390 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3391 adapter->net_stats.multicast = adapter->stats.mprc;
3392 adapter->net_stats.collisions = adapter->stats.colc;
3393
3394 /* Rx Errors */
3395
87041639
JK		 3396 /* RLEC on some newer hardware can be incorrect so build
3397 * our own version based on RUC and ROC */
1da177e4
LT		 3398 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3399 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3400 adapter->stats.ruc + adapter->stats.roc +
3401 adapter->stats.cexterr;
49559854
MW		 3402 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3403 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3404 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3405 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3406 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3407
3408 /* Tx Errors */
49559854
MW		 3409 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3410 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3411 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3412 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3413 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3414
3415 /* Tx Dropped needs to be maintained elsewhere */
3416
3417 /* Phy Stats */
3418
96838a40
JB		 3419 if (hw->media_type == e1000_media_type_copper) {
3420 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3421 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3422 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3423 adapter->phy_stats.idle_errors += phy_tmp;
3424 }
3425
96838a40 3426 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3427 (hw->phy_type == e1000_phy_m88) &&
3428 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3429 adapter->phy_stats.receive_errors += phy_tmp;
3430 }
3431
3432 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3433}
3434
3435/**
3436 * e1000_intr - Interrupt Handler
3437 * @irq: interrupt number
3438 * @data: pointer to a network interface device structure
3439 * @pt_regs: CPU registers structure
3440 **/
3441
3442static irqreturn_t
3443e1000_intr(int irq, void *data, struct pt_regs *regs)
3444{
3445 struct net_device *netdev = data;
60490fe0 3446 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3447 struct e1000_hw *hw = &adapter->hw;
87041639 3448 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3449#ifndef CONFIG_E1000_NAPI
581d708e 3450 int i;
1e613fd9
JK		 3451#else
3452 /* Interrupt Auto-Mask...upon reading ICR,
3453 * interrupts are masked. No need for the
3454 * IMC write, but it does mean we should
3455 * account for it ASAP. */
3456 if (likely(hw->mac_type >= e1000_82571))
3457 atomic_inc(&adapter->irq_sem);
be2b28ed 3458#endif
1da177e4 3459
1e613fd9
JK		 3460 if (unlikely(!icr)) {
3461#ifdef CONFIG_E1000_NAPI
3462 if (hw->mac_type >= e1000_82571)
3463 e1000_irq_enable(adapter);
3464#endif
1da177e4 3465 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3466 }
1da177e4 3467
96838a40 3468 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3469 hw->get_link_status = 1;
87041639
JK		 3470 /* 80003ES2LAN workaround--
3471 * For packet buffer work-around on link down event;
3472 * disable receives here in the ISR and
3473 * reset adapter in watchdog
3474 */
3475 if (netif_carrier_ok(netdev) &&
3476 (adapter->hw.mac_type == e1000_80003es2lan)) {
3477 /* disable receives */
3478 rctl = E1000_READ_REG(hw, RCTL);
3479 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3480 }
1314bbf3
AK		 3481 /* guard against interrupt when we're going down */
3482 if (!test_bit(__E1000_DOWN, &adapter->flags))
3483 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3484 }
3485
3486#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3487 if (unlikely(hw->mac_type < e1000_82571)) {
3488 atomic_inc(&adapter->irq_sem);
3489 E1000_WRITE_REG(hw, IMC, ~0);
3490 E1000_WRITE_FLUSH(hw);
3491 }
d3d9e484
AK		 3492 if (likely(netif_rx_schedule_prep(netdev)))
3493 __netif_rx_schedule(netdev);
581d708e
MC		 3494 else
3495 e1000_irq_enable(adapter);
c1605eb3 3496#else
1da177e4 3497 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3498 * Due to Hub Link bus being occupied, an interrupt
3499 * de-assertion message is not able to be sent.
3500 * When an interrupt assertion message is generated later,
3501 * two messages are re-ordered and sent out.
3502 * That causes APIC to think 82547 is in de-assertion
3503 * state, while 82547 is in assertion state, resulting
3504 * in dead lock. Writing IMC forces 82547 into
3505 * de-assertion state.
3506 */
3507 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3508 atomic_inc(&adapter->irq_sem);
2648345f 3509 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3510 }
3511
96838a40
JB		 3512 for (i = 0; i < E1000_MAX_INTR; i++)
3513 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3514 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3515 break;
3516
96838a40 3517 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3518 e1000_irq_enable(adapter);
581d708e 3519
c1605eb3 3520#endif
1da177e4
LT		 3521
3522 return IRQ_HANDLED;
3523}
3524
3525#ifdef CONFIG_E1000_NAPI
3526/**
3527 * e1000_clean - NAPI Rx polling callback
3528 * @adapter: board private structure
3529 **/
3530
3531static int
581d708e 3532e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3533{
581d708e
MC		 3534 struct e1000_adapter *adapter;
3535 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3536 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3537
3538 /* Must NOT use netdev_priv macro here. */
3539 adapter = poll_dev->priv;
3540
3541 /* Keep link state information with original netdev */
d3d9e484 3542 if (!netif_carrier_ok(poll_dev))
581d708e 3543 goto quit_polling;
2648345f 3544
d3d9e484
AK		 3545 /* e1000_clean is called per-cpu. This lock protects
3546 * tx_ring[0] from being cleaned by multiple cpus
3547 * simultaneously. A failure obtaining the lock means
3548 * tx_ring[0] is currently being cleaned anyway. */
3549 if (spin_trylock(&adapter->tx_queue_lock)) {
3550 tx_cleaned = e1000_clean_tx_irq(adapter,
3551 &adapter->tx_ring[0]);
3552 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3553 }
3554
d3d9e484 3555 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3556 &work_done, work_to_do);
1da177e4
LT		 3557
3558 *budget -= work_done;
581d708e 3559 poll_dev->quota -= work_done;
96838a40 3560
2b02893e 3561 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3562 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3563 !netif_running(poll_dev)) {
581d708e
MC		 3564quit_polling:
3565 netif_rx_complete(poll_dev);
1da177e4
LT		 3566 e1000_irq_enable(adapter);
3567 return 0;
3568 }
3569
3570 return 1;
3571}
3572
3573#endif
3574/**
3575 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3576 * @adapter: board private structure
3577 **/
3578
3579static boolean_t
581d708e
MC		 3580e1000_clean_tx_irq(struct e1000_adapter *adapter,
3581 struct e1000_tx_ring *tx_ring)
1da177e4 3582{
1da177e4
LT		 3583 struct net_device *netdev = adapter->netdev;
3584 struct e1000_tx_desc *tx_desc, *eop_desc;
3585 struct e1000_buffer *buffer_info;
3586 unsigned int i, eop;
2a1af5d7
JK		 3587#ifdef CONFIG_E1000_NAPI
3588 unsigned int count = 0;
3589#endif
1da177e4
LT		 3590 boolean_t cleaned = FALSE;
3591
3592 i = tx_ring->next_to_clean;
3593 eop = tx_ring->buffer_info[i].next_to_watch;
3594 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3595
581d708e 3596 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3597 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3598 tx_desc = E1000_TX_DESC(*tx_ring, i);
3599 buffer_info = &tx_ring->buffer_info[i];
3600 cleaned = (i == eop);
3601
fd803241 3602 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3603 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3604
96838a40 3605 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3606 }
581d708e 3607
7bfa4816 3608
1da177e4
LT		 3609 eop = tx_ring->buffer_info[i].next_to_watch;
3610 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3611#ifdef CONFIG_E1000_NAPI
3612#define E1000_TX_WEIGHT 64
3613 /* weight of a sort for tx, to avoid endless transmit cleanup */
3614 if (count++ == E1000_TX_WEIGHT) break;
3615#endif
1da177e4
LT		 3616 }
3617
3618 tx_ring->next_to_clean = i;
3619
77b2aad5 3620#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3621 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3622 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3623 /* Make sure that anybody stopping the queue after this
3624 * sees the new next_to_clean.
3625 */
3626 smp_mb();
3627 if (netif_queue_stopped(netdev))
77b2aad5 3628 netif_wake_queue(netdev);
77b2aad5 3629 }
2648345f 3630
581d708e 3631 if (adapter->detect_tx_hung) {
2648345f 3632 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3633 * check with the clearing of time_stamp and movement of i */
3634 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3635 if (tx_ring->buffer_info[eop].dma &&
3636 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3637 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3638 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3639 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3640
3641 /* detected Tx unit hang */
c6963ef5 3642 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3643 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3644 " TDH <%x>\n"
3645 " TDT <%x>\n"
3646 " next_to_use <%x>\n"
3647 " next_to_clean <%x>\n"
3648 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3649 " time_stamp <%lx>\n"
3650 " next_to_watch <%x>\n"
3651 " jiffies <%lx>\n"
3652 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3653 (unsigned long)((tx_ring - adapter->tx_ring) /
3654 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3655 readl(adapter->hw.hw_addr + tx_ring->tdh),
3656 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3657 tx_ring->next_to_use,
392137fa
JK		 3658 tx_ring->next_to_clean,
3659 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3660 eop,
3661 jiffies,
3662 eop_desc->upper.fields.status);
1da177e4 3663 netif_stop_queue(netdev);
70b8f1e1 3664 }
1da177e4 3665 }
1da177e4
LT		 3666 return cleaned;
3667}
3668
3669/**
3670 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3671 * @adapter: board private structure
3672 * @status_err: receive descriptor status and error fields
3673 * @csum: receive descriptor csum field
3674 * @sk_buff: socket buffer with received data
1da177e4
LT		 3675 **/
3676
e619d523 3677static void
1da177e4 3678e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3679 uint32_t status_err, uint32_t csum,
3680 struct sk_buff *skb)
1da177e4 3681{
2d7edb92
MC		 3682 uint16_t status = (uint16_t)status_err;
3683 uint8_t errors = (uint8_t)(status_err >> 24);
3684 skb->ip_summed = CHECKSUM_NONE;
3685
1da177e4 3686 /* 82543 or newer only */
96838a40 3687 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3688 /* Ignore Checksum bit is set */
96838a40 3689 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3690 /* TCP/UDP checksum error bit is set */
96838a40 3691 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3692 /* let the stack verify checksum errors */
1da177e4 3693 adapter->hw_csum_err++;
2d7edb92
MC		 3694 return;
3695 }
3696 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3697 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3698 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3699 return;
1da177e4 3700 } else {
96838a40 3701 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3702 return;
3703 }
3704 /* It must be a TCP or UDP packet with a valid checksum */
3705 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3706 /* TCP checksum is good */
3707 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3708 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3709 /* IP fragment with UDP payload */
3710 /* Hardware complements the payload checksum, so we undo it
3711 * and then put the value in host order for further stack use.
3712 */
3713 csum = ntohl(csum ^ 0xFFFF);
3714 skb->csum = csum;
84fa7933 3715 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3716 }
2d7edb92 3717 adapter->hw_csum_good++;
1da177e4
LT		 3718}
3719
3720/**
2d7edb92 3721 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3722 * @adapter: board private structure
3723 **/
3724
3725static boolean_t
3726#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3727e1000_clean_rx_irq(struct e1000_adapter *adapter,
3728 struct e1000_rx_ring *rx_ring,
3729 int *work_done, int work_to_do)
1da177e4 3730#else
581d708e
MC		 3731e1000_clean_rx_irq(struct e1000_adapter *adapter,
3732 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3733#endif
3734{
1da177e4
LT		 3735 struct net_device *netdev = adapter->netdev;
3736 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3737 struct e1000_rx_desc *rx_desc, *next_rxd;
3738 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3739 unsigned long flags;
3740 uint32_t length;
3741 uint8_t last_byte;
3742 unsigned int i;
72d64a43 3743 int cleaned_count = 0;
a1415ee6 3744 boolean_t cleaned = FALSE;
1da177e4
LT		 3745
3746 i = rx_ring->next_to_clean;
3747 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3748 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3749
b92ff8ee 3750 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3751 struct sk_buff *skb;
a292ca6e 3752 u8 status;
1da177e4 3753#ifdef CONFIG_E1000_NAPI
96838a40 3754 if (*work_done >= work_to_do)
1da177e4
LT		 3755 break;
3756 (*work_done)++;
3757#endif
a292ca6e 3758 status = rx_desc->status;
b92ff8ee 3759 skb = buffer_info->skb;
86c3d59f
JB		 3760 buffer_info->skb = NULL;
3761
30320be8
JK		 3762 prefetch(skb->data - NET_IP_ALIGN);
3763
86c3d59f
JB		 3764 if (++i == rx_ring->count) i = 0;
3765 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3766 prefetch(next_rxd);
3767
86c3d59f 3768 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3769
72d64a43
JK		 3770 cleaned = TRUE;
3771 cleaned_count++;
a292ca6e
JK		 3772 pci_unmap_single(pdev,
3773 buffer_info->dma,
3774 buffer_info->length,
1da177e4
LT		 3775 PCI_DMA_FROMDEVICE);
3776
1da177e4
LT		 3777 length = le16_to_cpu(rx_desc->length);
3778
f235a2ab
AK		 3779 /* adjust length to remove Ethernet CRC */
3780 length -= 4;
3781
a1415ee6
JK		 3782 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3783 /* All receives must fit into a single buffer */
3784 E1000_DBG("%s: Receive packet consumed multiple"
3785 " buffers\n", netdev->name);
864c4e45 3786 /* recycle */
8fc897b0 3787 buffer_info->skb = skb;
1da177e4
LT		 3788 goto next_desc;
3789 }
3790
96838a40 3791 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3792 last_byte = *(skb->data + length - 1);
b92ff8ee 3793 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3794 rx_desc->errors, length, last_byte)) {
3795 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3796 e1000_tbi_adjust_stats(&adapter->hw,
3797 &adapter->stats,
1da177e4
LT		 3798 length, skb->data);
3799 spin_unlock_irqrestore(&adapter->stats_lock,
3800 flags);
3801 length--;
3802 } else {
9e2feace
AK		 3803 /* recycle */
3804 buffer_info->skb = skb;
1da177e4
LT		 3805 goto next_desc;
3806 }
1cb5821f 3807 }
1da177e4 3808
a292ca6e
JK		 3809 /* code added for copybreak, this should improve
3810 * performance for small packets with large amounts
3811 * of reassembly being done in the stack */
3812#define E1000_CB_LENGTH 256
a1415ee6 3813 if (length < E1000_CB_LENGTH) {
a292ca6e 3814 struct sk_buff *new_skb =
87f5032e 3815 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 3816 if (new_skb) {
3817 skb_reserve(new_skb, NET_IP_ALIGN);
a292ca6e
JK		 3818 memcpy(new_skb->data - NET_IP_ALIGN,
3819 skb->data - NET_IP_ALIGN,
3820 length + NET_IP_ALIGN);
3821 /* save the skb in buffer_info as good */
3822 buffer_info->skb = skb;
3823 skb = new_skb;
3824 skb_put(skb, length);
3825 }
a1415ee6
JK		 3826 } else
3827 skb_put(skb, length);
a292ca6e
JK		 3828
3829 /* end copybreak code */
1da177e4
LT		 3830
3831 /* Receive Checksum Offload */
a292ca6e
JK		 3832 e1000_rx_checksum(adapter,
3833 (uint32_t)(status) |
2d7edb92 3834 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3835 le16_to_cpu(rx_desc->csum), skb);
96838a40 3836
1da177e4
LT		 3837 skb->protocol = eth_type_trans(skb, netdev);
3838#ifdef CONFIG_E1000_NAPI
96838a40 3839 if (unlikely(adapter->vlgrp &&
a292ca6e 3840 (status & E1000_RXD_STAT_VP))) {
1da177e4 3841 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3842 le16_to_cpu(rx_desc->special) &
3843 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3844 } else {
3845 netif_receive_skb(skb);
3846 }
3847#else /* CONFIG_E1000_NAPI */
96838a40 3848 if (unlikely(adapter->vlgrp &&
b92ff8ee 3849 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3850 vlan_hwaccel_rx(skb, adapter->vlgrp,
3851 le16_to_cpu(rx_desc->special) &
3852 E1000_RXD_SPC_VLAN_MASK);
3853 } else {
3854 netif_rx(skb);
3855 }
3856#endif /* CONFIG_E1000_NAPI */
3857 netdev->last_rx = jiffies;
3858
3859next_desc:
3860 rx_desc->status = 0;
1da177e4 3861
72d64a43
JK		 3862 /* return some buffers to hardware, one at a time is too slow */
3863 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3864 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3865 cleaned_count = 0;
3866 }
3867
30320be8 3868 /* use prefetched values */
86c3d59f
JB		 3869 rx_desc = next_rxd;
3870 buffer_info = next_buffer;
1da177e4 3871 }
1da177e4 3872 rx_ring->next_to_clean = i;
72d64a43
JK		 3873
3874 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3875 if (cleaned_count)
3876 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3877
3878 return cleaned;
3879}
3880
3881/**
3882 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3883 * @adapter: board private structure
3884 **/
3885
3886static boolean_t
3887#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3888e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3889 struct e1000_rx_ring *rx_ring,
3890 int *work_done, int work_to_do)
2d7edb92 3891#else
581d708e
MC		 3892e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3893 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3894#endif
3895{
86c3d59f 3896 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3897 struct net_device *netdev = adapter->netdev;
3898 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3899 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3900 struct e1000_ps_page *ps_page;
3901 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3902 struct sk_buff *skb;
2d7edb92
MC		 3903 unsigned int i, j;
3904 uint32_t length, staterr;
72d64a43 3905 int cleaned_count = 0;
2d7edb92
MC		 3906 boolean_t cleaned = FALSE;
3907
3908 i = rx_ring->next_to_clean;
3909 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3910 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3911 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3912
96838a40 3913 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3914 ps_page = &rx_ring->ps_page[i];
3915 ps_page_dma = &rx_ring->ps_page_dma[i];
3916#ifdef CONFIG_E1000_NAPI
96838a40 3917 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3918 break;
3919 (*work_done)++;
3920#endif
86c3d59f
JB		 3921 skb = buffer_info->skb;
3922
30320be8
JK		 3923 /* in the packet split case this is header only */
3924 prefetch(skb->data - NET_IP_ALIGN);
3925
86c3d59f
JB		 3926 if (++i == rx_ring->count) i = 0;
3927 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3928 prefetch(next_rxd);
3929
86c3d59f 3930 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3931
2d7edb92 3932 cleaned = TRUE;
72d64a43 3933 cleaned_count++;
2d7edb92
MC		 3934 pci_unmap_single(pdev, buffer_info->dma,
3935 buffer_info->length,
3936 PCI_DMA_FROMDEVICE);
3937
96838a40 3938 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3939 E1000_DBG("%s: Packet Split buffers didn't pick up"
3940 " the full packet\n", netdev->name);
3941 dev_kfree_skb_irq(skb);
3942 goto next_desc;
3943 }
1da177e4 3944
96838a40 3945 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3946 dev_kfree_skb_irq(skb);
3947 goto next_desc;
3948 }
3949
3950 length = le16_to_cpu(rx_desc->wb.middle.length0);
3951
96838a40 3952 if (unlikely(!length)) {
2d7edb92
MC		 3953 E1000_DBG("%s: Last part of the packet spanning"
3954 " multiple descriptors\n", netdev->name);
3955 dev_kfree_skb_irq(skb);
3956 goto next_desc;
3957 }
3958
3959 /* Good Receive */
3960 skb_put(skb, length);
3961
dc7c6add
JK		 3962 {
3963 /* this looks ugly, but it seems compiler issues make it
3964 more efficient than reusing j */
3965 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3966
3967 /* page alloc/put takes too long and effects small packet
3968 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 3969 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 3970 u8 *vaddr;
76c224bc 3971 /* there is no documentation about how to call
dc7c6add
JK		 3972 * kmap_atomic, so we can't hold the mapping
3973 * very long */
3974 pci_dma_sync_single_for_cpu(pdev,
3975 ps_page_dma->ps_page_dma[0],
3976 PAGE_SIZE,
3977 PCI_DMA_FROMDEVICE);
3978 vaddr = kmap_atomic(ps_page->ps_page[0],
3979 KM_SKB_DATA_SOFTIRQ);
3980 memcpy(skb->tail, vaddr, l1);
3981 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3982 pci_dma_sync_single_for_device(pdev,
3983 ps_page_dma->ps_page_dma[0],
3984 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 3985 /* remove the CRC */
3986 l1 -= 4;
dc7c6add 3987 skb_put(skb, l1);
dc7c6add
JK		 3988 goto copydone;
3989 } /* if */
3990 }
3991
96838a40 3992 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3993 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3994 break;
2d7edb92
MC		 3995 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3996 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3997 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3998 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3999 length);
2d7edb92 4000 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 4001 skb->len += length;
4002 skb->data_len += length;
5d51b80f 4003 skb->truesize += length;
2d7edb92
MC		 4004 }
4005
f235a2ab
AK		 4006 /* strip the ethernet crc, problem is we're using pages now so
4007 * this whole operation can get a little cpu intensive */
4008 pskb_trim(skb, skb->len - 4);
4009
dc7c6add 4010copydone:
2d7edb92 4011 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 4012 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 4013 skb->protocol = eth_type_trans(skb, netdev);
4014
96838a40 4015 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 4016 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 4017 adapter->rx_hdr_split++;
2d7edb92 4018#ifdef CONFIG_E1000_NAPI
96838a40 4019 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4020 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 4021 le16_to_cpu(rx_desc->wb.middle.vlan) &
4022 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4023 } else {
4024 netif_receive_skb(skb);
4025 }
4026#else /* CONFIG_E1000_NAPI */
96838a40 4027 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4028 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 4029 le16_to_cpu(rx_desc->wb.middle.vlan) &
4030 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4031 } else {
4032 netif_rx(skb);
4033 }
4034#endif /* CONFIG_E1000_NAPI */
4035 netdev->last_rx = jiffies;
4036
4037next_desc:
c3d7a3a4 4038 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 4039 buffer_info->skb = NULL;
2d7edb92 4040
72d64a43
JK		 4041 /* return some buffers to hardware, one at a time is too slow */
4042 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4043 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4044 cleaned_count = 0;
4045 }
4046
30320be8 4047 /* use prefetched values */
86c3d59f
JB		 4048 rx_desc = next_rxd;
4049 buffer_info = next_buffer;
4050
683a38f3 4051 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 4052 }
4053 rx_ring->next_to_clean = i;
72d64a43
JK		 4054
4055 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4056 if (cleaned_count)
4057 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 4058
4059 return cleaned;
4060}
4061
4062/**
2d7edb92 4063 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4064 * @adapter: address of board private structure
4065 **/
4066
4067static void
581d708e 4068e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 4069 struct e1000_rx_ring *rx_ring,
a292ca6e 4070 int cleaned_count)
1da177e4 4071{
1da177e4
LT		 4072 struct net_device *netdev = adapter->netdev;
4073 struct pci_dev *pdev = adapter->pdev;
4074 struct e1000_rx_desc *rx_desc;
4075 struct e1000_buffer *buffer_info;
4076 struct sk_buff *skb;
2648345f
MC		 4077 unsigned int i;
4078 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4079
4080 i = rx_ring->next_to_use;
4081 buffer_info = &rx_ring->buffer_info[i];
4082
a292ca6e 4083 while (cleaned_count--) {
ca6f7224
CH		 4084 skb = buffer_info->skb;
4085 if (skb) {
a292ca6e
JK		 4086 skb_trim(skb, 0);
4087 goto map_skb;
4088 }
4089
ca6f7224 4090 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4091 if (unlikely(!skb)) {
1da177e4 4092 /* Better luck next round */
72d64a43 4093 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4094 break;
4095 }
4096
2648345f 4097 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4098 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4099 struct sk_buff *oldskb = skb;
2648345f
MC		 4100 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4101 "at %p\n", bufsz, skb->data);
4102 /* Try again, without freeing the previous */
87f5032e 4103 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4104 /* Failed allocation, critical failure */
1da177e4
LT		 4105 if (!skb) {
4106 dev_kfree_skb(oldskb);
4107 break;
4108 }
2648345f 4109
1da177e4
LT		 4110 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4111 /* give up */
4112 dev_kfree_skb(skb);
4113 dev_kfree_skb(oldskb);
4114 break; /* while !buffer_info->skb */
1da177e4 4115 }
ca6f7224
CH		 4116
4117 /* Use new allocation */
4118 dev_kfree_skb(oldskb);
1da177e4 4119 }
1da177e4
LT		 4120 /* Make buffer alignment 2 beyond a 16 byte boundary
4121 * this will result in a 16 byte aligned IP header after
4122 * the 14 byte MAC header is removed
4123 */
4124 skb_reserve(skb, NET_IP_ALIGN);
4125
1da177e4
LT		 4126 buffer_info->skb = skb;
4127 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4128map_skb:
1da177e4
LT		 4129 buffer_info->dma = pci_map_single(pdev,
4130 skb->data,
4131 adapter->rx_buffer_len,
4132 PCI_DMA_FROMDEVICE);
4133
2648345f
MC		 4134 /* Fix for errata 23, can't cross 64kB boundary */
4135 if (!e1000_check_64k_bound(adapter,
4136 (void *)(unsigned long)buffer_info->dma,
4137 adapter->rx_buffer_len)) {
4138 DPRINTK(RX_ERR, ERR,
4139 "dma align check failed: %u bytes at %p\n",
4140 adapter->rx_buffer_len,
4141 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4142 dev_kfree_skb(skb);
4143 buffer_info->skb = NULL;
4144
2648345f 4145 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4146 adapter->rx_buffer_len,
4147 PCI_DMA_FROMDEVICE);
4148
4149 break; /* while !buffer_info->skb */
4150 }
1da177e4
LT		 4151 rx_desc = E1000_RX_DESC(*rx_ring, i);
4152 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4153
96838a40
JB		 4154 if (unlikely(++i == rx_ring->count))
4155 i = 0;
1da177e4
LT		 4156 buffer_info = &rx_ring->buffer_info[i];
4157 }
4158
b92ff8ee
JB		 4159 if (likely(rx_ring->next_to_use != i)) {
4160 rx_ring->next_to_use = i;
4161 if (unlikely(i-- == 0))
4162 i = (rx_ring->count - 1);
4163
4164 /* Force memory writes to complete before letting h/w
4165 * know there are new descriptors to fetch. (Only
4166 * applicable for weak-ordered memory model archs,
4167 * such as IA-64). */
4168 wmb();
4169 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4170 }
1da177e4
LT		 4171}
4172
2d7edb92
MC		 4173/**
4174 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4175 * @adapter: address of board private structure
4176 **/
4177
4178static void
581d708e 4179e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4180 struct e1000_rx_ring *rx_ring,
4181 int cleaned_count)
2d7edb92 4182{
2d7edb92
MC		 4183 struct net_device *netdev = adapter->netdev;
4184 struct pci_dev *pdev = adapter->pdev;
4185 union e1000_rx_desc_packet_split *rx_desc;
4186 struct e1000_buffer *buffer_info;
4187 struct e1000_ps_page *ps_page;
4188 struct e1000_ps_page_dma *ps_page_dma;
4189 struct sk_buff *skb;
4190 unsigned int i, j;
4191
4192 i = rx_ring->next_to_use;
4193 buffer_info = &rx_ring->buffer_info[i];
4194 ps_page = &rx_ring->ps_page[i];
4195 ps_page_dma = &rx_ring->ps_page_dma[i];
4196
72d64a43 4197 while (cleaned_count--) {
2d7edb92
MC		 4198 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4199
96838a40 4200 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4201 if (j < adapter->rx_ps_pages) {
4202 if (likely(!ps_page->ps_page[j])) {
4203 ps_page->ps_page[j] =
4204 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4205 if (unlikely(!ps_page->ps_page[j])) {
4206 adapter->alloc_rx_buff_failed++;
e4c811c9 4207 goto no_buffers;
b92ff8ee 4208 }
e4c811c9
MC		 4209 ps_page_dma->ps_page_dma[j] =
4210 pci_map_page(pdev,
4211 ps_page->ps_page[j],
4212 0, PAGE_SIZE,
4213 PCI_DMA_FROMDEVICE);
4214 }
4215 /* Refresh the desc even if buffer_addrs didn't
96838a40 4216 * change because each write-back erases
e4c811c9
MC		 4217 * this info.
4218 */
4219 rx_desc->read.buffer_addr[j+1] =
4220 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4221 } else
4222 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4223 }
4224
87f5032e
DM		 4225 skb = netdev_alloc_skb(netdev,
4226 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4227
b92ff8ee
JB		 4228 if (unlikely(!skb)) {
4229 adapter->alloc_rx_buff_failed++;
2d7edb92 4230 break;
b92ff8ee 4231 }
2d7edb92
MC		 4232
4233 /* Make buffer alignment 2 beyond a 16 byte boundary
4234 * this will result in a 16 byte aligned IP header after
4235 * the 14 byte MAC header is removed
4236 */
4237 skb_reserve(skb, NET_IP_ALIGN);
4238
2d7edb92
MC		 4239 buffer_info->skb = skb;
4240 buffer_info->length = adapter->rx_ps_bsize0;
4241 buffer_info->dma = pci_map_single(pdev, skb->data,
4242 adapter->rx_ps_bsize0,
4243 PCI_DMA_FROMDEVICE);
4244
4245 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4246
96838a40 4247 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4248 buffer_info = &rx_ring->buffer_info[i];
4249 ps_page = &rx_ring->ps_page[i];
4250 ps_page_dma = &rx_ring->ps_page_dma[i];
4251 }
4252
4253no_buffers:
b92ff8ee
JB		 4254 if (likely(rx_ring->next_to_use != i)) {
4255 rx_ring->next_to_use = i;
4256 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4257
4258 /* Force memory writes to complete before letting h/w
4259 * know there are new descriptors to fetch. (Only
4260 * applicable for weak-ordered memory model archs,
4261 * such as IA-64). */
4262 wmb();
4263 /* Hardware increments by 16 bytes, but packet split
4264 * descriptors are 32 bytes...so we increment tail
4265 * twice as much.
4266 */
4267 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4268 }
2d7edb92
MC		 4269}
4270
1da177e4
LT		 4271/**
4272 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4273 * @adapter:
4274 **/
4275
4276static void
4277e1000_smartspeed(struct e1000_adapter *adapter)
4278{
4279 uint16_t phy_status;
4280 uint16_t phy_ctrl;
4281
96838a40 4282 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4283 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4284 return;
4285
96838a40 4286 if (adapter->smartspeed == 0) {
1da177e4
LT		 4287 /* If Master/Slave config fault is asserted twice,
4288 * we assume back-to-back */
4289 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4290 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4291 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4292 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4293 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4294 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4295 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4296 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4297 phy_ctrl);
4298 adapter->smartspeed++;
96838a40 4299 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4300 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4301 &phy_ctrl)) {
4302 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4303 MII_CR_RESTART_AUTO_NEG);
4304 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4305 phy_ctrl);
4306 }
4307 }
4308 return;
96838a40 4309 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4310 /* If still no link, perhaps using 2/3 pair cable */
4311 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4312 phy_ctrl |= CR_1000T_MS_ENABLE;
4313 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4314 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4315 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4316 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4317 MII_CR_RESTART_AUTO_NEG);
4318 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4319 }
4320 }
4321 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4322 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4323 adapter->smartspeed = 0;
4324}
4325
4326/**
4327 * e1000_ioctl -
4328 * @netdev:
4329 * @ifreq:
4330 * @cmd:
4331 **/
4332
4333static int
4334e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4335{
4336 switch (cmd) {
4337 case SIOCGMIIPHY:
4338 case SIOCGMIIREG:
4339 case SIOCSMIIREG:
4340 return e1000_mii_ioctl(netdev, ifr, cmd);
4341 default:
4342 return -EOPNOTSUPP;
4343 }
4344}
4345
4346/**
4347 * e1000_mii_ioctl -
4348 * @netdev:
4349 * @ifreq:
4350 * @cmd:
4351 **/
4352
4353static int
4354e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4355{
60490fe0 4356 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4357 struct mii_ioctl_data *data = if_mii(ifr);
4358 int retval;
4359 uint16_t mii_reg;
4360 uint16_t spddplx;
97876fc6 4361 unsigned long flags;
1da177e4 4362
96838a40 4363 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4364 return -EOPNOTSUPP;
4365
4366 switch (cmd) {
4367 case SIOCGMIIPHY:
4368 data->phy_id = adapter->hw.phy_addr;
4369 break;
4370 case SIOCGMIIREG:
96838a40 4371 if (!capable(CAP_NET_ADMIN))
1da177e4 4372 return -EPERM;
97876fc6 4373 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4374 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4375 &data->val_out)) {
4376 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4377 return -EIO;
97876fc6
MC		 4378 }
4379 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4380 break;
4381 case SIOCSMIIREG:
96838a40 4382 if (!capable(CAP_NET_ADMIN))
1da177e4 4383 return -EPERM;
96838a40 4384 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4385 return -EFAULT;
4386 mii_reg = data->val_in;
97876fc6 4387 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4388 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4389 mii_reg)) {
4390 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4391 return -EIO;
97876fc6 4392 }
dc86d32a 4393 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4394 switch (data->reg_num) {
4395 case PHY_CTRL:
96838a40 4396 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4397 break;
96838a40 4398 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4399 adapter->hw.autoneg = 1;
4400 adapter->hw.autoneg_advertised = 0x2F;
4401 } else {
4402 if (mii_reg & 0x40)
4403 spddplx = SPEED_1000;
4404 else if (mii_reg & 0x2000)
4405 spddplx = SPEED_100;
4406 else
4407 spddplx = SPEED_10;
4408 spddplx += (mii_reg & 0x100)
cb764326
JK		 4409 ? DUPLEX_FULL :
4410 DUPLEX_HALF;
1da177e4
LT		 4411 retval = e1000_set_spd_dplx(adapter,
4412 spddplx);
96838a40 4413 if (retval) {
97876fc6 4414 spin_unlock_irqrestore(
96838a40 4415 &adapter->stats_lock,
97876fc6 4416 flags);
1da177e4 4417 return retval;
97876fc6 4418 }
1da177e4 4419 }
2db10a08
AK		 4420 if (netif_running(adapter->netdev))
4421 e1000_reinit_locked(adapter);
4422 else
1da177e4
LT		 4423 e1000_reset(adapter);
4424 break;
4425 case M88E1000_PHY_SPEC_CTRL:
4426 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4427 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4428 spin_unlock_irqrestore(
4429 &adapter->stats_lock, flags);
1da177e4 4430 return -EIO;
97876fc6 4431 }
1da177e4
LT		 4432 break;
4433 }
4434 } else {
4435 switch (data->reg_num) {
4436 case PHY_CTRL:
96838a40 4437 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4438 break;
2db10a08
AK		 4439 if (netif_running(adapter->netdev))
4440 e1000_reinit_locked(adapter);
4441 else
1da177e4
LT		 4442 e1000_reset(adapter);
4443 break;
4444 }
4445 }
97876fc6 4446 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4447 break;
4448 default:
4449 return -EOPNOTSUPP;
4450 }
4451 return E1000_SUCCESS;
4452}
4453
4454void
4455e1000_pci_set_mwi(struct e1000_hw *hw)
4456{
4457 struct e1000_adapter *adapter = hw->back;
2648345f 4458 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4459
96838a40 4460 if (ret_val)
2648345f 4461 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4462}
4463
4464void
4465e1000_pci_clear_mwi(struct e1000_hw *hw)
4466{
4467 struct e1000_adapter *adapter = hw->back;
4468
4469 pci_clear_mwi(adapter->pdev);
4470}
4471
4472void
4473e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4474{
4475 struct e1000_adapter *adapter = hw->back;
4476
4477 pci_read_config_word(adapter->pdev, reg, value);
4478}
4479
4480void
4481e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4482{
4483 struct e1000_adapter *adapter = hw->back;
4484
4485 pci_write_config_word(adapter->pdev, reg, *value);
4486}
4487
caeccb68
JK		 4488int32_t
4489e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4490{
4491 struct e1000_adapter *adapter = hw->back;
4492 uint16_t cap_offset;
4493
4494 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4495 if (!cap_offset)
4496 return -E1000_ERR_CONFIG;
4497
4498 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4499
4500 return E1000_SUCCESS;
4501}
4502
4503
1da177e4
LT		 4504void
4505e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4506{
4507 outl(value, port);
4508}
4509
4510static void
4511e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4512{
60490fe0 4513 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4514 uint32_t ctrl, rctl;
4515
4516 e1000_irq_disable(adapter);
4517 adapter->vlgrp = grp;
4518
96838a40 4519 if (grp) {
1da177e4
LT		 4520 /* enable VLAN tag insert/strip */
4521 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4522 ctrl |= E1000_CTRL_VME;
4523 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4524
cd94dd0b 4525 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4526 /* enable VLAN receive filtering */
4527 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4528 rctl |= E1000_RCTL_VFE;
4529 rctl &= ~E1000_RCTL_CFIEN;
4530 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4531 e1000_update_mng_vlan(adapter);
cd94dd0b 4532 }
1da177e4
LT		 4533 } else {
4534 /* disable VLAN tag insert/strip */
4535 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4536 ctrl &= ~E1000_CTRL_VME;
4537 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4538
cd94dd0b 4539 if (adapter->hw.mac_type != e1000_ich8lan) {
1da177e4
LT		 4540 /* disable VLAN filtering */
4541 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4542 rctl &= ~E1000_RCTL_VFE;
4543 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4544 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4545 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4546 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4547 }
cd94dd0b 4548 }
1da177e4
LT		 4549 }
4550
4551 e1000_irq_enable(adapter);
4552}
4553
4554static void
4555e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4556{
60490fe0 4557 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4558 uint32_t vfta, index;
96838a40
JB		 4559
4560 if ((adapter->hw.mng_cookie.status &
4561 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4562 (vid == adapter->mng_vlan_id))
2d7edb92 4563 return;
1da177e4
LT		 4564 /* add VID to filter table */
4565 index = (vid >> 5) & 0x7F;
4566 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4567 vfta |= (1 << (vid & 0x1F));
4568 e1000_write_vfta(&adapter->hw, index, vfta);
4569}
4570
4571static void
4572e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4573{
60490fe0 4574 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4575 uint32_t vfta, index;
4576
4577 e1000_irq_disable(adapter);
4578
96838a40 4579 if (adapter->vlgrp)
1da177e4
LT		 4580 adapter->vlgrp->vlan_devices[vid] = NULL;
4581
4582 e1000_irq_enable(adapter);
4583
96838a40
JB		 4584 if ((adapter->hw.mng_cookie.status &
4585 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4586 (vid == adapter->mng_vlan_id)) {
4587 /* release control to f/w */
4588 e1000_release_hw_control(adapter);
2d7edb92 4589 return;
ff147013
JK		 4590 }
4591
1da177e4
LT		 4592 /* remove VID from filter table */
4593 index = (vid >> 5) & 0x7F;
4594 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4595 vfta &= ~(1 << (vid & 0x1F));
4596 e1000_write_vfta(&adapter->hw, index, vfta);
4597}
4598
4599static void
4600e1000_restore_vlan(struct e1000_adapter *adapter)
4601{
4602 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4603
96838a40 4604 if (adapter->vlgrp) {
1da177e4 4605 uint16_t vid;
96838a40
JB		 4606 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4607 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4608 continue;
4609 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4610 }
4611 }
4612}
4613
4614int
4615e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4616{
4617 adapter->hw.autoneg = 0;
4618
6921368f 4619 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4620 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4621 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4622 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4623 return -EINVAL;
4624 }
4625
96838a40 4626 switch (spddplx) {
1da177e4
LT		 4627 case SPEED_10 + DUPLEX_HALF:
4628 adapter->hw.forced_speed_duplex = e1000_10_half;
4629 break;
4630 case SPEED_10 + DUPLEX_FULL:
4631 adapter->hw.forced_speed_duplex = e1000_10_full;
4632 break;
4633 case SPEED_100 + DUPLEX_HALF:
4634 adapter->hw.forced_speed_duplex = e1000_100_half;
4635 break;
4636 case SPEED_100 + DUPLEX_FULL:
4637 adapter->hw.forced_speed_duplex = e1000_100_full;
4638 break;
4639 case SPEED_1000 + DUPLEX_FULL:
4640 adapter->hw.autoneg = 1;
4641 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4642 break;
4643 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4644 default:
2648345f 4645 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4646 return -EINVAL;
4647 }
4648 return 0;
4649}
4650
b6a1d5f8 4651#ifdef CONFIG_PM
0f15a8fa
JK		 4652/* Save/restore 16 or 64 dwords of PCI config space depending on which
4653 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4654 */
4655#define PCIE_CONFIG_SPACE_LEN 256
4656#define PCI_CONFIG_SPACE_LEN 64
4657static int
4658e1000_pci_save_state(struct e1000_adapter *adapter)
4659{
4660 struct pci_dev *dev = adapter->pdev;
4661 int size;
4662 int i;
0f15a8fa 4663
2f82665f
JB		 4664 if (adapter->hw.mac_type >= e1000_82571)
4665 size = PCIE_CONFIG_SPACE_LEN;
4666 else
4667 size = PCI_CONFIG_SPACE_LEN;
4668
4669 WARN_ON(adapter->config_space != NULL);
4670
4671 adapter->config_space = kmalloc(size, GFP_KERNEL);
4672 if (!adapter->config_space) {
4673 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4674 return -ENOMEM;
4675 }
4676 for (i = 0; i < (size / 4); i++)
4677 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4678 return 0;
4679}
4680
4681static void
4682e1000_pci_restore_state(struct e1000_adapter *adapter)
4683{
4684 struct pci_dev *dev = adapter->pdev;
4685 int size;
4686 int i;
0f15a8fa 4687
2f82665f
JB		 4688 if (adapter->config_space == NULL)
4689 return;
0f15a8fa 4690
2f82665f
JB		 4691 if (adapter->hw.mac_type >= e1000_82571)
4692 size = PCIE_CONFIG_SPACE_LEN;
4693 else
4694 size = PCI_CONFIG_SPACE_LEN;
4695 for (i = 0; i < (size / 4); i++)
4696 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4697 kfree(adapter->config_space);
4698 adapter->config_space = NULL;
4699 return;
4700}
4701#endif /* CONFIG_PM */
4702
1da177e4 4703static int
829ca9a3 4704e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4705{
4706 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4707 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4708 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4709 uint32_t wufc = adapter->wol;
6fdfef16 4710#ifdef CONFIG_PM
240b1710 4711 int retval = 0;
6fdfef16 4712#endif
1da177e4
LT		 4713
4714 netif_device_detach(netdev);
4715
2db10a08
AK		 4716 if (netif_running(netdev)) {
4717 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4718 e1000_down(adapter);
2db10a08 4719 }
1da177e4 4720
2f82665f 4721#ifdef CONFIG_PM
0f15a8fa
JK		 4722 /* Implement our own version of pci_save_state(pdev) because pci-
4723 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4724 retval = e1000_pci_save_state(adapter);
4725 if (retval)
4726 return retval;
4727#endif
4728
1da177e4 4729 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4730 if (status & E1000_STATUS_LU)
1da177e4
LT		 4731 wufc &= ~E1000_WUFC_LNKC;
4732
96838a40 4733 if (wufc) {
1da177e4
LT		 4734 e1000_setup_rctl(adapter);
4735 e1000_set_multi(netdev);
4736
4737 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4738 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 4739 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4740 rctl |= E1000_RCTL_MPE;
4741 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4742 }
4743
96838a40 4744 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4745 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4746 /* advertise wake from D3Cold */
4747 #define E1000_CTRL_ADVD3WUC 0x00100000
4748 /* phy power management enable */
4749 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4750 ctrl |= E1000_CTRL_ADVD3WUC |
4751 E1000_CTRL_EN_PHY_PWR_MGMT;
4752 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4753 }
4754
96838a40 4755 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4756 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4757 /* keep the laser running in D3 */
4758 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4759 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4760 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4761 }
4762
2d7edb92
MC		 4763 /* Allow time for pending master requests to run */
4764 e1000_disable_pciex_master(&adapter->hw);
4765
1da177e4
LT		 4766 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4767 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4768 pci_enable_wake(pdev, PCI_D3hot, 1);
4769 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4770 } else {
4771 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4772 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4773 pci_enable_wake(pdev, PCI_D3hot, 0);
4774 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4775 }
4776
5f01607a 4777 if (adapter->hw.mac_type < e1000_82571 &&
1da177e4
LT		 4778 adapter->hw.media_type == e1000_media_type_copper) {
4779 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4780 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4781 manc |= E1000_MANC_ARP_EN;
4782 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4783 pci_enable_wake(pdev, PCI_D3hot, 1);
4784 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4785 }
4786 }
4787
cd94dd0b
AK		 4788 if (adapter->hw.phy_type == e1000_phy_igp_3)
4789 e1000_phy_powerdown_workaround(&adapter->hw);
4790
b55ccb35
JK		 4791 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4792 * would have already happened in close and is redundant. */
4793 e1000_release_hw_control(adapter);
2d7edb92 4794
1da177e4 4795 pci_disable_device(pdev);
240b1710 4796
d0e027db 4797 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4798
4799 return 0;
4800}
4801
2f82665f 4802#ifdef CONFIG_PM
1da177e4
LT		 4803static int
4804e1000_resume(struct pci_dev *pdev)
4805{
4806 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4807 struct e1000_adapter *adapter = netdev_priv(netdev);
3d1dd8cb 4808 uint32_t manc, err;
1da177e4 4809
d0e027db 4810 pci_set_power_state(pdev, PCI_D0);
2f82665f 4811 e1000_pci_restore_state(adapter);
3d1dd8cb
AK		 4812 if ((err = pci_enable_device(pdev))) {
4813 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4814 return err;
4815 }
a4cb847d 4816 pci_set_master(pdev);
1da177e4 4817
d0e027db
AK		 4818 pci_enable_wake(pdev, PCI_D3hot, 0);
4819 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4820
4821 e1000_reset(adapter);
4822 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4823
96838a40 4824 if (netif_running(netdev))
1da177e4
LT		 4825 e1000_up(adapter);
4826
4827 netif_device_attach(netdev);
4828
5f01607a 4829 if (adapter->hw.mac_type < e1000_82571 &&
1da177e4
LT		 4830 adapter->hw.media_type == e1000_media_type_copper) {
4831 manc = E1000_READ_REG(&adapter->hw, MANC);
4832 manc &= ~(E1000_MANC_ARP_EN);
4833 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4834 }
4835
b55ccb35
JK		 4836 /* If the controller is 82573 and f/w is AMT, do not set
4837 * DRV_LOAD until the interface is up. For all other cases,
4838 * let the f/w know that the h/w is now under the control
4839 * of the driver. */
4840 if (adapter->hw.mac_type != e1000_82573 ||
4841 !e1000_check_mng_mode(&adapter->hw))
4842 e1000_get_hw_control(adapter);
2d7edb92 4843
1da177e4
LT		 4844 return 0;
4845}
4846#endif
c653e635
AK		 4847
4848static void e1000_shutdown(struct pci_dev *pdev)
4849{
4850 e1000_suspend(pdev, PMSG_SUSPEND);
4851}
4852
1da177e4
LT		 4853#ifdef CONFIG_NET_POLL_CONTROLLER
4854/*
4855 * Polling 'interrupt' - used by things like netconsole to send skbs
4856 * without having to re-enable interrupts. It's not called while
4857 * the interrupt routine is executing.
4858 */
4859static void
2648345f 4860e1000_netpoll(struct net_device *netdev)
1da177e4 4861{
60490fe0 4862 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4863
1da177e4
LT		 4864 disable_irq(adapter->pdev->irq);
4865 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4866 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4867#ifndef CONFIG_E1000_NAPI
4868 adapter->clean_rx(adapter, adapter->rx_ring);
4869#endif
1da177e4
LT		 4870 enable_irq(adapter->pdev->irq);
4871}
4872#endif
4873
9026729b
AK		 4874/**
4875 * e1000_io_error_detected - called when PCI error is detected
4876 * @pdev: Pointer to PCI device
4877 * @state: The current pci conneection state
4878 *
4879 * This function is called after a PCI bus error affecting
4880 * this device has been detected.
4881 */
4882static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4883{
4884 struct net_device *netdev = pci_get_drvdata(pdev);
4885 struct e1000_adapter *adapter = netdev->priv;
4886
4887 netif_device_detach(netdev);
4888
4889 if (netif_running(netdev))
4890 e1000_down(adapter);
72e8d6bb 4891 pci_disable_device(pdev);
9026729b
AK		 4892
4893 /* Request a slot slot reset. */
4894 return PCI_ERS_RESULT_NEED_RESET;
4895}
4896
4897/**
4898 * e1000_io_slot_reset - called after the pci bus has been reset.
4899 * @pdev: Pointer to PCI device
4900 *
4901 * Restart the card from scratch, as if from a cold-boot. Implementation
4902 * resembles the first-half of the e1000_resume routine.
4903 */
4904static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4905{
4906 struct net_device *netdev = pci_get_drvdata(pdev);
4907 struct e1000_adapter *adapter = netdev->priv;
4908
4909 if (pci_enable_device(pdev)) {
4910 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4911 return PCI_ERS_RESULT_DISCONNECT;
4912 }
4913 pci_set_master(pdev);
4914
4915 pci_enable_wake(pdev, 3, 0);
4916 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4917
4918 /* Perform card reset only on one instance of the card */
4919 if (PCI_FUNC (pdev->devfn) != 0)
4920 return PCI_ERS_RESULT_RECOVERED;
4921
4922 e1000_reset(adapter);
4923 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4924
4925 return PCI_ERS_RESULT_RECOVERED;
4926}
4927
4928/**
4929 * e1000_io_resume - called when traffic can start flowing again.
4930 * @pdev: Pointer to PCI device
4931 *
4932 * This callback is called when the error recovery driver tells us that
4933 * its OK to resume normal operation. Implementation resembles the
4934 * second-half of the e1000_resume routine.
4935 */
4936static void e1000_io_resume(struct pci_dev *pdev)
4937{
4938 struct net_device *netdev = pci_get_drvdata(pdev);
4939 struct e1000_adapter *adapter = netdev->priv;
4940 uint32_t manc, swsm;
4941
4942 if (netif_running(netdev)) {
4943 if (e1000_up(adapter)) {
4944 printk("e1000: can't bring device back up after reset\n");
4945 return;
4946 }
4947 }
4948
4949 netif_device_attach(netdev);
4950
4951 if (adapter->hw.mac_type >= e1000_82540 &&
4952 adapter->hw.media_type == e1000_media_type_copper) {
4953 manc = E1000_READ_REG(&adapter->hw, MANC);
4954 manc &= ~(E1000_MANC_ARP_EN);
4955 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4956 }
4957
4958 switch (adapter->hw.mac_type) {
4959 case e1000_82573:
4960 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4961 E1000_WRITE_REG(&adapter->hw, SWSM,
4962 swsm | E1000_SWSM_DRV_LOAD);
4963 break;
4964 default:
4965 break;
4966 }
4967
4968 if (netif_running(netdev))
4969 mod_timer(&adapter->watchdog_timer, jiffies);
4970}
4971
1da177e4 4972/* e1000_main.c */
Linux kernel - Deliverables
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