projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
e1000: use netif_tx_disable
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1532ecea 34#define DRV_VERSION "7.3.21-k5-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4 127static void e1000_82547_tx_fifo_stall(unsigned long data);
3b29a56d
SH		 128static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
129 struct net_device *netdev);
1da177e4
LT		 130static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
131static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
132static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 133static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
edbbb3ca
JB		 140static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
141 struct e1000_rx_ring *rx_ring,
142 int *work_done, int work_to_do);
581d708e 143static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 144 struct e1000_rx_ring *rx_ring,
72d64a43 145 int cleaned_count);
edbbb3ca
JB		 146static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring,
148 int cleaned_count);
1da177e4
LT		 149static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
150static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
151 int cmd);
1da177e4
LT		 152static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
153static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
154static void e1000_tx_timeout(struct net_device *dev);
65f27f38 155static void e1000_reset_task(struct work_struct *work);
1da177e4 156static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 157static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
158 struct sk_buff *skb);
1da177e4
LT		 159
160static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 161static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
162static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 163static void e1000_restore_vlan(struct e1000_adapter *adapter);
164
6fdfef16 165#ifdef CONFIG_PM
b43fcd7d 166static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 167static int e1000_resume(struct pci_dev *pdev);
168#endif
c653e635 169static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 170
171#ifdef CONFIG_NET_POLL_CONTROLLER
172/* for netdump / net console */
173static void e1000_netpoll (struct net_device *netdev);
174#endif
175
1f753861
JB		 176#define COPYBREAK_DEFAULT 256
177static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
178module_param(copybreak, uint, 0644);
179MODULE_PARM_DESC(copybreak,
180 "Maximum size of packet that is copied to a new buffer on receive");
181
9026729b
AK		 182static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
183 pci_channel_state_t state);
184static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
185static void e1000_io_resume(struct pci_dev *pdev);
186
187static struct pci_error_handlers e1000_err_handler = {
188 .error_detected = e1000_io_error_detected,
189 .slot_reset = e1000_io_slot_reset,
190 .resume = e1000_io_resume,
191};
24025e4e 192
1da177e4
LT		 193static struct pci_driver e1000_driver = {
194 .name = e1000_driver_name,
195 .id_table = e1000_pci_tbl,
196 .probe = e1000_probe,
197 .remove = __devexit_p(e1000_remove),
c4e24f01 198#ifdef CONFIG_PM
1da177e4 199 /* Power Managment Hooks */
1da177e4 200 .suspend = e1000_suspend,
c653e635 201 .resume = e1000_resume,
1da177e4 202#endif
9026729b
AK		 203 .shutdown = e1000_shutdown,
204 .err_handler = &e1000_err_handler
1da177e4
LT		 205};
206
207MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
208MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
209MODULE_LICENSE("GPL");
210MODULE_VERSION(DRV_VERSION);
211
212static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
213module_param(debug, int, 0);
214MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
215
216/**
217 * e1000_init_module - Driver Registration Routine
218 *
219 * e1000_init_module is the first routine called when the driver is
220 * loaded. All it does is register with the PCI subsystem.
221 **/
222
64798845 223static int __init e1000_init_module(void)
1da177e4
LT		 224{
225 int ret;
226 printk(KERN_INFO "%s - version %s\n",
227 e1000_driver_string, e1000_driver_version);
228
229 printk(KERN_INFO "%s\n", e1000_copyright);
230
29917620 231 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 232 if (copybreak != COPYBREAK_DEFAULT) {
233 if (copybreak == 0)
234 printk(KERN_INFO "e1000: copybreak disabled\n");
235 else
236 printk(KERN_INFO "e1000: copybreak enabled for "
237 "packets <= %u bytes\n", copybreak);
238 }
1da177e4
LT		 239 return ret;
240}
241
242module_init(e1000_init_module);
243
244/**
245 * e1000_exit_module - Driver Exit Cleanup Routine
246 *
247 * e1000_exit_module is called just before the driver is removed
248 * from memory.
249 **/
250
64798845 251static void __exit e1000_exit_module(void)
1da177e4 252{
1da177e4
LT		 253 pci_unregister_driver(&e1000_driver);
254}
255
256module_exit(e1000_exit_module);
257
2db10a08
AK		 258static int e1000_request_irq(struct e1000_adapter *adapter)
259{
260 struct net_device *netdev = adapter->netdev;
3e18826c 261 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 262 int irq_flags = IRQF_SHARED;
263 int err;
2db10a08 264
e94bd23f
AK		 265 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
266 netdev);
267 if (err) {
2db10a08
AK		 268 DPRINTK(PROBE, ERR,
269 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 270 }
2db10a08
AK		 271
272 return err;
273}
274
275static void e1000_free_irq(struct e1000_adapter *adapter)
276{
277 struct net_device *netdev = adapter->netdev;
278
279 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 280}
281
1da177e4
LT		 282/**
283 * e1000_irq_disable - Mask off interrupt generation on the NIC
284 * @adapter: board private structure
285 **/
286
64798845 287static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 288{
1dc32918
JP		 289 struct e1000_hw *hw = &adapter->hw;
290
291 ew32(IMC, ~0);
292 E1000_WRITE_FLUSH();
1da177e4
LT		 293 synchronize_irq(adapter->pdev->irq);
294}
295
296/**
297 * e1000_irq_enable - Enable default interrupt generation settings
298 * @adapter: board private structure
299 **/
300
64798845 301static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 302{
1dc32918
JP		 303 struct e1000_hw *hw = &adapter->hw;
304
305 ew32(IMS, IMS_ENABLE_MASK);
306 E1000_WRITE_FLUSH();
1da177e4 307}
3ad2cc67 308
64798845 309static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 310{
1dc32918 311 struct e1000_hw *hw = &adapter->hw;
2d7edb92 312 struct net_device *netdev = adapter->netdev;
1dc32918 313 u16 vid = hw->mng_cookie.vlan_id;
406874a7 314 u16 old_vid = adapter->mng_vlan_id;
96838a40 315 if (adapter->vlgrp) {
5c15bdec 316 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 317 if (hw->mng_cookie.status &
2d7edb92
MC		 318 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
319 e1000_vlan_rx_add_vid(netdev, vid);
320 adapter->mng_vlan_id = vid;
321 } else
322 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 323
406874a7 324 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 325 (vid != old_vid) &&
5c15bdec 326 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 327 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 328 } else
329 adapter->mng_vlan_id = vid;
2d7edb92
MC		 330 }
331}
b55ccb35 332
64798845 333static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 334{
1dc32918
JP		 335 struct e1000_hw *hw = &adapter->hw;
336
0fccd0e9 337 if (adapter->en_mng_pt) {
1dc32918 338 u32 manc = er32(MANC);
0fccd0e9
JG		 339
340 /* disable hardware interception of ARP */
341 manc &= ~(E1000_MANC_ARP_EN);
342
1dc32918 343 ew32(MANC, manc);
0fccd0e9
JG		 344 }
345}
346
64798845 347static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 348{
1dc32918
JP		 349 struct e1000_hw *hw = &adapter->hw;
350
0fccd0e9 351 if (adapter->en_mng_pt) {
1dc32918 352 u32 manc = er32(MANC);
0fccd0e9
JG		 353
354 /* re-enable hardware interception of ARP */
355 manc |= E1000_MANC_ARP_EN;
356
1dc32918 357 ew32(MANC, manc);
0fccd0e9
JG		 358 }
359}
360
e0aac5a2
AK		 361/**
362 * e1000_configure - configure the hardware for RX and TX
363 * @adapter = private board structure
364 **/
365static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 366{
367 struct net_device *netdev = adapter->netdev;
2db10a08 368 int i;
1da177e4 369
db0ce50d 370 e1000_set_rx_mode(netdev);
1da177e4
LT		 371
372 e1000_restore_vlan(adapter);
0fccd0e9 373 e1000_init_manageability(adapter);
1da177e4
LT		 374
375 e1000_configure_tx(adapter);
376 e1000_setup_rctl(adapter);
377 e1000_configure_rx(adapter);
72d64a43
JK		 378 /* call E1000_DESC_UNUSED which always leaves
379 * at least 1 descriptor unused to make sure
380 * next_to_use != next_to_clean */
f56799ea 381 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 382 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 383 adapter->alloc_rx_buf(adapter, ring,
384 E1000_DESC_UNUSED(ring));
f56799ea 385 }
1da177e4 386
7bfa4816 387 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 388}
389
390int e1000_up(struct e1000_adapter *adapter)
391{
1dc32918
JP		 392 struct e1000_hw *hw = &adapter->hw;
393
e0aac5a2
AK		 394 /* hardware has been reset, we need to reload some things */
395 e1000_configure(adapter);
396
397 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 398
bea3348e 399 napi_enable(&adapter->napi);
c3570acb 400
5de55624
MC		 401 e1000_irq_enable(adapter);
402
4cb9be7a
JB		 403 netif_wake_queue(adapter->netdev);
404
79f3d399 405 /* fire a link change interrupt to start the watchdog */
1dc32918 406 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 407 return 0;
408}
409
79f05bf0
AK		 410/**
411 * e1000_power_up_phy - restore link in case the phy was powered down
412 * @adapter: address of board private structure
413 *
414 * The phy may be powered down to save power and turn off link when the
415 * driver is unloaded and wake on lan is not enabled (among others)
416 * *** this routine MUST be followed by a call to e1000_reset ***
417 *
418 **/
419
d658266e 420void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 421{
1dc32918 422 struct e1000_hw *hw = &adapter->hw;
406874a7 423 u16 mii_reg = 0;
79f05bf0
AK		 424
425 /* Just clear the power down bit to wake the phy back up */
1dc32918 426 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 427 /* according to the manual, the phy will retain its
428 * settings across a power-down/up cycle */
1dc32918 429 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 430 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 431 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 432 }
433}
434
435static void e1000_power_down_phy(struct e1000_adapter *adapter)
436{
1dc32918
JP		 437 struct e1000_hw *hw = &adapter->hw;
438
61c2505f 439 /* Power down the PHY so no link is implied when interface is down *
c3033b01 440 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 441 * (a) WoL is enabled
442 * (b) AMT is active
443 * (c) SoL/IDER session is active */
1dc32918
JP		 444 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
445 hw->media_type == e1000_media_type_copper) {
406874a7 446 u16 mii_reg = 0;
61c2505f 447
1dc32918 448 switch (hw->mac_type) {
61c2505f
BA		 449 case e1000_82540:
450 case e1000_82545:
451 case e1000_82545_rev_3:
452 case e1000_82546:
453 case e1000_82546_rev_3:
454 case e1000_82541:
455 case e1000_82541_rev_2:
456 case e1000_82547:
457 case e1000_82547_rev_2:
1dc32918 458 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 459 goto out;
460 break;
61c2505f
BA		 461 default:
462 goto out;
463 }
1dc32918 464 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 465 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 466 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 467 mdelay(1);
468 }
61c2505f
BA		 469out:
470 return;
79f05bf0
AK		 471}
472
64798845 473void e1000_down(struct e1000_adapter *adapter)
1da177e4 474{
a6c42322 475 struct e1000_hw *hw = &adapter->hw;
1da177e4 476 struct net_device *netdev = adapter->netdev;
a6c42322 477 u32 rctl, tctl;
1da177e4 478
1314bbf3
AK		 479 /* signal that we're down so the interrupt handler does not
480 * reschedule our watchdog timer */
481 set_bit(__E1000_DOWN, &adapter->flags);
482
a6c42322
JB		 483 /* disable receives in the hardware */
484 rctl = er32(RCTL);
485 ew32(RCTL, rctl & ~E1000_RCTL_EN);
486 /* flush and sleep below */
487
51851073 488 netif_tx_disable(netdev);
a6c42322
JB		 489
490 /* disable transmits in the hardware */
491 tctl = er32(TCTL);
492 tctl &= ~E1000_TCTL_EN;
493 ew32(TCTL, tctl);
494 /* flush both disables and wait for them to finish */
495 E1000_WRITE_FLUSH();
496 msleep(10);
497
bea3348e 498 napi_disable(&adapter->napi);
c3570acb 499
1da177e4 500 e1000_irq_disable(adapter);
c1605eb3 501
1da177e4
LT		 502 del_timer_sync(&adapter->tx_fifo_stall_timer);
503 del_timer_sync(&adapter->watchdog_timer);
504 del_timer_sync(&adapter->phy_info_timer);
505
7bfa4816 506 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 507 adapter->link_speed = 0;
508 adapter->link_duplex = 0;
509 netif_carrier_off(netdev);
1da177e4
LT		 510
511 e1000_reset(adapter);
581d708e
MC		 512 e1000_clean_all_tx_rings(adapter);
513 e1000_clean_all_rx_rings(adapter);
1da177e4 514}
1da177e4 515
64798845 516void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 517{
518 WARN_ON(in_interrupt());
519 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
520 msleep(1);
521 e1000_down(adapter);
522 e1000_up(adapter);
523 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 524}
525
64798845 526void e1000_reset(struct e1000_adapter *adapter)
1da177e4 527{
1dc32918 528 struct e1000_hw *hw = &adapter->hw;
406874a7 529 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 530 bool legacy_pba_adjust = false;
b7cb8c2c 531 u16 hwm;
1da177e4
LT		 532
533 /* Repartition Pba for greater than 9k mtu
534 * To take effect CTRL.RST is required.
535 */
536
1dc32918 537 switch (hw->mac_type) {
018ea44e
BA		 538 case e1000_82542_rev2_0:
539 case e1000_82542_rev2_1:
540 case e1000_82543:
541 case e1000_82544:
542 case e1000_82540:
543 case e1000_82541:
544 case e1000_82541_rev_2:
c3033b01 545 legacy_pba_adjust = true;
018ea44e
BA		 546 pba = E1000_PBA_48K;
547 break;
548 case e1000_82545:
549 case e1000_82545_rev_3:
550 case e1000_82546:
551 case e1000_82546_rev_3:
552 pba = E1000_PBA_48K;
553 break;
2d7edb92 554 case e1000_82547:
0e6ef3e0 555 case e1000_82547_rev_2:
c3033b01 556 legacy_pba_adjust = true;
2d7edb92
MC		 557 pba = E1000_PBA_30K;
558 break;
018ea44e
BA		 559 case e1000_undefined:
560 case e1000_num_macs:
2d7edb92
MC		 561 break;
562 }
563
c3033b01 564 if (legacy_pba_adjust) {
b7cb8c2c 565 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 566 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 567
1dc32918 568 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 569 adapter->tx_fifo_head = 0;
570 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
571 adapter->tx_fifo_size =
572 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
573 atomic_set(&adapter->tx_fifo_stall, 0);
574 }
b7cb8c2c 575 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 576 /* adjust PBA for jumbo frames */
1dc32918 577 ew32(PBA, pba);
018ea44e
BA		 578
579 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 580 * large enough to accommodate two full transmit packets,
018ea44e 581 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 582 * the Rx FIFO should be large enough to accommodate at least
018ea44e
BA		 583 * one full receive packet and is similarly rounded up and
584 * expressed in KB. */
1dc32918 585 pba = er32(PBA);
018ea44e
BA		 586 /* upper 16 bits has Tx packet buffer allocation size in KB */
587 tx_space = pba >> 16;
588 /* lower 16 bits has Rx packet buffer allocation size in KB */
589 pba &= 0xffff;
b7cb8c2c
JB		 590 /*
591 * the tx fifo also stores 16 bytes of information about the tx
592 * but don't include ethernet FCS because hardware appends it
593 */
594 min_tx_space = (hw->max_frame_size +
595 sizeof(struct e1000_tx_desc) -
596 ETH_FCS_LEN) * 2;
9099cfb9 597 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 598 min_tx_space >>= 10;
b7cb8c2c
JB		 599 /* software strips receive CRC, so leave room for it */
600 min_rx_space = hw->max_frame_size;
9099cfb9 601 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 602 min_rx_space >>= 10;
603
604 /* If current Tx allocation is less than the min Tx FIFO size,
605 * and the min Tx FIFO size is less than the current Rx FIFO
606 * allocation, take space away from current Rx allocation */
607 if (tx_space < min_tx_space &&
608 ((min_tx_space - tx_space) < pba)) {
609 pba = pba - (min_tx_space - tx_space);
610
611 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 612 switch (hw->mac_type) {
018ea44e
BA		 613 case e1000_82545 ... e1000_82546_rev_3:
614 pba &= ~(E1000_PBA_8K - 1);
615 break;
616 default:
617 break;
618 }
619
620 /* if short on rx space, rx wins and must trump tx
621 * adjustment or use Early Receive if available */
1532ecea
JB		 622 if (pba < min_rx_space)
623 pba = min_rx_space;
018ea44e 624 }
1da177e4 625 }
2d7edb92 626
1dc32918 627 ew32(PBA, pba);
1da177e4 628
b7cb8c2c
JB		 629 /*
630 * flow control settings:
631 * The high water mark must be low enough to fit one full frame
632 * (or the size used for early receive) above it in the Rx FIFO.
633 * Set it to the lower of:
634 * - 90% of the Rx FIFO size, and
635 * - the full Rx FIFO size minus the early receive size (for parts
636 * with ERT support assuming ERT set to E1000_ERT_2048), or
637 * - the full Rx FIFO size minus one full frame
638 */
639 hwm = min(((pba << 10) * 9 / 10),
640 ((pba << 10) - hw->max_frame_size));
641
642 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
643 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 644 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 645 hw->fc_send_xon = 1;
646 hw->fc = hw->original_fc;
1da177e4 647
2d7edb92 648 /* Allow time for pending master requests to run */
1dc32918
JP		 649 e1000_reset_hw(hw);
650 if (hw->mac_type >= e1000_82544)
651 ew32(WUC, 0);
09ae3e88 652
1dc32918 653 if (e1000_init_hw(hw))
1da177e4 654 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 655 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 656
657 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 658 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 659 hw->autoneg == 1 &&
660 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
661 u32 ctrl = er32(CTRL);
3d5460a0
JB		 662 /* clear phy power management bit if we are in gig only mode,
663 * which if enabled will attempt negotiation to 100Mb, which
664 * can cause a loss of link at power off or driver unload */
665 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 666 ew32(CTRL, ctrl);
3d5460a0
JB		 667 }
668
1da177e4 669 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 670 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 671
1dc32918
JP		 672 e1000_reset_adaptive(hw);
673 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 674
0fccd0e9 675 e1000_release_manageability(adapter);
1da177e4
LT		 676}
677
67b3c27c
AK		 678/**
679 * Dump the eeprom for users having checksum issues
680 **/
b4ea895d 681static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 682{
683 struct net_device *netdev = adapter->netdev;
684 struct ethtool_eeprom eeprom;
685 const struct ethtool_ops *ops = netdev->ethtool_ops;
686 u8 *data;
687 int i;
688 u16 csum_old, csum_new = 0;
689
690 eeprom.len = ops->get_eeprom_len(netdev);
691 eeprom.offset = 0;
692
693 data = kmalloc(eeprom.len, GFP_KERNEL);
694 if (!data) {
695 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
696 " data\n");
697 return;
698 }
699
700 ops->get_eeprom(netdev, &eeprom, data);
701
702 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
703 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
704 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
705 csum_new += data[i] + (data[i + 1] << 8);
706 csum_new = EEPROM_SUM - csum_new;
707
708 printk(KERN_ERR "/*********************/\n");
709 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
710 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
711
712 printk(KERN_ERR "Offset Values\n");
713 printk(KERN_ERR "======== ======\n");
714 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
715
716 printk(KERN_ERR "Include this output when contacting your support "
717 "provider.\n");
718 printk(KERN_ERR "This is not a software error! Something bad "
719 "happened to your hardware or\n");
720 printk(KERN_ERR "EEPROM image. Ignoring this "
721 "problem could result in further problems,\n");
722 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
723 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
724 "which is invalid\n");
725 printk(KERN_ERR "and requires you to set the proper MAC "
726 "address manually before continuing\n");
727 printk(KERN_ERR "to enable this network device.\n");
728 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
729 "to your hardware vendor\n");
63cd31f6 730 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 731 printk(KERN_ERR "/*********************/\n");
732
733 kfree(data);
734}
735
81250297
TI		 736/**
737 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
738 * @pdev: PCI device information struct
739 *
740 * Return true if an adapter needs ioport resources
741 **/
742static int e1000_is_need_ioport(struct pci_dev *pdev)
743{
744 switch (pdev->device) {
745 case E1000_DEV_ID_82540EM:
746 case E1000_DEV_ID_82540EM_LOM:
747 case E1000_DEV_ID_82540EP:
748 case E1000_DEV_ID_82540EP_LOM:
749 case E1000_DEV_ID_82540EP_LP:
750 case E1000_DEV_ID_82541EI:
751 case E1000_DEV_ID_82541EI_MOBILE:
752 case E1000_DEV_ID_82541ER:
753 case E1000_DEV_ID_82541ER_LOM:
754 case E1000_DEV_ID_82541GI:
755 case E1000_DEV_ID_82541GI_LF:
756 case E1000_DEV_ID_82541GI_MOBILE:
757 case E1000_DEV_ID_82544EI_COPPER:
758 case E1000_DEV_ID_82544EI_FIBER:
759 case E1000_DEV_ID_82544GC_COPPER:
760 case E1000_DEV_ID_82544GC_LOM:
761 case E1000_DEV_ID_82545EM_COPPER:
762 case E1000_DEV_ID_82545EM_FIBER:
763 case E1000_DEV_ID_82546EB_COPPER:
764 case E1000_DEV_ID_82546EB_FIBER:
765 case E1000_DEV_ID_82546EB_QUAD_COPPER:
766 return true;
767 default:
768 return false;
769 }
770}
771
0e7614bc
SH		 772static const struct net_device_ops e1000_netdev_ops = {
773 .ndo_open = e1000_open,
774 .ndo_stop = e1000_close,
00829823 775 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 776 .ndo_get_stats = e1000_get_stats,
777 .ndo_set_rx_mode = e1000_set_rx_mode,
778 .ndo_set_mac_address = e1000_set_mac,
779 .ndo_tx_timeout = e1000_tx_timeout,
780 .ndo_change_mtu = e1000_change_mtu,
781 .ndo_do_ioctl = e1000_ioctl,
782 .ndo_validate_addr = eth_validate_addr,
783
784 .ndo_vlan_rx_register = e1000_vlan_rx_register,
785 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
786 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
787#ifdef CONFIG_NET_POLL_CONTROLLER
788 .ndo_poll_controller = e1000_netpoll,
789#endif
790};
791
1da177e4
LT		 792/**
793 * e1000_probe - Device Initialization Routine
794 * @pdev: PCI device information struct
795 * @ent: entry in e1000_pci_tbl
796 *
797 * Returns 0 on success, negative on failure
798 *
799 * e1000_probe initializes an adapter identified by a pci_dev structure.
800 * The OS initialization, configuring of the adapter private structure,
801 * and a hardware reset occur.
802 **/
1dc32918
JP		 803static int __devinit e1000_probe(struct pci_dev *pdev,
804 const struct pci_device_id *ent)
1da177e4
LT		 805{
806 struct net_device *netdev;
807 struct e1000_adapter *adapter;
1dc32918 808 struct e1000_hw *hw;
2d7edb92 809
1da177e4 810 static int cards_found = 0;
120cd576 811 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 812 int i, err, pci_using_dac;
406874a7
JP		 813 u16 eeprom_data = 0;
814 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 815 int bars, need_ioport;
0795af57 816
81250297
TI		 817 /* do not allocate ioport bars when not needed */
818 need_ioport = e1000_is_need_ioport(pdev);
819 if (need_ioport) {
820 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
821 err = pci_enable_device(pdev);
822 } else {
823 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 824 err = pci_enable_device_mem(pdev);
81250297 825 }
c7be73bc 826 if (err)
1da177e4
LT		 827 return err;
828
6a35528a
YH		 829 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
830 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1da177e4
LT		 831 pci_using_dac = 1;
832 } else {
284901a9 833 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc 834 if (err) {
284901a9 835 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc
JP		 836 if (err) {
837 E1000_ERR("No usable DMA configuration, "
838 "aborting\n");
839 goto err_dma;
840 }
1da177e4
LT		 841 }
842 pci_using_dac = 0;
843 }
844
81250297 845 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 846 if (err)
6dd62ab0 847 goto err_pci_reg;
1da177e4
LT		 848
849 pci_set_master(pdev);
850
6dd62ab0 851 err = -ENOMEM;
1da177e4 852 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 853 if (!netdev)
1da177e4 854 goto err_alloc_etherdev;
1da177e4 855
1da177e4
LT		 856 SET_NETDEV_DEV(netdev, &pdev->dev);
857
858 pci_set_drvdata(pdev, netdev);
60490fe0 859 adapter = netdev_priv(netdev);
1da177e4
LT		 860 adapter->netdev = netdev;
861 adapter->pdev = pdev;
1da177e4 862 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 863 adapter->bars = bars;
864 adapter->need_ioport = need_ioport;
1da177e4 865
1dc32918
JP		 866 hw = &adapter->hw;
867 hw->back = adapter;
868
6dd62ab0 869 err = -EIO;
275f165f 870 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 871 if (!hw->hw_addr)
1da177e4 872 goto err_ioremap;
1da177e4 873
81250297
TI		 874 if (adapter->need_ioport) {
875 for (i = BAR_1; i <= BAR_5; i++) {
876 if (pci_resource_len(pdev, i) == 0)
877 continue;
878 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
879 hw->io_base = pci_resource_start(pdev, i);
880 break;
881 }
1da177e4
LT		 882 }
883 }
884
0e7614bc 885 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 886 e1000_set_ethtool_ops(netdev);
1da177e4 887 netdev->watchdog_timeo = 5 * HZ;
bea3348e 888 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 889
0eb5a34c 890 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 891
1da177e4
LT		 892 adapter->bd_number = cards_found;
893
894 /* setup the private structure */
895
c7be73bc
JP		 896 err = e1000_sw_init(adapter);
897 if (err)
1da177e4
LT		 898 goto err_sw_init;
899
6dd62ab0 900 err = -EIO;
2d7edb92 901
1dc32918 902 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 903 netdev->features = NETIF_F_SG |
904 NETIF_F_HW_CSUM |
905 NETIF_F_HW_VLAN_TX |
906 NETIF_F_HW_VLAN_RX |
907 NETIF_F_HW_VLAN_FILTER;
908 }
909
1dc32918
JP		 910 if ((hw->mac_type >= e1000_82544) &&
911 (hw->mac_type != e1000_82547))
1da177e4 912 netdev->features |= NETIF_F_TSO;
2d7edb92 913
96838a40 914 if (pci_using_dac)
1da177e4
LT		 915 netdev->features |= NETIF_F_HIGHDMA;
916
20501a69 917 netdev->vlan_features |= NETIF_F_TSO;
20501a69
PM		 918 netdev->vlan_features |= NETIF_F_HW_CSUM;
919 netdev->vlan_features |= NETIF_F_SG;
920
1dc32918 921 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 922
cd94dd0b 923 /* initialize eeprom parameters */
1dc32918 924 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 925 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 926 goto err_eeprom;
cd94dd0b
AK		 927 }
928
96838a40 929 /* before reading the EEPROM, reset the controller to
1da177e4 930 * put the device in a known good starting state */
96838a40 931
1dc32918 932 e1000_reset_hw(hw);
1da177e4
LT		 933
934 /* make sure the EEPROM is good */
1dc32918 935 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 936 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 937 e1000_dump_eeprom(adapter);
938 /*
939 * set MAC address to all zeroes to invalidate and temporary
940 * disable this device for the user. This blocks regular
941 * traffic while still permitting ethtool ioctls from reaching
942 * the hardware as well as allowing the user to run the
943 * interface after manually setting a hw addr using
944 * `ip set address`
945 */
1dc32918 946 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 947 } else {
948 /* copy the MAC address out of the EEPROM */
1dc32918 949 if (e1000_read_mac_addr(hw))
67b3c27c 950 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 951 }
67b3c27c 952 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 953 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
954 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 955
67b3c27c 956 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 957 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 958
1dc32918 959 e1000_get_bus_info(hw);
1da177e4
LT		 960
961 init_timer(&adapter->tx_fifo_stall_timer);
962 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 963 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 964
965 init_timer(&adapter->watchdog_timer);
966 adapter->watchdog_timer.function = &e1000_watchdog;
967 adapter->watchdog_timer.data = (unsigned long) adapter;
968
1da177e4
LT		 969 init_timer(&adapter->phy_info_timer);
970 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 971 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 972
65f27f38 973 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 974
1da177e4
LT		 975 e1000_check_options(adapter);
976
977 /* Initial Wake on LAN setting
978 * If APM wake is enabled in the EEPROM,
979 * enable the ACPI Magic Packet filter
980 */
981
1dc32918 982 switch (hw->mac_type) {
1da177e4
LT		 983 case e1000_82542_rev2_0:
984 case e1000_82542_rev2_1:
985 case e1000_82543:
986 break;
987 case e1000_82544:
1dc32918 988 e1000_read_eeprom(hw,
1da177e4
LT		 989 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
990 eeprom_apme_mask = E1000_EEPROM_82544_APM;
991 break;
992 case e1000_82546:
993 case e1000_82546_rev_3:
1dc32918
JP		 994 if (er32(STATUS) & E1000_STATUS_FUNC_1){
995 e1000_read_eeprom(hw,
1da177e4
LT		 996 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
997 break;
998 }
999 /* Fall Through */
1000 default:
1dc32918 1001 e1000_read_eeprom(hw,
1da177e4
LT		 1002 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1003 break;
1004 }
96838a40 1005 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1006 adapter->eeprom_wol |= E1000_WUFC_MAG;
1007
1008 /* now that we have the eeprom settings, apply the special cases
1009 * where the eeprom may be wrong or the board simply won't support
1010 * wake on lan on a particular port */
1011 switch (pdev->device) {
1012 case E1000_DEV_ID_82546GB_PCIE:
1013 adapter->eeprom_wol = 0;
1014 break;
1015 case E1000_DEV_ID_82546EB_FIBER:
1016 case E1000_DEV_ID_82546GB_FIBER:
120cd576
JB		 1017 /* Wake events only supported on port A for dual fiber
1018 * regardless of eeprom setting */
1dc32918 1019 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1020 adapter->eeprom_wol = 0;
1021 break;
1022 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1023 /* if quad port adapter, disable WoL on all but port A */
1024 if (global_quad_port_a != 0)
1025 adapter->eeprom_wol = 0;
1026 else
1027 adapter->quad_port_a = 1;
1028 /* Reset for multiple quad port adapters */
1029 if (++global_quad_port_a == 4)
1030 global_quad_port_a = 0;
1031 break;
1032 }
1033
1034 /* initialize the wol settings based on the eeprom settings */
1035 adapter->wol = adapter->eeprom_wol;
de126489 1036 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1037
fb3d47d4 1038 /* print bus type/speed/width info */
fb3d47d4 1039 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1532ecea
JB		 1040 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1041 ((hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
fb3d47d4
JK		 1042 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1043 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1044 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1532ecea 1045 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" : "32-bit"));
fb3d47d4 1046
e174961c 1047 printk("%pM\n", netdev->dev_addr);
fb3d47d4 1048
1da177e4
LT		 1049 /* reset the hardware with the new settings */
1050 e1000_reset(adapter);
1051
416b5d10 1052 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1053 err = register_netdev(netdev);
1054 if (err)
416b5d10 1055 goto err_register;
1314bbf3 1056
eb62efd2
JB		 1057 /* carrier off reporting is important to ethtool even BEFORE open */
1058 netif_carrier_off(netdev);
1059
1da177e4
LT		 1060 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1061
1062 cards_found++;
1063 return 0;
1064
1065err_register:
6dd62ab0 1066err_eeprom:
1532ecea 1067 e1000_phy_hw_reset(hw);
6dd62ab0 1068
1dc32918
JP		 1069 if (hw->flash_address)
1070 iounmap(hw->flash_address);
6dd62ab0
VA		 1071 kfree(adapter->tx_ring);
1072 kfree(adapter->rx_ring);
1da177e4 1073err_sw_init:
1dc32918 1074 iounmap(hw->hw_addr);
1da177e4
LT		 1075err_ioremap:
1076 free_netdev(netdev);
1077err_alloc_etherdev:
81250297 1078 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1079err_pci_reg:
1080err_dma:
1081 pci_disable_device(pdev);
1da177e4
LT		 1082 return err;
1083}
1084
1085/**
1086 * e1000_remove - Device Removal Routine
1087 * @pdev: PCI device information struct
1088 *
1089 * e1000_remove is called by the PCI subsystem to alert the driver
1090 * that it should release a PCI device. The could be caused by a
1091 * Hot-Plug event, or because the driver is going to be removed from
1092 * memory.
1093 **/
1094
64798845 1095static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1096{
1097 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1098 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1099 struct e1000_hw *hw = &adapter->hw;
1da177e4 1100
28e53bdd 1101 cancel_work_sync(&adapter->reset_task);
be2b28ed 1102
0fccd0e9 1103 e1000_release_manageability(adapter);
1da177e4 1104
bea3348e
SH		 1105 unregister_netdev(netdev);
1106
1532ecea 1107 e1000_phy_hw_reset(hw);
1da177e4 1108
24025e4e
MC		 1109 kfree(adapter->tx_ring);
1110 kfree(adapter->rx_ring);
24025e4e 1111
1dc32918
JP		 1112 iounmap(hw->hw_addr);
1113 if (hw->flash_address)
1114 iounmap(hw->flash_address);
81250297 1115 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1116
1117 free_netdev(netdev);
1118
1119 pci_disable_device(pdev);
1120}
1121
1122/**
1123 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1124 * @adapter: board private structure to initialize
1125 *
1126 * e1000_sw_init initializes the Adapter private data structure.
1127 * Fields are initialized based on PCI device information and
1128 * OS network device settings (MTU size).
1129 **/
1130
64798845 1131static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1132{
1133 struct e1000_hw *hw = &adapter->hw;
1134 struct net_device *netdev = adapter->netdev;
1135 struct pci_dev *pdev = adapter->pdev;
1136
1137 /* PCI config space info */
1138
1139 hw->vendor_id = pdev->vendor;
1140 hw->device_id = pdev->device;
1141 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1142 hw->subsystem_id = pdev->subsystem_device;
44c10138 1143 hw->revision_id = pdev->revision;
1da177e4
LT		 1144
1145 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1146
eb0f8054 1147 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1148 hw->max_frame_size = netdev->mtu +
1149 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1150 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1151
1152 /* identify the MAC */
1153
96838a40 1154 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1155 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1156 return -EIO;
1157 }
1158
96838a40 1159 switch (hw->mac_type) {
1da177e4
LT		 1160 default:
1161 break;
1162 case e1000_82541:
1163 case e1000_82547:
1164 case e1000_82541_rev_2:
1165 case e1000_82547_rev_2:
1166 hw->phy_init_script = 1;
1167 break;
1168 }
1169
1170 e1000_set_media_type(hw);
1171
c3033b01
JP		 1172 hw->wait_autoneg_complete = false;
1173 hw->tbi_compatibility_en = true;
1174 hw->adaptive_ifs = true;
1da177e4
LT		 1175
1176 /* Copper options */
1177
96838a40 1178 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1179 hw->mdix = AUTO_ALL_MODES;
c3033b01 1180 hw->disable_polarity_correction = false;
1da177e4
LT		 1181 hw->master_slave = E1000_MASTER_SLAVE;
1182 }
1183
f56799ea
JK		 1184 adapter->num_tx_queues = 1;
1185 adapter->num_rx_queues = 1;
581d708e
MC		 1186
1187 if (e1000_alloc_queues(adapter)) {
1188 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1189 return -ENOMEM;
1190 }
1191
47313054 1192 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1193 e1000_irq_disable(adapter);
1194
1da177e4 1195 spin_lock_init(&adapter->stats_lock);
1da177e4 1196
1314bbf3
AK		 1197 set_bit(__E1000_DOWN, &adapter->flags);
1198
1da177e4
LT		 1199 return 0;
1200}
1201
581d708e
MC		 1202/**
1203 * e1000_alloc_queues - Allocate memory for all rings
1204 * @adapter: board private structure to initialize
1205 *
1206 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1207 * number of queues at compile-time.
581d708e
MC		 1208 **/
1209
64798845 1210static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1211{
1c7e5b12
YB		 1212 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1213 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1214 if (!adapter->tx_ring)
1215 return -ENOMEM;
581d708e 1216
1c7e5b12
YB		 1217 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1218 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1219 if (!adapter->rx_ring) {
1220 kfree(adapter->tx_ring);
1221 return -ENOMEM;
1222 }
581d708e 1223
581d708e
MC		 1224 return E1000_SUCCESS;
1225}
1226
1da177e4
LT		 1227/**
1228 * e1000_open - Called when a network interface is made active
1229 * @netdev: network interface device structure
1230 *
1231 * Returns 0 on success, negative value on failure
1232 *
1233 * The open entry point is called when a network interface is made
1234 * active by the system (IFF_UP). At this point all resources needed
1235 * for transmit and receive operations are allocated, the interrupt
1236 * handler is registered with the OS, the watchdog timer is started,
1237 * and the stack is notified that the interface is ready.
1238 **/
1239
64798845 1240static int e1000_open(struct net_device *netdev)
1da177e4 1241{
60490fe0 1242 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1243 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1244 int err;
1245
2db10a08 1246 /* disallow open during test */
1314bbf3 1247 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1248 return -EBUSY;
1249
eb62efd2
JB		 1250 netif_carrier_off(netdev);
1251
1da177e4 1252 /* allocate transmit descriptors */
e0aac5a2
AK		 1253 err = e1000_setup_all_tx_resources(adapter);
1254 if (err)
1da177e4
LT		 1255 goto err_setup_tx;
1256
1257 /* allocate receive descriptors */
e0aac5a2 1258 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1259 if (err)
e0aac5a2 1260 goto err_setup_rx;
b5bf28cd 1261
79f05bf0
AK		 1262 e1000_power_up_phy(adapter);
1263
2d7edb92 1264 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1265 if ((hw->mng_cookie.status &
2d7edb92
MC		 1266 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1267 e1000_update_mng_vlan(adapter);
1268 }
1da177e4 1269
e0aac5a2
AK		 1270 /* before we allocate an interrupt, we must be ready to handle it.
1271 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1272 * as soon as we call pci_request_irq, so we have to setup our
1273 * clean_rx handler before we do so. */
1274 e1000_configure(adapter);
1275
1276 err = e1000_request_irq(adapter);
1277 if (err)
1278 goto err_req_irq;
1279
1280 /* From here on the code is the same as e1000_up() */
1281 clear_bit(__E1000_DOWN, &adapter->flags);
1282
bea3348e 1283 napi_enable(&adapter->napi);
47313054 1284
e0aac5a2
AK		 1285 e1000_irq_enable(adapter);
1286
076152d5
BH		 1287 netif_start_queue(netdev);
1288
e0aac5a2 1289 /* fire a link status change interrupt to start the watchdog */
1dc32918 1290 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1291
1da177e4
LT		 1292 return E1000_SUCCESS;
1293
b5bf28cd 1294err_req_irq:
e0aac5a2 1295 e1000_power_down_phy(adapter);
581d708e 1296 e1000_free_all_rx_resources(adapter);
1da177e4 1297err_setup_rx:
581d708e 1298 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1299err_setup_tx:
1300 e1000_reset(adapter);
1301
1302 return err;
1303}
1304
1305/**
1306 * e1000_close - Disables a network interface
1307 * @netdev: network interface device structure
1308 *
1309 * Returns 0, this is not allowed to fail
1310 *
1311 * The close entry point is called when an interface is de-activated
1312 * by the OS. The hardware is still under the drivers control, but
1313 * needs to be disabled. A global MAC reset is issued to stop the
1314 * hardware, and all transmit and receive resources are freed.
1315 **/
1316
64798845 1317static int e1000_close(struct net_device *netdev)
1da177e4 1318{
60490fe0 1319 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1320 struct e1000_hw *hw = &adapter->hw;
1da177e4 1321
2db10a08 1322 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1323 e1000_down(adapter);
79f05bf0 1324 e1000_power_down_phy(adapter);
2db10a08 1325 e1000_free_irq(adapter);
1da177e4 1326
581d708e
MC		 1327 e1000_free_all_tx_resources(adapter);
1328 e1000_free_all_rx_resources(adapter);
1da177e4 1329
4666560a
BA		 1330 /* kill manageability vlan ID if supported, but not if a vlan with
1331 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1332 if ((hw->mng_cookie.status &
4666560a
BA		 1333 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1334 !(adapter->vlgrp &&
5c15bdec 1335 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1336 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1337 }
b55ccb35 1338
1da177e4
LT		 1339 return 0;
1340}
1341
1342/**
1343 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1344 * @adapter: address of board private structure
2d7edb92
MC		 1345 * @start: address of beginning of memory
1346 * @len: length of memory
1da177e4 1347 **/
64798845
JP		 1348static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1349 unsigned long len)
1da177e4 1350{
1dc32918 1351 struct e1000_hw *hw = &adapter->hw;
e982f17c 1352 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1353 unsigned long end = begin + len;
1354
2648345f
MC		 1355 /* First rev 82545 and 82546 need to not allow any memory
1356 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1357 if (hw->mac_type == e1000_82545 ||
1358 hw->mac_type == e1000_82546) {
c3033b01 1359 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1360 }
1361
c3033b01 1362 return true;
1da177e4
LT		 1363}
1364
1365/**
1366 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1367 * @adapter: board private structure
581d708e 1368 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1369 *
1370 * Return 0 on success, negative on failure
1371 **/
1372
64798845
JP		 1373static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1374 struct e1000_tx_ring *txdr)
1da177e4 1375{
1da177e4
LT		 1376 struct pci_dev *pdev = adapter->pdev;
1377 int size;
1378
1379 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1380 txdr->buffer_info = vmalloc(size);
96838a40 1381 if (!txdr->buffer_info) {
2648345f
MC		 1382 DPRINTK(PROBE, ERR,
1383 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1384 return -ENOMEM;
1385 }
1386 memset(txdr->buffer_info, 0, size);
1387
1388 /* round up to nearest 4K */
1389
1390 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1391 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1392
1393 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1394 if (!txdr->desc) {
1da177e4 1395setup_tx_desc_die:
1da177e4 1396 vfree(txdr->buffer_info);
2648345f
MC		 1397 DPRINTK(PROBE, ERR,
1398 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1399 return -ENOMEM;
1400 }
1401
2648345f 1402 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1403 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1404 void *olddesc = txdr->desc;
1405 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1406 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1407 "at %p\n", txdr->size, txdr->desc);
1408 /* Try again, without freeing the previous */
1da177e4 1409 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1410 /* Failed allocation, critical failure */
96838a40 1411 if (!txdr->desc) {
1da177e4
LT		 1412 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1413 goto setup_tx_desc_die;
1414 }
1415
1416 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1417 /* give up */
2648345f
MC		 1418 pci_free_consistent(pdev, txdr->size, txdr->desc,
1419 txdr->dma);
1da177e4
LT		 1420 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1421 DPRINTK(PROBE, ERR,
2648345f
MC		 1422 "Unable to allocate aligned memory "
1423 "for the transmit descriptor ring\n");
1da177e4
LT		 1424 vfree(txdr->buffer_info);
1425 return -ENOMEM;
1426 } else {
2648345f 1427 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1428 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1429 }
1430 }
1431 memset(txdr->desc, 0, txdr->size);
1432
1433 txdr->next_to_use = 0;
1434 txdr->next_to_clean = 0;
1435
1436 return 0;
1437}
1438
581d708e
MC		 1439/**
1440 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1441 * (Descriptors) for all queues
1442 * @adapter: board private structure
1443 *
581d708e
MC		 1444 * Return 0 on success, negative on failure
1445 **/
1446
64798845 1447int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1448{
1449 int i, err = 0;
1450
f56799ea 1451 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1452 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1453 if (err) {
1454 DPRINTK(PROBE, ERR,
1455 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1456 for (i-- ; i >= 0; i--)
1457 e1000_free_tx_resources(adapter,
1458 &adapter->tx_ring[i]);
581d708e
MC		 1459 break;
1460 }
1461 }
1462
1463 return err;
1464}
1465
1da177e4
LT		 1466/**
1467 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1468 * @adapter: board private structure
1469 *
1470 * Configure the Tx unit of the MAC after a reset.
1471 **/
1472
64798845 1473static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1474{
406874a7 1475 u64 tdba;
581d708e 1476 struct e1000_hw *hw = &adapter->hw;
1532ecea 1477 u32 tdlen, tctl, tipg;
406874a7 1478 u32 ipgr1, ipgr2;
1da177e4
LT		 1479
1480 /* Setup the HW Tx Head and Tail descriptor pointers */
1481
f56799ea 1482 switch (adapter->num_tx_queues) {
24025e4e
MC		 1483 case 1:
1484 default:
581d708e
MC		 1485 tdba = adapter->tx_ring[0].dma;
1486 tdlen = adapter->tx_ring[0].count *
1487 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1488 ew32(TDLEN, tdlen);
1489 ew32(TDBAH, (tdba >> 32));
1490 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1491 ew32(TDT, 0);
1492 ew32(TDH, 0);
6a951698
AK		 1493 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1494 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1495 break;
1496 }
1da177e4
LT		 1497
1498 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1499 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1500 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1501 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1502 else
1503 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1504
581d708e 1505 switch (hw->mac_type) {
1da177e4
LT		 1506 case e1000_82542_rev2_0:
1507 case e1000_82542_rev2_1:
1508 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1509 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1510 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1511 break;
1512 default:
0fadb059
JK		 1513 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1514 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1515 break;
1da177e4 1516 }
0fadb059
JK		 1517 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1518 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1519 ew32(TIPG, tipg);
1da177e4
LT		 1520
1521 /* Set the Tx Interrupt Delay register */
1522
1dc32918 1523 ew32(TIDV, adapter->tx_int_delay);
581d708e 1524 if (hw->mac_type >= e1000_82540)
1dc32918 1525 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1526
1527 /* Program the Transmit Control Register */
1528
1dc32918 1529 tctl = er32(TCTL);
1da177e4 1530 tctl &= ~E1000_TCTL_CT;
7e6c9861 1531 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1532 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1533
581d708e 1534 e1000_config_collision_dist(hw);
1da177e4
LT		 1535
1536 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1537 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1538
1539 /* only set IDE if we are delaying interrupts using the timers */
1540 if (adapter->tx_int_delay)
1541 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1542
581d708e 1543 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1544 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1545 else
1546 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1547
1548 /* Cache if we're 82544 running in PCI-X because we'll
1549 * need this to apply a workaround later in the send path. */
581d708e
MC		 1550 if (hw->mac_type == e1000_82544 &&
1551 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1552 adapter->pcix_82544 = 1;
7e6c9861 1553
1dc32918 1554 ew32(TCTL, tctl);
7e6c9861 1555
1da177e4
LT		 1556}
1557
1558/**
1559 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1560 * @adapter: board private structure
581d708e 1561 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1562 *
1563 * Returns 0 on success, negative on failure
1564 **/
1565
64798845
JP		 1566static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1567 struct e1000_rx_ring *rxdr)
1da177e4 1568{
1da177e4 1569 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1570 int size, desc_len;
1da177e4
LT		 1571
1572 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1573 rxdr->buffer_info = vmalloc(size);
581d708e 1574 if (!rxdr->buffer_info) {
2648345f
MC		 1575 DPRINTK(PROBE, ERR,
1576 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1577 return -ENOMEM;
1578 }
1579 memset(rxdr->buffer_info, 0, size);
1580
1532ecea 1581 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1582
1da177e4
LT		 1583 /* Round up to nearest 4K */
1584
2d7edb92 1585 rxdr->size = rxdr->count * desc_len;
9099cfb9 1586 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1587
1588 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1589
581d708e
MC		 1590 if (!rxdr->desc) {
1591 DPRINTK(PROBE, ERR,
1592 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1593setup_rx_desc_die:
1da177e4
LT		 1594 vfree(rxdr->buffer_info);
1595 return -ENOMEM;
1596 }
1597
2648345f 1598 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1599 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1600 void *olddesc = rxdr->desc;
1601 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1602 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1603 "at %p\n", rxdr->size, rxdr->desc);
1604 /* Try again, without freeing the previous */
1da177e4 1605 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1606 /* Failed allocation, critical failure */
581d708e 1607 if (!rxdr->desc) {
1da177e4 1608 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1609 DPRINTK(PROBE, ERR,
1610 "Unable to allocate memory "
1611 "for the receive descriptor ring\n");
1da177e4
LT		 1612 goto setup_rx_desc_die;
1613 }
1614
1615 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1616 /* give up */
2648345f
MC		 1617 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1618 rxdr->dma);
1da177e4 1619 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1620 DPRINTK(PROBE, ERR,
1621 "Unable to allocate aligned memory "
1622 "for the receive descriptor ring\n");
581d708e 1623 goto setup_rx_desc_die;
1da177e4 1624 } else {
2648345f 1625 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1626 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1627 }
1628 }
1629 memset(rxdr->desc, 0, rxdr->size);
1630
1631 rxdr->next_to_clean = 0;
1632 rxdr->next_to_use = 0;
edbbb3ca 1633 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1634
1635 return 0;
1636}
1637
581d708e
MC		 1638/**
1639 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1640 * (Descriptors) for all queues
1641 * @adapter: board private structure
1642 *
581d708e
MC		 1643 * Return 0 on success, negative on failure
1644 **/
1645
64798845 1646int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1647{
1648 int i, err = 0;
1649
f56799ea 1650 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1651 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1652 if (err) {
1653 DPRINTK(PROBE, ERR,
1654 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1655 for (i-- ; i >= 0; i--)
1656 e1000_free_rx_resources(adapter,
1657 &adapter->rx_ring[i]);
581d708e
MC		 1658 break;
1659 }
1660 }
1661
1662 return err;
1663}
1664
1da177e4 1665/**
2648345f 1666 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1667 * @adapter: Board private structure
1668 **/
64798845 1669static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1670{
1dc32918 1671 struct e1000_hw *hw = &adapter->hw;
630b25cd 1672 u32 rctl;
1da177e4 1673
1dc32918 1674 rctl = er32(RCTL);
1da177e4
LT		 1675
1676 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1677
1678 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1679 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1680 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1681
1dc32918 1682 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1683 rctl |= E1000_RCTL_SBP;
1684 else
1685 rctl &= ~E1000_RCTL_SBP;
1686
2d7edb92
MC		 1687 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1688 rctl &= ~E1000_RCTL_LPE;
1689 else
1690 rctl |= E1000_RCTL_LPE;
1691
1da177e4 1692 /* Setup buffer sizes */
9e2feace
AK		 1693 rctl &= ~E1000_RCTL_SZ_4096;
1694 rctl |= E1000_RCTL_BSEX;
1695 switch (adapter->rx_buffer_len) {
1696 case E1000_RXBUFFER_256:
1697 rctl |= E1000_RCTL_SZ_256;
1698 rctl &= ~E1000_RCTL_BSEX;
1699 break;
1700 case E1000_RXBUFFER_512:
1701 rctl |= E1000_RCTL_SZ_512;
1702 rctl &= ~E1000_RCTL_BSEX;
1703 break;
1704 case E1000_RXBUFFER_1024:
1705 rctl |= E1000_RCTL_SZ_1024;
1706 rctl &= ~E1000_RCTL_BSEX;
1707 break;
a1415ee6
JK		 1708 case E1000_RXBUFFER_2048:
1709 default:
1710 rctl |= E1000_RCTL_SZ_2048;
1711 rctl &= ~E1000_RCTL_BSEX;
1712 break;
1713 case E1000_RXBUFFER_4096:
1714 rctl |= E1000_RCTL_SZ_4096;
1715 break;
1716 case E1000_RXBUFFER_8192:
1717 rctl |= E1000_RCTL_SZ_8192;
1718 break;
1719 case E1000_RXBUFFER_16384:
1720 rctl |= E1000_RCTL_SZ_16384;
1721 break;
2d7edb92
MC		 1722 }
1723
1dc32918 1724 ew32(RCTL, rctl);
1da177e4
LT		 1725}
1726
1727/**
1728 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1729 * @adapter: board private structure
1730 *
1731 * Configure the Rx unit of the MAC after a reset.
1732 **/
1733
64798845 1734static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1735{
406874a7 1736 u64 rdba;
581d708e 1737 struct e1000_hw *hw = &adapter->hw;
1532ecea 1738 u32 rdlen, rctl, rxcsum;
2d7edb92 1739
edbbb3ca
JB		 1740 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1741 rdlen = adapter->rx_ring[0].count *
1742 sizeof(struct e1000_rx_desc);
1743 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1744 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1745 } else {
1746 rdlen = adapter->rx_ring[0].count *
1747 sizeof(struct e1000_rx_desc);
1748 adapter->clean_rx = e1000_clean_rx_irq;
1749 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1750 }
1da177e4
LT		 1751
1752 /* disable receives while setting up the descriptors */
1dc32918
JP		 1753 rctl = er32(RCTL);
1754 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1755
1756 /* set the Receive Delay Timer Register */
1dc32918 1757 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1758
581d708e 1759 if (hw->mac_type >= e1000_82540) {
1dc32918 1760 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1761 if (adapter->itr_setting != 0)
1dc32918 1762 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1763 }
1764
581d708e
MC		 1765 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1766 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1767 switch (adapter->num_rx_queues) {
24025e4e
MC		 1768 case 1:
1769 default:
581d708e 1770 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1771 ew32(RDLEN, rdlen);
1772 ew32(RDBAH, (rdba >> 32));
1773 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1774 ew32(RDT, 0);
1775 ew32(RDH, 0);
6a951698
AK		 1776 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1777 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1778 break;
24025e4e
MC		 1779 }
1780
1da177e4 1781 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1782 if (hw->mac_type >= e1000_82543) {
1dc32918 1783 rxcsum = er32(RXCSUM);
630b25cd 1784 if (adapter->rx_csum)
2d7edb92 1785 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1786 else
2d7edb92 1787 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1788 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1789 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1790 }
1791
1792 /* Enable Receives */
1dc32918 1793 ew32(RCTL, rctl);
1da177e4
LT		 1794}
1795
1796/**
581d708e 1797 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1798 * @adapter: board private structure
581d708e 1799 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1800 *
1801 * Free all transmit software resources
1802 **/
1803
64798845
JP		 1804static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1805 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1806{
1807 struct pci_dev *pdev = adapter->pdev;
1808
581d708e 1809 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1810
581d708e
MC		 1811 vfree(tx_ring->buffer_info);
1812 tx_ring->buffer_info = NULL;
1da177e4 1813
581d708e 1814 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1815
581d708e
MC		 1816 tx_ring->desc = NULL;
1817}
1818
1819/**
1820 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1821 * @adapter: board private structure
1822 *
1823 * Free all transmit software resources
1824 **/
1825
64798845 1826void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1827{
1828 int i;
1829
f56799ea 1830 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1831 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1832}
1833
64798845
JP		 1834static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1835 struct e1000_buffer *buffer_info)
1da177e4 1836{
d20b606c 1837 buffer_info->dma = 0;
a9ebadd6 1838 if (buffer_info->skb) {
d20b606c
JB		 1839 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
1840 DMA_TO_DEVICE);
1da177e4 1841 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1842 buffer_info->skb = NULL;
1843 }
37e73df8 1844 buffer_info->time_stamp = 0;
a9ebadd6 1845 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1846}
1847
1848/**
1849 * e1000_clean_tx_ring - Free Tx Buffers
1850 * @adapter: board private structure
581d708e 1851 * @tx_ring: ring to be cleaned
1da177e4
LT		 1852 **/
1853
64798845
JP		 1854static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1855 struct e1000_tx_ring *tx_ring)
1da177e4 1856{
1dc32918 1857 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1858 struct e1000_buffer *buffer_info;
1859 unsigned long size;
1860 unsigned int i;
1861
1862 /* Free all the Tx ring sk_buffs */
1863
96838a40 1864 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1865 buffer_info = &tx_ring->buffer_info[i];
1866 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1867 }
1868
1869 size = sizeof(struct e1000_buffer) * tx_ring->count;
1870 memset(tx_ring->buffer_info, 0, size);
1871
1872 /* Zero out the descriptor ring */
1873
1874 memset(tx_ring->desc, 0, tx_ring->size);
1875
1876 tx_ring->next_to_use = 0;
1877 tx_ring->next_to_clean = 0;
fd803241 1878 tx_ring->last_tx_tso = 0;
1da177e4 1879
1dc32918
JP		 1880 writel(0, hw->hw_addr + tx_ring->tdh);
1881 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 1882}
1883
1884/**
1885 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1886 * @adapter: board private structure
1887 **/
1888
64798845 1889static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 1890{
1891 int i;
1892
f56799ea 1893 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1894 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1895}
1896
1897/**
1898 * e1000_free_rx_resources - Free Rx Resources
1899 * @adapter: board private structure
581d708e 1900 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1901 *
1902 * Free all receive software resources
1903 **/
1904
64798845
JP		 1905static void e1000_free_rx_resources(struct e1000_adapter *adapter,
1906 struct e1000_rx_ring *rx_ring)
1da177e4 1907{
1da177e4
LT		 1908 struct pci_dev *pdev = adapter->pdev;
1909
581d708e 1910 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1911
1912 vfree(rx_ring->buffer_info);
1913 rx_ring->buffer_info = NULL;
1914
1915 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1916
1917 rx_ring->desc = NULL;
1918}
1919
1920/**
581d708e 1921 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1922 * @adapter: board private structure
581d708e
MC		 1923 *
1924 * Free all receive software resources
1925 **/
1926
64798845 1927void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1928{
1929 int i;
1930
f56799ea 1931 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1932 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1933}
1934
1935/**
1936 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1937 * @adapter: board private structure
1938 * @rx_ring: ring to free buffers from
1da177e4
LT		 1939 **/
1940
64798845
JP		 1941static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
1942 struct e1000_rx_ring *rx_ring)
1da177e4 1943{
1dc32918 1944 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1945 struct e1000_buffer *buffer_info;
1946 struct pci_dev *pdev = adapter->pdev;
1947 unsigned long size;
630b25cd 1948 unsigned int i;
1da177e4
LT		 1949
1950 /* Free all the Rx ring sk_buffs */
96838a40 1951 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1952 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB		 1953 if (buffer_info->dma &&
1954 adapter->clean_rx == e1000_clean_rx_irq) {
1955 pci_unmap_single(pdev, buffer_info->dma,
1956 buffer_info->length,
1957 PCI_DMA_FROMDEVICE);
1958 } else if (buffer_info->dma &&
1959 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
1960 pci_unmap_page(pdev, buffer_info->dma,
1961 buffer_info->length,
1962 PCI_DMA_FROMDEVICE);
679be3ba 1963 }
1da177e4 1964
679be3ba 1965 buffer_info->dma = 0;
edbbb3ca
JB		 1966 if (buffer_info->page) {
1967 put_page(buffer_info->page);
1968 buffer_info->page = NULL;
1969 }
679be3ba 1970 if (buffer_info->skb) {
1da177e4
LT		 1971 dev_kfree_skb(buffer_info->skb);
1972 buffer_info->skb = NULL;
997f5cbd 1973 }
1da177e4
LT		 1974 }
1975
edbbb3ca
JB		 1976 /* there also may be some cached data from a chained receive */
1977 if (rx_ring->rx_skb_top) {
1978 dev_kfree_skb(rx_ring->rx_skb_top);
1979 rx_ring->rx_skb_top = NULL;
1980 }
1981
1da177e4
LT		 1982 size = sizeof(struct e1000_buffer) * rx_ring->count;
1983 memset(rx_ring->buffer_info, 0, size);
1984
1985 /* Zero out the descriptor ring */
1da177e4
LT		 1986 memset(rx_ring->desc, 0, rx_ring->size);
1987
1988 rx_ring->next_to_clean = 0;
1989 rx_ring->next_to_use = 0;
1990
1dc32918
JP		 1991 writel(0, hw->hw_addr + rx_ring->rdh);
1992 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 1993}
1994
1995/**
1996 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
1997 * @adapter: board private structure
1998 **/
1999
64798845 2000static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2001{
2002 int i;
2003
f56799ea 2004 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2005 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2006}
2007
2008/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2009 * and memory write and invalidate disabled for certain operations
2010 */
64798845 2011static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2012{
1dc32918 2013 struct e1000_hw *hw = &adapter->hw;
1da177e4 2014 struct net_device *netdev = adapter->netdev;
406874a7 2015 u32 rctl;
1da177e4 2016
1dc32918 2017 e1000_pci_clear_mwi(hw);
1da177e4 2018
1dc32918 2019 rctl = er32(RCTL);
1da177e4 2020 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2021 ew32(RCTL, rctl);
2022 E1000_WRITE_FLUSH();
1da177e4
LT		 2023 mdelay(5);
2024
96838a40 2025 if (netif_running(netdev))
581d708e 2026 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2027}
2028
64798845 2029static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2030{
1dc32918 2031 struct e1000_hw *hw = &adapter->hw;
1da177e4 2032 struct net_device *netdev = adapter->netdev;
406874a7 2033 u32 rctl;
1da177e4 2034
1dc32918 2035 rctl = er32(RCTL);
1da177e4 2036 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2037 ew32(RCTL, rctl);
2038 E1000_WRITE_FLUSH();
1da177e4
LT		 2039 mdelay(5);
2040
1dc32918
JP		 2041 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2042 e1000_pci_set_mwi(hw);
1da177e4 2043
96838a40 2044 if (netif_running(netdev)) {
72d64a43
JK		 2045 /* No need to loop, because 82542 supports only 1 queue */
2046 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2047 e1000_configure_rx(adapter);
72d64a43 2048 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2049 }
2050}
2051
2052/**
2053 * e1000_set_mac - Change the Ethernet Address of the NIC
2054 * @netdev: network interface device structure
2055 * @p: pointer to an address structure
2056 *
2057 * Returns 0 on success, negative on failure
2058 **/
2059
64798845 2060static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2061{
60490fe0 2062 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2063 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2064 struct sockaddr *addr = p;
2065
96838a40 2066 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2067 return -EADDRNOTAVAIL;
2068
2069 /* 82542 2.0 needs to be in reset to write receive address registers */
2070
1dc32918 2071 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2072 e1000_enter_82542_rst(adapter);
2073
2074 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2075 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2076
1dc32918 2077 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2078
1dc32918 2079 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2080 e1000_leave_82542_rst(adapter);
2081
2082 return 0;
2083}
2084
2085/**
db0ce50d 2086 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2087 * @netdev: network interface device structure
2088 *
db0ce50d
PM		 2089 * The set_rx_mode entry point is called whenever the unicast or multicast
2090 * address lists or the network interface flags are updated. This routine is
2091 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2092 * promiscuous mode, and all-multi behavior.
2093 **/
2094
64798845 2095static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2096{
60490fe0 2097 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2098 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2099 struct netdev_hw_addr *ha;
2100 bool use_uc = false;
db0ce50d 2101 struct dev_addr_list *mc_ptr;
406874a7
JP		 2102 u32 rctl;
2103 u32 hash_value;
868d5309 2104 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2105 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2106 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2107
2108 if (!mcarray) {
2109 DPRINTK(PROBE, ERR, "memory allocation failed\n");
2110 return;
2111 }
cd94dd0b 2112
2648345f
MC		 2113 /* Check for Promiscuous and All Multicast modes */
2114
1dc32918 2115 rctl = er32(RCTL);
1da177e4 2116
96838a40 2117 if (netdev->flags & IFF_PROMISC) {
1da177e4 2118 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2119 rctl &= ~E1000_RCTL_VFE;
1da177e4 2120 } else {
1532ecea 2121 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2122 rctl |= E1000_RCTL_MPE;
1532ecea 2123 else
746b9f02 2124 rctl &= ~E1000_RCTL_MPE;
1532ecea
JB		 2125 /* Enable VLAN filter if there is a VLAN */
2126 if (adapter->vlgrp)
2127 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2128 }
2129
31278e71 2130 if (netdev->uc.count > rar_entries - 1) {
db0ce50d
PM		 2131 rctl |= E1000_RCTL_UPE;
2132 } else if (!(netdev->flags & IFF_PROMISC)) {
2133 rctl &= ~E1000_RCTL_UPE;
ccffad25 2134 use_uc = true;
1da177e4
LT		 2135 }
2136
1dc32918 2137 ew32(RCTL, rctl);
1da177e4
LT		 2138
2139 /* 82542 2.0 needs to be in reset to write receive address registers */
2140
96838a40 2141 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2142 e1000_enter_82542_rst(adapter);
2143
db0ce50d
PM		 2144 /* load the first 14 addresses into the exact filters 1-14. Unicast
2145 * addresses take precedence to avoid disabling unicast filtering
2146 * when possible.
2147 *
1da177e4
LT		 2148 * RAR 0 is used for the station MAC adddress
2149 * if there are not 14 addresses, go ahead and clear the filters
2150 */
ccffad25
JP		 2151 i = 1;
2152 if (use_uc)
31278e71 2153 list_for_each_entry(ha, &netdev->uc.list, list) {
ccffad25
JP		 2154 if (i == rar_entries)
2155 break;
2156 e1000_rar_set(hw, ha->addr, i++);
2157 }
2158
2159 WARN_ON(i == rar_entries);
2160
1da177e4
LT		 2161 mc_ptr = netdev->mc_list;
2162
ccffad25
JP		 2163 for (; i < rar_entries; i++) {
2164 if (mc_ptr) {
db0ce50d 2165 e1000_rar_set(hw, mc_ptr->da_addr, i);
1da177e4
LT		 2166 mc_ptr = mc_ptr->next;
2167 } else {
2168 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
1dc32918 2169 E1000_WRITE_FLUSH();
1da177e4 2170 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
1dc32918 2171 E1000_WRITE_FLUSH();
1da177e4
LT		 2172 }
2173 }
2174
1da177e4
LT		 2175 /* load any remaining addresses into the hash table */
2176
96838a40 2177 for (; mc_ptr; mc_ptr = mc_ptr->next) {
81c52285 2178 u32 hash_reg, hash_bit, mta;
db0ce50d 2179 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
81c52285
JB		 2180 hash_reg = (hash_value >> 5) & 0x7F;
2181 hash_bit = hash_value & 0x1F;
2182 mta = (1 << hash_bit);
2183 mcarray[hash_reg] |= mta;
1da177e4
LT		 2184 }
2185
81c52285
JB		 2186 /* write the hash table completely, write from bottom to avoid
2187 * both stupid write combining chipsets, and flushing each write */
2188 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2189 /*
2190 * If we are on an 82544 has an errata where writing odd
2191 * offsets overwrites the previous even offset, but writing
2192 * backwards over the range solves the issue by always
2193 * writing the odd offset first
2194 */
2195 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2196 }
2197 E1000_WRITE_FLUSH();
2198
96838a40 2199 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2200 e1000_leave_82542_rst(adapter);
81c52285
JB		 2201
2202 kfree(mcarray);
1da177e4
LT		 2203}
2204
2205/* Need to wait a few seconds after link up to get diagnostic information from
2206 * the phy */
2207
64798845 2208static void e1000_update_phy_info(unsigned long data)
1da177e4 2209{
e982f17c 2210 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2211 struct e1000_hw *hw = &adapter->hw;
2212 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2213}
2214
2215/**
2216 * e1000_82547_tx_fifo_stall - Timer Call-back
2217 * @data: pointer to adapter cast into an unsigned long
2218 **/
2219
64798845 2220static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2221{
e982f17c 2222 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2223 struct e1000_hw *hw = &adapter->hw;
1da177e4 2224 struct net_device *netdev = adapter->netdev;
406874a7 2225 u32 tctl;
1da177e4 2226
96838a40 2227 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2228 if ((er32(TDT) == er32(TDH)) &&
2229 (er32(TDFT) == er32(TDFH)) &&
2230 (er32(TDFTS) == er32(TDFHS))) {
2231 tctl = er32(TCTL);
2232 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2233 ew32(TDFT, adapter->tx_head_addr);
2234 ew32(TDFH, adapter->tx_head_addr);
2235 ew32(TDFTS, adapter->tx_head_addr);
2236 ew32(TDFHS, adapter->tx_head_addr);
2237 ew32(TCTL, tctl);
2238 E1000_WRITE_FLUSH();
1da177e4
LT		 2239
2240 adapter->tx_fifo_head = 0;
2241 atomic_set(&adapter->tx_fifo_stall, 0);
2242 netif_wake_queue(netdev);
2243 } else {
2244 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2245 }
2246 }
2247}
2248
2249/**
2250 * e1000_watchdog - Timer Call-back
2251 * @data: pointer to adapter cast into an unsigned long
2252 **/
64798845 2253static void e1000_watchdog(unsigned long data)
1da177e4 2254{
e982f17c 2255 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2256 struct e1000_hw *hw = &adapter->hw;
1da177e4 2257 struct net_device *netdev = adapter->netdev;
545c67c0 2258 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2259 u32 link, tctl;
90fb5135 2260
1532ecea 2261 e1000_check_for_link(hw);
1da177e4 2262
1dc32918
JP		 2263 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2264 !(er32(TXCW) & E1000_TXCW_ANE))
2265 link = !hw->serdes_link_down;
1da177e4 2266 else
1dc32918 2267 link = er32(STATUS) & E1000_STATUS_LU;
1da177e4 2268
96838a40
JB		 2269 if (link) {
2270 if (!netif_carrier_ok(netdev)) {
406874a7 2271 u32 ctrl;
c3033b01 2272 bool txb2b = true;
1dc32918 2273 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2274 &adapter->link_speed,
2275 &adapter->link_duplex);
2276
1dc32918 2277 ctrl = er32(CTRL);
b30c4d8f
JK		 2278 printk(KERN_INFO "e1000: %s NIC Link is Up %d Mbps %s, "
2279 "Flow Control: %s\n",
2280 netdev->name,
2281 adapter->link_speed,
2282 adapter->link_duplex == FULL_DUPLEX ?
9669f53b
AK		 2283 "Full Duplex" : "Half Duplex",
2284 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2285 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2286 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2287 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2288
7e6c9861
JK		 2289 /* tweak tx_queue_len according to speed/duplex
2290 * and adjust the timeout factor */
66a2b0a3
JK		 2291 netdev->tx_queue_len = adapter->tx_queue_len;
2292 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2293 switch (adapter->link_speed) {
2294 case SPEED_10:
c3033b01 2295 txb2b = false;
7e6c9861
JK		 2296 netdev->tx_queue_len = 10;
2297 adapter->tx_timeout_factor = 8;
2298 break;
2299 case SPEED_100:
c3033b01 2300 txb2b = false;
7e6c9861
JK		 2301 netdev->tx_queue_len = 100;
2302 /* maybe add some timeout factor ? */
2303 break;
2304 }
2305
1532ecea 2306 /* enable transmits in the hardware */
1dc32918 2307 tctl = er32(TCTL);
7e6c9861 2308 tctl |= E1000_TCTL_EN;
1dc32918 2309 ew32(TCTL, tctl);
66a2b0a3 2310
1da177e4 2311 netif_carrier_on(netdev);
1532ecea
JB		 2312 mod_timer(&adapter->phy_info_timer,
2313 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2314 adapter->smartspeed = 0;
2315 }
2316 } else {
96838a40 2317 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2318 adapter->link_speed = 0;
2319 adapter->link_duplex = 0;
b30c4d8f
JK		 2320 printk(KERN_INFO "e1000: %s NIC Link is Down\n",
2321 netdev->name);
1da177e4 2322 netif_carrier_off(netdev);
1532ecea
JB		 2323 mod_timer(&adapter->phy_info_timer,
2324 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2325 }
2326
2327 e1000_smartspeed(adapter);
2328 }
2329
2330 e1000_update_stats(adapter);
2331
1dc32918 2332 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2333 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2334 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2335 adapter->colc_old = adapter->stats.colc;
2336
2337 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2338 adapter->gorcl_old = adapter->stats.gorcl;
2339 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2340 adapter->gotcl_old = adapter->stats.gotcl;
2341
1dc32918 2342 e1000_update_adaptive(hw);
1da177e4 2343
f56799ea 2344 if (!netif_carrier_ok(netdev)) {
581d708e 2345 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2346 /* We've lost link, so the controller stops DMA,
2347 * but we've got queued Tx work that's never going
2348 * to get done, so reset controller to flush Tx.
2349 * (Do the reset outside of interrupt context). */
87041639
JK		 2350 adapter->tx_timeout_count++;
2351 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 2352 /* return immediately since reset is imminent */
2353 return;
1da177e4
LT		 2354 }
2355 }
2356
1da177e4 2357 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2358 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2359
2648345f 2360 /* Force detection of hung controller every watchdog period */
c3033b01 2361 adapter->detect_tx_hung = true;
1da177e4
LT		 2362
2363 /* Reset the timer */
56e1393f 2364 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2365}
2366
835bb129
JB		 2367enum latency_range {
2368 lowest_latency = 0,
2369 low_latency = 1,
2370 bulk_latency = 2,
2371 latency_invalid = 255
2372};
2373
2374/**
2375 * e1000_update_itr - update the dynamic ITR value based on statistics
2376 * Stores a new ITR value based on packets and byte
2377 * counts during the last interrupt. The advantage of per interrupt
2378 * computation is faster updates and more accurate ITR for the current
2379 * traffic pattern. Constants in this function were computed
2380 * based on theoretical maximum wire speed and thresholds were set based
2381 * on testing data as well as attempting to minimize response time
2382 * while increasing bulk throughput.
2383 * this functionality is controlled by the InterruptThrottleRate module
2384 * parameter (see e1000_param.c)
2385 * @adapter: pointer to adapter
2386 * @itr_setting: current adapter->itr
2387 * @packets: the number of packets during this measurement interval
2388 * @bytes: the number of bytes during this measurement interval
2389 **/
2390static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2391 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2392{
2393 unsigned int retval = itr_setting;
2394 struct e1000_hw *hw = &adapter->hw;
2395
2396 if (unlikely(hw->mac_type < e1000_82540))
2397 goto update_itr_done;
2398
2399 if (packets == 0)
2400 goto update_itr_done;
2401
835bb129
JB		 2402 switch (itr_setting) {
2403 case lowest_latency:
2b65326e
JB		 2404 /* jumbo frames get bulk treatment*/
2405 if (bytes/packets > 8000)
2406 retval = bulk_latency;
2407 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2408 retval = low_latency;
2409 break;
2410 case low_latency: /* 50 usec aka 20000 ints/s */
2411 if (bytes > 10000) {
2b65326e
JB		 2412 /* jumbo frames need bulk latency setting */
2413 if (bytes/packets > 8000)
2414 retval = bulk_latency;
2415 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2416 retval = bulk_latency;
2417 else if ((packets > 35))
2418 retval = lowest_latency;
2b65326e
JB		 2419 } else if (bytes/packets > 2000)
2420 retval = bulk_latency;
2421 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2422 retval = lowest_latency;
2423 break;
2424 case bulk_latency: /* 250 usec aka 4000 ints/s */
2425 if (bytes > 25000) {
2426 if (packets > 35)
2427 retval = low_latency;
2b65326e
JB		 2428 } else if (bytes < 6000) {
2429 retval = low_latency;
835bb129
JB		 2430 }
2431 break;
2432 }
2433
2434update_itr_done:
2435 return retval;
2436}
2437
2438static void e1000_set_itr(struct e1000_adapter *adapter)
2439{
2440 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2441 u16 current_itr;
2442 u32 new_itr = adapter->itr;
835bb129
JB		 2443
2444 if (unlikely(hw->mac_type < e1000_82540))
2445 return;
2446
2447 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2448 if (unlikely(adapter->link_speed != SPEED_1000)) {
2449 current_itr = 0;
2450 new_itr = 4000;
2451 goto set_itr_now;
2452 }
2453
2454 adapter->tx_itr = e1000_update_itr(adapter,
2455 adapter->tx_itr,
2456 adapter->total_tx_packets,
2457 adapter->total_tx_bytes);
2b65326e
JB		 2458 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2459 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2460 adapter->tx_itr = low_latency;
2461
835bb129
JB		 2462 adapter->rx_itr = e1000_update_itr(adapter,
2463 adapter->rx_itr,
2464 adapter->total_rx_packets,
2465 adapter->total_rx_bytes);
2b65326e
JB		 2466 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2467 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2468 adapter->rx_itr = low_latency;
835bb129
JB		 2469
2470 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2471
835bb129
JB		 2472 switch (current_itr) {
2473 /* counts and packets in update_itr are dependent on these numbers */
2474 case lowest_latency:
2475 new_itr = 70000;
2476 break;
2477 case low_latency:
2478 new_itr = 20000; /* aka hwitr = ~200 */
2479 break;
2480 case bulk_latency:
2481 new_itr = 4000;
2482 break;
2483 default:
2484 break;
2485 }
2486
2487set_itr_now:
2488 if (new_itr != adapter->itr) {
2489 /* this attempts to bias the interrupt rate towards Bulk
2490 * by adding intermediate steps when interrupt rate is
2491 * increasing */
2492 new_itr = new_itr > adapter->itr ?
2493 min(adapter->itr + (new_itr >> 2), new_itr) :
2494 new_itr;
2495 adapter->itr = new_itr;
1dc32918 2496 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2497 }
2498
2499 return;
2500}
2501
1da177e4
LT		 2502#define E1000_TX_FLAGS_CSUM 0x00000001
2503#define E1000_TX_FLAGS_VLAN 0x00000002
2504#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2505#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2506#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2507#define E1000_TX_FLAGS_VLAN_SHIFT 16
2508
64798845
JP		 2509static int e1000_tso(struct e1000_adapter *adapter,
2510 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2511{
1da177e4 2512 struct e1000_context_desc *context_desc;
545c67c0 2513 struct e1000_buffer *buffer_info;
1da177e4 2514 unsigned int i;
406874a7
JP		 2515 u32 cmd_length = 0;
2516 u16 ipcse = 0, tucse, mss;
2517 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2518 int err;
2519
89114afd 2520 if (skb_is_gso(skb)) {
1da177e4
LT		 2521 if (skb_header_cloned(skb)) {
2522 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2523 if (err)
2524 return err;
2525 }
2526
ab6a5bb6 2527 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2528 mss = skb_shinfo(skb)->gso_size;
60828236 2529 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2530 struct iphdr *iph = ip_hdr(skb);
2531 iph->tot_len = 0;
2532 iph->check = 0;
aa8223c7
ACM		 2533 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2534 iph->daddr, 0,
2535 IPPROTO_TCP,
2536 0);
2d7edb92 2537 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2538 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2539 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2540 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2541 tcp_hdr(skb)->check =
0660e03f
ACM		 2542 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2543 &ipv6_hdr(skb)->daddr,
2544 0, IPPROTO_TCP, 0);
2d7edb92 2545 ipcse = 0;
2d7edb92 2546 }
bbe735e4 2547 ipcss = skb_network_offset(skb);
eddc9ec5 2548 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2549 tucss = skb_transport_offset(skb);
aa8223c7 2550 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2551 tucse = 0;
2552
2553 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2554 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2555
581d708e
MC		 2556 i = tx_ring->next_to_use;
2557 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2558 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2559
2560 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2561 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2562 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2563 context_desc->upper_setup.tcp_fields.tucss = tucss;
2564 context_desc->upper_setup.tcp_fields.tucso = tucso;
2565 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2566 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2567 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2568 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2569
545c67c0 2570 buffer_info->time_stamp = jiffies;
a9ebadd6 2571 buffer_info->next_to_watch = i;
545c67c0 2572
581d708e
MC		 2573 if (++i == tx_ring->count) i = 0;
2574 tx_ring->next_to_use = i;
1da177e4 2575
c3033b01 2576 return true;
1da177e4 2577 }
c3033b01 2578 return false;
1da177e4
LT		 2579}
2580
64798845
JP		 2581static bool e1000_tx_csum(struct e1000_adapter *adapter,
2582 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2583{
2584 struct e1000_context_desc *context_desc;
545c67c0 2585 struct e1000_buffer *buffer_info;
1da177e4 2586 unsigned int i;
406874a7 2587 u8 css;
3ed30676 2588 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2589
3ed30676
DG		 2590 if (skb->ip_summed != CHECKSUM_PARTIAL)
2591 return false;
1da177e4 2592
3ed30676 2593 switch (skb->protocol) {
09640e63 2594 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2595 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2596 cmd_len |= E1000_TXD_CMD_TCP;
2597 break;
09640e63 2598 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2599 /* XXX not handling all IPV6 headers */
2600 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2601 cmd_len |= E1000_TXD_CMD_TCP;
2602 break;
2603 default:
2604 if (unlikely(net_ratelimit()))
2605 DPRINTK(DRV, WARNING,
2606 "checksum_partial proto=%x!\n", skb->protocol);
2607 break;
2608 }
1da177e4 2609
3ed30676 2610 css = skb_transport_offset(skb);
1da177e4 2611
3ed30676
DG		 2612 i = tx_ring->next_to_use;
2613 buffer_info = &tx_ring->buffer_info[i];
2614 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2615
3ed30676
DG		 2616 context_desc->lower_setup.ip_config = 0;
2617 context_desc->upper_setup.tcp_fields.tucss = css;
2618 context_desc->upper_setup.tcp_fields.tucso =
2619 css + skb->csum_offset;
2620 context_desc->upper_setup.tcp_fields.tucse = 0;
2621 context_desc->tcp_seg_setup.data = 0;
2622 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2623
3ed30676
DG		 2624 buffer_info->time_stamp = jiffies;
2625 buffer_info->next_to_watch = i;
1da177e4 2626
3ed30676
DG		 2627 if (unlikely(++i == tx_ring->count)) i = 0;
2628 tx_ring->next_to_use = i;
2629
2630 return true;
1da177e4
LT		 2631}
2632
2633#define E1000_MAX_TXD_PWR 12
2634#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2635
64798845
JP		 2636static int e1000_tx_map(struct e1000_adapter *adapter,
2637 struct e1000_tx_ring *tx_ring,
2638 struct sk_buff *skb, unsigned int first,
2639 unsigned int max_per_txd, unsigned int nr_frags,
2640 unsigned int mss)
1da177e4 2641{
1dc32918 2642 struct e1000_hw *hw = &adapter->hw;
37e73df8 2643 struct e1000_buffer *buffer_info;
d20b606c
JB		 2644 unsigned int len = skb_headlen(skb);
2645 unsigned int offset, size, count = 0, i;
1da177e4 2646 unsigned int f;
37e73df8 2647 dma_addr_t *map;
1da177e4
LT		 2648
2649 i = tx_ring->next_to_use;
2650
d20b606c
JB		 2651 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
2652 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
37e73df8 2653 return 0;
d20b606c
JB		 2654 }
2655
37e73df8 2656 map = skb_shinfo(skb)->dma_maps;
d20b606c
JB		 2657 offset = 0;
2658
96838a40 2659 while (len) {
37e73df8 2660 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2661 size = min(len, max_per_txd);
fd803241
JK		 2662 /* Workaround for Controller erratum --
2663 * descriptor for non-tso packet in a linear SKB that follows a
2664 * tso gets written back prematurely before the data is fully
0f15a8fa 2665 * DMA'd to the controller */
fd803241 2666 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2667 !skb_is_gso(skb)) {
fd803241
JK		 2668 tx_ring->last_tx_tso = 0;
2669 size -= 4;
2670 }
2671
1da177e4
LT		 2672 /* Workaround for premature desc write-backs
2673 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2674 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2675 size -= 4;
97338bde
MC		 2676 /* work-around for errata 10 and it applies
2677 * to all controllers in PCI-X mode
2678 * The fix is to make sure that the first descriptor of a
2679 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2680 */
1dc32918 2681 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2682 (size > 2015) && count == 0))
2683 size = 2015;
96838a40 2684
1da177e4
LT		 2685 /* Workaround for potential 82544 hang in PCI-X. Avoid
2686 * terminating buffers within evenly-aligned dwords. */
96838a40 2687 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2688 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2689 size > 4))
2690 size -= 4;
2691
2692 buffer_info->length = size;
042a53a9 2693 buffer_info->dma = skb_shinfo(skb)->dma_head + offset;
1da177e4 2694 buffer_info->time_stamp = jiffies;
a9ebadd6 2695 buffer_info->next_to_watch = i;
1da177e4
LT		 2696
2697 len -= size;
2698 offset += size;
2699 count++;
37e73df8
AD		 2700 if (len) {
2701 i++;
2702 if (unlikely(i == tx_ring->count))
2703 i = 0;
2704 }
1da177e4
LT		 2705 }
2706
96838a40 2707 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2708 struct skb_frag_struct *frag;
2709
2710 frag = &skb_shinfo(skb)->frags[f];
2711 len = frag->size;
d20b606c 2712 offset = 0;
1da177e4 2713
96838a40 2714 while (len) {
37e73df8
AD		 2715 i++;
2716 if (unlikely(i == tx_ring->count))
2717 i = 0;
2718
1da177e4
LT		 2719 buffer_info = &tx_ring->buffer_info[i];
2720 size = min(len, max_per_txd);
1da177e4
LT		 2721 /* Workaround for premature desc write-backs
2722 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2723 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 2724 size -= 4;
1da177e4
LT		 2725 /* Workaround for potential 82544 hang in PCI-X.
2726 * Avoid terminating buffers within evenly-aligned
2727 * dwords. */
96838a40 2728 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2729 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2730 size > 4))
2731 size -= 4;
2732
2733 buffer_info->length = size;
042a53a9 2734 buffer_info->dma = map[f] + offset;
1da177e4 2735 buffer_info->time_stamp = jiffies;
a9ebadd6 2736 buffer_info->next_to_watch = i;
1da177e4
LT		 2737
2738 len -= size;
2739 offset += size;
2740 count++;
1da177e4
LT		 2741 }
2742 }
2743
1da177e4
LT		 2744 tx_ring->buffer_info[i].skb = skb;
2745 tx_ring->buffer_info[first].next_to_watch = i;
2746
2747 return count;
2748}
2749
64798845
JP		 2750static void e1000_tx_queue(struct e1000_adapter *adapter,
2751 struct e1000_tx_ring *tx_ring, int tx_flags,
2752 int count)
1da177e4 2753{
1dc32918 2754 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2755 struct e1000_tx_desc *tx_desc = NULL;
2756 struct e1000_buffer *buffer_info;
406874a7 2757 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2758 unsigned int i;
2759
96838a40 2760 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2761 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2762 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2763 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2764
96838a40 2765 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2766 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2767 }
2768
96838a40 2769 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2770 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2771 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2772 }
2773
96838a40 2774 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2775 txd_lower |= E1000_TXD_CMD_VLE;
2776 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2777 }
2778
2779 i = tx_ring->next_to_use;
2780
96838a40 2781 while (count--) {
1da177e4
LT		 2782 buffer_info = &tx_ring->buffer_info[i];
2783 tx_desc = E1000_TX_DESC(*tx_ring, i);
2784 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2785 tx_desc->lower.data =
2786 cpu_to_le32(txd_lower | buffer_info->length);
2787 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2788 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2789 }
2790
2791 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2792
2793 /* Force memory writes to complete before letting h/w
2794 * know there are new descriptors to fetch. (Only
2795 * applicable for weak-ordered memory model archs,
2796 * such as IA-64). */
2797 wmb();
2798
2799 tx_ring->next_to_use = i;
1dc32918 2800 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 2801 /* we need this if more than one processor can write to our tail
2802 * at a time, it syncronizes IO on IA64/Altix systems */
2803 mmiowb();
1da177e4
LT		 2804}
2805
2806/**
2807 * 82547 workaround to avoid controller hang in half-duplex environment.
2808 * The workaround is to avoid queuing a large packet that would span
2809 * the internal Tx FIFO ring boundary by notifying the stack to resend
2810 * the packet at a later time. This gives the Tx FIFO an opportunity to
2811 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2812 * to the beginning of the Tx FIFO.
2813 **/
2814
2815#define E1000_FIFO_HDR 0x10
2816#define E1000_82547_PAD_LEN 0x3E0
2817
64798845
JP		 2818static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
2819 struct sk_buff *skb)
1da177e4 2820{
406874a7
JP		 2821 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2822 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 2823
9099cfb9 2824 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 2825
96838a40 2826 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2827 goto no_fifo_stall_required;
2828
96838a40 2829 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2830 return 1;
2831
96838a40 2832 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2833 atomic_set(&adapter->tx_fifo_stall, 1);
2834 return 1;
2835 }
2836
2837no_fifo_stall_required:
2838 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2839 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2840 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2841 return 0;
2842}
2843
65c7973f
JB		 2844static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2845{
2846 struct e1000_adapter *adapter = netdev_priv(netdev);
2847 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2848
2849 netif_stop_queue(netdev);
2850 /* Herbert's original patch had:
2851 * smp_mb__after_netif_stop_queue();
2852 * but since that doesn't exist yet, just open code it. */
2853 smp_mb();
2854
2855 /* We need to check again in a case another CPU has just
2856 * made room available. */
2857 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2858 return -EBUSY;
2859
2860 /* A reprieve! */
2861 netif_start_queue(netdev);
fcfb1224 2862 ++adapter->restart_queue;
65c7973f
JB		 2863 return 0;
2864}
2865
2866static int e1000_maybe_stop_tx(struct net_device *netdev,
2867 struct e1000_tx_ring *tx_ring, int size)
2868{
2869 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2870 return 0;
2871 return __e1000_maybe_stop_tx(netdev, size);
2872}
2873
1da177e4 2874#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 2875static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
2876 struct net_device *netdev)
1da177e4 2877{
60490fe0 2878 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2879 struct e1000_hw *hw = &adapter->hw;
581d708e 2880 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2881 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2882 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2883 unsigned int tx_flags = 0;
6d1e3aa7 2884 unsigned int len = skb->len - skb->data_len;
6d1e3aa7
KK		 2885 unsigned int nr_frags;
2886 unsigned int mss;
1da177e4 2887 int count = 0;
76c224bc 2888 int tso;
1da177e4 2889 unsigned int f;
1da177e4 2890
65c7973f
JB		 2891 /* This goes back to the question of how to logically map a tx queue
2892 * to a flow. Right now, performance is impacted slightly negatively
2893 * if using multiple tx queues. If the stack breaks away from a
2894 * single qdisc implementation, we can look at this again. */
581d708e 2895 tx_ring = adapter->tx_ring;
24025e4e 2896
581d708e 2897 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2898 dev_kfree_skb_any(skb);
2899 return NETDEV_TX_OK;
2900 }
2901
7967168c 2902 mss = skb_shinfo(skb)->gso_size;
76c224bc 2903 /* The controller does a simple calculation to
1da177e4
LT		 2904 * make sure there is enough room in the FIFO before
2905 * initiating the DMA for each buffer. The calc is:
2906 * 4 = ceil(buffer len/mss). To make sure we don't
2907 * overrun the FIFO, adjust the max buffer len if mss
2908 * drops. */
96838a40 2909 if (mss) {
406874a7 2910 u8 hdr_len;
1da177e4
LT		 2911 max_per_txd = min(mss << 2, max_per_txd);
2912 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2913
ab6a5bb6 2914 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 2915 if (skb->data_len && hdr_len == len) {
1dc32918 2916 switch (hw->mac_type) {
9f687888 2917 unsigned int pull_size;
683a2aa3
HX		 2918 case e1000_82544:
2919 /* Make sure we have room to chop off 4 bytes,
2920 * and that the end alignment will work out to
2921 * this hardware's requirements
2922 * NOTE: this is a TSO only workaround
2923 * if end byte alignment not correct move us
2924 * into the next dword */
27a884dc 2925 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 2926 break;
2927 /* fall through */
9f687888
JK		 2928 pull_size = min((unsigned int)4, skb->data_len);
2929 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2930 DPRINTK(DRV, ERR,
9f687888
JK		 2931 "__pskb_pull_tail failed.\n");
2932 dev_kfree_skb_any(skb);
749dfc70 2933 return NETDEV_TX_OK;
9f687888
JK		 2934 }
2935 len = skb->len - skb->data_len;
2936 break;
2937 default:
2938 /* do nothing */
2939 break;
d74bbd3b 2940 }
9a3056da 2941 }
1da177e4
LT		 2942 }
2943
9a3056da 2944 /* reserve a descriptor for the offload context */
84fa7933 2945 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 2946 count++;
2648345f 2947 count++;
fd803241 2948
fd803241 2949 /* Controller Erratum workaround */
89114afd 2950 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 2951 count++;
fd803241 2952
1da177e4
LT		 2953 count += TXD_USE_COUNT(len, max_txd_pwr);
2954
96838a40 2955 if (adapter->pcix_82544)
1da177e4
LT		 2956 count++;
2957
96838a40 2958 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2959 * in PCI-X mode, so add one more descriptor to the count
2960 */
1dc32918 2961 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2962 (len > 2015)))
2963 count++;
2964
1da177e4 2965 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2966 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2967 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2968 max_txd_pwr);
96838a40 2969 if (adapter->pcix_82544)
1da177e4
LT		 2970 count += nr_frags;
2971
1da177e4
LT		 2972 /* need: count + 2 desc gap to keep tail from touching
2973 * head, otherwise try next time */
8017943e 2974 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 2975 return NETDEV_TX_BUSY;
1da177e4 2976
1dc32918 2977 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 2978 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 2979 netif_stop_queue(netdev);
1314bbf3 2980 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
1da177e4
LT		 2981 return NETDEV_TX_BUSY;
2982 }
2983 }
2984
96838a40 2985 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 2986 tx_flags |= E1000_TX_FLAGS_VLAN;
2987 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2988 }
2989
581d708e 2990 first = tx_ring->next_to_use;
96838a40 2991
581d708e 2992 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2993 if (tso < 0) {
2994 dev_kfree_skb_any(skb);
2995 return NETDEV_TX_OK;
2996 }
2997
fd803241
JK		 2998 if (likely(tso)) {
2999 tx_ring->last_tx_tso = 1;
1da177e4 3000 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3001 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3002 tx_flags |= E1000_TX_FLAGS_CSUM;
3003
60828236 3004 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3005 tx_flags |= E1000_TX_FLAGS_IPV4;
3006
37e73df8
AD		 3007 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3008 nr_frags, mss);
1da177e4 3009
37e73df8
AD		 3010 if (count) {
3011 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3012 /* Make sure there is space in the ring for the next send. */
3013 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3014
37e73df8
AD		 3015 } else {
3016 dev_kfree_skb_any(skb);
3017 tx_ring->buffer_info[first].time_stamp = 0;
3018 tx_ring->next_to_use = first;
3019 }
1da177e4 3020
1da177e4
LT		 3021 return NETDEV_TX_OK;
3022}
3023
3024/**
3025 * e1000_tx_timeout - Respond to a Tx Hang
3026 * @netdev: network interface device structure
3027 **/
3028
64798845 3029static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3030{
60490fe0 3031 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3032
3033 /* Do the reset outside of interrupt context */
87041639
JK		 3034 adapter->tx_timeout_count++;
3035 schedule_work(&adapter->reset_task);
1da177e4
LT		 3036}
3037
64798845 3038static void e1000_reset_task(struct work_struct *work)
1da177e4 3039{
65f27f38
DH		 3040 struct e1000_adapter *adapter =
3041 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3042
2db10a08 3043 e1000_reinit_locked(adapter);
1da177e4
LT		 3044}
3045
3046/**
3047 * e1000_get_stats - Get System Network Statistics
3048 * @netdev: network interface device structure
3049 *
3050 * Returns the address of the device statistics structure.
3051 * The statistics are actually updated from the timer callback.
3052 **/
3053
64798845 3054static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3055{
60490fe0 3056 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3057
6b7660cd 3058 /* only return the current stats */
1da177e4
LT		 3059 return &adapter->net_stats;
3060}
3061
3062/**
3063 * e1000_change_mtu - Change the Maximum Transfer Unit
3064 * @netdev: network interface device structure
3065 * @new_mtu: new value for maximum frame size
3066 *
3067 * Returns 0 on success, negative on failure
3068 **/
3069
64798845 3070static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3071{
60490fe0 3072 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3073 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3074 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3075
96838a40
JB		 3076 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3077 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3078 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3079 return -EINVAL;
2d7edb92 3080 }
1da177e4 3081
997f5cbd 3082 /* Adapter-specific max frame size limits. */
1dc32918 3083 switch (hw->mac_type) {
9e2feace 3084 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3085 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
997f5cbd 3086 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3087 return -EINVAL;
2d7edb92 3088 }
997f5cbd 3089 break;
997f5cbd
JK		 3090 default:
3091 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3092 break;
1da177e4
LT		 3093 }
3094
87f5032e 3095 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3096 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3097 * larger slab size.
3098 * i.e. RXBUFFER_2048 --> size-4096 slab
3099 * however with the new *_jumbo_rx* routines, jumbo receives will use
3100 * fragmented skbs */
9e2feace
AK		 3101
3102 if (max_frame <= E1000_RXBUFFER_256)
3103 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3104 else if (max_frame <= E1000_RXBUFFER_512)
3105 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3106 else if (max_frame <= E1000_RXBUFFER_1024)
3107 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3108 else if (max_frame <= E1000_RXBUFFER_2048)
3109 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3110 else
3111#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3112 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3113#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3114 adapter->rx_buffer_len = PAGE_SIZE;
3115#endif
9e2feace
AK		 3116
3117 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3118 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3119 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3120 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3121 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3122
2d7edb92 3123 netdev->mtu = new_mtu;
1dc32918 3124 hw->max_frame_size = max_frame;
2d7edb92 3125
2db10a08
AK		 3126 if (netif_running(netdev))
3127 e1000_reinit_locked(adapter);
1da177e4 3128
1da177e4
LT		 3129 return 0;
3130}
3131
3132/**
3133 * e1000_update_stats - Update the board statistics counters
3134 * @adapter: board private structure
3135 **/
3136
64798845 3137void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4
LT		 3138{
3139 struct e1000_hw *hw = &adapter->hw;
282f33c9 3140 struct pci_dev *pdev = adapter->pdev;
1da177e4 3141 unsigned long flags;
406874a7 3142 u16 phy_tmp;
1da177e4
LT		 3143
3144#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3145
282f33c9
LV		 3146 /*
3147 * Prevent stats update while adapter is being reset, or if the pci
3148 * connection is down.
3149 */
9026729b 3150 if (adapter->link_speed == 0)
282f33c9 3151 return;
81b1955e 3152 if (pci_channel_offline(pdev))
9026729b
AK		 3153 return;
3154
1da177e4
LT		 3155 spin_lock_irqsave(&adapter->stats_lock, flags);
3156
828d055f 3157 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3158 * called from the interrupt context, so they must only
3159 * be written while holding adapter->stats_lock
3160 */
3161
1dc32918
JP		 3162 adapter->stats.crcerrs += er32(CRCERRS);
3163 adapter->stats.gprc += er32(GPRC);
3164 adapter->stats.gorcl += er32(GORCL);
3165 adapter->stats.gorch += er32(GORCH);
3166 adapter->stats.bprc += er32(BPRC);
3167 adapter->stats.mprc += er32(MPRC);
3168 adapter->stats.roc += er32(ROC);
3169
1532ecea
JB		 3170 adapter->stats.prc64 += er32(PRC64);
3171 adapter->stats.prc127 += er32(PRC127);
3172 adapter->stats.prc255 += er32(PRC255);
3173 adapter->stats.prc511 += er32(PRC511);
3174 adapter->stats.prc1023 += er32(PRC1023);
3175 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3176
3177 adapter->stats.symerrs += er32(SYMERRS);
3178 adapter->stats.mpc += er32(MPC);
3179 adapter->stats.scc += er32(SCC);
3180 adapter->stats.ecol += er32(ECOL);
3181 adapter->stats.mcc += er32(MCC);
3182 adapter->stats.latecol += er32(LATECOL);
3183 adapter->stats.dc += er32(DC);
3184 adapter->stats.sec += er32(SEC);
3185 adapter->stats.rlec += er32(RLEC);
3186 adapter->stats.xonrxc += er32(XONRXC);
3187 adapter->stats.xontxc += er32(XONTXC);
3188 adapter->stats.xoffrxc += er32(XOFFRXC);
3189 adapter->stats.xofftxc += er32(XOFFTXC);
3190 adapter->stats.fcruc += er32(FCRUC);
3191 adapter->stats.gptc += er32(GPTC);
3192 adapter->stats.gotcl += er32(GOTCL);
3193 adapter->stats.gotch += er32(GOTCH);
3194 adapter->stats.rnbc += er32(RNBC);
3195 adapter->stats.ruc += er32(RUC);
3196 adapter->stats.rfc += er32(RFC);
3197 adapter->stats.rjc += er32(RJC);
3198 adapter->stats.torl += er32(TORL);
3199 adapter->stats.torh += er32(TORH);
3200 adapter->stats.totl += er32(TOTL);
3201 adapter->stats.toth += er32(TOTH);
3202 adapter->stats.tpr += er32(TPR);
3203
1532ecea
JB		 3204 adapter->stats.ptc64 += er32(PTC64);
3205 adapter->stats.ptc127 += er32(PTC127);
3206 adapter->stats.ptc255 += er32(PTC255);
3207 adapter->stats.ptc511 += er32(PTC511);
3208 adapter->stats.ptc1023 += er32(PTC1023);
3209 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3210
3211 adapter->stats.mptc += er32(MPTC);
3212 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3213
3214 /* used for adaptive IFS */
3215
1dc32918 3216 hw->tx_packet_delta = er32(TPT);
1da177e4 3217 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3218 hw->collision_delta = er32(COLC);
1da177e4
LT		 3219 adapter->stats.colc += hw->collision_delta;
3220
96838a40 3221 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3222 adapter->stats.algnerrc += er32(ALGNERRC);
3223 adapter->stats.rxerrc += er32(RXERRC);
3224 adapter->stats.tncrs += er32(TNCRS);
3225 adapter->stats.cexterr += er32(CEXTERR);
3226 adapter->stats.tsctc += er32(TSCTC);
3227 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3228 }
3229
3230 /* Fill out the OS statistics structure */
1da177e4
LT		 3231 adapter->net_stats.multicast = adapter->stats.mprc;
3232 adapter->net_stats.collisions = adapter->stats.colc;
3233
3234 /* Rx Errors */
3235
87041639
JK		 3236 /* RLEC on some newer hardware can be incorrect so build
3237 * our own version based on RUC and ROC */
1da177e4
LT		 3238 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3239 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3240 adapter->stats.ruc + adapter->stats.roc +
3241 adapter->stats.cexterr;
49559854
MW		 3242 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3243 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3244 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3245 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3246 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3247
3248 /* Tx Errors */
49559854
MW		 3249 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3250 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3251 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3252 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3253 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3254 if (hw->bad_tx_carr_stats_fd &&
167fb284
JG		 3255 adapter->link_duplex == FULL_DUPLEX) {
3256 adapter->net_stats.tx_carrier_errors = 0;
3257 adapter->stats.tncrs = 0;
3258 }
1da177e4
LT		 3259
3260 /* Tx Dropped needs to be maintained elsewhere */
3261
3262 /* Phy Stats */
96838a40
JB		 3263 if (hw->media_type == e1000_media_type_copper) {
3264 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3265 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3266 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3267 adapter->phy_stats.idle_errors += phy_tmp;
3268 }
3269
96838a40 3270 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3271 (hw->phy_type == e1000_phy_m88) &&
3272 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3273 adapter->phy_stats.receive_errors += phy_tmp;
3274 }
3275
15e376b4 3276 /* Management Stats */
1dc32918
JP		 3277 if (hw->has_smbus) {
3278 adapter->stats.mgptc += er32(MGTPTC);
3279 adapter->stats.mgprc += er32(MGTPRC);
3280 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3281 }
3282
1da177e4
LT		 3283 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3284}
9ac98284 3285
1da177e4
LT		 3286/**
3287 * e1000_intr - Interrupt Handler
3288 * @irq: interrupt number
3289 * @data: pointer to a network interface device structure
1da177e4
LT		 3290 **/
3291
64798845 3292static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3293{
3294 struct net_device *netdev = data;
60490fe0 3295 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3296 struct e1000_hw *hw = &adapter->hw;
1532ecea 3297 u32 icr = er32(ICR);
c3570acb 3298
e151a60a 3299 if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags)))
835bb129
JB		 3300 return IRQ_NONE; /* Not our interrupt */
3301
96838a40 3302 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3303 hw->get_link_status = 1;
1314bbf3
AK		 3304 /* guard against interrupt when we're going down */
3305 if (!test_bit(__E1000_DOWN, &adapter->flags))
3306 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3307 }
3308
1532ecea
JB		 3309 /* disable interrupts, without the synchronize_irq bit */
3310 ew32(IMC, ~0);
3311 E1000_WRITE_FLUSH();
3312
288379f0 3313 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3314 adapter->total_tx_bytes = 0;
3315 adapter->total_tx_packets = 0;
3316 adapter->total_rx_bytes = 0;
3317 adapter->total_rx_packets = 0;
288379f0 3318 __napi_schedule(&adapter->napi);
a6c42322 3319 } else {
90fb5135
AK		 3320 /* this really should not happen! if it does it is basically a
3321 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB		 3322 if (!test_bit(__E1000_DOWN, &adapter->flags))
3323 e1000_irq_enable(adapter);
3324 }
1da177e4 3325
1da177e4
LT		 3326 return IRQ_HANDLED;
3327}
3328
1da177e4
LT		 3329/**
3330 * e1000_clean - NAPI Rx polling callback
3331 * @adapter: board private structure
3332 **/
64798845 3333static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3334{
bea3348e
SH		 3335 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3336 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 3337 int tx_cleaned = 0, work_done = 0;
581d708e 3338
4cf1653a 3339 adapter = netdev_priv(poll_dev);
581d708e 3340
8017943e 3341 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3342
d3d9e484 3343 adapter->clean_rx(adapter, &adapter->rx_ring[0],
bea3348e 3344 &work_done, budget);
96838a40 3345
ccfb342c 3346 if (!tx_cleaned)
d2c7ddd6
DM		 3347 work_done = budget;
3348
53e52c72
DM		 3349 /* If budget not fully consumed, exit the polling mode */
3350 if (work_done < budget) {
835bb129
JB		 3351 if (likely(adapter->itr_setting & 3))
3352 e1000_set_itr(adapter);
288379f0 3353 napi_complete(napi);
a6c42322
JB		 3354 if (!test_bit(__E1000_DOWN, &adapter->flags))
3355 e1000_irq_enable(adapter);
1da177e4
LT		 3356 }
3357
bea3348e 3358 return work_done;
1da177e4
LT		 3359}
3360
1da177e4
LT		 3361/**
3362 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3363 * @adapter: board private structure
3364 **/
64798845
JP		 3365static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3366 struct e1000_tx_ring *tx_ring)
1da177e4 3367{
1dc32918 3368 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3369 struct net_device *netdev = adapter->netdev;
3370 struct e1000_tx_desc *tx_desc, *eop_desc;
3371 struct e1000_buffer *buffer_info;
3372 unsigned int i, eop;
2a1af5d7 3373 unsigned int count = 0;
835bb129 3374 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3375
3376 i = tx_ring->next_to_clean;
3377 eop = tx_ring->buffer_info[i].next_to_watch;
3378 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3379
ccfb342c
AD		 3380 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3381 (count < tx_ring->count)) {
843f4267
JB		 3382 bool cleaned = false;
3383 for ( ; !cleaned; count++) {
1da177e4
LT		 3384 tx_desc = E1000_TX_DESC(*tx_ring, i);
3385 buffer_info = &tx_ring->buffer_info[i];
3386 cleaned = (i == eop);
3387
835bb129 3388 if (cleaned) {
2b65326e 3389 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3390 unsigned int segs, bytecount;
3391 segs = skb_shinfo(skb)->gso_segs ?: 1;
3392 /* multiply data chunks by size of headers */
3393 bytecount = ((segs - 1) * skb_headlen(skb)) +
3394 skb->len;
2b65326e 3395 total_tx_packets += segs;
7753b171 3396 total_tx_bytes += bytecount;
835bb129 3397 }
fd803241 3398 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3399 tx_desc->upper.data = 0;
1da177e4 3400
96838a40 3401 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3402 }
581d708e 3403
1da177e4
LT		 3404 eop = tx_ring->buffer_info[i].next_to_watch;
3405 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3406 }
3407
3408 tx_ring->next_to_clean = i;
3409
77b2aad5 3410#define TX_WAKE_THRESHOLD 32
843f4267 3411 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3412 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3413 /* Make sure that anybody stopping the queue after this
3414 * sees the new next_to_clean.
3415 */
3416 smp_mb();
fcfb1224 3417 if (netif_queue_stopped(netdev)) {
77b2aad5 3418 netif_wake_queue(netdev);
fcfb1224
JB		 3419 ++adapter->restart_queue;
3420 }
77b2aad5 3421 }
2648345f 3422
581d708e 3423 if (adapter->detect_tx_hung) {
2648345f 3424 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3425 * check with the clearing of time_stamp and movement of i */
c3033b01 3426 adapter->detect_tx_hung = false;
ccfb342c
AD		 3427 if (tx_ring->buffer_info[i].time_stamp &&
3428 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
7e6c9861 3429 (adapter->tx_timeout_factor * HZ))
1dc32918 3430 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3431
3432 /* detected Tx unit hang */
c6963ef5 3433 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3434 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3435 " TDH <%x>\n"
3436 " TDT <%x>\n"
3437 " next_to_use <%x>\n"
3438 " next_to_clean <%x>\n"
3439 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3440 " time_stamp <%lx>\n"
3441 " next_to_watch <%x>\n"
3442 " jiffies <%lx>\n"
3443 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3444 (unsigned long)((tx_ring - adapter->tx_ring) /
3445 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3446 readl(hw->hw_addr + tx_ring->tdh),
3447 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3448 tx_ring->next_to_use,
392137fa 3449 tx_ring->next_to_clean,
ccfb342c 3450 tx_ring->buffer_info[i].time_stamp,
70b8f1e1
MC		 3451 eop,
3452 jiffies,
3453 eop_desc->upper.fields.status);
1da177e4 3454 netif_stop_queue(netdev);
70b8f1e1 3455 }
1da177e4 3456 }
835bb129
JB		 3457 adapter->total_tx_bytes += total_tx_bytes;
3458 adapter->total_tx_packets += total_tx_packets;
ef90e4ec
AK		 3459 adapter->net_stats.tx_bytes += total_tx_bytes;
3460 adapter->net_stats.tx_packets += total_tx_packets;
ccfb342c 3461 return (count < tx_ring->count);
1da177e4
LT		 3462}
3463
3464/**
3465 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3466 * @adapter: board private structure
3467 * @status_err: receive descriptor status and error fields
3468 * @csum: receive descriptor csum field
3469 * @sk_buff: socket buffer with received data
1da177e4
LT		 3470 **/
3471
64798845
JP		 3472static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3473 u32 csum, struct sk_buff *skb)
1da177e4 3474{
1dc32918 3475 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3476 u16 status = (u16)status_err;
3477 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3478 skb->ip_summed = CHECKSUM_NONE;
3479
1da177e4 3480 /* 82543 or newer only */
1dc32918 3481 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3482 /* Ignore Checksum bit is set */
96838a40 3483 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3484 /* TCP/UDP checksum error bit is set */
96838a40 3485 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3486 /* let the stack verify checksum errors */
1da177e4 3487 adapter->hw_csum_err++;
2d7edb92
MC		 3488 return;
3489 }
3490 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3491 if (!(status & E1000_RXD_STAT_TCPCS))
3492 return;
3493
2d7edb92
MC		 3494 /* It must be a TCP or UDP packet with a valid checksum */
3495 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3496 /* TCP checksum is good */
3497 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3498 }
2d7edb92 3499 adapter->hw_csum_good++;
1da177e4
LT		 3500}
3501
edbbb3ca
JB		 3502/**
3503 * e1000_consume_page - helper function
3504 **/
3505static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
3506 u16 length)
3507{
3508 bi->page = NULL;
3509 skb->len += length;
3510 skb->data_len += length;
3511 skb->truesize += length;
3512}
3513
3514/**
3515 * e1000_receive_skb - helper function to handle rx indications
3516 * @adapter: board private structure
3517 * @status: descriptor status field as written by hardware
3518 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3519 * @skb: pointer to sk_buff to be indicated to stack
3520 */
3521static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3522 __le16 vlan, struct sk_buff *skb)
3523{
3524 if (unlikely(adapter->vlgrp && (status & E1000_RXD_STAT_VP))) {
3525 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3526 le16_to_cpu(vlan) &
3527 E1000_RXD_SPC_VLAN_MASK);
3528 } else {
3529 netif_receive_skb(skb);
3530 }
3531}
3532
3533/**
3534 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
3535 * @adapter: board private structure
3536 * @rx_ring: ring to clean
3537 * @work_done: amount of napi work completed this call
3538 * @work_to_do: max amount of work allowed for this call to do
3539 *
3540 * the return value indicates whether actual cleaning was done, there
3541 * is no guarantee that everything was cleaned
3542 */
3543static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
3544 struct e1000_rx_ring *rx_ring,
3545 int *work_done, int work_to_do)
3546{
3547 struct e1000_hw *hw = &adapter->hw;
3548 struct net_device *netdev = adapter->netdev;
3549 struct pci_dev *pdev = adapter->pdev;
3550 struct e1000_rx_desc *rx_desc, *next_rxd;
3551 struct e1000_buffer *buffer_info, *next_buffer;
3552 unsigned long irq_flags;
3553 u32 length;
3554 unsigned int i;
3555 int cleaned_count = 0;
3556 bool cleaned = false;
3557 unsigned int total_rx_bytes=0, total_rx_packets=0;
3558
3559 i = rx_ring->next_to_clean;
3560 rx_desc = E1000_RX_DESC(*rx_ring, i);
3561 buffer_info = &rx_ring->buffer_info[i];
3562
3563 while (rx_desc->status & E1000_RXD_STAT_DD) {
3564 struct sk_buff *skb;
3565 u8 status;
3566
3567 if (*work_done >= work_to_do)
3568 break;
3569 (*work_done)++;
3570
3571 status = rx_desc->status;
3572 skb = buffer_info->skb;
3573 buffer_info->skb = NULL;
3574
3575 if (++i == rx_ring->count) i = 0;
3576 next_rxd = E1000_RX_DESC(*rx_ring, i);
3577 prefetch(next_rxd);
3578
3579 next_buffer = &rx_ring->buffer_info[i];
3580
3581 cleaned = true;
3582 cleaned_count++;
3583 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
3584 PCI_DMA_FROMDEVICE);
3585 buffer_info->dma = 0;
3586
3587 length = le16_to_cpu(rx_desc->length);
3588
3589 /* errors is only valid for DD + EOP descriptors */
3590 if (unlikely((status & E1000_RXD_STAT_EOP) &&
3591 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
3592 u8 last_byte = *(skb->data + length - 1);
3593 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3594 last_byte)) {
3595 spin_lock_irqsave(&adapter->stats_lock,
3596 irq_flags);
3597 e1000_tbi_adjust_stats(hw, &adapter->stats,
3598 length, skb->data);
3599 spin_unlock_irqrestore(&adapter->stats_lock,
3600 irq_flags);
3601 length--;
3602 } else {
3603 /* recycle both page and skb */
3604 buffer_info->skb = skb;
3605 /* an error means any chain goes out the window
3606 * too */
3607 if (rx_ring->rx_skb_top)
3608 dev_kfree_skb(rx_ring->rx_skb_top);
3609 rx_ring->rx_skb_top = NULL;
3610 goto next_desc;
3611 }
3612 }
3613
3614#define rxtop rx_ring->rx_skb_top
3615 if (!(status & E1000_RXD_STAT_EOP)) {
3616 /* this descriptor is only the beginning (or middle) */
3617 if (!rxtop) {
3618 /* this is the beginning of a chain */
3619 rxtop = skb;
3620 skb_fill_page_desc(rxtop, 0, buffer_info->page,
3621 0, length);
3622 } else {
3623 /* this is the middle of a chain */
3624 skb_fill_page_desc(rxtop,
3625 skb_shinfo(rxtop)->nr_frags,
3626 buffer_info->page, 0, length);
3627 /* re-use the skb, only consumed the page */
3628 buffer_info->skb = skb;
3629 }
3630 e1000_consume_page(buffer_info, rxtop, length);
3631 goto next_desc;
3632 } else {
3633 if (rxtop) {
3634 /* end of the chain */
3635 skb_fill_page_desc(rxtop,
3636 skb_shinfo(rxtop)->nr_frags,
3637 buffer_info->page, 0, length);
3638 /* re-use the current skb, we only consumed the
3639 * page */
3640 buffer_info->skb = skb;
3641 skb = rxtop;
3642 rxtop = NULL;
3643 e1000_consume_page(buffer_info, skb, length);
3644 } else {
3645 /* no chain, got EOP, this buf is the packet
3646 * copybreak to save the put_page/alloc_page */
3647 if (length <= copybreak &&
3648 skb_tailroom(skb) >= length) {
3649 u8 *vaddr;
3650 vaddr = kmap_atomic(buffer_info->page,
3651 KM_SKB_DATA_SOFTIRQ);
3652 memcpy(skb_tail_pointer(skb), vaddr, length);
3653 kunmap_atomic(vaddr,
3654 KM_SKB_DATA_SOFTIRQ);
3655 /* re-use the page, so don't erase
3656 * buffer_info->page */
3657 skb_put(skb, length);
3658 } else {
3659 skb_fill_page_desc(skb, 0,
3660 buffer_info->page, 0,
3661 length);
3662 e1000_consume_page(buffer_info, skb,
3663 length);
3664 }
3665 }
3666 }
3667
3668 /* Receive Checksum Offload XXX recompute due to CRC strip? */
3669 e1000_rx_checksum(adapter,
3670 (u32)(status) |
3671 ((u32)(rx_desc->errors) << 24),
3672 le16_to_cpu(rx_desc->csum), skb);
3673
3674 pskb_trim(skb, skb->len - 4);
3675
3676 /* probably a little skewed due to removing CRC */
3677 total_rx_bytes += skb->len;
3678 total_rx_packets++;
3679
3680 /* eth type trans needs skb->data to point to something */
3681 if (!pskb_may_pull(skb, ETH_HLEN)) {
3682 DPRINTK(DRV, ERR, "pskb_may_pull failed.\n");
3683 dev_kfree_skb(skb);
3684 goto next_desc;
3685 }
3686
3687 skb->protocol = eth_type_trans(skb, netdev);
3688
3689 e1000_receive_skb(adapter, status, rx_desc->special, skb);
3690
3691next_desc:
3692 rx_desc->status = 0;
3693
3694 /* return some buffers to hardware, one at a time is too slow */
3695 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3696 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3697 cleaned_count = 0;
3698 }
3699
3700 /* use prefetched values */
3701 rx_desc = next_rxd;
3702 buffer_info = next_buffer;
3703 }
3704 rx_ring->next_to_clean = i;
3705
3706 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3707 if (cleaned_count)
3708 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3709
3710 adapter->total_rx_packets += total_rx_packets;
3711 adapter->total_rx_bytes += total_rx_bytes;
3712 adapter->net_stats.rx_bytes += total_rx_bytes;
3713 adapter->net_stats.rx_packets += total_rx_packets;
3714 return cleaned;
3715}
3716
1da177e4 3717/**
2d7edb92 3718 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 3719 * @adapter: board private structure
edbbb3ca
JB		 3720 * @rx_ring: ring to clean
3721 * @work_done: amount of napi work completed this call
3722 * @work_to_do: max amount of work allowed for this call to do
3723 */
64798845
JP		 3724static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3725 struct e1000_rx_ring *rx_ring,
3726 int *work_done, int work_to_do)
1da177e4 3727{
1dc32918 3728 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3729 struct net_device *netdev = adapter->netdev;
3730 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3731 struct e1000_rx_desc *rx_desc, *next_rxd;
3732 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3733 unsigned long flags;
406874a7 3734 u32 length;
1da177e4 3735 unsigned int i;
72d64a43 3736 int cleaned_count = 0;
c3033b01 3737 bool cleaned = false;
835bb129 3738 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3739
3740 i = rx_ring->next_to_clean;
3741 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3742 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3743
b92ff8ee 3744 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3745 struct sk_buff *skb;
a292ca6e 3746 u8 status;
90fb5135 3747
96838a40 3748 if (*work_done >= work_to_do)
1da177e4
LT		 3749 break;
3750 (*work_done)++;
c3570acb 3751
a292ca6e 3752 status = rx_desc->status;
b92ff8ee 3753 skb = buffer_info->skb;
86c3d59f
JB		 3754 buffer_info->skb = NULL;
3755
30320be8
JK		 3756 prefetch(skb->data - NET_IP_ALIGN);
3757
86c3d59f
JB		 3758 if (++i == rx_ring->count) i = 0;
3759 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3760 prefetch(next_rxd);
3761
86c3d59f 3762 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3763
c3033b01 3764 cleaned = true;
72d64a43 3765 cleaned_count++;
edbbb3ca 3766 pci_unmap_single(pdev, buffer_info->dma, buffer_info->length,
1da177e4 3767 PCI_DMA_FROMDEVICE);
679be3ba 3768 buffer_info->dma = 0;
1da177e4 3769
1da177e4 3770 length = le16_to_cpu(rx_desc->length);
ea30e119
NH		 3771 /* !EOP means multiple descriptors were used to store a single
3772 * packet, also make sure the frame isn't just CRC only */
3773 if (unlikely(!(status & E1000_RXD_STAT_EOP) || (length <= 4))) {
a1415ee6
JK		 3774 /* All receives must fit into a single buffer */
3775 E1000_DBG("%s: Receive packet consumed multiple"
3776 " buffers\n", netdev->name);
864c4e45 3777 /* recycle */
8fc897b0 3778 buffer_info->skb = skb;
1da177e4
LT		 3779 goto next_desc;
3780 }
3781
96838a40 3782 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 3783 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP		 3784 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3785 last_byte)) {
1da177e4 3786 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 3787 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 3788 length, skb->data);
3789 spin_unlock_irqrestore(&adapter->stats_lock,
3790 flags);
3791 length--;
3792 } else {
9e2feace
AK		 3793 /* recycle */
3794 buffer_info->skb = skb;
1da177e4
LT		 3795 goto next_desc;
3796 }
1cb5821f 3797 }
1da177e4 3798
d2a1e213
JB		 3799 /* adjust length to remove Ethernet CRC, this must be
3800 * done after the TBI_ACCEPT workaround above */
3801 length -= 4;
3802
835bb129
JB		 3803 /* probably a little skewed due to removing CRC */
3804 total_rx_bytes += length;
3805 total_rx_packets++;
3806
a292ca6e
JK		 3807 /* code added for copybreak, this should improve
3808 * performance for small packets with large amounts
3809 * of reassembly being done in the stack */
1f753861 3810 if (length < copybreak) {
a292ca6e 3811 struct sk_buff *new_skb =
87f5032e 3812 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 3813 if (new_skb) {
3814 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 3815 skb_copy_to_linear_data_offset(new_skb,
3816 -NET_IP_ALIGN,
3817 (skb->data -
3818 NET_IP_ALIGN),
3819 (length +
3820 NET_IP_ALIGN));
a292ca6e
JK		 3821 /* save the skb in buffer_info as good */
3822 buffer_info->skb = skb;
3823 skb = new_skb;
a292ca6e 3824 }
996695de
AK		 3825 /* else just continue with the old one */
3826 }
a292ca6e 3827 /* end copybreak code */
996695de 3828 skb_put(skb, length);
1da177e4
LT		 3829
3830 /* Receive Checksum Offload */
a292ca6e 3831 e1000_rx_checksum(adapter,
406874a7
JP		 3832 (u32)(status) |
3833 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 3834 le16_to_cpu(rx_desc->csum), skb);
96838a40 3835
1da177e4 3836 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 3837
edbbb3ca 3838 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 3839
1da177e4
LT		 3840next_desc:
3841 rx_desc->status = 0;
1da177e4 3842
72d64a43
JK		 3843 /* return some buffers to hardware, one at a time is too slow */
3844 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3845 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3846 cleaned_count = 0;
3847 }
3848
30320be8 3849 /* use prefetched values */
86c3d59f
JB		 3850 rx_desc = next_rxd;
3851 buffer_info = next_buffer;
1da177e4 3852 }
1da177e4 3853 rx_ring->next_to_clean = i;
72d64a43
JK		 3854
3855 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3856 if (cleaned_count)
3857 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 3858
835bb129
JB		 3859 adapter->total_rx_packets += total_rx_packets;
3860 adapter->total_rx_bytes += total_rx_bytes;
ef90e4ec
AK		 3861 adapter->net_stats.rx_bytes += total_rx_bytes;
3862 adapter->net_stats.rx_packets += total_rx_packets;
2d7edb92
MC		 3863 return cleaned;
3864}
3865
edbbb3ca
JB		 3866/**
3867 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
3868 * @adapter: address of board private structure
3869 * @rx_ring: pointer to receive ring structure
3870 * @cleaned_count: number of buffers to allocate this pass
3871 **/
3872
3873static void
3874e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
3875 struct e1000_rx_ring *rx_ring, int cleaned_count)
3876{
3877 struct net_device *netdev = adapter->netdev;
3878 struct pci_dev *pdev = adapter->pdev;
3879 struct e1000_rx_desc *rx_desc;
3880 struct e1000_buffer *buffer_info;
3881 struct sk_buff *skb;
3882 unsigned int i;
3883 unsigned int bufsz = 256 -
3884 16 /*for skb_reserve */ -
3885 NET_IP_ALIGN;
3886
3887 i = rx_ring->next_to_use;
3888 buffer_info = &rx_ring->buffer_info[i];
3889
3890 while (cleaned_count--) {
3891 skb = buffer_info->skb;
3892 if (skb) {
3893 skb_trim(skb, 0);
3894 goto check_page;
3895 }
3896
3897 skb = netdev_alloc_skb(netdev, bufsz);
3898 if (unlikely(!skb)) {
3899 /* Better luck next round */
3900 adapter->alloc_rx_buff_failed++;
3901 break;
3902 }
3903
3904 /* Fix for errata 23, can't cross 64kB boundary */
3905 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3906 struct sk_buff *oldskb = skb;
3907 DPRINTK(PROBE, ERR, "skb align check failed: %u bytes "
3908 "at %p\n", bufsz, skb->data);
3909 /* Try again, without freeing the previous */
3910 skb = netdev_alloc_skb(netdev, bufsz);
3911 /* Failed allocation, critical failure */
3912 if (!skb) {
3913 dev_kfree_skb(oldskb);
3914 adapter->alloc_rx_buff_failed++;
3915 break;
3916 }
3917
3918 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3919 /* give up */
3920 dev_kfree_skb(skb);
3921 dev_kfree_skb(oldskb);
3922 break; /* while (cleaned_count--) */
3923 }
3924
3925 /* Use new allocation */
3926 dev_kfree_skb(oldskb);
3927 }
3928 /* Make buffer alignment 2 beyond a 16 byte boundary
3929 * this will result in a 16 byte aligned IP header after
3930 * the 14 byte MAC header is removed
3931 */
3932 skb_reserve(skb, NET_IP_ALIGN);
3933
3934 buffer_info->skb = skb;
3935 buffer_info->length = adapter->rx_buffer_len;
3936check_page:
3937 /* allocate a new page if necessary */
3938 if (!buffer_info->page) {
3939 buffer_info->page = alloc_page(GFP_ATOMIC);
3940 if (unlikely(!buffer_info->page)) {
3941 adapter->alloc_rx_buff_failed++;
3942 break;
3943 }
3944 }
3945
3946 if (!buffer_info->dma)
3947 buffer_info->dma = pci_map_page(pdev,
3948 buffer_info->page, 0,
3949 buffer_info->length,
3950 PCI_DMA_FROMDEVICE);
3951
3952 rx_desc = E1000_RX_DESC(*rx_ring, i);
3953 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3954
3955 if (unlikely(++i == rx_ring->count))
3956 i = 0;
3957 buffer_info = &rx_ring->buffer_info[i];
3958 }
3959
3960 if (likely(rx_ring->next_to_use != i)) {
3961 rx_ring->next_to_use = i;
3962 if (unlikely(i-- == 0))
3963 i = (rx_ring->count - 1);
3964
3965 /* Force memory writes to complete before letting h/w
3966 * know there are new descriptors to fetch. (Only
3967 * applicable for weak-ordered memory model archs,
3968 * such as IA-64). */
3969 wmb();
3970 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3971 }
3972}
3973
1da177e4 3974/**
2d7edb92 3975 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3976 * @adapter: address of board private structure
3977 **/
3978
64798845
JP		 3979static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
3980 struct e1000_rx_ring *rx_ring,
3981 int cleaned_count)
1da177e4 3982{
1dc32918 3983 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3984 struct net_device *netdev = adapter->netdev;
3985 struct pci_dev *pdev = adapter->pdev;
3986 struct e1000_rx_desc *rx_desc;
3987 struct e1000_buffer *buffer_info;
3988 struct sk_buff *skb;
2648345f
MC		 3989 unsigned int i;
3990 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3991
3992 i = rx_ring->next_to_use;
3993 buffer_info = &rx_ring->buffer_info[i];
3994
a292ca6e 3995 while (cleaned_count--) {
ca6f7224
CH		 3996 skb = buffer_info->skb;
3997 if (skb) {
a292ca6e
JK		 3998 skb_trim(skb, 0);
3999 goto map_skb;
4000 }
4001
ca6f7224 4002 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4003 if (unlikely(!skb)) {
1da177e4 4004 /* Better luck next round */
72d64a43 4005 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4006 break;
4007 }
4008
2648345f 4009 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4010 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4011 struct sk_buff *oldskb = skb;
2648345f
MC		 4012 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4013 "at %p\n", bufsz, skb->data);
4014 /* Try again, without freeing the previous */
87f5032e 4015 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4016 /* Failed allocation, critical failure */
1da177e4
LT		 4017 if (!skb) {
4018 dev_kfree_skb(oldskb);
edbbb3ca 4019 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4020 break;
4021 }
2648345f 4022
1da177e4
LT		 4023 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4024 /* give up */
4025 dev_kfree_skb(skb);
4026 dev_kfree_skb(oldskb);
edbbb3ca 4027 adapter->alloc_rx_buff_failed++;
1da177e4 4028 break; /* while !buffer_info->skb */
1da177e4 4029 }
ca6f7224
CH		 4030
4031 /* Use new allocation */
4032 dev_kfree_skb(oldskb);
1da177e4 4033 }
1da177e4
LT		 4034 /* Make buffer alignment 2 beyond a 16 byte boundary
4035 * this will result in a 16 byte aligned IP header after
4036 * the 14 byte MAC header is removed
4037 */
4038 skb_reserve(skb, NET_IP_ALIGN);
4039
1da177e4
LT		 4040 buffer_info->skb = skb;
4041 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4042map_skb:
1da177e4
LT		 4043 buffer_info->dma = pci_map_single(pdev,
4044 skb->data,
edbbb3ca 4045 buffer_info->length,
1da177e4
LT		 4046 PCI_DMA_FROMDEVICE);
4047
edbbb3ca
JB		 4048 /*
4049 * XXX if it was allocated cleanly it will never map to a
4050 * boundary crossing
4051 */
4052
2648345f
MC		 4053 /* Fix for errata 23, can't cross 64kB boundary */
4054 if (!e1000_check_64k_bound(adapter,
4055 (void *)(unsigned long)buffer_info->dma,
4056 adapter->rx_buffer_len)) {
4057 DPRINTK(RX_ERR, ERR,
4058 "dma align check failed: %u bytes at %p\n",
4059 adapter->rx_buffer_len,
4060 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4061 dev_kfree_skb(skb);
4062 buffer_info->skb = NULL;
4063
2648345f 4064 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4065 adapter->rx_buffer_len,
4066 PCI_DMA_FROMDEVICE);
679be3ba 4067 buffer_info->dma = 0;
1da177e4 4068
edbbb3ca 4069 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4070 break; /* while !buffer_info->skb */
4071 }
1da177e4
LT		 4072 rx_desc = E1000_RX_DESC(*rx_ring, i);
4073 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4074
96838a40
JB		 4075 if (unlikely(++i == rx_ring->count))
4076 i = 0;
1da177e4
LT		 4077 buffer_info = &rx_ring->buffer_info[i];
4078 }
4079
b92ff8ee
JB		 4080 if (likely(rx_ring->next_to_use != i)) {
4081 rx_ring->next_to_use = i;
4082 if (unlikely(i-- == 0))
4083 i = (rx_ring->count - 1);
4084
4085 /* Force memory writes to complete before letting h/w
4086 * know there are new descriptors to fetch. (Only
4087 * applicable for weak-ordered memory model archs,
4088 * such as IA-64). */
4089 wmb();
1dc32918 4090 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4091 }
1da177e4
LT		 4092}
4093
4094/**
4095 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4096 * @adapter:
4097 **/
4098
64798845 4099static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4100{
1dc32918 4101 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4102 u16 phy_status;
4103 u16 phy_ctrl;
1da177e4 4104
1dc32918
JP		 4105 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4106 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4107 return;
4108
96838a40 4109 if (adapter->smartspeed == 0) {
1da177e4
LT		 4110 /* If Master/Slave config fault is asserted twice,
4111 * we assume back-to-back */
1dc32918 4112 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4113 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4114 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4115 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4116 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4117 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4118 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4119 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4120 phy_ctrl);
4121 adapter->smartspeed++;
1dc32918
JP		 4122 if (!e1000_phy_setup_autoneg(hw) &&
4123 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4124 &phy_ctrl)) {
4125 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4126 MII_CR_RESTART_AUTO_NEG);
1dc32918 4127 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4128 phy_ctrl);
4129 }
4130 }
4131 return;
96838a40 4132 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4133 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4134 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4135 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4136 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4137 if (!e1000_phy_setup_autoneg(hw) &&
4138 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4139 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4140 MII_CR_RESTART_AUTO_NEG);
1dc32918 4141 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4142 }
4143 }
4144 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4145 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4146 adapter->smartspeed = 0;
4147}
4148
4149/**
4150 * e1000_ioctl -
4151 * @netdev:
4152 * @ifreq:
4153 * @cmd:
4154 **/
4155
64798845 4156static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4157{
4158 switch (cmd) {
4159 case SIOCGMIIPHY:
4160 case SIOCGMIIREG:
4161 case SIOCSMIIREG:
4162 return e1000_mii_ioctl(netdev, ifr, cmd);
4163 default:
4164 return -EOPNOTSUPP;
4165 }
4166}
4167
4168/**
4169 * e1000_mii_ioctl -
4170 * @netdev:
4171 * @ifreq:
4172 * @cmd:
4173 **/
4174
64798845
JP		 4175static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4176 int cmd)
1da177e4 4177{
60490fe0 4178 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4179 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4180 struct mii_ioctl_data *data = if_mii(ifr);
4181 int retval;
406874a7
JP		 4182 u16 mii_reg;
4183 u16 spddplx;
97876fc6 4184 unsigned long flags;
1da177e4 4185
1dc32918 4186 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4187 return -EOPNOTSUPP;
4188
4189 switch (cmd) {
4190 case SIOCGMIIPHY:
1dc32918 4191 data->phy_id = hw->phy_addr;
1da177e4
LT		 4192 break;
4193 case SIOCGMIIREG:
97876fc6 4194 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4195 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4196 &data->val_out)) {
4197 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4198 return -EIO;
97876fc6
MC		 4199 }
4200 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4201 break;
4202 case SIOCSMIIREG:
96838a40 4203 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4204 return -EFAULT;
4205 mii_reg = data->val_in;
97876fc6 4206 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4207 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4208 mii_reg)) {
4209 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4210 return -EIO;
97876fc6 4211 }
f0163ac4 4212 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4213 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4214 switch (data->reg_num) {
4215 case PHY_CTRL:
96838a40 4216 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4217 break;
96838a40 4218 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4219 hw->autoneg = 1;
4220 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4221 } else {
4222 if (mii_reg & 0x40)
4223 spddplx = SPEED_1000;
4224 else if (mii_reg & 0x2000)
4225 spddplx = SPEED_100;
4226 else
4227 spddplx = SPEED_10;
4228 spddplx += (mii_reg & 0x100)
cb764326
JK		 4229 ? DUPLEX_FULL :
4230 DUPLEX_HALF;
1da177e4
LT		 4231 retval = e1000_set_spd_dplx(adapter,
4232 spddplx);
f0163ac4 4233 if (retval)
1da177e4
LT		 4234 return retval;
4235 }
2db10a08
AK		 4236 if (netif_running(adapter->netdev))
4237 e1000_reinit_locked(adapter);
4238 else
1da177e4
LT		 4239 e1000_reset(adapter);
4240 break;
4241 case M88E1000_PHY_SPEC_CTRL:
4242 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4243 if (e1000_phy_reset(hw))
1da177e4
LT		 4244 return -EIO;
4245 break;
4246 }
4247 } else {
4248 switch (data->reg_num) {
4249 case PHY_CTRL:
96838a40 4250 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4251 break;
2db10a08
AK		 4252 if (netif_running(adapter->netdev))
4253 e1000_reinit_locked(adapter);
4254 else
1da177e4
LT		 4255 e1000_reset(adapter);
4256 break;
4257 }
4258 }
4259 break;
4260 default:
4261 return -EOPNOTSUPP;
4262 }
4263 return E1000_SUCCESS;
4264}
4265
64798845 4266void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4267{
4268 struct e1000_adapter *adapter = hw->back;
2648345f 4269 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4270
96838a40 4271 if (ret_val)
2648345f 4272 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4273}
4274
64798845 4275void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4276{
4277 struct e1000_adapter *adapter = hw->back;
4278
4279 pci_clear_mwi(adapter->pdev);
4280}
4281
64798845 4282int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4283{
4284 struct e1000_adapter *adapter = hw->back;
4285 return pcix_get_mmrbc(adapter->pdev);
4286}
4287
64798845 4288void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4289{
4290 struct e1000_adapter *adapter = hw->back;
4291 pcix_set_mmrbc(adapter->pdev, mmrbc);
4292}
4293
64798845 4294s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
caeccb68
JK		 4295{
4296 struct e1000_adapter *adapter = hw->back;
406874a7 4297 u16 cap_offset;
caeccb68
JK		 4298
4299 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4300 if (!cap_offset)
4301 return -E1000_ERR_CONFIG;
4302
4303 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4304
4305 return E1000_SUCCESS;
4306}
4307
64798845 4308void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4309{
4310 outl(value, port);
4311}
4312
64798845
JP		 4313static void e1000_vlan_rx_register(struct net_device *netdev,
4314 struct vlan_group *grp)
1da177e4 4315{
60490fe0 4316 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4317 struct e1000_hw *hw = &adapter->hw;
406874a7 4318 u32 ctrl, rctl;
1da177e4 4319
9150b76a
JB		 4320 if (!test_bit(__E1000_DOWN, &adapter->flags))
4321 e1000_irq_disable(adapter);
1da177e4
LT		 4322 adapter->vlgrp = grp;
4323
96838a40 4324 if (grp) {
1da177e4 4325 /* enable VLAN tag insert/strip */
1dc32918 4326 ctrl = er32(CTRL);
1da177e4 4327 ctrl |= E1000_CTRL_VME;
1dc32918 4328 ew32(CTRL, ctrl);
1da177e4 4329
1532ecea
JB		 4330 /* enable VLAN receive filtering */
4331 rctl = er32(RCTL);
4332 rctl &= ~E1000_RCTL_CFIEN;
4333 if (!(netdev->flags & IFF_PROMISC))
4334 rctl |= E1000_RCTL_VFE;
4335 ew32(RCTL, rctl);
4336 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4337 } else {
4338 /* disable VLAN tag insert/strip */
1dc32918 4339 ctrl = er32(CTRL);
1da177e4 4340 ctrl &= ~E1000_CTRL_VME;
1dc32918 4341 ew32(CTRL, ctrl);
1da177e4 4342
1532ecea
JB		 4343 /* disable VLAN receive filtering */
4344 rctl = er32(RCTL);
4345 rctl &= ~E1000_RCTL_VFE;
4346 ew32(RCTL, rctl);
fd38d7a0 4347
1532ecea
JB		 4348 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
4349 e1000_vlan_rx_kill_vid(netdev,
4350 adapter->mng_vlan_id);
4351 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
cd94dd0b 4352 }
1da177e4
LT		 4353 }
4354
9150b76a
JB		 4355 if (!test_bit(__E1000_DOWN, &adapter->flags))
4356 e1000_irq_enable(adapter);
1da177e4
LT		 4357}
4358
64798845 4359static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4360{
60490fe0 4361 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4362 struct e1000_hw *hw = &adapter->hw;
406874a7 4363 u32 vfta, index;
96838a40 4364
1dc32918 4365 if ((hw->mng_cookie.status &
96838a40
JB		 4366 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4367 (vid == adapter->mng_vlan_id))
2d7edb92 4368 return;
1da177e4
LT		 4369 /* add VID to filter table */
4370 index = (vid >> 5) & 0x7F;
1dc32918 4371 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4372 vfta |= (1 << (vid & 0x1F));
1dc32918 4373 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4374}
4375
64798845 4376static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4377{
60490fe0 4378 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4379 struct e1000_hw *hw = &adapter->hw;
406874a7 4380 u32 vfta, index;
1da177e4 4381
9150b76a
JB		 4382 if (!test_bit(__E1000_DOWN, &adapter->flags))
4383 e1000_irq_disable(adapter);
5c15bdec 4384 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4385 if (!test_bit(__E1000_DOWN, &adapter->flags))
4386 e1000_irq_enable(adapter);
1da177e4
LT		 4387
4388 /* remove VID from filter table */
4389 index = (vid >> 5) & 0x7F;
1dc32918 4390 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4391 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4392 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4393}
4394
64798845 4395static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4396{
4397 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4398
96838a40 4399 if (adapter->vlgrp) {
406874a7 4400 u16 vid;
96838a40 4401 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4402 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4403 continue;
4404 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4405 }
4406 }
4407}
4408
64798845 4409int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4410{
1dc32918
JP		 4411 struct e1000_hw *hw = &adapter->hw;
4412
4413 hw->autoneg = 0;
1da177e4 4414
6921368f 4415 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4416 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4417 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4418 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4419 return -EINVAL;
4420 }
4421
96838a40 4422 switch (spddplx) {
1da177e4 4423 case SPEED_10 + DUPLEX_HALF:
1dc32918 4424 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4425 break;
4426 case SPEED_10 + DUPLEX_FULL:
1dc32918 4427 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4428 break;
4429 case SPEED_100 + DUPLEX_HALF:
1dc32918 4430 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4431 break;
4432 case SPEED_100 + DUPLEX_FULL:
1dc32918 4433 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4434 break;
4435 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4436 hw->autoneg = 1;
4437 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4438 break;
4439 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4440 default:
2648345f 4441 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4442 return -EINVAL;
4443 }
4444 return 0;
4445}
4446
b43fcd7d 4447static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4448{
4449 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4450 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4451 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4452 u32 ctrl, ctrl_ext, rctl, status;
4453 u32 wufc = adapter->wol;
6fdfef16 4454#ifdef CONFIG_PM
240b1710 4455 int retval = 0;
6fdfef16 4456#endif
1da177e4
LT		 4457
4458 netif_device_detach(netdev);
4459
2db10a08
AK		 4460 if (netif_running(netdev)) {
4461 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4462 e1000_down(adapter);
2db10a08 4463 }
1da177e4 4464
2f82665f 4465#ifdef CONFIG_PM
1d33e9c6 4466 retval = pci_save_state(pdev);
2f82665f
JB		 4467 if (retval)
4468 return retval;
4469#endif
4470
1dc32918 4471 status = er32(STATUS);
96838a40 4472 if (status & E1000_STATUS_LU)
1da177e4
LT		 4473 wufc &= ~E1000_WUFC_LNKC;
4474
96838a40 4475 if (wufc) {
1da177e4 4476 e1000_setup_rctl(adapter);
db0ce50d 4477 e1000_set_rx_mode(netdev);
1da177e4
LT		 4478
4479 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4480 if (wufc & E1000_WUFC_MC) {
1dc32918 4481 rctl = er32(RCTL);
1da177e4 4482 rctl |= E1000_RCTL_MPE;
1dc32918 4483 ew32(RCTL, rctl);
1da177e4
LT		 4484 }
4485
1dc32918
JP		 4486 if (hw->mac_type >= e1000_82540) {
4487 ctrl = er32(CTRL);
1da177e4
LT		 4488 /* advertise wake from D3Cold */
4489 #define E1000_CTRL_ADVD3WUC 0x00100000
4490 /* phy power management enable */
4491 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4492 ctrl |= E1000_CTRL_ADVD3WUC |
4493 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4494 ew32(CTRL, ctrl);
1da177e4
LT		 4495 }
4496
1dc32918 4497 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 4498 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4499 /* keep the laser running in D3 */
1dc32918 4500 ctrl_ext = er32(CTRL_EXT);
1da177e4 4501 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4502 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4503 }
4504
1dc32918
JP		 4505 ew32(WUC, E1000_WUC_PME_EN);
4506 ew32(WUFC, wufc);
1da177e4 4507 } else {
1dc32918
JP		 4508 ew32(WUC, 0);
4509 ew32(WUFC, 0);
1da177e4
LT		 4510 }
4511
0fccd0e9
JG		 4512 e1000_release_manageability(adapter);
4513
b43fcd7d
RW		 4514 *enable_wake = !!wufc;
4515
0fccd0e9 4516 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 4517 if (adapter->en_mng_pt)
4518 *enable_wake = true;
1da177e4 4519
edd106fc
AK		 4520 if (netif_running(netdev))
4521 e1000_free_irq(adapter);
4522
1da177e4 4523 pci_disable_device(pdev);
240b1710 4524
1da177e4
LT		 4525 return 0;
4526}
4527
2f82665f 4528#ifdef CONFIG_PM
b43fcd7d
RW		 4529static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4530{
4531 int retval;
4532 bool wake;
4533
4534 retval = __e1000_shutdown(pdev, &wake);
4535 if (retval)
4536 return retval;
4537
4538 if (wake) {
4539 pci_prepare_to_sleep(pdev);
4540 } else {
4541 pci_wake_from_d3(pdev, false);
4542 pci_set_power_state(pdev, PCI_D3hot);
4543 }
4544
4545 return 0;
4546}
4547
64798845 4548static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4549{
4550 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4551 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4552 struct e1000_hw *hw = &adapter->hw;
406874a7 4553 u32 err;
1da177e4 4554
d0e027db 4555 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4556 pci_restore_state(pdev);
81250297
TI		 4557
4558 if (adapter->need_ioport)
4559 err = pci_enable_device(pdev);
4560 else
4561 err = pci_enable_device_mem(pdev);
c7be73bc 4562 if (err) {
3d1dd8cb
AK		 4563 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4564 return err;
4565 }
a4cb847d 4566 pci_set_master(pdev);
1da177e4 4567
d0e027db
AK		 4568 pci_enable_wake(pdev, PCI_D3hot, 0);
4569 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4570
c7be73bc
JP		 4571 if (netif_running(netdev)) {
4572 err = e1000_request_irq(adapter);
4573 if (err)
4574 return err;
4575 }
edd106fc
AK		 4576
4577 e1000_power_up_phy(adapter);
1da177e4 4578 e1000_reset(adapter);
1dc32918 4579 ew32(WUS, ~0);
1da177e4 4580
0fccd0e9
JG		 4581 e1000_init_manageability(adapter);
4582
96838a40 4583 if (netif_running(netdev))
1da177e4
LT		 4584 e1000_up(adapter);
4585
4586 netif_device_attach(netdev);
4587
1da177e4
LT		 4588 return 0;
4589}
4590#endif
c653e635
AK		 4591
4592static void e1000_shutdown(struct pci_dev *pdev)
4593{
b43fcd7d
RW		 4594 bool wake;
4595
4596 __e1000_shutdown(pdev, &wake);
4597
4598 if (system_state == SYSTEM_POWER_OFF) {
4599 pci_wake_from_d3(pdev, wake);
4600 pci_set_power_state(pdev, PCI_D3hot);
4601 }
c653e635
AK		 4602}
4603
1da177e4
LT		 4604#ifdef CONFIG_NET_POLL_CONTROLLER
4605/*
4606 * Polling 'interrupt' - used by things like netconsole to send skbs
4607 * without having to re-enable interrupts. It's not called while
4608 * the interrupt routine is executing.
4609 */
64798845 4610static void e1000_netpoll(struct net_device *netdev)
1da177e4 4611{
60490fe0 4612 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4613
1da177e4 4614 disable_irq(adapter->pdev->irq);
7d12e780 4615 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4616 enable_irq(adapter->pdev->irq);
4617}
4618#endif
4619
9026729b
AK		 4620/**
4621 * e1000_io_error_detected - called when PCI error is detected
4622 * @pdev: Pointer to PCI device
4623 * @state: The current pci conneection state
4624 *
4625 * This function is called after a PCI bus error affecting
4626 * this device has been detected.
4627 */
64798845
JP		 4628static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4629 pci_channel_state_t state)
9026729b
AK		 4630{
4631 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4632 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4633
4634 netif_device_detach(netdev);
4635
eab63302
AD		 4636 if (state == pci_channel_io_perm_failure)
4637 return PCI_ERS_RESULT_DISCONNECT;
4638
9026729b
AK		 4639 if (netif_running(netdev))
4640 e1000_down(adapter);
72e8d6bb 4641 pci_disable_device(pdev);
9026729b
AK		 4642
4643 /* Request a slot slot reset. */
4644 return PCI_ERS_RESULT_NEED_RESET;
4645}
4646
4647/**
4648 * e1000_io_slot_reset - called after the pci bus has been reset.
4649 * @pdev: Pointer to PCI device
4650 *
4651 * Restart the card from scratch, as if from a cold-boot. Implementation
4652 * resembles the first-half of the e1000_resume routine.
4653 */
4654static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4655{
4656 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4657 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4658 struct e1000_hw *hw = &adapter->hw;
81250297 4659 int err;
9026729b 4660
81250297
TI		 4661 if (adapter->need_ioport)
4662 err = pci_enable_device(pdev);
4663 else
4664 err = pci_enable_device_mem(pdev);
4665 if (err) {
9026729b
AK		 4666 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4667 return PCI_ERS_RESULT_DISCONNECT;
4668 }
4669 pci_set_master(pdev);
4670
dbf38c94
LV		 4671 pci_enable_wake(pdev, PCI_D3hot, 0);
4672 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4673
9026729b 4674 e1000_reset(adapter);
1dc32918 4675 ew32(WUS, ~0);
9026729b
AK		 4676
4677 return PCI_ERS_RESULT_RECOVERED;
4678}
4679
4680/**
4681 * e1000_io_resume - called when traffic can start flowing again.
4682 * @pdev: Pointer to PCI device
4683 *
4684 * This callback is called when the error recovery driver tells us that
4685 * its OK to resume normal operation. Implementation resembles the
4686 * second-half of the e1000_resume routine.
4687 */
4688static void e1000_io_resume(struct pci_dev *pdev)
4689{
4690 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4691 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 4692
4693 e1000_init_manageability(adapter);
9026729b
AK		 4694
4695 if (netif_running(netdev)) {
4696 if (e1000_up(adapter)) {
4697 printk("e1000: can't bring device back up after reset\n");
4698 return;
4699 }
4700 }
4701
4702 netif_device_attach(netdev);
9026729b
AK		 4703}
4704
1da177e4 4705/* e1000_main.c */
Linux kernel - Deliverables
This page took 1.125156 seconds and 5 git commands to generate.