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e1000: multi-queue defines/modification to data structures
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
31/* Change Log
2b02893e
MC		 32 * 6.0.58 4/20/05
33 * o Accepted ethtool cleanup patch from Stephen Hemminger
2648345f
MC		 34 * 6.0.44+ 2/15/05
35 * o applied Anton's patch to resolve tx hang in hardware
36 * o Applied Andrew Mortons patch - e1000 stops working after resume
1da177e4
LT		 37 */
38
39char e1000_driver_name[] = "e1000";
40char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
41#ifndef CONFIG_E1000_NAPI
42#define DRIVERNAPI
43#else
44#define DRIVERNAPI "-NAPI"
45#endif
2b02893e 46#define DRV_VERSION "6.0.60-k2"DRIVERNAPI
1da177e4 47char e1000_driver_version[] = DRV_VERSION;
2b02893e 48char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 49
50/* e1000_pci_tbl - PCI Device ID Table
51 *
52 * Last entry must be all 0s
53 *
54 * Macro expands to...
55 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
56 */
57static struct pci_device_id e1000_pci_tbl[] = {
58 INTEL_E1000_ETHERNET_DEVICE(0x1000),
59 INTEL_E1000_ETHERNET_DEVICE(0x1001),
60 INTEL_E1000_ETHERNET_DEVICE(0x1004),
61 INTEL_E1000_ETHERNET_DEVICE(0x1008),
62 INTEL_E1000_ETHERNET_DEVICE(0x1009),
63 INTEL_E1000_ETHERNET_DEVICE(0x100C),
64 INTEL_E1000_ETHERNET_DEVICE(0x100D),
65 INTEL_E1000_ETHERNET_DEVICE(0x100E),
66 INTEL_E1000_ETHERNET_DEVICE(0x100F),
67 INTEL_E1000_ETHERNET_DEVICE(0x1010),
68 INTEL_E1000_ETHERNET_DEVICE(0x1011),
69 INTEL_E1000_ETHERNET_DEVICE(0x1012),
70 INTEL_E1000_ETHERNET_DEVICE(0x1013),
71 INTEL_E1000_ETHERNET_DEVICE(0x1014),
72 INTEL_E1000_ETHERNET_DEVICE(0x1015),
73 INTEL_E1000_ETHERNET_DEVICE(0x1016),
74 INTEL_E1000_ETHERNET_DEVICE(0x1017),
75 INTEL_E1000_ETHERNET_DEVICE(0x1018),
76 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 77 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 78 INTEL_E1000_ETHERNET_DEVICE(0x101D),
79 INTEL_E1000_ETHERNET_DEVICE(0x101E),
80 INTEL_E1000_ETHERNET_DEVICE(0x1026),
81 INTEL_E1000_ETHERNET_DEVICE(0x1027),
82 INTEL_E1000_ETHERNET_DEVICE(0x1028),
83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
91 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 92 INTEL_E1000_ETHERNET_DEVICE(0x108B),
93 INTEL_E1000_ETHERNET_DEVICE(0x108C),
94 INTEL_E1000_ETHERNET_DEVICE(0x1099),
1da177e4
LT		 95 /* required last entry */
96 {0,}
97};
98
99MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
100
101int e1000_up(struct e1000_adapter *adapter);
102void e1000_down(struct e1000_adapter *adapter);
103void e1000_reset(struct e1000_adapter *adapter);
104int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
581d708e
MC		 105int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
106int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
107void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
108void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
109int e1000_setup_tx_resources(struct e1000_adapter *adapter,
110 struct e1000_tx_ring *txdr);
111int e1000_setup_rx_resources(struct e1000_adapter *adapter,
112 struct e1000_rx_ring *rxdr);
113void e1000_free_tx_resources(struct e1000_adapter *adapter,
114 struct e1000_tx_ring *tx_ring);
115void e1000_free_rx_resources(struct e1000_adapter *adapter,
116 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 117void e1000_update_stats(struct e1000_adapter *adapter);
118
119/* Local Function Prototypes */
120
121static int e1000_init_module(void);
122static void e1000_exit_module(void);
123static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
124static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e
MC		 125static int e1000_alloc_queues(struct e1000_adapter *adapter);
126#ifdef CONFIG_E1000_MQ
127static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
128#endif
1da177e4
LT		 129static int e1000_sw_init(struct e1000_adapter *adapter);
130static int e1000_open(struct net_device *netdev);
131static int e1000_close(struct net_device *netdev);
132static void e1000_configure_tx(struct e1000_adapter *adapter);
133static void e1000_configure_rx(struct e1000_adapter *adapter);
134static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 135static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
136static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
137static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
138 struct e1000_tx_ring *tx_ring);
139static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
140 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 141static void e1000_set_multi(struct net_device *netdev);
142static void e1000_update_phy_info(unsigned long data);
143static void e1000_watchdog(unsigned long data);
144static void e1000_watchdog_task(struct e1000_adapter *adapter);
145static void e1000_82547_tx_fifo_stall(unsigned long data);
146static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
147static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
148static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
149static int e1000_set_mac(struct net_device *netdev, void *p);
150static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 151static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
152 struct e1000_tx_ring *tx_ring);
1da177e4 153#ifdef CONFIG_E1000_NAPI
581d708e 154static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 155static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 156 struct e1000_rx_ring *rx_ring,
1da177e4 157 int *work_done, int work_to_do);
2d7edb92 158static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 159 struct e1000_rx_ring *rx_ring,
2d7edb92 160 int *work_done, int work_to_do);
1da177e4 161#else
581d708e
MC		 162static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
163 struct e1000_rx_ring *rx_ring);
164static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
165 struct e1000_rx_ring *rx_ring);
1da177e4 166#endif
581d708e
MC		 167static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
168 struct e1000_rx_ring *rx_ring);
169static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
170 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 171static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
172static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
173 int cmd);
174void e1000_set_ethtool_ops(struct net_device *netdev);
175static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
176static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
177static void e1000_tx_timeout(struct net_device *dev);
178static void e1000_tx_timeout_task(struct net_device *dev);
179static void e1000_smartspeed(struct e1000_adapter *adapter);
180static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
181 struct sk_buff *skb);
182
183static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
184static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
185static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
186static void e1000_restore_vlan(struct e1000_adapter *adapter);
187
829ca9a3 188static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 189#ifdef CONFIG_PM
190static int e1000_resume(struct pci_dev *pdev);
191#endif
192
193#ifdef CONFIG_NET_POLL_CONTROLLER
194/* for netdump / net console */
195static void e1000_netpoll (struct net_device *netdev);
196#endif
197
1da177e4
LT		 198/* Exported from other modules */
199
200extern void e1000_check_options(struct e1000_adapter *adapter);
201
202static struct pci_driver e1000_driver = {
203 .name = e1000_driver_name,
204 .id_table = e1000_pci_tbl,
205 .probe = e1000_probe,
206 .remove = __devexit_p(e1000_remove),
207 /* Power Managment Hooks */
208#ifdef CONFIG_PM
209 .suspend = e1000_suspend,
210 .resume = e1000_resume
211#endif
212};
213
214MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
215MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
216MODULE_LICENSE("GPL");
217MODULE_VERSION(DRV_VERSION);
218
219static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
220module_param(debug, int, 0);
221MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
222
223/**
224 * e1000_init_module - Driver Registration Routine
225 *
226 * e1000_init_module is the first routine called when the driver is
227 * loaded. All it does is register with the PCI subsystem.
228 **/
229
230static int __init
231e1000_init_module(void)
232{
233 int ret;
234 printk(KERN_INFO "%s - version %s\n",
235 e1000_driver_string, e1000_driver_version);
236
237 printk(KERN_INFO "%s\n", e1000_copyright);
238
239 ret = pci_module_init(&e1000_driver);
8b378def 240
1da177e4
LT		 241 return ret;
242}
243
244module_init(e1000_init_module);
245
246/**
247 * e1000_exit_module - Driver Exit Cleanup Routine
248 *
249 * e1000_exit_module is called just before the driver is removed
250 * from memory.
251 **/
252
253static void __exit
254e1000_exit_module(void)
255{
1da177e4
LT		 256 pci_unregister_driver(&e1000_driver);
257}
258
259module_exit(e1000_exit_module);
260
261/**
262 * e1000_irq_disable - Mask off interrupt generation on the NIC
263 * @adapter: board private structure
264 **/
265
266static inline void
267e1000_irq_disable(struct e1000_adapter *adapter)
268{
269 atomic_inc(&adapter->irq_sem);
270 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
271 E1000_WRITE_FLUSH(&adapter->hw);
272 synchronize_irq(adapter->pdev->irq);
273}
274
275/**
276 * e1000_irq_enable - Enable default interrupt generation settings
277 * @adapter: board private structure
278 **/
279
280static inline void
281e1000_irq_enable(struct e1000_adapter *adapter)
282{
283 if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
284 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
285 E1000_WRITE_FLUSH(&adapter->hw);
286 }
287}
2d7edb92
MC		 288void
289e1000_update_mng_vlan(struct e1000_adapter *adapter)
290{
291 struct net_device *netdev = adapter->netdev;
292 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
293 uint16_t old_vid = adapter->mng_vlan_id;
294 if(adapter->vlgrp) {
295 if(!adapter->vlgrp->vlan_devices[vid]) {
296 if(adapter->hw.mng_cookie.status &
297 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
298 e1000_vlan_rx_add_vid(netdev, vid);
299 adapter->mng_vlan_id = vid;
300 } else
301 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
302
303 if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
304 (vid != old_vid) &&
305 !adapter->vlgrp->vlan_devices[old_vid])
306 e1000_vlan_rx_kill_vid(netdev, old_vid);
307 }
308 }
309}
310
1da177e4
LT		 311int
312e1000_up(struct e1000_adapter *adapter)
313{
314 struct net_device *netdev = adapter->netdev;
581d708e 315 int i, err;
1da177e4
LT		 316
317 /* hardware has been reset, we need to reload some things */
318
319 /* Reset the PHY if it was previously powered down */
320 if(adapter->hw.media_type == e1000_media_type_copper) {
321 uint16_t mii_reg;
322 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
323 if(mii_reg & MII_CR_POWER_DOWN)
324 e1000_phy_reset(&adapter->hw);
325 }
326
327 e1000_set_multi(netdev);
328
329 e1000_restore_vlan(adapter);
330
331 e1000_configure_tx(adapter);
332 e1000_setup_rctl(adapter);
333 e1000_configure_rx(adapter);
581d708e
MC		 334 for (i = 0; i < adapter->num_queues; i++)
335 adapter->alloc_rx_buf(adapter, &adapter->rx_ring[i]);
1da177e4 336
fa4f7ef3
MC		 337#ifdef CONFIG_PCI_MSI
338 if(adapter->hw.mac_type > e1000_82547_rev_2) {
339 adapter->have_msi = TRUE;
340 if((err = pci_enable_msi(adapter->pdev))) {
341 DPRINTK(PROBE, ERR,
342 "Unable to allocate MSI interrupt Error: %d\n", err);
343 adapter->have_msi = FALSE;
344 }
345 }
346#endif
1da177e4
LT		 347 if((err = request_irq(adapter->pdev->irq, &e1000_intr,
348 SA_SHIRQ | SA_SAMPLE_RANDOM,
2648345f
MC		 349 netdev->name, netdev))) {
350 DPRINTK(PROBE, ERR,
351 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 352 return err;
2648345f 353 }
1da177e4
LT		 354
355 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 356
357#ifdef CONFIG_E1000_NAPI
358 netif_poll_enable(netdev);
359#endif
5de55624
MC		 360 e1000_irq_enable(adapter);
361
1da177e4
LT		 362 return 0;
363}
364
365void
366e1000_down(struct e1000_adapter *adapter)
367{
368 struct net_device *netdev = adapter->netdev;
369
370 e1000_irq_disable(adapter);
371 free_irq(adapter->pdev->irq, netdev);
fa4f7ef3
MC		 372#ifdef CONFIG_PCI_MSI
373 if(adapter->hw.mac_type > e1000_82547_rev_2 &&
374 adapter->have_msi == TRUE)
375 pci_disable_msi(adapter->pdev);
376#endif
1da177e4
LT		 377 del_timer_sync(&adapter->tx_fifo_stall_timer);
378 del_timer_sync(&adapter->watchdog_timer);
379 del_timer_sync(&adapter->phy_info_timer);
380
381#ifdef CONFIG_E1000_NAPI
382 netif_poll_disable(netdev);
383#endif
384 adapter->link_speed = 0;
385 adapter->link_duplex = 0;
386 netif_carrier_off(netdev);
387 netif_stop_queue(netdev);
388
389 e1000_reset(adapter);
581d708e
MC		 390 e1000_clean_all_tx_rings(adapter);
391 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 392
393 /* If WoL is not enabled
2d7edb92 394 * and management mode is not IAMT
1da177e4 395 * Power down the PHY so no link is implied when interface is down */
2d7edb92
MC		 396 if(!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
397 adapter->hw.media_type == e1000_media_type_copper &&
398 !e1000_check_mng_mode(&adapter->hw) &&
399 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN)) {
1da177e4
LT		 400 uint16_t mii_reg;
401 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
402 mii_reg |= MII_CR_POWER_DOWN;
403 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
4e48a2b9 404 mdelay(1);
1da177e4
LT		 405 }
406}
407
408void
409e1000_reset(struct e1000_adapter *adapter)
410{
1125ecbc 411 struct net_device *netdev = adapter->netdev;
2d7edb92 412 uint32_t pba, manc;
1125ecbc
MC		 413 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
414 uint16_t fc_low_water_mark = E1000_FC_LOW_DIFF;
1da177e4
LT		 415
416 /* Repartition Pba for greater than 9k mtu
417 * To take effect CTRL.RST is required.
418 */
419
2d7edb92
MC		 420 switch (adapter->hw.mac_type) {
421 case e1000_82547:
0e6ef3e0 422 case e1000_82547_rev_2:
2d7edb92
MC		 423 pba = E1000_PBA_30K;
424 break;
868d5309
MC		 425 case e1000_82571:
426 case e1000_82572:
427 pba = E1000_PBA_38K;
428 break;
2d7edb92
MC		 429 case e1000_82573:
430 pba = E1000_PBA_12K;
431 break;
432 default:
433 pba = E1000_PBA_48K;
434 break;
435 }
436
1125ecbc
MC		 437 if((adapter->hw.mac_type != e1000_82573) &&
438 (adapter->rx_buffer_len > E1000_RXBUFFER_8192)) {
439 pba -= 8; /* allocate more FIFO for Tx */
440 /* send an XOFF when there is enough space in the
441 * Rx FIFO to hold one extra full size Rx packet
442 */
443 fc_high_water_mark = netdev->mtu + ENET_HEADER_SIZE +
444 ETHERNET_FCS_SIZE + 1;
445 fc_low_water_mark = fc_high_water_mark + 8;
446 }
2d7edb92
MC		 447
448
449 if(adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 450 adapter->tx_fifo_head = 0;
451 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
452 adapter->tx_fifo_size =
453 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
454 atomic_set(&adapter->tx_fifo_stall, 0);
455 }
2d7edb92 456
1da177e4
LT		 457 E1000_WRITE_REG(&adapter->hw, PBA, pba);
458
459 /* flow control settings */
460 adapter->hw.fc_high_water = (pba << E1000_PBA_BYTES_SHIFT) -
1125ecbc 461 fc_high_water_mark;
1da177e4 462 adapter->hw.fc_low_water = (pba << E1000_PBA_BYTES_SHIFT) -
1125ecbc 463 fc_low_water_mark;
1da177e4
LT		 464 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
465 adapter->hw.fc_send_xon = 1;
466 adapter->hw.fc = adapter->hw.original_fc;
467
2d7edb92 468 /* Allow time for pending master requests to run */
1da177e4
LT		 469 e1000_reset_hw(&adapter->hw);
470 if(adapter->hw.mac_type >= e1000_82544)
471 E1000_WRITE_REG(&adapter->hw, WUC, 0);
472 if(e1000_init_hw(&adapter->hw))
473 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 474 e1000_update_mng_vlan(adapter);
1da177e4
LT		 475 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
476 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
477
478 e1000_reset_adaptive(&adapter->hw);
479 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2d7edb92
MC		 480 if (adapter->en_mng_pt) {
481 manc = E1000_READ_REG(&adapter->hw, MANC);
482 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
483 E1000_WRITE_REG(&adapter->hw, MANC, manc);
484 }
1da177e4
LT		 485}
486
487/**
488 * e1000_probe - Device Initialization Routine
489 * @pdev: PCI device information struct
490 * @ent: entry in e1000_pci_tbl
491 *
492 * Returns 0 on success, negative on failure
493 *
494 * e1000_probe initializes an adapter identified by a pci_dev structure.
495 * The OS initialization, configuring of the adapter private structure,
496 * and a hardware reset occur.
497 **/
498
499static int __devinit
500e1000_probe(struct pci_dev *pdev,
501 const struct pci_device_id *ent)
502{
503 struct net_device *netdev;
504 struct e1000_adapter *adapter;
2d7edb92 505 unsigned long mmio_start, mmio_len;
868d5309 506 uint32_t ctrl_ext;
2d7edb92
MC		 507 uint32_t swsm;
508
1da177e4 509 static int cards_found = 0;
2d7edb92 510 int i, err, pci_using_dac;
1da177e4
LT		 511 uint16_t eeprom_data;
512 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
1da177e4
LT		 513 if((err = pci_enable_device(pdev)))
514 return err;
515
516 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
517 pci_using_dac = 1;
518 } else {
519 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
520 E1000_ERR("No usable DMA configuration, aborting\n");
521 return err;
522 }
523 pci_using_dac = 0;
524 }
525
526 if((err = pci_request_regions(pdev, e1000_driver_name)))
527 return err;
528
529 pci_set_master(pdev);
530
531 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
532 if(!netdev) {
533 err = -ENOMEM;
534 goto err_alloc_etherdev;
535 }
536
537 SET_MODULE_OWNER(netdev);
538 SET_NETDEV_DEV(netdev, &pdev->dev);
539
540 pci_set_drvdata(pdev, netdev);
60490fe0 541 adapter = netdev_priv(netdev);
1da177e4
LT		 542 adapter->netdev = netdev;
543 adapter->pdev = pdev;
544 adapter->hw.back = adapter;
545 adapter->msg_enable = (1 << debug) - 1;
546
547 mmio_start = pci_resource_start(pdev, BAR_0);
548 mmio_len = pci_resource_len(pdev, BAR_0);
549
550 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
551 if(!adapter->hw.hw_addr) {
552 err = -EIO;
553 goto err_ioremap;
554 }
555
556 for(i = BAR_1; i <= BAR_5; i++) {
557 if(pci_resource_len(pdev, i) == 0)
558 continue;
559 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
560 adapter->hw.io_base = pci_resource_start(pdev, i);
561 break;
562 }
563 }
564
565 netdev->open = &e1000_open;
566 netdev->stop = &e1000_close;
567 netdev->hard_start_xmit = &e1000_xmit_frame;
568 netdev->get_stats = &e1000_get_stats;
569 netdev->set_multicast_list = &e1000_set_multi;
570 netdev->set_mac_address = &e1000_set_mac;
571 netdev->change_mtu = &e1000_change_mtu;
572 netdev->do_ioctl = &e1000_ioctl;
573 e1000_set_ethtool_ops(netdev);
574 netdev->tx_timeout = &e1000_tx_timeout;
575 netdev->watchdog_timeo = 5 * HZ;
576#ifdef CONFIG_E1000_NAPI
577 netdev->poll = &e1000_clean;
578 netdev->weight = 64;
579#endif
580 netdev->vlan_rx_register = e1000_vlan_rx_register;
581 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
582 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
583#ifdef CONFIG_NET_POLL_CONTROLLER
584 netdev->poll_controller = e1000_netpoll;
585#endif
586 strcpy(netdev->name, pci_name(pdev));
587
588 netdev->mem_start = mmio_start;
589 netdev->mem_end = mmio_start + mmio_len;
590 netdev->base_addr = adapter->hw.io_base;
591
592 adapter->bd_number = cards_found;
593
594 /* setup the private structure */
595
596 if((err = e1000_sw_init(adapter)))
597 goto err_sw_init;
598
2d7edb92
MC		 599 if((err = e1000_check_phy_reset_block(&adapter->hw)))
600 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
601
1da177e4
LT		 602 if(adapter->hw.mac_type >= e1000_82543) {
603 netdev->features = NETIF_F_SG |
604 NETIF_F_HW_CSUM |
605 NETIF_F_HW_VLAN_TX |
606 NETIF_F_HW_VLAN_RX |
607 NETIF_F_HW_VLAN_FILTER;
608 }
609
610#ifdef NETIF_F_TSO
611 if((adapter->hw.mac_type >= e1000_82544) &&
612 (adapter->hw.mac_type != e1000_82547))
613 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 614
615#ifdef NETIF_F_TSO_IPV6
616 if(adapter->hw.mac_type > e1000_82547_rev_2)
617 netdev->features |= NETIF_F_TSO_IPV6;
618#endif
1da177e4
LT		 619#endif
620 if(pci_using_dac)
621 netdev->features |= NETIF_F_HIGHDMA;
622
623 /* hard_start_xmit is safe against parallel locking */
624 netdev->features |= NETIF_F_LLTX;
625
2d7edb92
MC		 626 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
627
1da177e4
LT		 628 /* before reading the EEPROM, reset the controller to
629 * put the device in a known good starting state */
630
631 e1000_reset_hw(&adapter->hw);
632
633 /* make sure the EEPROM is good */
634
635 if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
636 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
637 err = -EIO;
638 goto err_eeprom;
639 }
640
641 /* copy the MAC address out of the EEPROM */
642
2648345f 643 if(e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 644 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
645 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 646 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 647
9beb0ac1 648 if(!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 649 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
650 err = -EIO;
651 goto err_eeprom;
652 }
653
654 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
655
656 e1000_get_bus_info(&adapter->hw);
657
658 init_timer(&adapter->tx_fifo_stall_timer);
659 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
660 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
661
662 init_timer(&adapter->watchdog_timer);
663 adapter->watchdog_timer.function = &e1000_watchdog;
664 adapter->watchdog_timer.data = (unsigned long) adapter;
665
666 INIT_WORK(&adapter->watchdog_task,
667 (void (*)(void *))e1000_watchdog_task, adapter);
668
669 init_timer(&adapter->phy_info_timer);
670 adapter->phy_info_timer.function = &e1000_update_phy_info;
671 adapter->phy_info_timer.data = (unsigned long) adapter;
672
673 INIT_WORK(&adapter->tx_timeout_task,
674 (void (*)(void *))e1000_tx_timeout_task, netdev);
675
676 /* we're going to reset, so assume we have no link for now */
677
678 netif_carrier_off(netdev);
679 netif_stop_queue(netdev);
680
681 e1000_check_options(adapter);
682
683 /* Initial Wake on LAN setting
684 * If APM wake is enabled in the EEPROM,
685 * enable the ACPI Magic Packet filter
686 */
687
688 switch(adapter->hw.mac_type) {
689 case e1000_82542_rev2_0:
690 case e1000_82542_rev2_1:
691 case e1000_82543:
692 break;
693 case e1000_82544:
694 e1000_read_eeprom(&adapter->hw,
695 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
696 eeprom_apme_mask = E1000_EEPROM_82544_APM;
697 break;
698 case e1000_82546:
699 case e1000_82546_rev_3:
700 if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
701 && (adapter->hw.media_type == e1000_media_type_copper)) {
702 e1000_read_eeprom(&adapter->hw,
703 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
704 break;
705 }
706 /* Fall Through */
707 default:
708 e1000_read_eeprom(&adapter->hw,
709 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
710 break;
711 }
712 if(eeprom_data & eeprom_apme_mask)
713 adapter->wol |= E1000_WUFC_MAG;
714
715 /* reset the hardware with the new settings */
716 e1000_reset(adapter);
717
2d7edb92
MC		 718 /* Let firmware know the driver has taken over */
719 switch(adapter->hw.mac_type) {
868d5309
MC		 720 case e1000_82571:
721 case e1000_82572:
722 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
723 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
724 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
725 break;
2d7edb92
MC		 726 case e1000_82573:
727 swsm = E1000_READ_REG(&adapter->hw, SWSM);
728 E1000_WRITE_REG(&adapter->hw, SWSM,
729 swsm | E1000_SWSM_DRV_LOAD);
730 break;
731 default:
732 break;
733 }
734
1da177e4
LT		 735 strcpy(netdev->name, "eth%d");
736 if((err = register_netdev(netdev)))
737 goto err_register;
738
739 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
740
741 cards_found++;
742 return 0;
743
744err_register:
745err_sw_init:
746err_eeprom:
747 iounmap(adapter->hw.hw_addr);
748err_ioremap:
749 free_netdev(netdev);
750err_alloc_etherdev:
751 pci_release_regions(pdev);
752 return err;
753}
754
755/**
756 * e1000_remove - Device Removal Routine
757 * @pdev: PCI device information struct
758 *
759 * e1000_remove is called by the PCI subsystem to alert the driver
760 * that it should release a PCI device. The could be caused by a
761 * Hot-Plug event, or because the driver is going to be removed from
762 * memory.
763 **/
764
765static void __devexit
766e1000_remove(struct pci_dev *pdev)
767{
768 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 769 struct e1000_adapter *adapter = netdev_priv(netdev);
868d5309 770 uint32_t ctrl_ext;
2d7edb92 771 uint32_t manc, swsm;
1da177e4
LT		 772
773 flush_scheduled_work();
581d708e
MC		 774#ifdef CONFIG_E1000_NAPI
775 int i;
776#endif
1da177e4
LT		 777
778 if(adapter->hw.mac_type >= e1000_82540 &&
779 adapter->hw.media_type == e1000_media_type_copper) {
780 manc = E1000_READ_REG(&adapter->hw, MANC);
781 if(manc & E1000_MANC_SMBUS_EN) {
782 manc |= E1000_MANC_ARP_EN;
783 E1000_WRITE_REG(&adapter->hw, MANC, manc);
784 }
785 }
786
2d7edb92 787 switch(adapter->hw.mac_type) {
868d5309
MC		 788 case e1000_82571:
789 case e1000_82572:
790 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
791 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
792 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
793 break;
2d7edb92
MC		 794 case e1000_82573:
795 swsm = E1000_READ_REG(&adapter->hw, SWSM);
796 E1000_WRITE_REG(&adapter->hw, SWSM,
797 swsm & ~E1000_SWSM_DRV_LOAD);
798 break;
799
800 default:
801 break;
802 }
803
1da177e4 804 unregister_netdev(netdev);
581d708e
MC		 805#ifdef CONFIG_E1000_NAPI
806 for (i = 0; i < adapter->num_queues; i++)
807 __dev_put(&adapter->polling_netdev[i]);
808#endif
1da177e4 809
2d7edb92
MC		 810 if(!e1000_check_phy_reset_block(&adapter->hw))
811 e1000_phy_hw_reset(&adapter->hw);
1da177e4
LT		 812
813 iounmap(adapter->hw.hw_addr);
814 pci_release_regions(pdev);
815
816 free_netdev(netdev);
817
818 pci_disable_device(pdev);
819}
820
821/**
822 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
823 * @adapter: board private structure to initialize
824 *
825 * e1000_sw_init initializes the Adapter private data structure.
826 * Fields are initialized based on PCI device information and
827 * OS network device settings (MTU size).
828 **/
829
830static int __devinit
831e1000_sw_init(struct e1000_adapter *adapter)
832{
833 struct e1000_hw *hw = &adapter->hw;
834 struct net_device *netdev = adapter->netdev;
835 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 836#ifdef CONFIG_E1000_NAPI
837 int i;
838#endif
1da177e4
LT		 839
840 /* PCI config space info */
841
842 hw->vendor_id = pdev->vendor;
843 hw->device_id = pdev->device;
844 hw->subsystem_vendor_id = pdev->subsystem_vendor;
845 hw->subsystem_id = pdev->subsystem_device;
846
847 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
848
849 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
850
851 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2d7edb92 852 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
1da177e4
LT		 853 hw->max_frame_size = netdev->mtu +
854 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
855 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
856
857 /* identify the MAC */
858
859 if(e1000_set_mac_type(hw)) {
860 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
861 return -EIO;
862 }
863
864 /* initialize eeprom parameters */
865
2d7edb92
MC		 866 if(e1000_init_eeprom_params(hw)) {
867 E1000_ERR("EEPROM initialization failed\n");
868 return -EIO;
869 }
1da177e4
LT		 870
871 switch(hw->mac_type) {
872 default:
873 break;
874 case e1000_82541:
875 case e1000_82547:
876 case e1000_82541_rev_2:
877 case e1000_82547_rev_2:
878 hw->phy_init_script = 1;
879 break;
880 }
881
882 e1000_set_media_type(hw);
883
884 hw->wait_autoneg_complete = FALSE;
885 hw->tbi_compatibility_en = TRUE;
886 hw->adaptive_ifs = TRUE;
887
888 /* Copper options */
889
890 if(hw->media_type == e1000_media_type_copper) {
891 hw->mdix = AUTO_ALL_MODES;
892 hw->disable_polarity_correction = FALSE;
893 hw->master_slave = E1000_MASTER_SLAVE;
894 }
895
581d708e
MC		 896 adapter->num_queues = 1;
897
898 if (e1000_alloc_queues(adapter)) {
899 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
900 return -ENOMEM;
901 }
902
903#ifdef CONFIG_E1000_NAPI
904 for (i = 0; i < adapter->num_queues; i++) {
905 adapter->polling_netdev[i].priv = adapter;
906 adapter->polling_netdev[i].poll = &e1000_clean;
907 adapter->polling_netdev[i].weight = 64;
908 dev_hold(&adapter->polling_netdev[i]);
909 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
910 }
911#endif
1da177e4
LT		 912 atomic_set(&adapter->irq_sem, 1);
913 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 914
915 return 0;
916}
917
581d708e
MC		 918/**
919 * e1000_alloc_queues - Allocate memory for all rings
920 * @adapter: board private structure to initialize
921 *
922 * We allocate one ring per queue at run-time since we don't know the
923 * number of queues at compile-time. The polling_netdev array is
924 * intended for Multiqueue, but should work fine with a single queue.
925 **/
926
927static int __devinit
928e1000_alloc_queues(struct e1000_adapter *adapter)
929{
930 int size;
931
932 size = sizeof(struct e1000_tx_ring) * adapter->num_queues;
933 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
934 if (!adapter->tx_ring)
935 return -ENOMEM;
936 memset(adapter->tx_ring, 0, size);
937
938 size = sizeof(struct e1000_rx_ring) * adapter->num_queues;
939 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
940 if (!adapter->rx_ring) {
941 kfree(adapter->tx_ring);
942 return -ENOMEM;
943 }
944 memset(adapter->rx_ring, 0, size);
945
946#ifdef CONFIG_E1000_NAPI
947 size = sizeof(struct net_device) * adapter->num_queues;
948 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
949 if (!adapter->polling_netdev) {
950 kfree(adapter->tx_ring);
951 kfree(adapter->rx_ring);
952 return -ENOMEM;
953 }
954 memset(adapter->polling_netdev, 0, size);
955#endif
956
957 return E1000_SUCCESS;
958}
959
1da177e4
LT		 960/**
961 * e1000_open - Called when a network interface is made active
962 * @netdev: network interface device structure
963 *
964 * Returns 0 on success, negative value on failure
965 *
966 * The open entry point is called when a network interface is made
967 * active by the system (IFF_UP). At this point all resources needed
968 * for transmit and receive operations are allocated, the interrupt
969 * handler is registered with the OS, the watchdog timer is started,
970 * and the stack is notified that the interface is ready.
971 **/
972
973static int
974e1000_open(struct net_device *netdev)
975{
60490fe0 976 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 977 int err;
978
979 /* allocate transmit descriptors */
980
581d708e 981 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 982 goto err_setup_tx;
983
984 /* allocate receive descriptors */
985
581d708e 986 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 987 goto err_setup_rx;
988
989 if((err = e1000_up(adapter)))
990 goto err_up;
2d7edb92
MC		 991 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
992 if((adapter->hw.mng_cookie.status &
993 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
994 e1000_update_mng_vlan(adapter);
995 }
1da177e4
LT		 996
997 return E1000_SUCCESS;
998
999err_up:
581d708e 1000 e1000_free_all_rx_resources(adapter);
1da177e4 1001err_setup_rx:
581d708e 1002 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1003err_setup_tx:
1004 e1000_reset(adapter);
1005
1006 return err;
1007}
1008
1009/**
1010 * e1000_close - Disables a network interface
1011 * @netdev: network interface device structure
1012 *
1013 * Returns 0, this is not allowed to fail
1014 *
1015 * The close entry point is called when an interface is de-activated
1016 * by the OS. The hardware is still under the drivers control, but
1017 * needs to be disabled. A global MAC reset is issued to stop the
1018 * hardware, and all transmit and receive resources are freed.
1019 **/
1020
1021static int
1022e1000_close(struct net_device *netdev)
1023{
60490fe0 1024 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1025
1026 e1000_down(adapter);
1027
581d708e
MC		 1028 e1000_free_all_tx_resources(adapter);
1029 e1000_free_all_rx_resources(adapter);
1da177e4 1030
2d7edb92
MC		 1031 if((adapter->hw.mng_cookie.status &
1032 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1033 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1034 }
1da177e4
LT		 1035 return 0;
1036}
1037
1038/**
1039 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1040 * @adapter: address of board private structure
2d7edb92
MC		 1041 * @start: address of beginning of memory
1042 * @len: length of memory
1da177e4
LT		 1043 **/
1044static inline boolean_t
1045e1000_check_64k_bound(struct e1000_adapter *adapter,
1046 void *start, unsigned long len)
1047{
1048 unsigned long begin = (unsigned long) start;
1049 unsigned long end = begin + len;
1050
2648345f
MC		 1051 /* First rev 82545 and 82546 need to not allow any memory
1052 * write location to cross 64k boundary due to errata 23 */
1da177e4 1053 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1054 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1055 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1056 }
1057
1058 return TRUE;
1059}
1060
1061/**
1062 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1063 * @adapter: board private structure
581d708e 1064 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1065 *
1066 * Return 0 on success, negative on failure
1067 **/
1068
1069int
581d708e
MC		 1070e1000_setup_tx_resources(struct e1000_adapter *adapter,
1071 struct e1000_tx_ring *txdr)
1da177e4 1072{
1da177e4
LT		 1073 struct pci_dev *pdev = adapter->pdev;
1074 int size;
1075
1076 size = sizeof(struct e1000_buffer) * txdr->count;
1077 txdr->buffer_info = vmalloc(size);
1078 if(!txdr->buffer_info) {
2648345f
MC		 1079 DPRINTK(PROBE, ERR,
1080 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1081 return -ENOMEM;
1082 }
1083 memset(txdr->buffer_info, 0, size);
1084
1085 /* round up to nearest 4K */
1086
1087 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1088 E1000_ROUNDUP(txdr->size, 4096);
1089
1090 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1091 if(!txdr->desc) {
1092setup_tx_desc_die:
1da177e4 1093 vfree(txdr->buffer_info);
2648345f
MC		 1094 DPRINTK(PROBE, ERR,
1095 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1096 return -ENOMEM;
1097 }
1098
2648345f 1099 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1100 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1101 void *olddesc = txdr->desc;
1102 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1103 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1104 "at %p\n", txdr->size, txdr->desc);
1105 /* Try again, without freeing the previous */
1da177e4 1106 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1da177e4 1107 if(!txdr->desc) {
2648345f 1108 /* Failed allocation, critical failure */
1da177e4
LT		 1109 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1110 goto setup_tx_desc_die;
1111 }
1112
1113 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1114 /* give up */
2648345f
MC		 1115 pci_free_consistent(pdev, txdr->size, txdr->desc,
1116 txdr->dma);
1da177e4
LT		 1117 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1118 DPRINTK(PROBE, ERR,
2648345f
MC		 1119 "Unable to allocate aligned memory "
1120 "for the transmit descriptor ring\n");
1da177e4
LT		 1121 vfree(txdr->buffer_info);
1122 return -ENOMEM;
1123 } else {
2648345f 1124 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1125 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1126 }
1127 }
1128 memset(txdr->desc, 0, txdr->size);
1129
1130 txdr->next_to_use = 0;
1131 txdr->next_to_clean = 0;
1132
1133 return 0;
1134}
1135
581d708e
MC		 1136/**
1137 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1138 * (Descriptors) for all queues
1139 * @adapter: board private structure
1140 *
1141 * If this function returns with an error, then it's possible one or
1142 * more of the rings is populated (while the rest are not). It is the
1143 * callers duty to clean those orphaned rings.
1144 *
1145 * Return 0 on success, negative on failure
1146 **/
1147
1148int
1149e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1150{
1151 int i, err = 0;
1152
1153 for (i = 0; i < adapter->num_queues; i++) {
1154 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1155 if (err) {
1156 DPRINTK(PROBE, ERR,
1157 "Allocation for Tx Queue %u failed\n", i);
1158 break;
1159 }
1160 }
1161
1162 return err;
1163}
1164
1da177e4
LT		 1165/**
1166 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1167 * @adapter: board private structure
1168 *
1169 * Configure the Tx unit of the MAC after a reset.
1170 **/
1171
1172static void
1173e1000_configure_tx(struct e1000_adapter *adapter)
1174{
581d708e
MC		 1175 uint64_t tdba;
1176 struct e1000_hw *hw = &adapter->hw;
1177 uint32_t tdlen, tctl, tipg, tarc;
1da177e4
LT		 1178
1179 /* Setup the HW Tx Head and Tail descriptor pointers */
1180
1181 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1182 E1000_WRITE_REG(&adapter->hw, TDT, 0);
581d708e
MC		 1183 tdba = adapter->tx_ring[0].dma;
1184 tdlen = adapter->tx_ring[0].count *
1185 sizeof(struct e1000_tx_desc);
1186 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1187 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1188 E1000_WRITE_REG(hw, TDLEN, tdlen);
1189 E1000_WRITE_REG(hw, TDH, 0);
1190 E1000_WRITE_REG(hw, TDT, 0);
1191 adapter->tx_ring[0].tdh = E1000_TDH;
1192 adapter->tx_ring[0].tdt = E1000_TDT;
1da177e4
LT		 1193
1194 /* Set the default values for the Tx Inter Packet Gap timer */
1195
581d708e 1196 switch (hw->mac_type) {
1da177e4
LT		 1197 case e1000_82542_rev2_0:
1198 case e1000_82542_rev2_1:
1199 tipg = DEFAULT_82542_TIPG_IPGT;
1200 tipg |= DEFAULT_82542_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
1201 tipg |= DEFAULT_82542_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
1202 break;
1203 default:
581d708e
MC		 1204 if (hw->media_type == e1000_media_type_fiber ||
1205 hw->media_type == e1000_media_type_internal_serdes)
1da177e4
LT		 1206 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1207 else
1208 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1209 tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
1210 tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
1211 }
581d708e 1212 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1213
1214 /* Set the Tx Interrupt Delay register */
1215
581d708e
MC		 1216 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1217 if (hw->mac_type >= e1000_82540)
1218 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1219
1220 /* Program the Transmit Control Register */
1221
581d708e 1222 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1223
1224 tctl &= ~E1000_TCTL_CT;
1225 tctl |= E1000_TCTL_EN | E1000_TCTL_PSP |
1226 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1227
581d708e 1228 E1000_WRITE_REG(hw, TCTL, tctl);
1da177e4 1229
581d708e 1230 e1000_config_collision_dist(hw);
1da177e4
LT		 1231
1232 /* Setup Transmit Descriptor Settings for eop descriptor */
1233 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1234 E1000_TXD_CMD_IFCS;
1235
581d708e 1236 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1237 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1238 else
1239 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1240
1241 /* Cache if we're 82544 running in PCI-X because we'll
1242 * need this to apply a workaround later in the send path. */
581d708e
MC		 1243 if (hw->mac_type == e1000_82544 &&
1244 hw->bus_type == e1000_bus_type_pcix)
1da177e4
LT		 1245 adapter->pcix_82544 = 1;
1246}
1247
1248/**
1249 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1250 * @adapter: board private structure
581d708e 1251 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1252 *
1253 * Returns 0 on success, negative on failure
1254 **/
1255
1256int
581d708e
MC		 1257e1000_setup_rx_resources(struct e1000_adapter *adapter,
1258 struct e1000_rx_ring *rxdr)
1da177e4 1259{
1da177e4 1260 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1261 int size, desc_len;
1da177e4
LT		 1262
1263 size = sizeof(struct e1000_buffer) * rxdr->count;
1264 rxdr->buffer_info = vmalloc(size);
581d708e 1265 if (!rxdr->buffer_info) {
2648345f
MC		 1266 DPRINTK(PROBE, ERR,
1267 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1268 return -ENOMEM;
1269 }
1270 memset(rxdr->buffer_info, 0, size);
1271
2d7edb92
MC		 1272 size = sizeof(struct e1000_ps_page) * rxdr->count;
1273 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1274 if(!rxdr->ps_page) {
1275 vfree(rxdr->buffer_info);
1276 DPRINTK(PROBE, ERR,
1277 "Unable to allocate memory for the receive descriptor ring\n");
1278 return -ENOMEM;
1279 }
1280 memset(rxdr->ps_page, 0, size);
1281
1282 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1283 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1284 if(!rxdr->ps_page_dma) {
1285 vfree(rxdr->buffer_info);
1286 kfree(rxdr->ps_page);
1287 DPRINTK(PROBE, ERR,
1288 "Unable to allocate memory for the receive descriptor ring\n");
1289 return -ENOMEM;
1290 }
1291 memset(rxdr->ps_page_dma, 0, size);
1292
1293 if(adapter->hw.mac_type <= e1000_82547_rev_2)
1294 desc_len = sizeof(struct e1000_rx_desc);
1295 else
1296 desc_len = sizeof(union e1000_rx_desc_packet_split);
1297
1da177e4
LT		 1298 /* Round up to nearest 4K */
1299
2d7edb92 1300 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1301 E1000_ROUNDUP(rxdr->size, 4096);
1302
1303 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1304
581d708e
MC		 1305 if (!rxdr->desc) {
1306 DPRINTK(PROBE, ERR,
1307 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1308setup_rx_desc_die:
1da177e4 1309 vfree(rxdr->buffer_info);
2d7edb92
MC		 1310 kfree(rxdr->ps_page);
1311 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1312 return -ENOMEM;
1313 }
1314
2648345f 1315 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1316 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1317 void *olddesc = rxdr->desc;
1318 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1319 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1320 "at %p\n", rxdr->size, rxdr->desc);
1321 /* Try again, without freeing the previous */
1da177e4 1322 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1323 /* Failed allocation, critical failure */
581d708e 1324 if (!rxdr->desc) {
1da177e4 1325 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1326 DPRINTK(PROBE, ERR,
1327 "Unable to allocate memory "
1328 "for the receive descriptor ring\n");
1da177e4
LT		 1329 goto setup_rx_desc_die;
1330 }
1331
1332 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1333 /* give up */
2648345f
MC		 1334 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1335 rxdr->dma);
1da177e4 1336 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1337 DPRINTK(PROBE, ERR,
1338 "Unable to allocate aligned memory "
1339 "for the receive descriptor ring\n");
581d708e 1340 goto setup_rx_desc_die;
1da177e4 1341 } else {
2648345f 1342 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1343 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1344 }
1345 }
1346 memset(rxdr->desc, 0, rxdr->size);
1347
1348 rxdr->next_to_clean = 0;
1349 rxdr->next_to_use = 0;
1350
1351 return 0;
1352}
1353
581d708e
MC		 1354/**
1355 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1356 * (Descriptors) for all queues
1357 * @adapter: board private structure
1358 *
1359 * If this function returns with an error, then it's possible one or
1360 * more of the rings is populated (while the rest are not). It is the
1361 * callers duty to clean those orphaned rings.
1362 *
1363 * Return 0 on success, negative on failure
1364 **/
1365
1366int
1367e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1368{
1369 int i, err = 0;
1370
1371 for (i = 0; i < adapter->num_queues; i++) {
1372 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1373 if (err) {
1374 DPRINTK(PROBE, ERR,
1375 "Allocation for Rx Queue %u failed\n", i);
1376 break;
1377 }
1378 }
1379
1380 return err;
1381}
1382
1da177e4 1383/**
2648345f 1384 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1385 * @adapter: Board private structure
1386 **/
1387
1388static void
1389e1000_setup_rctl(struct e1000_adapter *adapter)
1390{
2d7edb92
MC		 1391 uint32_t rctl, rfctl;
1392 uint32_t psrctl = 0;
1da177e4
LT		 1393
1394 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1395
1396 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1397
1398 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1399 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1400 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1401
1402 if(adapter->hw.tbi_compatibility_on == 1)
1403 rctl |= E1000_RCTL_SBP;
1404 else
1405 rctl &= ~E1000_RCTL_SBP;
1406
2d7edb92
MC		 1407 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1408 rctl &= ~E1000_RCTL_LPE;
1409 else
1410 rctl |= E1000_RCTL_LPE;
1411
1da177e4 1412 /* Setup buffer sizes */
868d5309 1413 if(adapter->hw.mac_type >= e1000_82571) {
2d7edb92
MC		 1414 /* We can now specify buffers in 1K increments.
1415 * BSIZE and BSEX are ignored in this case. */
1416 rctl |= adapter->rx_buffer_len << 0x11;
1417 } else {
1418 rctl &= ~E1000_RCTL_SZ_4096;
1419 rctl |= E1000_RCTL_BSEX;
1420 switch (adapter->rx_buffer_len) {
1421 case E1000_RXBUFFER_2048:
1422 default:
1423 rctl |= E1000_RCTL_SZ_2048;
1424 rctl &= ~E1000_RCTL_BSEX;
1425 break;
1426 case E1000_RXBUFFER_4096:
1427 rctl |= E1000_RCTL_SZ_4096;
1428 break;
1429 case E1000_RXBUFFER_8192:
1430 rctl |= E1000_RCTL_SZ_8192;
1431 break;
1432 case E1000_RXBUFFER_16384:
1433 rctl |= E1000_RCTL_SZ_16384;
1434 break;
1435 }
1436 }
1437
1438#ifdef CONFIG_E1000_PACKET_SPLIT
1439 /* 82571 and greater support packet-split where the protocol
1440 * header is placed in skb->data and the packet data is
1441 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1442 * In the case of a non-split, skb->data is linearly filled,
1443 * followed by the page buffers. Therefore, skb->data is
1444 * sized to hold the largest protocol header.
1445 */
1446 adapter->rx_ps = (adapter->hw.mac_type > e1000_82547_rev_2)
1447 && (adapter->netdev->mtu
1448 < ((3 * PAGE_SIZE) + adapter->rx_ps_bsize0));
1449#endif
1450 if(adapter->rx_ps) {
1451 /* Configure extra packet-split registers */
1452 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1453 rfctl |= E1000_RFCTL_EXTEN;
1454 /* disable IPv6 packet split support */
1455 rfctl |= E1000_RFCTL_IPV6_DIS;
1456 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1457
1458 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
1459
1460 psrctl |= adapter->rx_ps_bsize0 >>
1461 E1000_PSRCTL_BSIZE0_SHIFT;
1462 psrctl |= PAGE_SIZE >>
1463 E1000_PSRCTL_BSIZE1_SHIFT;
1464 psrctl |= PAGE_SIZE <<
1465 E1000_PSRCTL_BSIZE2_SHIFT;
1466 psrctl |= PAGE_SIZE <<
1467 E1000_PSRCTL_BSIZE3_SHIFT;
1468
1469 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1470 }
1471
1472 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1473}
1474
1475/**
1476 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1477 * @adapter: board private structure
1478 *
1479 * Configure the Rx unit of the MAC after a reset.
1480 **/
1481
1482static void
1483e1000_configure_rx(struct e1000_adapter *adapter)
1484{
581d708e
MC		 1485 uint64_t rdba;
1486 struct e1000_hw *hw = &adapter->hw;
1487 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1488#ifdef CONFIG_E1000_MQ
1489 uint32_t reta, mrqc;
1490 int i;
1491#endif
2d7edb92
MC		 1492
1493 if(adapter->rx_ps) {
581d708e 1494 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1495 sizeof(union e1000_rx_desc_packet_split);
1496 adapter->clean_rx = e1000_clean_rx_irq_ps;
1497 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1498 } else {
581d708e
MC		 1499 rdlen = adapter->rx_ring[0].count *
1500 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1501 adapter->clean_rx = e1000_clean_rx_irq;
1502 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1503 }
1da177e4
LT		 1504
1505 /* disable receives while setting up the descriptors */
581d708e
MC		 1506 rctl = E1000_READ_REG(hw, RCTL);
1507 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1508
1509 /* set the Receive Delay Timer Register */
581d708e 1510 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1511
581d708e
MC		 1512 if (hw->mac_type >= e1000_82540) {
1513 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1da177e4 1514 if(adapter->itr > 1)
581d708e 1515 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1516 1000000000 / (adapter->itr * 256));
1517 }
1518
581d708e
MC		 1519 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1520 * the Base and Length of the Rx Descriptor Ring */
1521 rdba = adapter->rx_ring[0].dma;
1522 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1523 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1524 E1000_WRITE_REG(hw, RDLEN, rdlen);
1525 E1000_WRITE_REG(hw, RDH, 0);
1526 E1000_WRITE_REG(hw, RDT, 0);
1527 adapter->rx_ring[0].rdh = E1000_RDH;
1528 adapter->rx_ring[0].rdt = E1000_RDT;
1529 break;
1da177e4
LT		 1530
1531 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1532 if (hw->mac_type >= e1000_82543) {
1533 rxcsum = E1000_READ_REG(hw, RXCSUM);
2d7edb92
MC		 1534 if(adapter->rx_csum == TRUE) {
1535 rxcsum |= E1000_RXCSUM_TUOFL;
1536
868d5309 1537 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92
MC		 1538 * Must be used in conjunction with packet-split. */
1539 if((adapter->hw.mac_type > e1000_82547_rev_2) &&
1540 (adapter->rx_ps)) {
1541 rxcsum |= E1000_RXCSUM_IPPCSE;
1542 }
1543 } else {
1544 rxcsum &= ~E1000_RXCSUM_TUOFL;
1545 /* don't need to clear IPPCSE as it defaults to 0 */
1546 }
581d708e 1547 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1548 }
1549
581d708e
MC		 1550 if (hw->mac_type == e1000_82573)
1551 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1552
1da177e4 1553 /* Enable Receives */
581d708e 1554 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1555}
1556
1557/**
581d708e 1558 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1559 * @adapter: board private structure
581d708e 1560 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1561 *
1562 * Free all transmit software resources
1563 **/
1564
1565void
581d708e
MC		 1566e1000_free_tx_resources(struct e1000_adapter *adapter,
1567 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1568{
1569 struct pci_dev *pdev = adapter->pdev;
1570
581d708e 1571 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1572
581d708e
MC		 1573 vfree(tx_ring->buffer_info);
1574 tx_ring->buffer_info = NULL;
1da177e4 1575
581d708e 1576 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1577
581d708e
MC		 1578 tx_ring->desc = NULL;
1579}
1580
1581/**
1582 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1583 * @adapter: board private structure
1584 *
1585 * Free all transmit software resources
1586 **/
1587
1588void
1589e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1590{
1591 int i;
1592
1593 for (i = 0; i < adapter->num_queues; i++)
1594 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1595}
1596
1597static inline void
1598e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1599 struct e1000_buffer *buffer_info)
1600{
1da177e4 1601 if(buffer_info->dma) {
2648345f
MC		 1602 pci_unmap_page(adapter->pdev,
1603 buffer_info->dma,
1604 buffer_info->length,
1605 PCI_DMA_TODEVICE);
1da177e4
LT		 1606 buffer_info->dma = 0;
1607 }
1608 if(buffer_info->skb) {
1609 dev_kfree_skb_any(buffer_info->skb);
1610 buffer_info->skb = NULL;
1611 }
1612}
1613
1614/**
1615 * e1000_clean_tx_ring - Free Tx Buffers
1616 * @adapter: board private structure
581d708e 1617 * @tx_ring: ring to be cleaned
1da177e4
LT		 1618 **/
1619
1620static void
581d708e
MC		 1621e1000_clean_tx_ring(struct e1000_adapter *adapter,
1622 struct e1000_tx_ring *tx_ring)
1da177e4 1623{
1da177e4
LT		 1624 struct e1000_buffer *buffer_info;
1625 unsigned long size;
1626 unsigned int i;
1627
1628 /* Free all the Tx ring sk_buffs */
1629
581d708e 1630 if (likely(tx_ring->previous_buffer_info.skb != NULL)) {
2648345f 1631 e1000_unmap_and_free_tx_resource(adapter,
581d708e 1632 &tx_ring->previous_buffer_info);
1da177e4
LT		 1633 }
1634
1635 for(i = 0; i < tx_ring->count; i++) {
1636 buffer_info = &tx_ring->buffer_info[i];
1637 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1638 }
1639
1640 size = sizeof(struct e1000_buffer) * tx_ring->count;
1641 memset(tx_ring->buffer_info, 0, size);
1642
1643 /* Zero out the descriptor ring */
1644
1645 memset(tx_ring->desc, 0, tx_ring->size);
1646
1647 tx_ring->next_to_use = 0;
1648 tx_ring->next_to_clean = 0;
1649
581d708e
MC		 1650 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1651 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1652}
1653
1654/**
1655 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1656 * @adapter: board private structure
1657 **/
1658
1659static void
1660e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1661{
1662 int i;
1663
1664 for (i = 0; i < adapter->num_queues; i++)
1665 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1666}
1667
1668/**
1669 * e1000_free_rx_resources - Free Rx Resources
1670 * @adapter: board private structure
581d708e 1671 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1672 *
1673 * Free all receive software resources
1674 **/
1675
1676void
581d708e
MC		 1677e1000_free_rx_resources(struct e1000_adapter *adapter,
1678 struct e1000_rx_ring *rx_ring)
1da177e4 1679{
1da177e4
LT		 1680 struct pci_dev *pdev = adapter->pdev;
1681
581d708e 1682 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1683
1684 vfree(rx_ring->buffer_info);
1685 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1686 kfree(rx_ring->ps_page);
1687 rx_ring->ps_page = NULL;
1688 kfree(rx_ring->ps_page_dma);
1689 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1690
1691 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1692
1693 rx_ring->desc = NULL;
1694}
1695
1696/**
581d708e 1697 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1698 * @adapter: board private structure
581d708e
MC		 1699 *
1700 * Free all receive software resources
1701 **/
1702
1703void
1704e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1705{
1706 int i;
1707
1708 for (i = 0; i < adapter->num_queues; i++)
1709 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1710}
1711
1712/**
1713 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1714 * @adapter: board private structure
1715 * @rx_ring: ring to free buffers from
1da177e4
LT		 1716 **/
1717
1718static void
581d708e
MC		 1719e1000_clean_rx_ring(struct e1000_adapter *adapter,
1720 struct e1000_rx_ring *rx_ring)
1da177e4 1721{
1da177e4 1722 struct e1000_buffer *buffer_info;
2d7edb92
MC		 1723 struct e1000_ps_page *ps_page;
1724 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 1725 struct pci_dev *pdev = adapter->pdev;
1726 unsigned long size;
2d7edb92 1727 unsigned int i, j;
1da177e4
LT		 1728
1729 /* Free all the Rx ring sk_buffs */
1730
1731 for(i = 0; i < rx_ring->count; i++) {
1732 buffer_info = &rx_ring->buffer_info[i];
1733 if(buffer_info->skb) {
2d7edb92
MC		 1734 ps_page = &rx_ring->ps_page[i];
1735 ps_page_dma = &rx_ring->ps_page_dma[i];
1da177e4
LT		 1736 pci_unmap_single(pdev,
1737 buffer_info->dma,
1738 buffer_info->length,
1739 PCI_DMA_FROMDEVICE);
1740
1741 dev_kfree_skb(buffer_info->skb);
1742 buffer_info->skb = NULL;
2d7edb92
MC		 1743
1744 for(j = 0; j < PS_PAGE_BUFFERS; j++) {
1745 if(!ps_page->ps_page[j]) break;
1746 pci_unmap_single(pdev,
1747 ps_page_dma->ps_page_dma[j],
1748 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1749 ps_page_dma->ps_page_dma[j] = 0;
1750 put_page(ps_page->ps_page[j]);
1751 ps_page->ps_page[j] = NULL;
1752 }
1da177e4
LT		 1753 }
1754 }
1755
1756 size = sizeof(struct e1000_buffer) * rx_ring->count;
1757 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 1758 size = sizeof(struct e1000_ps_page) * rx_ring->count;
1759 memset(rx_ring->ps_page, 0, size);
1760 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
1761 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 1762
1763 /* Zero out the descriptor ring */
1764
1765 memset(rx_ring->desc, 0, rx_ring->size);
1766
1767 rx_ring->next_to_clean = 0;
1768 rx_ring->next_to_use = 0;
1769
581d708e
MC		 1770 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
1771 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
1772}
1773
1774/**
1775 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
1776 * @adapter: board private structure
1777 **/
1778
1779static void
1780e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
1781{
1782 int i;
1783
1784 for (i = 0; i < adapter->num_queues; i++)
1785 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 1786}
1787
1788/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
1789 * and memory write and invalidate disabled for certain operations
1790 */
1791static void
1792e1000_enter_82542_rst(struct e1000_adapter *adapter)
1793{
1794 struct net_device *netdev = adapter->netdev;
1795 uint32_t rctl;
1796
1797 e1000_pci_clear_mwi(&adapter->hw);
1798
1799 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1800 rctl |= E1000_RCTL_RST;
1801 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1802 E1000_WRITE_FLUSH(&adapter->hw);
1803 mdelay(5);
1804
1805 if(netif_running(netdev))
581d708e 1806 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 1807}
1808
1809static void
1810e1000_leave_82542_rst(struct e1000_adapter *adapter)
1811{
1812 struct net_device *netdev = adapter->netdev;
1813 uint32_t rctl;
1814
1815 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1816 rctl &= ~E1000_RCTL_RST;
1817 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1818 E1000_WRITE_FLUSH(&adapter->hw);
1819 mdelay(5);
1820
1821 if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1822 e1000_pci_set_mwi(&adapter->hw);
1823
1824 if(netif_running(netdev)) {
1825 e1000_configure_rx(adapter);
581d708e 1826 e1000_alloc_rx_buffers(adapter, &adapter->rx_ring[0]);
1da177e4
LT		 1827 }
1828}
1829
1830/**
1831 * e1000_set_mac - Change the Ethernet Address of the NIC
1832 * @netdev: network interface device structure
1833 * @p: pointer to an address structure
1834 *
1835 * Returns 0 on success, negative on failure
1836 **/
1837
1838static int
1839e1000_set_mac(struct net_device *netdev, void *p)
1840{
60490fe0 1841 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1842 struct sockaddr *addr = p;
1843
1844 if(!is_valid_ether_addr(addr->sa_data))
1845 return -EADDRNOTAVAIL;
1846
1847 /* 82542 2.0 needs to be in reset to write receive address registers */
1848
1849 if(adapter->hw.mac_type == e1000_82542_rev2_0)
1850 e1000_enter_82542_rst(adapter);
1851
1852 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1853 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
1854
1855 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
1856
868d5309
MC		 1857 /* With 82571 controllers, LAA may be overwritten (with the default)
1858 * due to controller reset from the other port. */
1859 if (adapter->hw.mac_type == e1000_82571) {
1860 /* activate the work around */
1861 adapter->hw.laa_is_present = 1;
1862
1863 /* Hold a copy of the LAA in RAR[14] This is done so that
1864 * between the time RAR[0] gets clobbered and the time it
1865 * gets fixed (in e1000_watchdog), the actual LAA is in one
1866 * of the RARs and no incoming packets directed to this port
1867 * are dropped. Eventaully the LAA will be in RAR[0] and
1868 * RAR[14] */
1869 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
1870 E1000_RAR_ENTRIES - 1);
1871 }
1872
1da177e4
LT		 1873 if(adapter->hw.mac_type == e1000_82542_rev2_0)
1874 e1000_leave_82542_rst(adapter);
1875
1876 return 0;
1877}
1878
1879/**
1880 * e1000_set_multi - Multicast and Promiscuous mode set
1881 * @netdev: network interface device structure
1882 *
1883 * The set_multi entry point is called whenever the multicast address
1884 * list or the network interface flags are updated. This routine is
1885 * responsible for configuring the hardware for proper multicast,
1886 * promiscuous mode, and all-multi behavior.
1887 **/
1888
1889static void
1890e1000_set_multi(struct net_device *netdev)
1891{
60490fe0 1892 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1893 struct e1000_hw *hw = &adapter->hw;
1894 struct dev_mc_list *mc_ptr;
1895 uint32_t rctl;
1896 uint32_t hash_value;
868d5309 1897 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 1898
868d5309
MC		 1899 /* reserve RAR[14] for LAA over-write work-around */
1900 if (adapter->hw.mac_type == e1000_82571)
1901 rar_entries--;
1da177e4 1902
2648345f
MC		 1903 /* Check for Promiscuous and All Multicast modes */
1904
1da177e4
LT		 1905 rctl = E1000_READ_REG(hw, RCTL);
1906
1907 if(netdev->flags & IFF_PROMISC) {
1908 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
1909 } else if(netdev->flags & IFF_ALLMULTI) {
1910 rctl |= E1000_RCTL_MPE;
1911 rctl &= ~E1000_RCTL_UPE;
1912 } else {
1913 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
1914 }
1915
1916 E1000_WRITE_REG(hw, RCTL, rctl);
1917
1918 /* 82542 2.0 needs to be in reset to write receive address registers */
1919
1920 if(hw->mac_type == e1000_82542_rev2_0)
1921 e1000_enter_82542_rst(adapter);
1922
1923 /* load the first 14 multicast address into the exact filters 1-14
1924 * RAR 0 is used for the station MAC adddress
1925 * if there are not 14 addresses, go ahead and clear the filters
868d5309 1926 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 1927 */
1928 mc_ptr = netdev->mc_list;
1929
868d5309
MC		 1930 for(i = 1; i < rar_entries; i++) {
1931 if (mc_ptr) {
1da177e4
LT		 1932 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
1933 mc_ptr = mc_ptr->next;
1934 } else {
1935 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
1936 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
1937 }
1938 }
1939
1940 /* clear the old settings from the multicast hash table */
1941
1942 for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
1943 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
1944
1945 /* load any remaining addresses into the hash table */
1946
1947 for(; mc_ptr; mc_ptr = mc_ptr->next) {
1948 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
1949 e1000_mta_set(hw, hash_value);
1950 }
1951
1952 if(hw->mac_type == e1000_82542_rev2_0)
1953 e1000_leave_82542_rst(adapter);
1da177e4
LT		 1954}
1955
1956/* Need to wait a few seconds after link up to get diagnostic information from
1957 * the phy */
1958
1959static void
1960e1000_update_phy_info(unsigned long data)
1961{
1962 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1963 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
1964}
1965
1966/**
1967 * e1000_82547_tx_fifo_stall - Timer Call-back
1968 * @data: pointer to adapter cast into an unsigned long
1969 **/
1970
1971static void
1972e1000_82547_tx_fifo_stall(unsigned long data)
1973{
1974 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1975 struct net_device *netdev = adapter->netdev;
1976 uint32_t tctl;
1977
1978 if(atomic_read(&adapter->tx_fifo_stall)) {
1979 if((E1000_READ_REG(&adapter->hw, TDT) ==
1980 E1000_READ_REG(&adapter->hw, TDH)) &&
1981 (E1000_READ_REG(&adapter->hw, TDFT) ==
1982 E1000_READ_REG(&adapter->hw, TDFH)) &&
1983 (E1000_READ_REG(&adapter->hw, TDFTS) ==
1984 E1000_READ_REG(&adapter->hw, TDFHS))) {
1985 tctl = E1000_READ_REG(&adapter->hw, TCTL);
1986 E1000_WRITE_REG(&adapter->hw, TCTL,
1987 tctl & ~E1000_TCTL_EN);
1988 E1000_WRITE_REG(&adapter->hw, TDFT,
1989 adapter->tx_head_addr);
1990 E1000_WRITE_REG(&adapter->hw, TDFH,
1991 adapter->tx_head_addr);
1992 E1000_WRITE_REG(&adapter->hw, TDFTS,
1993 adapter->tx_head_addr);
1994 E1000_WRITE_REG(&adapter->hw, TDFHS,
1995 adapter->tx_head_addr);
1996 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
1997 E1000_WRITE_FLUSH(&adapter->hw);
1998
1999 adapter->tx_fifo_head = 0;
2000 atomic_set(&adapter->tx_fifo_stall, 0);
2001 netif_wake_queue(netdev);
2002 } else {
2003 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2004 }
2005 }
2006}
2007
2008/**
2009 * e1000_watchdog - Timer Call-back
2010 * @data: pointer to adapter cast into an unsigned long
2011 **/
2012static void
2013e1000_watchdog(unsigned long data)
2014{
2015 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2016
2017 /* Do the rest outside of interrupt context */
2018 schedule_work(&adapter->watchdog_task);
2019}
2020
2021static void
2022e1000_watchdog_task(struct e1000_adapter *adapter)
2023{
2024 struct net_device *netdev = adapter->netdev;
581d708e 2025 struct e1000_tx_ring *txdr = &adapter->tx_ring[0];
1da177e4
LT		 2026 uint32_t link;
2027
2028 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2029 if (adapter->hw.mac_type == e1000_82573) {
2030 e1000_enable_tx_pkt_filtering(&adapter->hw);
2031 if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2032 e1000_update_mng_vlan(adapter);
2033 }
1da177e4
LT		 2034
2035 if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2036 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2037 link = !adapter->hw.serdes_link_down;
2038 else
2039 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2040
2041 if(link) {
2042 if(!netif_carrier_ok(netdev)) {
2043 e1000_get_speed_and_duplex(&adapter->hw,
2044 &adapter->link_speed,
2045 &adapter->link_duplex);
2046
2047 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2048 adapter->link_speed,
2049 adapter->link_duplex == FULL_DUPLEX ?
2050 "Full Duplex" : "Half Duplex");
2051
2052 netif_carrier_on(netdev);
2053 netif_wake_queue(netdev);
2054 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2055 adapter->smartspeed = 0;
2056 }
2057 } else {
2058 if(netif_carrier_ok(netdev)) {
2059 adapter->link_speed = 0;
2060 adapter->link_duplex = 0;
2061 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2062 netif_carrier_off(netdev);
2063 netif_stop_queue(netdev);
2064 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2065 }
2066
2067 e1000_smartspeed(adapter);
2068 }
2069
2070 e1000_update_stats(adapter);
2071
2072 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2073 adapter->tpt_old = adapter->stats.tpt;
2074 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2075 adapter->colc_old = adapter->stats.colc;
2076
2077 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2078 adapter->gorcl_old = adapter->stats.gorcl;
2079 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2080 adapter->gotcl_old = adapter->stats.gotcl;
2081
2082 e1000_update_adaptive(&adapter->hw);
2083
581d708e
MC		 2084 if (adapter->num_queues == 1 && !netif_carrier_ok(netdev)) {
2085 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2086 /* We've lost link, so the controller stops DMA,
2087 * but we've got queued Tx work that's never going
2088 * to get done, so reset controller to flush Tx.
2089 * (Do the reset outside of interrupt context). */
2090 schedule_work(&adapter->tx_timeout_task);
2091 }
2092 }
2093
2094 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2095 if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2096 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2097 * asymmetrical Tx or Rx gets ITR=8000; everyone
2098 * else is between 2000-8000. */
2099 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2100 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2101 adapter->gotcl - adapter->gorcl :
2102 adapter->gorcl - adapter->gotcl) / 10000;
2103 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2104 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2105 }
2106
2107 /* Cause software interrupt to ensure rx ring is cleaned */
2108 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2109
2648345f 2110 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2111 adapter->detect_tx_hung = TRUE;
2112
868d5309
MC		 2113 /* With 82571 controllers, LAA may be overwritten due to controller
2114 * reset from the other port. Set the appropriate LAA in RAR[0] */
2115 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2116 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2117
1da177e4
LT		 2118 /* Reset the timer */
2119 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2120}
2121
2122#define E1000_TX_FLAGS_CSUM 0x00000001
2123#define E1000_TX_FLAGS_VLAN 0x00000002
2124#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2125#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2126#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2127#define E1000_TX_FLAGS_VLAN_SHIFT 16
2128
2129static inline int
581d708e
MC		 2130e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2131 struct sk_buff *skb)
1da177e4
LT		 2132{
2133#ifdef NETIF_F_TSO
2134 struct e1000_context_desc *context_desc;
2135 unsigned int i;
2136 uint32_t cmd_length = 0;
2d7edb92 2137 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2138 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2139 int err;
2140
2141 if(skb_shinfo(skb)->tso_size) {
2142 if (skb_header_cloned(skb)) {
2143 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2144 if (err)
2145 return err;
2146 }
2147
2148 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2149 mss = skb_shinfo(skb)->tso_size;
2d7edb92
MC		 2150 if(skb->protocol == ntohs(ETH_P_IP)) {
2151 skb->nh.iph->tot_len = 0;
2152 skb->nh.iph->check = 0;
2153 skb->h.th->check =
2154 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2155 skb->nh.iph->daddr,
2156 0,
2157 IPPROTO_TCP,
2158 0);
2159 cmd_length = E1000_TXD_CMD_IP;
2160 ipcse = skb->h.raw - skb->data - 1;
2161#ifdef NETIF_F_TSO_IPV6
2162 } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
2163 skb->nh.ipv6h->payload_len = 0;
2164 skb->h.th->check =
2165 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2166 &skb->nh.ipv6h->daddr,
2167 0,
2168 IPPROTO_TCP,
2169 0);
2170 ipcse = 0;
2171#endif
2172 }
1da177e4
LT		 2173 ipcss = skb->nh.raw - skb->data;
2174 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2175 tucss = skb->h.raw - skb->data;
2176 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2177 tucse = 0;
2178
2179 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2180 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2181
581d708e
MC		 2182 i = tx_ring->next_to_use;
2183 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2184
2185 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2186 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2187 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2188 context_desc->upper_setup.tcp_fields.tucss = tucss;
2189 context_desc->upper_setup.tcp_fields.tucso = tucso;
2190 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2191 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2192 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2193 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2194
581d708e
MC		 2195 if (++i == tx_ring->count) i = 0;
2196 tx_ring->next_to_use = i;
1da177e4
LT		 2197
2198 return 1;
2199 }
2200#endif
2201
2202 return 0;
2203}
2204
2205static inline boolean_t
581d708e
MC		 2206e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2207 struct sk_buff *skb)
1da177e4
LT		 2208{
2209 struct e1000_context_desc *context_desc;
2210 unsigned int i;
2211 uint8_t css;
2212
2213 if(likely(skb->ip_summed == CHECKSUM_HW)) {
2214 css = skb->h.raw - skb->data;
2215
581d708e
MC		 2216 i = tx_ring->next_to_use;
2217 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2218
2219 context_desc->upper_setup.tcp_fields.tucss = css;
2220 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2221 context_desc->upper_setup.tcp_fields.tucse = 0;
2222 context_desc->tcp_seg_setup.data = 0;
2223 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2224
581d708e
MC		 2225 if (unlikely(++i == tx_ring->count)) i = 0;
2226 tx_ring->next_to_use = i;
1da177e4
LT		 2227
2228 return TRUE;
2229 }
2230
2231 return FALSE;
2232}
2233
2234#define E1000_MAX_TXD_PWR 12
2235#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2236
2237static inline int
581d708e
MC		 2238e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2239 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2240 unsigned int nr_frags, unsigned int mss)
1da177e4 2241{
1da177e4
LT		 2242 struct e1000_buffer *buffer_info;
2243 unsigned int len = skb->len;
2244 unsigned int offset = 0, size, count = 0, i;
2245 unsigned int f;
2246 len -= skb->data_len;
2247
2248 i = tx_ring->next_to_use;
2249
2250 while(len) {
2251 buffer_info = &tx_ring->buffer_info[i];
2252 size = min(len, max_per_txd);
2253#ifdef NETIF_F_TSO
2254 /* Workaround for premature desc write-backs
2255 * in TSO mode. Append 4-byte sentinel desc */
2256 if(unlikely(mss && !nr_frags && size == len && size > 8))
2257 size -= 4;
2258#endif
97338bde
MC		 2259 /* work-around for errata 10 and it applies
2260 * to all controllers in PCI-X mode
2261 * The fix is to make sure that the first descriptor of a
2262 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2263 */
2264 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2265 (size > 2015) && count == 0))
2266 size = 2015;
2267
1da177e4
LT		 2268 /* Workaround for potential 82544 hang in PCI-X. Avoid
2269 * terminating buffers within evenly-aligned dwords. */
2270 if(unlikely(adapter->pcix_82544 &&
2271 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2272 size > 4))
2273 size -= 4;
2274
2275 buffer_info->length = size;
2276 buffer_info->dma =
2277 pci_map_single(adapter->pdev,
2278 skb->data + offset,
2279 size,
2280 PCI_DMA_TODEVICE);
2281 buffer_info->time_stamp = jiffies;
2282
2283 len -= size;
2284 offset += size;
2285 count++;
2286 if(unlikely(++i == tx_ring->count)) i = 0;
2287 }
2288
2289 for(f = 0; f < nr_frags; f++) {
2290 struct skb_frag_struct *frag;
2291
2292 frag = &skb_shinfo(skb)->frags[f];
2293 len = frag->size;
2294 offset = frag->page_offset;
2295
2296 while(len) {
2297 buffer_info = &tx_ring->buffer_info[i];
2298 size = min(len, max_per_txd);
2299#ifdef NETIF_F_TSO
2300 /* Workaround for premature desc write-backs
2301 * in TSO mode. Append 4-byte sentinel desc */
2302 if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2303 size -= 4;
2304#endif
2305 /* Workaround for potential 82544 hang in PCI-X.
2306 * Avoid terminating buffers within evenly-aligned
2307 * dwords. */
2308 if(unlikely(adapter->pcix_82544 &&
2309 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2310 size > 4))
2311 size -= 4;
2312
2313 buffer_info->length = size;
2314 buffer_info->dma =
2315 pci_map_page(adapter->pdev,
2316 frag->page,
2317 offset,
2318 size,
2319 PCI_DMA_TODEVICE);
2320 buffer_info->time_stamp = jiffies;
2321
2322 len -= size;
2323 offset += size;
2324 count++;
2325 if(unlikely(++i == tx_ring->count)) i = 0;
2326 }
2327 }
2328
2329 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2330 tx_ring->buffer_info[i].skb = skb;
2331 tx_ring->buffer_info[first].next_to_watch = i;
2332
2333 return count;
2334}
2335
2336static inline void
581d708e
MC		 2337e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2338 int tx_flags, int count)
1da177e4 2339{
1da177e4
LT		 2340 struct e1000_tx_desc *tx_desc = NULL;
2341 struct e1000_buffer *buffer_info;
2342 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2343 unsigned int i;
2344
2345 if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2346 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2347 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2348 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2349
2350 if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
2351 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2352 }
2353
2354 if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2355 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2356 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2357 }
2358
2359 if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2360 txd_lower |= E1000_TXD_CMD_VLE;
2361 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2362 }
2363
2364 i = tx_ring->next_to_use;
2365
2366 while(count--) {
2367 buffer_info = &tx_ring->buffer_info[i];
2368 tx_desc = E1000_TX_DESC(*tx_ring, i);
2369 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2370 tx_desc->lower.data =
2371 cpu_to_le32(txd_lower | buffer_info->length);
2372 tx_desc->upper.data = cpu_to_le32(txd_upper);
2373 if(unlikely(++i == tx_ring->count)) i = 0;
2374 }
2375
2376 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2377
2378 /* Force memory writes to complete before letting h/w
2379 * know there are new descriptors to fetch. (Only
2380 * applicable for weak-ordered memory model archs,
2381 * such as IA-64). */
2382 wmb();
2383
2384 tx_ring->next_to_use = i;
581d708e 2385 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2386}
2387
2388/**
2389 * 82547 workaround to avoid controller hang in half-duplex environment.
2390 * The workaround is to avoid queuing a large packet that would span
2391 * the internal Tx FIFO ring boundary by notifying the stack to resend
2392 * the packet at a later time. This gives the Tx FIFO an opportunity to
2393 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2394 * to the beginning of the Tx FIFO.
2395 **/
2396
2397#define E1000_FIFO_HDR 0x10
2398#define E1000_82547_PAD_LEN 0x3E0
2399
2400static inline int
2401e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2402{
2403 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2404 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2405
2406 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2407
2408 if(adapter->link_duplex != HALF_DUPLEX)
2409 goto no_fifo_stall_required;
2410
2411 if(atomic_read(&adapter->tx_fifo_stall))
2412 return 1;
2413
2414 if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2415 atomic_set(&adapter->tx_fifo_stall, 1);
2416 return 1;
2417 }
2418
2419no_fifo_stall_required:
2420 adapter->tx_fifo_head += skb_fifo_len;
2421 if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
2422 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2423 return 0;
2424}
2425
2d7edb92
MC		 2426#define MINIMUM_DHCP_PACKET_SIZE 282
2427static inline int
2428e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2429{
2430 struct e1000_hw *hw = &adapter->hw;
2431 uint16_t length, offset;
2432 if(vlan_tx_tag_present(skb)) {
2433 if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2434 ( adapter->hw.mng_cookie.status &
2435 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2436 return 0;
2437 }
2438 if(htons(ETH_P_IP) == skb->protocol) {
2439 const struct iphdr *ip = skb->nh.iph;
2440 if(IPPROTO_UDP == ip->protocol) {
2441 struct udphdr *udp = (struct udphdr *)(skb->h.uh);
2442 if(ntohs(udp->dest) == 67) {
2443 offset = (uint8_t *)udp + 8 - skb->data;
2444 length = skb->len - offset;
2445
2446 return e1000_mng_write_dhcp_info(hw,
2447 (uint8_t *)udp + 8, length);
2448 }
2449 }
2450 } else if((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
2451 struct ethhdr *eth = (struct ethhdr *) skb->data;
2452 if((htons(ETH_P_IP) == eth->h_proto)) {
2453 const struct iphdr *ip =
2454 (struct iphdr *)((uint8_t *)skb->data+14);
2455 if(IPPROTO_UDP == ip->protocol) {
2456 struct udphdr *udp =
2457 (struct udphdr *)((uint8_t *)ip +
2458 (ip->ihl << 2));
2459 if(ntohs(udp->dest) == 67) {
2460 offset = (uint8_t *)udp + 8 - skb->data;
2461 length = skb->len - offset;
2462
2463 return e1000_mng_write_dhcp_info(hw,
2464 (uint8_t *)udp + 8,
2465 length);
2466 }
2467 }
2468 }
2469 }
2470 return 0;
2471}
2472
1da177e4
LT		 2473#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2474static int
2475e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2476{
60490fe0 2477 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2478 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2479 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2480 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2481 unsigned int tx_flags = 0;
2482 unsigned int len = skb->len;
2483 unsigned long flags;
2484 unsigned int nr_frags = 0;
2485 unsigned int mss = 0;
2486 int count = 0;
2487 int tso;
2488 unsigned int f;
2489 len -= skb->data_len;
2490
581d708e
MC		 2491 tx_ring = adapter->tx_ring;
2492 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2493 dev_kfree_skb_any(skb);
2494 return NETDEV_TX_OK;
2495 }
2496
2497#ifdef NETIF_F_TSO
2498 mss = skb_shinfo(skb)->tso_size;
2648345f 2499 /* The controller does a simple calculation to
1da177e4
LT		 2500 * make sure there is enough room in the FIFO before
2501 * initiating the DMA for each buffer. The calc is:
2502 * 4 = ceil(buffer len/mss). To make sure we don't
2503 * overrun the FIFO, adjust the max buffer len if mss
2504 * drops. */
2505 if(mss) {
2506 max_per_txd = min(mss << 2, max_per_txd);
2507 max_txd_pwr = fls(max_per_txd) - 1;
2508 }
2509
2510 if((mss) || (skb->ip_summed == CHECKSUM_HW))
2511 count++;
2648345f 2512 count++;
1da177e4
LT		 2513#else
2514 if(skb->ip_summed == CHECKSUM_HW)
2515 count++;
2516#endif
2517 count += TXD_USE_COUNT(len, max_txd_pwr);
2518
2519 if(adapter->pcix_82544)
2520 count++;
2521
97338bde
MC		 2522 /* work-around for errata 10 and it applies to all controllers
2523 * in PCI-X mode, so add one more descriptor to the count
2524 */
2525 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2526 (len > 2015)))
2527 count++;
2528
1da177e4
LT		 2529 nr_frags = skb_shinfo(skb)->nr_frags;
2530 for(f = 0; f < nr_frags; f++)
2531 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2532 max_txd_pwr);
2533 if(adapter->pcix_82544)
2534 count += nr_frags;
2535
868d5309
MC		 2536#ifdef NETIF_F_TSO
2537 /* TSO Workaround for 82571/2 Controllers -- if skb->data
2538 * points to just header, pull a few bytes of payload from
2539 * frags into skb->data */
2540 if (skb_shinfo(skb)->tso_size) {
2541 uint8_t hdr_len;
2542 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2543 if (skb->data_len && (hdr_len < (skb->len - skb->data_len)) &&
2544 (adapter->hw.mac_type == e1000_82571 ||
2545 adapter->hw.mac_type == e1000_82572)) {
2546 unsigned int pull_size;
2547 pull_size = min((unsigned int)4, skb->data_len);
2548 if (!__pskb_pull_tail(skb, pull_size)) {
2549 printk(KERN_ERR "__pskb_pull_tail failed.\n");
2550 dev_kfree_skb_any(skb);
2551 return -EFAULT;
2552 }
2553 }
2554 }
2555#endif
2556
2d7edb92
MC		 2557 if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2558 e1000_transfer_dhcp_info(adapter, skb);
2559
581d708e
MC		 2560 local_irq_save(flags);
2561 if (!spin_trylock(&tx_ring->tx_lock)) {
2562 /* Collision - tell upper layer to requeue */
2563 local_irq_restore(flags);
2564 return NETDEV_TX_LOCKED;
2565 }
1da177e4
LT		 2566
2567 /* need: count + 2 desc gap to keep tail from touching
2568 * head, otherwise try next time */
581d708e 2569 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2570 netif_stop_queue(netdev);
581d708e 2571 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2572 return NETDEV_TX_BUSY;
2573 }
2574
2575 if(unlikely(adapter->hw.mac_type == e1000_82547)) {
2576 if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
2577 netif_stop_queue(netdev);
2578 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2579 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2580 return NETDEV_TX_BUSY;
2581 }
2582 }
2583
2584 if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2585 tx_flags |= E1000_TX_FLAGS_VLAN;
2586 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2587 }
2588
581d708e 2589 first = tx_ring->next_to_use;
1da177e4 2590
581d708e 2591 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2592 if (tso < 0) {
2593 dev_kfree_skb_any(skb);
581d708e 2594 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2595 return NETDEV_TX_OK;
2596 }
2597
2598 if (likely(tso))
2599 tx_flags |= E1000_TX_FLAGS_TSO;
581d708e 2600 else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 2601 tx_flags |= E1000_TX_FLAGS_CSUM;
2602
2d7edb92 2603 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 2604 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 2605 * no longer assume, we must. */
581d708e 2606 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2d7edb92
MC		 2607 tx_flags |= E1000_TX_FLAGS_IPV4;
2608
581d708e
MC		 2609 e1000_tx_queue(adapter, tx_ring, tx_flags,
2610 e1000_tx_map(adapter, tx_ring, skb, first,
2611 max_per_txd, nr_frags, mss));
1da177e4
LT		 2612
2613 netdev->trans_start = jiffies;
2614
2615 /* Make sure there is space in the ring for the next send. */
581d708e 2616 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 2617 netif_stop_queue(netdev);
2618
581d708e 2619 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2620 return NETDEV_TX_OK;
2621}
2622
2623/**
2624 * e1000_tx_timeout - Respond to a Tx Hang
2625 * @netdev: network interface device structure
2626 **/
2627
2628static void
2629e1000_tx_timeout(struct net_device *netdev)
2630{
60490fe0 2631 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2632
2633 /* Do the reset outside of interrupt context */
2634 schedule_work(&adapter->tx_timeout_task);
2635}
2636
2637static void
2638e1000_tx_timeout_task(struct net_device *netdev)
2639{
60490fe0 2640 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2641
2642 e1000_down(adapter);
2643 e1000_up(adapter);
2644}
2645
2646/**
2647 * e1000_get_stats - Get System Network Statistics
2648 * @netdev: network interface device structure
2649 *
2650 * Returns the address of the device statistics structure.
2651 * The statistics are actually updated from the timer callback.
2652 **/
2653
2654static struct net_device_stats *
2655e1000_get_stats(struct net_device *netdev)
2656{
60490fe0 2657 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2658
2659 e1000_update_stats(adapter);
2660 return &adapter->net_stats;
2661}
2662
2663/**
2664 * e1000_change_mtu - Change the Maximum Transfer Unit
2665 * @netdev: network interface device structure
2666 * @new_mtu: new value for maximum frame size
2667 *
2668 * Returns 0 on success, negative on failure
2669 **/
2670
2671static int
2672e1000_change_mtu(struct net_device *netdev, int new_mtu)
2673{
60490fe0 2674 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2675 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
2676
2677 if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
2678 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2679 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
2680 return -EINVAL;
2681 }
2682
868d5309 2683#define MAX_STD_JUMBO_FRAME_SIZE 9234
2d7edb92 2684 /* might want this to be bigger enum check... */
868d5309
MC		 2685 /* 82571 controllers limit jumbo frame size to 10500 bytes */
2686 if ((adapter->hw.mac_type == e1000_82571 ||
2687 adapter->hw.mac_type == e1000_82572) &&
2688 max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
2689 DPRINTK(PROBE, ERR, "MTU > 9216 bytes not supported "
2690 "on 82571 and 82572 controllers.\n");
2691 return -EINVAL;
2692 }
2693
2694 if(adapter->hw.mac_type == e1000_82573 &&
2d7edb92
MC		 2695 max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
2696 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
2697 "on 82573\n");
1da177e4 2698 return -EINVAL;
2d7edb92 2699 }
1da177e4 2700
2d7edb92
MC		 2701 if(adapter->hw.mac_type > e1000_82547_rev_2) {
2702 adapter->rx_buffer_len = max_frame;
2703 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
1da177e4 2704 } else {
2d7edb92
MC		 2705 if(unlikely((adapter->hw.mac_type < e1000_82543) &&
2706 (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
2707 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
2708 "on 82542\n");
2709 return -EINVAL;
2710
2711 } else {
2712 if(max_frame <= E1000_RXBUFFER_2048) {
2713 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2714 } else if(max_frame <= E1000_RXBUFFER_4096) {
2715 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
2716 } else if(max_frame <= E1000_RXBUFFER_8192) {
2717 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
2718 } else if(max_frame <= E1000_RXBUFFER_16384) {
2719 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
2720 }
2721 }
1da177e4
LT		 2722 }
2723
2d7edb92
MC		 2724 netdev->mtu = new_mtu;
2725
2726 if(netif_running(netdev)) {
1da177e4
LT		 2727 e1000_down(adapter);
2728 e1000_up(adapter);
2729 }
2730
1da177e4
LT		 2731 adapter->hw.max_frame_size = max_frame;
2732
2733 return 0;
2734}
2735
2736/**
2737 * e1000_update_stats - Update the board statistics counters
2738 * @adapter: board private structure
2739 **/
2740
2741void
2742e1000_update_stats(struct e1000_adapter *adapter)
2743{
2744 struct e1000_hw *hw = &adapter->hw;
2745 unsigned long flags;
2746 uint16_t phy_tmp;
2747
2748#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2749
2750 spin_lock_irqsave(&adapter->stats_lock, flags);
2751
2752 /* these counters are modified from e1000_adjust_tbi_stats,
2753 * called from the interrupt context, so they must only
2754 * be written while holding adapter->stats_lock
2755 */
2756
2757 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
2758 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
2759 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
2760 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
2761 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
2762 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
2763 adapter->stats.roc += E1000_READ_REG(hw, ROC);
2764 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
2765 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
2766 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
2767 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
2768 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
2769 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
2770
2771 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
2772 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
2773 adapter->stats.scc += E1000_READ_REG(hw, SCC);
2774 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
2775 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
2776 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
2777 adapter->stats.dc += E1000_READ_REG(hw, DC);
2778 adapter->stats.sec += E1000_READ_REG(hw, SEC);
2779 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
2780 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
2781 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
2782 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
2783 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
2784 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
2785 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
2786 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
2787 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
2788 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
2789 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
2790 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
2791 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
2792 adapter->stats.torl += E1000_READ_REG(hw, TORL);
2793 adapter->stats.torh += E1000_READ_REG(hw, TORH);
2794 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
2795 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
2796 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
2797 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
2798 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
2799 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
2800 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
2801 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
2802 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
2803 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
2804 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
2805
2806 /* used for adaptive IFS */
2807
2808 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
2809 adapter->stats.tpt += hw->tx_packet_delta;
2810 hw->collision_delta = E1000_READ_REG(hw, COLC);
2811 adapter->stats.colc += hw->collision_delta;
2812
2813 if(hw->mac_type >= e1000_82543) {
2814 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
2815 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
2816 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
2817 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
2818 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
2819 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
2820 }
2d7edb92
MC		 2821 if(hw->mac_type > e1000_82547_rev_2) {
2822 adapter->stats.iac += E1000_READ_REG(hw, IAC);
2823 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
2824 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
2825 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
2826 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
2827 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
2828 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
2829 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
2830 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
2831 }
1da177e4
LT		 2832
2833 /* Fill out the OS statistics structure */
2834
2835 adapter->net_stats.rx_packets = adapter->stats.gprc;
2836 adapter->net_stats.tx_packets = adapter->stats.gptc;
2837 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
2838 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
2839 adapter->net_stats.multicast = adapter->stats.mprc;
2840 adapter->net_stats.collisions = adapter->stats.colc;
2841
2842 /* Rx Errors */
2843
2844 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
2845 adapter->stats.crcerrs + adapter->stats.algnerrc +
6d915757
MC		 2846 adapter->stats.rlec + adapter->stats.mpc +
2847 adapter->stats.cexterr;
1da177e4
LT		 2848 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2849 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2850 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
2851 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
2852 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
2853
2854 /* Tx Errors */
2855
2856 adapter->net_stats.tx_errors = adapter->stats.ecol +
2857 adapter->stats.latecol;
2858 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
2859 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
2860 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
2861
2862 /* Tx Dropped needs to be maintained elsewhere */
2863
2864 /* Phy Stats */
2865
2866 if(hw->media_type == e1000_media_type_copper) {
2867 if((adapter->link_speed == SPEED_1000) &&
2868 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
2869 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
2870 adapter->phy_stats.idle_errors += phy_tmp;
2871 }
2872
2873 if((hw->mac_type <= e1000_82546) &&
2874 (hw->phy_type == e1000_phy_m88) &&
2875 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
2876 adapter->phy_stats.receive_errors += phy_tmp;
2877 }
2878
2879 spin_unlock_irqrestore(&adapter->stats_lock, flags);
2880}
2881
2882/**
2883 * e1000_intr - Interrupt Handler
2884 * @irq: interrupt number
2885 * @data: pointer to a network interface device structure
2886 * @pt_regs: CPU registers structure
2887 **/
2888
2889static irqreturn_t
2890e1000_intr(int irq, void *data, struct pt_regs *regs)
2891{
2892 struct net_device *netdev = data;
60490fe0 2893 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2894 struct e1000_hw *hw = &adapter->hw;
2895 uint32_t icr = E1000_READ_REG(hw, ICR);
581d708e 2896 int i;
1da177e4
LT		 2897
2898 if(unlikely(!icr))
2899 return IRQ_NONE; /* Not our interrupt */
2900
2901 if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
2902 hw->get_link_status = 1;
2903 mod_timer(&adapter->watchdog_timer, jiffies);
2904 }
2905
2906#ifdef CONFIG_E1000_NAPI
581d708e
MC		 2907 atomic_inc(&adapter->irq_sem);
2908 E1000_WRITE_REG(hw, IMC, ~0);
2909 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2910 }
2911#else
581d708e
MC		 2912 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
2913 __netif_rx_schedule(&adapter->polling_netdev[0]);
2914 else
2915 e1000_irq_enable(adapter);
1da177e4
LT		 2916 /* Writing IMC and IMS is needed for 82547.
2917 Due to Hub Link bus being occupied, an interrupt
2918 de-assertion message is not able to be sent.
2919 When an interrupt assertion message is generated later,
2920 two messages are re-ordered and sent out.
2921 That causes APIC to think 82547 is in de-assertion
2922 state, while 82547 is in assertion state, resulting
2923 in dead lock. Writing IMC forces 82547 into
2924 de-assertion state.
2925 */
2926 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
2927 atomic_inc(&adapter->irq_sem);
2648345f 2928 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 2929 }
2930
2931 for(i = 0; i < E1000_MAX_INTR; i++)
581d708e
MC		 2932 if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
2933 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 2934 break;
2935
2936 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
2937 e1000_irq_enable(adapter);
581d708e 2938
1da177e4
LT		 2939#endif
2940
2941 return IRQ_HANDLED;
2942}
2943
2944#ifdef CONFIG_E1000_NAPI
2945/**
2946 * e1000_clean - NAPI Rx polling callback
2947 * @adapter: board private structure
2948 **/
2949
2950static int
581d708e 2951e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 2952{
581d708e
MC		 2953 struct e1000_adapter *adapter;
2954 int work_to_do = min(*budget, poll_dev->quota);
2955 int tx_cleaned, i = 0, work_done = 0;
2956
2957 /* Must NOT use netdev_priv macro here. */
2958 adapter = poll_dev->priv;
2959
2960 /* Keep link state information with original netdev */
2961 if (!netif_carrier_ok(adapter->netdev))
2962 goto quit_polling;
2648345f 2963
581d708e
MC		 2964 while (poll_dev != &adapter->polling_netdev[i]) {
2965 i++;
2966 if (unlikely(i == adapter->num_queues))
2967 BUG();
2968 }
2969
2970 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
2971 adapter->clean_rx(adapter, &adapter->rx_ring[i],
2972 &work_done, work_to_do);
1da177e4
LT		 2973
2974 *budget -= work_done;
581d708e 2975 poll_dev->quota -= work_done;
1da177e4 2976
2b02893e 2977 /* If no Tx and not enough Rx work done, exit the polling mode */
581d708e
MC		 2978 if((!tx_cleaned && (work_done == 0)) ||
2979 !netif_running(adapter->netdev)) {
2980quit_polling:
2981 netif_rx_complete(poll_dev);
1da177e4
LT		 2982 e1000_irq_enable(adapter);
2983 return 0;
2984 }
2985
2986 return 1;
2987}
2988
2989#endif
2990/**
2991 * e1000_clean_tx_irq - Reclaim resources after transmit completes
2992 * @adapter: board private structure
2993 **/
2994
2995static boolean_t
581d708e
MC		 2996e1000_clean_tx_irq(struct e1000_adapter *adapter,
2997 struct e1000_tx_ring *tx_ring)
1da177e4 2998{
1da177e4
LT		 2999 struct net_device *netdev = adapter->netdev;
3000 struct e1000_tx_desc *tx_desc, *eop_desc;
3001 struct e1000_buffer *buffer_info;
3002 unsigned int i, eop;
3003 boolean_t cleaned = FALSE;
3004
3005 i = tx_ring->next_to_clean;
3006 eop = tx_ring->buffer_info[i].next_to_watch;
3007 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3008
581d708e 3009 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
2701234f
MC		 3010 /* Premature writeback of Tx descriptors clear (free buffers
3011 * and unmap pci_mapping) previous_buffer_info */
581d708e 3012 if (likely(tx_ring->previous_buffer_info.skb != NULL)) {
2701234f 3013 e1000_unmap_and_free_tx_resource(adapter,
581d708e 3014 &tx_ring->previous_buffer_info);
1da177e4
LT		 3015 }
3016
3017 for(cleaned = FALSE; !cleaned; ) {
3018 tx_desc = E1000_TX_DESC(*tx_ring, i);
3019 buffer_info = &tx_ring->buffer_info[i];
3020 cleaned = (i == eop);
3021
2701234f
MC		 3022#ifdef NETIF_F_TSO
3023 if (!(netdev->features & NETIF_F_TSO)) {
3024#endif
3025 e1000_unmap_and_free_tx_resource(adapter,
3026 buffer_info);
3027#ifdef NETIF_F_TSO
1da177e4 3028 } else {
2701234f 3029 if (cleaned) {
581d708e 3030 memcpy(&tx_ring->previous_buffer_info,
2701234f
MC		 3031 buffer_info,
3032 sizeof(struct e1000_buffer));
3033 memset(buffer_info, 0,
3034 sizeof(struct e1000_buffer));
3035 } else {
3036 e1000_unmap_and_free_tx_resource(
3037 adapter, buffer_info);
3038 }
1da177e4 3039 }
2701234f 3040#endif
1da177e4
LT		 3041
3042 tx_desc->buffer_addr = 0;
3043 tx_desc->lower.data = 0;
3044 tx_desc->upper.data = 0;
3045
1da177e4
LT		 3046 if(unlikely(++i == tx_ring->count)) i = 0;
3047 }
581d708e
MC		 3048
3049 tx_ring->pkt++;
1da177e4
LT		 3050
3051 eop = tx_ring->buffer_info[i].next_to_watch;
3052 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3053 }
3054
3055 tx_ring->next_to_clean = i;
3056
581d708e 3057 spin_lock(&tx_ring->tx_lock);
1da177e4
LT		 3058
3059 if(unlikely(cleaned && netif_queue_stopped(netdev) &&
3060 netif_carrier_ok(netdev)))
3061 netif_wake_queue(netdev);
3062
581d708e 3063 spin_unlock(&tx_ring->tx_lock);
2648345f 3064
581d708e 3065 if (adapter->detect_tx_hung) {
2648345f 3066 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3067 * check with the clearing of time_stamp and movement of i */
3068 adapter->detect_tx_hung = FALSE;
70b8f1e1
MC		 3069 if (tx_ring->buffer_info[i].dma &&
3070 time_after(jiffies, tx_ring->buffer_info[i].time_stamp + HZ)
3071 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3072 E1000_STATUS_TXOFF)) {
3073
3074 /* detected Tx unit hang */
3075 i = tx_ring->next_to_clean;
3076 eop = tx_ring->buffer_info[i].next_to_watch;
3077 eop_desc = E1000_TX_DESC(*tx_ring, eop);
c6963ef5 3078 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
70b8f1e1
MC		 3079 " TDH <%x>\n"
3080 " TDT <%x>\n"
3081 " next_to_use <%x>\n"
3082 " next_to_clean <%x>\n"
3083 "buffer_info[next_to_clean]\n"
b4ee21f4 3084 " dma <%llx>\n"
70b8f1e1
MC		 3085 " time_stamp <%lx>\n"
3086 " next_to_watch <%x>\n"
3087 " jiffies <%lx>\n"
3088 " next_to_watch.status <%x>\n",
581d708e
MC		 3089 readl(adapter->hw.hw_addr + tx_ring->tdh),
3090 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1
MC		 3091 tx_ring->next_to_use,
3092 i,
b4ee21f4 3093 (unsigned long long)tx_ring->buffer_info[i].dma,
70b8f1e1
MC		 3094 tx_ring->buffer_info[i].time_stamp,
3095 eop,
3096 jiffies,
3097 eop_desc->upper.fields.status);
1da177e4 3098 netif_stop_queue(netdev);
70b8f1e1 3099 }
1da177e4 3100 }
2701234f 3101#ifdef NETIF_F_TSO
581d708e
MC		 3102 if (unlikely(!(eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3103 time_after(jiffies, tx_ring->previous_buffer_info.time_stamp + HZ)))
2701234f 3104 e1000_unmap_and_free_tx_resource(
581d708e 3105 adapter, &tx_ring->previous_buffer_info);
2701234f 3106#endif
1da177e4
LT		 3107 return cleaned;
3108}
3109
3110/**
3111 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3112 * @adapter: board private structure
3113 * @status_err: receive descriptor status and error fields
3114 * @csum: receive descriptor csum field
3115 * @sk_buff: socket buffer with received data
1da177e4
LT		 3116 **/
3117
3118static inline void
3119e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3120 uint32_t status_err, uint32_t csum,
3121 struct sk_buff *skb)
1da177e4 3122{
2d7edb92
MC		 3123 uint16_t status = (uint16_t)status_err;
3124 uint8_t errors = (uint8_t)(status_err >> 24);
3125 skb->ip_summed = CHECKSUM_NONE;
3126
1da177e4 3127 /* 82543 or newer only */
2d7edb92 3128 if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3129 /* Ignore Checksum bit is set */
2d7edb92
MC		 3130 if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
3131 /* TCP/UDP checksum error bit is set */
3132 if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3133 /* let the stack verify checksum errors */
1da177e4 3134 adapter->hw_csum_err++;
2d7edb92
MC		 3135 return;
3136 }
3137 /* TCP/UDP Checksum has not been calculated */
3138 if(adapter->hw.mac_type <= e1000_82547_rev_2) {
3139 if(!(status & E1000_RXD_STAT_TCPCS))
3140 return;
1da177e4 3141 } else {
2d7edb92
MC		 3142 if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3143 return;
3144 }
3145 /* It must be a TCP or UDP packet with a valid checksum */
3146 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3147 /* TCP checksum is good */
3148 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3149 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3150 /* IP fragment with UDP payload */
3151 /* Hardware complements the payload checksum, so we undo it
3152 * and then put the value in host order for further stack use.
3153 */
3154 csum = ntohl(csum ^ 0xFFFF);
3155 skb->csum = csum;
3156 skb->ip_summed = CHECKSUM_HW;
1da177e4 3157 }
2d7edb92 3158 adapter->hw_csum_good++;
1da177e4
LT		 3159}
3160
3161/**
2d7edb92 3162 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3163 * @adapter: board private structure
3164 **/
3165
3166static boolean_t
3167#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3168e1000_clean_rx_irq(struct e1000_adapter *adapter,
3169 struct e1000_rx_ring *rx_ring,
3170 int *work_done, int work_to_do)
1da177e4 3171#else
581d708e
MC		 3172e1000_clean_rx_irq(struct e1000_adapter *adapter,
3173 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3174#endif
3175{
1da177e4
LT		 3176 struct net_device *netdev = adapter->netdev;
3177 struct pci_dev *pdev = adapter->pdev;
3178 struct e1000_rx_desc *rx_desc;
3179 struct e1000_buffer *buffer_info;
3180 struct sk_buff *skb;
3181 unsigned long flags;
3182 uint32_t length;
3183 uint8_t last_byte;
3184 unsigned int i;
3185 boolean_t cleaned = FALSE;
3186
3187 i = rx_ring->next_to_clean;
3188 rx_desc = E1000_RX_DESC(*rx_ring, i);
3189
3190 while(rx_desc->status & E1000_RXD_STAT_DD) {
3191 buffer_info = &rx_ring->buffer_info[i];
3192#ifdef CONFIG_E1000_NAPI
3193 if(*work_done >= work_to_do)
3194 break;
3195 (*work_done)++;
3196#endif
3197 cleaned = TRUE;
3198
3199 pci_unmap_single(pdev,
3200 buffer_info->dma,
3201 buffer_info->length,
3202 PCI_DMA_FROMDEVICE);
3203
3204 skb = buffer_info->skb;
3205 length = le16_to_cpu(rx_desc->length);
3206
3207 if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
3208 /* All receives must fit into a single buffer */
3209 E1000_DBG("%s: Receive packet consumed multiple"
2648345f 3210 " buffers\n", netdev->name);
1da177e4
LT		 3211 dev_kfree_skb_irq(skb);
3212 goto next_desc;
3213 }
3214
3215 if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3216 last_byte = *(skb->data + length - 1);
3217 if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
3218 rx_desc->errors, length, last_byte)) {
3219 spin_lock_irqsave(&adapter->stats_lock, flags);
3220 e1000_tbi_adjust_stats(&adapter->hw,
3221 &adapter->stats,
3222 length, skb->data);
3223 spin_unlock_irqrestore(&adapter->stats_lock,
3224 flags);
3225 length--;
3226 } else {
3227 dev_kfree_skb_irq(skb);
3228 goto next_desc;
3229 }
3230 }
3231
3232 /* Good Receive */
3233 skb_put(skb, length - ETHERNET_FCS_SIZE);
3234
3235 /* Receive Checksum Offload */
2d7edb92
MC		 3236 e1000_rx_checksum(adapter,
3237 (uint32_t)(rx_desc->status) |
3238 ((uint32_t)(rx_desc->errors) << 24),
3239 rx_desc->csum, skb);
1da177e4
LT		 3240 skb->protocol = eth_type_trans(skb, netdev);
3241#ifdef CONFIG_E1000_NAPI
3242 if(unlikely(adapter->vlgrp &&
3243 (rx_desc->status & E1000_RXD_STAT_VP))) {
3244 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3245 le16_to_cpu(rx_desc->special) &
3246 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3247 } else {
3248 netif_receive_skb(skb);
3249 }
3250#else /* CONFIG_E1000_NAPI */
3251 if(unlikely(adapter->vlgrp &&
3252 (rx_desc->status & E1000_RXD_STAT_VP))) {
3253 vlan_hwaccel_rx(skb, adapter->vlgrp,
3254 le16_to_cpu(rx_desc->special) &
3255 E1000_RXD_SPC_VLAN_MASK);
3256 } else {
3257 netif_rx(skb);
3258 }
3259#endif /* CONFIG_E1000_NAPI */
3260 netdev->last_rx = jiffies;
581d708e 3261 rx_ring->pkt++;
1da177e4
LT		 3262
3263next_desc:
3264 rx_desc->status = 0;
3265 buffer_info->skb = NULL;
3266 if(unlikely(++i == rx_ring->count)) i = 0;
3267
3268 rx_desc = E1000_RX_DESC(*rx_ring, i);
3269 }
1da177e4 3270 rx_ring->next_to_clean = i;
581d708e 3271 adapter->alloc_rx_buf(adapter, rx_ring);
2d7edb92
MC		 3272
3273 return cleaned;
3274}
3275
3276/**
3277 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3278 * @adapter: board private structure
3279 **/
3280
3281static boolean_t
3282#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3283e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3284 struct e1000_rx_ring *rx_ring,
3285 int *work_done, int work_to_do)
2d7edb92 3286#else
581d708e
MC		 3287e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3288 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3289#endif
3290{
2d7edb92
MC		 3291 union e1000_rx_desc_packet_split *rx_desc;
3292 struct net_device *netdev = adapter->netdev;
3293 struct pci_dev *pdev = adapter->pdev;
3294 struct e1000_buffer *buffer_info;
3295 struct e1000_ps_page *ps_page;
3296 struct e1000_ps_page_dma *ps_page_dma;
3297 struct sk_buff *skb;
3298 unsigned int i, j;
3299 uint32_t length, staterr;
3300 boolean_t cleaned = FALSE;
3301
3302 i = rx_ring->next_to_clean;
3303 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3304 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3305
3306 while(staterr & E1000_RXD_STAT_DD) {
3307 buffer_info = &rx_ring->buffer_info[i];
3308 ps_page = &rx_ring->ps_page[i];
3309 ps_page_dma = &rx_ring->ps_page_dma[i];
3310#ifdef CONFIG_E1000_NAPI
3311 if(unlikely(*work_done >= work_to_do))
3312 break;
3313 (*work_done)++;
3314#endif
3315 cleaned = TRUE;
3316 pci_unmap_single(pdev, buffer_info->dma,
3317 buffer_info->length,
3318 PCI_DMA_FROMDEVICE);
3319
3320 skb = buffer_info->skb;
3321
3322 if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3323 E1000_DBG("%s: Packet Split buffers didn't pick up"
3324 " the full packet\n", netdev->name);
3325 dev_kfree_skb_irq(skb);
3326 goto next_desc;
3327 }
1da177e4 3328
2d7edb92
MC		 3329 if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3330 dev_kfree_skb_irq(skb);
3331 goto next_desc;
3332 }
3333
3334 length = le16_to_cpu(rx_desc->wb.middle.length0);
3335
3336 if(unlikely(!length)) {
3337 E1000_DBG("%s: Last part of the packet spanning"
3338 " multiple descriptors\n", netdev->name);
3339 dev_kfree_skb_irq(skb);
3340 goto next_desc;
3341 }
3342
3343 /* Good Receive */
3344 skb_put(skb, length);
3345
3346 for(j = 0; j < PS_PAGE_BUFFERS; j++) {
3347 if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
3348 break;
3349
3350 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3351 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3352 ps_page_dma->ps_page_dma[j] = 0;
3353 skb_shinfo(skb)->frags[j].page =
3354 ps_page->ps_page[j];
3355 ps_page->ps_page[j] = NULL;
3356 skb_shinfo(skb)->frags[j].page_offset = 0;
3357 skb_shinfo(skb)->frags[j].size = length;
3358 skb_shinfo(skb)->nr_frags++;
3359 skb->len += length;
3360 skb->data_len += length;
3361 }
3362
3363 e1000_rx_checksum(adapter, staterr,
3364 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3365 skb->protocol = eth_type_trans(skb, netdev);
3366
3367#ifdef HAVE_RX_ZERO_COPY
3368 if(likely(rx_desc->wb.upper.header_status &
3369 E1000_RXDPS_HDRSTAT_HDRSP))
3370 skb_shinfo(skb)->zero_copy = TRUE;
3371#endif
3372#ifdef CONFIG_E1000_NAPI
3373 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3374 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3375 le16_to_cpu(rx_desc->wb.middle.vlan) &
3376 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3377 } else {
3378 netif_receive_skb(skb);
3379 }
3380#else /* CONFIG_E1000_NAPI */
3381 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3382 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3383 le16_to_cpu(rx_desc->wb.middle.vlan) &
3384 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3385 } else {
3386 netif_rx(skb);
3387 }
3388#endif /* CONFIG_E1000_NAPI */
3389 netdev->last_rx = jiffies;
581d708e 3390 rx_ring->pkt++;
2d7edb92
MC		 3391
3392next_desc:
3393 rx_desc->wb.middle.status_error &= ~0xFF;
3394 buffer_info->skb = NULL;
3395 if(unlikely(++i == rx_ring->count)) i = 0;
3396
3397 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3398 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3399 }
3400 rx_ring->next_to_clean = i;
581d708e 3401 adapter->alloc_rx_buf(adapter, rx_ring);
1da177e4
LT		 3402
3403 return cleaned;
3404}
3405
3406/**
2d7edb92 3407 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3408 * @adapter: address of board private structure
3409 **/
3410
3411static void
581d708e
MC		 3412e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
3413 struct e1000_rx_ring *rx_ring)
1da177e4 3414{
1da177e4
LT		 3415 struct net_device *netdev = adapter->netdev;
3416 struct pci_dev *pdev = adapter->pdev;
3417 struct e1000_rx_desc *rx_desc;
3418 struct e1000_buffer *buffer_info;
3419 struct sk_buff *skb;
2648345f
MC		 3420 unsigned int i;
3421 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3422
3423 i = rx_ring->next_to_use;
3424 buffer_info = &rx_ring->buffer_info[i];
3425
3426 while(!buffer_info->skb) {
1da177e4 3427 skb = dev_alloc_skb(bufsz);
2648345f 3428
1da177e4
LT		 3429 if(unlikely(!skb)) {
3430 /* Better luck next round */
3431 break;
3432 }
3433
2648345f 3434 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3435 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3436 struct sk_buff *oldskb = skb;
2648345f
MC		 3437 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3438 "at %p\n", bufsz, skb->data);
3439 /* Try again, without freeing the previous */
1da177e4 3440 skb = dev_alloc_skb(bufsz);
2648345f 3441 /* Failed allocation, critical failure */
1da177e4
LT		 3442 if (!skb) {
3443 dev_kfree_skb(oldskb);
3444 break;
3445 }
2648345f 3446
1da177e4
LT		 3447 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3448 /* give up */
3449 dev_kfree_skb(skb);
3450 dev_kfree_skb(oldskb);
3451 break; /* while !buffer_info->skb */
3452 } else {
2648345f 3453 /* Use new allocation */
1da177e4
LT		 3454 dev_kfree_skb(oldskb);
3455 }
3456 }
1da177e4
LT		 3457 /* Make buffer alignment 2 beyond a 16 byte boundary
3458 * this will result in a 16 byte aligned IP header after
3459 * the 14 byte MAC header is removed
3460 */
3461 skb_reserve(skb, NET_IP_ALIGN);
3462
3463 skb->dev = netdev;
3464
3465 buffer_info->skb = skb;
3466 buffer_info->length = adapter->rx_buffer_len;
3467 buffer_info->dma = pci_map_single(pdev,
3468 skb->data,
3469 adapter->rx_buffer_len,
3470 PCI_DMA_FROMDEVICE);
3471
2648345f
MC		 3472 /* Fix for errata 23, can't cross 64kB boundary */
3473 if (!e1000_check_64k_bound(adapter,
3474 (void *)(unsigned long)buffer_info->dma,
3475 adapter->rx_buffer_len)) {
3476 DPRINTK(RX_ERR, ERR,
3477 "dma align check failed: %u bytes at %p\n",
3478 adapter->rx_buffer_len,
3479 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3480 dev_kfree_skb(skb);
3481 buffer_info->skb = NULL;
3482
2648345f 3483 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3484 adapter->rx_buffer_len,
3485 PCI_DMA_FROMDEVICE);
3486
3487 break; /* while !buffer_info->skb */
3488 }
1da177e4
LT		 3489 rx_desc = E1000_RX_DESC(*rx_ring, i);
3490 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3491
3492 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3493 /* Force memory writes to complete before letting h/w
3494 * know there are new descriptors to fetch. (Only
3495 * applicable for weak-ordered memory model archs,
3496 * such as IA-64). */
3497 wmb();
581d708e 3498 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
1da177e4
LT		 3499 }
3500
3501 if(unlikely(++i == rx_ring->count)) i = 0;
3502 buffer_info = &rx_ring->buffer_info[i];
3503 }
3504
3505 rx_ring->next_to_use = i;
3506}
3507
2d7edb92
MC		 3508/**
3509 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3510 * @adapter: address of board private structure
3511 **/
3512
3513static void
581d708e
MC		 3514e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
3515 struct e1000_rx_ring *rx_ring)
2d7edb92 3516{
2d7edb92
MC		 3517 struct net_device *netdev = adapter->netdev;
3518 struct pci_dev *pdev = adapter->pdev;
3519 union e1000_rx_desc_packet_split *rx_desc;
3520 struct e1000_buffer *buffer_info;
3521 struct e1000_ps_page *ps_page;
3522 struct e1000_ps_page_dma *ps_page_dma;
3523 struct sk_buff *skb;
3524 unsigned int i, j;
3525
3526 i = rx_ring->next_to_use;
3527 buffer_info = &rx_ring->buffer_info[i];
3528 ps_page = &rx_ring->ps_page[i];
3529 ps_page_dma = &rx_ring->ps_page_dma[i];
3530
3531 while(!buffer_info->skb) {
3532 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3533
3534 for(j = 0; j < PS_PAGE_BUFFERS; j++) {
3535 if(unlikely(!ps_page->ps_page[j])) {
3536 ps_page->ps_page[j] =
3537 alloc_page(GFP_ATOMIC);
3538 if(unlikely(!ps_page->ps_page[j]))
3539 goto no_buffers;
3540 ps_page_dma->ps_page_dma[j] =
3541 pci_map_page(pdev,
3542 ps_page->ps_page[j],
3543 0, PAGE_SIZE,
3544 PCI_DMA_FROMDEVICE);
3545 }
3546 /* Refresh the desc even if buffer_addrs didn't
3547 * change because each write-back erases this info.
3548 */
3549 rx_desc->read.buffer_addr[j+1] =
3550 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3551 }
3552
3553 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3554
3555 if(unlikely(!skb))
3556 break;
3557
3558 /* Make buffer alignment 2 beyond a 16 byte boundary
3559 * this will result in a 16 byte aligned IP header after
3560 * the 14 byte MAC header is removed
3561 */
3562 skb_reserve(skb, NET_IP_ALIGN);
3563
3564 skb->dev = netdev;
3565
3566 buffer_info->skb = skb;
3567 buffer_info->length = adapter->rx_ps_bsize0;
3568 buffer_info->dma = pci_map_single(pdev, skb->data,
3569 adapter->rx_ps_bsize0,
3570 PCI_DMA_FROMDEVICE);
3571
3572 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
3573
3574 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3575 /* Force memory writes to complete before letting h/w
3576 * know there are new descriptors to fetch. (Only
3577 * applicable for weak-ordered memory model archs,
3578 * such as IA-64). */
3579 wmb();
3580 /* Hardware increments by 16 bytes, but packet split
3581 * descriptors are 32 bytes...so we increment tail
3582 * twice as much.
3583 */
581d708e 3584 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
2d7edb92
MC		 3585 }
3586
3587 if(unlikely(++i == rx_ring->count)) i = 0;
3588 buffer_info = &rx_ring->buffer_info[i];
3589 ps_page = &rx_ring->ps_page[i];
3590 ps_page_dma = &rx_ring->ps_page_dma[i];
3591 }
3592
3593no_buffers:
3594 rx_ring->next_to_use = i;
3595}
3596
1da177e4
LT		 3597/**
3598 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
3599 * @adapter:
3600 **/
3601
3602static void
3603e1000_smartspeed(struct e1000_adapter *adapter)
3604{
3605 uint16_t phy_status;
3606 uint16_t phy_ctrl;
3607
3608 if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
3609 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
3610 return;
3611
3612 if(adapter->smartspeed == 0) {
3613 /* If Master/Slave config fault is asserted twice,
3614 * we assume back-to-back */
3615 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
3616 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
3617 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
3618 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
3619 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
3620 if(phy_ctrl & CR_1000T_MS_ENABLE) {
3621 phy_ctrl &= ~CR_1000T_MS_ENABLE;
3622 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
3623 phy_ctrl);
3624 adapter->smartspeed++;
3625 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
3626 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
3627 &phy_ctrl)) {
3628 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3629 MII_CR_RESTART_AUTO_NEG);
3630 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
3631 phy_ctrl);
3632 }
3633 }
3634 return;
3635 } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
3636 /* If still no link, perhaps using 2/3 pair cable */
3637 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
3638 phy_ctrl |= CR_1000T_MS_ENABLE;
3639 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
3640 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
3641 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
3642 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
3643 MII_CR_RESTART_AUTO_NEG);
3644 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
3645 }
3646 }
3647 /* Restart process after E1000_SMARTSPEED_MAX iterations */
3648 if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
3649 adapter->smartspeed = 0;
3650}
3651
3652/**
3653 * e1000_ioctl -
3654 * @netdev:
3655 * @ifreq:
3656 * @cmd:
3657 **/
3658
3659static int
3660e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3661{
3662 switch (cmd) {
3663 case SIOCGMIIPHY:
3664 case SIOCGMIIREG:
3665 case SIOCSMIIREG:
3666 return e1000_mii_ioctl(netdev, ifr, cmd);
3667 default:
3668 return -EOPNOTSUPP;
3669 }
3670}
3671
3672/**
3673 * e1000_mii_ioctl -
3674 * @netdev:
3675 * @ifreq:
3676 * @cmd:
3677 **/
3678
3679static int
3680e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3681{
60490fe0 3682 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3683 struct mii_ioctl_data *data = if_mii(ifr);
3684 int retval;
3685 uint16_t mii_reg;
3686 uint16_t spddplx;
97876fc6 3687 unsigned long flags;
1da177e4
LT		 3688
3689 if(adapter->hw.media_type != e1000_media_type_copper)
3690 return -EOPNOTSUPP;
3691
3692 switch (cmd) {
3693 case SIOCGMIIPHY:
3694 data->phy_id = adapter->hw.phy_addr;
3695 break;
3696 case SIOCGMIIREG:
97876fc6 3697 if(!capable(CAP_NET_ADMIN))
1da177e4 3698 return -EPERM;
97876fc6
MC		 3699 spin_lock_irqsave(&adapter->stats_lock, flags);
3700 if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
3701 &data->val_out)) {
3702 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 3703 return -EIO;
97876fc6
MC		 3704 }
3705 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 3706 break;
3707 case SIOCSMIIREG:
97876fc6 3708 if(!capable(CAP_NET_ADMIN))
1da177e4 3709 return -EPERM;
97876fc6 3710 if(data->reg_num & ~(0x1F))
1da177e4
LT		 3711 return -EFAULT;
3712 mii_reg = data->val_in;
97876fc6
MC		 3713 spin_lock_irqsave(&adapter->stats_lock, flags);
3714 if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
3715 mii_reg)) {
3716 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 3717 return -EIO;
97876fc6
MC		 3718 }
3719 if(adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT		 3720 switch (data->reg_num) {
3721 case PHY_CTRL:
3722 if(mii_reg & MII_CR_POWER_DOWN)
3723 break;
3724 if(mii_reg & MII_CR_AUTO_NEG_EN) {
3725 adapter->hw.autoneg = 1;
3726 adapter->hw.autoneg_advertised = 0x2F;
3727 } else {
3728 if (mii_reg & 0x40)
3729 spddplx = SPEED_1000;
3730 else if (mii_reg & 0x2000)
3731 spddplx = SPEED_100;
3732 else
3733 spddplx = SPEED_10;
3734 spddplx += (mii_reg & 0x100)
3735 ? FULL_DUPLEX :
3736 HALF_DUPLEX;
3737 retval = e1000_set_spd_dplx(adapter,
3738 spddplx);
97876fc6
MC		 3739 if(retval) {
3740 spin_unlock_irqrestore(
3741 &adapter->stats_lock,
3742 flags);
1da177e4 3743 return retval;
97876fc6 3744 }
1da177e4
LT		 3745 }
3746 if(netif_running(adapter->netdev)) {
3747 e1000_down(adapter);
3748 e1000_up(adapter);
3749 } else
3750 e1000_reset(adapter);
3751 break;
3752 case M88E1000_PHY_SPEC_CTRL:
3753 case M88E1000_EXT_PHY_SPEC_CTRL:
97876fc6
MC		 3754 if(e1000_phy_reset(&adapter->hw)) {
3755 spin_unlock_irqrestore(
3756 &adapter->stats_lock, flags);
1da177e4 3757 return -EIO;
97876fc6 3758 }
1da177e4
LT		 3759 break;
3760 }
3761 } else {
3762 switch (data->reg_num) {
3763 case PHY_CTRL:
3764 if(mii_reg & MII_CR_POWER_DOWN)
3765 break;
3766 if(netif_running(adapter->netdev)) {
3767 e1000_down(adapter);
3768 e1000_up(adapter);
3769 } else
3770 e1000_reset(adapter);
3771 break;
3772 }
3773 }
97876fc6 3774 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 3775 break;
3776 default:
3777 return -EOPNOTSUPP;
3778 }
3779 return E1000_SUCCESS;
3780}
3781
3782void
3783e1000_pci_set_mwi(struct e1000_hw *hw)
3784{
3785 struct e1000_adapter *adapter = hw->back;
2648345f 3786 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 3787
2648345f
MC		 3788 if(ret_val)
3789 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 3790}
3791
3792void
3793e1000_pci_clear_mwi(struct e1000_hw *hw)
3794{
3795 struct e1000_adapter *adapter = hw->back;
3796
3797 pci_clear_mwi(adapter->pdev);
3798}
3799
3800void
3801e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
3802{
3803 struct e1000_adapter *adapter = hw->back;
3804
3805 pci_read_config_word(adapter->pdev, reg, value);
3806}
3807
3808void
3809e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
3810{
3811 struct e1000_adapter *adapter = hw->back;
3812
3813 pci_write_config_word(adapter->pdev, reg, *value);
3814}
3815
3816uint32_t
3817e1000_io_read(struct e1000_hw *hw, unsigned long port)
3818{
3819 return inl(port);
3820}
3821
3822void
3823e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
3824{
3825 outl(value, port);
3826}
3827
3828static void
3829e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
3830{
60490fe0 3831 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3832 uint32_t ctrl, rctl;
3833
3834 e1000_irq_disable(adapter);
3835 adapter->vlgrp = grp;
3836
3837 if(grp) {
3838 /* enable VLAN tag insert/strip */
3839 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
3840 ctrl |= E1000_CTRL_VME;
3841 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
3842
3843 /* enable VLAN receive filtering */
3844 rctl = E1000_READ_REG(&adapter->hw, RCTL);
3845 rctl |= E1000_RCTL_VFE;
3846 rctl &= ~E1000_RCTL_CFIEN;
3847 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 3848 e1000_update_mng_vlan(adapter);
1da177e4
LT		 3849 } else {
3850 /* disable VLAN tag insert/strip */
3851 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
3852 ctrl &= ~E1000_CTRL_VME;
3853 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
3854
3855 /* disable VLAN filtering */
3856 rctl = E1000_READ_REG(&adapter->hw, RCTL);
3857 rctl &= ~E1000_RCTL_VFE;
3858 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92
MC		 3859 if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
3860 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3861 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3862 }
1da177e4
LT		 3863 }
3864
3865 e1000_irq_enable(adapter);
3866}
3867
3868static void
3869e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
3870{
60490fe0 3871 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3872 uint32_t vfta, index;
2d7edb92
MC		 3873 if((adapter->hw.mng_cookie.status &
3874 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
3875 (vid == adapter->mng_vlan_id))
3876 return;
1da177e4
LT		 3877 /* add VID to filter table */
3878 index = (vid >> 5) & 0x7F;
3879 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
3880 vfta |= (1 << (vid & 0x1F));
3881 e1000_write_vfta(&adapter->hw, index, vfta);
3882}
3883
3884static void
3885e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
3886{
60490fe0 3887 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3888 uint32_t vfta, index;
3889
3890 e1000_irq_disable(adapter);
3891
3892 if(adapter->vlgrp)
3893 adapter->vlgrp->vlan_devices[vid] = NULL;
3894
3895 e1000_irq_enable(adapter);
3896
2d7edb92
MC		 3897 if((adapter->hw.mng_cookie.status &
3898 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
3899 (vid == adapter->mng_vlan_id))
3900 return;
1da177e4
LT		 3901 /* remove VID from filter table */
3902 index = (vid >> 5) & 0x7F;
3903 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
3904 vfta &= ~(1 << (vid & 0x1F));
3905 e1000_write_vfta(&adapter->hw, index, vfta);
3906}
3907
3908static void
3909e1000_restore_vlan(struct e1000_adapter *adapter)
3910{
3911 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
3912
3913 if(adapter->vlgrp) {
3914 uint16_t vid;
3915 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
3916 if(!adapter->vlgrp->vlan_devices[vid])
3917 continue;
3918 e1000_vlan_rx_add_vid(adapter->netdev, vid);
3919 }
3920 }
3921}
3922
3923int
3924e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
3925{
3926 adapter->hw.autoneg = 0;
3927
6921368f
MC		 3928 /* Fiber NICs only allow 1000 gbps Full duplex */
3929 if((adapter->hw.media_type == e1000_media_type_fiber) &&
3930 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
3931 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
3932 return -EINVAL;
3933 }
3934
1da177e4
LT		 3935 switch(spddplx) {
3936 case SPEED_10 + DUPLEX_HALF:
3937 adapter->hw.forced_speed_duplex = e1000_10_half;
3938 break;
3939 case SPEED_10 + DUPLEX_FULL:
3940 adapter->hw.forced_speed_duplex = e1000_10_full;
3941 break;
3942 case SPEED_100 + DUPLEX_HALF:
3943 adapter->hw.forced_speed_duplex = e1000_100_half;
3944 break;
3945 case SPEED_100 + DUPLEX_FULL:
3946 adapter->hw.forced_speed_duplex = e1000_100_full;
3947 break;
3948 case SPEED_1000 + DUPLEX_FULL:
3949 adapter->hw.autoneg = 1;
3950 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
3951 break;
3952 case SPEED_1000 + DUPLEX_HALF: /* not supported */
3953 default:
2648345f 3954 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 3955 return -EINVAL;
3956 }
3957 return 0;
3958}
3959
1da177e4 3960static int
829ca9a3 3961e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 3962{
3963 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 3964 struct e1000_adapter *adapter = netdev_priv(netdev);
2d7edb92 3965 uint32_t ctrl, ctrl_ext, rctl, manc, status, swsm;
1da177e4
LT		 3966 uint32_t wufc = adapter->wol;
3967
3968 netif_device_detach(netdev);
3969
3970 if(netif_running(netdev))
3971 e1000_down(adapter);
3972
3973 status = E1000_READ_REG(&adapter->hw, STATUS);
3974 if(status & E1000_STATUS_LU)
3975 wufc &= ~E1000_WUFC_LNKC;
3976
3977 if(wufc) {
3978 e1000_setup_rctl(adapter);
3979 e1000_set_multi(netdev);
3980
3981 /* turn on all-multi mode if wake on multicast is enabled */
3982 if(adapter->wol & E1000_WUFC_MC) {
3983 rctl = E1000_READ_REG(&adapter->hw, RCTL);
3984 rctl |= E1000_RCTL_MPE;
3985 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
3986 }
3987
3988 if(adapter->hw.mac_type >= e1000_82540) {
3989 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
3990 /* advertise wake from D3Cold */
3991 #define E1000_CTRL_ADVD3WUC 0x00100000
3992 /* phy power management enable */
3993 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
3994 ctrl |= E1000_CTRL_ADVD3WUC |
3995 E1000_CTRL_EN_PHY_PWR_MGMT;
3996 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
3997 }
3998
3999 if(adapter->hw.media_type == e1000_media_type_fiber ||
4000 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4001 /* keep the laser running in D3 */
4002 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4003 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4004 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4005 }
4006
2d7edb92
MC		 4007 /* Allow time for pending master requests to run */
4008 e1000_disable_pciex_master(&adapter->hw);
4009
1da177e4
LT		 4010 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4011 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4012 pci_enable_wake(pdev, 3, 1);
4013 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4014 } else {
4015 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4016 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4017 pci_enable_wake(pdev, 3, 0);
4018 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4019 }
4020
4021 pci_save_state(pdev);
4022
4023 if(adapter->hw.mac_type >= e1000_82540 &&
4024 adapter->hw.media_type == e1000_media_type_copper) {
4025 manc = E1000_READ_REG(&adapter->hw, MANC);
4026 if(manc & E1000_MANC_SMBUS_EN) {
4027 manc |= E1000_MANC_ARP_EN;
4028 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4029 pci_enable_wake(pdev, 3, 1);
4030 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4031 }
4032 }
4033
2d7edb92 4034 switch(adapter->hw.mac_type) {
868d5309
MC		 4035 case e1000_82571:
4036 case e1000_82572:
4037 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4038 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
4039 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
4040 break;
2d7edb92
MC		 4041 case e1000_82573:
4042 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4043 E1000_WRITE_REG(&adapter->hw, SWSM,
4044 swsm & ~E1000_SWSM_DRV_LOAD);
4045 break;
4046 default:
4047 break;
4048 }
4049
1da177e4 4050 pci_disable_device(pdev);
829ca9a3 4051 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4052
4053 return 0;
4054}
4055
4056#ifdef CONFIG_PM
4057static int
4058e1000_resume(struct pci_dev *pdev)
4059{
4060 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4061 struct e1000_adapter *adapter = netdev_priv(netdev);
2b02893e 4062 uint32_t manc, ret_val, swsm;
868d5309 4063 uint32_t ctrl_ext;
1da177e4 4064
829ca9a3 4065 pci_set_power_state(pdev, PCI_D0);
1da177e4 4066 pci_restore_state(pdev);
2b02893e 4067 ret_val = pci_enable_device(pdev);
a4cb847d 4068 pci_set_master(pdev);
1da177e4 4069
829ca9a3
PM		 4070 pci_enable_wake(pdev, PCI_D3hot, 0);
4071 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4072
4073 e1000_reset(adapter);
4074 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4075
4076 if(netif_running(netdev))
4077 e1000_up(adapter);
4078
4079 netif_device_attach(netdev);
4080
4081 if(adapter->hw.mac_type >= e1000_82540 &&
4082 adapter->hw.media_type == e1000_media_type_copper) {
4083 manc = E1000_READ_REG(&adapter->hw, MANC);
4084 manc &= ~(E1000_MANC_ARP_EN);
4085 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4086 }
4087
2d7edb92 4088 switch(adapter->hw.mac_type) {
868d5309
MC		 4089 case e1000_82571:
4090 case e1000_82572:
4091 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4092 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
4093 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
4094 break;
2d7edb92
MC		 4095 case e1000_82573:
4096 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4097 E1000_WRITE_REG(&adapter->hw, SWSM,
4098 swsm | E1000_SWSM_DRV_LOAD);
4099 break;
4100 default:
4101 break;
4102 }
4103
1da177e4
LT		 4104 return 0;
4105}
4106#endif
1da177e4
LT		 4107#ifdef CONFIG_NET_POLL_CONTROLLER
4108/*
4109 * Polling 'interrupt' - used by things like netconsole to send skbs
4110 * without having to re-enable interrupts. It's not called while
4111 * the interrupt routine is executing.
4112 */
4113static void
2648345f 4114e1000_netpoll(struct net_device *netdev)
1da177e4 4115{
60490fe0 4116 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4117 disable_irq(adapter->pdev->irq);
4118 e1000_intr(adapter->pdev->irq, netdev, NULL);
6b0b3157 4119 e1000_clean_tx_irq(adapter);
1da177e4
LT		 4120 enable_irq(adapter->pdev->irq);
4121}
4122#endif
4123
4124/* e1000_main.c */
Linux kernel - Deliverables
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