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Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
c3570acb 34#define DRV_VERSION "7.3.20-k3-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4
LT		 127static void e1000_82547_tx_fifo_stall(unsigned long data);
128static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
129static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
130static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
131static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 132static irqreturn_t e1000_intr(int irq, void *data);
9ac98284 133static irqreturn_t e1000_intr_msi(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
581d708e 140static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 141 struct e1000_rx_ring *rx_ring,
142 int cleaned_count);
1da177e4
LT		 143static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
144static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
145 int cmd);
1da177e4
LT		 146static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
147static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
148static void e1000_tx_timeout(struct net_device *dev);
65f27f38 149static void e1000_reset_task(struct work_struct *work);
1da177e4 150static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 151static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
152 struct sk_buff *skb);
1da177e4
LT		 153
154static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 155static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
156static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 157static void e1000_restore_vlan(struct e1000_adapter *adapter);
158
977e74b5 159static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 160#ifdef CONFIG_PM
1da177e4
LT		 161static int e1000_resume(struct pci_dev *pdev);
162#endif
c653e635 163static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 164
165#ifdef CONFIG_NET_POLL_CONTROLLER
166/* for netdump / net console */
167static void e1000_netpoll (struct net_device *netdev);
168#endif
169
1f753861
JB		 170#define COPYBREAK_DEFAULT 256
171static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
172module_param(copybreak, uint, 0644);
173MODULE_PARM_DESC(copybreak,
174 "Maximum size of packet that is copied to a new buffer on receive");
175
9026729b
AK		 176static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
177 pci_channel_state_t state);
178static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
179static void e1000_io_resume(struct pci_dev *pdev);
180
181static struct pci_error_handlers e1000_err_handler = {
182 .error_detected = e1000_io_error_detected,
183 .slot_reset = e1000_io_slot_reset,
184 .resume = e1000_io_resume,
185};
24025e4e 186
1da177e4
LT		 187static struct pci_driver e1000_driver = {
188 .name = e1000_driver_name,
189 .id_table = e1000_pci_tbl,
190 .probe = e1000_probe,
191 .remove = __devexit_p(e1000_remove),
c4e24f01 192#ifdef CONFIG_PM
1da177e4 193 /* Power Managment Hooks */
1da177e4 194 .suspend = e1000_suspend,
c653e635 195 .resume = e1000_resume,
1da177e4 196#endif
9026729b
AK		 197 .shutdown = e1000_shutdown,
198 .err_handler = &e1000_err_handler
1da177e4
LT		 199};
200
201MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
202MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
203MODULE_LICENSE("GPL");
204MODULE_VERSION(DRV_VERSION);
205
206static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
207module_param(debug, int, 0);
208MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
209
210/**
211 * e1000_init_module - Driver Registration Routine
212 *
213 * e1000_init_module is the first routine called when the driver is
214 * loaded. All it does is register with the PCI subsystem.
215 **/
216
64798845 217static int __init e1000_init_module(void)
1da177e4
LT		 218{
219 int ret;
220 printk(KERN_INFO "%s - version %s\n",
221 e1000_driver_string, e1000_driver_version);
222
223 printk(KERN_INFO "%s\n", e1000_copyright);
224
29917620 225 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 226 if (copybreak != COPYBREAK_DEFAULT) {
227 if (copybreak == 0)
228 printk(KERN_INFO "e1000: copybreak disabled\n");
229 else
230 printk(KERN_INFO "e1000: copybreak enabled for "
231 "packets <= %u bytes\n", copybreak);
232 }
1da177e4
LT		 233 return ret;
234}
235
236module_init(e1000_init_module);
237
238/**
239 * e1000_exit_module - Driver Exit Cleanup Routine
240 *
241 * e1000_exit_module is called just before the driver is removed
242 * from memory.
243 **/
244
64798845 245static void __exit e1000_exit_module(void)
1da177e4 246{
1da177e4
LT		 247 pci_unregister_driver(&e1000_driver);
248}
249
250module_exit(e1000_exit_module);
251
2db10a08
AK		 252static int e1000_request_irq(struct e1000_adapter *adapter)
253{
1dc32918 254 struct e1000_hw *hw = &adapter->hw;
2db10a08 255 struct net_device *netdev = adapter->netdev;
3e18826c 256 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 257 int irq_flags = IRQF_SHARED;
258 int err;
2db10a08 259
1dc32918 260 if (hw->mac_type >= e1000_82571) {
e94bd23f
AK		 261 adapter->have_msi = !pci_enable_msi(adapter->pdev);
262 if (adapter->have_msi) {
3e18826c 263 handler = e1000_intr_msi;
e94bd23f 264 irq_flags = 0;
2db10a08
AK		 265 }
266 }
e94bd23f
AK		 267
268 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
269 netdev);
270 if (err) {
271 if (adapter->have_msi)
272 pci_disable_msi(adapter->pdev);
2db10a08
AK		 273 DPRINTK(PROBE, ERR,
274 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 275 }
2db10a08
AK		 276
277 return err;
278}
279
280static void e1000_free_irq(struct e1000_adapter *adapter)
281{
282 struct net_device *netdev = adapter->netdev;
283
284 free_irq(adapter->pdev->irq, netdev);
285
2db10a08
AK		 286 if (adapter->have_msi)
287 pci_disable_msi(adapter->pdev);
2db10a08
AK		 288}
289
1da177e4
LT		 290/**
291 * e1000_irq_disable - Mask off interrupt generation on the NIC
292 * @adapter: board private structure
293 **/
294
64798845 295static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 296{
1dc32918
JP		 297 struct e1000_hw *hw = &adapter->hw;
298
299 ew32(IMC, ~0);
300 E1000_WRITE_FLUSH();
1da177e4
LT		 301 synchronize_irq(adapter->pdev->irq);
302}
303
304/**
305 * e1000_irq_enable - Enable default interrupt generation settings
306 * @adapter: board private structure
307 **/
308
64798845 309static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 310{
1dc32918
JP		 311 struct e1000_hw *hw = &adapter->hw;
312
313 ew32(IMS, IMS_ENABLE_MASK);
314 E1000_WRITE_FLUSH();
1da177e4 315}
3ad2cc67 316
64798845 317static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 318{
1dc32918 319 struct e1000_hw *hw = &adapter->hw;
2d7edb92 320 struct net_device *netdev = adapter->netdev;
1dc32918 321 u16 vid = hw->mng_cookie.vlan_id;
406874a7 322 u16 old_vid = adapter->mng_vlan_id;
96838a40 323 if (adapter->vlgrp) {
5c15bdec 324 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 325 if (hw->mng_cookie.status &
2d7edb92
MC		 326 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
327 e1000_vlan_rx_add_vid(netdev, vid);
328 adapter->mng_vlan_id = vid;
329 } else
330 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 331
406874a7 332 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 333 (vid != old_vid) &&
5c15bdec 334 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 335 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 336 } else
337 adapter->mng_vlan_id = vid;
2d7edb92
MC		 338 }
339}
b55ccb35
JK		 340
341/**
342 * e1000_release_hw_control - release control of the h/w to f/w
343 * @adapter: address of board private structure
344 *
345 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
346 * For ASF and Pass Through versions of f/w this means that the
347 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 348 * of the f/w this means that the network i/f is closed.
76c224bc 349 *
b55ccb35
JK		 350 **/
351
64798845 352static void e1000_release_hw_control(struct e1000_adapter *adapter)
b55ccb35 353{
406874a7
JP		 354 u32 ctrl_ext;
355 u32 swsm;
1dc32918 356 struct e1000_hw *hw = &adapter->hw;
b55ccb35
JK		 357
358 /* Let firmware taken over control of h/w */
1dc32918 359 switch (hw->mac_type) {
b55ccb35 360 case e1000_82573:
1dc32918
JP		 361 swsm = er32(SWSM);
362 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
31d76442
BA		 363 break;
364 case e1000_82571:
365 case e1000_82572:
366 case e1000_80003es2lan:
cd94dd0b 367 case e1000_ich8lan:
1dc32918
JP		 368 ctrl_ext = er32(CTRL_EXT);
369 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 370 break;
b55ccb35
JK		 371 default:
372 break;
373 }
374}
375
376/**
377 * e1000_get_hw_control - get control of the h/w from f/w
378 * @adapter: address of board private structure
379 *
380 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 381 * For ASF and Pass Through versions of f/w this means that
382 * the driver is loaded. For AMT version (only with 82573)
90fb5135 383 * of the f/w this means that the network i/f is open.
76c224bc 384 *
b55ccb35
JK		 385 **/
386
64798845 387static void e1000_get_hw_control(struct e1000_adapter *adapter)
b55ccb35 388{
406874a7
JP		 389 u32 ctrl_ext;
390 u32 swsm;
1dc32918 391 struct e1000_hw *hw = &adapter->hw;
90fb5135 392
b55ccb35 393 /* Let firmware know the driver has taken over */
1dc32918 394 switch (hw->mac_type) {
b55ccb35 395 case e1000_82573:
1dc32918
JP		 396 swsm = er32(SWSM);
397 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
b55ccb35 398 break;
31d76442
BA		 399 case e1000_82571:
400 case e1000_82572:
401 case e1000_80003es2lan:
cd94dd0b 402 case e1000_ich8lan:
1dc32918
JP		 403 ctrl_ext = er32(CTRL_EXT);
404 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 405 break;
b55ccb35
JK		 406 default:
407 break;
408 }
409}
410
64798845 411static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 412{
1dc32918
JP		 413 struct e1000_hw *hw = &adapter->hw;
414
0fccd0e9 415 if (adapter->en_mng_pt) {
1dc32918 416 u32 manc = er32(MANC);
0fccd0e9
JG		 417
418 /* disable hardware interception of ARP */
419 manc &= ~(E1000_MANC_ARP_EN);
420
421 /* enable receiving management packets to the host */
422 /* this will probably generate destination unreachable messages
423 * from the host OS, but the packets will be handled on SMBUS */
1dc32918
JP		 424 if (hw->has_manc2h) {
425 u32 manc2h = er32(MANC2H);
0fccd0e9
JG		 426
427 manc |= E1000_MANC_EN_MNG2HOST;
428#define E1000_MNG2HOST_PORT_623 (1 << 5)
429#define E1000_MNG2HOST_PORT_664 (1 << 6)
430 manc2h |= E1000_MNG2HOST_PORT_623;
431 manc2h |= E1000_MNG2HOST_PORT_664;
1dc32918 432 ew32(MANC2H, manc2h);
0fccd0e9
JG		 433 }
434
1dc32918 435 ew32(MANC, manc);
0fccd0e9
JG		 436 }
437}
438
64798845 439static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 440{
1dc32918
JP		 441 struct e1000_hw *hw = &adapter->hw;
442
0fccd0e9 443 if (adapter->en_mng_pt) {
1dc32918 444 u32 manc = er32(MANC);
0fccd0e9
JG		 445
446 /* re-enable hardware interception of ARP */
447 manc |= E1000_MANC_ARP_EN;
448
1dc32918 449 if (hw->has_manc2h)
0fccd0e9
JG		 450 manc &= ~E1000_MANC_EN_MNG2HOST;
451
452 /* don't explicitly have to mess with MANC2H since
453 * MANC has an enable disable that gates MANC2H */
454
1dc32918 455 ew32(MANC, manc);
0fccd0e9
JG		 456 }
457}
458
e0aac5a2
AK		 459/**
460 * e1000_configure - configure the hardware for RX and TX
461 * @adapter = private board structure
462 **/
463static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 464{
465 struct net_device *netdev = adapter->netdev;
2db10a08 466 int i;
1da177e4 467
db0ce50d 468 e1000_set_rx_mode(netdev);
1da177e4
LT		 469
470 e1000_restore_vlan(adapter);
0fccd0e9 471 e1000_init_manageability(adapter);
1da177e4
LT		 472
473 e1000_configure_tx(adapter);
474 e1000_setup_rctl(adapter);
475 e1000_configure_rx(adapter);
72d64a43
JK		 476 /* call E1000_DESC_UNUSED which always leaves
477 * at least 1 descriptor unused to make sure
478 * next_to_use != next_to_clean */
f56799ea 479 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 480 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 481 adapter->alloc_rx_buf(adapter, ring,
482 E1000_DESC_UNUSED(ring));
f56799ea 483 }
1da177e4 484
7bfa4816 485 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 486}
487
488int e1000_up(struct e1000_adapter *adapter)
489{
1dc32918
JP		 490 struct e1000_hw *hw = &adapter->hw;
491
e0aac5a2
AK		 492 /* hardware has been reset, we need to reload some things */
493 e1000_configure(adapter);
494
495 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 496
bea3348e 497 napi_enable(&adapter->napi);
c3570acb 498
5de55624
MC		 499 e1000_irq_enable(adapter);
500
79f3d399 501 /* fire a link change interrupt to start the watchdog */
1dc32918 502 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 503 return 0;
504}
505
79f05bf0
AK		 506/**
507 * e1000_power_up_phy - restore link in case the phy was powered down
508 * @adapter: address of board private structure
509 *
510 * The phy may be powered down to save power and turn off link when the
511 * driver is unloaded and wake on lan is not enabled (among others)
512 * *** this routine MUST be followed by a call to e1000_reset ***
513 *
514 **/
515
d658266e 516void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 517{
1dc32918 518 struct e1000_hw *hw = &adapter->hw;
406874a7 519 u16 mii_reg = 0;
79f05bf0
AK		 520
521 /* Just clear the power down bit to wake the phy back up */
1dc32918 522 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 523 /* according to the manual, the phy will retain its
524 * settings across a power-down/up cycle */
1dc32918 525 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 526 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 527 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 528 }
529}
530
531static void e1000_power_down_phy(struct e1000_adapter *adapter)
532{
1dc32918
JP		 533 struct e1000_hw *hw = &adapter->hw;
534
61c2505f 535 /* Power down the PHY so no link is implied when interface is down *
c3033b01 536 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 537 * (a) WoL is enabled
538 * (b) AMT is active
539 * (c) SoL/IDER session is active */
1dc32918
JP		 540 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
541 hw->media_type == e1000_media_type_copper) {
406874a7 542 u16 mii_reg = 0;
61c2505f 543
1dc32918 544 switch (hw->mac_type) {
61c2505f
BA		 545 case e1000_82540:
546 case e1000_82545:
547 case e1000_82545_rev_3:
548 case e1000_82546:
549 case e1000_82546_rev_3:
550 case e1000_82541:
551 case e1000_82541_rev_2:
552 case e1000_82547:
553 case e1000_82547_rev_2:
1dc32918 554 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 555 goto out;
556 break;
557 case e1000_82571:
558 case e1000_82572:
559 case e1000_82573:
560 case e1000_80003es2lan:
561 case e1000_ich8lan:
1dc32918
JP		 562 if (e1000_check_mng_mode(hw) ||
563 e1000_check_phy_reset_block(hw))
61c2505f
BA		 564 goto out;
565 break;
566 default:
567 goto out;
568 }
1dc32918 569 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 570 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 571 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 572 mdelay(1);
573 }
61c2505f
BA		 574out:
575 return;
79f05bf0
AK		 576}
577
64798845 578void e1000_down(struct e1000_adapter *adapter)
1da177e4
LT		 579{
580 struct net_device *netdev = adapter->netdev;
581
1314bbf3
AK		 582 /* signal that we're down so the interrupt handler does not
583 * reschedule our watchdog timer */
584 set_bit(__E1000_DOWN, &adapter->flags);
585
bea3348e 586 napi_disable(&adapter->napi);
c3570acb 587
1da177e4 588 e1000_irq_disable(adapter);
c1605eb3 589
1da177e4
LT		 590 del_timer_sync(&adapter->tx_fifo_stall_timer);
591 del_timer_sync(&adapter->watchdog_timer);
592 del_timer_sync(&adapter->phy_info_timer);
593
7bfa4816 594 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 595 adapter->link_speed = 0;
596 adapter->link_duplex = 0;
597 netif_carrier_off(netdev);
598 netif_stop_queue(netdev);
599
600 e1000_reset(adapter);
581d708e
MC		 601 e1000_clean_all_tx_rings(adapter);
602 e1000_clean_all_rx_rings(adapter);
1da177e4 603}
1da177e4 604
64798845 605void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 606{
607 WARN_ON(in_interrupt());
608 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
609 msleep(1);
610 e1000_down(adapter);
611 e1000_up(adapter);
612 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 613}
614
64798845 615void e1000_reset(struct e1000_adapter *adapter)
1da177e4 616{
1dc32918 617 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 618 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
619 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
c3033b01 620 bool legacy_pba_adjust = false;
1da177e4
LT		 621
622 /* Repartition Pba for greater than 9k mtu
623 * To take effect CTRL.RST is required.
624 */
625
1dc32918 626 switch (hw->mac_type) {
018ea44e
BA		 627 case e1000_82542_rev2_0:
628 case e1000_82542_rev2_1:
629 case e1000_82543:
630 case e1000_82544:
631 case e1000_82540:
632 case e1000_82541:
633 case e1000_82541_rev_2:
c3033b01 634 legacy_pba_adjust = true;
018ea44e
BA		 635 pba = E1000_PBA_48K;
636 break;
637 case e1000_82545:
638 case e1000_82545_rev_3:
639 case e1000_82546:
640 case e1000_82546_rev_3:
641 pba = E1000_PBA_48K;
642 break;
2d7edb92 643 case e1000_82547:
0e6ef3e0 644 case e1000_82547_rev_2:
c3033b01 645 legacy_pba_adjust = true;
2d7edb92
MC		 646 pba = E1000_PBA_30K;
647 break;
868d5309
MC		 648 case e1000_82571:
649 case e1000_82572:
6418ecc6 650 case e1000_80003es2lan:
868d5309
MC		 651 pba = E1000_PBA_38K;
652 break;
2d7edb92 653 case e1000_82573:
018ea44e 654 pba = E1000_PBA_20K;
2d7edb92 655 break;
cd94dd0b
AK		 656 case e1000_ich8lan:
657 pba = E1000_PBA_8K;
018ea44e
BA		 658 case e1000_undefined:
659 case e1000_num_macs:
2d7edb92
MC		 660 break;
661 }
662
c3033b01 663 if (legacy_pba_adjust) {
018ea44e
BA		 664 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
665 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 666
1dc32918 667 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 668 adapter->tx_fifo_head = 0;
669 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
670 adapter->tx_fifo_size =
671 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
672 atomic_set(&adapter->tx_fifo_stall, 0);
673 }
1dc32918 674 } else if (hw->max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
018ea44e 675 /* adjust PBA for jumbo frames */
1dc32918 676 ew32(PBA, pba);
018ea44e
BA		 677
678 /* To maintain wire speed transmits, the Tx FIFO should be
679 * large enough to accomodate two full transmit packets,
680 * rounded up to the next 1KB and expressed in KB. Likewise,
681 * the Rx FIFO should be large enough to accomodate at least
682 * one full receive packet and is similarly rounded up and
683 * expressed in KB. */
1dc32918 684 pba = er32(PBA);
018ea44e
BA		 685 /* upper 16 bits has Tx packet buffer allocation size in KB */
686 tx_space = pba >> 16;
687 /* lower 16 bits has Rx packet buffer allocation size in KB */
688 pba &= 0xffff;
689 /* don't include ethernet FCS because hardware appends/strips */
690 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
691 VLAN_TAG_SIZE;
692 min_tx_space = min_rx_space;
693 min_tx_space *= 2;
9099cfb9 694 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 695 min_tx_space >>= 10;
9099cfb9 696 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 697 min_rx_space >>= 10;
698
699 /* If current Tx allocation is less than the min Tx FIFO size,
700 * and the min Tx FIFO size is less than the current Rx FIFO
701 * allocation, take space away from current Rx allocation */
702 if (tx_space < min_tx_space &&
703 ((min_tx_space - tx_space) < pba)) {
704 pba = pba - (min_tx_space - tx_space);
705
706 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 707 switch (hw->mac_type) {
018ea44e
BA		 708 case e1000_82545 ... e1000_82546_rev_3:
709 pba &= ~(E1000_PBA_8K - 1);
710 break;
711 default:
712 break;
713 }
714
715 /* if short on rx space, rx wins and must trump tx
716 * adjustment or use Early Receive if available */
717 if (pba < min_rx_space) {
1dc32918 718 switch (hw->mac_type) {
018ea44e
BA		 719 case e1000_82573:
720 /* ERT enabled in e1000_configure_rx */
721 break;
722 default:
723 pba = min_rx_space;
724 break;
725 }
726 }
727 }
1da177e4 728 }
2d7edb92 729
1dc32918 730 ew32(PBA, pba);
1da177e4
LT		 731
732 /* flow control settings */
f11b7f85
JK		 733 /* Set the FC high water mark to 90% of the FIFO size.
734 * Required to clear last 3 LSB */
735 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 736 /* We can't use 90% on small FIFOs because the remainder
737 * would be less than 1 full frame. In this case, we size
738 * it to allow at least a full frame above the high water
739 * mark. */
740 if (pba < E1000_PBA_16K)
741 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85 742
1dc32918
JP		 743 hw->fc_high_water = fc_high_water_mark;
744 hw->fc_low_water = fc_high_water_mark - 8;
745 if (hw->mac_type == e1000_80003es2lan)
746 hw->fc_pause_time = 0xFFFF;
87041639 747 else
1dc32918
JP		 748 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
749 hw->fc_send_xon = 1;
750 hw->fc = hw->original_fc;
1da177e4 751
2d7edb92 752 /* Allow time for pending master requests to run */
1dc32918
JP		 753 e1000_reset_hw(hw);
754 if (hw->mac_type >= e1000_82544)
755 ew32(WUC, 0);
09ae3e88 756
1dc32918 757 if (e1000_init_hw(hw))
1da177e4 758 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 759 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 760
761 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918
JP		 762 if (hw->mac_type >= e1000_82544 &&
763 hw->mac_type <= e1000_82547_rev_2 &&
764 hw->autoneg == 1 &&
765 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
766 u32 ctrl = er32(CTRL);
3d5460a0
JB		 767 /* clear phy power management bit if we are in gig only mode,
768 * which if enabled will attempt negotiation to 100Mb, which
769 * can cause a loss of link at power off or driver unload */
770 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 771 ew32(CTRL, ctrl);
3d5460a0
JB		 772 }
773
1da177e4 774 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 775 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 776
1dc32918
JP		 777 e1000_reset_adaptive(hw);
778 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202
AK		 779
780 if (!adapter->smart_power_down &&
1dc32918
JP		 781 (hw->mac_type == e1000_82571 ||
782 hw->mac_type == e1000_82572)) {
406874a7 783 u16 phy_data = 0;
9a53a202
AK		 784 /* speed up time to link by disabling smart power down, ignore
785 * the return value of this function because there is nothing
786 * different we would do if it failed */
1dc32918 787 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 788 &phy_data);
789 phy_data &= ~IGP02E1000_PM_SPD;
1dc32918 790 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 791 phy_data);
792 }
793
0fccd0e9 794 e1000_release_manageability(adapter);
1da177e4
LT		 795}
796
67b3c27c
AK		 797/**
798 * Dump the eeprom for users having checksum issues
799 **/
b4ea895d 800static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 801{
802 struct net_device *netdev = adapter->netdev;
803 struct ethtool_eeprom eeprom;
804 const struct ethtool_ops *ops = netdev->ethtool_ops;
805 u8 *data;
806 int i;
807 u16 csum_old, csum_new = 0;
808
809 eeprom.len = ops->get_eeprom_len(netdev);
810 eeprom.offset = 0;
811
812 data = kmalloc(eeprom.len, GFP_KERNEL);
813 if (!data) {
814 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
815 " data\n");
816 return;
817 }
818
819 ops->get_eeprom(netdev, &eeprom, data);
820
821 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
822 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
823 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
824 csum_new += data[i] + (data[i + 1] << 8);
825 csum_new = EEPROM_SUM - csum_new;
826
827 printk(KERN_ERR "/*********************/\n");
828 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
829 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
830
831 printk(KERN_ERR "Offset Values\n");
832 printk(KERN_ERR "======== ======\n");
833 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
834
835 printk(KERN_ERR "Include this output when contacting your support "
836 "provider.\n");
837 printk(KERN_ERR "This is not a software error! Something bad "
838 "happened to your hardware or\n");
839 printk(KERN_ERR "EEPROM image. Ignoring this "
840 "problem could result in further problems,\n");
841 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
842 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
843 "which is invalid\n");
844 printk(KERN_ERR "and requires you to set the proper MAC "
845 "address manually before continuing\n");
846 printk(KERN_ERR "to enable this network device.\n");
847 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
848 "to your hardware vendor\n");
63cd31f6 849 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 850 printk(KERN_ERR "/*********************/\n");
851
852 kfree(data);
853}
854
81250297
TI		 855/**
856 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
857 * @pdev: PCI device information struct
858 *
859 * Return true if an adapter needs ioport resources
860 **/
861static int e1000_is_need_ioport(struct pci_dev *pdev)
862{
863 switch (pdev->device) {
864 case E1000_DEV_ID_82540EM:
865 case E1000_DEV_ID_82540EM_LOM:
866 case E1000_DEV_ID_82540EP:
867 case E1000_DEV_ID_82540EP_LOM:
868 case E1000_DEV_ID_82540EP_LP:
869 case E1000_DEV_ID_82541EI:
870 case E1000_DEV_ID_82541EI_MOBILE:
871 case E1000_DEV_ID_82541ER:
872 case E1000_DEV_ID_82541ER_LOM:
873 case E1000_DEV_ID_82541GI:
874 case E1000_DEV_ID_82541GI_LF:
875 case E1000_DEV_ID_82541GI_MOBILE:
876 case E1000_DEV_ID_82544EI_COPPER:
877 case E1000_DEV_ID_82544EI_FIBER:
878 case E1000_DEV_ID_82544GC_COPPER:
879 case E1000_DEV_ID_82544GC_LOM:
880 case E1000_DEV_ID_82545EM_COPPER:
881 case E1000_DEV_ID_82545EM_FIBER:
882 case E1000_DEV_ID_82546EB_COPPER:
883 case E1000_DEV_ID_82546EB_FIBER:
884 case E1000_DEV_ID_82546EB_QUAD_COPPER:
885 return true;
886 default:
887 return false;
888 }
889}
890
0e7614bc
SH		 891static const struct net_device_ops e1000_netdev_ops = {
892 .ndo_open = e1000_open,
893 .ndo_stop = e1000_close,
894 .ndo_get_stats = e1000_get_stats,
895 .ndo_set_rx_mode = e1000_set_rx_mode,
896 .ndo_set_mac_address = e1000_set_mac,
897 .ndo_tx_timeout = e1000_tx_timeout,
898 .ndo_change_mtu = e1000_change_mtu,
899 .ndo_do_ioctl = e1000_ioctl,
900 .ndo_validate_addr = eth_validate_addr,
901
902 .ndo_vlan_rx_register = e1000_vlan_rx_register,
903 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
904 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
905#ifdef CONFIG_NET_POLL_CONTROLLER
906 .ndo_poll_controller = e1000_netpoll,
907#endif
908};
909
1da177e4
LT		 910/**
911 * e1000_probe - Device Initialization Routine
912 * @pdev: PCI device information struct
913 * @ent: entry in e1000_pci_tbl
914 *
915 * Returns 0 on success, negative on failure
916 *
917 * e1000_probe initializes an adapter identified by a pci_dev structure.
918 * The OS initialization, configuring of the adapter private structure,
919 * and a hardware reset occur.
920 **/
1dc32918
JP		 921static int __devinit e1000_probe(struct pci_dev *pdev,
922 const struct pci_device_id *ent)
1da177e4
LT		 923{
924 struct net_device *netdev;
925 struct e1000_adapter *adapter;
1dc32918 926 struct e1000_hw *hw;
2d7edb92 927
1da177e4 928 static int cards_found = 0;
120cd576 929 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 930 int i, err, pci_using_dac;
406874a7
JP		 931 u16 eeprom_data = 0;
932 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 933 int bars, need_ioport;
0795af57 934
81250297
TI		 935 /* do not allocate ioport bars when not needed */
936 need_ioport = e1000_is_need_ioport(pdev);
937 if (need_ioport) {
938 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
939 err = pci_enable_device(pdev);
940 } else {
941 bars = pci_select_bars(pdev, IORESOURCE_MEM);
942 err = pci_enable_device(pdev);
943 }
c7be73bc 944 if (err)
1da177e4
LT		 945 return err;
946
c7be73bc
JP		 947 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
948 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
1da177e4
LT		 949 pci_using_dac = 1;
950 } else {
c7be73bc
JP		 951 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
952 if (err) {
953 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
954 if (err) {
955 E1000_ERR("No usable DMA configuration, "
956 "aborting\n");
957 goto err_dma;
958 }
1da177e4
LT		 959 }
960 pci_using_dac = 0;
961 }
962
81250297 963 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 964 if (err)
6dd62ab0 965 goto err_pci_reg;
1da177e4
LT		 966
967 pci_set_master(pdev);
968
6dd62ab0 969 err = -ENOMEM;
1da177e4 970 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 971 if (!netdev)
1da177e4 972 goto err_alloc_etherdev;
1da177e4 973
1da177e4
LT		 974 SET_NETDEV_DEV(netdev, &pdev->dev);
975
976 pci_set_drvdata(pdev, netdev);
60490fe0 977 adapter = netdev_priv(netdev);
1da177e4
LT		 978 adapter->netdev = netdev;
979 adapter->pdev = pdev;
1da177e4 980 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 981 adapter->bars = bars;
982 adapter->need_ioport = need_ioport;
1da177e4 983
1dc32918
JP		 984 hw = &adapter->hw;
985 hw->back = adapter;
986
6dd62ab0 987 err = -EIO;
275f165f 988 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 989 if (!hw->hw_addr)
1da177e4 990 goto err_ioremap;
1da177e4 991
81250297
TI		 992 if (adapter->need_ioport) {
993 for (i = BAR_1; i <= BAR_5; i++) {
994 if (pci_resource_len(pdev, i) == 0)
995 continue;
996 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
997 hw->io_base = pci_resource_start(pdev, i);
998 break;
999 }
1da177e4
LT		 1000 }
1001 }
1002
0e7614bc 1003 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1004 netdev->hard_start_xmit = &e1000_xmit_frame;
1da177e4 1005 e1000_set_ethtool_ops(netdev);
1da177e4 1006 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1007 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1008
0eb5a34c 1009 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1010
1da177e4
LT		 1011 adapter->bd_number = cards_found;
1012
1013 /* setup the private structure */
1014
c7be73bc
JP		 1015 err = e1000_sw_init(adapter);
1016 if (err)
1da177e4
LT		 1017 goto err_sw_init;
1018
6dd62ab0 1019 err = -EIO;
cd94dd0b
AK		 1020 /* Flash BAR mapping must happen after e1000_sw_init
1021 * because it depends on mac_type */
1dc32918 1022 if ((hw->mac_type == e1000_ich8lan) &&
cd94dd0b 1023 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
275f165f 1024 hw->flash_address = pci_ioremap_bar(pdev, 1);
1dc32918 1025 if (!hw->flash_address)
cd94dd0b 1026 goto err_flashmap;
cd94dd0b
AK		 1027 }
1028
1dc32918 1029 if (e1000_check_phy_reset_block(hw))
2d7edb92
MC		 1030 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1031
1dc32918 1032 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 1033 netdev->features = NETIF_F_SG |
1034 NETIF_F_HW_CSUM |
1035 NETIF_F_HW_VLAN_TX |
1036 NETIF_F_HW_VLAN_RX |
1037 NETIF_F_HW_VLAN_FILTER;
1dc32918 1038 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 1039 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 1040 }
1041
1dc32918
JP		 1042 if ((hw->mac_type >= e1000_82544) &&
1043 (hw->mac_type != e1000_82547))
1da177e4 1044 netdev->features |= NETIF_F_TSO;
2d7edb92 1045
1dc32918 1046 if (hw->mac_type > e1000_82547_rev_2)
87ca4e5b 1047 netdev->features |= NETIF_F_TSO6;
96838a40 1048 if (pci_using_dac)
1da177e4
LT		 1049 netdev->features |= NETIF_F_HIGHDMA;
1050
76c224bc
AK		 1051 netdev->features |= NETIF_F_LLTX;
1052
20501a69
PM		 1053 netdev->vlan_features |= NETIF_F_TSO;
1054 netdev->vlan_features |= NETIF_F_TSO6;
1055 netdev->vlan_features |= NETIF_F_HW_CSUM;
1056 netdev->vlan_features |= NETIF_F_SG;
1057
1dc32918 1058 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1059
cd94dd0b 1060 /* initialize eeprom parameters */
1dc32918 1061 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 1062 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1063 goto err_eeprom;
cd94dd0b
AK		 1064 }
1065
96838a40 1066 /* before reading the EEPROM, reset the controller to
1da177e4 1067 * put the device in a known good starting state */
96838a40 1068
1dc32918 1069 e1000_reset_hw(hw);
1da177e4
LT		 1070
1071 /* make sure the EEPROM is good */
1dc32918 1072 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 1073 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 1074 e1000_dump_eeprom(adapter);
1075 /*
1076 * set MAC address to all zeroes to invalidate and temporary
1077 * disable this device for the user. This blocks regular
1078 * traffic while still permitting ethtool ioctls from reaching
1079 * the hardware as well as allowing the user to run the
1080 * interface after manually setting a hw addr using
1081 * `ip set address`
1082 */
1dc32918 1083 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1084 } else {
1085 /* copy the MAC address out of the EEPROM */
1dc32918 1086 if (e1000_read_mac_addr(hw))
67b3c27c 1087 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 1088 }
67b3c27c 1089 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 1090 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1091 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1092
67b3c27c 1093 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 1094 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 1095
1dc32918 1096 e1000_get_bus_info(hw);
1da177e4
LT		 1097
1098 init_timer(&adapter->tx_fifo_stall_timer);
1099 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 1100 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 1101
1102 init_timer(&adapter->watchdog_timer);
1103 adapter->watchdog_timer.function = &e1000_watchdog;
1104 adapter->watchdog_timer.data = (unsigned long) adapter;
1105
1da177e4
LT		 1106 init_timer(&adapter->phy_info_timer);
1107 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 1108 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 1109
65f27f38 1110 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1111
1da177e4
LT		 1112 e1000_check_options(adapter);
1113
1114 /* Initial Wake on LAN setting
1115 * If APM wake is enabled in the EEPROM,
1116 * enable the ACPI Magic Packet filter
1117 */
1118
1dc32918 1119 switch (hw->mac_type) {
1da177e4
LT		 1120 case e1000_82542_rev2_0:
1121 case e1000_82542_rev2_1:
1122 case e1000_82543:
1123 break;
1124 case e1000_82544:
1dc32918 1125 e1000_read_eeprom(hw,
1da177e4
LT		 1126 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1127 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1128 break;
cd94dd0b 1129 case e1000_ich8lan:
1dc32918 1130 e1000_read_eeprom(hw,
cd94dd0b
AK		 1131 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1132 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1133 break;
1da177e4
LT		 1134 case e1000_82546:
1135 case e1000_82546_rev_3:
fd803241 1136 case e1000_82571:
6418ecc6 1137 case e1000_80003es2lan:
1dc32918
JP		 1138 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1139 e1000_read_eeprom(hw,
1da177e4
LT		 1140 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1141 break;
1142 }
1143 /* Fall Through */
1144 default:
1dc32918 1145 e1000_read_eeprom(hw,
1da177e4
LT		 1146 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1147 break;
1148 }
96838a40 1149 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1150 adapter->eeprom_wol |= E1000_WUFC_MAG;
1151
1152 /* now that we have the eeprom settings, apply the special cases
1153 * where the eeprom may be wrong or the board simply won't support
1154 * wake on lan on a particular port */
1155 switch (pdev->device) {
1156 case E1000_DEV_ID_82546GB_PCIE:
1157 adapter->eeprom_wol = 0;
1158 break;
1159 case E1000_DEV_ID_82546EB_FIBER:
1160 case E1000_DEV_ID_82546GB_FIBER:
1161 case E1000_DEV_ID_82571EB_FIBER:
1162 /* Wake events only supported on port A for dual fiber
1163 * regardless of eeprom setting */
1dc32918 1164 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1165 adapter->eeprom_wol = 0;
1166 break;
1167 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1168 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1169 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1170 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
f4ec7f98 1171 case E1000_DEV_ID_82571PT_QUAD_COPPER:
120cd576
JB		 1172 /* if quad port adapter, disable WoL on all but port A */
1173 if (global_quad_port_a != 0)
1174 adapter->eeprom_wol = 0;
1175 else
1176 adapter->quad_port_a = 1;
1177 /* Reset for multiple quad port adapters */
1178 if (++global_quad_port_a == 4)
1179 global_quad_port_a = 0;
1180 break;
1181 }
1182
1183 /* initialize the wol settings based on the eeprom settings */
1184 adapter->wol = adapter->eeprom_wol;
de126489 1185 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1186
fb3d47d4 1187 /* print bus type/speed/width info */
fb3d47d4
JK		 1188 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1189 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1190 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1191 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1192 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1193 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1194 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1195 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1196 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1197 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1198 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1199 "32-bit"));
fb3d47d4 1200
e174961c 1201 printk("%pM\n", netdev->dev_addr);
fb3d47d4 1202
1dc32918 1203 if (hw->bus_type == e1000_bus_type_pci_express) {
14782ca8
AK		 1204 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1205 "longer be supported by this driver in the future.\n",
1206 pdev->vendor, pdev->device);
1207 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1208 "driver instead.\n");
1209 }
1210
1da177e4
LT		 1211 /* reset the hardware with the new settings */
1212 e1000_reset(adapter);
1213
b55ccb35
JK		 1214 /* If the controller is 82573 and f/w is AMT, do not set
1215 * DRV_LOAD until the interface is up. For all other cases,
1216 * let the f/w know that the h/w is now under the control
1217 * of the driver. */
1dc32918
JP		 1218 if (hw->mac_type != e1000_82573 ||
1219 !e1000_check_mng_mode(hw))
b55ccb35 1220 e1000_get_hw_control(adapter);
2d7edb92 1221
1314bbf3
AK		 1222 /* tell the stack to leave us alone until e1000_open() is called */
1223 netif_carrier_off(netdev);
1224 netif_stop_queue(netdev);
416b5d10
AK		 1225
1226 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1227 err = register_netdev(netdev);
1228 if (err)
416b5d10 1229 goto err_register;
1314bbf3 1230
1da177e4
LT		 1231 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1232
1233 cards_found++;
1234 return 0;
1235
1236err_register:
6dd62ab0
VA		 1237 e1000_release_hw_control(adapter);
1238err_eeprom:
1dc32918
JP		 1239 if (!e1000_check_phy_reset_block(hw))
1240 e1000_phy_hw_reset(hw);
6dd62ab0 1241
1dc32918
JP		 1242 if (hw->flash_address)
1243 iounmap(hw->flash_address);
cd94dd0b 1244err_flashmap:
6dd62ab0
VA		 1245 for (i = 0; i < adapter->num_rx_queues; i++)
1246 dev_put(&adapter->polling_netdev[i]);
6dd62ab0
VA		 1247
1248 kfree(adapter->tx_ring);
1249 kfree(adapter->rx_ring);
6dd62ab0 1250 kfree(adapter->polling_netdev);
1da177e4 1251err_sw_init:
1dc32918 1252 iounmap(hw->hw_addr);
1da177e4
LT		 1253err_ioremap:
1254 free_netdev(netdev);
1255err_alloc_etherdev:
81250297 1256 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1257err_pci_reg:
1258err_dma:
1259 pci_disable_device(pdev);
1da177e4
LT		 1260 return err;
1261}
1262
1263/**
1264 * e1000_remove - Device Removal Routine
1265 * @pdev: PCI device information struct
1266 *
1267 * e1000_remove is called by the PCI subsystem to alert the driver
1268 * that it should release a PCI device. The could be caused by a
1269 * Hot-Plug event, or because the driver is going to be removed from
1270 * memory.
1271 **/
1272
64798845 1273static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1274{
1275 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1276 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1277 struct e1000_hw *hw = &adapter->hw;
581d708e 1278 int i;
1da177e4 1279
28e53bdd 1280 cancel_work_sync(&adapter->reset_task);
be2b28ed 1281
0fccd0e9 1282 e1000_release_manageability(adapter);
1da177e4 1283
b55ccb35
JK		 1284 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1285 * would have already happened in close and is redundant. */
1286 e1000_release_hw_control(adapter);
2d7edb92 1287
f56799ea 1288 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1289 dev_put(&adapter->polling_netdev[i]);
1da177e4 1290
bea3348e
SH		 1291 unregister_netdev(netdev);
1292
1dc32918
JP		 1293 if (!e1000_check_phy_reset_block(hw))
1294 e1000_phy_hw_reset(hw);
1da177e4 1295
24025e4e
MC		 1296 kfree(adapter->tx_ring);
1297 kfree(adapter->rx_ring);
24025e4e 1298 kfree(adapter->polling_netdev);
24025e4e 1299
1dc32918
JP		 1300 iounmap(hw->hw_addr);
1301 if (hw->flash_address)
1302 iounmap(hw->flash_address);
81250297 1303 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1304
1305 free_netdev(netdev);
1306
1307 pci_disable_device(pdev);
1308}
1309
1310/**
1311 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1312 * @adapter: board private structure to initialize
1313 *
1314 * e1000_sw_init initializes the Adapter private data structure.
1315 * Fields are initialized based on PCI device information and
1316 * OS network device settings (MTU size).
1317 **/
1318
64798845 1319static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1320{
1321 struct e1000_hw *hw = &adapter->hw;
1322 struct net_device *netdev = adapter->netdev;
1323 struct pci_dev *pdev = adapter->pdev;
581d708e 1324 int i;
1da177e4
LT		 1325
1326 /* PCI config space info */
1327
1328 hw->vendor_id = pdev->vendor;
1329 hw->device_id = pdev->device;
1330 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1331 hw->subsystem_id = pdev->subsystem_device;
44c10138 1332 hw->revision_id = pdev->revision;
1da177e4
LT		 1333
1334 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1335
eb0f8054 1336 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1337 hw->max_frame_size = netdev->mtu +
1338 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1339 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1340
1341 /* identify the MAC */
1342
96838a40 1343 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1344 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1345 return -EIO;
1346 }
1347
96838a40 1348 switch (hw->mac_type) {
1da177e4
LT		 1349 default:
1350 break;
1351 case e1000_82541:
1352 case e1000_82547:
1353 case e1000_82541_rev_2:
1354 case e1000_82547_rev_2:
1355 hw->phy_init_script = 1;
1356 break;
1357 }
1358
1359 e1000_set_media_type(hw);
1360
c3033b01
JP		 1361 hw->wait_autoneg_complete = false;
1362 hw->tbi_compatibility_en = true;
1363 hw->adaptive_ifs = true;
1da177e4
LT		 1364
1365 /* Copper options */
1366
96838a40 1367 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1368 hw->mdix = AUTO_ALL_MODES;
c3033b01 1369 hw->disable_polarity_correction = false;
1da177e4
LT		 1370 hw->master_slave = E1000_MASTER_SLAVE;
1371 }
1372
f56799ea
JK		 1373 adapter->num_tx_queues = 1;
1374 adapter->num_rx_queues = 1;
581d708e
MC		 1375
1376 if (e1000_alloc_queues(adapter)) {
1377 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1378 return -ENOMEM;
1379 }
1380
f56799ea 1381 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e 1382 adapter->polling_netdev[i].priv = adapter;
581d708e
MC		 1383 dev_hold(&adapter->polling_netdev[i]);
1384 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1385 }
7bfa4816 1386 spin_lock_init(&adapter->tx_queue_lock);
24025e4e 1387
47313054 1388 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1389 e1000_irq_disable(adapter);
1390
1da177e4 1391 spin_lock_init(&adapter->stats_lock);
1da177e4 1392
1314bbf3
AK		 1393 set_bit(__E1000_DOWN, &adapter->flags);
1394
1da177e4
LT		 1395 return 0;
1396}
1397
581d708e
MC		 1398/**
1399 * e1000_alloc_queues - Allocate memory for all rings
1400 * @adapter: board private structure to initialize
1401 *
1402 * We allocate one ring per queue at run-time since we don't know the
1403 * number of queues at compile-time. The polling_netdev array is
1404 * intended for Multiqueue, but should work fine with a single queue.
1405 **/
1406
64798845 1407static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1408{
1c7e5b12
YB		 1409 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1410 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1411 if (!adapter->tx_ring)
1412 return -ENOMEM;
581d708e 1413
1c7e5b12
YB		 1414 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1415 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1416 if (!adapter->rx_ring) {
1417 kfree(adapter->tx_ring);
1418 return -ENOMEM;
1419 }
581d708e 1420
1c7e5b12
YB		 1421 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1422 sizeof(struct net_device),
1423 GFP_KERNEL);
581d708e
MC		 1424 if (!adapter->polling_netdev) {
1425 kfree(adapter->tx_ring);
1426 kfree(adapter->rx_ring);
1427 return -ENOMEM;
1428 }
581d708e
MC		 1429
1430 return E1000_SUCCESS;
1431}
1432
1da177e4
LT		 1433/**
1434 * e1000_open - Called when a network interface is made active
1435 * @netdev: network interface device structure
1436 *
1437 * Returns 0 on success, negative value on failure
1438 *
1439 * The open entry point is called when a network interface is made
1440 * active by the system (IFF_UP). At this point all resources needed
1441 * for transmit and receive operations are allocated, the interrupt
1442 * handler is registered with the OS, the watchdog timer is started,
1443 * and the stack is notified that the interface is ready.
1444 **/
1445
64798845 1446static int e1000_open(struct net_device *netdev)
1da177e4 1447{
60490fe0 1448 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1449 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1450 int err;
1451
2db10a08 1452 /* disallow open during test */
1314bbf3 1453 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1454 return -EBUSY;
1455
1da177e4 1456 /* allocate transmit descriptors */
e0aac5a2
AK		 1457 err = e1000_setup_all_tx_resources(adapter);
1458 if (err)
1da177e4
LT		 1459 goto err_setup_tx;
1460
1461 /* allocate receive descriptors */
e0aac5a2 1462 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1463 if (err)
e0aac5a2 1464 goto err_setup_rx;
b5bf28cd 1465
79f05bf0
AK		 1466 e1000_power_up_phy(adapter);
1467
2d7edb92 1468 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1469 if ((hw->mng_cookie.status &
2d7edb92
MC		 1470 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1471 e1000_update_mng_vlan(adapter);
1472 }
1da177e4 1473
b55ccb35
JK		 1474 /* If AMT is enabled, let the firmware know that the network
1475 * interface is now open */
1dc32918
JP		 1476 if (hw->mac_type == e1000_82573 &&
1477 e1000_check_mng_mode(hw))
b55ccb35
JK		 1478 e1000_get_hw_control(adapter);
1479
e0aac5a2
AK		 1480 /* before we allocate an interrupt, we must be ready to handle it.
1481 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1482 * as soon as we call pci_request_irq, so we have to setup our
1483 * clean_rx handler before we do so. */
1484 e1000_configure(adapter);
1485
1486 err = e1000_request_irq(adapter);
1487 if (err)
1488 goto err_req_irq;
1489
1490 /* From here on the code is the same as e1000_up() */
1491 clear_bit(__E1000_DOWN, &adapter->flags);
1492
bea3348e 1493 napi_enable(&adapter->napi);
47313054 1494
e0aac5a2
AK		 1495 e1000_irq_enable(adapter);
1496
076152d5
BH		 1497 netif_start_queue(netdev);
1498
e0aac5a2 1499 /* fire a link status change interrupt to start the watchdog */
1dc32918 1500 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1501
1da177e4
LT		 1502 return E1000_SUCCESS;
1503
b5bf28cd 1504err_req_irq:
e0aac5a2
AK		 1505 e1000_release_hw_control(adapter);
1506 e1000_power_down_phy(adapter);
581d708e 1507 e1000_free_all_rx_resources(adapter);
1da177e4 1508err_setup_rx:
581d708e 1509 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1510err_setup_tx:
1511 e1000_reset(adapter);
1512
1513 return err;
1514}
1515
1516/**
1517 * e1000_close - Disables a network interface
1518 * @netdev: network interface device structure
1519 *
1520 * Returns 0, this is not allowed to fail
1521 *
1522 * The close entry point is called when an interface is de-activated
1523 * by the OS. The hardware is still under the drivers control, but
1524 * needs to be disabled. A global MAC reset is issued to stop the
1525 * hardware, and all transmit and receive resources are freed.
1526 **/
1527
64798845 1528static int e1000_close(struct net_device *netdev)
1da177e4 1529{
60490fe0 1530 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1531 struct e1000_hw *hw = &adapter->hw;
1da177e4 1532
2db10a08 1533 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1534 e1000_down(adapter);
79f05bf0 1535 e1000_power_down_phy(adapter);
2db10a08 1536 e1000_free_irq(adapter);
1da177e4 1537
581d708e
MC		 1538 e1000_free_all_tx_resources(adapter);
1539 e1000_free_all_rx_resources(adapter);
1da177e4 1540
4666560a
BA		 1541 /* kill manageability vlan ID if supported, but not if a vlan with
1542 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1543 if ((hw->mng_cookie.status &
4666560a
BA		 1544 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1545 !(adapter->vlgrp &&
5c15bdec 1546 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1547 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1548 }
b55ccb35
JK		 1549
1550 /* If AMT is enabled, let the firmware know that the network
1551 * interface is now closed */
1dc32918
JP		 1552 if (hw->mac_type == e1000_82573 &&
1553 e1000_check_mng_mode(hw))
b55ccb35
JK		 1554 e1000_release_hw_control(adapter);
1555
1da177e4
LT		 1556 return 0;
1557}
1558
1559/**
1560 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1561 * @adapter: address of board private structure
2d7edb92
MC		 1562 * @start: address of beginning of memory
1563 * @len: length of memory
1da177e4 1564 **/
64798845
JP		 1565static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1566 unsigned long len)
1da177e4 1567{
1dc32918 1568 struct e1000_hw *hw = &adapter->hw;
e982f17c 1569 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1570 unsigned long end = begin + len;
1571
2648345f
MC		 1572 /* First rev 82545 and 82546 need to not allow any memory
1573 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1574 if (hw->mac_type == e1000_82545 ||
1575 hw->mac_type == e1000_82546) {
c3033b01 1576 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1577 }
1578
c3033b01 1579 return true;
1da177e4
LT		 1580}
1581
1582/**
1583 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1584 * @adapter: board private structure
581d708e 1585 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1586 *
1587 * Return 0 on success, negative on failure
1588 **/
1589
64798845
JP		 1590static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1591 struct e1000_tx_ring *txdr)
1da177e4 1592{
1da177e4
LT		 1593 struct pci_dev *pdev = adapter->pdev;
1594 int size;
1595
1596 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1597 txdr->buffer_info = vmalloc(size);
96838a40 1598 if (!txdr->buffer_info) {
2648345f
MC		 1599 DPRINTK(PROBE, ERR,
1600 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1601 return -ENOMEM;
1602 }
1603 memset(txdr->buffer_info, 0, size);
1604
1605 /* round up to nearest 4K */
1606
1607 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1608 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1609
1610 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1611 if (!txdr->desc) {
1da177e4 1612setup_tx_desc_die:
1da177e4 1613 vfree(txdr->buffer_info);
2648345f
MC		 1614 DPRINTK(PROBE, ERR,
1615 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1616 return -ENOMEM;
1617 }
1618
2648345f 1619 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1620 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1621 void *olddesc = txdr->desc;
1622 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1623 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1624 "at %p\n", txdr->size, txdr->desc);
1625 /* Try again, without freeing the previous */
1da177e4 1626 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1627 /* Failed allocation, critical failure */
96838a40 1628 if (!txdr->desc) {
1da177e4
LT		 1629 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1630 goto setup_tx_desc_die;
1631 }
1632
1633 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1634 /* give up */
2648345f
MC		 1635 pci_free_consistent(pdev, txdr->size, txdr->desc,
1636 txdr->dma);
1da177e4
LT		 1637 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1638 DPRINTK(PROBE, ERR,
2648345f
MC		 1639 "Unable to allocate aligned memory "
1640 "for the transmit descriptor ring\n");
1da177e4
LT		 1641 vfree(txdr->buffer_info);
1642 return -ENOMEM;
1643 } else {
2648345f 1644 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1645 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1646 }
1647 }
1648 memset(txdr->desc, 0, txdr->size);
1649
1650 txdr->next_to_use = 0;
1651 txdr->next_to_clean = 0;
2ae76d98 1652 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1653
1654 return 0;
1655}
1656
581d708e
MC		 1657/**
1658 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1659 * (Descriptors) for all queues
1660 * @adapter: board private structure
1661 *
581d708e
MC		 1662 * Return 0 on success, negative on failure
1663 **/
1664
64798845 1665int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1666{
1667 int i, err = 0;
1668
f56799ea 1669 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1670 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1671 if (err) {
1672 DPRINTK(PROBE, ERR,
1673 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1674 for (i-- ; i >= 0; i--)
1675 e1000_free_tx_resources(adapter,
1676 &adapter->tx_ring[i]);
581d708e
MC		 1677 break;
1678 }
1679 }
1680
1681 return err;
1682}
1683
1da177e4
LT		 1684/**
1685 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1686 * @adapter: board private structure
1687 *
1688 * Configure the Tx unit of the MAC after a reset.
1689 **/
1690
64798845 1691static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1692{
406874a7 1693 u64 tdba;
581d708e 1694 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1695 u32 tdlen, tctl, tipg, tarc;
1696 u32 ipgr1, ipgr2;
1da177e4
LT		 1697
1698 /* Setup the HW Tx Head and Tail descriptor pointers */
1699
f56799ea 1700 switch (adapter->num_tx_queues) {
24025e4e
MC		 1701 case 1:
1702 default:
581d708e
MC		 1703 tdba = adapter->tx_ring[0].dma;
1704 tdlen = adapter->tx_ring[0].count *
1705 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1706 ew32(TDLEN, tdlen);
1707 ew32(TDBAH, (tdba >> 32));
1708 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1709 ew32(TDT, 0);
1710 ew32(TDH, 0);
6a951698
AK		 1711 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1712 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1713 break;
1714 }
1da177e4
LT		 1715
1716 /* Set the default values for the Tx Inter Packet Gap timer */
1dc32918 1717 if (hw->mac_type <= e1000_82547_rev_2 &&
d89b6c67
JB		 1718 (hw->media_type == e1000_media_type_fiber ||
1719 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1720 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1721 else
1722 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1723
581d708e 1724 switch (hw->mac_type) {
1da177e4
LT		 1725 case e1000_82542_rev2_0:
1726 case e1000_82542_rev2_1:
1727 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1728 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1729 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1730 break;
87041639
JK		 1731 case e1000_80003es2lan:
1732 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1733 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1734 break;
1da177e4 1735 default:
0fadb059
JK		 1736 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1737 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1738 break;
1da177e4 1739 }
0fadb059
JK		 1740 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1741 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1742 ew32(TIPG, tipg);
1da177e4
LT		 1743
1744 /* Set the Tx Interrupt Delay register */
1745
1dc32918 1746 ew32(TIDV, adapter->tx_int_delay);
581d708e 1747 if (hw->mac_type >= e1000_82540)
1dc32918 1748 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1749
1750 /* Program the Transmit Control Register */
1751
1dc32918 1752 tctl = er32(TCTL);
1da177e4 1753 tctl &= ~E1000_TCTL_CT;
7e6c9861 1754 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1755 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1756
2ae76d98 1757 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1dc32918 1758 tarc = er32(TARC0);
90fb5135
AK		 1759 /* set the speed mode bit, we'll clear it if we're not at
1760 * gigabit link later */
09ae3e88 1761 tarc |= (1 << 21);
1dc32918 1762 ew32(TARC0, tarc);
87041639 1763 } else if (hw->mac_type == e1000_80003es2lan) {
1dc32918 1764 tarc = er32(TARC0);
87041639 1765 tarc |= 1;
1dc32918
JP		 1766 ew32(TARC0, tarc);
1767 tarc = er32(TARC1);
87041639 1768 tarc |= 1;
1dc32918 1769 ew32(TARC1, tarc);
2ae76d98
MC		 1770 }
1771
581d708e 1772 e1000_config_collision_dist(hw);
1da177e4
LT		 1773
1774 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1775 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1776
1777 /* only set IDE if we are delaying interrupts using the timers */
1778 if (adapter->tx_int_delay)
1779 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1780
581d708e 1781 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1782 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1783 else
1784 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1785
1786 /* Cache if we're 82544 running in PCI-X because we'll
1787 * need this to apply a workaround later in the send path. */
581d708e
MC		 1788 if (hw->mac_type == e1000_82544 &&
1789 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1790 adapter->pcix_82544 = 1;
7e6c9861 1791
1dc32918 1792 ew32(TCTL, tctl);
7e6c9861 1793
1da177e4
LT		 1794}
1795
1796/**
1797 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1798 * @adapter: board private structure
581d708e 1799 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1800 *
1801 * Returns 0 on success, negative on failure
1802 **/
1803
64798845
JP		 1804static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1805 struct e1000_rx_ring *rxdr)
1da177e4 1806{
1dc32918 1807 struct e1000_hw *hw = &adapter->hw;
1da177e4 1808 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1809 int size, desc_len;
1da177e4
LT		 1810
1811 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1812 rxdr->buffer_info = vmalloc(size);
581d708e 1813 if (!rxdr->buffer_info) {
2648345f
MC		 1814 DPRINTK(PROBE, ERR,
1815 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1816 return -ENOMEM;
1817 }
1818 memset(rxdr->buffer_info, 0, size);
1819
1dc32918 1820 if (hw->mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1821 desc_len = sizeof(struct e1000_rx_desc);
1822 else
1823 desc_len = sizeof(union e1000_rx_desc_packet_split);
1824
1da177e4
LT		 1825 /* Round up to nearest 4K */
1826
2d7edb92 1827 rxdr->size = rxdr->count * desc_len;
9099cfb9 1828 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1829
1830 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1831
581d708e
MC		 1832 if (!rxdr->desc) {
1833 DPRINTK(PROBE, ERR,
1834 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1835setup_rx_desc_die:
1da177e4
LT		 1836 vfree(rxdr->buffer_info);
1837 return -ENOMEM;
1838 }
1839
2648345f 1840 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1841 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1842 void *olddesc = rxdr->desc;
1843 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1844 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1845 "at %p\n", rxdr->size, rxdr->desc);
1846 /* Try again, without freeing the previous */
1da177e4 1847 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1848 /* Failed allocation, critical failure */
581d708e 1849 if (!rxdr->desc) {
1da177e4 1850 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1851 DPRINTK(PROBE, ERR,
1852 "Unable to allocate memory "
1853 "for the receive descriptor ring\n");
1da177e4
LT		 1854 goto setup_rx_desc_die;
1855 }
1856
1857 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1858 /* give up */
2648345f
MC		 1859 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1860 rxdr->dma);
1da177e4 1861 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1862 DPRINTK(PROBE, ERR,
1863 "Unable to allocate aligned memory "
1864 "for the receive descriptor ring\n");
581d708e 1865 goto setup_rx_desc_die;
1da177e4 1866 } else {
2648345f 1867 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1868 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1869 }
1870 }
1871 memset(rxdr->desc, 0, rxdr->size);
1872
1873 rxdr->next_to_clean = 0;
1874 rxdr->next_to_use = 0;
1875
1876 return 0;
1877}
1878
581d708e
MC		 1879/**
1880 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1881 * (Descriptors) for all queues
1882 * @adapter: board private structure
1883 *
581d708e
MC		 1884 * Return 0 on success, negative on failure
1885 **/
1886
64798845 1887int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1888{
1889 int i, err = 0;
1890
f56799ea 1891 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1892 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1893 if (err) {
1894 DPRINTK(PROBE, ERR,
1895 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1896 for (i-- ; i >= 0; i--)
1897 e1000_free_rx_resources(adapter,
1898 &adapter->rx_ring[i]);
581d708e
MC		 1899 break;
1900 }
1901 }
1902
1903 return err;
1904}
1905
1da177e4 1906/**
2648345f 1907 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1908 * @adapter: Board private structure
1909 **/
e4c811c9
MC		 1910#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1911 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
64798845 1912static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1913{
1dc32918 1914 struct e1000_hw *hw = &adapter->hw;
630b25cd 1915 u32 rctl;
1da177e4 1916
1dc32918 1917 rctl = er32(RCTL);
1da177e4
LT		 1918
1919 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1920
1921 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1922 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1923 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1924
1dc32918 1925 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1926 rctl |= E1000_RCTL_SBP;
1927 else
1928 rctl &= ~E1000_RCTL_SBP;
1929
2d7edb92
MC		 1930 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1931 rctl &= ~E1000_RCTL_LPE;
1932 else
1933 rctl |= E1000_RCTL_LPE;
1934
1da177e4 1935 /* Setup buffer sizes */
9e2feace
AK		 1936 rctl &= ~E1000_RCTL_SZ_4096;
1937 rctl |= E1000_RCTL_BSEX;
1938 switch (adapter->rx_buffer_len) {
1939 case E1000_RXBUFFER_256:
1940 rctl |= E1000_RCTL_SZ_256;
1941 rctl &= ~E1000_RCTL_BSEX;
1942 break;
1943 case E1000_RXBUFFER_512:
1944 rctl |= E1000_RCTL_SZ_512;
1945 rctl &= ~E1000_RCTL_BSEX;
1946 break;
1947 case E1000_RXBUFFER_1024:
1948 rctl |= E1000_RCTL_SZ_1024;
1949 rctl &= ~E1000_RCTL_BSEX;
1950 break;
a1415ee6
JK		 1951 case E1000_RXBUFFER_2048:
1952 default:
1953 rctl |= E1000_RCTL_SZ_2048;
1954 rctl &= ~E1000_RCTL_BSEX;
1955 break;
1956 case E1000_RXBUFFER_4096:
1957 rctl |= E1000_RCTL_SZ_4096;
1958 break;
1959 case E1000_RXBUFFER_8192:
1960 rctl |= E1000_RCTL_SZ_8192;
1961 break;
1962 case E1000_RXBUFFER_16384:
1963 rctl |= E1000_RCTL_SZ_16384;
1964 break;
2d7edb92
MC		 1965 }
1966
1dc32918 1967 ew32(RCTL, rctl);
1da177e4
LT		 1968}
1969
1970/**
1971 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1972 * @adapter: board private structure
1973 *
1974 * Configure the Rx unit of the MAC after a reset.
1975 **/
1976
64798845 1977static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1978{
406874a7 1979 u64 rdba;
581d708e 1980 struct e1000_hw *hw = &adapter->hw;
406874a7 1981 u32 rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1982
630b25cd
BJ		 1983 rdlen = adapter->rx_ring[0].count *
1984 sizeof(struct e1000_rx_desc);
1985 adapter->clean_rx = e1000_clean_rx_irq;
1986 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1da177e4
LT		 1987
1988 /* disable receives while setting up the descriptors */
1dc32918
JP		 1989 rctl = er32(RCTL);
1990 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1991
1992 /* set the Receive Delay Timer Register */
1dc32918 1993 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1994
581d708e 1995 if (hw->mac_type >= e1000_82540) {
1dc32918 1996 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1997 if (adapter->itr_setting != 0)
1dc32918 1998 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1999 }
2000
2ae76d98 2001 if (hw->mac_type >= e1000_82571) {
1dc32918 2002 ctrl_ext = er32(CTRL_EXT);
1e613fd9 2003 /* Reset delay timers after every interrupt */
6fc7a7ec 2004 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
835bb129 2005 /* Auto-Mask interrupts upon ICR access */
1e613fd9 2006 ctrl_ext |= E1000_CTRL_EXT_IAME;
1dc32918 2007 ew32(IAM, 0xffffffff);
1dc32918
JP		 2008 ew32(CTRL_EXT, ctrl_ext);
2009 E1000_WRITE_FLUSH();
2ae76d98
MC		 2010 }
2011
581d708e
MC		 2012 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2013 * the Base and Length of the Rx Descriptor Ring */
f56799ea 2014 switch (adapter->num_rx_queues) {
24025e4e
MC		 2015 case 1:
2016 default:
581d708e 2017 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 2018 ew32(RDLEN, rdlen);
2019 ew32(RDBAH, (rdba >> 32));
2020 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
2021 ew32(RDT, 0);
2022 ew32(RDH, 0);
6a951698
AK		 2023 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2024 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2025 break;
24025e4e
MC		 2026 }
2027
1da177e4 2028 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 2029 if (hw->mac_type >= e1000_82543) {
1dc32918 2030 rxcsum = er32(RXCSUM);
630b25cd 2031 if (adapter->rx_csum)
2d7edb92 2032 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 2033 else
2d7edb92 2034 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 2035 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 2036 ew32(RXCSUM, rxcsum);
1da177e4
LT		 2037 }
2038
2039 /* Enable Receives */
1dc32918 2040 ew32(RCTL, rctl);
1da177e4
LT		 2041}
2042
2043/**
581d708e 2044 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2045 * @adapter: board private structure
581d708e 2046 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2047 *
2048 * Free all transmit software resources
2049 **/
2050
64798845
JP		 2051static void e1000_free_tx_resources(struct e1000_adapter *adapter,
2052 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2053{
2054 struct pci_dev *pdev = adapter->pdev;
2055
581d708e 2056 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2057
581d708e
MC		 2058 vfree(tx_ring->buffer_info);
2059 tx_ring->buffer_info = NULL;
1da177e4 2060
581d708e 2061 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2062
581d708e
MC		 2063 tx_ring->desc = NULL;
2064}
2065
2066/**
2067 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2068 * @adapter: board private structure
2069 *
2070 * Free all transmit software resources
2071 **/
2072
64798845 2073void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2074{
2075 int i;
2076
f56799ea 2077 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2078 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2079}
2080
64798845
JP		 2081static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2082 struct e1000_buffer *buffer_info)
1da177e4 2083{
96838a40 2084 if (buffer_info->dma) {
2648345f
MC		 2085 pci_unmap_page(adapter->pdev,
2086 buffer_info->dma,
2087 buffer_info->length,
2088 PCI_DMA_TODEVICE);
a9ebadd6 2089 buffer_info->dma = 0;
1da177e4 2090 }
a9ebadd6 2091 if (buffer_info->skb) {
1da177e4 2092 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2093 buffer_info->skb = NULL;
2094 }
2095 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2096}
2097
2098/**
2099 * e1000_clean_tx_ring - Free Tx Buffers
2100 * @adapter: board private structure
581d708e 2101 * @tx_ring: ring to be cleaned
1da177e4
LT		 2102 **/
2103
64798845
JP		 2104static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2105 struct e1000_tx_ring *tx_ring)
1da177e4 2106{
1dc32918 2107 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2108 struct e1000_buffer *buffer_info;
2109 unsigned long size;
2110 unsigned int i;
2111
2112 /* Free all the Tx ring sk_buffs */
2113
96838a40 2114 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2115 buffer_info = &tx_ring->buffer_info[i];
2116 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2117 }
2118
2119 size = sizeof(struct e1000_buffer) * tx_ring->count;
2120 memset(tx_ring->buffer_info, 0, size);
2121
2122 /* Zero out the descriptor ring */
2123
2124 memset(tx_ring->desc, 0, tx_ring->size);
2125
2126 tx_ring->next_to_use = 0;
2127 tx_ring->next_to_clean = 0;
fd803241 2128 tx_ring->last_tx_tso = 0;
1da177e4 2129
1dc32918
JP		 2130 writel(0, hw->hw_addr + tx_ring->tdh);
2131 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2132}
2133
2134/**
2135 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2136 * @adapter: board private structure
2137 **/
2138
64798845 2139static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2140{
2141 int i;
2142
f56799ea 2143 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2144 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2145}
2146
2147/**
2148 * e1000_free_rx_resources - Free Rx Resources
2149 * @adapter: board private structure
581d708e 2150 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2151 *
2152 * Free all receive software resources
2153 **/
2154
64798845
JP		 2155static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2156 struct e1000_rx_ring *rx_ring)
1da177e4 2157{
1da177e4
LT		 2158 struct pci_dev *pdev = adapter->pdev;
2159
581d708e 2160 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2161
2162 vfree(rx_ring->buffer_info);
2163 rx_ring->buffer_info = NULL;
2164
2165 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2166
2167 rx_ring->desc = NULL;
2168}
2169
2170/**
581d708e 2171 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2172 * @adapter: board private structure
581d708e
MC		 2173 *
2174 * Free all receive software resources
2175 **/
2176
64798845 2177void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2178{
2179 int i;
2180
f56799ea 2181 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2182 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2183}
2184
2185/**
2186 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2187 * @adapter: board private structure
2188 * @rx_ring: ring to free buffers from
1da177e4
LT		 2189 **/
2190
64798845
JP		 2191static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2192 struct e1000_rx_ring *rx_ring)
1da177e4 2193{
1dc32918 2194 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2195 struct e1000_buffer *buffer_info;
2196 struct pci_dev *pdev = adapter->pdev;
2197 unsigned long size;
630b25cd 2198 unsigned int i;
1da177e4
LT		 2199
2200 /* Free all the Rx ring sk_buffs */
96838a40 2201 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2202 buffer_info = &rx_ring->buffer_info[i];
96838a40 2203 if (buffer_info->skb) {
1da177e4
LT		 2204 pci_unmap_single(pdev,
2205 buffer_info->dma,
2206 buffer_info->length,
2207 PCI_DMA_FROMDEVICE);
2208
2209 dev_kfree_skb(buffer_info->skb);
2210 buffer_info->skb = NULL;
997f5cbd 2211 }
1da177e4
LT		 2212 }
2213
2214 size = sizeof(struct e1000_buffer) * rx_ring->count;
2215 memset(rx_ring->buffer_info, 0, size);
2216
2217 /* Zero out the descriptor ring */
2218
2219 memset(rx_ring->desc, 0, rx_ring->size);
2220
2221 rx_ring->next_to_clean = 0;
2222 rx_ring->next_to_use = 0;
2223
1dc32918
JP		 2224 writel(0, hw->hw_addr + rx_ring->rdh);
2225 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2226}
2227
2228/**
2229 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2230 * @adapter: board private structure
2231 **/
2232
64798845 2233static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2234{
2235 int i;
2236
f56799ea 2237 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2238 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2239}
2240
2241/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2242 * and memory write and invalidate disabled for certain operations
2243 */
64798845 2244static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2245{
1dc32918 2246 struct e1000_hw *hw = &adapter->hw;
1da177e4 2247 struct net_device *netdev = adapter->netdev;
406874a7 2248 u32 rctl;
1da177e4 2249
1dc32918 2250 e1000_pci_clear_mwi(hw);
1da177e4 2251
1dc32918 2252 rctl = er32(RCTL);
1da177e4 2253 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2254 ew32(RCTL, rctl);
2255 E1000_WRITE_FLUSH();
1da177e4
LT		 2256 mdelay(5);
2257
96838a40 2258 if (netif_running(netdev))
581d708e 2259 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2260}
2261
64798845 2262static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2263{
1dc32918 2264 struct e1000_hw *hw = &adapter->hw;
1da177e4 2265 struct net_device *netdev = adapter->netdev;
406874a7 2266 u32 rctl;
1da177e4 2267
1dc32918 2268 rctl = er32(RCTL);
1da177e4 2269 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2270 ew32(RCTL, rctl);
2271 E1000_WRITE_FLUSH();
1da177e4
LT		 2272 mdelay(5);
2273
1dc32918
JP		 2274 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2275 e1000_pci_set_mwi(hw);
1da177e4 2276
96838a40 2277 if (netif_running(netdev)) {
72d64a43
JK		 2278 /* No need to loop, because 82542 supports only 1 queue */
2279 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2280 e1000_configure_rx(adapter);
72d64a43 2281 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2282 }
2283}
2284
2285/**
2286 * e1000_set_mac - Change the Ethernet Address of the NIC
2287 * @netdev: network interface device structure
2288 * @p: pointer to an address structure
2289 *
2290 * Returns 0 on success, negative on failure
2291 **/
2292
64798845 2293static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2294{
60490fe0 2295 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2296 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2297 struct sockaddr *addr = p;
2298
96838a40 2299 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2300 return -EADDRNOTAVAIL;
2301
2302 /* 82542 2.0 needs to be in reset to write receive address registers */
2303
1dc32918 2304 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2305 e1000_enter_82542_rst(adapter);
2306
2307 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2308 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2309
1dc32918 2310 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2311
868d5309
MC		 2312 /* With 82571 controllers, LAA may be overwritten (with the default)
2313 * due to controller reset from the other port. */
1dc32918 2314 if (hw->mac_type == e1000_82571) {
868d5309 2315 /* activate the work around */
1dc32918 2316 hw->laa_is_present = 1;
868d5309 2317
96838a40
JB		 2318 /* Hold a copy of the LAA in RAR[14] This is done so that
2319 * between the time RAR[0] gets clobbered and the time it
2320 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2321 * of the RARs and no incoming packets directed to this port
96838a40 2322 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2323 * RAR[14] */
1dc32918 2324 e1000_rar_set(hw, hw->mac_addr,
868d5309
MC		 2325 E1000_RAR_ENTRIES - 1);
2326 }
2327
1dc32918 2328 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2329 e1000_leave_82542_rst(adapter);
2330
2331 return 0;
2332}
2333
2334/**
db0ce50d 2335 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2336 * @netdev: network interface device structure
2337 *
db0ce50d
PM		 2338 * The set_rx_mode entry point is called whenever the unicast or multicast
2339 * address lists or the network interface flags are updated. This routine is
2340 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2341 * promiscuous mode, and all-multi behavior.
2342 **/
2343
64798845 2344static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2345{
60490fe0 2346 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2347 struct e1000_hw *hw = &adapter->hw;
db0ce50d
PM		 2348 struct dev_addr_list *uc_ptr;
2349 struct dev_addr_list *mc_ptr;
406874a7
JP		 2350 u32 rctl;
2351 u32 hash_value;
868d5309 2352 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2353 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2354 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2355 E1000_NUM_MTA_REGISTERS;
2356
1dc32918 2357 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 2358 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2359
868d5309 2360 /* reserve RAR[14] for LAA over-write work-around */
1dc32918 2361 if (hw->mac_type == e1000_82571)
868d5309 2362 rar_entries--;
1da177e4 2363
2648345f
MC		 2364 /* Check for Promiscuous and All Multicast modes */
2365
1dc32918 2366 rctl = er32(RCTL);
1da177e4 2367
96838a40 2368 if (netdev->flags & IFF_PROMISC) {
1da177e4 2369 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2370 rctl &= ~E1000_RCTL_VFE;
1da177e4 2371 } else {
746b9f02
PM		 2372 if (netdev->flags & IFF_ALLMULTI) {
2373 rctl |= E1000_RCTL_MPE;
2374 } else {
2375 rctl &= ~E1000_RCTL_MPE;
2376 }
78ed11a5 2377 if (adapter->hw.mac_type != e1000_ich8lan)
746b9f02 2378 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2379 }
2380
2381 uc_ptr = NULL;
2382 if (netdev->uc_count > rar_entries - 1) {
2383 rctl |= E1000_RCTL_UPE;
2384 } else if (!(netdev->flags & IFF_PROMISC)) {
2385 rctl &= ~E1000_RCTL_UPE;
2386 uc_ptr = netdev->uc_list;
1da177e4
LT		 2387 }
2388
1dc32918 2389 ew32(RCTL, rctl);
1da177e4
LT		 2390
2391 /* 82542 2.0 needs to be in reset to write receive address registers */
2392
96838a40 2393 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2394 e1000_enter_82542_rst(adapter);
2395
db0ce50d
PM		 2396 /* load the first 14 addresses into the exact filters 1-14. Unicast
2397 * addresses take precedence to avoid disabling unicast filtering
2398 * when possible.
2399 *
1da177e4
LT		 2400 * RAR 0 is used for the station MAC adddress
2401 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2402 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2403 */
2404 mc_ptr = netdev->mc_list;
2405
96838a40 2406 for (i = 1; i < rar_entries; i++) {
db0ce50d
PM		 2407 if (uc_ptr) {
2408 e1000_rar_set(hw, uc_ptr->da_addr, i);
2409 uc_ptr = uc_ptr->next;
2410 } else if (mc_ptr) {
2411 e1000_rar_set(hw, mc_ptr->da_addr, i);
1da177e4
LT		 2412 mc_ptr = mc_ptr->next;
2413 } else {
2414 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
1dc32918 2415 E1000_WRITE_FLUSH();
1da177e4 2416 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
1dc32918 2417 E1000_WRITE_FLUSH();
1da177e4
LT		 2418 }
2419 }
db0ce50d 2420 WARN_ON(uc_ptr != NULL);
1da177e4
LT		 2421
2422 /* clear the old settings from the multicast hash table */
2423
cd94dd0b 2424 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2425 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
1dc32918 2426 E1000_WRITE_FLUSH();
4ca213a6 2427 }
1da177e4
LT		 2428
2429 /* load any remaining addresses into the hash table */
2430
96838a40 2431 for (; mc_ptr; mc_ptr = mc_ptr->next) {
db0ce50d 2432 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
1da177e4
LT		 2433 e1000_mta_set(hw, hash_value);
2434 }
2435
96838a40 2436 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2437 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2438}
2439
2440/* Need to wait a few seconds after link up to get diagnostic information from
2441 * the phy */
2442
64798845 2443static void e1000_update_phy_info(unsigned long data)
1da177e4 2444{
e982f17c 2445 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2446 struct e1000_hw *hw = &adapter->hw;
2447 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2448}
2449
2450/**
2451 * e1000_82547_tx_fifo_stall - Timer Call-back
2452 * @data: pointer to adapter cast into an unsigned long
2453 **/
2454
64798845 2455static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2456{
e982f17c 2457 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2458 struct e1000_hw *hw = &adapter->hw;
1da177e4 2459 struct net_device *netdev = adapter->netdev;
406874a7 2460 u32 tctl;
1da177e4 2461
96838a40 2462 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2463 if ((er32(TDT) == er32(TDH)) &&
2464 (er32(TDFT) == er32(TDFH)) &&
2465 (er32(TDFTS) == er32(TDFHS))) {
2466 tctl = er32(TCTL);
2467 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2468 ew32(TDFT, adapter->tx_head_addr);
2469 ew32(TDFH, adapter->tx_head_addr);
2470 ew32(TDFTS, adapter->tx_head_addr);
2471 ew32(TDFHS, adapter->tx_head_addr);
2472 ew32(TCTL, tctl);
2473 E1000_WRITE_FLUSH();
1da177e4
LT		 2474
2475 adapter->tx_fifo_head = 0;
2476 atomic_set(&adapter->tx_fifo_stall, 0);
2477 netif_wake_queue(netdev);
2478 } else {
2479 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2480 }
2481 }
2482}
2483
2484/**
2485 * e1000_watchdog - Timer Call-back
2486 * @data: pointer to adapter cast into an unsigned long
2487 **/
64798845 2488static void e1000_watchdog(unsigned long data)
1da177e4 2489{
e982f17c 2490 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2491 struct e1000_hw *hw = &adapter->hw;
1da177e4 2492 struct net_device *netdev = adapter->netdev;
545c67c0 2493 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7
JP		 2494 u32 link, tctl;
2495 s32 ret_val;
cd94dd0b 2496
1dc32918 2497 ret_val = e1000_check_for_link(hw);
cd94dd0b 2498 if ((ret_val == E1000_ERR_PHY) &&
1dc32918
JP		 2499 (hw->phy_type == e1000_phy_igp_3) &&
2500 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
cd94dd0b
AK		 2501 /* See e1000_kumeran_lock_loss_workaround() */
2502 DPRINTK(LINK, INFO,
2503 "Gigabit has been disabled, downgrading speed\n");
2504 }
90fb5135 2505
1dc32918
JP		 2506 if (hw->mac_type == e1000_82573) {
2507 e1000_enable_tx_pkt_filtering(hw);
2508 if (adapter->mng_vlan_id != hw->mng_cookie.vlan_id)
2d7edb92 2509 e1000_update_mng_vlan(adapter);
96838a40 2510 }
1da177e4 2511
1dc32918
JP		 2512 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2513 !(er32(TXCW) & E1000_TXCW_ANE))
2514 link = !hw->serdes_link_down;
1da177e4 2515 else
1dc32918 2516 link = er32(STATUS) & E1000_STATUS_LU;
1da177e4 2517
96838a40
JB		 2518 if (link) {
2519 if (!netif_carrier_ok(netdev)) {
406874a7 2520 u32 ctrl;
c3033b01 2521 bool txb2b = true;
1dc32918 2522 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2523 &adapter->link_speed,
2524 &adapter->link_duplex);
2525
1dc32918 2526 ctrl = er32(CTRL);
9669f53b
AK		 2527 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2528 "Flow Control: %s\n",
2529 adapter->link_speed,
2530 adapter->link_duplex == FULL_DUPLEX ?
2531 "Full Duplex" : "Half Duplex",
2532 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2533 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2534 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2535 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2536
7e6c9861
JK		 2537 /* tweak tx_queue_len according to speed/duplex
2538 * and adjust the timeout factor */
66a2b0a3
JK		 2539 netdev->tx_queue_len = adapter->tx_queue_len;
2540 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2541 switch (adapter->link_speed) {
2542 case SPEED_10:
c3033b01 2543 txb2b = false;
7e6c9861
JK		 2544 netdev->tx_queue_len = 10;
2545 adapter->tx_timeout_factor = 8;
2546 break;
2547 case SPEED_100:
c3033b01 2548 txb2b = false;
7e6c9861
JK		 2549 netdev->tx_queue_len = 100;
2550 /* maybe add some timeout factor ? */
2551 break;
2552 }
2553
1dc32918
JP		 2554 if ((hw->mac_type == e1000_82571 ||
2555 hw->mac_type == e1000_82572) &&
c3033b01 2556 !txb2b) {
406874a7 2557 u32 tarc0;
1dc32918 2558 tarc0 = er32(TARC0);
90fb5135 2559 tarc0 &= ~(1 << 21);
1dc32918 2560 ew32(TARC0, tarc0);
7e6c9861 2561 }
90fb5135 2562
7e6c9861
JK		 2563 /* disable TSO for pcie and 10/100 speeds, to avoid
2564 * some hardware issues */
2565 if (!adapter->tso_force &&
1dc32918 2566 hw->bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2567 switch (adapter->link_speed) {
2568 case SPEED_10:
66a2b0a3 2569 case SPEED_100:
7e6c9861
JK		 2570 DPRINTK(PROBE,INFO,
2571 "10/100 speed: disabling TSO\n");
2572 netdev->features &= ~NETIF_F_TSO;
87ca4e5b 2573 netdev->features &= ~NETIF_F_TSO6;
7e6c9861
JK		 2574 break;
2575 case SPEED_1000:
2576 netdev->features |= NETIF_F_TSO;
87ca4e5b 2577 netdev->features |= NETIF_F_TSO6;
7e6c9861
JK		 2578 break;
2579 default:
2580 /* oops */
66a2b0a3
JK		 2581 break;
2582 }
2583 }
7e6c9861
JK		 2584
2585 /* enable transmits in the hardware, need to do this
2586 * after setting TARC0 */
1dc32918 2587 tctl = er32(TCTL);
7e6c9861 2588 tctl |= E1000_TCTL_EN;
1dc32918 2589 ew32(TCTL, tctl);
66a2b0a3 2590
1da177e4
LT		 2591 netif_carrier_on(netdev);
2592 netif_wake_queue(netdev);
56e1393f 2593 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4 2594 adapter->smartspeed = 0;
bb8e3311
JG		 2595 } else {
2596 /* make sure the receive unit is started */
1dc32918
JP		 2597 if (hw->rx_needs_kicking) {
2598 u32 rctl = er32(RCTL);
2599 ew32(RCTL, rctl | E1000_RCTL_EN);
bb8e3311 2600 }
1da177e4
LT		 2601 }
2602 } else {
96838a40 2603 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2604 adapter->link_speed = 0;
2605 adapter->link_duplex = 0;
2606 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2607 netif_carrier_off(netdev);
2608 netif_stop_queue(netdev);
56e1393f 2609 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
87041639
JK		 2610
2611 /* 80003ES2LAN workaround--
2612 * For packet buffer work-around on link down event;
2613 * disable receives in the ISR and
2614 * reset device here in the watchdog
2615 */
1dc32918 2616 if (hw->mac_type == e1000_80003es2lan)
87041639
JK		 2617 /* reset device */
2618 schedule_work(&adapter->reset_task);
1da177e4
LT		 2619 }
2620
2621 e1000_smartspeed(adapter);
2622 }
2623
2624 e1000_update_stats(adapter);
2625
1dc32918 2626 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2627 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2628 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2629 adapter->colc_old = adapter->stats.colc;
2630
2631 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2632 adapter->gorcl_old = adapter->stats.gorcl;
2633 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2634 adapter->gotcl_old = adapter->stats.gotcl;
2635
1dc32918 2636 e1000_update_adaptive(hw);
1da177e4 2637
f56799ea 2638 if (!netif_carrier_ok(netdev)) {
581d708e 2639 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2640 /* We've lost link, so the controller stops DMA,
2641 * but we've got queued Tx work that's never going
2642 * to get done, so reset controller to flush Tx.
2643 * (Do the reset outside of interrupt context). */
87041639
JK		 2644 adapter->tx_timeout_count++;
2645 schedule_work(&adapter->reset_task);
1da177e4
LT		 2646 }
2647 }
2648
1da177e4 2649 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2650 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2651
2648345f 2652 /* Force detection of hung controller every watchdog period */
c3033b01 2653 adapter->detect_tx_hung = true;
1da177e4 2654
96838a40 2655 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309 2656 * reset from the other port. Set the appropriate LAA in RAR[0] */
1dc32918
JP		 2657 if (hw->mac_type == e1000_82571 && hw->laa_is_present)
2658 e1000_rar_set(hw, hw->mac_addr, 0);
868d5309 2659
1da177e4 2660 /* Reset the timer */
56e1393f 2661 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2662}
2663
835bb129
JB		 2664enum latency_range {
2665 lowest_latency = 0,
2666 low_latency = 1,
2667 bulk_latency = 2,
2668 latency_invalid = 255
2669};
2670
2671/**
2672 * e1000_update_itr - update the dynamic ITR value based on statistics
2673 * Stores a new ITR value based on packets and byte
2674 * counts during the last interrupt. The advantage of per interrupt
2675 * computation is faster updates and more accurate ITR for the current
2676 * traffic pattern. Constants in this function were computed
2677 * based on theoretical maximum wire speed and thresholds were set based
2678 * on testing data as well as attempting to minimize response time
2679 * while increasing bulk throughput.
2680 * this functionality is controlled by the InterruptThrottleRate module
2681 * parameter (see e1000_param.c)
2682 * @adapter: pointer to adapter
2683 * @itr_setting: current adapter->itr
2684 * @packets: the number of packets during this measurement interval
2685 * @bytes: the number of bytes during this measurement interval
2686 **/
2687static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2688 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2689{
2690 unsigned int retval = itr_setting;
2691 struct e1000_hw *hw = &adapter->hw;
2692
2693 if (unlikely(hw->mac_type < e1000_82540))
2694 goto update_itr_done;
2695
2696 if (packets == 0)
2697 goto update_itr_done;
2698
835bb129
JB		 2699 switch (itr_setting) {
2700 case lowest_latency:
2b65326e
JB		 2701 /* jumbo frames get bulk treatment*/
2702 if (bytes/packets > 8000)
2703 retval = bulk_latency;
2704 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2705 retval = low_latency;
2706 break;
2707 case low_latency: /* 50 usec aka 20000 ints/s */
2708 if (bytes > 10000) {
2b65326e
JB		 2709 /* jumbo frames need bulk latency setting */
2710 if (bytes/packets > 8000)
2711 retval = bulk_latency;
2712 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2713 retval = bulk_latency;
2714 else if ((packets > 35))
2715 retval = lowest_latency;
2b65326e
JB		 2716 } else if (bytes/packets > 2000)
2717 retval = bulk_latency;
2718 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2719 retval = lowest_latency;
2720 break;
2721 case bulk_latency: /* 250 usec aka 4000 ints/s */
2722 if (bytes > 25000) {
2723 if (packets > 35)
2724 retval = low_latency;
2b65326e
JB		 2725 } else if (bytes < 6000) {
2726 retval = low_latency;
835bb129
JB		 2727 }
2728 break;
2729 }
2730
2731update_itr_done:
2732 return retval;
2733}
2734
2735static void e1000_set_itr(struct e1000_adapter *adapter)
2736{
2737 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2738 u16 current_itr;
2739 u32 new_itr = adapter->itr;
835bb129
JB		 2740
2741 if (unlikely(hw->mac_type < e1000_82540))
2742 return;
2743
2744 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2745 if (unlikely(adapter->link_speed != SPEED_1000)) {
2746 current_itr = 0;
2747 new_itr = 4000;
2748 goto set_itr_now;
2749 }
2750
2751 adapter->tx_itr = e1000_update_itr(adapter,
2752 adapter->tx_itr,
2753 adapter->total_tx_packets,
2754 adapter->total_tx_bytes);
2b65326e
JB		 2755 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2756 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2757 adapter->tx_itr = low_latency;
2758
835bb129
JB		 2759 adapter->rx_itr = e1000_update_itr(adapter,
2760 adapter->rx_itr,
2761 adapter->total_rx_packets,
2762 adapter->total_rx_bytes);
2b65326e
JB		 2763 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2764 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2765 adapter->rx_itr = low_latency;
835bb129
JB		 2766
2767 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2768
835bb129
JB		 2769 switch (current_itr) {
2770 /* counts and packets in update_itr are dependent on these numbers */
2771 case lowest_latency:
2772 new_itr = 70000;
2773 break;
2774 case low_latency:
2775 new_itr = 20000; /* aka hwitr = ~200 */
2776 break;
2777 case bulk_latency:
2778 new_itr = 4000;
2779 break;
2780 default:
2781 break;
2782 }
2783
2784set_itr_now:
2785 if (new_itr != adapter->itr) {
2786 /* this attempts to bias the interrupt rate towards Bulk
2787 * by adding intermediate steps when interrupt rate is
2788 * increasing */
2789 new_itr = new_itr > adapter->itr ?
2790 min(adapter->itr + (new_itr >> 2), new_itr) :
2791 new_itr;
2792 adapter->itr = new_itr;
1dc32918 2793 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2794 }
2795
2796 return;
2797}
2798
1da177e4
LT		 2799#define E1000_TX_FLAGS_CSUM 0x00000001
2800#define E1000_TX_FLAGS_VLAN 0x00000002
2801#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2802#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2803#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2804#define E1000_TX_FLAGS_VLAN_SHIFT 16
2805
64798845
JP		 2806static int e1000_tso(struct e1000_adapter *adapter,
2807 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2808{
1da177e4 2809 struct e1000_context_desc *context_desc;
545c67c0 2810 struct e1000_buffer *buffer_info;
1da177e4 2811 unsigned int i;
406874a7
JP		 2812 u32 cmd_length = 0;
2813 u16 ipcse = 0, tucse, mss;
2814 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2815 int err;
2816
89114afd 2817 if (skb_is_gso(skb)) {
1da177e4
LT		 2818 if (skb_header_cloned(skb)) {
2819 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2820 if (err)
2821 return err;
2822 }
2823
ab6a5bb6 2824 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2825 mss = skb_shinfo(skb)->gso_size;
60828236 2826 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2827 struct iphdr *iph = ip_hdr(skb);
2828 iph->tot_len = 0;
2829 iph->check = 0;
aa8223c7
ACM		 2830 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2831 iph->daddr, 0,
2832 IPPROTO_TCP,
2833 0);
2d7edb92 2834 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2835 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2836 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2837 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2838 tcp_hdr(skb)->check =
0660e03f
ACM		 2839 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2840 &ipv6_hdr(skb)->daddr,
2841 0, IPPROTO_TCP, 0);
2d7edb92 2842 ipcse = 0;
2d7edb92 2843 }
bbe735e4 2844 ipcss = skb_network_offset(skb);
eddc9ec5 2845 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2846 tucss = skb_transport_offset(skb);
aa8223c7 2847 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2848 tucse = 0;
2849
2850 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2851 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2852
581d708e
MC		 2853 i = tx_ring->next_to_use;
2854 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2855 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2856
2857 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2858 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2859 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2860 context_desc->upper_setup.tcp_fields.tucss = tucss;
2861 context_desc->upper_setup.tcp_fields.tucso = tucso;
2862 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2863 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2864 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2865 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2866
545c67c0 2867 buffer_info->time_stamp = jiffies;
a9ebadd6 2868 buffer_info->next_to_watch = i;
545c67c0 2869
581d708e
MC		 2870 if (++i == tx_ring->count) i = 0;
2871 tx_ring->next_to_use = i;
1da177e4 2872
c3033b01 2873 return true;
1da177e4 2874 }
c3033b01 2875 return false;
1da177e4
LT		 2876}
2877
64798845
JP		 2878static bool e1000_tx_csum(struct e1000_adapter *adapter,
2879 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2880{
2881 struct e1000_context_desc *context_desc;
545c67c0 2882 struct e1000_buffer *buffer_info;
1da177e4 2883 unsigned int i;
406874a7 2884 u8 css;
3ed30676 2885 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2886
3ed30676
DG		 2887 if (skb->ip_summed != CHECKSUM_PARTIAL)
2888 return false;
1da177e4 2889
3ed30676
DG		 2890 switch (skb->protocol) {
2891 case __constant_htons(ETH_P_IP):
2892 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2893 cmd_len |= E1000_TXD_CMD_TCP;
2894 break;
2895 case __constant_htons(ETH_P_IPV6):
2896 /* XXX not handling all IPV6 headers */
2897 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2898 cmd_len |= E1000_TXD_CMD_TCP;
2899 break;
2900 default:
2901 if (unlikely(net_ratelimit()))
2902 DPRINTK(DRV, WARNING,
2903 "checksum_partial proto=%x!\n", skb->protocol);
2904 break;
2905 }
1da177e4 2906
3ed30676 2907 css = skb_transport_offset(skb);
1da177e4 2908
3ed30676
DG		 2909 i = tx_ring->next_to_use;
2910 buffer_info = &tx_ring->buffer_info[i];
2911 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2912
3ed30676
DG		 2913 context_desc->lower_setup.ip_config = 0;
2914 context_desc->upper_setup.tcp_fields.tucss = css;
2915 context_desc->upper_setup.tcp_fields.tucso =
2916 css + skb->csum_offset;
2917 context_desc->upper_setup.tcp_fields.tucse = 0;
2918 context_desc->tcp_seg_setup.data = 0;
2919 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2920
3ed30676
DG		 2921 buffer_info->time_stamp = jiffies;
2922 buffer_info->next_to_watch = i;
1da177e4 2923
3ed30676
DG		 2924 if (unlikely(++i == tx_ring->count)) i = 0;
2925 tx_ring->next_to_use = i;
2926
2927 return true;
1da177e4
LT		 2928}
2929
2930#define E1000_MAX_TXD_PWR 12
2931#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2932
64798845
JP		 2933static int e1000_tx_map(struct e1000_adapter *adapter,
2934 struct e1000_tx_ring *tx_ring,
2935 struct sk_buff *skb, unsigned int first,
2936 unsigned int max_per_txd, unsigned int nr_frags,
2937 unsigned int mss)
1da177e4 2938{
1dc32918 2939 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2940 struct e1000_buffer *buffer_info;
2941 unsigned int len = skb->len;
2942 unsigned int offset = 0, size, count = 0, i;
2943 unsigned int f;
2944 len -= skb->data_len;
2945
2946 i = tx_ring->next_to_use;
2947
96838a40 2948 while (len) {
1da177e4
LT		 2949 buffer_info = &tx_ring->buffer_info[i];
2950 size = min(len, max_per_txd);
fd803241
JK		 2951 /* Workaround for Controller erratum --
2952 * descriptor for non-tso packet in a linear SKB that follows a
2953 * tso gets written back prematurely before the data is fully
0f15a8fa 2954 * DMA'd to the controller */
fd803241 2955 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2956 !skb_is_gso(skb)) {
fd803241
JK		 2957 tx_ring->last_tx_tso = 0;
2958 size -= 4;
2959 }
2960
1da177e4
LT		 2961 /* Workaround for premature desc write-backs
2962 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2963 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2964 size -= 4;
97338bde
MC		 2965 /* work-around for errata 10 and it applies
2966 * to all controllers in PCI-X mode
2967 * The fix is to make sure that the first descriptor of a
2968 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2969 */
1dc32918 2970 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2971 (size > 2015) && count == 0))
2972 size = 2015;
96838a40 2973
1da177e4
LT		 2974 /* Workaround for potential 82544 hang in PCI-X. Avoid
2975 * terminating buffers within evenly-aligned dwords. */
96838a40 2976 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2977 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2978 size > 4))
2979 size -= 4;
2980
2981 buffer_info->length = size;
2982 buffer_info->dma =
2983 pci_map_single(adapter->pdev,
2984 skb->data + offset,
2985 size,
2986 PCI_DMA_TODEVICE);
2987 buffer_info->time_stamp = jiffies;
a9ebadd6 2988 buffer_info->next_to_watch = i;
1da177e4
LT		 2989
2990 len -= size;
2991 offset += size;
2992 count++;
96838a40 2993 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2994 }
2995
96838a40 2996 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2997 struct skb_frag_struct *frag;
2998
2999 frag = &skb_shinfo(skb)->frags[f];
3000 len = frag->size;
3001 offset = frag->page_offset;
3002
96838a40 3003 while (len) {
1da177e4
LT		 3004 buffer_info = &tx_ring->buffer_info[i];
3005 size = min(len, max_per_txd);
1da177e4
LT		 3006 /* Workaround for premature desc write-backs
3007 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3008 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 3009 size -= 4;
1da177e4
LT		 3010 /* Workaround for potential 82544 hang in PCI-X.
3011 * Avoid terminating buffers within evenly-aligned
3012 * dwords. */
96838a40 3013 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3014 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3015 size > 4))
3016 size -= 4;
3017
3018 buffer_info->length = size;
3019 buffer_info->dma =
3020 pci_map_page(adapter->pdev,
3021 frag->page,
3022 offset,
3023 size,
3024 PCI_DMA_TODEVICE);
3025 buffer_info->time_stamp = jiffies;
a9ebadd6 3026 buffer_info->next_to_watch = i;
1da177e4
LT		 3027
3028 len -= size;
3029 offset += size;
3030 count++;
96838a40 3031 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3032 }
3033 }
3034
3035 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3036 tx_ring->buffer_info[i].skb = skb;
3037 tx_ring->buffer_info[first].next_to_watch = i;
3038
3039 return count;
3040}
3041
64798845
JP		 3042static void e1000_tx_queue(struct e1000_adapter *adapter,
3043 struct e1000_tx_ring *tx_ring, int tx_flags,
3044 int count)
1da177e4 3045{
1dc32918 3046 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3047 struct e1000_tx_desc *tx_desc = NULL;
3048 struct e1000_buffer *buffer_info;
406874a7 3049 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 3050 unsigned int i;
3051
96838a40 3052 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3053 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3054 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3055 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3056
96838a40 3057 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3058 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3059 }
3060
96838a40 3061 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3062 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3063 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3064 }
3065
96838a40 3066 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3067 txd_lower |= E1000_TXD_CMD_VLE;
3068 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3069 }
3070
3071 i = tx_ring->next_to_use;
3072
96838a40 3073 while (count--) {
1da177e4
LT		 3074 buffer_info = &tx_ring->buffer_info[i];
3075 tx_desc = E1000_TX_DESC(*tx_ring, i);
3076 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3077 tx_desc->lower.data =
3078 cpu_to_le32(txd_lower | buffer_info->length);
3079 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3080 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3081 }
3082
3083 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3084
3085 /* Force memory writes to complete before letting h/w
3086 * know there are new descriptors to fetch. (Only
3087 * applicable for weak-ordered memory model archs,
3088 * such as IA-64). */
3089 wmb();
3090
3091 tx_ring->next_to_use = i;
1dc32918 3092 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 3093 /* we need this if more than one processor can write to our tail
3094 * at a time, it syncronizes IO on IA64/Altix systems */
3095 mmiowb();
1da177e4
LT		 3096}
3097
3098/**
3099 * 82547 workaround to avoid controller hang in half-duplex environment.
3100 * The workaround is to avoid queuing a large packet that would span
3101 * the internal Tx FIFO ring boundary by notifying the stack to resend
3102 * the packet at a later time. This gives the Tx FIFO an opportunity to
3103 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3104 * to the beginning of the Tx FIFO.
3105 **/
3106
3107#define E1000_FIFO_HDR 0x10
3108#define E1000_82547_PAD_LEN 0x3E0
3109
64798845
JP		 3110static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3111 struct sk_buff *skb)
1da177e4 3112{
406874a7
JP		 3113 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3114 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3115
9099cfb9 3116 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3117
96838a40 3118 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3119 goto no_fifo_stall_required;
3120
96838a40 3121 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3122 return 1;
3123
96838a40 3124 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3125 atomic_set(&adapter->tx_fifo_stall, 1);
3126 return 1;
3127 }
3128
3129no_fifo_stall_required:
3130 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3131 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3132 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3133 return 0;
3134}
3135
2d7edb92 3136#define MINIMUM_DHCP_PACKET_SIZE 282
64798845
JP		 3137static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3138 struct sk_buff *skb)
2d7edb92
MC		 3139{
3140 struct e1000_hw *hw = &adapter->hw;
406874a7 3141 u16 length, offset;
96838a40 3142 if (vlan_tx_tag_present(skb)) {
1dc32918
JP		 3143 if (!((vlan_tx_tag_get(skb) == hw->mng_cookie.vlan_id) &&
3144 ( hw->mng_cookie.status &
2d7edb92
MC		 3145 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3146 return 0;
3147 }
20a44028 3148 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
e982f17c 3149 struct ethhdr *eth = (struct ethhdr *)skb->data;
96838a40
JB		 3150 if ((htons(ETH_P_IP) == eth->h_proto)) {
3151 const struct iphdr *ip =
406874a7 3152 (struct iphdr *)((u8 *)skb->data+14);
96838a40
JB		 3153 if (IPPROTO_UDP == ip->protocol) {
3154 struct udphdr *udp =
406874a7 3155 (struct udphdr *)((u8 *)ip +
2d7edb92 3156 (ip->ihl << 2));
96838a40 3157 if (ntohs(udp->dest) == 67) {
406874a7 3158 offset = (u8 *)udp + 8 - skb->data;
2d7edb92
MC		 3159 length = skb->len - offset;
3160
3161 return e1000_mng_write_dhcp_info(hw,
406874a7 3162 (u8 *)udp + 8,
2d7edb92
MC		 3163 length);
3164 }
3165 }
3166 }
3167 }
3168 return 0;
3169}
3170
65c7973f
JB		 3171static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3172{
3173 struct e1000_adapter *adapter = netdev_priv(netdev);
3174 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3175
3176 netif_stop_queue(netdev);
3177 /* Herbert's original patch had:
3178 * smp_mb__after_netif_stop_queue();
3179 * but since that doesn't exist yet, just open code it. */
3180 smp_mb();
3181
3182 /* We need to check again in a case another CPU has just
3183 * made room available. */
3184 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3185 return -EBUSY;
3186
3187 /* A reprieve! */
3188 netif_start_queue(netdev);
fcfb1224 3189 ++adapter->restart_queue;
65c7973f
JB		 3190 return 0;
3191}
3192
3193static int e1000_maybe_stop_tx(struct net_device *netdev,
3194 struct e1000_tx_ring *tx_ring, int size)
3195{
3196 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3197 return 0;
3198 return __e1000_maybe_stop_tx(netdev, size);
3199}
3200
1da177e4 3201#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
64798845 3202static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1da177e4 3203{
60490fe0 3204 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3205 struct e1000_hw *hw = &adapter->hw;
581d708e 3206 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3207 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3208 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3209 unsigned int tx_flags = 0;
6d1e3aa7 3210 unsigned int len = skb->len - skb->data_len;
1da177e4 3211 unsigned long flags;
6d1e3aa7
KK		 3212 unsigned int nr_frags;
3213 unsigned int mss;
1da177e4 3214 int count = 0;
76c224bc 3215 int tso;
1da177e4 3216 unsigned int f;
1da177e4 3217
65c7973f
JB		 3218 /* This goes back to the question of how to logically map a tx queue
3219 * to a flow. Right now, performance is impacted slightly negatively
3220 * if using multiple tx queues. If the stack breaks away from a
3221 * single qdisc implementation, we can look at this again. */
581d708e 3222 tx_ring = adapter->tx_ring;
24025e4e 3223
581d708e 3224 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3225 dev_kfree_skb_any(skb);
3226 return NETDEV_TX_OK;
3227 }
3228
032fe6e9
JB		 3229 /* 82571 and newer doesn't need the workaround that limited descriptor
3230 * length to 4kB */
1dc32918 3231 if (hw->mac_type >= e1000_82571)
032fe6e9
JB		 3232 max_per_txd = 8192;
3233
7967168c 3234 mss = skb_shinfo(skb)->gso_size;
76c224bc 3235 /* The controller does a simple calculation to
1da177e4
LT		 3236 * make sure there is enough room in the FIFO before
3237 * initiating the DMA for each buffer. The calc is:
3238 * 4 = ceil(buffer len/mss). To make sure we don't
3239 * overrun the FIFO, adjust the max buffer len if mss
3240 * drops. */
96838a40 3241 if (mss) {
406874a7 3242 u8 hdr_len;
1da177e4
LT		 3243 max_per_txd = min(mss << 2, max_per_txd);
3244 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3245
90fb5135
AK		 3246 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3247 * points to just header, pull a few bytes of payload from
3248 * frags into skb->data */
ab6a5bb6 3249 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3250 if (skb->data_len && hdr_len == len) {
1dc32918 3251 switch (hw->mac_type) {
9f687888 3252 unsigned int pull_size;
683a2aa3
HX		 3253 case e1000_82544:
3254 /* Make sure we have room to chop off 4 bytes,
3255 * and that the end alignment will work out to
3256 * this hardware's requirements
3257 * NOTE: this is a TSO only workaround
3258 * if end byte alignment not correct move us
3259 * into the next dword */
27a884dc 3260 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3261 break;
3262 /* fall through */
9f687888
JK		 3263 case e1000_82571:
3264 case e1000_82572:
3265 case e1000_82573:
cd94dd0b 3266 case e1000_ich8lan:
9f687888
JK		 3267 pull_size = min((unsigned int)4, skb->data_len);
3268 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3269 DPRINTK(DRV, ERR,
9f687888
JK		 3270 "__pskb_pull_tail failed.\n");
3271 dev_kfree_skb_any(skb);
749dfc70 3272 return NETDEV_TX_OK;
9f687888
JK		 3273 }
3274 len = skb->len - skb->data_len;
3275 break;
3276 default:
3277 /* do nothing */
3278 break;
d74bbd3b 3279 }
9a3056da 3280 }
1da177e4
LT		 3281 }
3282
9a3056da 3283 /* reserve a descriptor for the offload context */
84fa7933 3284 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3285 count++;
2648345f 3286 count++;
fd803241 3287
fd803241 3288 /* Controller Erratum workaround */
89114afd 3289 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3290 count++;
fd803241 3291
1da177e4
LT		 3292 count += TXD_USE_COUNT(len, max_txd_pwr);
3293
96838a40 3294 if (adapter->pcix_82544)
1da177e4
LT		 3295 count++;
3296
96838a40 3297 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3298 * in PCI-X mode, so add one more descriptor to the count
3299 */
1dc32918 3300 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3301 (len > 2015)))
3302 count++;
3303
1da177e4 3304 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3305 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3306 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3307 max_txd_pwr);
96838a40 3308 if (adapter->pcix_82544)
1da177e4
LT		 3309 count += nr_frags;
3310
0f15a8fa 3311
1dc32918
JP		 3312 if (hw->tx_pkt_filtering &&
3313 (hw->mac_type == e1000_82573))
2d7edb92
MC		 3314 e1000_transfer_dhcp_info(adapter, skb);
3315
f50393fe 3316 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
581d708e 3317 /* Collision - tell upper layer to requeue */
581d708e 3318 return NETDEV_TX_LOCKED;
1da177e4
LT		 3319
3320 /* need: count + 2 desc gap to keep tail from touching
3321 * head, otherwise try next time */
65c7973f 3322 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3323 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3324 return NETDEV_TX_BUSY;
3325 }
3326
1dc32918 3327 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3328 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3329 netif_stop_queue(netdev);
1314bbf3 3330 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3331 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3332 return NETDEV_TX_BUSY;
3333 }
3334 }
3335
96838a40 3336 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3337 tx_flags |= E1000_TX_FLAGS_VLAN;
3338 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3339 }
3340
581d708e 3341 first = tx_ring->next_to_use;
96838a40 3342
581d708e 3343 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3344 if (tso < 0) {
3345 dev_kfree_skb_any(skb);
581d708e 3346 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3347 return NETDEV_TX_OK;
3348 }
3349
fd803241
JK		 3350 if (likely(tso)) {
3351 tx_ring->last_tx_tso = 1;
1da177e4 3352 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3353 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3354 tx_flags |= E1000_TX_FLAGS_CSUM;
3355
2d7edb92 3356 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3357 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3358 * no longer assume, we must. */
60828236 3359 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3360 tx_flags |= E1000_TX_FLAGS_IPV4;
3361
581d708e
MC		 3362 e1000_tx_queue(adapter, tx_ring, tx_flags,
3363 e1000_tx_map(adapter, tx_ring, skb, first,
3364 max_per_txd, nr_frags, mss));
1da177e4
LT		 3365
3366 netdev->trans_start = jiffies;
3367
3368 /* Make sure there is space in the ring for the next send. */
65c7973f 3369 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3370
581d708e 3371 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3372 return NETDEV_TX_OK;
3373}
3374
3375/**
3376 * e1000_tx_timeout - Respond to a Tx Hang
3377 * @netdev: network interface device structure
3378 **/
3379
64798845 3380static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3381{
60490fe0 3382 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3383
3384 /* Do the reset outside of interrupt context */
87041639
JK		 3385 adapter->tx_timeout_count++;
3386 schedule_work(&adapter->reset_task);
1da177e4
LT		 3387}
3388
64798845 3389static void e1000_reset_task(struct work_struct *work)
1da177e4 3390{
65f27f38
DH		 3391 struct e1000_adapter *adapter =
3392 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3393
2db10a08 3394 e1000_reinit_locked(adapter);
1da177e4
LT		 3395}
3396
3397/**
3398 * e1000_get_stats - Get System Network Statistics
3399 * @netdev: network interface device structure
3400 *
3401 * Returns the address of the device statistics structure.
3402 * The statistics are actually updated from the timer callback.
3403 **/
3404
64798845 3405static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3406{
60490fe0 3407 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3408
6b7660cd 3409 /* only return the current stats */
1da177e4
LT		 3410 return &adapter->net_stats;
3411}
3412
3413/**
3414 * e1000_change_mtu - Change the Maximum Transfer Unit
3415 * @netdev: network interface device structure
3416 * @new_mtu: new value for maximum frame size
3417 *
3418 * Returns 0 on success, negative on failure
3419 **/
3420
64798845 3421static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3422{
60490fe0 3423 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3424 struct e1000_hw *hw = &adapter->hw;
1da177e4 3425 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
406874a7 3426 u16 eeprom_data = 0;
1da177e4 3427
96838a40
JB		 3428 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3429 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3430 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3431 return -EINVAL;
2d7edb92 3432 }
1da177e4 3433
997f5cbd 3434 /* Adapter-specific max frame size limits. */
1dc32918 3435 switch (hw->mac_type) {
9e2feace 3436 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3437 case e1000_ich8lan:
997f5cbd
JK		 3438 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3439 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3440 return -EINVAL;
2d7edb92 3441 }
997f5cbd 3442 break;
85b22eb6 3443 case e1000_82573:
249d71d6
BA		 3444 /* Jumbo Frames not supported if:
3445 * - this is not an 82573L device
3446 * - ASPM is enabled in any way (0x1A bits 3:2) */
1dc32918 3447 e1000_read_eeprom(hw, EEPROM_INIT_3GIO_3, 1,
85b22eb6 3448 &eeprom_data);
1dc32918 3449 if ((hw->device_id != E1000_DEV_ID_82573L) ||
249d71d6 3450 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3451 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3452 DPRINTK(PROBE, ERR,
3453 "Jumbo Frames not supported.\n");
3454 return -EINVAL;
3455 }
3456 break;
3457 }
249d71d6
BA		 3458 /* ERT will be enabled later to enable wire speed receives */
3459
85b22eb6 3460 /* fall through to get support */
997f5cbd
JK		 3461 case e1000_82571:
3462 case e1000_82572:
87041639 3463 case e1000_80003es2lan:
997f5cbd
JK		 3464#define MAX_STD_JUMBO_FRAME_SIZE 9234
3465 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3466 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3467 return -EINVAL;
3468 }
3469 break;
3470 default:
3471 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3472 break;
1da177e4
LT		 3473 }
3474
87f5032e 3475 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3476 * means we reserve 2 more, this pushes us to allocate from the next
3477 * larger slab size
3478 * i.e. RXBUFFER_2048 --> size-4096 slab */
3479
3480 if (max_frame <= E1000_RXBUFFER_256)
3481 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3482 else if (max_frame <= E1000_RXBUFFER_512)
3483 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3484 else if (max_frame <= E1000_RXBUFFER_1024)
3485 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3486 else if (max_frame <= E1000_RXBUFFER_2048)
3487 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3488 else if (max_frame <= E1000_RXBUFFER_4096)
3489 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3490 else if (max_frame <= E1000_RXBUFFER_8192)
3491 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3492 else if (max_frame <= E1000_RXBUFFER_16384)
3493 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3494
3495 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3496 if (!hw->tbi_compatibility_on &&
9e2feace
AK		 3497 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3498 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3499 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3500
2d7edb92 3501 netdev->mtu = new_mtu;
1dc32918 3502 hw->max_frame_size = max_frame;
2d7edb92 3503
2db10a08
AK		 3504 if (netif_running(netdev))
3505 e1000_reinit_locked(adapter);
1da177e4 3506
1da177e4
LT		 3507 return 0;
3508}
3509
3510/**
3511 * e1000_update_stats - Update the board statistics counters
3512 * @adapter: board private structure
3513 **/
3514
64798845 3515void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4
LT		 3516{
3517 struct e1000_hw *hw = &adapter->hw;
282f33c9 3518 struct pci_dev *pdev = adapter->pdev;
1da177e4 3519 unsigned long flags;
406874a7 3520 u16 phy_tmp;
1da177e4
LT		 3521
3522#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3523
282f33c9
LV		 3524 /*
3525 * Prevent stats update while adapter is being reset, or if the pci
3526 * connection is down.
3527 */
9026729b 3528 if (adapter->link_speed == 0)
282f33c9 3529 return;
81b1955e 3530 if (pci_channel_offline(pdev))
9026729b
AK		 3531 return;
3532
1da177e4
LT		 3533 spin_lock_irqsave(&adapter->stats_lock, flags);
3534
828d055f 3535 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3536 * called from the interrupt context, so they must only
3537 * be written while holding adapter->stats_lock
3538 */
3539
1dc32918
JP		 3540 adapter->stats.crcerrs += er32(CRCERRS);
3541 adapter->stats.gprc += er32(GPRC);
3542 adapter->stats.gorcl += er32(GORCL);
3543 adapter->stats.gorch += er32(GORCH);
3544 adapter->stats.bprc += er32(BPRC);
3545 adapter->stats.mprc += er32(MPRC);
3546 adapter->stats.roc += er32(ROC);
3547
3548 if (hw->mac_type != e1000_ich8lan) {
3549 adapter->stats.prc64 += er32(PRC64);
3550 adapter->stats.prc127 += er32(PRC127);
3551 adapter->stats.prc255 += er32(PRC255);
3552 adapter->stats.prc511 += er32(PRC511);
3553 adapter->stats.prc1023 += er32(PRC1023);
3554 adapter->stats.prc1522 += er32(PRC1522);
3555 }
3556
3557 adapter->stats.symerrs += er32(SYMERRS);
3558 adapter->stats.mpc += er32(MPC);
3559 adapter->stats.scc += er32(SCC);
3560 adapter->stats.ecol += er32(ECOL);
3561 adapter->stats.mcc += er32(MCC);
3562 adapter->stats.latecol += er32(LATECOL);
3563 adapter->stats.dc += er32(DC);
3564 adapter->stats.sec += er32(SEC);
3565 adapter->stats.rlec += er32(RLEC);
3566 adapter->stats.xonrxc += er32(XONRXC);
3567 adapter->stats.xontxc += er32(XONTXC);
3568 adapter->stats.xoffrxc += er32(XOFFRXC);
3569 adapter->stats.xofftxc += er32(XOFFTXC);
3570 adapter->stats.fcruc += er32(FCRUC);
3571 adapter->stats.gptc += er32(GPTC);
3572 adapter->stats.gotcl += er32(GOTCL);
3573 adapter->stats.gotch += er32(GOTCH);
3574 adapter->stats.rnbc += er32(RNBC);
3575 adapter->stats.ruc += er32(RUC);
3576 adapter->stats.rfc += er32(RFC);
3577 adapter->stats.rjc += er32(RJC);
3578 adapter->stats.torl += er32(TORL);
3579 adapter->stats.torh += er32(TORH);
3580 adapter->stats.totl += er32(TOTL);
3581 adapter->stats.toth += er32(TOTH);
3582 adapter->stats.tpr += er32(TPR);
3583
3584 if (hw->mac_type != e1000_ich8lan) {
3585 adapter->stats.ptc64 += er32(PTC64);
3586 adapter->stats.ptc127 += er32(PTC127);
3587 adapter->stats.ptc255 += er32(PTC255);
3588 adapter->stats.ptc511 += er32(PTC511);
3589 adapter->stats.ptc1023 += er32(PTC1023);
3590 adapter->stats.ptc1522 += er32(PTC1522);
3591 }
3592
3593 adapter->stats.mptc += er32(MPTC);
3594 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3595
3596 /* used for adaptive IFS */
3597
1dc32918 3598 hw->tx_packet_delta = er32(TPT);
1da177e4 3599 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3600 hw->collision_delta = er32(COLC);
1da177e4
LT		 3601 adapter->stats.colc += hw->collision_delta;
3602
96838a40 3603 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3604 adapter->stats.algnerrc += er32(ALGNERRC);
3605 adapter->stats.rxerrc += er32(RXERRC);
3606 adapter->stats.tncrs += er32(TNCRS);
3607 adapter->stats.cexterr += er32(CEXTERR);
3608 adapter->stats.tsctc += er32(TSCTC);
3609 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4 3610 }
96838a40 3611 if (hw->mac_type > e1000_82547_rev_2) {
1dc32918
JP		 3612 adapter->stats.iac += er32(IAC);
3613 adapter->stats.icrxoc += er32(ICRXOC);
3614
3615 if (hw->mac_type != e1000_ich8lan) {
3616 adapter->stats.icrxptc += er32(ICRXPTC);
3617 adapter->stats.icrxatc += er32(ICRXATC);
3618 adapter->stats.ictxptc += er32(ICTXPTC);
3619 adapter->stats.ictxatc += er32(ICTXATC);
3620 adapter->stats.ictxqec += er32(ICTXQEC);
3621 adapter->stats.ictxqmtc += er32(ICTXQMTC);
3622 adapter->stats.icrxdmtc += er32(ICRXDMTC);
cd94dd0b 3623 }
2d7edb92 3624 }
1da177e4
LT		 3625
3626 /* Fill out the OS statistics structure */
1da177e4
LT		 3627 adapter->net_stats.multicast = adapter->stats.mprc;
3628 adapter->net_stats.collisions = adapter->stats.colc;
3629
3630 /* Rx Errors */
3631
87041639
JK		 3632 /* RLEC on some newer hardware can be incorrect so build
3633 * our own version based on RUC and ROC */
1da177e4
LT		 3634 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3635 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3636 adapter->stats.ruc + adapter->stats.roc +
3637 adapter->stats.cexterr;
49559854
MW		 3638 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3639 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3640 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3641 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3642 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3643
3644 /* Tx Errors */
49559854
MW		 3645 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3646 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3647 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3648 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3649 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3650 if (hw->bad_tx_carr_stats_fd &&
167fb284
JG		 3651 adapter->link_duplex == FULL_DUPLEX) {
3652 adapter->net_stats.tx_carrier_errors = 0;
3653 adapter->stats.tncrs = 0;
3654 }
1da177e4
LT		 3655
3656 /* Tx Dropped needs to be maintained elsewhere */
3657
3658 /* Phy Stats */
96838a40
JB		 3659 if (hw->media_type == e1000_media_type_copper) {
3660 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3661 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3662 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3663 adapter->phy_stats.idle_errors += phy_tmp;
3664 }
3665
96838a40 3666 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3667 (hw->phy_type == e1000_phy_m88) &&
3668 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3669 adapter->phy_stats.receive_errors += phy_tmp;
3670 }
3671
15e376b4 3672 /* Management Stats */
1dc32918
JP		 3673 if (hw->has_smbus) {
3674 adapter->stats.mgptc += er32(MGTPTC);
3675 adapter->stats.mgprc += er32(MGTPRC);
3676 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3677 }
3678
1da177e4
LT		 3679 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3680}
9ac98284
JB		 3681
3682/**
3683 * e1000_intr_msi - Interrupt Handler
3684 * @irq: interrupt number
3685 * @data: pointer to a network interface device structure
3686 **/
3687
64798845 3688static irqreturn_t e1000_intr_msi(int irq, void *data)
9ac98284
JB		 3689{
3690 struct net_device *netdev = data;
3691 struct e1000_adapter *adapter = netdev_priv(netdev);
3692 struct e1000_hw *hw = &adapter->hw;
1dc32918 3693 u32 icr = er32(ICR);
9ac98284 3694
9150b76a
JB		 3695 /* in NAPI mode read ICR disables interrupts using IAM */
3696
b5fc8f0c
JB		 3697 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3698 hw->get_link_status = 1;
3699 /* 80003ES2LAN workaround-- For packet buffer work-around on
3700 * link down event; disable receives here in the ISR and reset
3701 * adapter in watchdog */
3702 if (netif_carrier_ok(netdev) &&
1dc32918 3703 (hw->mac_type == e1000_80003es2lan)) {
b5fc8f0c 3704 /* disable receives */
1dc32918
JP		 3705 u32 rctl = er32(RCTL);
3706 ew32(RCTL, rctl & ~E1000_RCTL_EN);
9ac98284 3707 }
b5fc8f0c
JB		 3708 /* guard against interrupt when we're going down */
3709 if (!test_bit(__E1000_DOWN, &adapter->flags))
3710 mod_timer(&adapter->watchdog_timer, jiffies + 1);
9ac98284
JB		 3711 }
3712
bea3348e 3713 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3714 adapter->total_tx_bytes = 0;
3715 adapter->total_tx_packets = 0;
3716 adapter->total_rx_bytes = 0;
3717 adapter->total_rx_packets = 0;
bea3348e 3718 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3719 } else
9ac98284 3720 e1000_irq_enable(adapter);
9ac98284
JB		 3721
3722 return IRQ_HANDLED;
3723}
1da177e4
LT		 3724
3725/**
3726 * e1000_intr - Interrupt Handler
3727 * @irq: interrupt number
3728 * @data: pointer to a network interface device structure
1da177e4
LT		 3729 **/
3730
64798845 3731static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3732{
3733 struct net_device *netdev = data;
60490fe0 3734 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3735 struct e1000_hw *hw = &adapter->hw;
1dc32918 3736 u32 rctl, icr = er32(ICR);
c3570acb 3737
835bb129
JB		 3738 if (unlikely(!icr))
3739 return IRQ_NONE; /* Not our interrupt */
3740
835bb129
JB		 3741 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3742 * not set, then the adapter didn't send an interrupt */
3743 if (unlikely(hw->mac_type >= e1000_82571 &&
3744 !(icr & E1000_ICR_INT_ASSERTED)))
3745 return IRQ_NONE;
3746
9150b76a
JB		 3747 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3748 * need for the IMC write */
1da177e4 3749
96838a40 3750 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3751 hw->get_link_status = 1;
87041639
JK		 3752 /* 80003ES2LAN workaround--
3753 * For packet buffer work-around on link down event;
3754 * disable receives here in the ISR and
3755 * reset adapter in watchdog
3756 */
3757 if (netif_carrier_ok(netdev) &&
1dc32918 3758 (hw->mac_type == e1000_80003es2lan)) {
87041639 3759 /* disable receives */
1dc32918
JP		 3760 rctl = er32(RCTL);
3761 ew32(RCTL, rctl & ~E1000_RCTL_EN);
87041639 3762 }
1314bbf3
AK		 3763 /* guard against interrupt when we're going down */
3764 if (!test_bit(__E1000_DOWN, &adapter->flags))
3765 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3766 }
3767
1e613fd9 3768 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3769 /* disable interrupts, without the synchronize_irq bit */
1dc32918
JP		 3770 ew32(IMC, ~0);
3771 E1000_WRITE_FLUSH();
1e613fd9 3772 }
bea3348e 3773 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3774 adapter->total_tx_bytes = 0;
3775 adapter->total_tx_packets = 0;
3776 adapter->total_rx_bytes = 0;
3777 adapter->total_rx_packets = 0;
bea3348e 3778 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3779 } else
90fb5135
AK		 3780 /* this really should not happen! if it does it is basically a
3781 * bug, but not a hard error, so enable ints and continue */
581d708e 3782 e1000_irq_enable(adapter);
1da177e4 3783
1da177e4
LT		 3784 return IRQ_HANDLED;
3785}
3786
1da177e4
LT		 3787/**
3788 * e1000_clean - NAPI Rx polling callback
3789 * @adapter: board private structure
3790 **/
64798845 3791static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3792{
bea3348e
SH		 3793 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3794 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 3795 int tx_cleaned = 0, work_done = 0;
581d708e 3796
4cf1653a 3797 adapter = netdev_priv(poll_dev);
581d708e 3798
d3d9e484
AK		 3799 /* e1000_clean is called per-cpu. This lock protects
3800 * tx_ring[0] from being cleaned by multiple cpus
3801 * simultaneously. A failure obtaining the lock means
3802 * tx_ring[0] is currently being cleaned anyway. */
3803 if (spin_trylock(&adapter->tx_queue_lock)) {
d2c7ddd6
DM		 3804 tx_cleaned = e1000_clean_tx_irq(adapter,
3805 &adapter->tx_ring[0]);
d3d9e484 3806 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3807 }
3808
d3d9e484 3809 adapter->clean_rx(adapter, &adapter->rx_ring[0],
bea3348e 3810 &work_done, budget);
96838a40 3811
d2c7ddd6
DM		 3812 if (tx_cleaned)
3813 work_done = budget;
3814
53e52c72
DM		 3815 /* If budget not fully consumed, exit the polling mode */
3816 if (work_done < budget) {
835bb129
JB		 3817 if (likely(adapter->itr_setting & 3))
3818 e1000_set_itr(adapter);
bea3348e 3819 netif_rx_complete(poll_dev, napi);
1da177e4 3820 e1000_irq_enable(adapter);
1da177e4
LT		 3821 }
3822
bea3348e 3823 return work_done;
1da177e4
LT		 3824}
3825
1da177e4
LT		 3826/**
3827 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3828 * @adapter: board private structure
3829 **/
64798845
JP		 3830static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3831 struct e1000_tx_ring *tx_ring)
1da177e4 3832{
1dc32918 3833 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3834 struct net_device *netdev = adapter->netdev;
3835 struct e1000_tx_desc *tx_desc, *eop_desc;
3836 struct e1000_buffer *buffer_info;
3837 unsigned int i, eop;
2a1af5d7 3838 unsigned int count = 0;
c3033b01 3839 bool cleaned = false;
835bb129 3840 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3841
3842 i = tx_ring->next_to_clean;
3843 eop = tx_ring->buffer_info[i].next_to_watch;
3844 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3845
581d708e 3846 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
c3033b01 3847 for (cleaned = false; !cleaned; ) {
1da177e4
LT		 3848 tx_desc = E1000_TX_DESC(*tx_ring, i);
3849 buffer_info = &tx_ring->buffer_info[i];
3850 cleaned = (i == eop);
3851
835bb129 3852 if (cleaned) {
2b65326e 3853 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3854 unsigned int segs, bytecount;
3855 segs = skb_shinfo(skb)->gso_segs ?: 1;
3856 /* multiply data chunks by size of headers */
3857 bytecount = ((segs - 1) * skb_headlen(skb)) +
3858 skb->len;
2b65326e 3859 total_tx_packets += segs;
7753b171 3860 total_tx_bytes += bytecount;
835bb129 3861 }
fd803241 3862 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3863 tx_desc->upper.data = 0;
1da177e4 3864
96838a40 3865 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3866 }
581d708e 3867
1da177e4
LT		 3868 eop = tx_ring->buffer_info[i].next_to_watch;
3869 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3870#define E1000_TX_WEIGHT 64
3871 /* weight of a sort for tx, to avoid endless transmit cleanup */
c3570acb
FR		 3872 if (count++ == E1000_TX_WEIGHT)
3873 break;
1da177e4
LT		 3874 }
3875
3876 tx_ring->next_to_clean = i;
3877
77b2aad5 3878#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3879 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3880 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3881 /* Make sure that anybody stopping the queue after this
3882 * sees the new next_to_clean.
3883 */
3884 smp_mb();
fcfb1224 3885 if (netif_queue_stopped(netdev)) {
77b2aad5 3886 netif_wake_queue(netdev);
fcfb1224
JB		 3887 ++adapter->restart_queue;
3888 }
77b2aad5 3889 }
2648345f 3890
581d708e 3891 if (adapter->detect_tx_hung) {
2648345f 3892 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3893 * check with the clearing of time_stamp and movement of i */
c3033b01 3894 adapter->detect_tx_hung = false;
392137fa
JK		 3895 if (tx_ring->buffer_info[eop].dma &&
3896 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3897 (adapter->tx_timeout_factor * HZ))
1dc32918 3898 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3899
3900 /* detected Tx unit hang */
c6963ef5 3901 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3902 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3903 " TDH <%x>\n"
3904 " TDT <%x>\n"
3905 " next_to_use <%x>\n"
3906 " next_to_clean <%x>\n"
3907 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3908 " time_stamp <%lx>\n"
3909 " next_to_watch <%x>\n"
3910 " jiffies <%lx>\n"
3911 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3912 (unsigned long)((tx_ring - adapter->tx_ring) /
3913 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3914 readl(hw->hw_addr + tx_ring->tdh),
3915 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3916 tx_ring->next_to_use,
392137fa
JK		 3917 tx_ring->next_to_clean,
3918 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3919 eop,
3920 jiffies,
3921 eop_desc->upper.fields.status);
1da177e4 3922 netif_stop_queue(netdev);
70b8f1e1 3923 }
1da177e4 3924 }
835bb129
JB		 3925 adapter->total_tx_bytes += total_tx_bytes;
3926 adapter->total_tx_packets += total_tx_packets;
ef90e4ec
AK		 3927 adapter->net_stats.tx_bytes += total_tx_bytes;
3928 adapter->net_stats.tx_packets += total_tx_packets;
1da177e4
LT		 3929 return cleaned;
3930}
3931
3932/**
3933 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3934 * @adapter: board private structure
3935 * @status_err: receive descriptor status and error fields
3936 * @csum: receive descriptor csum field
3937 * @sk_buff: socket buffer with received data
1da177e4
LT		 3938 **/
3939
64798845
JP		 3940static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3941 u32 csum, struct sk_buff *skb)
1da177e4 3942{
1dc32918 3943 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3944 u16 status = (u16)status_err;
3945 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3946 skb->ip_summed = CHECKSUM_NONE;
3947
1da177e4 3948 /* 82543 or newer only */
1dc32918 3949 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3950 /* Ignore Checksum bit is set */
96838a40 3951 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3952 /* TCP/UDP checksum error bit is set */
96838a40 3953 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3954 /* let the stack verify checksum errors */
1da177e4 3955 adapter->hw_csum_err++;
2d7edb92
MC		 3956 return;
3957 }
3958 /* TCP/UDP Checksum has not been calculated */
1dc32918 3959 if (hw->mac_type <= e1000_82547_rev_2) {
96838a40 3960 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3961 return;
1da177e4 3962 } else {
96838a40 3963 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3964 return;
3965 }
3966 /* It must be a TCP or UDP packet with a valid checksum */
3967 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3968 /* TCP checksum is good */
3969 skb->ip_summed = CHECKSUM_UNNECESSARY;
1dc32918 3970 } else if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3971 /* IP fragment with UDP payload */
3972 /* Hardware complements the payload checksum, so we undo it
3973 * and then put the value in host order for further stack use.
3974 */
3e18826c
AV		 3975 __sum16 sum = (__force __sum16)htons(csum);
3976 skb->csum = csum_unfold(~sum);
84fa7933 3977 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3978 }
2d7edb92 3979 adapter->hw_csum_good++;
1da177e4
LT		 3980}
3981
3982/**
2d7edb92 3983 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3984 * @adapter: board private structure
3985 **/
64798845
JP		 3986static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3987 struct e1000_rx_ring *rx_ring,
3988 int *work_done, int work_to_do)
1da177e4 3989{
1dc32918 3990 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3991 struct net_device *netdev = adapter->netdev;
3992 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3993 struct e1000_rx_desc *rx_desc, *next_rxd;
3994 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3995 unsigned long flags;
406874a7
JP		 3996 u32 length;
3997 u8 last_byte;
1da177e4 3998 unsigned int i;
72d64a43 3999 int cleaned_count = 0;
c3033b01 4000 bool cleaned = false;
835bb129 4001 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4002
4003 i = rx_ring->next_to_clean;
4004 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4005 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4006
b92ff8ee 4007 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4008 struct sk_buff *skb;
a292ca6e 4009 u8 status;
90fb5135 4010
96838a40 4011 if (*work_done >= work_to_do)
1da177e4
LT		 4012 break;
4013 (*work_done)++;
c3570acb 4014
a292ca6e 4015 status = rx_desc->status;
b92ff8ee 4016 skb = buffer_info->skb;
86c3d59f
JB		 4017 buffer_info->skb = NULL;
4018
30320be8
JK		 4019 prefetch(skb->data - NET_IP_ALIGN);
4020
86c3d59f
JB		 4021 if (++i == rx_ring->count) i = 0;
4022 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4023 prefetch(next_rxd);
4024
86c3d59f 4025 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4026
c3033b01 4027 cleaned = true;
72d64a43 4028 cleaned_count++;
a292ca6e
JK		 4029 pci_unmap_single(pdev,
4030 buffer_info->dma,
4031 buffer_info->length,
1da177e4
LT		 4032 PCI_DMA_FROMDEVICE);
4033
1da177e4
LT		 4034 length = le16_to_cpu(rx_desc->length);
4035
a1415ee6
JK		 4036 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4037 /* All receives must fit into a single buffer */
4038 E1000_DBG("%s: Receive packet consumed multiple"
4039 " buffers\n", netdev->name);
864c4e45 4040 /* recycle */
8fc897b0 4041 buffer_info->skb = skb;
1da177e4
LT		 4042 goto next_desc;
4043 }
4044
96838a40 4045 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4046 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4047 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4048 last_byte)) {
1da177e4 4049 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4050 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 4051 length, skb->data);
4052 spin_unlock_irqrestore(&adapter->stats_lock,
4053 flags);
4054 length--;
4055 } else {
9e2feace
AK		 4056 /* recycle */
4057 buffer_info->skb = skb;
1da177e4
LT		 4058 goto next_desc;
4059 }
1cb5821f 4060 }
1da177e4 4061
d2a1e213
JB		 4062 /* adjust length to remove Ethernet CRC, this must be
4063 * done after the TBI_ACCEPT workaround above */
4064 length -= 4;
4065
835bb129
JB		 4066 /* probably a little skewed due to removing CRC */
4067 total_rx_bytes += length;
4068 total_rx_packets++;
4069
a292ca6e
JK		 4070 /* code added for copybreak, this should improve
4071 * performance for small packets with large amounts
4072 * of reassembly being done in the stack */
1f753861 4073 if (length < copybreak) {
a292ca6e 4074 struct sk_buff *new_skb =
87f5032e 4075 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4076 if (new_skb) {
4077 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 4078 skb_copy_to_linear_data_offset(new_skb,
4079 -NET_IP_ALIGN,
4080 (skb->data -
4081 NET_IP_ALIGN),
4082 (length +
4083 NET_IP_ALIGN));
a292ca6e
JK		 4084 /* save the skb in buffer_info as good */
4085 buffer_info->skb = skb;
4086 skb = new_skb;
a292ca6e 4087 }
996695de
AK		 4088 /* else just continue with the old one */
4089 }
a292ca6e 4090 /* end copybreak code */
996695de 4091 skb_put(skb, length);
1da177e4
LT		 4092
4093 /* Receive Checksum Offload */
a292ca6e 4094 e1000_rx_checksum(adapter,
406874a7
JP		 4095 (u32)(status) |
4096 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4097 le16_to_cpu(rx_desc->csum), skb);
96838a40 4098
1da177e4 4099 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 4100
96838a40 4101 if (unlikely(adapter->vlgrp &&
a292ca6e 4102 (status & E1000_RXD_STAT_VP))) {
1da177e4 4103 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
38b22195 4104 le16_to_cpu(rx_desc->special));
1da177e4
LT		 4105 } else {
4106 netif_receive_skb(skb);
4107 }
c3570acb 4108
1da177e4
LT		 4109next_desc:
4110 rx_desc->status = 0;
1da177e4 4111
72d64a43
JK		 4112 /* return some buffers to hardware, one at a time is too slow */
4113 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4114 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4115 cleaned_count = 0;
4116 }
4117
30320be8 4118 /* use prefetched values */
86c3d59f
JB		 4119 rx_desc = next_rxd;
4120 buffer_info = next_buffer;
1da177e4 4121 }
1da177e4 4122 rx_ring->next_to_clean = i;
72d64a43
JK		 4123
4124 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4125 if (cleaned_count)
4126 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4127
835bb129
JB		 4128 adapter->total_rx_packets += total_rx_packets;
4129 adapter->total_rx_bytes += total_rx_bytes;
ef90e4ec
AK		 4130 adapter->net_stats.rx_bytes += total_rx_bytes;
4131 adapter->net_stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4132 return cleaned;
4133}
4134
1da177e4 4135/**
2d7edb92 4136 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4137 * @adapter: address of board private structure
4138 **/
4139
64798845
JP		 4140static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4141 struct e1000_rx_ring *rx_ring,
4142 int cleaned_count)
1da177e4 4143{
1dc32918 4144 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4145 struct net_device *netdev = adapter->netdev;
4146 struct pci_dev *pdev = adapter->pdev;
4147 struct e1000_rx_desc *rx_desc;
4148 struct e1000_buffer *buffer_info;
4149 struct sk_buff *skb;
2648345f
MC		 4150 unsigned int i;
4151 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4152
4153 i = rx_ring->next_to_use;
4154 buffer_info = &rx_ring->buffer_info[i];
4155
a292ca6e 4156 while (cleaned_count--) {
ca6f7224
CH		 4157 skb = buffer_info->skb;
4158 if (skb) {
a292ca6e
JK		 4159 skb_trim(skb, 0);
4160 goto map_skb;
4161 }
4162
ca6f7224 4163 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4164 if (unlikely(!skb)) {
1da177e4 4165 /* Better luck next round */
72d64a43 4166 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4167 break;
4168 }
4169
2648345f 4170 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4171 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4172 struct sk_buff *oldskb = skb;
2648345f
MC		 4173 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4174 "at %p\n", bufsz, skb->data);
4175 /* Try again, without freeing the previous */
87f5032e 4176 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4177 /* Failed allocation, critical failure */
1da177e4
LT		 4178 if (!skb) {
4179 dev_kfree_skb(oldskb);
4180 break;
4181 }
2648345f 4182
1da177e4
LT		 4183 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4184 /* give up */
4185 dev_kfree_skb(skb);
4186 dev_kfree_skb(oldskb);
4187 break; /* while !buffer_info->skb */
1da177e4 4188 }
ca6f7224
CH		 4189
4190 /* Use new allocation */
4191 dev_kfree_skb(oldskb);
1da177e4 4192 }
1da177e4
LT		 4193 /* Make buffer alignment 2 beyond a 16 byte boundary
4194 * this will result in a 16 byte aligned IP header after
4195 * the 14 byte MAC header is removed
4196 */
4197 skb_reserve(skb, NET_IP_ALIGN);
4198
1da177e4
LT		 4199 buffer_info->skb = skb;
4200 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4201map_skb:
1da177e4
LT		 4202 buffer_info->dma = pci_map_single(pdev,
4203 skb->data,
4204 adapter->rx_buffer_len,
4205 PCI_DMA_FROMDEVICE);
4206
2648345f
MC		 4207 /* Fix for errata 23, can't cross 64kB boundary */
4208 if (!e1000_check_64k_bound(adapter,
4209 (void *)(unsigned long)buffer_info->dma,
4210 adapter->rx_buffer_len)) {
4211 DPRINTK(RX_ERR, ERR,
4212 "dma align check failed: %u bytes at %p\n",
4213 adapter->rx_buffer_len,
4214 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4215 dev_kfree_skb(skb);
4216 buffer_info->skb = NULL;
4217
2648345f 4218 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4219 adapter->rx_buffer_len,
4220 PCI_DMA_FROMDEVICE);
4221
4222 break; /* while !buffer_info->skb */
4223 }
1da177e4
LT		 4224 rx_desc = E1000_RX_DESC(*rx_ring, i);
4225 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4226
96838a40
JB		 4227 if (unlikely(++i == rx_ring->count))
4228 i = 0;
1da177e4
LT		 4229 buffer_info = &rx_ring->buffer_info[i];
4230 }
4231
b92ff8ee
JB		 4232 if (likely(rx_ring->next_to_use != i)) {
4233 rx_ring->next_to_use = i;
4234 if (unlikely(i-- == 0))
4235 i = (rx_ring->count - 1);
4236
4237 /* Force memory writes to complete before letting h/w
4238 * know there are new descriptors to fetch. (Only
4239 * applicable for weak-ordered memory model archs,
4240 * such as IA-64). */
4241 wmb();
1dc32918 4242 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4243 }
1da177e4
LT		 4244}
4245
4246/**
4247 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4248 * @adapter:
4249 **/
4250
64798845 4251static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4252{
1dc32918 4253 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4254 u16 phy_status;
4255 u16 phy_ctrl;
1da177e4 4256
1dc32918
JP		 4257 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4258 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4259 return;
4260
96838a40 4261 if (adapter->smartspeed == 0) {
1da177e4
LT		 4262 /* If Master/Slave config fault is asserted twice,
4263 * we assume back-to-back */
1dc32918 4264 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4265 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4266 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4267 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4268 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4269 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4270 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4271 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4272 phy_ctrl);
4273 adapter->smartspeed++;
1dc32918
JP		 4274 if (!e1000_phy_setup_autoneg(hw) &&
4275 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4276 &phy_ctrl)) {
4277 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4278 MII_CR_RESTART_AUTO_NEG);
1dc32918 4279 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4280 phy_ctrl);
4281 }
4282 }
4283 return;
96838a40 4284 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4285 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4286 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4287 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4288 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4289 if (!e1000_phy_setup_autoneg(hw) &&
4290 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4291 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4292 MII_CR_RESTART_AUTO_NEG);
1dc32918 4293 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4294 }
4295 }
4296 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4297 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4298 adapter->smartspeed = 0;
4299}
4300
4301/**
4302 * e1000_ioctl -
4303 * @netdev:
4304 * @ifreq:
4305 * @cmd:
4306 **/
4307
64798845 4308static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4309{
4310 switch (cmd) {
4311 case SIOCGMIIPHY:
4312 case SIOCGMIIREG:
4313 case SIOCSMIIREG:
4314 return e1000_mii_ioctl(netdev, ifr, cmd);
4315 default:
4316 return -EOPNOTSUPP;
4317 }
4318}
4319
4320/**
4321 * e1000_mii_ioctl -
4322 * @netdev:
4323 * @ifreq:
4324 * @cmd:
4325 **/
4326
64798845
JP		 4327static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4328 int cmd)
1da177e4 4329{
60490fe0 4330 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4331 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4332 struct mii_ioctl_data *data = if_mii(ifr);
4333 int retval;
406874a7
JP		 4334 u16 mii_reg;
4335 u16 spddplx;
97876fc6 4336 unsigned long flags;
1da177e4 4337
1dc32918 4338 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4339 return -EOPNOTSUPP;
4340
4341 switch (cmd) {
4342 case SIOCGMIIPHY:
1dc32918 4343 data->phy_id = hw->phy_addr;
1da177e4
LT		 4344 break;
4345 case SIOCGMIIREG:
96838a40 4346 if (!capable(CAP_NET_ADMIN))
1da177e4 4347 return -EPERM;
97876fc6 4348 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4349 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4350 &data->val_out)) {
4351 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4352 return -EIO;
97876fc6
MC		 4353 }
4354 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4355 break;
4356 case SIOCSMIIREG:
96838a40 4357 if (!capable(CAP_NET_ADMIN))
1da177e4 4358 return -EPERM;
96838a40 4359 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4360 return -EFAULT;
4361 mii_reg = data->val_in;
97876fc6 4362 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4363 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4364 mii_reg)) {
4365 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4366 return -EIO;
97876fc6 4367 }
f0163ac4 4368 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4369 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4370 switch (data->reg_num) {
4371 case PHY_CTRL:
96838a40 4372 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4373 break;
96838a40 4374 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4375 hw->autoneg = 1;
4376 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4377 } else {
4378 if (mii_reg & 0x40)
4379 spddplx = SPEED_1000;
4380 else if (mii_reg & 0x2000)
4381 spddplx = SPEED_100;
4382 else
4383 spddplx = SPEED_10;
4384 spddplx += (mii_reg & 0x100)
cb764326
JK		 4385 ? DUPLEX_FULL :
4386 DUPLEX_HALF;
1da177e4
LT		 4387 retval = e1000_set_spd_dplx(adapter,
4388 spddplx);
f0163ac4 4389 if (retval)
1da177e4
LT		 4390 return retval;
4391 }
2db10a08
AK		 4392 if (netif_running(adapter->netdev))
4393 e1000_reinit_locked(adapter);
4394 else
1da177e4
LT		 4395 e1000_reset(adapter);
4396 break;
4397 case M88E1000_PHY_SPEC_CTRL:
4398 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4399 if (e1000_phy_reset(hw))
1da177e4
LT		 4400 return -EIO;
4401 break;
4402 }
4403 } else {
4404 switch (data->reg_num) {
4405 case PHY_CTRL:
96838a40 4406 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4407 break;
2db10a08
AK		 4408 if (netif_running(adapter->netdev))
4409 e1000_reinit_locked(adapter);
4410 else
1da177e4
LT		 4411 e1000_reset(adapter);
4412 break;
4413 }
4414 }
4415 break;
4416 default:
4417 return -EOPNOTSUPP;
4418 }
4419 return E1000_SUCCESS;
4420}
4421
64798845 4422void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4423{
4424 struct e1000_adapter *adapter = hw->back;
2648345f 4425 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4426
96838a40 4427 if (ret_val)
2648345f 4428 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4429}
4430
64798845 4431void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4432{
4433 struct e1000_adapter *adapter = hw->back;
4434
4435 pci_clear_mwi(adapter->pdev);
4436}
4437
64798845 4438int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4439{
4440 struct e1000_adapter *adapter = hw->back;
4441 return pcix_get_mmrbc(adapter->pdev);
4442}
4443
64798845 4444void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4445{
4446 struct e1000_adapter *adapter = hw->back;
4447 pcix_set_mmrbc(adapter->pdev, mmrbc);
4448}
4449
64798845 4450s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
caeccb68
JK		 4451{
4452 struct e1000_adapter *adapter = hw->back;
406874a7 4453 u16 cap_offset;
caeccb68
JK		 4454
4455 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4456 if (!cap_offset)
4457 return -E1000_ERR_CONFIG;
4458
4459 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4460
4461 return E1000_SUCCESS;
4462}
4463
64798845 4464void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4465{
4466 outl(value, port);
4467}
4468
64798845
JP		 4469static void e1000_vlan_rx_register(struct net_device *netdev,
4470 struct vlan_group *grp)
1da177e4 4471{
60490fe0 4472 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4473 struct e1000_hw *hw = &adapter->hw;
406874a7 4474 u32 ctrl, rctl;
1da177e4 4475
9150b76a
JB		 4476 if (!test_bit(__E1000_DOWN, &adapter->flags))
4477 e1000_irq_disable(adapter);
1da177e4
LT		 4478 adapter->vlgrp = grp;
4479
96838a40 4480 if (grp) {
1da177e4 4481 /* enable VLAN tag insert/strip */
1dc32918 4482 ctrl = er32(CTRL);
1da177e4 4483 ctrl |= E1000_CTRL_VME;
1dc32918 4484 ew32(CTRL, ctrl);
1da177e4 4485
cd94dd0b 4486 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4487 /* enable VLAN receive filtering */
1dc32918 4488 rctl = er32(RCTL);
90fb5135 4489 rctl &= ~E1000_RCTL_CFIEN;
1dc32918 4490 ew32(RCTL, rctl);
90fb5135 4491 e1000_update_mng_vlan(adapter);
cd94dd0b 4492 }
1da177e4
LT		 4493 } else {
4494 /* disable VLAN tag insert/strip */
1dc32918 4495 ctrl = er32(CTRL);
1da177e4 4496 ctrl &= ~E1000_CTRL_VME;
1dc32918 4497 ew32(CTRL, ctrl);
1da177e4 4498
cd94dd0b 4499 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4500 if (adapter->mng_vlan_id !=
406874a7 4501 (u16)E1000_MNG_VLAN_NONE) {
90fb5135
AK		 4502 e1000_vlan_rx_kill_vid(netdev,
4503 adapter->mng_vlan_id);
4504 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4505 }
cd94dd0b 4506 }
1da177e4
LT		 4507 }
4508
9150b76a
JB		 4509 if (!test_bit(__E1000_DOWN, &adapter->flags))
4510 e1000_irq_enable(adapter);
1da177e4
LT		 4511}
4512
64798845 4513static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4514{
60490fe0 4515 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4516 struct e1000_hw *hw = &adapter->hw;
406874a7 4517 u32 vfta, index;
96838a40 4518
1dc32918 4519 if ((hw->mng_cookie.status &
96838a40
JB		 4520 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4521 (vid == adapter->mng_vlan_id))
2d7edb92 4522 return;
1da177e4
LT		 4523 /* add VID to filter table */
4524 index = (vid >> 5) & 0x7F;
1dc32918 4525 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4526 vfta |= (1 << (vid & 0x1F));
1dc32918 4527 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4528}
4529
64798845 4530static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4531{
60490fe0 4532 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4533 struct e1000_hw *hw = &adapter->hw;
406874a7 4534 u32 vfta, index;
1da177e4 4535
9150b76a
JB		 4536 if (!test_bit(__E1000_DOWN, &adapter->flags))
4537 e1000_irq_disable(adapter);
5c15bdec 4538 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4539 if (!test_bit(__E1000_DOWN, &adapter->flags))
4540 e1000_irq_enable(adapter);
1da177e4 4541
1dc32918 4542 if ((hw->mng_cookie.status &
96838a40 4543 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4544 (vid == adapter->mng_vlan_id)) {
4545 /* release control to f/w */
4546 e1000_release_hw_control(adapter);
2d7edb92 4547 return;
ff147013
JK		 4548 }
4549
1da177e4
LT		 4550 /* remove VID from filter table */
4551 index = (vid >> 5) & 0x7F;
1dc32918 4552 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4553 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4554 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4555}
4556
64798845 4557static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4558{
4559 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4560
96838a40 4561 if (adapter->vlgrp) {
406874a7 4562 u16 vid;
96838a40 4563 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4564 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4565 continue;
4566 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4567 }
4568 }
4569}
4570
64798845 4571int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4572{
1dc32918
JP		 4573 struct e1000_hw *hw = &adapter->hw;
4574
4575 hw->autoneg = 0;
1da177e4 4576
6921368f 4577 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4578 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4579 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4580 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4581 return -EINVAL;
4582 }
4583
96838a40 4584 switch (spddplx) {
1da177e4 4585 case SPEED_10 + DUPLEX_HALF:
1dc32918 4586 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4587 break;
4588 case SPEED_10 + DUPLEX_FULL:
1dc32918 4589 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4590 break;
4591 case SPEED_100 + DUPLEX_HALF:
1dc32918 4592 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4593 break;
4594 case SPEED_100 + DUPLEX_FULL:
1dc32918 4595 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4596 break;
4597 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4598 hw->autoneg = 1;
4599 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4600 break;
4601 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4602 default:
2648345f 4603 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4604 return -EINVAL;
4605 }
4606 return 0;
4607}
4608
64798845 4609static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4610{
4611 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4612 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4613 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4614 u32 ctrl, ctrl_ext, rctl, status;
4615 u32 wufc = adapter->wol;
6fdfef16 4616#ifdef CONFIG_PM
240b1710 4617 int retval = 0;
6fdfef16 4618#endif
1da177e4
LT		 4619
4620 netif_device_detach(netdev);
4621
2db10a08
AK		 4622 if (netif_running(netdev)) {
4623 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4624 e1000_down(adapter);
2db10a08 4625 }
1da177e4 4626
2f82665f 4627#ifdef CONFIG_PM
1d33e9c6 4628 retval = pci_save_state(pdev);
2f82665f
JB		 4629 if (retval)
4630 return retval;
4631#endif
4632
1dc32918 4633 status = er32(STATUS);
96838a40 4634 if (status & E1000_STATUS_LU)
1da177e4
LT		 4635 wufc &= ~E1000_WUFC_LNKC;
4636
96838a40 4637 if (wufc) {
1da177e4 4638 e1000_setup_rctl(adapter);
db0ce50d 4639 e1000_set_rx_mode(netdev);
1da177e4
LT		 4640
4641 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4642 if (wufc & E1000_WUFC_MC) {
1dc32918 4643 rctl = er32(RCTL);
1da177e4 4644 rctl |= E1000_RCTL_MPE;
1dc32918 4645 ew32(RCTL, rctl);
1da177e4
LT		 4646 }
4647
1dc32918
JP		 4648 if (hw->mac_type >= e1000_82540) {
4649 ctrl = er32(CTRL);
1da177e4
LT		 4650 /* advertise wake from D3Cold */
4651 #define E1000_CTRL_ADVD3WUC 0x00100000
4652 /* phy power management enable */
4653 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4654 ctrl |= E1000_CTRL_ADVD3WUC |
4655 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4656 ew32(CTRL, ctrl);
1da177e4
LT		 4657 }
4658
1dc32918
JP		 4659 if (hw->media_type == e1000_media_type_fiber ||
4660 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4661 /* keep the laser running in D3 */
1dc32918 4662 ctrl_ext = er32(CTRL_EXT);
1da177e4 4663 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4664 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4665 }
4666
2d7edb92 4667 /* Allow time for pending master requests to run */
1dc32918 4668 e1000_disable_pciex_master(hw);
2d7edb92 4669
1dc32918
JP		 4670 ew32(WUC, E1000_WUC_PME_EN);
4671 ew32(WUFC, wufc);
d0e027db
AK		 4672 pci_enable_wake(pdev, PCI_D3hot, 1);
4673 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4 4674 } else {
1dc32918
JP		 4675 ew32(WUC, 0);
4676 ew32(WUFC, 0);
d0e027db
AK		 4677 pci_enable_wake(pdev, PCI_D3hot, 0);
4678 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4679 }
4680
0fccd0e9
JG		 4681 e1000_release_manageability(adapter);
4682
4683 /* make sure adapter isn't asleep if manageability is enabled */
4684 if (adapter->en_mng_pt) {
4685 pci_enable_wake(pdev, PCI_D3hot, 1);
4686 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4687 }
4688
1dc32918
JP		 4689 if (hw->phy_type == e1000_phy_igp_3)
4690 e1000_phy_powerdown_workaround(hw);
cd94dd0b 4691
edd106fc
AK		 4692 if (netif_running(netdev))
4693 e1000_free_irq(adapter);
4694
b55ccb35
JK		 4695 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4696 * would have already happened in close and is redundant. */
4697 e1000_release_hw_control(adapter);
2d7edb92 4698
1da177e4 4699 pci_disable_device(pdev);
240b1710 4700
d0e027db 4701 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4702
4703 return 0;
4704}
4705
2f82665f 4706#ifdef CONFIG_PM
64798845 4707static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4708{
4709 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4710 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4711 struct e1000_hw *hw = &adapter->hw;
406874a7 4712 u32 err;
1da177e4 4713
d0e027db 4714 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4715 pci_restore_state(pdev);
81250297
TI		 4716
4717 if (adapter->need_ioport)
4718 err = pci_enable_device(pdev);
4719 else
4720 err = pci_enable_device_mem(pdev);
c7be73bc 4721 if (err) {
3d1dd8cb
AK		 4722 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4723 return err;
4724 }
a4cb847d 4725 pci_set_master(pdev);
1da177e4 4726
d0e027db
AK		 4727 pci_enable_wake(pdev, PCI_D3hot, 0);
4728 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4729
c7be73bc
JP		 4730 if (netif_running(netdev)) {
4731 err = e1000_request_irq(adapter);
4732 if (err)
4733 return err;
4734 }
edd106fc
AK		 4735
4736 e1000_power_up_phy(adapter);
1da177e4 4737 e1000_reset(adapter);
1dc32918 4738 ew32(WUS, ~0);
1da177e4 4739
0fccd0e9
JG		 4740 e1000_init_manageability(adapter);
4741
96838a40 4742 if (netif_running(netdev))
1da177e4
LT		 4743 e1000_up(adapter);
4744
4745 netif_device_attach(netdev);
4746
b55ccb35
JK		 4747 /* If the controller is 82573 and f/w is AMT, do not set
4748 * DRV_LOAD until the interface is up. For all other cases,
4749 * let the f/w know that the h/w is now under the control
4750 * of the driver. */
1dc32918
JP		 4751 if (hw->mac_type != e1000_82573 ||
4752 !e1000_check_mng_mode(hw))
b55ccb35 4753 e1000_get_hw_control(adapter);
2d7edb92 4754
1da177e4
LT		 4755 return 0;
4756}
4757#endif
c653e635
AK		 4758
4759static void e1000_shutdown(struct pci_dev *pdev)
4760{
4761 e1000_suspend(pdev, PMSG_SUSPEND);
4762}
4763
1da177e4
LT		 4764#ifdef CONFIG_NET_POLL_CONTROLLER
4765/*
4766 * Polling 'interrupt' - used by things like netconsole to send skbs
4767 * without having to re-enable interrupts. It's not called while
4768 * the interrupt routine is executing.
4769 */
64798845 4770static void e1000_netpoll(struct net_device *netdev)
1da177e4 4771{
60490fe0 4772 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4773
1da177e4 4774 disable_irq(adapter->pdev->irq);
7d12e780 4775 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4776 enable_irq(adapter->pdev->irq);
4777}
4778#endif
4779
9026729b
AK		 4780/**
4781 * e1000_io_error_detected - called when PCI error is detected
4782 * @pdev: Pointer to PCI device
4783 * @state: The current pci conneection state
4784 *
4785 * This function is called after a PCI bus error affecting
4786 * this device has been detected.
4787 */
64798845
JP		 4788static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4789 pci_channel_state_t state)
9026729b
AK		 4790{
4791 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4792 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4793
4794 netif_device_detach(netdev);
4795
4796 if (netif_running(netdev))
4797 e1000_down(adapter);
72e8d6bb 4798 pci_disable_device(pdev);
9026729b
AK		 4799
4800 /* Request a slot slot reset. */
4801 return PCI_ERS_RESULT_NEED_RESET;
4802}
4803
4804/**
4805 * e1000_io_slot_reset - called after the pci bus has been reset.
4806 * @pdev: Pointer to PCI device
4807 *
4808 * Restart the card from scratch, as if from a cold-boot. Implementation
4809 * resembles the first-half of the e1000_resume routine.
4810 */
4811static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4812{
4813 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4814 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4815 struct e1000_hw *hw = &adapter->hw;
81250297 4816 int err;
9026729b 4817
81250297
TI		 4818 if (adapter->need_ioport)
4819 err = pci_enable_device(pdev);
4820 else
4821 err = pci_enable_device_mem(pdev);
4822 if (err) {
9026729b
AK		 4823 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4824 return PCI_ERS_RESULT_DISCONNECT;
4825 }
4826 pci_set_master(pdev);
4827
dbf38c94
LV		 4828 pci_enable_wake(pdev, PCI_D3hot, 0);
4829 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4830
9026729b 4831 e1000_reset(adapter);
1dc32918 4832 ew32(WUS, ~0);
9026729b
AK		 4833
4834 return PCI_ERS_RESULT_RECOVERED;
4835}
4836
4837/**
4838 * e1000_io_resume - called when traffic can start flowing again.
4839 * @pdev: Pointer to PCI device
4840 *
4841 * This callback is called when the error recovery driver tells us that
4842 * its OK to resume normal operation. Implementation resembles the
4843 * second-half of the e1000_resume routine.
4844 */
4845static void e1000_io_resume(struct pci_dev *pdev)
4846{
4847 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4848 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4849 struct e1000_hw *hw = &adapter->hw;
0fccd0e9
JG		 4850
4851 e1000_init_manageability(adapter);
9026729b
AK		 4852
4853 if (netif_running(netdev)) {
4854 if (e1000_up(adapter)) {
4855 printk("e1000: can't bring device back up after reset\n");
4856 return;
4857 }
4858 }
4859
4860 netif_device_attach(netdev);
4861
0fccd0e9
JG		 4862 /* If the controller is 82573 and f/w is AMT, do not set
4863 * DRV_LOAD until the interface is up. For all other cases,
4864 * let the f/w know that the h/w is now under the control
4865 * of the driver. */
1dc32918
JP		 4866 if (hw->mac_type != e1000_82573 ||
4867 !e1000_check_mng_mode(hw))
0fccd0e9 4868 e1000_get_hw_control(adapter);
9026729b 4869
9026729b
AK		 4870}
4871
1da177e4 4872/* e1000_main.c */
Linux kernel - Deliverables
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