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Revert Backoff [v3]: Calculate TCP's connection close threshold as a time value.
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
15b2bee2 34#define DRV_VERSION "7.3.21-k3-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4 127static void e1000_82547_tx_fifo_stall(unsigned long data);
3b29a56d
SH		 128static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
129 struct net_device *netdev);
1da177e4
LT		 130static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
131static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
132static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 133static irqreturn_t e1000_intr(int irq, void *data);
9ac98284 134static irqreturn_t e1000_intr_msi(int irq, void *data);
c3033b01
JP		 135static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
136 struct e1000_tx_ring *tx_ring);
bea3348e 137static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 138static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
139 struct e1000_rx_ring *rx_ring,
140 int *work_done, int work_to_do);
edbbb3ca
JB		 141static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
142 struct e1000_rx_ring *rx_ring,
143 int *work_done, int work_to_do);
581d708e 144static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 145 struct e1000_rx_ring *rx_ring,
72d64a43 146 int cleaned_count);
edbbb3ca
JB		 147static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
148 struct e1000_rx_ring *rx_ring,
149 int cleaned_count);
1da177e4
LT		 150static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
151static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
152 int cmd);
1da177e4
LT		 153static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
154static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
155static void e1000_tx_timeout(struct net_device *dev);
65f27f38 156static void e1000_reset_task(struct work_struct *work);
1da177e4 157static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 158static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
159 struct sk_buff *skb);
1da177e4
LT		 160
161static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 162static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
163static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 164static void e1000_restore_vlan(struct e1000_adapter *adapter);
165
6fdfef16 166#ifdef CONFIG_PM
b43fcd7d 167static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 168static int e1000_resume(struct pci_dev *pdev);
169#endif
c653e635 170static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 171
172#ifdef CONFIG_NET_POLL_CONTROLLER
173/* for netdump / net console */
174static void e1000_netpoll (struct net_device *netdev);
175#endif
176
1f753861
JB		 177#define COPYBREAK_DEFAULT 256
178static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
179module_param(copybreak, uint, 0644);
180MODULE_PARM_DESC(copybreak,
181 "Maximum size of packet that is copied to a new buffer on receive");
182
9026729b
AK		 183static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
184 pci_channel_state_t state);
185static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
186static void e1000_io_resume(struct pci_dev *pdev);
187
188static struct pci_error_handlers e1000_err_handler = {
189 .error_detected = e1000_io_error_detected,
190 .slot_reset = e1000_io_slot_reset,
191 .resume = e1000_io_resume,
192};
24025e4e 193
1da177e4
LT		 194static struct pci_driver e1000_driver = {
195 .name = e1000_driver_name,
196 .id_table = e1000_pci_tbl,
197 .probe = e1000_probe,
198 .remove = __devexit_p(e1000_remove),
c4e24f01 199#ifdef CONFIG_PM
1da177e4 200 /* Power Managment Hooks */
1da177e4 201 .suspend = e1000_suspend,
c653e635 202 .resume = e1000_resume,
1da177e4 203#endif
9026729b
AK		 204 .shutdown = e1000_shutdown,
205 .err_handler = &e1000_err_handler
1da177e4
LT		 206};
207
208MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
209MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
210MODULE_LICENSE("GPL");
211MODULE_VERSION(DRV_VERSION);
212
213static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
214module_param(debug, int, 0);
215MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
216
217/**
218 * e1000_init_module - Driver Registration Routine
219 *
220 * e1000_init_module is the first routine called when the driver is
221 * loaded. All it does is register with the PCI subsystem.
222 **/
223
64798845 224static int __init e1000_init_module(void)
1da177e4
LT		 225{
226 int ret;
227 printk(KERN_INFO "%s - version %s\n",
228 e1000_driver_string, e1000_driver_version);
229
230 printk(KERN_INFO "%s\n", e1000_copyright);
231
29917620 232 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 233 if (copybreak != COPYBREAK_DEFAULT) {
234 if (copybreak == 0)
235 printk(KERN_INFO "e1000: copybreak disabled\n");
236 else
237 printk(KERN_INFO "e1000: copybreak enabled for "
238 "packets <= %u bytes\n", copybreak);
239 }
1da177e4
LT		 240 return ret;
241}
242
243module_init(e1000_init_module);
244
245/**
246 * e1000_exit_module - Driver Exit Cleanup Routine
247 *
248 * e1000_exit_module is called just before the driver is removed
249 * from memory.
250 **/
251
64798845 252static void __exit e1000_exit_module(void)
1da177e4 253{
1da177e4
LT		 254 pci_unregister_driver(&e1000_driver);
255}
256
257module_exit(e1000_exit_module);
258
2db10a08
AK		 259static int e1000_request_irq(struct e1000_adapter *adapter)
260{
1dc32918 261 struct e1000_hw *hw = &adapter->hw;
2db10a08 262 struct net_device *netdev = adapter->netdev;
3e18826c 263 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 264 int irq_flags = IRQF_SHARED;
265 int err;
2db10a08 266
1dc32918 267 if (hw->mac_type >= e1000_82571) {
e94bd23f
AK		 268 adapter->have_msi = !pci_enable_msi(adapter->pdev);
269 if (adapter->have_msi) {
3e18826c 270 handler = e1000_intr_msi;
e94bd23f 271 irq_flags = 0;
2db10a08
AK		 272 }
273 }
e94bd23f
AK		 274
275 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
276 netdev);
277 if (err) {
278 if (adapter->have_msi)
279 pci_disable_msi(adapter->pdev);
2db10a08
AK		 280 DPRINTK(PROBE, ERR,
281 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 282 }
2db10a08
AK		 283
284 return err;
285}
286
287static void e1000_free_irq(struct e1000_adapter *adapter)
288{
289 struct net_device *netdev = adapter->netdev;
290
291 free_irq(adapter->pdev->irq, netdev);
292
2db10a08
AK		 293 if (adapter->have_msi)
294 pci_disable_msi(adapter->pdev);
2db10a08
AK		 295}
296
1da177e4
LT		 297/**
298 * e1000_irq_disable - Mask off interrupt generation on the NIC
299 * @adapter: board private structure
300 **/
301
64798845 302static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 303{
1dc32918
JP		 304 struct e1000_hw *hw = &adapter->hw;
305
306 ew32(IMC, ~0);
307 E1000_WRITE_FLUSH();
1da177e4
LT		 308 synchronize_irq(adapter->pdev->irq);
309}
310
311/**
312 * e1000_irq_enable - Enable default interrupt generation settings
313 * @adapter: board private structure
314 **/
315
64798845 316static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 317{
1dc32918
JP		 318 struct e1000_hw *hw = &adapter->hw;
319
320 ew32(IMS, IMS_ENABLE_MASK);
321 E1000_WRITE_FLUSH();
1da177e4 322}
3ad2cc67 323
64798845 324static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 325{
1dc32918 326 struct e1000_hw *hw = &adapter->hw;
2d7edb92 327 struct net_device *netdev = adapter->netdev;
1dc32918 328 u16 vid = hw->mng_cookie.vlan_id;
406874a7 329 u16 old_vid = adapter->mng_vlan_id;
96838a40 330 if (adapter->vlgrp) {
5c15bdec 331 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 332 if (hw->mng_cookie.status &
2d7edb92
MC		 333 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
334 e1000_vlan_rx_add_vid(netdev, vid);
335 adapter->mng_vlan_id = vid;
336 } else
337 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 338
406874a7 339 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 340 (vid != old_vid) &&
5c15bdec 341 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 342 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 343 } else
344 adapter->mng_vlan_id = vid;
2d7edb92
MC		 345 }
346}
b55ccb35
JK		 347
348/**
349 * e1000_release_hw_control - release control of the h/w to f/w
350 * @adapter: address of board private structure
351 *
352 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
353 * For ASF and Pass Through versions of f/w this means that the
354 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 355 * of the f/w this means that the network i/f is closed.
76c224bc 356 *
b55ccb35
JK		 357 **/
358
64798845 359static void e1000_release_hw_control(struct e1000_adapter *adapter)
b55ccb35 360{
406874a7
JP		 361 u32 ctrl_ext;
362 u32 swsm;
1dc32918 363 struct e1000_hw *hw = &adapter->hw;
b55ccb35
JK		 364
365 /* Let firmware taken over control of h/w */
1dc32918 366 switch (hw->mac_type) {
b55ccb35 367 case e1000_82573:
1dc32918
JP		 368 swsm = er32(SWSM);
369 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
31d76442
BA		 370 break;
371 case e1000_82571:
372 case e1000_82572:
373 case e1000_80003es2lan:
cd94dd0b 374 case e1000_ich8lan:
1dc32918
JP		 375 ctrl_ext = er32(CTRL_EXT);
376 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 377 break;
b55ccb35
JK		 378 default:
379 break;
380 }
381}
382
383/**
384 * e1000_get_hw_control - get control of the h/w from f/w
385 * @adapter: address of board private structure
386 *
387 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 388 * For ASF and Pass Through versions of f/w this means that
389 * the driver is loaded. For AMT version (only with 82573)
90fb5135 390 * of the f/w this means that the network i/f is open.
76c224bc 391 *
b55ccb35
JK		 392 **/
393
64798845 394static void e1000_get_hw_control(struct e1000_adapter *adapter)
b55ccb35 395{
406874a7
JP		 396 u32 ctrl_ext;
397 u32 swsm;
1dc32918 398 struct e1000_hw *hw = &adapter->hw;
90fb5135 399
b55ccb35 400 /* Let firmware know the driver has taken over */
1dc32918 401 switch (hw->mac_type) {
b55ccb35 402 case e1000_82573:
1dc32918
JP		 403 swsm = er32(SWSM);
404 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
b55ccb35 405 break;
31d76442
BA		 406 case e1000_82571:
407 case e1000_82572:
408 case e1000_80003es2lan:
cd94dd0b 409 case e1000_ich8lan:
1dc32918
JP		 410 ctrl_ext = er32(CTRL_EXT);
411 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 412 break;
b55ccb35
JK		 413 default:
414 break;
415 }
416}
417
64798845 418static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 419{
1dc32918
JP		 420 struct e1000_hw *hw = &adapter->hw;
421
0fccd0e9 422 if (adapter->en_mng_pt) {
1dc32918 423 u32 manc = er32(MANC);
0fccd0e9
JG		 424
425 /* disable hardware interception of ARP */
426 manc &= ~(E1000_MANC_ARP_EN);
427
428 /* enable receiving management packets to the host */
429 /* this will probably generate destination unreachable messages
430 * from the host OS, but the packets will be handled on SMBUS */
1dc32918
JP		 431 if (hw->has_manc2h) {
432 u32 manc2h = er32(MANC2H);
0fccd0e9
JG		 433
434 manc |= E1000_MANC_EN_MNG2HOST;
435#define E1000_MNG2HOST_PORT_623 (1 << 5)
436#define E1000_MNG2HOST_PORT_664 (1 << 6)
437 manc2h |= E1000_MNG2HOST_PORT_623;
438 manc2h |= E1000_MNG2HOST_PORT_664;
1dc32918 439 ew32(MANC2H, manc2h);
0fccd0e9
JG		 440 }
441
1dc32918 442 ew32(MANC, manc);
0fccd0e9
JG		 443 }
444}
445
64798845 446static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 447{
1dc32918
JP		 448 struct e1000_hw *hw = &adapter->hw;
449
0fccd0e9 450 if (adapter->en_mng_pt) {
1dc32918 451 u32 manc = er32(MANC);
0fccd0e9
JG		 452
453 /* re-enable hardware interception of ARP */
454 manc |= E1000_MANC_ARP_EN;
455
1dc32918 456 if (hw->has_manc2h)
0fccd0e9
JG		 457 manc &= ~E1000_MANC_EN_MNG2HOST;
458
459 /* don't explicitly have to mess with MANC2H since
460 * MANC has an enable disable that gates MANC2H */
461
1dc32918 462 ew32(MANC, manc);
0fccd0e9
JG		 463 }
464}
465
e0aac5a2
AK		 466/**
467 * e1000_configure - configure the hardware for RX and TX
468 * @adapter = private board structure
469 **/
470static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 471{
472 struct net_device *netdev = adapter->netdev;
2db10a08 473 int i;
1da177e4 474
db0ce50d 475 e1000_set_rx_mode(netdev);
1da177e4
LT		 476
477 e1000_restore_vlan(adapter);
0fccd0e9 478 e1000_init_manageability(adapter);
1da177e4
LT		 479
480 e1000_configure_tx(adapter);
481 e1000_setup_rctl(adapter);
482 e1000_configure_rx(adapter);
72d64a43
JK		 483 /* call E1000_DESC_UNUSED which always leaves
484 * at least 1 descriptor unused to make sure
485 * next_to_use != next_to_clean */
f56799ea 486 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 487 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 488 adapter->alloc_rx_buf(adapter, ring,
489 E1000_DESC_UNUSED(ring));
f56799ea 490 }
1da177e4 491
7bfa4816 492 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 493}
494
495int e1000_up(struct e1000_adapter *adapter)
496{
1dc32918
JP		 497 struct e1000_hw *hw = &adapter->hw;
498
e0aac5a2
AK		 499 /* hardware has been reset, we need to reload some things */
500 e1000_configure(adapter);
501
502 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 503
bea3348e 504 napi_enable(&adapter->napi);
c3570acb 505
5de55624
MC		 506 e1000_irq_enable(adapter);
507
4cb9be7a
JB		 508 netif_wake_queue(adapter->netdev);
509
79f3d399 510 /* fire a link change interrupt to start the watchdog */
1dc32918 511 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 512 return 0;
513}
514
79f05bf0
AK		 515/**
516 * e1000_power_up_phy - restore link in case the phy was powered down
517 * @adapter: address of board private structure
518 *
519 * The phy may be powered down to save power and turn off link when the
520 * driver is unloaded and wake on lan is not enabled (among others)
521 * *** this routine MUST be followed by a call to e1000_reset ***
522 *
523 **/
524
d658266e 525void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 526{
1dc32918 527 struct e1000_hw *hw = &adapter->hw;
406874a7 528 u16 mii_reg = 0;
79f05bf0
AK		 529
530 /* Just clear the power down bit to wake the phy back up */
1dc32918 531 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 532 /* according to the manual, the phy will retain its
533 * settings across a power-down/up cycle */
1dc32918 534 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 535 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 536 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 537 }
538}
539
540static void e1000_power_down_phy(struct e1000_adapter *adapter)
541{
1dc32918
JP		 542 struct e1000_hw *hw = &adapter->hw;
543
61c2505f 544 /* Power down the PHY so no link is implied when interface is down *
c3033b01 545 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 546 * (a) WoL is enabled
547 * (b) AMT is active
548 * (c) SoL/IDER session is active */
1dc32918
JP		 549 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
550 hw->media_type == e1000_media_type_copper) {
406874a7 551 u16 mii_reg = 0;
61c2505f 552
1dc32918 553 switch (hw->mac_type) {
61c2505f
BA		 554 case e1000_82540:
555 case e1000_82545:
556 case e1000_82545_rev_3:
557 case e1000_82546:
558 case e1000_82546_rev_3:
559 case e1000_82541:
560 case e1000_82541_rev_2:
561 case e1000_82547:
562 case e1000_82547_rev_2:
1dc32918 563 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 564 goto out;
565 break;
566 case e1000_82571:
567 case e1000_82572:
568 case e1000_82573:
569 case e1000_80003es2lan:
570 case e1000_ich8lan:
1dc32918
JP		 571 if (e1000_check_mng_mode(hw) ||
572 e1000_check_phy_reset_block(hw))
61c2505f
BA		 573 goto out;
574 break;
575 default:
576 goto out;
577 }
1dc32918 578 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 579 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 580 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 581 mdelay(1);
582 }
61c2505f
BA		 583out:
584 return;
79f05bf0
AK		 585}
586
64798845 587void e1000_down(struct e1000_adapter *adapter)
1da177e4 588{
a6c42322 589 struct e1000_hw *hw = &adapter->hw;
1da177e4 590 struct net_device *netdev = adapter->netdev;
a6c42322 591 u32 rctl, tctl;
1da177e4 592
1314bbf3
AK		 593 /* signal that we're down so the interrupt handler does not
594 * reschedule our watchdog timer */
595 set_bit(__E1000_DOWN, &adapter->flags);
596
a6c42322
JB		 597 /* disable receives in the hardware */
598 rctl = er32(RCTL);
599 ew32(RCTL, rctl & ~E1000_RCTL_EN);
600 /* flush and sleep below */
601
602 /* can be netif_tx_disable when NETIF_F_LLTX is removed */
603 netif_stop_queue(netdev);
604
605 /* disable transmits in the hardware */
606 tctl = er32(TCTL);
607 tctl &= ~E1000_TCTL_EN;
608 ew32(TCTL, tctl);
609 /* flush both disables and wait for them to finish */
610 E1000_WRITE_FLUSH();
611 msleep(10);
612
bea3348e 613 napi_disable(&adapter->napi);
c3570acb 614
1da177e4 615 e1000_irq_disable(adapter);
c1605eb3 616
1da177e4
LT		 617 del_timer_sync(&adapter->tx_fifo_stall_timer);
618 del_timer_sync(&adapter->watchdog_timer);
619 del_timer_sync(&adapter->phy_info_timer);
620
7bfa4816 621 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 622 adapter->link_speed = 0;
623 adapter->link_duplex = 0;
624 netif_carrier_off(netdev);
1da177e4
LT		 625
626 e1000_reset(adapter);
581d708e
MC		 627 e1000_clean_all_tx_rings(adapter);
628 e1000_clean_all_rx_rings(adapter);
1da177e4 629}
1da177e4 630
64798845 631void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 632{
633 WARN_ON(in_interrupt());
634 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
635 msleep(1);
636 e1000_down(adapter);
637 e1000_up(adapter);
638 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 639}
640
64798845 641void e1000_reset(struct e1000_adapter *adapter)
1da177e4 642{
1dc32918 643 struct e1000_hw *hw = &adapter->hw;
406874a7 644 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 645 bool legacy_pba_adjust = false;
b7cb8c2c 646 u16 hwm;
1da177e4
LT		 647
648 /* Repartition Pba for greater than 9k mtu
649 * To take effect CTRL.RST is required.
650 */
651
1dc32918 652 switch (hw->mac_type) {
018ea44e
BA		 653 case e1000_82542_rev2_0:
654 case e1000_82542_rev2_1:
655 case e1000_82543:
656 case e1000_82544:
657 case e1000_82540:
658 case e1000_82541:
659 case e1000_82541_rev_2:
c3033b01 660 legacy_pba_adjust = true;
018ea44e
BA		 661 pba = E1000_PBA_48K;
662 break;
663 case e1000_82545:
664 case e1000_82545_rev_3:
665 case e1000_82546:
666 case e1000_82546_rev_3:
667 pba = E1000_PBA_48K;
668 break;
2d7edb92 669 case e1000_82547:
0e6ef3e0 670 case e1000_82547_rev_2:
c3033b01 671 legacy_pba_adjust = true;
2d7edb92
MC		 672 pba = E1000_PBA_30K;
673 break;
868d5309
MC		 674 case e1000_82571:
675 case e1000_82572:
6418ecc6 676 case e1000_80003es2lan:
868d5309
MC		 677 pba = E1000_PBA_38K;
678 break;
2d7edb92 679 case e1000_82573:
018ea44e 680 pba = E1000_PBA_20K;
2d7edb92 681 break;
cd94dd0b
AK		 682 case e1000_ich8lan:
683 pba = E1000_PBA_8K;
018ea44e
BA		 684 case e1000_undefined:
685 case e1000_num_macs:
2d7edb92
MC		 686 break;
687 }
688
c3033b01 689 if (legacy_pba_adjust) {
b7cb8c2c 690 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 691 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 692
1dc32918 693 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 694 adapter->tx_fifo_head = 0;
695 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
696 adapter->tx_fifo_size =
697 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
698 atomic_set(&adapter->tx_fifo_stall, 0);
699 }
b7cb8c2c 700 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 701 /* adjust PBA for jumbo frames */
1dc32918 702 ew32(PBA, pba);
018ea44e
BA		 703
704 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 705 * large enough to accommodate two full transmit packets,
018ea44e 706 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 707 * the Rx FIFO should be large enough to accommodate at least
018ea44e
BA		 708 * one full receive packet and is similarly rounded up and
709 * expressed in KB. */
1dc32918 710 pba = er32(PBA);
018ea44e
BA		 711 /* upper 16 bits has Tx packet buffer allocation size in KB */
712 tx_space = pba >> 16;
713 /* lower 16 bits has Rx packet buffer allocation size in KB */
714 pba &= 0xffff;
b7cb8c2c
JB		 715 /*
716 * the tx fifo also stores 16 bytes of information about the tx
717 * but don't include ethernet FCS because hardware appends it
718 */
719 min_tx_space = (hw->max_frame_size +
720 sizeof(struct e1000_tx_desc) -
721 ETH_FCS_LEN) * 2;
9099cfb9 722 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 723 min_tx_space >>= 10;
b7cb8c2c
JB		 724 /* software strips receive CRC, so leave room for it */
725 min_rx_space = hw->max_frame_size;
9099cfb9 726 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 727 min_rx_space >>= 10;
728
729 /* If current Tx allocation is less than the min Tx FIFO size,
730 * and the min Tx FIFO size is less than the current Rx FIFO
731 * allocation, take space away from current Rx allocation */
732 if (tx_space < min_tx_space &&
733 ((min_tx_space - tx_space) < pba)) {
734 pba = pba - (min_tx_space - tx_space);
735
736 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 737 switch (hw->mac_type) {
018ea44e
BA		 738 case e1000_82545 ... e1000_82546_rev_3:
739 pba &= ~(E1000_PBA_8K - 1);
740 break;
741 default:
742 break;
743 }
744
745 /* if short on rx space, rx wins and must trump tx
746 * adjustment or use Early Receive if available */
747 if (pba < min_rx_space) {
1dc32918 748 switch (hw->mac_type) {
018ea44e
BA		 749 case e1000_82573:
750 /* ERT enabled in e1000_configure_rx */
751 break;
752 default:
753 pba = min_rx_space;
754 break;
755 }
756 }
757 }
1da177e4 758 }
2d7edb92 759
1dc32918 760 ew32(PBA, pba);
1da177e4 761
b7cb8c2c
JB		 762 /*
763 * flow control settings:
764 * The high water mark must be low enough to fit one full frame
765 * (or the size used for early receive) above it in the Rx FIFO.
766 * Set it to the lower of:
767 * - 90% of the Rx FIFO size, and
768 * - the full Rx FIFO size minus the early receive size (for parts
769 * with ERT support assuming ERT set to E1000_ERT_2048), or
770 * - the full Rx FIFO size minus one full frame
771 */
772 hwm = min(((pba << 10) * 9 / 10),
773 ((pba << 10) - hw->max_frame_size));
774
775 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
776 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 777 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 778 hw->fc_send_xon = 1;
779 hw->fc = hw->original_fc;
1da177e4 780
2d7edb92 781 /* Allow time for pending master requests to run */
1dc32918
JP		 782 e1000_reset_hw(hw);
783 if (hw->mac_type >= e1000_82544)
784 ew32(WUC, 0);
09ae3e88 785
1dc32918 786 if (e1000_init_hw(hw))
1da177e4 787 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 788 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 789
790 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918
JP		 791 if (hw->mac_type >= e1000_82544 &&
792 hw->mac_type <= e1000_82547_rev_2 &&
793 hw->autoneg == 1 &&
794 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
795 u32 ctrl = er32(CTRL);
3d5460a0
JB		 796 /* clear phy power management bit if we are in gig only mode,
797 * which if enabled will attempt negotiation to 100Mb, which
798 * can cause a loss of link at power off or driver unload */
799 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 800 ew32(CTRL, ctrl);
3d5460a0
JB		 801 }
802
1da177e4 803 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 804 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 805
1dc32918
JP		 806 e1000_reset_adaptive(hw);
807 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202
AK		 808
809 if (!adapter->smart_power_down &&
1dc32918
JP		 810 (hw->mac_type == e1000_82571 ||
811 hw->mac_type == e1000_82572)) {
406874a7 812 u16 phy_data = 0;
9a53a202
AK		 813 /* speed up time to link by disabling smart power down, ignore
814 * the return value of this function because there is nothing
815 * different we would do if it failed */
1dc32918 816 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 817 &phy_data);
818 phy_data &= ~IGP02E1000_PM_SPD;
1dc32918 819 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 820 phy_data);
821 }
822
0fccd0e9 823 e1000_release_manageability(adapter);
1da177e4
LT		 824}
825
67b3c27c
AK		 826/**
827 * Dump the eeprom for users having checksum issues
828 **/
b4ea895d 829static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 830{
831 struct net_device *netdev = adapter->netdev;
832 struct ethtool_eeprom eeprom;
833 const struct ethtool_ops *ops = netdev->ethtool_ops;
834 u8 *data;
835 int i;
836 u16 csum_old, csum_new = 0;
837
838 eeprom.len = ops->get_eeprom_len(netdev);
839 eeprom.offset = 0;
840
841 data = kmalloc(eeprom.len, GFP_KERNEL);
842 if (!data) {
843 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
844 " data\n");
845 return;
846 }
847
848 ops->get_eeprom(netdev, &eeprom, data);
849
850 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
851 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
852 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
853 csum_new += data[i] + (data[i + 1] << 8);
854 csum_new = EEPROM_SUM - csum_new;
855
856 printk(KERN_ERR "/*********************/\n");
857 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
858 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
859
860 printk(KERN_ERR "Offset Values\n");
861 printk(KERN_ERR "======== ======\n");
862 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
863
864 printk(KERN_ERR "Include this output when contacting your support "
865 "provider.\n");
866 printk(KERN_ERR "This is not a software error! Something bad "
867 "happened to your hardware or\n");
868 printk(KERN_ERR "EEPROM image. Ignoring this "
869 "problem could result in further problems,\n");
870 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
871 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
872 "which is invalid\n");
873 printk(KERN_ERR "and requires you to set the proper MAC "
874 "address manually before continuing\n");
875 printk(KERN_ERR "to enable this network device.\n");
876 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
877 "to your hardware vendor\n");
63cd31f6 878 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 879 printk(KERN_ERR "/*********************/\n");
880
881 kfree(data);
882}
883
81250297
TI		 884/**
885 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
886 * @pdev: PCI device information struct
887 *
888 * Return true if an adapter needs ioport resources
889 **/
890static int e1000_is_need_ioport(struct pci_dev *pdev)
891{
892 switch (pdev->device) {
893 case E1000_DEV_ID_82540EM:
894 case E1000_DEV_ID_82540EM_LOM:
895 case E1000_DEV_ID_82540EP:
896 case E1000_DEV_ID_82540EP_LOM:
897 case E1000_DEV_ID_82540EP_LP:
898 case E1000_DEV_ID_82541EI:
899 case E1000_DEV_ID_82541EI_MOBILE:
900 case E1000_DEV_ID_82541ER:
901 case E1000_DEV_ID_82541ER_LOM:
902 case E1000_DEV_ID_82541GI:
903 case E1000_DEV_ID_82541GI_LF:
904 case E1000_DEV_ID_82541GI_MOBILE:
905 case E1000_DEV_ID_82544EI_COPPER:
906 case E1000_DEV_ID_82544EI_FIBER:
907 case E1000_DEV_ID_82544GC_COPPER:
908 case E1000_DEV_ID_82544GC_LOM:
909 case E1000_DEV_ID_82545EM_COPPER:
910 case E1000_DEV_ID_82545EM_FIBER:
911 case E1000_DEV_ID_82546EB_COPPER:
912 case E1000_DEV_ID_82546EB_FIBER:
913 case E1000_DEV_ID_82546EB_QUAD_COPPER:
914 return true;
915 default:
916 return false;
917 }
918}
919
0e7614bc
SH		 920static const struct net_device_ops e1000_netdev_ops = {
921 .ndo_open = e1000_open,
922 .ndo_stop = e1000_close,
00829823 923 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 924 .ndo_get_stats = e1000_get_stats,
925 .ndo_set_rx_mode = e1000_set_rx_mode,
926 .ndo_set_mac_address = e1000_set_mac,
927 .ndo_tx_timeout = e1000_tx_timeout,
928 .ndo_change_mtu = e1000_change_mtu,
929 .ndo_do_ioctl = e1000_ioctl,
930 .ndo_validate_addr = eth_validate_addr,
931
932 .ndo_vlan_rx_register = e1000_vlan_rx_register,
933 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
934 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
935#ifdef CONFIG_NET_POLL_CONTROLLER
936 .ndo_poll_controller = e1000_netpoll,
937#endif
938};
939
1da177e4
LT		 940/**
941 * e1000_probe - Device Initialization Routine
942 * @pdev: PCI device information struct
943 * @ent: entry in e1000_pci_tbl
944 *
945 * Returns 0 on success, negative on failure
946 *
947 * e1000_probe initializes an adapter identified by a pci_dev structure.
948 * The OS initialization, configuring of the adapter private structure,
949 * and a hardware reset occur.
950 **/
1dc32918
JP		 951static int __devinit e1000_probe(struct pci_dev *pdev,
952 const struct pci_device_id *ent)
1da177e4
LT		 953{
954 struct net_device *netdev;
955 struct e1000_adapter *adapter;
1dc32918 956 struct e1000_hw *hw;
2d7edb92 957
1da177e4 958 static int cards_found = 0;
120cd576 959 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 960 int i, err, pci_using_dac;
406874a7
JP		 961 u16 eeprom_data = 0;
962 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 963 int bars, need_ioport;
0795af57 964
81250297
TI		 965 /* do not allocate ioport bars when not needed */
966 need_ioport = e1000_is_need_ioport(pdev);
967 if (need_ioport) {
968 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
969 err = pci_enable_device(pdev);
970 } else {
971 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 972 err = pci_enable_device_mem(pdev);
81250297 973 }
c7be73bc 974 if (err)
1da177e4
LT		 975 return err;
976
6a35528a
YH		 977 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
978 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1da177e4
LT		 979 pci_using_dac = 1;
980 } else {
284901a9 981 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc 982 if (err) {
284901a9 983 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc
JP		 984 if (err) {
985 E1000_ERR("No usable DMA configuration, "
986 "aborting\n");
987 goto err_dma;
988 }
1da177e4
LT		 989 }
990 pci_using_dac = 0;
991 }
992
81250297 993 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 994 if (err)
6dd62ab0 995 goto err_pci_reg;
1da177e4
LT		 996
997 pci_set_master(pdev);
998
6dd62ab0 999 err = -ENOMEM;
1da177e4 1000 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 1001 if (!netdev)
1da177e4 1002 goto err_alloc_etherdev;
1da177e4 1003
1da177e4
LT		 1004 SET_NETDEV_DEV(netdev, &pdev->dev);
1005
1006 pci_set_drvdata(pdev, netdev);
60490fe0 1007 adapter = netdev_priv(netdev);
1da177e4
LT		 1008 adapter->netdev = netdev;
1009 adapter->pdev = pdev;
1da177e4 1010 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 1011 adapter->bars = bars;
1012 adapter->need_ioport = need_ioport;
1da177e4 1013
1dc32918
JP		 1014 hw = &adapter->hw;
1015 hw->back = adapter;
1016
6dd62ab0 1017 err = -EIO;
275f165f 1018 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 1019 if (!hw->hw_addr)
1da177e4 1020 goto err_ioremap;
1da177e4 1021
81250297
TI		 1022 if (adapter->need_ioport) {
1023 for (i = BAR_1; i <= BAR_5; i++) {
1024 if (pci_resource_len(pdev, i) == 0)
1025 continue;
1026 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1027 hw->io_base = pci_resource_start(pdev, i);
1028 break;
1029 }
1da177e4
LT		 1030 }
1031 }
1032
0e7614bc 1033 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1034 e1000_set_ethtool_ops(netdev);
1da177e4 1035 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1036 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1037
0eb5a34c 1038 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1039
1da177e4
LT		 1040 adapter->bd_number = cards_found;
1041
1042 /* setup the private structure */
1043
c7be73bc
JP		 1044 err = e1000_sw_init(adapter);
1045 if (err)
1da177e4
LT		 1046 goto err_sw_init;
1047
6dd62ab0 1048 err = -EIO;
cd94dd0b
AK		 1049 /* Flash BAR mapping must happen after e1000_sw_init
1050 * because it depends on mac_type */
1dc32918 1051 if ((hw->mac_type == e1000_ich8lan) &&
cd94dd0b 1052 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
275f165f 1053 hw->flash_address = pci_ioremap_bar(pdev, 1);
1dc32918 1054 if (!hw->flash_address)
cd94dd0b 1055 goto err_flashmap;
cd94dd0b
AK		 1056 }
1057
1dc32918 1058 if (e1000_check_phy_reset_block(hw))
2d7edb92
MC		 1059 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1060
1dc32918 1061 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 1062 netdev->features = NETIF_F_SG |
1063 NETIF_F_HW_CSUM |
1064 NETIF_F_HW_VLAN_TX |
1065 NETIF_F_HW_VLAN_RX |
1066 NETIF_F_HW_VLAN_FILTER;
1dc32918 1067 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 1068 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 1069 }
1070
1dc32918
JP		 1071 if ((hw->mac_type >= e1000_82544) &&
1072 (hw->mac_type != e1000_82547))
1da177e4 1073 netdev->features |= NETIF_F_TSO;
2d7edb92 1074
1dc32918 1075 if (hw->mac_type > e1000_82547_rev_2)
87ca4e5b 1076 netdev->features |= NETIF_F_TSO6;
96838a40 1077 if (pci_using_dac)
1da177e4
LT		 1078 netdev->features |= NETIF_F_HIGHDMA;
1079
20501a69
PM		 1080 netdev->vlan_features |= NETIF_F_TSO;
1081 netdev->vlan_features |= NETIF_F_TSO6;
1082 netdev->vlan_features |= NETIF_F_HW_CSUM;
1083 netdev->vlan_features |= NETIF_F_SG;
1084
1dc32918 1085 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1086
cd94dd0b 1087 /* initialize eeprom parameters */
1dc32918 1088 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 1089 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1090 goto err_eeprom;
cd94dd0b
AK		 1091 }
1092
96838a40 1093 /* before reading the EEPROM, reset the controller to
1da177e4 1094 * put the device in a known good starting state */
96838a40 1095
1dc32918 1096 e1000_reset_hw(hw);
1da177e4
LT		 1097
1098 /* make sure the EEPROM is good */
1dc32918 1099 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 1100 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 1101 e1000_dump_eeprom(adapter);
1102 /*
1103 * set MAC address to all zeroes to invalidate and temporary
1104 * disable this device for the user. This blocks regular
1105 * traffic while still permitting ethtool ioctls from reaching
1106 * the hardware as well as allowing the user to run the
1107 * interface after manually setting a hw addr using
1108 * `ip set address`
1109 */
1dc32918 1110 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1111 } else {
1112 /* copy the MAC address out of the EEPROM */
1dc32918 1113 if (e1000_read_mac_addr(hw))
67b3c27c 1114 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 1115 }
67b3c27c 1116 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 1117 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1118 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1119
67b3c27c 1120 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 1121 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 1122
1dc32918 1123 e1000_get_bus_info(hw);
1da177e4
LT		 1124
1125 init_timer(&adapter->tx_fifo_stall_timer);
1126 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 1127 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 1128
1129 init_timer(&adapter->watchdog_timer);
1130 adapter->watchdog_timer.function = &e1000_watchdog;
1131 adapter->watchdog_timer.data = (unsigned long) adapter;
1132
1da177e4
LT		 1133 init_timer(&adapter->phy_info_timer);
1134 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 1135 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 1136
65f27f38 1137 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1138
1da177e4
LT		 1139 e1000_check_options(adapter);
1140
1141 /* Initial Wake on LAN setting
1142 * If APM wake is enabled in the EEPROM,
1143 * enable the ACPI Magic Packet filter
1144 */
1145
1dc32918 1146 switch (hw->mac_type) {
1da177e4
LT		 1147 case e1000_82542_rev2_0:
1148 case e1000_82542_rev2_1:
1149 case e1000_82543:
1150 break;
1151 case e1000_82544:
1dc32918 1152 e1000_read_eeprom(hw,
1da177e4
LT		 1153 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1154 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1155 break;
cd94dd0b 1156 case e1000_ich8lan:
1dc32918 1157 e1000_read_eeprom(hw,
cd94dd0b
AK		 1158 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1159 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1160 break;
1da177e4
LT		 1161 case e1000_82546:
1162 case e1000_82546_rev_3:
fd803241 1163 case e1000_82571:
6418ecc6 1164 case e1000_80003es2lan:
1dc32918
JP		 1165 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1166 e1000_read_eeprom(hw,
1da177e4
LT		 1167 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1168 break;
1169 }
1170 /* Fall Through */
1171 default:
1dc32918 1172 e1000_read_eeprom(hw,
1da177e4
LT		 1173 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1174 break;
1175 }
96838a40 1176 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1177 adapter->eeprom_wol |= E1000_WUFC_MAG;
1178
1179 /* now that we have the eeprom settings, apply the special cases
1180 * where the eeprom may be wrong or the board simply won't support
1181 * wake on lan on a particular port */
1182 switch (pdev->device) {
1183 case E1000_DEV_ID_82546GB_PCIE:
1184 adapter->eeprom_wol = 0;
1185 break;
1186 case E1000_DEV_ID_82546EB_FIBER:
1187 case E1000_DEV_ID_82546GB_FIBER:
1188 case E1000_DEV_ID_82571EB_FIBER:
1189 /* Wake events only supported on port A for dual fiber
1190 * regardless of eeprom setting */
1dc32918 1191 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1192 adapter->eeprom_wol = 0;
1193 break;
1194 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1195 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1196 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1197 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
f4ec7f98 1198 case E1000_DEV_ID_82571PT_QUAD_COPPER:
120cd576
JB		 1199 /* if quad port adapter, disable WoL on all but port A */
1200 if (global_quad_port_a != 0)
1201 adapter->eeprom_wol = 0;
1202 else
1203 adapter->quad_port_a = 1;
1204 /* Reset for multiple quad port adapters */
1205 if (++global_quad_port_a == 4)
1206 global_quad_port_a = 0;
1207 break;
1208 }
1209
1210 /* initialize the wol settings based on the eeprom settings */
1211 adapter->wol = adapter->eeprom_wol;
de126489 1212 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1213
fb3d47d4 1214 /* print bus type/speed/width info */
fb3d47d4
JK		 1215 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1216 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1217 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1218 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1219 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1220 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1221 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1222 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1223 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1224 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1225 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1226 "32-bit"));
fb3d47d4 1227
e174961c 1228 printk("%pM\n", netdev->dev_addr);
fb3d47d4 1229
1dc32918 1230 if (hw->bus_type == e1000_bus_type_pci_express) {
14782ca8
AK		 1231 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1232 "longer be supported by this driver in the future.\n",
1233 pdev->vendor, pdev->device);
1234 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1235 "driver instead.\n");
1236 }
1237
1da177e4
LT		 1238 /* reset the hardware with the new settings */
1239 e1000_reset(adapter);
1240
b55ccb35
JK		 1241 /* If the controller is 82573 and f/w is AMT, do not set
1242 * DRV_LOAD until the interface is up. For all other cases,
1243 * let the f/w know that the h/w is now under the control
1244 * of the driver. */
1dc32918
JP		 1245 if (hw->mac_type != e1000_82573 ||
1246 !e1000_check_mng_mode(hw))
b55ccb35 1247 e1000_get_hw_control(adapter);
2d7edb92 1248
416b5d10 1249 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1250 err = register_netdev(netdev);
1251 if (err)
416b5d10 1252 goto err_register;
1314bbf3 1253
eb62efd2
JB		 1254 /* carrier off reporting is important to ethtool even BEFORE open */
1255 netif_carrier_off(netdev);
1256
1da177e4
LT		 1257 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1258
1259 cards_found++;
1260 return 0;
1261
1262err_register:
6dd62ab0
VA		 1263 e1000_release_hw_control(adapter);
1264err_eeprom:
1dc32918
JP		 1265 if (!e1000_check_phy_reset_block(hw))
1266 e1000_phy_hw_reset(hw);
6dd62ab0 1267
1dc32918
JP		 1268 if (hw->flash_address)
1269 iounmap(hw->flash_address);
cd94dd0b 1270err_flashmap:
6dd62ab0
VA		 1271 kfree(adapter->tx_ring);
1272 kfree(adapter->rx_ring);
1da177e4 1273err_sw_init:
1dc32918 1274 iounmap(hw->hw_addr);
1da177e4
LT		 1275err_ioremap:
1276 free_netdev(netdev);
1277err_alloc_etherdev:
81250297 1278 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1279err_pci_reg:
1280err_dma:
1281 pci_disable_device(pdev);
1da177e4
LT		 1282 return err;
1283}
1284
1285/**
1286 * e1000_remove - Device Removal Routine
1287 * @pdev: PCI device information struct
1288 *
1289 * e1000_remove is called by the PCI subsystem to alert the driver
1290 * that it should release a PCI device. The could be caused by a
1291 * Hot-Plug event, or because the driver is going to be removed from
1292 * memory.
1293 **/
1294
64798845 1295static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1296{
1297 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1298 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1299 struct e1000_hw *hw = &adapter->hw;
1da177e4 1300
28e53bdd 1301 cancel_work_sync(&adapter->reset_task);
be2b28ed 1302
0fccd0e9 1303 e1000_release_manageability(adapter);
1da177e4 1304
b55ccb35
JK		 1305 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1306 * would have already happened in close and is redundant. */
1307 e1000_release_hw_control(adapter);
2d7edb92 1308
bea3348e
SH		 1309 unregister_netdev(netdev);
1310
1dc32918
JP		 1311 if (!e1000_check_phy_reset_block(hw))
1312 e1000_phy_hw_reset(hw);
1da177e4 1313
24025e4e
MC		 1314 kfree(adapter->tx_ring);
1315 kfree(adapter->rx_ring);
24025e4e 1316
1dc32918
JP		 1317 iounmap(hw->hw_addr);
1318 if (hw->flash_address)
1319 iounmap(hw->flash_address);
81250297 1320 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1321
1322 free_netdev(netdev);
1323
1324 pci_disable_device(pdev);
1325}
1326
1327/**
1328 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1329 * @adapter: board private structure to initialize
1330 *
1331 * e1000_sw_init initializes the Adapter private data structure.
1332 * Fields are initialized based on PCI device information and
1333 * OS network device settings (MTU size).
1334 **/
1335
64798845 1336static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1337{
1338 struct e1000_hw *hw = &adapter->hw;
1339 struct net_device *netdev = adapter->netdev;
1340 struct pci_dev *pdev = adapter->pdev;
1341
1342 /* PCI config space info */
1343
1344 hw->vendor_id = pdev->vendor;
1345 hw->device_id = pdev->device;
1346 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1347 hw->subsystem_id = pdev->subsystem_device;
44c10138 1348 hw->revision_id = pdev->revision;
1da177e4
LT		 1349
1350 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1351
eb0f8054 1352 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1353 hw->max_frame_size = netdev->mtu +
1354 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1355 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1356
1357 /* identify the MAC */
1358
96838a40 1359 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1360 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1361 return -EIO;
1362 }
1363
96838a40 1364 switch (hw->mac_type) {
1da177e4
LT		 1365 default:
1366 break;
1367 case e1000_82541:
1368 case e1000_82547:
1369 case e1000_82541_rev_2:
1370 case e1000_82547_rev_2:
1371 hw->phy_init_script = 1;
1372 break;
1373 }
1374
1375 e1000_set_media_type(hw);
1376
c3033b01
JP		 1377 hw->wait_autoneg_complete = false;
1378 hw->tbi_compatibility_en = true;
1379 hw->adaptive_ifs = true;
1da177e4
LT		 1380
1381 /* Copper options */
1382
96838a40 1383 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1384 hw->mdix = AUTO_ALL_MODES;
c3033b01 1385 hw->disable_polarity_correction = false;
1da177e4
LT		 1386 hw->master_slave = E1000_MASTER_SLAVE;
1387 }
1388
f56799ea
JK		 1389 adapter->num_tx_queues = 1;
1390 adapter->num_rx_queues = 1;
581d708e
MC		 1391
1392 if (e1000_alloc_queues(adapter)) {
1393 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1394 return -ENOMEM;
1395 }
1396
47313054 1397 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1398 e1000_irq_disable(adapter);
1399
1da177e4 1400 spin_lock_init(&adapter->stats_lock);
1da177e4 1401
1314bbf3
AK		 1402 set_bit(__E1000_DOWN, &adapter->flags);
1403
1da177e4
LT		 1404 return 0;
1405}
1406
581d708e
MC		 1407/**
1408 * e1000_alloc_queues - Allocate memory for all rings
1409 * @adapter: board private structure to initialize
1410 *
1411 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1412 * number of queues at compile-time.
581d708e
MC		 1413 **/
1414
64798845 1415static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1416{
1c7e5b12
YB		 1417 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1418 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1419 if (!adapter->tx_ring)
1420 return -ENOMEM;
581d708e 1421
1c7e5b12
YB		 1422 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1423 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1424 if (!adapter->rx_ring) {
1425 kfree(adapter->tx_ring);
1426 return -ENOMEM;
1427 }
581d708e 1428
581d708e
MC		 1429 return E1000_SUCCESS;
1430}
1431
1da177e4
LT		 1432/**
1433 * e1000_open - Called when a network interface is made active
1434 * @netdev: network interface device structure
1435 *
1436 * Returns 0 on success, negative value on failure
1437 *
1438 * The open entry point is called when a network interface is made
1439 * active by the system (IFF_UP). At this point all resources needed
1440 * for transmit and receive operations are allocated, the interrupt
1441 * handler is registered with the OS, the watchdog timer is started,
1442 * and the stack is notified that the interface is ready.
1443 **/
1444
64798845 1445static int e1000_open(struct net_device *netdev)
1da177e4 1446{
60490fe0 1447 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1448 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1449 int err;
1450
2db10a08 1451 /* disallow open during test */
1314bbf3 1452 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1453 return -EBUSY;
1454
eb62efd2
JB		 1455 netif_carrier_off(netdev);
1456
1da177e4 1457 /* allocate transmit descriptors */
e0aac5a2
AK		 1458 err = e1000_setup_all_tx_resources(adapter);
1459 if (err)
1da177e4
LT		 1460 goto err_setup_tx;
1461
1462 /* allocate receive descriptors */
e0aac5a2 1463 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1464 if (err)
e0aac5a2 1465 goto err_setup_rx;
b5bf28cd 1466
79f05bf0
AK		 1467 e1000_power_up_phy(adapter);
1468
2d7edb92 1469 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1470 if ((hw->mng_cookie.status &
2d7edb92
MC		 1471 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1472 e1000_update_mng_vlan(adapter);
1473 }
1da177e4 1474
b55ccb35
JK		 1475 /* If AMT is enabled, let the firmware know that the network
1476 * interface is now open */
1dc32918
JP		 1477 if (hw->mac_type == e1000_82573 &&
1478 e1000_check_mng_mode(hw))
b55ccb35
JK		 1479 e1000_get_hw_control(adapter);
1480
e0aac5a2
AK		 1481 /* before we allocate an interrupt, we must be ready to handle it.
1482 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1483 * as soon as we call pci_request_irq, so we have to setup our
1484 * clean_rx handler before we do so. */
1485 e1000_configure(adapter);
1486
1487 err = e1000_request_irq(adapter);
1488 if (err)
1489 goto err_req_irq;
1490
1491 /* From here on the code is the same as e1000_up() */
1492 clear_bit(__E1000_DOWN, &adapter->flags);
1493
bea3348e 1494 napi_enable(&adapter->napi);
47313054 1495
e0aac5a2
AK		 1496 e1000_irq_enable(adapter);
1497
076152d5
BH		 1498 netif_start_queue(netdev);
1499
e0aac5a2 1500 /* fire a link status change interrupt to start the watchdog */
1dc32918 1501 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1502
1da177e4
LT		 1503 return E1000_SUCCESS;
1504
b5bf28cd 1505err_req_irq:
e0aac5a2
AK		 1506 e1000_release_hw_control(adapter);
1507 e1000_power_down_phy(adapter);
581d708e 1508 e1000_free_all_rx_resources(adapter);
1da177e4 1509err_setup_rx:
581d708e 1510 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1511err_setup_tx:
1512 e1000_reset(adapter);
1513
1514 return err;
1515}
1516
1517/**
1518 * e1000_close - Disables a network interface
1519 * @netdev: network interface device structure
1520 *
1521 * Returns 0, this is not allowed to fail
1522 *
1523 * The close entry point is called when an interface is de-activated
1524 * by the OS. The hardware is still under the drivers control, but
1525 * needs to be disabled. A global MAC reset is issued to stop the
1526 * hardware, and all transmit and receive resources are freed.
1527 **/
1528
64798845 1529static int e1000_close(struct net_device *netdev)
1da177e4 1530{
60490fe0 1531 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1532 struct e1000_hw *hw = &adapter->hw;
1da177e4 1533
2db10a08 1534 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1535 e1000_down(adapter);
79f05bf0 1536 e1000_power_down_phy(adapter);
2db10a08 1537 e1000_free_irq(adapter);
1da177e4 1538
581d708e
MC		 1539 e1000_free_all_tx_resources(adapter);
1540 e1000_free_all_rx_resources(adapter);
1da177e4 1541
4666560a
BA		 1542 /* kill manageability vlan ID if supported, but not if a vlan with
1543 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1544 if ((hw->mng_cookie.status &
4666560a
BA		 1545 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1546 !(adapter->vlgrp &&
5c15bdec 1547 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1548 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1549 }
b55ccb35
JK		 1550
1551 /* If AMT is enabled, let the firmware know that the network
1552 * interface is now closed */
1dc32918
JP		 1553 if (hw->mac_type == e1000_82573 &&
1554 e1000_check_mng_mode(hw))
b55ccb35
JK		 1555 e1000_release_hw_control(adapter);
1556
1da177e4
LT		 1557 return 0;
1558}
1559
1560/**
1561 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1562 * @adapter: address of board private structure
2d7edb92
MC		 1563 * @start: address of beginning of memory
1564 * @len: length of memory
1da177e4 1565 **/
64798845
JP		 1566static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1567 unsigned long len)
1da177e4 1568{
1dc32918 1569 struct e1000_hw *hw = &adapter->hw;
e982f17c 1570 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1571 unsigned long end = begin + len;
1572
2648345f
MC		 1573 /* First rev 82545 and 82546 need to not allow any memory
1574 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1575 if (hw->mac_type == e1000_82545 ||
1576 hw->mac_type == e1000_82546) {
c3033b01 1577 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1578 }
1579
c3033b01 1580 return true;
1da177e4
LT		 1581}
1582
1583/**
1584 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1585 * @adapter: board private structure
581d708e 1586 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1587 *
1588 * Return 0 on success, negative on failure
1589 **/
1590
64798845
JP		 1591static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1592 struct e1000_tx_ring *txdr)
1da177e4 1593{
1da177e4
LT		 1594 struct pci_dev *pdev = adapter->pdev;
1595 int size;
1596
1597 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1598 txdr->buffer_info = vmalloc(size);
96838a40 1599 if (!txdr->buffer_info) {
2648345f
MC		 1600 DPRINTK(PROBE, ERR,
1601 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1602 return -ENOMEM;
1603 }
1604 memset(txdr->buffer_info, 0, size);
1605
1606 /* round up to nearest 4K */
1607
1608 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1609 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1610
1611 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1612 if (!txdr->desc) {
1da177e4 1613setup_tx_desc_die:
1da177e4 1614 vfree(txdr->buffer_info);
2648345f
MC		 1615 DPRINTK(PROBE, ERR,
1616 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1617 return -ENOMEM;
1618 }
1619
2648345f 1620 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1621 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1622 void *olddesc = txdr->desc;
1623 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1624 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1625 "at %p\n", txdr->size, txdr->desc);
1626 /* Try again, without freeing the previous */
1da177e4 1627 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1628 /* Failed allocation, critical failure */
96838a40 1629 if (!txdr->desc) {
1da177e4
LT		 1630 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1631 goto setup_tx_desc_die;
1632 }
1633
1634 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1635 /* give up */
2648345f
MC		 1636 pci_free_consistent(pdev, txdr->size, txdr->desc,
1637 txdr->dma);
1da177e4
LT		 1638 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1639 DPRINTK(PROBE, ERR,
2648345f
MC		 1640 "Unable to allocate aligned memory "
1641 "for the transmit descriptor ring\n");
1da177e4
LT		 1642 vfree(txdr->buffer_info);
1643 return -ENOMEM;
1644 } else {
2648345f 1645 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1646 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1647 }
1648 }
1649 memset(txdr->desc, 0, txdr->size);
1650
1651 txdr->next_to_use = 0;
1652 txdr->next_to_clean = 0;
1653
1654 return 0;
1655}
1656
581d708e
MC		 1657/**
1658 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1659 * (Descriptors) for all queues
1660 * @adapter: board private structure
1661 *
581d708e
MC		 1662 * Return 0 on success, negative on failure
1663 **/
1664
64798845 1665int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1666{
1667 int i, err = 0;
1668
f56799ea 1669 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1670 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1671 if (err) {
1672 DPRINTK(PROBE, ERR,
1673 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1674 for (i-- ; i >= 0; i--)
1675 e1000_free_tx_resources(adapter,
1676 &adapter->tx_ring[i]);
581d708e
MC		 1677 break;
1678 }
1679 }
1680
1681 return err;
1682}
1683
1da177e4
LT		 1684/**
1685 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1686 * @adapter: board private structure
1687 *
1688 * Configure the Tx unit of the MAC after a reset.
1689 **/
1690
64798845 1691static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1692{
406874a7 1693 u64 tdba;
581d708e 1694 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1695 u32 tdlen, tctl, tipg, tarc;
1696 u32 ipgr1, ipgr2;
1da177e4
LT		 1697
1698 /* Setup the HW Tx Head and Tail descriptor pointers */
1699
f56799ea 1700 switch (adapter->num_tx_queues) {
24025e4e
MC		 1701 case 1:
1702 default:
581d708e
MC		 1703 tdba = adapter->tx_ring[0].dma;
1704 tdlen = adapter->tx_ring[0].count *
1705 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1706 ew32(TDLEN, tdlen);
1707 ew32(TDBAH, (tdba >> 32));
1708 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1709 ew32(TDT, 0);
1710 ew32(TDH, 0);
6a951698
AK		 1711 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1712 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1713 break;
1714 }
1da177e4
LT		 1715
1716 /* Set the default values for the Tx Inter Packet Gap timer */
1dc32918 1717 if (hw->mac_type <= e1000_82547_rev_2 &&
d89b6c67
JB		 1718 (hw->media_type == e1000_media_type_fiber ||
1719 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1720 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1721 else
1722 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1723
581d708e 1724 switch (hw->mac_type) {
1da177e4
LT		 1725 case e1000_82542_rev2_0:
1726 case e1000_82542_rev2_1:
1727 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1728 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1729 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1730 break;
87041639
JK		 1731 case e1000_80003es2lan:
1732 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1733 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1734 break;
1da177e4 1735 default:
0fadb059
JK		 1736 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1737 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1738 break;
1da177e4 1739 }
0fadb059
JK		 1740 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1741 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1742 ew32(TIPG, tipg);
1da177e4
LT		 1743
1744 /* Set the Tx Interrupt Delay register */
1745
1dc32918 1746 ew32(TIDV, adapter->tx_int_delay);
581d708e 1747 if (hw->mac_type >= e1000_82540)
1dc32918 1748 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1749
1750 /* Program the Transmit Control Register */
1751
1dc32918 1752 tctl = er32(TCTL);
1da177e4 1753 tctl &= ~E1000_TCTL_CT;
7e6c9861 1754 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1755 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1756
2ae76d98 1757 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1dc32918 1758 tarc = er32(TARC0);
90fb5135
AK		 1759 /* set the speed mode bit, we'll clear it if we're not at
1760 * gigabit link later */
09ae3e88 1761 tarc |= (1 << 21);
1dc32918 1762 ew32(TARC0, tarc);
87041639 1763 } else if (hw->mac_type == e1000_80003es2lan) {
1dc32918 1764 tarc = er32(TARC0);
87041639 1765 tarc |= 1;
1dc32918
JP		 1766 ew32(TARC0, tarc);
1767 tarc = er32(TARC1);
87041639 1768 tarc |= 1;
1dc32918 1769 ew32(TARC1, tarc);
2ae76d98
MC		 1770 }
1771
581d708e 1772 e1000_config_collision_dist(hw);
1da177e4
LT		 1773
1774 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1775 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1776
1777 /* only set IDE if we are delaying interrupts using the timers */
1778 if (adapter->tx_int_delay)
1779 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1780
581d708e 1781 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1782 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1783 else
1784 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1785
1786 /* Cache if we're 82544 running in PCI-X because we'll
1787 * need this to apply a workaround later in the send path. */
581d708e
MC		 1788 if (hw->mac_type == e1000_82544 &&
1789 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1790 adapter->pcix_82544 = 1;
7e6c9861 1791
1dc32918 1792 ew32(TCTL, tctl);
7e6c9861 1793
1da177e4
LT		 1794}
1795
1796/**
1797 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1798 * @adapter: board private structure
581d708e 1799 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1800 *
1801 * Returns 0 on success, negative on failure
1802 **/
1803
64798845
JP		 1804static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1805 struct e1000_rx_ring *rxdr)
1da177e4 1806{
1dc32918 1807 struct e1000_hw *hw = &adapter->hw;
1da177e4 1808 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1809 int size, desc_len;
1da177e4
LT		 1810
1811 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1812 rxdr->buffer_info = vmalloc(size);
581d708e 1813 if (!rxdr->buffer_info) {
2648345f
MC		 1814 DPRINTK(PROBE, ERR,
1815 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1816 return -ENOMEM;
1817 }
1818 memset(rxdr->buffer_info, 0, size);
1819
1dc32918 1820 if (hw->mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1821 desc_len = sizeof(struct e1000_rx_desc);
1822 else
1823 desc_len = sizeof(union e1000_rx_desc_packet_split);
1824
1da177e4
LT		 1825 /* Round up to nearest 4K */
1826
2d7edb92 1827 rxdr->size = rxdr->count * desc_len;
9099cfb9 1828 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1829
1830 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1831
581d708e
MC		 1832 if (!rxdr->desc) {
1833 DPRINTK(PROBE, ERR,
1834 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1835setup_rx_desc_die:
1da177e4
LT		 1836 vfree(rxdr->buffer_info);
1837 return -ENOMEM;
1838 }
1839
2648345f 1840 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1841 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1842 void *olddesc = rxdr->desc;
1843 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1844 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1845 "at %p\n", rxdr->size, rxdr->desc);
1846 /* Try again, without freeing the previous */
1da177e4 1847 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1848 /* Failed allocation, critical failure */
581d708e 1849 if (!rxdr->desc) {
1da177e4 1850 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1851 DPRINTK(PROBE, ERR,
1852 "Unable to allocate memory "
1853 "for the receive descriptor ring\n");
1da177e4
LT		 1854 goto setup_rx_desc_die;
1855 }
1856
1857 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1858 /* give up */
2648345f
MC		 1859 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1860 rxdr->dma);
1da177e4 1861 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1862 DPRINTK(PROBE, ERR,
1863 "Unable to allocate aligned memory "
1864 "for the receive descriptor ring\n");
581d708e 1865 goto setup_rx_desc_die;
1da177e4 1866 } else {
2648345f 1867 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1868 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1869 }
1870 }
1871 memset(rxdr->desc, 0, rxdr->size);
1872
1873 rxdr->next_to_clean = 0;
1874 rxdr->next_to_use = 0;
edbbb3ca 1875 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1876
1877 return 0;
1878}
1879
581d708e
MC		 1880/**
1881 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1882 * (Descriptors) for all queues
1883 * @adapter: board private structure
1884 *
581d708e
MC		 1885 * Return 0 on success, negative on failure
1886 **/
1887
64798845 1888int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1889{
1890 int i, err = 0;
1891
f56799ea 1892 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1893 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1894 if (err) {
1895 DPRINTK(PROBE, ERR,
1896 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1897 for (i-- ; i >= 0; i--)
1898 e1000_free_rx_resources(adapter,
1899 &adapter->rx_ring[i]);
581d708e
MC		 1900 break;
1901 }
1902 }
1903
1904 return err;
1905}
1906
1da177e4 1907/**
2648345f 1908 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1909 * @adapter: Board private structure
1910 **/
64798845 1911static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1912{
1dc32918 1913 struct e1000_hw *hw = &adapter->hw;
630b25cd 1914 u32 rctl;
1da177e4 1915
1dc32918 1916 rctl = er32(RCTL);
1da177e4
LT		 1917
1918 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1919
1920 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1921 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1922 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1923
1dc32918 1924 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1925 rctl |= E1000_RCTL_SBP;
1926 else
1927 rctl &= ~E1000_RCTL_SBP;
1928
2d7edb92
MC		 1929 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1930 rctl &= ~E1000_RCTL_LPE;
1931 else
1932 rctl |= E1000_RCTL_LPE;
1933
1da177e4 1934 /* Setup buffer sizes */
9e2feace
AK		 1935 rctl &= ~E1000_RCTL_SZ_4096;
1936 rctl |= E1000_RCTL_BSEX;
1937 switch (adapter->rx_buffer_len) {
1938 case E1000_RXBUFFER_256:
1939 rctl |= E1000_RCTL_SZ_256;
1940 rctl &= ~E1000_RCTL_BSEX;
1941 break;
1942 case E1000_RXBUFFER_512:
1943 rctl |= E1000_RCTL_SZ_512;
1944 rctl &= ~E1000_RCTL_BSEX;
1945 break;
1946 case E1000_RXBUFFER_1024:
1947 rctl |= E1000_RCTL_SZ_1024;
1948 rctl &= ~E1000_RCTL_BSEX;
1949 break;
a1415ee6
JK		 1950 case E1000_RXBUFFER_2048:
1951 default:
1952 rctl |= E1000_RCTL_SZ_2048;
1953 rctl &= ~E1000_RCTL_BSEX;
1954 break;
1955 case E1000_RXBUFFER_4096:
1956 rctl |= E1000_RCTL_SZ_4096;
1957 break;
1958 case E1000_RXBUFFER_8192:
1959 rctl |= E1000_RCTL_SZ_8192;
1960 break;
1961 case E1000_RXBUFFER_16384:
1962 rctl |= E1000_RCTL_SZ_16384;
1963 break;
2d7edb92
MC		 1964 }
1965
1dc32918 1966 ew32(RCTL, rctl);
1da177e4
LT		 1967}
1968
1969/**
1970 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1971 * @adapter: board private structure
1972 *
1973 * Configure the Rx unit of the MAC after a reset.
1974 **/
1975
64798845 1976static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1977{
406874a7 1978 u64 rdba;
581d708e 1979 struct e1000_hw *hw = &adapter->hw;
406874a7 1980 u32 rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1981
edbbb3ca
JB		 1982 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1983 rdlen = adapter->rx_ring[0].count *
1984 sizeof(struct e1000_rx_desc);
1985 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1986 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1987 } else {
1988 rdlen = adapter->rx_ring[0].count *
1989 sizeof(struct e1000_rx_desc);
1990 adapter->clean_rx = e1000_clean_rx_irq;
1991 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1992 }
1da177e4
LT		 1993
1994 /* disable receives while setting up the descriptors */
1dc32918
JP		 1995 rctl = er32(RCTL);
1996 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1997
1998 /* set the Receive Delay Timer Register */
1dc32918 1999 ew32(RDTR, adapter->rx_int_delay);
1da177e4 2000
581d708e 2001 if (hw->mac_type >= e1000_82540) {
1dc32918 2002 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 2003 if (adapter->itr_setting != 0)
1dc32918 2004 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 2005 }
2006
2ae76d98 2007 if (hw->mac_type >= e1000_82571) {
1dc32918 2008 ctrl_ext = er32(CTRL_EXT);
1e613fd9 2009 /* Reset delay timers after every interrupt */
6fc7a7ec 2010 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
835bb129 2011 /* Auto-Mask interrupts upon ICR access */
1e613fd9 2012 ctrl_ext |= E1000_CTRL_EXT_IAME;
1dc32918 2013 ew32(IAM, 0xffffffff);
1dc32918
JP		 2014 ew32(CTRL_EXT, ctrl_ext);
2015 E1000_WRITE_FLUSH();
2ae76d98
MC		 2016 }
2017
581d708e
MC		 2018 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2019 * the Base and Length of the Rx Descriptor Ring */
f56799ea 2020 switch (adapter->num_rx_queues) {
24025e4e
MC		 2021 case 1:
2022 default:
581d708e 2023 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 2024 ew32(RDLEN, rdlen);
2025 ew32(RDBAH, (rdba >> 32));
2026 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
2027 ew32(RDT, 0);
2028 ew32(RDH, 0);
6a951698
AK		 2029 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2030 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2031 break;
24025e4e
MC		 2032 }
2033
1da177e4 2034 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 2035 if (hw->mac_type >= e1000_82543) {
1dc32918 2036 rxcsum = er32(RXCSUM);
630b25cd 2037 if (adapter->rx_csum)
2d7edb92 2038 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 2039 else
2d7edb92 2040 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 2041 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 2042 ew32(RXCSUM, rxcsum);
1da177e4
LT		 2043 }
2044
2045 /* Enable Receives */
1dc32918 2046 ew32(RCTL, rctl);
1da177e4
LT		 2047}
2048
2049/**
581d708e 2050 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2051 * @adapter: board private structure
581d708e 2052 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2053 *
2054 * Free all transmit software resources
2055 **/
2056
64798845
JP		 2057static void e1000_free_tx_resources(struct e1000_adapter *adapter,
2058 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2059{
2060 struct pci_dev *pdev = adapter->pdev;
2061
581d708e 2062 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2063
581d708e
MC		 2064 vfree(tx_ring->buffer_info);
2065 tx_ring->buffer_info = NULL;
1da177e4 2066
581d708e 2067 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2068
581d708e
MC		 2069 tx_ring->desc = NULL;
2070}
2071
2072/**
2073 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2074 * @adapter: board private structure
2075 *
2076 * Free all transmit software resources
2077 **/
2078
64798845 2079void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2080{
2081 int i;
2082
f56799ea 2083 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2084 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2085}
2086
64798845
JP		 2087static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2088 struct e1000_buffer *buffer_info)
1da177e4 2089{
d20b606c 2090 buffer_info->dma = 0;
a9ebadd6 2091 if (buffer_info->skb) {
d20b606c
JB		 2092 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
2093 DMA_TO_DEVICE);
1da177e4 2094 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2095 buffer_info->skb = NULL;
2096 }
37e73df8 2097 buffer_info->time_stamp = 0;
a9ebadd6 2098 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2099}
2100
2101/**
2102 * e1000_clean_tx_ring - Free Tx Buffers
2103 * @adapter: board private structure
581d708e 2104 * @tx_ring: ring to be cleaned
1da177e4
LT		 2105 **/
2106
64798845
JP		 2107static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2108 struct e1000_tx_ring *tx_ring)
1da177e4 2109{
1dc32918 2110 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2111 struct e1000_buffer *buffer_info;
2112 unsigned long size;
2113 unsigned int i;
2114
2115 /* Free all the Tx ring sk_buffs */
2116
96838a40 2117 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2118 buffer_info = &tx_ring->buffer_info[i];
2119 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2120 }
2121
2122 size = sizeof(struct e1000_buffer) * tx_ring->count;
2123 memset(tx_ring->buffer_info, 0, size);
2124
2125 /* Zero out the descriptor ring */
2126
2127 memset(tx_ring->desc, 0, tx_ring->size);
2128
2129 tx_ring->next_to_use = 0;
2130 tx_ring->next_to_clean = 0;
fd803241 2131 tx_ring->last_tx_tso = 0;
1da177e4 2132
1dc32918
JP		 2133 writel(0, hw->hw_addr + tx_ring->tdh);
2134 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2135}
2136
2137/**
2138 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2139 * @adapter: board private structure
2140 **/
2141
64798845 2142static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2143{
2144 int i;
2145
f56799ea 2146 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2147 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2148}
2149
2150/**
2151 * e1000_free_rx_resources - Free Rx Resources
2152 * @adapter: board private structure
581d708e 2153 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2154 *
2155 * Free all receive software resources
2156 **/
2157
64798845
JP		 2158static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2159 struct e1000_rx_ring *rx_ring)
1da177e4 2160{
1da177e4
LT		 2161 struct pci_dev *pdev = adapter->pdev;
2162
581d708e 2163 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2164
2165 vfree(rx_ring->buffer_info);
2166 rx_ring->buffer_info = NULL;
2167
2168 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2169
2170 rx_ring->desc = NULL;
2171}
2172
2173/**
581d708e 2174 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2175 * @adapter: board private structure
581d708e
MC		 2176 *
2177 * Free all receive software resources
2178 **/
2179
64798845 2180void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2181{
2182 int i;
2183
f56799ea 2184 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2185 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2186}
2187
2188/**
2189 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2190 * @adapter: board private structure
2191 * @rx_ring: ring to free buffers from
1da177e4
LT		 2192 **/
2193
64798845
JP		 2194static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2195 struct e1000_rx_ring *rx_ring)
1da177e4 2196{
1dc32918 2197 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2198 struct e1000_buffer *buffer_info;
2199 struct pci_dev *pdev = adapter->pdev;
2200 unsigned long size;
630b25cd 2201 unsigned int i;
1da177e4
LT		 2202
2203 /* Free all the Rx ring sk_buffs */
96838a40 2204 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2205 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB		 2206 if (buffer_info->dma &&
2207 adapter->clean_rx == e1000_clean_rx_irq) {
2208 pci_unmap_single(pdev, buffer_info->dma,
2209 buffer_info->length,
2210 PCI_DMA_FROMDEVICE);
2211 } else if (buffer_info->dma &&
2212 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
2213 pci_unmap_page(pdev, buffer_info->dma,
2214 buffer_info->length,
2215 PCI_DMA_FROMDEVICE);
679be3ba 2216 }
1da177e4 2217
679be3ba 2218 buffer_info->dma = 0;
edbbb3ca
JB		 2219 if (buffer_info->page) {
2220 put_page(buffer_info->page);
2221 buffer_info->page = NULL;
2222 }
679be3ba 2223 if (buffer_info->skb) {
1da177e4
LT		 2224 dev_kfree_skb(buffer_info->skb);
2225 buffer_info->skb = NULL;
997f5cbd 2226 }
1da177e4
LT		 2227 }
2228
edbbb3ca
JB		 2229 /* there also may be some cached data from a chained receive */
2230 if (rx_ring->rx_skb_top) {
2231 dev_kfree_skb(rx_ring->rx_skb_top);
2232 rx_ring->rx_skb_top = NULL;
2233 }
2234
1da177e4
LT		 2235 size = sizeof(struct e1000_buffer) * rx_ring->count;
2236 memset(rx_ring->buffer_info, 0, size);
2237
2238 /* Zero out the descriptor ring */
1da177e4
LT		 2239 memset(rx_ring->desc, 0, rx_ring->size);
2240
2241 rx_ring->next_to_clean = 0;
2242 rx_ring->next_to_use = 0;
2243
1dc32918
JP		 2244 writel(0, hw->hw_addr + rx_ring->rdh);
2245 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2246}
2247
2248/**
2249 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2250 * @adapter: board private structure
2251 **/
2252
64798845 2253static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2254{
2255 int i;
2256
f56799ea 2257 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2258 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2259}
2260
2261/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2262 * and memory write and invalidate disabled for certain operations
2263 */
64798845 2264static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2265{
1dc32918 2266 struct e1000_hw *hw = &adapter->hw;
1da177e4 2267 struct net_device *netdev = adapter->netdev;
406874a7 2268 u32 rctl;
1da177e4 2269
1dc32918 2270 e1000_pci_clear_mwi(hw);
1da177e4 2271
1dc32918 2272 rctl = er32(RCTL);
1da177e4 2273 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2274 ew32(RCTL, rctl);
2275 E1000_WRITE_FLUSH();
1da177e4
LT		 2276 mdelay(5);
2277
96838a40 2278 if (netif_running(netdev))
581d708e 2279 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2280}
2281
64798845 2282static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2283{
1dc32918 2284 struct e1000_hw *hw = &adapter->hw;
1da177e4 2285 struct net_device *netdev = adapter->netdev;
406874a7 2286 u32 rctl;
1da177e4 2287
1dc32918 2288 rctl = er32(RCTL);
1da177e4 2289 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2290 ew32(RCTL, rctl);
2291 E1000_WRITE_FLUSH();
1da177e4
LT		 2292 mdelay(5);
2293
1dc32918
JP		 2294 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2295 e1000_pci_set_mwi(hw);
1da177e4 2296
96838a40 2297 if (netif_running(netdev)) {
72d64a43
JK		 2298 /* No need to loop, because 82542 supports only 1 queue */
2299 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2300 e1000_configure_rx(adapter);
72d64a43 2301 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2302 }
2303}
2304
2305/**
2306 * e1000_set_mac - Change the Ethernet Address of the NIC
2307 * @netdev: network interface device structure
2308 * @p: pointer to an address structure
2309 *
2310 * Returns 0 on success, negative on failure
2311 **/
2312
64798845 2313static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2314{
60490fe0 2315 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2316 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2317 struct sockaddr *addr = p;
2318
96838a40 2319 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2320 return -EADDRNOTAVAIL;
2321
2322 /* 82542 2.0 needs to be in reset to write receive address registers */
2323
1dc32918 2324 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2325 e1000_enter_82542_rst(adapter);
2326
2327 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2328 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2329
1dc32918 2330 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2331
868d5309
MC		 2332 /* With 82571 controllers, LAA may be overwritten (with the default)
2333 * due to controller reset from the other port. */
1dc32918 2334 if (hw->mac_type == e1000_82571) {
868d5309 2335 /* activate the work around */
1dc32918 2336 hw->laa_is_present = 1;
868d5309 2337
96838a40
JB		 2338 /* Hold a copy of the LAA in RAR[14] This is done so that
2339 * between the time RAR[0] gets clobbered and the time it
2340 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2341 * of the RARs and no incoming packets directed to this port
96838a40 2342 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2343 * RAR[14] */
1dc32918 2344 e1000_rar_set(hw, hw->mac_addr,
868d5309
MC		 2345 E1000_RAR_ENTRIES - 1);
2346 }
2347
1dc32918 2348 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2349 e1000_leave_82542_rst(adapter);
2350
2351 return 0;
2352}
2353
2354/**
db0ce50d 2355 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2356 * @netdev: network interface device structure
2357 *
db0ce50d
PM		 2358 * The set_rx_mode entry point is called whenever the unicast or multicast
2359 * address lists or the network interface flags are updated. This routine is
2360 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2361 * promiscuous mode, and all-multi behavior.
2362 **/
2363
64798845 2364static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2365{
60490fe0 2366 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2367 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2368 struct netdev_hw_addr *ha;
2369 bool use_uc = false;
db0ce50d 2370 struct dev_addr_list *mc_ptr;
406874a7
JP		 2371 u32 rctl;
2372 u32 hash_value;
868d5309 2373 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2374 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2375 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2376 E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2377 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2378
2379 if (!mcarray) {
2380 DPRINTK(PROBE, ERR, "memory allocation failed\n");
2381 return;
2382 }
cd94dd0b 2383
1dc32918 2384 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 2385 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2386
868d5309 2387 /* reserve RAR[14] for LAA over-write work-around */
1dc32918 2388 if (hw->mac_type == e1000_82571)
868d5309 2389 rar_entries--;
1da177e4 2390
2648345f
MC		 2391 /* Check for Promiscuous and All Multicast modes */
2392
1dc32918 2393 rctl = er32(RCTL);
1da177e4 2394
96838a40 2395 if (netdev->flags & IFF_PROMISC) {
1da177e4 2396 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2397 rctl &= ~E1000_RCTL_VFE;
1da177e4 2398 } else {
746b9f02
PM		 2399 if (netdev->flags & IFF_ALLMULTI) {
2400 rctl |= E1000_RCTL_MPE;
2401 } else {
2402 rctl &= ~E1000_RCTL_MPE;
2403 }
78ed11a5 2404 if (adapter->hw.mac_type != e1000_ich8lan)
746b9f02 2405 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2406 }
2407
31278e71 2408 if (netdev->uc.count > rar_entries - 1) {
db0ce50d
PM		 2409 rctl |= E1000_RCTL_UPE;
2410 } else if (!(netdev->flags & IFF_PROMISC)) {
2411 rctl &= ~E1000_RCTL_UPE;
ccffad25 2412 use_uc = true;
1da177e4
LT		 2413 }
2414
1dc32918 2415 ew32(RCTL, rctl);
1da177e4
LT		 2416
2417 /* 82542 2.0 needs to be in reset to write receive address registers */
2418
96838a40 2419 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2420 e1000_enter_82542_rst(adapter);
2421
db0ce50d
PM		 2422 /* load the first 14 addresses into the exact filters 1-14. Unicast
2423 * addresses take precedence to avoid disabling unicast filtering
2424 * when possible.
2425 *
1da177e4
LT		 2426 * RAR 0 is used for the station MAC adddress
2427 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2428 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4 2429 */
ccffad25
JP		 2430 i = 1;
2431 if (use_uc)
31278e71 2432 list_for_each_entry(ha, &netdev->uc.list, list) {
ccffad25
JP		 2433 if (i == rar_entries)
2434 break;
2435 e1000_rar_set(hw, ha->addr, i++);
2436 }
2437
2438 WARN_ON(i == rar_entries);
2439
1da177e4
LT		 2440 mc_ptr = netdev->mc_list;
2441
ccffad25
JP		 2442 for (; i < rar_entries; i++) {
2443 if (mc_ptr) {
db0ce50d 2444 e1000_rar_set(hw, mc_ptr->da_addr, i);
1da177e4
LT		 2445 mc_ptr = mc_ptr->next;
2446 } else {
2447 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
1dc32918 2448 E1000_WRITE_FLUSH();
1da177e4 2449 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
1dc32918 2450 E1000_WRITE_FLUSH();
1da177e4
LT		 2451 }
2452 }
2453
1da177e4
LT		 2454 /* load any remaining addresses into the hash table */
2455
96838a40 2456 for (; mc_ptr; mc_ptr = mc_ptr->next) {
81c52285 2457 u32 hash_reg, hash_bit, mta;
db0ce50d 2458 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
81c52285
JB		 2459 hash_reg = (hash_value >> 5) & 0x7F;
2460 hash_bit = hash_value & 0x1F;
2461 mta = (1 << hash_bit);
2462 mcarray[hash_reg] |= mta;
1da177e4
LT		 2463 }
2464
81c52285
JB		 2465 /* write the hash table completely, write from bottom to avoid
2466 * both stupid write combining chipsets, and flushing each write */
2467 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2468 /*
2469 * If we are on an 82544 has an errata where writing odd
2470 * offsets overwrites the previous even offset, but writing
2471 * backwards over the range solves the issue by always
2472 * writing the odd offset first
2473 */
2474 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2475 }
2476 E1000_WRITE_FLUSH();
2477
96838a40 2478 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2479 e1000_leave_82542_rst(adapter);
81c52285
JB		 2480
2481 kfree(mcarray);
1da177e4
LT		 2482}
2483
2484/* Need to wait a few seconds after link up to get diagnostic information from
2485 * the phy */
2486
64798845 2487static void e1000_update_phy_info(unsigned long data)
1da177e4 2488{
e982f17c 2489 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2490 struct e1000_hw *hw = &adapter->hw;
2491 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2492}
2493
2494/**
2495 * e1000_82547_tx_fifo_stall - Timer Call-back
2496 * @data: pointer to adapter cast into an unsigned long
2497 **/
2498
64798845 2499static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2500{
e982f17c 2501 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2502 struct e1000_hw *hw = &adapter->hw;
1da177e4 2503 struct net_device *netdev = adapter->netdev;
406874a7 2504 u32 tctl;
1da177e4 2505
96838a40 2506 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2507 if ((er32(TDT) == er32(TDH)) &&
2508 (er32(TDFT) == er32(TDFH)) &&
2509 (er32(TDFTS) == er32(TDFHS))) {
2510 tctl = er32(TCTL);
2511 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2512 ew32(TDFT, adapter->tx_head_addr);
2513 ew32(TDFH, adapter->tx_head_addr);
2514 ew32(TDFTS, adapter->tx_head_addr);
2515 ew32(TDFHS, adapter->tx_head_addr);
2516 ew32(TCTL, tctl);
2517 E1000_WRITE_FLUSH();
1da177e4
LT		 2518
2519 adapter->tx_fifo_head = 0;
2520 atomic_set(&adapter->tx_fifo_stall, 0);
2521 netif_wake_queue(netdev);
2522 } else {
2523 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2524 }
2525 }
2526}
2527
2528/**
2529 * e1000_watchdog - Timer Call-back
2530 * @data: pointer to adapter cast into an unsigned long
2531 **/
64798845 2532static void e1000_watchdog(unsigned long data)
1da177e4 2533{
e982f17c 2534 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2535 struct e1000_hw *hw = &adapter->hw;
1da177e4 2536 struct net_device *netdev = adapter->netdev;
545c67c0 2537 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7
JP		 2538 u32 link, tctl;
2539 s32 ret_val;
cd94dd0b 2540
1dc32918 2541 ret_val = e1000_check_for_link(hw);
cd94dd0b 2542 if ((ret_val == E1000_ERR_PHY) &&
1dc32918
JP		 2543 (hw->phy_type == e1000_phy_igp_3) &&
2544 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
cd94dd0b
AK		 2545 /* See e1000_kumeran_lock_loss_workaround() */
2546 DPRINTK(LINK, INFO,
2547 "Gigabit has been disabled, downgrading speed\n");
2548 }
90fb5135 2549
1dc32918
JP		 2550 if (hw->mac_type == e1000_82573) {
2551 e1000_enable_tx_pkt_filtering(hw);
2552 if (adapter->mng_vlan_id != hw->mng_cookie.vlan_id)
2d7edb92 2553 e1000_update_mng_vlan(adapter);
96838a40 2554 }
1da177e4 2555
1dc32918
JP		 2556 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2557 !(er32(TXCW) & E1000_TXCW_ANE))
2558 link = !hw->serdes_link_down;
1da177e4 2559 else
1dc32918 2560 link = er32(STATUS) & E1000_STATUS_LU;
1da177e4 2561
96838a40
JB		 2562 if (link) {
2563 if (!netif_carrier_ok(netdev)) {
406874a7 2564 u32 ctrl;
c3033b01 2565 bool txb2b = true;
1dc32918 2566 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2567 &adapter->link_speed,
2568 &adapter->link_duplex);
2569
1dc32918 2570 ctrl = er32(CTRL);
b30c4d8f
JK		 2571 printk(KERN_INFO "e1000: %s NIC Link is Up %d Mbps %s, "
2572 "Flow Control: %s\n",
2573 netdev->name,
2574 adapter->link_speed,
2575 adapter->link_duplex == FULL_DUPLEX ?
9669f53b
AK		 2576 "Full Duplex" : "Half Duplex",
2577 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2578 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2579 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2580 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2581
7e6c9861
JK		 2582 /* tweak tx_queue_len according to speed/duplex
2583 * and adjust the timeout factor */
66a2b0a3
JK		 2584 netdev->tx_queue_len = adapter->tx_queue_len;
2585 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2586 switch (adapter->link_speed) {
2587 case SPEED_10:
c3033b01 2588 txb2b = false;
7e6c9861
JK		 2589 netdev->tx_queue_len = 10;
2590 adapter->tx_timeout_factor = 8;
2591 break;
2592 case SPEED_100:
c3033b01 2593 txb2b = false;
7e6c9861
JK		 2594 netdev->tx_queue_len = 100;
2595 /* maybe add some timeout factor ? */
2596 break;
2597 }
2598
1dc32918
JP		 2599 if ((hw->mac_type == e1000_82571 ||
2600 hw->mac_type == e1000_82572) &&
c3033b01 2601 !txb2b) {
406874a7 2602 u32 tarc0;
1dc32918 2603 tarc0 = er32(TARC0);
90fb5135 2604 tarc0 &= ~(1 << 21);
1dc32918 2605 ew32(TARC0, tarc0);
7e6c9861 2606 }
90fb5135 2607
7e6c9861
JK		 2608 /* disable TSO for pcie and 10/100 speeds, to avoid
2609 * some hardware issues */
2610 if (!adapter->tso_force &&
1dc32918 2611 hw->bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2612 switch (adapter->link_speed) {
2613 case SPEED_10:
66a2b0a3 2614 case SPEED_100:
7e6c9861
JK		 2615 DPRINTK(PROBE,INFO,
2616 "10/100 speed: disabling TSO\n");
2617 netdev->features &= ~NETIF_F_TSO;
87ca4e5b 2618 netdev->features &= ~NETIF_F_TSO6;
7e6c9861
JK		 2619 break;
2620 case SPEED_1000:
2621 netdev->features |= NETIF_F_TSO;
87ca4e5b 2622 netdev->features |= NETIF_F_TSO6;
7e6c9861
JK		 2623 break;
2624 default:
2625 /* oops */
66a2b0a3
JK		 2626 break;
2627 }
2628 }
7e6c9861
JK		 2629
2630 /* enable transmits in the hardware, need to do this
2631 * after setting TARC0 */
1dc32918 2632 tctl = er32(TCTL);
7e6c9861 2633 tctl |= E1000_TCTL_EN;
1dc32918 2634 ew32(TCTL, tctl);
66a2b0a3 2635
1da177e4 2636 netif_carrier_on(netdev);
56e1393f 2637 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4 2638 adapter->smartspeed = 0;
bb8e3311
JG		 2639 } else {
2640 /* make sure the receive unit is started */
1dc32918
JP		 2641 if (hw->rx_needs_kicking) {
2642 u32 rctl = er32(RCTL);
2643 ew32(RCTL, rctl | E1000_RCTL_EN);
bb8e3311 2644 }
1da177e4
LT		 2645 }
2646 } else {
96838a40 2647 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2648 adapter->link_speed = 0;
2649 adapter->link_duplex = 0;
b30c4d8f
JK		 2650 printk(KERN_INFO "e1000: %s NIC Link is Down\n",
2651 netdev->name);
1da177e4 2652 netif_carrier_off(netdev);
56e1393f 2653 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
87041639
JK		 2654
2655 /* 80003ES2LAN workaround--
2656 * For packet buffer work-around on link down event;
2657 * disable receives in the ISR and
2658 * reset device here in the watchdog
2659 */
1dc32918 2660 if (hw->mac_type == e1000_80003es2lan)
87041639
JK		 2661 /* reset device */
2662 schedule_work(&adapter->reset_task);
1da177e4
LT		 2663 }
2664
2665 e1000_smartspeed(adapter);
2666 }
2667
2668 e1000_update_stats(adapter);
2669
1dc32918 2670 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2671 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2672 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2673 adapter->colc_old = adapter->stats.colc;
2674
2675 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2676 adapter->gorcl_old = adapter->stats.gorcl;
2677 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2678 adapter->gotcl_old = adapter->stats.gotcl;
2679
1dc32918 2680 e1000_update_adaptive(hw);
1da177e4 2681
f56799ea 2682 if (!netif_carrier_ok(netdev)) {
581d708e 2683 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2684 /* We've lost link, so the controller stops DMA,
2685 * but we've got queued Tx work that's never going
2686 * to get done, so reset controller to flush Tx.
2687 * (Do the reset outside of interrupt context). */
87041639
JK		 2688 adapter->tx_timeout_count++;
2689 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 2690 /* return immediately since reset is imminent */
2691 return;
1da177e4
LT		 2692 }
2693 }
2694
1da177e4 2695 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2696 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2697
2648345f 2698 /* Force detection of hung controller every watchdog period */
c3033b01 2699 adapter->detect_tx_hung = true;
1da177e4 2700
96838a40 2701 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309 2702 * reset from the other port. Set the appropriate LAA in RAR[0] */
1dc32918
JP		 2703 if (hw->mac_type == e1000_82571 && hw->laa_is_present)
2704 e1000_rar_set(hw, hw->mac_addr, 0);
868d5309 2705
1da177e4 2706 /* Reset the timer */
56e1393f 2707 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2708}
2709
835bb129
JB		 2710enum latency_range {
2711 lowest_latency = 0,
2712 low_latency = 1,
2713 bulk_latency = 2,
2714 latency_invalid = 255
2715};
2716
2717/**
2718 * e1000_update_itr - update the dynamic ITR value based on statistics
2719 * Stores a new ITR value based on packets and byte
2720 * counts during the last interrupt. The advantage of per interrupt
2721 * computation is faster updates and more accurate ITR for the current
2722 * traffic pattern. Constants in this function were computed
2723 * based on theoretical maximum wire speed and thresholds were set based
2724 * on testing data as well as attempting to minimize response time
2725 * while increasing bulk throughput.
2726 * this functionality is controlled by the InterruptThrottleRate module
2727 * parameter (see e1000_param.c)
2728 * @adapter: pointer to adapter
2729 * @itr_setting: current adapter->itr
2730 * @packets: the number of packets during this measurement interval
2731 * @bytes: the number of bytes during this measurement interval
2732 **/
2733static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2734 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2735{
2736 unsigned int retval = itr_setting;
2737 struct e1000_hw *hw = &adapter->hw;
2738
2739 if (unlikely(hw->mac_type < e1000_82540))
2740 goto update_itr_done;
2741
2742 if (packets == 0)
2743 goto update_itr_done;
2744
835bb129
JB		 2745 switch (itr_setting) {
2746 case lowest_latency:
2b65326e
JB		 2747 /* jumbo frames get bulk treatment*/
2748 if (bytes/packets > 8000)
2749 retval = bulk_latency;
2750 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2751 retval = low_latency;
2752 break;
2753 case low_latency: /* 50 usec aka 20000 ints/s */
2754 if (bytes > 10000) {
2b65326e
JB		 2755 /* jumbo frames need bulk latency setting */
2756 if (bytes/packets > 8000)
2757 retval = bulk_latency;
2758 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2759 retval = bulk_latency;
2760 else if ((packets > 35))
2761 retval = lowest_latency;
2b65326e
JB		 2762 } else if (bytes/packets > 2000)
2763 retval = bulk_latency;
2764 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2765 retval = lowest_latency;
2766 break;
2767 case bulk_latency: /* 250 usec aka 4000 ints/s */
2768 if (bytes > 25000) {
2769 if (packets > 35)
2770 retval = low_latency;
2b65326e
JB		 2771 } else if (bytes < 6000) {
2772 retval = low_latency;
835bb129
JB		 2773 }
2774 break;
2775 }
2776
2777update_itr_done:
2778 return retval;
2779}
2780
2781static void e1000_set_itr(struct e1000_adapter *adapter)
2782{
2783 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2784 u16 current_itr;
2785 u32 new_itr = adapter->itr;
835bb129
JB		 2786
2787 if (unlikely(hw->mac_type < e1000_82540))
2788 return;
2789
2790 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2791 if (unlikely(adapter->link_speed != SPEED_1000)) {
2792 current_itr = 0;
2793 new_itr = 4000;
2794 goto set_itr_now;
2795 }
2796
2797 adapter->tx_itr = e1000_update_itr(adapter,
2798 adapter->tx_itr,
2799 adapter->total_tx_packets,
2800 adapter->total_tx_bytes);
2b65326e
JB		 2801 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2802 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2803 adapter->tx_itr = low_latency;
2804
835bb129
JB		 2805 adapter->rx_itr = e1000_update_itr(adapter,
2806 adapter->rx_itr,
2807 adapter->total_rx_packets,
2808 adapter->total_rx_bytes);
2b65326e
JB		 2809 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2810 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2811 adapter->rx_itr = low_latency;
835bb129
JB		 2812
2813 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2814
835bb129
JB		 2815 switch (current_itr) {
2816 /* counts and packets in update_itr are dependent on these numbers */
2817 case lowest_latency:
2818 new_itr = 70000;
2819 break;
2820 case low_latency:
2821 new_itr = 20000; /* aka hwitr = ~200 */
2822 break;
2823 case bulk_latency:
2824 new_itr = 4000;
2825 break;
2826 default:
2827 break;
2828 }
2829
2830set_itr_now:
2831 if (new_itr != adapter->itr) {
2832 /* this attempts to bias the interrupt rate towards Bulk
2833 * by adding intermediate steps when interrupt rate is
2834 * increasing */
2835 new_itr = new_itr > adapter->itr ?
2836 min(adapter->itr + (new_itr >> 2), new_itr) :
2837 new_itr;
2838 adapter->itr = new_itr;
1dc32918 2839 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2840 }
2841
2842 return;
2843}
2844
1da177e4
LT		 2845#define E1000_TX_FLAGS_CSUM 0x00000001
2846#define E1000_TX_FLAGS_VLAN 0x00000002
2847#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2848#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2849#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2850#define E1000_TX_FLAGS_VLAN_SHIFT 16
2851
64798845
JP		 2852static int e1000_tso(struct e1000_adapter *adapter,
2853 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2854{
1da177e4 2855 struct e1000_context_desc *context_desc;
545c67c0 2856 struct e1000_buffer *buffer_info;
1da177e4 2857 unsigned int i;
406874a7
JP		 2858 u32 cmd_length = 0;
2859 u16 ipcse = 0, tucse, mss;
2860 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2861 int err;
2862
89114afd 2863 if (skb_is_gso(skb)) {
1da177e4
LT		 2864 if (skb_header_cloned(skb)) {
2865 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2866 if (err)
2867 return err;
2868 }
2869
ab6a5bb6 2870 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2871 mss = skb_shinfo(skb)->gso_size;
60828236 2872 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2873 struct iphdr *iph = ip_hdr(skb);
2874 iph->tot_len = 0;
2875 iph->check = 0;
aa8223c7
ACM		 2876 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2877 iph->daddr, 0,
2878 IPPROTO_TCP,
2879 0);
2d7edb92 2880 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2881 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2882 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2883 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2884 tcp_hdr(skb)->check =
0660e03f
ACM		 2885 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2886 &ipv6_hdr(skb)->daddr,
2887 0, IPPROTO_TCP, 0);
2d7edb92 2888 ipcse = 0;
2d7edb92 2889 }
bbe735e4 2890 ipcss = skb_network_offset(skb);
eddc9ec5 2891 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2892 tucss = skb_transport_offset(skb);
aa8223c7 2893 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2894 tucse = 0;
2895
2896 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2897 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2898
581d708e
MC		 2899 i = tx_ring->next_to_use;
2900 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2901 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2902
2903 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2904 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2905 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2906 context_desc->upper_setup.tcp_fields.tucss = tucss;
2907 context_desc->upper_setup.tcp_fields.tucso = tucso;
2908 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2909 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2910 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2911 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2912
545c67c0 2913 buffer_info->time_stamp = jiffies;
a9ebadd6 2914 buffer_info->next_to_watch = i;
545c67c0 2915
581d708e
MC		 2916 if (++i == tx_ring->count) i = 0;
2917 tx_ring->next_to_use = i;
1da177e4 2918
c3033b01 2919 return true;
1da177e4 2920 }
c3033b01 2921 return false;
1da177e4
LT		 2922}
2923
64798845
JP		 2924static bool e1000_tx_csum(struct e1000_adapter *adapter,
2925 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2926{
2927 struct e1000_context_desc *context_desc;
545c67c0 2928 struct e1000_buffer *buffer_info;
1da177e4 2929 unsigned int i;
406874a7 2930 u8 css;
3ed30676 2931 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2932
3ed30676
DG		 2933 if (skb->ip_summed != CHECKSUM_PARTIAL)
2934 return false;
1da177e4 2935
3ed30676 2936 switch (skb->protocol) {
09640e63 2937 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2938 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2939 cmd_len |= E1000_TXD_CMD_TCP;
2940 break;
09640e63 2941 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2942 /* XXX not handling all IPV6 headers */
2943 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2944 cmd_len |= E1000_TXD_CMD_TCP;
2945 break;
2946 default:
2947 if (unlikely(net_ratelimit()))
2948 DPRINTK(DRV, WARNING,
2949 "checksum_partial proto=%x!\n", skb->protocol);
2950 break;
2951 }
1da177e4 2952
3ed30676 2953 css = skb_transport_offset(skb);
1da177e4 2954
3ed30676
DG		 2955 i = tx_ring->next_to_use;
2956 buffer_info = &tx_ring->buffer_info[i];
2957 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2958
3ed30676
DG		 2959 context_desc->lower_setup.ip_config = 0;
2960 context_desc->upper_setup.tcp_fields.tucss = css;
2961 context_desc->upper_setup.tcp_fields.tucso =
2962 css + skb->csum_offset;
2963 context_desc->upper_setup.tcp_fields.tucse = 0;
2964 context_desc->tcp_seg_setup.data = 0;
2965 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2966
3ed30676
DG		 2967 buffer_info->time_stamp = jiffies;
2968 buffer_info->next_to_watch = i;
1da177e4 2969
3ed30676
DG		 2970 if (unlikely(++i == tx_ring->count)) i = 0;
2971 tx_ring->next_to_use = i;
2972
2973 return true;
1da177e4
LT		 2974}
2975
2976#define E1000_MAX_TXD_PWR 12
2977#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2978
64798845
JP		 2979static int e1000_tx_map(struct e1000_adapter *adapter,
2980 struct e1000_tx_ring *tx_ring,
2981 struct sk_buff *skb, unsigned int first,
2982 unsigned int max_per_txd, unsigned int nr_frags,
2983 unsigned int mss)
1da177e4 2984{
1dc32918 2985 struct e1000_hw *hw = &adapter->hw;
37e73df8 2986 struct e1000_buffer *buffer_info;
d20b606c
JB		 2987 unsigned int len = skb_headlen(skb);
2988 unsigned int offset, size, count = 0, i;
1da177e4 2989 unsigned int f;
37e73df8 2990 dma_addr_t *map;
1da177e4
LT		 2991
2992 i = tx_ring->next_to_use;
2993
d20b606c
JB		 2994 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
2995 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
37e73df8 2996 return 0;
d20b606c
JB		 2997 }
2998
37e73df8 2999 map = skb_shinfo(skb)->dma_maps;
d20b606c
JB		 3000 offset = 0;
3001
96838a40 3002 while (len) {
37e73df8 3003 buffer_info = &tx_ring->buffer_info[i];
1da177e4 3004 size = min(len, max_per_txd);
fd803241
JK		 3005 /* Workaround for Controller erratum --
3006 * descriptor for non-tso packet in a linear SKB that follows a
3007 * tso gets written back prematurely before the data is fully
0f15a8fa 3008 * DMA'd to the controller */
fd803241 3009 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 3010 !skb_is_gso(skb)) {
fd803241
JK		 3011 tx_ring->last_tx_tso = 0;
3012 size -= 4;
3013 }
3014
1da177e4
LT		 3015 /* Workaround for premature desc write-backs
3016 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3017 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 3018 size -= 4;
97338bde
MC		 3019 /* work-around for errata 10 and it applies
3020 * to all controllers in PCI-X mode
3021 * The fix is to make sure that the first descriptor of a
3022 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3023 */
1dc32918 3024 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3025 (size > 2015) && count == 0))
3026 size = 2015;
96838a40 3027
1da177e4
LT		 3028 /* Workaround for potential 82544 hang in PCI-X. Avoid
3029 * terminating buffers within evenly-aligned dwords. */
96838a40 3030 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3031 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3032 size > 4))
3033 size -= 4;
3034
3035 buffer_info->length = size;
042a53a9 3036 buffer_info->dma = skb_shinfo(skb)->dma_head + offset;
1da177e4 3037 buffer_info->time_stamp = jiffies;
a9ebadd6 3038 buffer_info->next_to_watch = i;
1da177e4
LT		 3039
3040 len -= size;
3041 offset += size;
3042 count++;
37e73df8
AD		 3043 if (len) {
3044 i++;
3045 if (unlikely(i == tx_ring->count))
3046 i = 0;
3047 }
1da177e4
LT		 3048 }
3049
96838a40 3050 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 3051 struct skb_frag_struct *frag;
3052
3053 frag = &skb_shinfo(skb)->frags[f];
3054 len = frag->size;
d20b606c 3055 offset = 0;
1da177e4 3056
96838a40 3057 while (len) {
37e73df8
AD		 3058 i++;
3059 if (unlikely(i == tx_ring->count))
3060 i = 0;
3061
1da177e4
LT		 3062 buffer_info = &tx_ring->buffer_info[i];
3063 size = min(len, max_per_txd);
1da177e4
LT		 3064 /* Workaround for premature desc write-backs
3065 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3066 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 3067 size -= 4;
1da177e4
LT		 3068 /* Workaround for potential 82544 hang in PCI-X.
3069 * Avoid terminating buffers within evenly-aligned
3070 * dwords. */
96838a40 3071 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3072 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3073 size > 4))
3074 size -= 4;
3075
3076 buffer_info->length = size;
042a53a9 3077 buffer_info->dma = map[f] + offset;
1da177e4 3078 buffer_info->time_stamp = jiffies;
a9ebadd6 3079 buffer_info->next_to_watch = i;
1da177e4
LT		 3080
3081 len -= size;
3082 offset += size;
3083 count++;
1da177e4
LT		 3084 }
3085 }
3086
1da177e4
LT		 3087 tx_ring->buffer_info[i].skb = skb;
3088 tx_ring->buffer_info[first].next_to_watch = i;
3089
3090 return count;
3091}
3092
64798845
JP		 3093static void e1000_tx_queue(struct e1000_adapter *adapter,
3094 struct e1000_tx_ring *tx_ring, int tx_flags,
3095 int count)
1da177e4 3096{
1dc32918 3097 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3098 struct e1000_tx_desc *tx_desc = NULL;
3099 struct e1000_buffer *buffer_info;
406874a7 3100 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 3101 unsigned int i;
3102
96838a40 3103 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3104 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3105 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3106 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3107
96838a40 3108 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3109 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3110 }
3111
96838a40 3112 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3113 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3114 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3115 }
3116
96838a40 3117 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3118 txd_lower |= E1000_TXD_CMD_VLE;
3119 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3120 }
3121
3122 i = tx_ring->next_to_use;
3123
96838a40 3124 while (count--) {
1da177e4
LT		 3125 buffer_info = &tx_ring->buffer_info[i];
3126 tx_desc = E1000_TX_DESC(*tx_ring, i);
3127 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3128 tx_desc->lower.data =
3129 cpu_to_le32(txd_lower | buffer_info->length);
3130 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3131 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3132 }
3133
3134 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3135
3136 /* Force memory writes to complete before letting h/w
3137 * know there are new descriptors to fetch. (Only
3138 * applicable for weak-ordered memory model archs,
3139 * such as IA-64). */
3140 wmb();
3141
3142 tx_ring->next_to_use = i;
1dc32918 3143 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 3144 /* we need this if more than one processor can write to our tail
3145 * at a time, it syncronizes IO on IA64/Altix systems */
3146 mmiowb();
1da177e4
LT		 3147}
3148
3149/**
3150 * 82547 workaround to avoid controller hang in half-duplex environment.
3151 * The workaround is to avoid queuing a large packet that would span
3152 * the internal Tx FIFO ring boundary by notifying the stack to resend
3153 * the packet at a later time. This gives the Tx FIFO an opportunity to
3154 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3155 * to the beginning of the Tx FIFO.
3156 **/
3157
3158#define E1000_FIFO_HDR 0x10
3159#define E1000_82547_PAD_LEN 0x3E0
3160
64798845
JP		 3161static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3162 struct sk_buff *skb)
1da177e4 3163{
406874a7
JP		 3164 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3165 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3166
9099cfb9 3167 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3168
96838a40 3169 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3170 goto no_fifo_stall_required;
3171
96838a40 3172 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3173 return 1;
3174
96838a40 3175 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3176 atomic_set(&adapter->tx_fifo_stall, 1);
3177 return 1;
3178 }
3179
3180no_fifo_stall_required:
3181 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3182 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3183 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3184 return 0;
3185}
3186
2d7edb92 3187#define MINIMUM_DHCP_PACKET_SIZE 282
64798845
JP		 3188static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3189 struct sk_buff *skb)
2d7edb92
MC		 3190{
3191 struct e1000_hw *hw = &adapter->hw;
406874a7 3192 u16 length, offset;
96838a40 3193 if (vlan_tx_tag_present(skb)) {
1dc32918
JP		 3194 if (!((vlan_tx_tag_get(skb) == hw->mng_cookie.vlan_id) &&
3195 ( hw->mng_cookie.status &
2d7edb92
MC		 3196 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3197 return 0;
3198 }
20a44028 3199 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
e982f17c 3200 struct ethhdr *eth = (struct ethhdr *)skb->data;
96838a40
JB		 3201 if ((htons(ETH_P_IP) == eth->h_proto)) {
3202 const struct iphdr *ip =
406874a7 3203 (struct iphdr *)((u8 *)skb->data+14);
96838a40
JB		 3204 if (IPPROTO_UDP == ip->protocol) {
3205 struct udphdr *udp =
406874a7 3206 (struct udphdr *)((u8 *)ip +
2d7edb92 3207 (ip->ihl << 2));
96838a40 3208 if (ntohs(udp->dest) == 67) {
406874a7 3209 offset = (u8 *)udp + 8 - skb->data;
2d7edb92
MC		 3210 length = skb->len - offset;
3211
3212 return e1000_mng_write_dhcp_info(hw,
406874a7 3213 (u8 *)udp + 8,
2d7edb92
MC		 3214 length);
3215 }
3216 }
3217 }
3218 }
3219 return 0;
3220}
3221
65c7973f
JB		 3222static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3223{
3224 struct e1000_adapter *adapter = netdev_priv(netdev);
3225 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3226
3227 netif_stop_queue(netdev);
3228 /* Herbert's original patch had:
3229 * smp_mb__after_netif_stop_queue();
3230 * but since that doesn't exist yet, just open code it. */
3231 smp_mb();
3232
3233 /* We need to check again in a case another CPU has just
3234 * made room available. */
3235 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3236 return -EBUSY;
3237
3238 /* A reprieve! */
3239 netif_start_queue(netdev);
fcfb1224 3240 ++adapter->restart_queue;
65c7973f
JB		 3241 return 0;
3242}
3243
3244static int e1000_maybe_stop_tx(struct net_device *netdev,
3245 struct e1000_tx_ring *tx_ring, int size)
3246{
3247 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3248 return 0;
3249 return __e1000_maybe_stop_tx(netdev, size);
3250}
3251
1da177e4 3252#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 3253static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
3254 struct net_device *netdev)
1da177e4 3255{
60490fe0 3256 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3257 struct e1000_hw *hw = &adapter->hw;
581d708e 3258 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3259 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3260 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3261 unsigned int tx_flags = 0;
6d1e3aa7 3262 unsigned int len = skb->len - skb->data_len;
6d1e3aa7
KK		 3263 unsigned int nr_frags;
3264 unsigned int mss;
1da177e4 3265 int count = 0;
76c224bc 3266 int tso;
1da177e4 3267 unsigned int f;
1da177e4 3268
65c7973f
JB		 3269 /* This goes back to the question of how to logically map a tx queue
3270 * to a flow. Right now, performance is impacted slightly negatively
3271 * if using multiple tx queues. If the stack breaks away from a
3272 * single qdisc implementation, we can look at this again. */
581d708e 3273 tx_ring = adapter->tx_ring;
24025e4e 3274
581d708e 3275 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3276 dev_kfree_skb_any(skb);
3277 return NETDEV_TX_OK;
3278 }
3279
032fe6e9
JB		 3280 /* 82571 and newer doesn't need the workaround that limited descriptor
3281 * length to 4kB */
1dc32918 3282 if (hw->mac_type >= e1000_82571)
032fe6e9
JB		 3283 max_per_txd = 8192;
3284
7967168c 3285 mss = skb_shinfo(skb)->gso_size;
76c224bc 3286 /* The controller does a simple calculation to
1da177e4
LT		 3287 * make sure there is enough room in the FIFO before
3288 * initiating the DMA for each buffer. The calc is:
3289 * 4 = ceil(buffer len/mss). To make sure we don't
3290 * overrun the FIFO, adjust the max buffer len if mss
3291 * drops. */
96838a40 3292 if (mss) {
406874a7 3293 u8 hdr_len;
1da177e4
LT		 3294 max_per_txd = min(mss << 2, max_per_txd);
3295 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3296
90fb5135
AK		 3297 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3298 * points to just header, pull a few bytes of payload from
3299 * frags into skb->data */
ab6a5bb6 3300 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3301 if (skb->data_len && hdr_len == len) {
1dc32918 3302 switch (hw->mac_type) {
9f687888 3303 unsigned int pull_size;
683a2aa3
HX		 3304 case e1000_82544:
3305 /* Make sure we have room to chop off 4 bytes,
3306 * and that the end alignment will work out to
3307 * this hardware's requirements
3308 * NOTE: this is a TSO only workaround
3309 * if end byte alignment not correct move us
3310 * into the next dword */
27a884dc 3311 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3312 break;
3313 /* fall through */
9f687888
JK		 3314 case e1000_82571:
3315 case e1000_82572:
3316 case e1000_82573:
cd94dd0b 3317 case e1000_ich8lan:
9f687888
JK		 3318 pull_size = min((unsigned int)4, skb->data_len);
3319 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3320 DPRINTK(DRV, ERR,
9f687888
JK		 3321 "__pskb_pull_tail failed.\n");
3322 dev_kfree_skb_any(skb);
749dfc70 3323 return NETDEV_TX_OK;
9f687888
JK		 3324 }
3325 len = skb->len - skb->data_len;
3326 break;
3327 default:
3328 /* do nothing */
3329 break;
d74bbd3b 3330 }
9a3056da 3331 }
1da177e4
LT		 3332 }
3333
9a3056da 3334 /* reserve a descriptor for the offload context */
84fa7933 3335 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3336 count++;
2648345f 3337 count++;
fd803241 3338
fd803241 3339 /* Controller Erratum workaround */
89114afd 3340 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3341 count++;
fd803241 3342
1da177e4
LT		 3343 count += TXD_USE_COUNT(len, max_txd_pwr);
3344
96838a40 3345 if (adapter->pcix_82544)
1da177e4
LT		 3346 count++;
3347
96838a40 3348 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3349 * in PCI-X mode, so add one more descriptor to the count
3350 */
1dc32918 3351 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3352 (len > 2015)))
3353 count++;
3354
1da177e4 3355 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3356 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3357 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3358 max_txd_pwr);
96838a40 3359 if (adapter->pcix_82544)
1da177e4
LT		 3360 count += nr_frags;
3361
0f15a8fa 3362
1dc32918
JP		 3363 if (hw->tx_pkt_filtering &&
3364 (hw->mac_type == e1000_82573))
2d7edb92
MC		 3365 e1000_transfer_dhcp_info(adapter, skb);
3366
1da177e4
LT		 3367 /* need: count + 2 desc gap to keep tail from touching
3368 * head, otherwise try next time */
8017943e 3369 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3370 return NETDEV_TX_BUSY;
1da177e4 3371
1dc32918 3372 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3373 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3374 netif_stop_queue(netdev);
1314bbf3 3375 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
1da177e4
LT		 3376 return NETDEV_TX_BUSY;
3377 }
3378 }
3379
96838a40 3380 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3381 tx_flags |= E1000_TX_FLAGS_VLAN;
3382 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3383 }
3384
581d708e 3385 first = tx_ring->next_to_use;
96838a40 3386
581d708e 3387 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3388 if (tso < 0) {
3389 dev_kfree_skb_any(skb);
3390 return NETDEV_TX_OK;
3391 }
3392
fd803241
JK		 3393 if (likely(tso)) {
3394 tx_ring->last_tx_tso = 1;
1da177e4 3395 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3396 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3397 tx_flags |= E1000_TX_FLAGS_CSUM;
3398
2d7edb92 3399 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3400 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3401 * no longer assume, we must. */
60828236 3402 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3403 tx_flags |= E1000_TX_FLAGS_IPV4;
3404
37e73df8
AD		 3405 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3406 nr_frags, mss);
1da177e4 3407
37e73df8
AD		 3408 if (count) {
3409 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3410 /* Make sure there is space in the ring for the next send. */
3411 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3412
37e73df8
AD		 3413 } else {
3414 dev_kfree_skb_any(skb);
3415 tx_ring->buffer_info[first].time_stamp = 0;
3416 tx_ring->next_to_use = first;
3417 }
1da177e4 3418
1da177e4
LT		 3419 return NETDEV_TX_OK;
3420}
3421
3422/**
3423 * e1000_tx_timeout - Respond to a Tx Hang
3424 * @netdev: network interface device structure
3425 **/
3426
64798845 3427static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3428{
60490fe0 3429 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3430
3431 /* Do the reset outside of interrupt context */
87041639
JK		 3432 adapter->tx_timeout_count++;
3433 schedule_work(&adapter->reset_task);
1da177e4
LT		 3434}
3435
64798845 3436static void e1000_reset_task(struct work_struct *work)
1da177e4 3437{
65f27f38
DH		 3438 struct e1000_adapter *adapter =
3439 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3440
2db10a08 3441 e1000_reinit_locked(adapter);
1da177e4
LT		 3442}
3443
3444/**
3445 * e1000_get_stats - Get System Network Statistics
3446 * @netdev: network interface device structure
3447 *
3448 * Returns the address of the device statistics structure.
3449 * The statistics are actually updated from the timer callback.
3450 **/
3451
64798845 3452static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3453{
60490fe0 3454 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3455
6b7660cd 3456 /* only return the current stats */
1da177e4
LT		 3457 return &adapter->net_stats;
3458}
3459
3460/**
3461 * e1000_change_mtu - Change the Maximum Transfer Unit
3462 * @netdev: network interface device structure
3463 * @new_mtu: new value for maximum frame size
3464 *
3465 * Returns 0 on success, negative on failure
3466 **/
3467
64798845 3468static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3469{
60490fe0 3470 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3471 struct e1000_hw *hw = &adapter->hw;
1da177e4 3472 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
406874a7 3473 u16 eeprom_data = 0;
1da177e4 3474
96838a40
JB		 3475 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3476 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3477 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3478 return -EINVAL;
2d7edb92 3479 }
1da177e4 3480
997f5cbd 3481 /* Adapter-specific max frame size limits. */
1dc32918 3482 switch (hw->mac_type) {
9e2feace 3483 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3484 case e1000_ich8lan:
b7cb8c2c 3485 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
997f5cbd 3486 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3487 return -EINVAL;
2d7edb92 3488 }
997f5cbd 3489 break;
85b22eb6 3490 case e1000_82573:
249d71d6
BA		 3491 /* Jumbo Frames not supported if:
3492 * - this is not an 82573L device
3493 * - ASPM is enabled in any way (0x1A bits 3:2) */
1dc32918 3494 e1000_read_eeprom(hw, EEPROM_INIT_3GIO_3, 1,
85b22eb6 3495 &eeprom_data);
1dc32918 3496 if ((hw->device_id != E1000_DEV_ID_82573L) ||
249d71d6 3497 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
b7cb8c2c 3498 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
85b22eb6
JK		 3499 DPRINTK(PROBE, ERR,
3500 "Jumbo Frames not supported.\n");
3501 return -EINVAL;
3502 }
3503 break;
3504 }
249d71d6
BA		 3505 /* ERT will be enabled later to enable wire speed receives */
3506
85b22eb6 3507 /* fall through to get support */
997f5cbd
JK		 3508 case e1000_82571:
3509 case e1000_82572:
87041639 3510 case e1000_80003es2lan:
997f5cbd
JK		 3511#define MAX_STD_JUMBO_FRAME_SIZE 9234
3512 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3513 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3514 return -EINVAL;
3515 }
3516 break;
3517 default:
3518 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3519 break;
1da177e4
LT		 3520 }
3521
87f5032e 3522 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3523 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3524 * larger slab size.
3525 * i.e. RXBUFFER_2048 --> size-4096 slab
3526 * however with the new *_jumbo_rx* routines, jumbo receives will use
3527 * fragmented skbs */
9e2feace
AK		 3528
3529 if (max_frame <= E1000_RXBUFFER_256)
3530 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3531 else if (max_frame <= E1000_RXBUFFER_512)
3532 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3533 else if (max_frame <= E1000_RXBUFFER_1024)
3534 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3535 else if (max_frame <= E1000_RXBUFFER_2048)
3536 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3537 else
3538#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3539 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3540#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3541 adapter->rx_buffer_len = PAGE_SIZE;
3542#endif
9e2feace
AK		 3543
3544 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3545 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3546 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3547 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3548 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3549
2d7edb92 3550 netdev->mtu = new_mtu;
1dc32918 3551 hw->max_frame_size = max_frame;
2d7edb92 3552
2db10a08
AK		 3553 if (netif_running(netdev))
3554 e1000_reinit_locked(adapter);
1da177e4 3555
1da177e4
LT		 3556 return 0;
3557}
3558
3559/**
3560 * e1000_update_stats - Update the board statistics counters
3561 * @adapter: board private structure
3562 **/
3563
64798845 3564void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4
LT		 3565{
3566 struct e1000_hw *hw = &adapter->hw;
282f33c9 3567 struct pci_dev *pdev = adapter->pdev;
1da177e4 3568 unsigned long flags;
406874a7 3569 u16 phy_tmp;
1da177e4
LT		 3570
3571#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3572
282f33c9
LV		 3573 /*
3574 * Prevent stats update while adapter is being reset, or if the pci
3575 * connection is down.
3576 */
9026729b 3577 if (adapter->link_speed == 0)
282f33c9 3578 return;
81b1955e 3579 if (pci_channel_offline(pdev))
9026729b
AK		 3580 return;
3581
1da177e4
LT		 3582 spin_lock_irqsave(&adapter->stats_lock, flags);
3583
828d055f 3584 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3585 * called from the interrupt context, so they must only
3586 * be written while holding adapter->stats_lock
3587 */
3588
1dc32918
JP		 3589 adapter->stats.crcerrs += er32(CRCERRS);
3590 adapter->stats.gprc += er32(GPRC);
3591 adapter->stats.gorcl += er32(GORCL);
3592 adapter->stats.gorch += er32(GORCH);
3593 adapter->stats.bprc += er32(BPRC);
3594 adapter->stats.mprc += er32(MPRC);
3595 adapter->stats.roc += er32(ROC);
3596
3597 if (hw->mac_type != e1000_ich8lan) {
3598 adapter->stats.prc64 += er32(PRC64);
3599 adapter->stats.prc127 += er32(PRC127);
3600 adapter->stats.prc255 += er32(PRC255);
3601 adapter->stats.prc511 += er32(PRC511);
3602 adapter->stats.prc1023 += er32(PRC1023);
3603 adapter->stats.prc1522 += er32(PRC1522);
3604 }
3605
3606 adapter->stats.symerrs += er32(SYMERRS);
3607 adapter->stats.mpc += er32(MPC);
3608 adapter->stats.scc += er32(SCC);
3609 adapter->stats.ecol += er32(ECOL);
3610 adapter->stats.mcc += er32(MCC);
3611 adapter->stats.latecol += er32(LATECOL);
3612 adapter->stats.dc += er32(DC);
3613 adapter->stats.sec += er32(SEC);
3614 adapter->stats.rlec += er32(RLEC);
3615 adapter->stats.xonrxc += er32(XONRXC);
3616 adapter->stats.xontxc += er32(XONTXC);
3617 adapter->stats.xoffrxc += er32(XOFFRXC);
3618 adapter->stats.xofftxc += er32(XOFFTXC);
3619 adapter->stats.fcruc += er32(FCRUC);
3620 adapter->stats.gptc += er32(GPTC);
3621 adapter->stats.gotcl += er32(GOTCL);
3622 adapter->stats.gotch += er32(GOTCH);
3623 adapter->stats.rnbc += er32(RNBC);
3624 adapter->stats.ruc += er32(RUC);
3625 adapter->stats.rfc += er32(RFC);
3626 adapter->stats.rjc += er32(RJC);
3627 adapter->stats.torl += er32(TORL);
3628 adapter->stats.torh += er32(TORH);
3629 adapter->stats.totl += er32(TOTL);
3630 adapter->stats.toth += er32(TOTH);
3631 adapter->stats.tpr += er32(TPR);
3632
3633 if (hw->mac_type != e1000_ich8lan) {
3634 adapter->stats.ptc64 += er32(PTC64);
3635 adapter->stats.ptc127 += er32(PTC127);
3636 adapter->stats.ptc255 += er32(PTC255);
3637 adapter->stats.ptc511 += er32(PTC511);
3638 adapter->stats.ptc1023 += er32(PTC1023);
3639 adapter->stats.ptc1522 += er32(PTC1522);
3640 }
3641
3642 adapter->stats.mptc += er32(MPTC);
3643 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3644
3645 /* used for adaptive IFS */
3646
1dc32918 3647 hw->tx_packet_delta = er32(TPT);
1da177e4 3648 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3649 hw->collision_delta = er32(COLC);
1da177e4
LT		 3650 adapter->stats.colc += hw->collision_delta;
3651
96838a40 3652 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3653 adapter->stats.algnerrc += er32(ALGNERRC);
3654 adapter->stats.rxerrc += er32(RXERRC);
3655 adapter->stats.tncrs += er32(TNCRS);
3656 adapter->stats.cexterr += er32(CEXTERR);
3657 adapter->stats.tsctc += er32(TSCTC);
3658 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4 3659 }
96838a40 3660 if (hw->mac_type > e1000_82547_rev_2) {
1dc32918
JP		 3661 adapter->stats.iac += er32(IAC);
3662 adapter->stats.icrxoc += er32(ICRXOC);
3663
3664 if (hw->mac_type != e1000_ich8lan) {
3665 adapter->stats.icrxptc += er32(ICRXPTC);
3666 adapter->stats.icrxatc += er32(ICRXATC);
3667 adapter->stats.ictxptc += er32(ICTXPTC);
3668 adapter->stats.ictxatc += er32(ICTXATC);
3669 adapter->stats.ictxqec += er32(ICTXQEC);
3670 adapter->stats.ictxqmtc += er32(ICTXQMTC);
3671 adapter->stats.icrxdmtc += er32(ICRXDMTC);
cd94dd0b 3672 }
2d7edb92 3673 }
1da177e4
LT		 3674
3675 /* Fill out the OS statistics structure */
1da177e4
LT		 3676 adapter->net_stats.multicast = adapter->stats.mprc;
3677 adapter->net_stats.collisions = adapter->stats.colc;
3678
3679 /* Rx Errors */
3680
87041639
JK		 3681 /* RLEC on some newer hardware can be incorrect so build
3682 * our own version based on RUC and ROC */
1da177e4
LT		 3683 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3684 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3685 adapter->stats.ruc + adapter->stats.roc +
3686 adapter->stats.cexterr;
49559854
MW		 3687 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3688 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3689 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3690 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3691 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3692
3693 /* Tx Errors */
49559854
MW		 3694 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3695 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3696 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3697 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3698 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3699 if (hw->bad_tx_carr_stats_fd &&
167fb284
JG		 3700 adapter->link_duplex == FULL_DUPLEX) {
3701 adapter->net_stats.tx_carrier_errors = 0;
3702 adapter->stats.tncrs = 0;
3703 }
1da177e4
LT		 3704
3705 /* Tx Dropped needs to be maintained elsewhere */
3706
3707 /* Phy Stats */
96838a40
JB		 3708 if (hw->media_type == e1000_media_type_copper) {
3709 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3710 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3711 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3712 adapter->phy_stats.idle_errors += phy_tmp;
3713 }
3714
96838a40 3715 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3716 (hw->phy_type == e1000_phy_m88) &&
3717 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3718 adapter->phy_stats.receive_errors += phy_tmp;
3719 }
3720
15e376b4 3721 /* Management Stats */
1dc32918
JP		 3722 if (hw->has_smbus) {
3723 adapter->stats.mgptc += er32(MGTPTC);
3724 adapter->stats.mgprc += er32(MGTPRC);
3725 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3726 }
3727
1da177e4
LT		 3728 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3729}
9ac98284
JB		 3730
3731/**
3732 * e1000_intr_msi - Interrupt Handler
3733 * @irq: interrupt number
3734 * @data: pointer to a network interface device structure
3735 **/
3736
64798845 3737static irqreturn_t e1000_intr_msi(int irq, void *data)
9ac98284
JB		 3738{
3739 struct net_device *netdev = data;
3740 struct e1000_adapter *adapter = netdev_priv(netdev);
3741 struct e1000_hw *hw = &adapter->hw;
1dc32918 3742 u32 icr = er32(ICR);
9ac98284 3743
9150b76a
JB		 3744 /* in NAPI mode read ICR disables interrupts using IAM */
3745
b5fc8f0c
JB		 3746 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3747 hw->get_link_status = 1;
3748 /* 80003ES2LAN workaround-- For packet buffer work-around on
3749 * link down event; disable receives here in the ISR and reset
3750 * adapter in watchdog */
3751 if (netif_carrier_ok(netdev) &&
1dc32918 3752 (hw->mac_type == e1000_80003es2lan)) {
b5fc8f0c 3753 /* disable receives */
1dc32918
JP		 3754 u32 rctl = er32(RCTL);
3755 ew32(RCTL, rctl & ~E1000_RCTL_EN);
9ac98284 3756 }
b5fc8f0c
JB		 3757 /* guard against interrupt when we're going down */
3758 if (!test_bit(__E1000_DOWN, &adapter->flags))
3759 mod_timer(&adapter->watchdog_timer, jiffies + 1);
9ac98284
JB		 3760 }
3761
288379f0 3762 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3763 adapter->total_tx_bytes = 0;
3764 adapter->total_tx_packets = 0;
3765 adapter->total_rx_bytes = 0;
3766 adapter->total_rx_packets = 0;
288379f0 3767 __napi_schedule(&adapter->napi);
835bb129 3768 } else
9ac98284 3769 e1000_irq_enable(adapter);
9ac98284
JB		 3770
3771 return IRQ_HANDLED;
3772}
1da177e4
LT		 3773
3774/**
3775 * e1000_intr - Interrupt Handler
3776 * @irq: interrupt number
3777 * @data: pointer to a network interface device structure
1da177e4
LT		 3778 **/
3779
64798845 3780static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3781{
3782 struct net_device *netdev = data;
60490fe0 3783 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3784 struct e1000_hw *hw = &adapter->hw;
1dc32918 3785 u32 rctl, icr = er32(ICR);
c3570acb 3786
e151a60a 3787 if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags)))
835bb129
JB		 3788 return IRQ_NONE; /* Not our interrupt */
3789
835bb129
JB		 3790 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3791 * not set, then the adapter didn't send an interrupt */
3792 if (unlikely(hw->mac_type >= e1000_82571 &&
3793 !(icr & E1000_ICR_INT_ASSERTED)))
3794 return IRQ_NONE;
3795
9150b76a
JB		 3796 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3797 * need for the IMC write */
1da177e4 3798
96838a40 3799 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3800 hw->get_link_status = 1;
87041639
JK		 3801 /* 80003ES2LAN workaround--
3802 * For packet buffer work-around on link down event;
3803 * disable receives here in the ISR and
3804 * reset adapter in watchdog
3805 */
3806 if (netif_carrier_ok(netdev) &&
1dc32918 3807 (hw->mac_type == e1000_80003es2lan)) {
87041639 3808 /* disable receives */
1dc32918
JP		 3809 rctl = er32(RCTL);
3810 ew32(RCTL, rctl & ~E1000_RCTL_EN);
87041639 3811 }
1314bbf3
AK		 3812 /* guard against interrupt when we're going down */
3813 if (!test_bit(__E1000_DOWN, &adapter->flags))
3814 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3815 }
3816
1e613fd9 3817 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3818 /* disable interrupts, without the synchronize_irq bit */
1dc32918
JP		 3819 ew32(IMC, ~0);
3820 E1000_WRITE_FLUSH();
1e613fd9 3821 }
288379f0 3822 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3823 adapter->total_tx_bytes = 0;
3824 adapter->total_tx_packets = 0;
3825 adapter->total_rx_bytes = 0;
3826 adapter->total_rx_packets = 0;
288379f0 3827 __napi_schedule(&adapter->napi);
a6c42322 3828 } else {
90fb5135
AK		 3829 /* this really should not happen! if it does it is basically a
3830 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB		 3831 if (!test_bit(__E1000_DOWN, &adapter->flags))
3832 e1000_irq_enable(adapter);
3833 }
1da177e4 3834
1da177e4
LT		 3835 return IRQ_HANDLED;
3836}
3837
1da177e4
LT		 3838/**
3839 * e1000_clean - NAPI Rx polling callback
3840 * @adapter: board private structure
3841 **/
64798845 3842static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3843{
bea3348e
SH		 3844 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3845 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 3846 int tx_cleaned = 0, work_done = 0;
581d708e 3847
4cf1653a 3848 adapter = netdev_priv(poll_dev);
581d708e 3849
8017943e 3850 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3851
d3d9e484 3852 adapter->clean_rx(adapter, &adapter->rx_ring[0],
bea3348e 3853 &work_done, budget);
96838a40 3854
ccfb342c 3855 if (!tx_cleaned)
d2c7ddd6
DM		 3856 work_done = budget;
3857
53e52c72
DM		 3858 /* If budget not fully consumed, exit the polling mode */
3859 if (work_done < budget) {
835bb129
JB		 3860 if (likely(adapter->itr_setting & 3))
3861 e1000_set_itr(adapter);
288379f0 3862 napi_complete(napi);
a6c42322
JB		 3863 if (!test_bit(__E1000_DOWN, &adapter->flags))
3864 e1000_irq_enable(adapter);
1da177e4
LT		 3865 }
3866
bea3348e 3867 return work_done;
1da177e4
LT		 3868}
3869
1da177e4
LT		 3870/**
3871 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3872 * @adapter: board private structure
3873 **/
64798845
JP		 3874static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3875 struct e1000_tx_ring *tx_ring)
1da177e4 3876{
1dc32918 3877 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3878 struct net_device *netdev = adapter->netdev;
3879 struct e1000_tx_desc *tx_desc, *eop_desc;
3880 struct e1000_buffer *buffer_info;
3881 unsigned int i, eop;
2a1af5d7 3882 unsigned int count = 0;
835bb129 3883 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3884
3885 i = tx_ring->next_to_clean;
3886 eop = tx_ring->buffer_info[i].next_to_watch;
3887 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3888
ccfb342c
AD		 3889 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3890 (count < tx_ring->count)) {
843f4267
JB		 3891 bool cleaned = false;
3892 for ( ; !cleaned; count++) {
1da177e4
LT		 3893 tx_desc = E1000_TX_DESC(*tx_ring, i);
3894 buffer_info = &tx_ring->buffer_info[i];
3895 cleaned = (i == eop);
3896
835bb129 3897 if (cleaned) {
2b65326e 3898 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3899 unsigned int segs, bytecount;
3900 segs = skb_shinfo(skb)->gso_segs ?: 1;
3901 /* multiply data chunks by size of headers */
3902 bytecount = ((segs - 1) * skb_headlen(skb)) +
3903 skb->len;
2b65326e 3904 total_tx_packets += segs;
7753b171 3905 total_tx_bytes += bytecount;
835bb129 3906 }
fd803241 3907 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3908 tx_desc->upper.data = 0;
1da177e4 3909
96838a40 3910 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3911 }
581d708e 3912
1da177e4
LT		 3913 eop = tx_ring->buffer_info[i].next_to_watch;
3914 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3915 }
3916
3917 tx_ring->next_to_clean = i;
3918
77b2aad5 3919#define TX_WAKE_THRESHOLD 32
843f4267 3920 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3921 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3922 /* Make sure that anybody stopping the queue after this
3923 * sees the new next_to_clean.
3924 */
3925 smp_mb();
fcfb1224 3926 if (netif_queue_stopped(netdev)) {
77b2aad5 3927 netif_wake_queue(netdev);
fcfb1224
JB		 3928 ++adapter->restart_queue;
3929 }
77b2aad5 3930 }
2648345f 3931
581d708e 3932 if (adapter->detect_tx_hung) {
2648345f 3933 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3934 * check with the clearing of time_stamp and movement of i */
c3033b01 3935 adapter->detect_tx_hung = false;
ccfb342c
AD		 3936 if (tx_ring->buffer_info[i].time_stamp &&
3937 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
7e6c9861 3938 (adapter->tx_timeout_factor * HZ))
1dc32918 3939 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3940
3941 /* detected Tx unit hang */
c6963ef5 3942 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3943 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3944 " TDH <%x>\n"
3945 " TDT <%x>\n"
3946 " next_to_use <%x>\n"
3947 " next_to_clean <%x>\n"
3948 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3949 " time_stamp <%lx>\n"
3950 " next_to_watch <%x>\n"
3951 " jiffies <%lx>\n"
3952 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3953 (unsigned long)((tx_ring - adapter->tx_ring) /
3954 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3955 readl(hw->hw_addr + tx_ring->tdh),
3956 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3957 tx_ring->next_to_use,
392137fa 3958 tx_ring->next_to_clean,
ccfb342c 3959 tx_ring->buffer_info[i].time_stamp,
70b8f1e1
MC		 3960 eop,
3961 jiffies,
3962 eop_desc->upper.fields.status);
1da177e4 3963 netif_stop_queue(netdev);
70b8f1e1 3964 }
1da177e4 3965 }
835bb129
JB		 3966 adapter->total_tx_bytes += total_tx_bytes;
3967 adapter->total_tx_packets += total_tx_packets;
ef90e4ec
AK		 3968 adapter->net_stats.tx_bytes += total_tx_bytes;
3969 adapter->net_stats.tx_packets += total_tx_packets;
ccfb342c 3970 return (count < tx_ring->count);
1da177e4
LT		 3971}
3972
3973/**
3974 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3975 * @adapter: board private structure
3976 * @status_err: receive descriptor status and error fields
3977 * @csum: receive descriptor csum field
3978 * @sk_buff: socket buffer with received data
1da177e4
LT		 3979 **/
3980
64798845
JP		 3981static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3982 u32 csum, struct sk_buff *skb)
1da177e4 3983{
1dc32918 3984 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3985 u16 status = (u16)status_err;
3986 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3987 skb->ip_summed = CHECKSUM_NONE;
3988
1da177e4 3989 /* 82543 or newer only */
1dc32918 3990 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3991 /* Ignore Checksum bit is set */
96838a40 3992 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3993 /* TCP/UDP checksum error bit is set */
96838a40 3994 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3995 /* let the stack verify checksum errors */
1da177e4 3996 adapter->hw_csum_err++;
2d7edb92
MC		 3997 return;
3998 }
3999 /* TCP/UDP Checksum has not been calculated */
1dc32918 4000 if (hw->mac_type <= e1000_82547_rev_2) {
96838a40 4001 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 4002 return;
1da177e4 4003 } else {
96838a40 4004 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 4005 return;
4006 }
4007 /* It must be a TCP or UDP packet with a valid checksum */
4008 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 4009 /* TCP checksum is good */
4010 skb->ip_summed = CHECKSUM_UNNECESSARY;
1dc32918 4011 } else if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 4012 /* IP fragment with UDP payload */
4013 /* Hardware complements the payload checksum, so we undo it
4014 * and then put the value in host order for further stack use.
4015 */
3e18826c
AV		 4016 __sum16 sum = (__force __sum16)htons(csum);
4017 skb->csum = csum_unfold(~sum);
84fa7933 4018 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 4019 }
2d7edb92 4020 adapter->hw_csum_good++;
1da177e4
LT		 4021}
4022
edbbb3ca
JB		 4023/**
4024 * e1000_consume_page - helper function
4025 **/
4026static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
4027 u16 length)
4028{
4029 bi->page = NULL;
4030 skb->len += length;
4031 skb->data_len += length;
4032 skb->truesize += length;
4033}
4034
4035/**
4036 * e1000_receive_skb - helper function to handle rx indications
4037 * @adapter: board private structure
4038 * @status: descriptor status field as written by hardware
4039 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
4040 * @skb: pointer to sk_buff to be indicated to stack
4041 */
4042static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
4043 __le16 vlan, struct sk_buff *skb)
4044{
4045 if (unlikely(adapter->vlgrp && (status & E1000_RXD_STAT_VP))) {
4046 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4047 le16_to_cpu(vlan) &
4048 E1000_RXD_SPC_VLAN_MASK);
4049 } else {
4050 netif_receive_skb(skb);
4051 }
4052}
4053
4054/**
4055 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
4056 * @adapter: board private structure
4057 * @rx_ring: ring to clean
4058 * @work_done: amount of napi work completed this call
4059 * @work_to_do: max amount of work allowed for this call to do
4060 *
4061 * the return value indicates whether actual cleaning was done, there
4062 * is no guarantee that everything was cleaned
4063 */
4064static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
4065 struct e1000_rx_ring *rx_ring,
4066 int *work_done, int work_to_do)
4067{
4068 struct e1000_hw *hw = &adapter->hw;
4069 struct net_device *netdev = adapter->netdev;
4070 struct pci_dev *pdev = adapter->pdev;
4071 struct e1000_rx_desc *rx_desc, *next_rxd;
4072 struct e1000_buffer *buffer_info, *next_buffer;
4073 unsigned long irq_flags;
4074 u32 length;
4075 unsigned int i;
4076 int cleaned_count = 0;
4077 bool cleaned = false;
4078 unsigned int total_rx_bytes=0, total_rx_packets=0;
4079
4080 i = rx_ring->next_to_clean;
4081 rx_desc = E1000_RX_DESC(*rx_ring, i);
4082 buffer_info = &rx_ring->buffer_info[i];
4083
4084 while (rx_desc->status & E1000_RXD_STAT_DD) {
4085 struct sk_buff *skb;
4086 u8 status;
4087
4088 if (*work_done >= work_to_do)
4089 break;
4090 (*work_done)++;
4091
4092 status = rx_desc->status;
4093 skb = buffer_info->skb;
4094 buffer_info->skb = NULL;
4095
4096 if (++i == rx_ring->count) i = 0;
4097 next_rxd = E1000_RX_DESC(*rx_ring, i);
4098 prefetch(next_rxd);
4099
4100 next_buffer = &rx_ring->buffer_info[i];
4101
4102 cleaned = true;
4103 cleaned_count++;
4104 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
4105 PCI_DMA_FROMDEVICE);
4106 buffer_info->dma = 0;
4107
4108 length = le16_to_cpu(rx_desc->length);
4109
4110 /* errors is only valid for DD + EOP descriptors */
4111 if (unlikely((status & E1000_RXD_STAT_EOP) &&
4112 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
4113 u8 last_byte = *(skb->data + length - 1);
4114 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4115 last_byte)) {
4116 spin_lock_irqsave(&adapter->stats_lock,
4117 irq_flags);
4118 e1000_tbi_adjust_stats(hw, &adapter->stats,
4119 length, skb->data);
4120 spin_unlock_irqrestore(&adapter->stats_lock,
4121 irq_flags);
4122 length--;
4123 } else {
4124 /* recycle both page and skb */
4125 buffer_info->skb = skb;
4126 /* an error means any chain goes out the window
4127 * too */
4128 if (rx_ring->rx_skb_top)
4129 dev_kfree_skb(rx_ring->rx_skb_top);
4130 rx_ring->rx_skb_top = NULL;
4131 goto next_desc;
4132 }
4133 }
4134
4135#define rxtop rx_ring->rx_skb_top
4136 if (!(status & E1000_RXD_STAT_EOP)) {
4137 /* this descriptor is only the beginning (or middle) */
4138 if (!rxtop) {
4139 /* this is the beginning of a chain */
4140 rxtop = skb;
4141 skb_fill_page_desc(rxtop, 0, buffer_info->page,
4142 0, length);
4143 } else {
4144 /* this is the middle of a chain */
4145 skb_fill_page_desc(rxtop,
4146 skb_shinfo(rxtop)->nr_frags,
4147 buffer_info->page, 0, length);
4148 /* re-use the skb, only consumed the page */
4149 buffer_info->skb = skb;
4150 }
4151 e1000_consume_page(buffer_info, rxtop, length);
4152 goto next_desc;
4153 } else {
4154 if (rxtop) {
4155 /* end of the chain */
4156 skb_fill_page_desc(rxtop,
4157 skb_shinfo(rxtop)->nr_frags,
4158 buffer_info->page, 0, length);
4159 /* re-use the current skb, we only consumed the
4160 * page */
4161 buffer_info->skb = skb;
4162 skb = rxtop;
4163 rxtop = NULL;
4164 e1000_consume_page(buffer_info, skb, length);
4165 } else {
4166 /* no chain, got EOP, this buf is the packet
4167 * copybreak to save the put_page/alloc_page */
4168 if (length <= copybreak &&
4169 skb_tailroom(skb) >= length) {
4170 u8 *vaddr;
4171 vaddr = kmap_atomic(buffer_info->page,
4172 KM_SKB_DATA_SOFTIRQ);
4173 memcpy(skb_tail_pointer(skb), vaddr, length);
4174 kunmap_atomic(vaddr,
4175 KM_SKB_DATA_SOFTIRQ);
4176 /* re-use the page, so don't erase
4177 * buffer_info->page */
4178 skb_put(skb, length);
4179 } else {
4180 skb_fill_page_desc(skb, 0,
4181 buffer_info->page, 0,
4182 length);
4183 e1000_consume_page(buffer_info, skb,
4184 length);
4185 }
4186 }
4187 }
4188
4189 /* Receive Checksum Offload XXX recompute due to CRC strip? */
4190 e1000_rx_checksum(adapter,
4191 (u32)(status) |
4192 ((u32)(rx_desc->errors) << 24),
4193 le16_to_cpu(rx_desc->csum), skb);
4194
4195 pskb_trim(skb, skb->len - 4);
4196
4197 /* probably a little skewed due to removing CRC */
4198 total_rx_bytes += skb->len;
4199 total_rx_packets++;
4200
4201 /* eth type trans needs skb->data to point to something */
4202 if (!pskb_may_pull(skb, ETH_HLEN)) {
4203 DPRINTK(DRV, ERR, "pskb_may_pull failed.\n");
4204 dev_kfree_skb(skb);
4205 goto next_desc;
4206 }
4207
4208 skb->protocol = eth_type_trans(skb, netdev);
4209
4210 e1000_receive_skb(adapter, status, rx_desc->special, skb);
4211
4212next_desc:
4213 rx_desc->status = 0;
4214
4215 /* return some buffers to hardware, one at a time is too slow */
4216 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4217 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4218 cleaned_count = 0;
4219 }
4220
4221 /* use prefetched values */
4222 rx_desc = next_rxd;
4223 buffer_info = next_buffer;
4224 }
4225 rx_ring->next_to_clean = i;
4226
4227 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4228 if (cleaned_count)
4229 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4230
4231 adapter->total_rx_packets += total_rx_packets;
4232 adapter->total_rx_bytes += total_rx_bytes;
4233 adapter->net_stats.rx_bytes += total_rx_bytes;
4234 adapter->net_stats.rx_packets += total_rx_packets;
4235 return cleaned;
4236}
4237
1da177e4 4238/**
2d7edb92 4239 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 4240 * @adapter: board private structure
edbbb3ca
JB		 4241 * @rx_ring: ring to clean
4242 * @work_done: amount of napi work completed this call
4243 * @work_to_do: max amount of work allowed for this call to do
4244 */
64798845
JP		 4245static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
4246 struct e1000_rx_ring *rx_ring,
4247 int *work_done, int work_to_do)
1da177e4 4248{
1dc32918 4249 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4250 struct net_device *netdev = adapter->netdev;
4251 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 4252 struct e1000_rx_desc *rx_desc, *next_rxd;
4253 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 4254 unsigned long flags;
406874a7 4255 u32 length;
1da177e4 4256 unsigned int i;
72d64a43 4257 int cleaned_count = 0;
c3033b01 4258 bool cleaned = false;
835bb129 4259 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4260
4261 i = rx_ring->next_to_clean;
4262 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4263 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4264
b92ff8ee 4265 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4266 struct sk_buff *skb;
a292ca6e 4267 u8 status;
90fb5135 4268
96838a40 4269 if (*work_done >= work_to_do)
1da177e4
LT		 4270 break;
4271 (*work_done)++;
c3570acb 4272
a292ca6e 4273 status = rx_desc->status;
b92ff8ee 4274 skb = buffer_info->skb;
86c3d59f
JB		 4275 buffer_info->skb = NULL;
4276
30320be8
JK		 4277 prefetch(skb->data - NET_IP_ALIGN);
4278
86c3d59f
JB		 4279 if (++i == rx_ring->count) i = 0;
4280 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4281 prefetch(next_rxd);
4282
86c3d59f 4283 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4284
c3033b01 4285 cleaned = true;
72d64a43 4286 cleaned_count++;
edbbb3ca 4287 pci_unmap_single(pdev, buffer_info->dma, buffer_info->length,
1da177e4 4288 PCI_DMA_FROMDEVICE);
679be3ba 4289 buffer_info->dma = 0;
1da177e4 4290
1da177e4 4291 length = le16_to_cpu(rx_desc->length);
ea30e119
NH		 4292 /* !EOP means multiple descriptors were used to store a single
4293 * packet, also make sure the frame isn't just CRC only */
4294 if (unlikely(!(status & E1000_RXD_STAT_EOP) || (length <= 4))) {
a1415ee6
JK		 4295 /* All receives must fit into a single buffer */
4296 E1000_DBG("%s: Receive packet consumed multiple"
4297 " buffers\n", netdev->name);
864c4e45 4298 /* recycle */
8fc897b0 4299 buffer_info->skb = skb;
1da177e4
LT		 4300 goto next_desc;
4301 }
4302
96838a40 4303 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 4304 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4305 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4306 last_byte)) {
1da177e4 4307 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4308 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 4309 length, skb->data);
4310 spin_unlock_irqrestore(&adapter->stats_lock,
4311 flags);
4312 length--;
4313 } else {
9e2feace
AK		 4314 /* recycle */
4315 buffer_info->skb = skb;
1da177e4
LT		 4316 goto next_desc;
4317 }
1cb5821f 4318 }
1da177e4 4319
d2a1e213
JB		 4320 /* adjust length to remove Ethernet CRC, this must be
4321 * done after the TBI_ACCEPT workaround above */
4322 length -= 4;
4323
835bb129
JB		 4324 /* probably a little skewed due to removing CRC */
4325 total_rx_bytes += length;
4326 total_rx_packets++;
4327
a292ca6e
JK		 4328 /* code added for copybreak, this should improve
4329 * performance for small packets with large amounts
4330 * of reassembly being done in the stack */
1f753861 4331 if (length < copybreak) {
a292ca6e 4332 struct sk_buff *new_skb =
87f5032e 4333 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4334 if (new_skb) {
4335 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 4336 skb_copy_to_linear_data_offset(new_skb,
4337 -NET_IP_ALIGN,
4338 (skb->data -
4339 NET_IP_ALIGN),
4340 (length +
4341 NET_IP_ALIGN));
a292ca6e
JK		 4342 /* save the skb in buffer_info as good */
4343 buffer_info->skb = skb;
4344 skb = new_skb;
a292ca6e 4345 }
996695de
AK		 4346 /* else just continue with the old one */
4347 }
a292ca6e 4348 /* end copybreak code */
996695de 4349 skb_put(skb, length);
1da177e4
LT		 4350
4351 /* Receive Checksum Offload */
a292ca6e 4352 e1000_rx_checksum(adapter,
406874a7
JP		 4353 (u32)(status) |
4354 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4355 le16_to_cpu(rx_desc->csum), skb);
96838a40 4356
1da177e4 4357 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 4358
edbbb3ca 4359 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 4360
1da177e4
LT		 4361next_desc:
4362 rx_desc->status = 0;
1da177e4 4363
72d64a43
JK		 4364 /* return some buffers to hardware, one at a time is too slow */
4365 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4366 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4367 cleaned_count = 0;
4368 }
4369
30320be8 4370 /* use prefetched values */
86c3d59f
JB		 4371 rx_desc = next_rxd;
4372 buffer_info = next_buffer;
1da177e4 4373 }
1da177e4 4374 rx_ring->next_to_clean = i;
72d64a43
JK		 4375
4376 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4377 if (cleaned_count)
4378 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4379
835bb129
JB		 4380 adapter->total_rx_packets += total_rx_packets;
4381 adapter->total_rx_bytes += total_rx_bytes;
ef90e4ec
AK		 4382 adapter->net_stats.rx_bytes += total_rx_bytes;
4383 adapter->net_stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4384 return cleaned;
4385}
4386
edbbb3ca
JB		 4387/**
4388 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
4389 * @adapter: address of board private structure
4390 * @rx_ring: pointer to receive ring structure
4391 * @cleaned_count: number of buffers to allocate this pass
4392 **/
4393
4394static void
4395e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
4396 struct e1000_rx_ring *rx_ring, int cleaned_count)
4397{
4398 struct net_device *netdev = adapter->netdev;
4399 struct pci_dev *pdev = adapter->pdev;
4400 struct e1000_rx_desc *rx_desc;
4401 struct e1000_buffer *buffer_info;
4402 struct sk_buff *skb;
4403 unsigned int i;
4404 unsigned int bufsz = 256 -
4405 16 /*for skb_reserve */ -
4406 NET_IP_ALIGN;
4407
4408 i = rx_ring->next_to_use;
4409 buffer_info = &rx_ring->buffer_info[i];
4410
4411 while (cleaned_count--) {
4412 skb = buffer_info->skb;
4413 if (skb) {
4414 skb_trim(skb, 0);
4415 goto check_page;
4416 }
4417
4418 skb = netdev_alloc_skb(netdev, bufsz);
4419 if (unlikely(!skb)) {
4420 /* Better luck next round */
4421 adapter->alloc_rx_buff_failed++;
4422 break;
4423 }
4424
4425 /* Fix for errata 23, can't cross 64kB boundary */
4426 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4427 struct sk_buff *oldskb = skb;
4428 DPRINTK(PROBE, ERR, "skb align check failed: %u bytes "
4429 "at %p\n", bufsz, skb->data);
4430 /* Try again, without freeing the previous */
4431 skb = netdev_alloc_skb(netdev, bufsz);
4432 /* Failed allocation, critical failure */
4433 if (!skb) {
4434 dev_kfree_skb(oldskb);
4435 adapter->alloc_rx_buff_failed++;
4436 break;
4437 }
4438
4439 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4440 /* give up */
4441 dev_kfree_skb(skb);
4442 dev_kfree_skb(oldskb);
4443 break; /* while (cleaned_count--) */
4444 }
4445
4446 /* Use new allocation */
4447 dev_kfree_skb(oldskb);
4448 }
4449 /* Make buffer alignment 2 beyond a 16 byte boundary
4450 * this will result in a 16 byte aligned IP header after
4451 * the 14 byte MAC header is removed
4452 */
4453 skb_reserve(skb, NET_IP_ALIGN);
4454
4455 buffer_info->skb = skb;
4456 buffer_info->length = adapter->rx_buffer_len;
4457check_page:
4458 /* allocate a new page if necessary */
4459 if (!buffer_info->page) {
4460 buffer_info->page = alloc_page(GFP_ATOMIC);
4461 if (unlikely(!buffer_info->page)) {
4462 adapter->alloc_rx_buff_failed++;
4463 break;
4464 }
4465 }
4466
4467 if (!buffer_info->dma)
4468 buffer_info->dma = pci_map_page(pdev,
4469 buffer_info->page, 0,
4470 buffer_info->length,
4471 PCI_DMA_FROMDEVICE);
4472
4473 rx_desc = E1000_RX_DESC(*rx_ring, i);
4474 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4475
4476 if (unlikely(++i == rx_ring->count))
4477 i = 0;
4478 buffer_info = &rx_ring->buffer_info[i];
4479 }
4480
4481 if (likely(rx_ring->next_to_use != i)) {
4482 rx_ring->next_to_use = i;
4483 if (unlikely(i-- == 0))
4484 i = (rx_ring->count - 1);
4485
4486 /* Force memory writes to complete before letting h/w
4487 * know there are new descriptors to fetch. (Only
4488 * applicable for weak-ordered memory model archs,
4489 * such as IA-64). */
4490 wmb();
4491 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4492 }
4493}
4494
1da177e4 4495/**
2d7edb92 4496 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4497 * @adapter: address of board private structure
4498 **/
4499
64798845
JP		 4500static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4501 struct e1000_rx_ring *rx_ring,
4502 int cleaned_count)
1da177e4 4503{
1dc32918 4504 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4505 struct net_device *netdev = adapter->netdev;
4506 struct pci_dev *pdev = adapter->pdev;
4507 struct e1000_rx_desc *rx_desc;
4508 struct e1000_buffer *buffer_info;
4509 struct sk_buff *skb;
2648345f
MC		 4510 unsigned int i;
4511 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4512
4513 i = rx_ring->next_to_use;
4514 buffer_info = &rx_ring->buffer_info[i];
4515
a292ca6e 4516 while (cleaned_count--) {
ca6f7224
CH		 4517 skb = buffer_info->skb;
4518 if (skb) {
a292ca6e
JK		 4519 skb_trim(skb, 0);
4520 goto map_skb;
4521 }
4522
ca6f7224 4523 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4524 if (unlikely(!skb)) {
1da177e4 4525 /* Better luck next round */
72d64a43 4526 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4527 break;
4528 }
4529
2648345f 4530 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4531 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4532 struct sk_buff *oldskb = skb;
2648345f
MC		 4533 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4534 "at %p\n", bufsz, skb->data);
4535 /* Try again, without freeing the previous */
87f5032e 4536 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4537 /* Failed allocation, critical failure */
1da177e4
LT		 4538 if (!skb) {
4539 dev_kfree_skb(oldskb);
edbbb3ca 4540 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4541 break;
4542 }
2648345f 4543
1da177e4
LT		 4544 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4545 /* give up */
4546 dev_kfree_skb(skb);
4547 dev_kfree_skb(oldskb);
edbbb3ca 4548 adapter->alloc_rx_buff_failed++;
1da177e4 4549 break; /* while !buffer_info->skb */
1da177e4 4550 }
ca6f7224
CH		 4551
4552 /* Use new allocation */
4553 dev_kfree_skb(oldskb);
1da177e4 4554 }
1da177e4
LT		 4555 /* Make buffer alignment 2 beyond a 16 byte boundary
4556 * this will result in a 16 byte aligned IP header after
4557 * the 14 byte MAC header is removed
4558 */
4559 skb_reserve(skb, NET_IP_ALIGN);
4560
1da177e4
LT		 4561 buffer_info->skb = skb;
4562 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4563map_skb:
1da177e4
LT		 4564 buffer_info->dma = pci_map_single(pdev,
4565 skb->data,
edbbb3ca 4566 buffer_info->length,
1da177e4
LT		 4567 PCI_DMA_FROMDEVICE);
4568
edbbb3ca
JB		 4569 /*
4570 * XXX if it was allocated cleanly it will never map to a
4571 * boundary crossing
4572 */
4573
2648345f
MC		 4574 /* Fix for errata 23, can't cross 64kB boundary */
4575 if (!e1000_check_64k_bound(adapter,
4576 (void *)(unsigned long)buffer_info->dma,
4577 adapter->rx_buffer_len)) {
4578 DPRINTK(RX_ERR, ERR,
4579 "dma align check failed: %u bytes at %p\n",
4580 adapter->rx_buffer_len,
4581 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4582 dev_kfree_skb(skb);
4583 buffer_info->skb = NULL;
4584
2648345f 4585 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4586 adapter->rx_buffer_len,
4587 PCI_DMA_FROMDEVICE);
679be3ba 4588 buffer_info->dma = 0;
1da177e4 4589
edbbb3ca 4590 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4591 break; /* while !buffer_info->skb */
4592 }
1da177e4
LT		 4593 rx_desc = E1000_RX_DESC(*rx_ring, i);
4594 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4595
96838a40
JB		 4596 if (unlikely(++i == rx_ring->count))
4597 i = 0;
1da177e4
LT		 4598 buffer_info = &rx_ring->buffer_info[i];
4599 }
4600
b92ff8ee
JB		 4601 if (likely(rx_ring->next_to_use != i)) {
4602 rx_ring->next_to_use = i;
4603 if (unlikely(i-- == 0))
4604 i = (rx_ring->count - 1);
4605
4606 /* Force memory writes to complete before letting h/w
4607 * know there are new descriptors to fetch. (Only
4608 * applicable for weak-ordered memory model archs,
4609 * such as IA-64). */
4610 wmb();
1dc32918 4611 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4612 }
1da177e4
LT		 4613}
4614
4615/**
4616 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4617 * @adapter:
4618 **/
4619
64798845 4620static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4621{
1dc32918 4622 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4623 u16 phy_status;
4624 u16 phy_ctrl;
1da177e4 4625
1dc32918
JP		 4626 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4627 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4628 return;
4629
96838a40 4630 if (adapter->smartspeed == 0) {
1da177e4
LT		 4631 /* If Master/Slave config fault is asserted twice,
4632 * we assume back-to-back */
1dc32918 4633 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4634 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4635 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4636 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4637 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4638 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4639 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4640 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4641 phy_ctrl);
4642 adapter->smartspeed++;
1dc32918
JP		 4643 if (!e1000_phy_setup_autoneg(hw) &&
4644 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4645 &phy_ctrl)) {
4646 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4647 MII_CR_RESTART_AUTO_NEG);
1dc32918 4648 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4649 phy_ctrl);
4650 }
4651 }
4652 return;
96838a40 4653 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4654 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4655 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4656 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4657 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4658 if (!e1000_phy_setup_autoneg(hw) &&
4659 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4660 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4661 MII_CR_RESTART_AUTO_NEG);
1dc32918 4662 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4663 }
4664 }
4665 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4666 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4667 adapter->smartspeed = 0;
4668}
4669
4670/**
4671 * e1000_ioctl -
4672 * @netdev:
4673 * @ifreq:
4674 * @cmd:
4675 **/
4676
64798845 4677static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4678{
4679 switch (cmd) {
4680 case SIOCGMIIPHY:
4681 case SIOCGMIIREG:
4682 case SIOCSMIIREG:
4683 return e1000_mii_ioctl(netdev, ifr, cmd);
4684 default:
4685 return -EOPNOTSUPP;
4686 }
4687}
4688
4689/**
4690 * e1000_mii_ioctl -
4691 * @netdev:
4692 * @ifreq:
4693 * @cmd:
4694 **/
4695
64798845
JP		 4696static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4697 int cmd)
1da177e4 4698{
60490fe0 4699 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4700 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4701 struct mii_ioctl_data *data = if_mii(ifr);
4702 int retval;
406874a7
JP		 4703 u16 mii_reg;
4704 u16 spddplx;
97876fc6 4705 unsigned long flags;
1da177e4 4706
1dc32918 4707 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4708 return -EOPNOTSUPP;
4709
4710 switch (cmd) {
4711 case SIOCGMIIPHY:
1dc32918 4712 data->phy_id = hw->phy_addr;
1da177e4
LT		 4713 break;
4714 case SIOCGMIIREG:
96838a40 4715 if (!capable(CAP_NET_ADMIN))
1da177e4 4716 return -EPERM;
97876fc6 4717 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4718 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4719 &data->val_out)) {
4720 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4721 return -EIO;
97876fc6
MC		 4722 }
4723 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4724 break;
4725 case SIOCSMIIREG:
96838a40 4726 if (!capable(CAP_NET_ADMIN))
1da177e4 4727 return -EPERM;
96838a40 4728 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4729 return -EFAULT;
4730 mii_reg = data->val_in;
97876fc6 4731 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4732 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4733 mii_reg)) {
4734 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4735 return -EIO;
97876fc6 4736 }
f0163ac4 4737 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4738 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4739 switch (data->reg_num) {
4740 case PHY_CTRL:
96838a40 4741 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4742 break;
96838a40 4743 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4744 hw->autoneg = 1;
4745 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4746 } else {
4747 if (mii_reg & 0x40)
4748 spddplx = SPEED_1000;
4749 else if (mii_reg & 0x2000)
4750 spddplx = SPEED_100;
4751 else
4752 spddplx = SPEED_10;
4753 spddplx += (mii_reg & 0x100)
cb764326
JK		 4754 ? DUPLEX_FULL :
4755 DUPLEX_HALF;
1da177e4
LT		 4756 retval = e1000_set_spd_dplx(adapter,
4757 spddplx);
f0163ac4 4758 if (retval)
1da177e4
LT		 4759 return retval;
4760 }
2db10a08
AK		 4761 if (netif_running(adapter->netdev))
4762 e1000_reinit_locked(adapter);
4763 else
1da177e4
LT		 4764 e1000_reset(adapter);
4765 break;
4766 case M88E1000_PHY_SPEC_CTRL:
4767 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4768 if (e1000_phy_reset(hw))
1da177e4
LT		 4769 return -EIO;
4770 break;
4771 }
4772 } else {
4773 switch (data->reg_num) {
4774 case PHY_CTRL:
96838a40 4775 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4776 break;
2db10a08
AK		 4777 if (netif_running(adapter->netdev))
4778 e1000_reinit_locked(adapter);
4779 else
1da177e4
LT		 4780 e1000_reset(adapter);
4781 break;
4782 }
4783 }
4784 break;
4785 default:
4786 return -EOPNOTSUPP;
4787 }
4788 return E1000_SUCCESS;
4789}
4790
64798845 4791void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4792{
4793 struct e1000_adapter *adapter = hw->back;
2648345f 4794 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4795
96838a40 4796 if (ret_val)
2648345f 4797 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4798}
4799
64798845 4800void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4801{
4802 struct e1000_adapter *adapter = hw->back;
4803
4804 pci_clear_mwi(adapter->pdev);
4805}
4806
64798845 4807int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4808{
4809 struct e1000_adapter *adapter = hw->back;
4810 return pcix_get_mmrbc(adapter->pdev);
4811}
4812
64798845 4813void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4814{
4815 struct e1000_adapter *adapter = hw->back;
4816 pcix_set_mmrbc(adapter->pdev, mmrbc);
4817}
4818
64798845 4819s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
caeccb68
JK		 4820{
4821 struct e1000_adapter *adapter = hw->back;
406874a7 4822 u16 cap_offset;
caeccb68
JK		 4823
4824 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4825 if (!cap_offset)
4826 return -E1000_ERR_CONFIG;
4827
4828 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4829
4830 return E1000_SUCCESS;
4831}
4832
64798845 4833void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4834{
4835 outl(value, port);
4836}
4837
64798845
JP		 4838static void e1000_vlan_rx_register(struct net_device *netdev,
4839 struct vlan_group *grp)
1da177e4 4840{
60490fe0 4841 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4842 struct e1000_hw *hw = &adapter->hw;
406874a7 4843 u32 ctrl, rctl;
1da177e4 4844
9150b76a
JB		 4845 if (!test_bit(__E1000_DOWN, &adapter->flags))
4846 e1000_irq_disable(adapter);
1da177e4
LT		 4847 adapter->vlgrp = grp;
4848
96838a40 4849 if (grp) {
1da177e4 4850 /* enable VLAN tag insert/strip */
1dc32918 4851 ctrl = er32(CTRL);
1da177e4 4852 ctrl |= E1000_CTRL_VME;
1dc32918 4853 ew32(CTRL, ctrl);
1da177e4 4854
cd94dd0b 4855 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4856 /* enable VLAN receive filtering */
1dc32918 4857 rctl = er32(RCTL);
90fb5135 4858 rctl &= ~E1000_RCTL_CFIEN;
1dc32918 4859 ew32(RCTL, rctl);
90fb5135 4860 e1000_update_mng_vlan(adapter);
cd94dd0b 4861 }
1da177e4
LT		 4862 } else {
4863 /* disable VLAN tag insert/strip */
1dc32918 4864 ctrl = er32(CTRL);
1da177e4 4865 ctrl &= ~E1000_CTRL_VME;
1dc32918 4866 ew32(CTRL, ctrl);
1da177e4 4867
cd94dd0b 4868 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4869 if (adapter->mng_vlan_id !=
406874a7 4870 (u16)E1000_MNG_VLAN_NONE) {
90fb5135
AK		 4871 e1000_vlan_rx_kill_vid(netdev,
4872 adapter->mng_vlan_id);
4873 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4874 }
cd94dd0b 4875 }
1da177e4
LT		 4876 }
4877
9150b76a
JB		 4878 if (!test_bit(__E1000_DOWN, &adapter->flags))
4879 e1000_irq_enable(adapter);
1da177e4
LT		 4880}
4881
64798845 4882static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4883{
60490fe0 4884 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4885 struct e1000_hw *hw = &adapter->hw;
406874a7 4886 u32 vfta, index;
96838a40 4887
1dc32918 4888 if ((hw->mng_cookie.status &
96838a40
JB		 4889 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4890 (vid == adapter->mng_vlan_id))
2d7edb92 4891 return;
1da177e4
LT		 4892 /* add VID to filter table */
4893 index = (vid >> 5) & 0x7F;
1dc32918 4894 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4895 vfta |= (1 << (vid & 0x1F));
1dc32918 4896 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4897}
4898
64798845 4899static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4900{
60490fe0 4901 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4902 struct e1000_hw *hw = &adapter->hw;
406874a7 4903 u32 vfta, index;
1da177e4 4904
9150b76a
JB		 4905 if (!test_bit(__E1000_DOWN, &adapter->flags))
4906 e1000_irq_disable(adapter);
5c15bdec 4907 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4908 if (!test_bit(__E1000_DOWN, &adapter->flags))
4909 e1000_irq_enable(adapter);
1da177e4 4910
1dc32918 4911 if ((hw->mng_cookie.status &
96838a40 4912 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4913 (vid == adapter->mng_vlan_id)) {
4914 /* release control to f/w */
4915 e1000_release_hw_control(adapter);
2d7edb92 4916 return;
ff147013
JK		 4917 }
4918
1da177e4
LT		 4919 /* remove VID from filter table */
4920 index = (vid >> 5) & 0x7F;
1dc32918 4921 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4922 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4923 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4924}
4925
64798845 4926static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4927{
4928 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4929
96838a40 4930 if (adapter->vlgrp) {
406874a7 4931 u16 vid;
96838a40 4932 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4933 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4934 continue;
4935 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4936 }
4937 }
4938}
4939
64798845 4940int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4941{
1dc32918
JP		 4942 struct e1000_hw *hw = &adapter->hw;
4943
4944 hw->autoneg = 0;
1da177e4 4945
6921368f 4946 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4947 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4948 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4949 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4950 return -EINVAL;
4951 }
4952
96838a40 4953 switch (spddplx) {
1da177e4 4954 case SPEED_10 + DUPLEX_HALF:
1dc32918 4955 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4956 break;
4957 case SPEED_10 + DUPLEX_FULL:
1dc32918 4958 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4959 break;
4960 case SPEED_100 + DUPLEX_HALF:
1dc32918 4961 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4962 break;
4963 case SPEED_100 + DUPLEX_FULL:
1dc32918 4964 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4965 break;
4966 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4967 hw->autoneg = 1;
4968 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4969 break;
4970 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4971 default:
2648345f 4972 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4973 return -EINVAL;
4974 }
4975 return 0;
4976}
4977
b43fcd7d 4978static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4979{
4980 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4981 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4982 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4983 u32 ctrl, ctrl_ext, rctl, status;
4984 u32 wufc = adapter->wol;
6fdfef16 4985#ifdef CONFIG_PM
240b1710 4986 int retval = 0;
6fdfef16 4987#endif
1da177e4
LT		 4988
4989 netif_device_detach(netdev);
4990
2db10a08
AK		 4991 if (netif_running(netdev)) {
4992 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4993 e1000_down(adapter);
2db10a08 4994 }
1da177e4 4995
2f82665f 4996#ifdef CONFIG_PM
1d33e9c6 4997 retval = pci_save_state(pdev);
2f82665f
JB		 4998 if (retval)
4999 return retval;
5000#endif
5001
1dc32918 5002 status = er32(STATUS);
96838a40 5003 if (status & E1000_STATUS_LU)
1da177e4
LT		 5004 wufc &= ~E1000_WUFC_LNKC;
5005
96838a40 5006 if (wufc) {
1da177e4 5007 e1000_setup_rctl(adapter);
db0ce50d 5008 e1000_set_rx_mode(netdev);
1da177e4
LT		 5009
5010 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 5011 if (wufc & E1000_WUFC_MC) {
1dc32918 5012 rctl = er32(RCTL);
1da177e4 5013 rctl |= E1000_RCTL_MPE;
1dc32918 5014 ew32(RCTL, rctl);
1da177e4
LT		 5015 }
5016
1dc32918
JP		 5017 if (hw->mac_type >= e1000_82540) {
5018 ctrl = er32(CTRL);
1da177e4
LT		 5019 /* advertise wake from D3Cold */
5020 #define E1000_CTRL_ADVD3WUC 0x00100000
5021 /* phy power management enable */
5022 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5023 ctrl |= E1000_CTRL_ADVD3WUC |
5024 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 5025 ew32(CTRL, ctrl);
1da177e4
LT		 5026 }
5027
1dc32918
JP		 5028 if (hw->media_type == e1000_media_type_fiber ||
5029 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 5030 /* keep the laser running in D3 */
1dc32918 5031 ctrl_ext = er32(CTRL_EXT);
1da177e4 5032 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 5033 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 5034 }
5035
2d7edb92 5036 /* Allow time for pending master requests to run */
1dc32918 5037 e1000_disable_pciex_master(hw);
2d7edb92 5038
1dc32918
JP		 5039 ew32(WUC, E1000_WUC_PME_EN);
5040 ew32(WUFC, wufc);
1da177e4 5041 } else {
1dc32918
JP		 5042 ew32(WUC, 0);
5043 ew32(WUFC, 0);
1da177e4
LT		 5044 }
5045
0fccd0e9
JG		 5046 e1000_release_manageability(adapter);
5047
b43fcd7d
RW		 5048 *enable_wake = !!wufc;
5049
0fccd0e9 5050 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 5051 if (adapter->en_mng_pt)
5052 *enable_wake = true;
1da177e4 5053
1dc32918
JP		 5054 if (hw->phy_type == e1000_phy_igp_3)
5055 e1000_phy_powerdown_workaround(hw);
cd94dd0b 5056
edd106fc
AK		 5057 if (netif_running(netdev))
5058 e1000_free_irq(adapter);
5059
b55ccb35
JK		 5060 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5061 * would have already happened in close and is redundant. */
5062 e1000_release_hw_control(adapter);
2d7edb92 5063
1da177e4 5064 pci_disable_device(pdev);
240b1710 5065
1da177e4
LT		 5066 return 0;
5067}
5068
2f82665f 5069#ifdef CONFIG_PM
b43fcd7d
RW		 5070static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5071{
5072 int retval;
5073 bool wake;
5074
5075 retval = __e1000_shutdown(pdev, &wake);
5076 if (retval)
5077 return retval;
5078
5079 if (wake) {
5080 pci_prepare_to_sleep(pdev);
5081 } else {
5082 pci_wake_from_d3(pdev, false);
5083 pci_set_power_state(pdev, PCI_D3hot);
5084 }
5085
5086 return 0;
5087}
5088
64798845 5089static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 5090{
5091 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5092 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5093 struct e1000_hw *hw = &adapter->hw;
406874a7 5094 u32 err;
1da177e4 5095
d0e027db 5096 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 5097 pci_restore_state(pdev);
81250297
TI		 5098
5099 if (adapter->need_ioport)
5100 err = pci_enable_device(pdev);
5101 else
5102 err = pci_enable_device_mem(pdev);
c7be73bc 5103 if (err) {
3d1dd8cb
AK		 5104 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5105 return err;
5106 }
a4cb847d 5107 pci_set_master(pdev);
1da177e4 5108
d0e027db
AK		 5109 pci_enable_wake(pdev, PCI_D3hot, 0);
5110 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5111
c7be73bc
JP		 5112 if (netif_running(netdev)) {
5113 err = e1000_request_irq(adapter);
5114 if (err)
5115 return err;
5116 }
edd106fc
AK		 5117
5118 e1000_power_up_phy(adapter);
1da177e4 5119 e1000_reset(adapter);
1dc32918 5120 ew32(WUS, ~0);
1da177e4 5121
0fccd0e9
JG		 5122 e1000_init_manageability(adapter);
5123
96838a40 5124 if (netif_running(netdev))
1da177e4
LT		 5125 e1000_up(adapter);
5126
5127 netif_device_attach(netdev);
5128
b55ccb35
JK		 5129 /* If the controller is 82573 and f/w is AMT, do not set
5130 * DRV_LOAD until the interface is up. For all other cases,
5131 * let the f/w know that the h/w is now under the control
5132 * of the driver. */
1dc32918
JP		 5133 if (hw->mac_type != e1000_82573 ||
5134 !e1000_check_mng_mode(hw))
b55ccb35 5135 e1000_get_hw_control(adapter);
2d7edb92 5136
1da177e4
LT		 5137 return 0;
5138}
5139#endif
c653e635
AK		 5140
5141static void e1000_shutdown(struct pci_dev *pdev)
5142{
b43fcd7d
RW		 5143 bool wake;
5144
5145 __e1000_shutdown(pdev, &wake);
5146
5147 if (system_state == SYSTEM_POWER_OFF) {
5148 pci_wake_from_d3(pdev, wake);
5149 pci_set_power_state(pdev, PCI_D3hot);
5150 }
c653e635
AK		 5151}
5152
1da177e4
LT		 5153#ifdef CONFIG_NET_POLL_CONTROLLER
5154/*
5155 * Polling 'interrupt' - used by things like netconsole to send skbs
5156 * without having to re-enable interrupts. It's not called while
5157 * the interrupt routine is executing.
5158 */
64798845 5159static void e1000_netpoll(struct net_device *netdev)
1da177e4 5160{
60490fe0 5161 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5162
1da177e4 5163 disable_irq(adapter->pdev->irq);
7d12e780 5164 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 5165 enable_irq(adapter->pdev->irq);
5166}
5167#endif
5168
9026729b
AK		 5169/**
5170 * e1000_io_error_detected - called when PCI error is detected
5171 * @pdev: Pointer to PCI device
5172 * @state: The current pci conneection state
5173 *
5174 * This function is called after a PCI bus error affecting
5175 * this device has been detected.
5176 */
64798845
JP		 5177static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5178 pci_channel_state_t state)
9026729b
AK		 5179{
5180 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5181 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 5182
5183 netif_device_detach(netdev);
5184
eab63302
AD		 5185 if (state == pci_channel_io_perm_failure)
5186 return PCI_ERS_RESULT_DISCONNECT;
5187
9026729b
AK		 5188 if (netif_running(netdev))
5189 e1000_down(adapter);
72e8d6bb 5190 pci_disable_device(pdev);
9026729b
AK		 5191
5192 /* Request a slot slot reset. */
5193 return PCI_ERS_RESULT_NEED_RESET;
5194}
5195
5196/**
5197 * e1000_io_slot_reset - called after the pci bus has been reset.
5198 * @pdev: Pointer to PCI device
5199 *
5200 * Restart the card from scratch, as if from a cold-boot. Implementation
5201 * resembles the first-half of the e1000_resume routine.
5202 */
5203static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5204{
5205 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5206 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5207 struct e1000_hw *hw = &adapter->hw;
81250297 5208 int err;
9026729b 5209
81250297
TI		 5210 if (adapter->need_ioport)
5211 err = pci_enable_device(pdev);
5212 else
5213 err = pci_enable_device_mem(pdev);
5214 if (err) {
9026729b
AK		 5215 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5216 return PCI_ERS_RESULT_DISCONNECT;
5217 }
5218 pci_set_master(pdev);
5219
dbf38c94
LV		 5220 pci_enable_wake(pdev, PCI_D3hot, 0);
5221 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5222
9026729b 5223 e1000_reset(adapter);
1dc32918 5224 ew32(WUS, ~0);
9026729b
AK		 5225
5226 return PCI_ERS_RESULT_RECOVERED;
5227}
5228
5229/**
5230 * e1000_io_resume - called when traffic can start flowing again.
5231 * @pdev: Pointer to PCI device
5232 *
5233 * This callback is called when the error recovery driver tells us that
5234 * its OK to resume normal operation. Implementation resembles the
5235 * second-half of the e1000_resume routine.
5236 */
5237static void e1000_io_resume(struct pci_dev *pdev)
5238{
5239 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5240 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5241 struct e1000_hw *hw = &adapter->hw;
0fccd0e9
JG		 5242
5243 e1000_init_manageability(adapter);
9026729b
AK		 5244
5245 if (netif_running(netdev)) {
5246 if (e1000_up(adapter)) {
5247 printk("e1000: can't bring device back up after reset\n");
5248 return;
5249 }
5250 }
5251
5252 netif_device_attach(netdev);
5253
0fccd0e9
JG		 5254 /* If the controller is 82573 and f/w is AMT, do not set
5255 * DRV_LOAD until the interface is up. For all other cases,
5256 * let the f/w know that the h/w is now under the control
5257 * of the driver. */
1dc32918
JP		 5258 if (hw->mac_type != e1000_82573 ||
5259 !e1000_check_mng_mode(hw))
0fccd0e9 5260 e1000_get_hw_control(adapter);
9026729b 5261
9026729b
AK		 5262}
5263
1da177e4 5264/* e1000_main.c */
Linux kernel - Deliverables
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