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tc35815: Define more Rx status bits
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
c3570acb 34#define DRV_VERSION "7.3.20-k3-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4
LT		 127static void e1000_82547_tx_fifo_stall(unsigned long data);
128static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
129static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
130static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
131static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 132static irqreturn_t e1000_intr(int irq, void *data);
9ac98284 133static irqreturn_t e1000_intr_msi(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
581d708e 140static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 141 struct e1000_rx_ring *rx_ring,
142 int cleaned_count);
1da177e4
LT		 143static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
144static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
145 int cmd);
1da177e4
LT		 146static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
147static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
148static void e1000_tx_timeout(struct net_device *dev);
65f27f38 149static void e1000_reset_task(struct work_struct *work);
1da177e4 150static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 151static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
152 struct sk_buff *skb);
1da177e4
LT		 153
154static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 155static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
156static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 157static void e1000_restore_vlan(struct e1000_adapter *adapter);
158
977e74b5 159static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 160#ifdef CONFIG_PM
1da177e4
LT		 161static int e1000_resume(struct pci_dev *pdev);
162#endif
c653e635 163static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 164
165#ifdef CONFIG_NET_POLL_CONTROLLER
166/* for netdump / net console */
167static void e1000_netpoll (struct net_device *netdev);
168#endif
169
1f753861
JB		 170#define COPYBREAK_DEFAULT 256
171static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
172module_param(copybreak, uint, 0644);
173MODULE_PARM_DESC(copybreak,
174 "Maximum size of packet that is copied to a new buffer on receive");
175
9026729b
AK		 176static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
177 pci_channel_state_t state);
178static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
179static void e1000_io_resume(struct pci_dev *pdev);
180
181static struct pci_error_handlers e1000_err_handler = {
182 .error_detected = e1000_io_error_detected,
183 .slot_reset = e1000_io_slot_reset,
184 .resume = e1000_io_resume,
185};
24025e4e 186
1da177e4
LT		 187static struct pci_driver e1000_driver = {
188 .name = e1000_driver_name,
189 .id_table = e1000_pci_tbl,
190 .probe = e1000_probe,
191 .remove = __devexit_p(e1000_remove),
c4e24f01 192#ifdef CONFIG_PM
1da177e4 193 /* Power Managment Hooks */
1da177e4 194 .suspend = e1000_suspend,
c653e635 195 .resume = e1000_resume,
1da177e4 196#endif
9026729b
AK		 197 .shutdown = e1000_shutdown,
198 .err_handler = &e1000_err_handler
1da177e4
LT		 199};
200
201MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
202MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
203MODULE_LICENSE("GPL");
204MODULE_VERSION(DRV_VERSION);
205
206static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
207module_param(debug, int, 0);
208MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
209
210/**
211 * e1000_init_module - Driver Registration Routine
212 *
213 * e1000_init_module is the first routine called when the driver is
214 * loaded. All it does is register with the PCI subsystem.
215 **/
216
64798845 217static int __init e1000_init_module(void)
1da177e4
LT		 218{
219 int ret;
220 printk(KERN_INFO "%s - version %s\n",
221 e1000_driver_string, e1000_driver_version);
222
223 printk(KERN_INFO "%s\n", e1000_copyright);
224
29917620 225 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 226 if (copybreak != COPYBREAK_DEFAULT) {
227 if (copybreak == 0)
228 printk(KERN_INFO "e1000: copybreak disabled\n");
229 else
230 printk(KERN_INFO "e1000: copybreak enabled for "
231 "packets <= %u bytes\n", copybreak);
232 }
1da177e4
LT		 233 return ret;
234}
235
236module_init(e1000_init_module);
237
238/**
239 * e1000_exit_module - Driver Exit Cleanup Routine
240 *
241 * e1000_exit_module is called just before the driver is removed
242 * from memory.
243 **/
244
64798845 245static void __exit e1000_exit_module(void)
1da177e4 246{
1da177e4
LT		 247 pci_unregister_driver(&e1000_driver);
248}
249
250module_exit(e1000_exit_module);
251
2db10a08
AK		 252static int e1000_request_irq(struct e1000_adapter *adapter)
253{
1dc32918 254 struct e1000_hw *hw = &adapter->hw;
2db10a08 255 struct net_device *netdev = adapter->netdev;
3e18826c 256 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 257 int irq_flags = IRQF_SHARED;
258 int err;
2db10a08 259
1dc32918 260 if (hw->mac_type >= e1000_82571) {
e94bd23f
AK		 261 adapter->have_msi = !pci_enable_msi(adapter->pdev);
262 if (adapter->have_msi) {
3e18826c 263 handler = e1000_intr_msi;
e94bd23f 264 irq_flags = 0;
2db10a08
AK		 265 }
266 }
e94bd23f
AK		 267
268 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
269 netdev);
270 if (err) {
271 if (adapter->have_msi)
272 pci_disable_msi(adapter->pdev);
2db10a08
AK		 273 DPRINTK(PROBE, ERR,
274 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 275 }
2db10a08
AK		 276
277 return err;
278}
279
280static void e1000_free_irq(struct e1000_adapter *adapter)
281{
282 struct net_device *netdev = adapter->netdev;
283
284 free_irq(adapter->pdev->irq, netdev);
285
2db10a08
AK		 286 if (adapter->have_msi)
287 pci_disable_msi(adapter->pdev);
2db10a08
AK		 288}
289
1da177e4
LT		 290/**
291 * e1000_irq_disable - Mask off interrupt generation on the NIC
292 * @adapter: board private structure
293 **/
294
64798845 295static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 296{
1dc32918
JP		 297 struct e1000_hw *hw = &adapter->hw;
298
299 ew32(IMC, ~0);
300 E1000_WRITE_FLUSH();
1da177e4
LT		 301 synchronize_irq(adapter->pdev->irq);
302}
303
304/**
305 * e1000_irq_enable - Enable default interrupt generation settings
306 * @adapter: board private structure
307 **/
308
64798845 309static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 310{
1dc32918
JP		 311 struct e1000_hw *hw = &adapter->hw;
312
313 ew32(IMS, IMS_ENABLE_MASK);
314 E1000_WRITE_FLUSH();
1da177e4 315}
3ad2cc67 316
64798845 317static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 318{
1dc32918 319 struct e1000_hw *hw = &adapter->hw;
2d7edb92 320 struct net_device *netdev = adapter->netdev;
1dc32918 321 u16 vid = hw->mng_cookie.vlan_id;
406874a7 322 u16 old_vid = adapter->mng_vlan_id;
96838a40 323 if (adapter->vlgrp) {
5c15bdec 324 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 325 if (hw->mng_cookie.status &
2d7edb92
MC		 326 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
327 e1000_vlan_rx_add_vid(netdev, vid);
328 adapter->mng_vlan_id = vid;
329 } else
330 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 331
406874a7 332 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 333 (vid != old_vid) &&
5c15bdec 334 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 335 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 336 } else
337 adapter->mng_vlan_id = vid;
2d7edb92
MC		 338 }
339}
b55ccb35
JK		 340
341/**
342 * e1000_release_hw_control - release control of the h/w to f/w
343 * @adapter: address of board private structure
344 *
345 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
346 * For ASF and Pass Through versions of f/w this means that the
347 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 348 * of the f/w this means that the network i/f is closed.
76c224bc 349 *
b55ccb35
JK		 350 **/
351
64798845 352static void e1000_release_hw_control(struct e1000_adapter *adapter)
b55ccb35 353{
406874a7
JP		 354 u32 ctrl_ext;
355 u32 swsm;
1dc32918 356 struct e1000_hw *hw = &adapter->hw;
b55ccb35
JK		 357
358 /* Let firmware taken over control of h/w */
1dc32918 359 switch (hw->mac_type) {
b55ccb35 360 case e1000_82573:
1dc32918
JP		 361 swsm = er32(SWSM);
362 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
31d76442
BA		 363 break;
364 case e1000_82571:
365 case e1000_82572:
366 case e1000_80003es2lan:
cd94dd0b 367 case e1000_ich8lan:
1dc32918
JP		 368 ctrl_ext = er32(CTRL_EXT);
369 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 370 break;
b55ccb35
JK		 371 default:
372 break;
373 }
374}
375
376/**
377 * e1000_get_hw_control - get control of the h/w from f/w
378 * @adapter: address of board private structure
379 *
380 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 381 * For ASF and Pass Through versions of f/w this means that
382 * the driver is loaded. For AMT version (only with 82573)
90fb5135 383 * of the f/w this means that the network i/f is open.
76c224bc 384 *
b55ccb35
JK		 385 **/
386
64798845 387static void e1000_get_hw_control(struct e1000_adapter *adapter)
b55ccb35 388{
406874a7
JP		 389 u32 ctrl_ext;
390 u32 swsm;
1dc32918 391 struct e1000_hw *hw = &adapter->hw;
90fb5135 392
b55ccb35 393 /* Let firmware know the driver has taken over */
1dc32918 394 switch (hw->mac_type) {
b55ccb35 395 case e1000_82573:
1dc32918
JP		 396 swsm = er32(SWSM);
397 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
b55ccb35 398 break;
31d76442
BA		 399 case e1000_82571:
400 case e1000_82572:
401 case e1000_80003es2lan:
cd94dd0b 402 case e1000_ich8lan:
1dc32918
JP		 403 ctrl_ext = er32(CTRL_EXT);
404 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 405 break;
b55ccb35
JK		 406 default:
407 break;
408 }
409}
410
64798845 411static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 412{
1dc32918
JP		 413 struct e1000_hw *hw = &adapter->hw;
414
0fccd0e9 415 if (adapter->en_mng_pt) {
1dc32918 416 u32 manc = er32(MANC);
0fccd0e9
JG		 417
418 /* disable hardware interception of ARP */
419 manc &= ~(E1000_MANC_ARP_EN);
420
421 /* enable receiving management packets to the host */
422 /* this will probably generate destination unreachable messages
423 * from the host OS, but the packets will be handled on SMBUS */
1dc32918
JP		 424 if (hw->has_manc2h) {
425 u32 manc2h = er32(MANC2H);
0fccd0e9
JG		 426
427 manc |= E1000_MANC_EN_MNG2HOST;
428#define E1000_MNG2HOST_PORT_623 (1 << 5)
429#define E1000_MNG2HOST_PORT_664 (1 << 6)
430 manc2h |= E1000_MNG2HOST_PORT_623;
431 manc2h |= E1000_MNG2HOST_PORT_664;
1dc32918 432 ew32(MANC2H, manc2h);
0fccd0e9
JG		 433 }
434
1dc32918 435 ew32(MANC, manc);
0fccd0e9
JG		 436 }
437}
438
64798845 439static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 440{
1dc32918
JP		 441 struct e1000_hw *hw = &adapter->hw;
442
0fccd0e9 443 if (adapter->en_mng_pt) {
1dc32918 444 u32 manc = er32(MANC);
0fccd0e9
JG		 445
446 /* re-enable hardware interception of ARP */
447 manc |= E1000_MANC_ARP_EN;
448
1dc32918 449 if (hw->has_manc2h)
0fccd0e9
JG		 450 manc &= ~E1000_MANC_EN_MNG2HOST;
451
452 /* don't explicitly have to mess with MANC2H since
453 * MANC has an enable disable that gates MANC2H */
454
1dc32918 455 ew32(MANC, manc);
0fccd0e9
JG		 456 }
457}
458
e0aac5a2
AK		 459/**
460 * e1000_configure - configure the hardware for RX and TX
461 * @adapter = private board structure
462 **/
463static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 464{
465 struct net_device *netdev = adapter->netdev;
2db10a08 466 int i;
1da177e4 467
db0ce50d 468 e1000_set_rx_mode(netdev);
1da177e4
LT		 469
470 e1000_restore_vlan(adapter);
0fccd0e9 471 e1000_init_manageability(adapter);
1da177e4
LT		 472
473 e1000_configure_tx(adapter);
474 e1000_setup_rctl(adapter);
475 e1000_configure_rx(adapter);
72d64a43
JK		 476 /* call E1000_DESC_UNUSED which always leaves
477 * at least 1 descriptor unused to make sure
478 * next_to_use != next_to_clean */
f56799ea 479 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 480 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 481 adapter->alloc_rx_buf(adapter, ring,
482 E1000_DESC_UNUSED(ring));
f56799ea 483 }
1da177e4 484
7bfa4816 485 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 486}
487
488int e1000_up(struct e1000_adapter *adapter)
489{
1dc32918
JP		 490 struct e1000_hw *hw = &adapter->hw;
491
e0aac5a2
AK		 492 /* hardware has been reset, we need to reload some things */
493 e1000_configure(adapter);
494
495 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 496
bea3348e 497 napi_enable(&adapter->napi);
c3570acb 498
5de55624
MC		 499 e1000_irq_enable(adapter);
500
79f3d399 501 /* fire a link change interrupt to start the watchdog */
1dc32918 502 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 503 return 0;
504}
505
79f05bf0
AK		 506/**
507 * e1000_power_up_phy - restore link in case the phy was powered down
508 * @adapter: address of board private structure
509 *
510 * The phy may be powered down to save power and turn off link when the
511 * driver is unloaded and wake on lan is not enabled (among others)
512 * *** this routine MUST be followed by a call to e1000_reset ***
513 *
514 **/
515
d658266e 516void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 517{
1dc32918 518 struct e1000_hw *hw = &adapter->hw;
406874a7 519 u16 mii_reg = 0;
79f05bf0
AK		 520
521 /* Just clear the power down bit to wake the phy back up */
1dc32918 522 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 523 /* according to the manual, the phy will retain its
524 * settings across a power-down/up cycle */
1dc32918 525 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 526 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 527 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 528 }
529}
530
531static void e1000_power_down_phy(struct e1000_adapter *adapter)
532{
1dc32918
JP		 533 struct e1000_hw *hw = &adapter->hw;
534
61c2505f 535 /* Power down the PHY so no link is implied when interface is down *
c3033b01 536 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 537 * (a) WoL is enabled
538 * (b) AMT is active
539 * (c) SoL/IDER session is active */
1dc32918
JP		 540 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
541 hw->media_type == e1000_media_type_copper) {
406874a7 542 u16 mii_reg = 0;
61c2505f 543
1dc32918 544 switch (hw->mac_type) {
61c2505f
BA		 545 case e1000_82540:
546 case e1000_82545:
547 case e1000_82545_rev_3:
548 case e1000_82546:
549 case e1000_82546_rev_3:
550 case e1000_82541:
551 case e1000_82541_rev_2:
552 case e1000_82547:
553 case e1000_82547_rev_2:
1dc32918 554 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 555 goto out;
556 break;
557 case e1000_82571:
558 case e1000_82572:
559 case e1000_82573:
560 case e1000_80003es2lan:
561 case e1000_ich8lan:
1dc32918
JP		 562 if (e1000_check_mng_mode(hw) ||
563 e1000_check_phy_reset_block(hw))
61c2505f
BA		 564 goto out;
565 break;
566 default:
567 goto out;
568 }
1dc32918 569 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 570 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 571 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 572 mdelay(1);
573 }
61c2505f
BA		 574out:
575 return;
79f05bf0
AK		 576}
577
64798845 578void e1000_down(struct e1000_adapter *adapter)
1da177e4
LT		 579{
580 struct net_device *netdev = adapter->netdev;
581
1314bbf3
AK		 582 /* signal that we're down so the interrupt handler does not
583 * reschedule our watchdog timer */
584 set_bit(__E1000_DOWN, &adapter->flags);
585
bea3348e 586 napi_disable(&adapter->napi);
c3570acb 587
1da177e4 588 e1000_irq_disable(adapter);
c1605eb3 589
1da177e4
LT		 590 del_timer_sync(&adapter->tx_fifo_stall_timer);
591 del_timer_sync(&adapter->watchdog_timer);
592 del_timer_sync(&adapter->phy_info_timer);
593
7bfa4816 594 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 595 adapter->link_speed = 0;
596 adapter->link_duplex = 0;
597 netif_carrier_off(netdev);
598 netif_stop_queue(netdev);
599
600 e1000_reset(adapter);
581d708e
MC		 601 e1000_clean_all_tx_rings(adapter);
602 e1000_clean_all_rx_rings(adapter);
1da177e4 603}
1da177e4 604
64798845 605void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 606{
607 WARN_ON(in_interrupt());
608 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
609 msleep(1);
610 e1000_down(adapter);
611 e1000_up(adapter);
612 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 613}
614
64798845 615void e1000_reset(struct e1000_adapter *adapter)
1da177e4 616{
1dc32918 617 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 618 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
619 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
c3033b01 620 bool legacy_pba_adjust = false;
1da177e4
LT		 621
622 /* Repartition Pba for greater than 9k mtu
623 * To take effect CTRL.RST is required.
624 */
625
1dc32918 626 switch (hw->mac_type) {
018ea44e
BA		 627 case e1000_82542_rev2_0:
628 case e1000_82542_rev2_1:
629 case e1000_82543:
630 case e1000_82544:
631 case e1000_82540:
632 case e1000_82541:
633 case e1000_82541_rev_2:
c3033b01 634 legacy_pba_adjust = true;
018ea44e
BA		 635 pba = E1000_PBA_48K;
636 break;
637 case e1000_82545:
638 case e1000_82545_rev_3:
639 case e1000_82546:
640 case e1000_82546_rev_3:
641 pba = E1000_PBA_48K;
642 break;
2d7edb92 643 case e1000_82547:
0e6ef3e0 644 case e1000_82547_rev_2:
c3033b01 645 legacy_pba_adjust = true;
2d7edb92
MC		 646 pba = E1000_PBA_30K;
647 break;
868d5309
MC		 648 case e1000_82571:
649 case e1000_82572:
6418ecc6 650 case e1000_80003es2lan:
868d5309
MC		 651 pba = E1000_PBA_38K;
652 break;
2d7edb92 653 case e1000_82573:
018ea44e 654 pba = E1000_PBA_20K;
2d7edb92 655 break;
cd94dd0b
AK		 656 case e1000_ich8lan:
657 pba = E1000_PBA_8K;
018ea44e
BA		 658 case e1000_undefined:
659 case e1000_num_macs:
2d7edb92
MC		 660 break;
661 }
662
c3033b01 663 if (legacy_pba_adjust) {
018ea44e
BA		 664 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
665 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 666
1dc32918 667 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 668 adapter->tx_fifo_head = 0;
669 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
670 adapter->tx_fifo_size =
671 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
672 atomic_set(&adapter->tx_fifo_stall, 0);
673 }
1dc32918 674 } else if (hw->max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
018ea44e 675 /* adjust PBA for jumbo frames */
1dc32918 676 ew32(PBA, pba);
018ea44e
BA		 677
678 /* To maintain wire speed transmits, the Tx FIFO should be
679 * large enough to accomodate two full transmit packets,
680 * rounded up to the next 1KB and expressed in KB. Likewise,
681 * the Rx FIFO should be large enough to accomodate at least
682 * one full receive packet and is similarly rounded up and
683 * expressed in KB. */
1dc32918 684 pba = er32(PBA);
018ea44e
BA		 685 /* upper 16 bits has Tx packet buffer allocation size in KB */
686 tx_space = pba >> 16;
687 /* lower 16 bits has Rx packet buffer allocation size in KB */
688 pba &= 0xffff;
689 /* don't include ethernet FCS because hardware appends/strips */
690 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
691 VLAN_TAG_SIZE;
692 min_tx_space = min_rx_space;
693 min_tx_space *= 2;
9099cfb9 694 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 695 min_tx_space >>= 10;
9099cfb9 696 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 697 min_rx_space >>= 10;
698
699 /* If current Tx allocation is less than the min Tx FIFO size,
700 * and the min Tx FIFO size is less than the current Rx FIFO
701 * allocation, take space away from current Rx allocation */
702 if (tx_space < min_tx_space &&
703 ((min_tx_space - tx_space) < pba)) {
704 pba = pba - (min_tx_space - tx_space);
705
706 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 707 switch (hw->mac_type) {
018ea44e
BA		 708 case e1000_82545 ... e1000_82546_rev_3:
709 pba &= ~(E1000_PBA_8K - 1);
710 break;
711 default:
712 break;
713 }
714
715 /* if short on rx space, rx wins and must trump tx
716 * adjustment or use Early Receive if available */
717 if (pba < min_rx_space) {
1dc32918 718 switch (hw->mac_type) {
018ea44e
BA		 719 case e1000_82573:
720 /* ERT enabled in e1000_configure_rx */
721 break;
722 default:
723 pba = min_rx_space;
724 break;
725 }
726 }
727 }
1da177e4 728 }
2d7edb92 729
1dc32918 730 ew32(PBA, pba);
1da177e4
LT		 731
732 /* flow control settings */
f11b7f85
JK		 733 /* Set the FC high water mark to 90% of the FIFO size.
734 * Required to clear last 3 LSB */
735 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 736 /* We can't use 90% on small FIFOs because the remainder
737 * would be less than 1 full frame. In this case, we size
738 * it to allow at least a full frame above the high water
739 * mark. */
740 if (pba < E1000_PBA_16K)
741 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85 742
1dc32918
JP		 743 hw->fc_high_water = fc_high_water_mark;
744 hw->fc_low_water = fc_high_water_mark - 8;
745 if (hw->mac_type == e1000_80003es2lan)
746 hw->fc_pause_time = 0xFFFF;
87041639 747 else
1dc32918
JP		 748 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
749 hw->fc_send_xon = 1;
750 hw->fc = hw->original_fc;
1da177e4 751
2d7edb92 752 /* Allow time for pending master requests to run */
1dc32918
JP		 753 e1000_reset_hw(hw);
754 if (hw->mac_type >= e1000_82544)
755 ew32(WUC, 0);
09ae3e88 756
1dc32918 757 if (e1000_init_hw(hw))
1da177e4 758 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 759 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 760
761 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918
JP		 762 if (hw->mac_type >= e1000_82544 &&
763 hw->mac_type <= e1000_82547_rev_2 &&
764 hw->autoneg == 1 &&
765 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
766 u32 ctrl = er32(CTRL);
3d5460a0
JB		 767 /* clear phy power management bit if we are in gig only mode,
768 * which if enabled will attempt negotiation to 100Mb, which
769 * can cause a loss of link at power off or driver unload */
770 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 771 ew32(CTRL, ctrl);
3d5460a0
JB		 772 }
773
1da177e4 774 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 775 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 776
1dc32918
JP		 777 e1000_reset_adaptive(hw);
778 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202
AK		 779
780 if (!adapter->smart_power_down &&
1dc32918
JP		 781 (hw->mac_type == e1000_82571 ||
782 hw->mac_type == e1000_82572)) {
406874a7 783 u16 phy_data = 0;
9a53a202
AK		 784 /* speed up time to link by disabling smart power down, ignore
785 * the return value of this function because there is nothing
786 * different we would do if it failed */
1dc32918 787 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 788 &phy_data);
789 phy_data &= ~IGP02E1000_PM_SPD;
1dc32918 790 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 791 phy_data);
792 }
793
0fccd0e9 794 e1000_release_manageability(adapter);
1da177e4
LT		 795}
796
67b3c27c
AK		 797/**
798 * Dump the eeprom for users having checksum issues
799 **/
b4ea895d 800static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 801{
802 struct net_device *netdev = adapter->netdev;
803 struct ethtool_eeprom eeprom;
804 const struct ethtool_ops *ops = netdev->ethtool_ops;
805 u8 *data;
806 int i;
807 u16 csum_old, csum_new = 0;
808
809 eeprom.len = ops->get_eeprom_len(netdev);
810 eeprom.offset = 0;
811
812 data = kmalloc(eeprom.len, GFP_KERNEL);
813 if (!data) {
814 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
815 " data\n");
816 return;
817 }
818
819 ops->get_eeprom(netdev, &eeprom, data);
820
821 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
822 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
823 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
824 csum_new += data[i] + (data[i + 1] << 8);
825 csum_new = EEPROM_SUM - csum_new;
826
827 printk(KERN_ERR "/*********************/\n");
828 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
829 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
830
831 printk(KERN_ERR "Offset Values\n");
832 printk(KERN_ERR "======== ======\n");
833 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
834
835 printk(KERN_ERR "Include this output when contacting your support "
836 "provider.\n");
837 printk(KERN_ERR "This is not a software error! Something bad "
838 "happened to your hardware or\n");
839 printk(KERN_ERR "EEPROM image. Ignoring this "
840 "problem could result in further problems,\n");
841 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
842 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
843 "which is invalid\n");
844 printk(KERN_ERR "and requires you to set the proper MAC "
845 "address manually before continuing\n");
846 printk(KERN_ERR "to enable this network device.\n");
847 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
848 "to your hardware vendor\n");
63cd31f6 849 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 850 printk(KERN_ERR "/*********************/\n");
851
852 kfree(data);
853}
854
81250297
TI		 855/**
856 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
857 * @pdev: PCI device information struct
858 *
859 * Return true if an adapter needs ioport resources
860 **/
861static int e1000_is_need_ioport(struct pci_dev *pdev)
862{
863 switch (pdev->device) {
864 case E1000_DEV_ID_82540EM:
865 case E1000_DEV_ID_82540EM_LOM:
866 case E1000_DEV_ID_82540EP:
867 case E1000_DEV_ID_82540EP_LOM:
868 case E1000_DEV_ID_82540EP_LP:
869 case E1000_DEV_ID_82541EI:
870 case E1000_DEV_ID_82541EI_MOBILE:
871 case E1000_DEV_ID_82541ER:
872 case E1000_DEV_ID_82541ER_LOM:
873 case E1000_DEV_ID_82541GI:
874 case E1000_DEV_ID_82541GI_LF:
875 case E1000_DEV_ID_82541GI_MOBILE:
876 case E1000_DEV_ID_82544EI_COPPER:
877 case E1000_DEV_ID_82544EI_FIBER:
878 case E1000_DEV_ID_82544GC_COPPER:
879 case E1000_DEV_ID_82544GC_LOM:
880 case E1000_DEV_ID_82545EM_COPPER:
881 case E1000_DEV_ID_82545EM_FIBER:
882 case E1000_DEV_ID_82546EB_COPPER:
883 case E1000_DEV_ID_82546EB_FIBER:
884 case E1000_DEV_ID_82546EB_QUAD_COPPER:
885 return true;
886 default:
887 return false;
888 }
889}
890
1da177e4
LT		 891/**
892 * e1000_probe - Device Initialization Routine
893 * @pdev: PCI device information struct
894 * @ent: entry in e1000_pci_tbl
895 *
896 * Returns 0 on success, negative on failure
897 *
898 * e1000_probe initializes an adapter identified by a pci_dev structure.
899 * The OS initialization, configuring of the adapter private structure,
900 * and a hardware reset occur.
901 **/
1dc32918
JP		 902static int __devinit e1000_probe(struct pci_dev *pdev,
903 const struct pci_device_id *ent)
1da177e4
LT		 904{
905 struct net_device *netdev;
906 struct e1000_adapter *adapter;
1dc32918 907 struct e1000_hw *hw;
2d7edb92 908
1da177e4 909 static int cards_found = 0;
120cd576 910 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 911 int i, err, pci_using_dac;
406874a7
JP		 912 u16 eeprom_data = 0;
913 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 914 int bars, need_ioport;
0795af57 915
81250297
TI		 916 /* do not allocate ioport bars when not needed */
917 need_ioport = e1000_is_need_ioport(pdev);
918 if (need_ioport) {
919 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
920 err = pci_enable_device(pdev);
921 } else {
922 bars = pci_select_bars(pdev, IORESOURCE_MEM);
923 err = pci_enable_device(pdev);
924 }
c7be73bc 925 if (err)
1da177e4
LT		 926 return err;
927
c7be73bc
JP		 928 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
929 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
1da177e4
LT		 930 pci_using_dac = 1;
931 } else {
c7be73bc
JP		 932 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
933 if (err) {
934 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
935 if (err) {
936 E1000_ERR("No usable DMA configuration, "
937 "aborting\n");
938 goto err_dma;
939 }
1da177e4
LT		 940 }
941 pci_using_dac = 0;
942 }
943
81250297 944 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 945 if (err)
6dd62ab0 946 goto err_pci_reg;
1da177e4
LT		 947
948 pci_set_master(pdev);
949
6dd62ab0 950 err = -ENOMEM;
1da177e4 951 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 952 if (!netdev)
1da177e4 953 goto err_alloc_etherdev;
1da177e4 954
1da177e4
LT		 955 SET_NETDEV_DEV(netdev, &pdev->dev);
956
957 pci_set_drvdata(pdev, netdev);
60490fe0 958 adapter = netdev_priv(netdev);
1da177e4
LT		 959 adapter->netdev = netdev;
960 adapter->pdev = pdev;
1da177e4 961 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 962 adapter->bars = bars;
963 adapter->need_ioport = need_ioport;
1da177e4 964
1dc32918
JP		 965 hw = &adapter->hw;
966 hw->back = adapter;
967
6dd62ab0 968 err = -EIO;
1dc32918
JP		 969 hw->hw_addr = ioremap(pci_resource_start(pdev, BAR_0),
970 pci_resource_len(pdev, BAR_0));
971 if (!hw->hw_addr)
1da177e4 972 goto err_ioremap;
1da177e4 973
81250297
TI		 974 if (adapter->need_ioport) {
975 for (i = BAR_1; i <= BAR_5; i++) {
976 if (pci_resource_len(pdev, i) == 0)
977 continue;
978 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
979 hw->io_base = pci_resource_start(pdev, i);
980 break;
981 }
1da177e4
LT		 982 }
983 }
984
985 netdev->open = &e1000_open;
986 netdev->stop = &e1000_close;
987 netdev->hard_start_xmit = &e1000_xmit_frame;
988 netdev->get_stats = &e1000_get_stats;
db0ce50d 989 netdev->set_rx_mode = &e1000_set_rx_mode;
1da177e4
LT		 990 netdev->set_mac_address = &e1000_set_mac;
991 netdev->change_mtu = &e1000_change_mtu;
992 netdev->do_ioctl = &e1000_ioctl;
993 e1000_set_ethtool_ops(netdev);
994 netdev->tx_timeout = &e1000_tx_timeout;
995 netdev->watchdog_timeo = 5 * HZ;
bea3348e 996 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
1da177e4
LT		 997 netdev->vlan_rx_register = e1000_vlan_rx_register;
998 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
999 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
1000#ifdef CONFIG_NET_POLL_CONTROLLER
1001 netdev->poll_controller = e1000_netpoll;
1002#endif
0eb5a34c 1003 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1004
1da177e4
LT		 1005 adapter->bd_number = cards_found;
1006
1007 /* setup the private structure */
1008
c7be73bc
JP		 1009 err = e1000_sw_init(adapter);
1010 if (err)
1da177e4
LT		 1011 goto err_sw_init;
1012
6dd62ab0 1013 err = -EIO;
cd94dd0b
AK		 1014 /* Flash BAR mapping must happen after e1000_sw_init
1015 * because it depends on mac_type */
1dc32918 1016 if ((hw->mac_type == e1000_ich8lan) &&
cd94dd0b 1017 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1dc32918 1018 hw->flash_address =
3c34ac36
BH		 1019 ioremap(pci_resource_start(pdev, 1),
1020 pci_resource_len(pdev, 1));
1dc32918 1021 if (!hw->flash_address)
cd94dd0b 1022 goto err_flashmap;
cd94dd0b
AK		 1023 }
1024
1dc32918 1025 if (e1000_check_phy_reset_block(hw))
2d7edb92
MC		 1026 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1027
1dc32918 1028 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 1029 netdev->features = NETIF_F_SG |
1030 NETIF_F_HW_CSUM |
1031 NETIF_F_HW_VLAN_TX |
1032 NETIF_F_HW_VLAN_RX |
1033 NETIF_F_HW_VLAN_FILTER;
1dc32918 1034 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 1035 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 1036 }
1037
1dc32918
JP		 1038 if ((hw->mac_type >= e1000_82544) &&
1039 (hw->mac_type != e1000_82547))
1da177e4 1040 netdev->features |= NETIF_F_TSO;
2d7edb92 1041
1dc32918 1042 if (hw->mac_type > e1000_82547_rev_2)
87ca4e5b 1043 netdev->features |= NETIF_F_TSO6;
96838a40 1044 if (pci_using_dac)
1da177e4
LT		 1045 netdev->features |= NETIF_F_HIGHDMA;
1046
76c224bc
AK		 1047 netdev->features |= NETIF_F_LLTX;
1048
20501a69
PM		 1049 netdev->vlan_features |= NETIF_F_TSO;
1050 netdev->vlan_features |= NETIF_F_TSO6;
1051 netdev->vlan_features |= NETIF_F_HW_CSUM;
1052 netdev->vlan_features |= NETIF_F_SG;
1053
1dc32918 1054 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1055
cd94dd0b 1056 /* initialize eeprom parameters */
1dc32918 1057 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 1058 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1059 goto err_eeprom;
cd94dd0b
AK		 1060 }
1061
96838a40 1062 /* before reading the EEPROM, reset the controller to
1da177e4 1063 * put the device in a known good starting state */
96838a40 1064
1dc32918 1065 e1000_reset_hw(hw);
1da177e4
LT		 1066
1067 /* make sure the EEPROM is good */
1dc32918 1068 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 1069 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 1070 e1000_dump_eeprom(adapter);
1071 /*
1072 * set MAC address to all zeroes to invalidate and temporary
1073 * disable this device for the user. This blocks regular
1074 * traffic while still permitting ethtool ioctls from reaching
1075 * the hardware as well as allowing the user to run the
1076 * interface after manually setting a hw addr using
1077 * `ip set address`
1078 */
1dc32918 1079 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1080 } else {
1081 /* copy the MAC address out of the EEPROM */
1dc32918 1082 if (e1000_read_mac_addr(hw))
67b3c27c 1083 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 1084 }
67b3c27c 1085 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 1086 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1087 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1088
67b3c27c 1089 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 1090 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 1091
1dc32918 1092 e1000_get_bus_info(hw);
1da177e4
LT		 1093
1094 init_timer(&adapter->tx_fifo_stall_timer);
1095 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 1096 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 1097
1098 init_timer(&adapter->watchdog_timer);
1099 adapter->watchdog_timer.function = &e1000_watchdog;
1100 adapter->watchdog_timer.data = (unsigned long) adapter;
1101
1da177e4
LT		 1102 init_timer(&adapter->phy_info_timer);
1103 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 1104 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 1105
65f27f38 1106 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1107
1da177e4
LT		 1108 e1000_check_options(adapter);
1109
1110 /* Initial Wake on LAN setting
1111 * If APM wake is enabled in the EEPROM,
1112 * enable the ACPI Magic Packet filter
1113 */
1114
1dc32918 1115 switch (hw->mac_type) {
1da177e4
LT		 1116 case e1000_82542_rev2_0:
1117 case e1000_82542_rev2_1:
1118 case e1000_82543:
1119 break;
1120 case e1000_82544:
1dc32918 1121 e1000_read_eeprom(hw,
1da177e4
LT		 1122 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1123 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1124 break;
cd94dd0b 1125 case e1000_ich8lan:
1dc32918 1126 e1000_read_eeprom(hw,
cd94dd0b
AK		 1127 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1128 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1129 break;
1da177e4
LT		 1130 case e1000_82546:
1131 case e1000_82546_rev_3:
fd803241 1132 case e1000_82571:
6418ecc6 1133 case e1000_80003es2lan:
1dc32918
JP		 1134 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1135 e1000_read_eeprom(hw,
1da177e4
LT		 1136 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1137 break;
1138 }
1139 /* Fall Through */
1140 default:
1dc32918 1141 e1000_read_eeprom(hw,
1da177e4
LT		 1142 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1143 break;
1144 }
96838a40 1145 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1146 adapter->eeprom_wol |= E1000_WUFC_MAG;
1147
1148 /* now that we have the eeprom settings, apply the special cases
1149 * where the eeprom may be wrong or the board simply won't support
1150 * wake on lan on a particular port */
1151 switch (pdev->device) {
1152 case E1000_DEV_ID_82546GB_PCIE:
1153 adapter->eeprom_wol = 0;
1154 break;
1155 case E1000_DEV_ID_82546EB_FIBER:
1156 case E1000_DEV_ID_82546GB_FIBER:
1157 case E1000_DEV_ID_82571EB_FIBER:
1158 /* Wake events only supported on port A for dual fiber
1159 * regardless of eeprom setting */
1dc32918 1160 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1161 adapter->eeprom_wol = 0;
1162 break;
1163 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1164 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1165 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1166 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
f4ec7f98 1167 case E1000_DEV_ID_82571PT_QUAD_COPPER:
120cd576
JB		 1168 /* if quad port adapter, disable WoL on all but port A */
1169 if (global_quad_port_a != 0)
1170 adapter->eeprom_wol = 0;
1171 else
1172 adapter->quad_port_a = 1;
1173 /* Reset for multiple quad port adapters */
1174 if (++global_quad_port_a == 4)
1175 global_quad_port_a = 0;
1176 break;
1177 }
1178
1179 /* initialize the wol settings based on the eeprom settings */
1180 adapter->wol = adapter->eeprom_wol;
1da177e4 1181
fb3d47d4 1182 /* print bus type/speed/width info */
fb3d47d4
JK		 1183 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1184 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1185 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1186 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1187 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1188 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1189 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1190 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1191 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1192 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1193 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1194 "32-bit"));
fb3d47d4 1195
e174961c 1196 printk("%pM\n", netdev->dev_addr);
fb3d47d4 1197
1dc32918 1198 if (hw->bus_type == e1000_bus_type_pci_express) {
14782ca8
AK		 1199 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1200 "longer be supported by this driver in the future.\n",
1201 pdev->vendor, pdev->device);
1202 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1203 "driver instead.\n");
1204 }
1205
1da177e4
LT		 1206 /* reset the hardware with the new settings */
1207 e1000_reset(adapter);
1208
b55ccb35
JK		 1209 /* If the controller is 82573 and f/w is AMT, do not set
1210 * DRV_LOAD until the interface is up. For all other cases,
1211 * let the f/w know that the h/w is now under the control
1212 * of the driver. */
1dc32918
JP		 1213 if (hw->mac_type != e1000_82573 ||
1214 !e1000_check_mng_mode(hw))
b55ccb35 1215 e1000_get_hw_control(adapter);
2d7edb92 1216
1314bbf3
AK		 1217 /* tell the stack to leave us alone until e1000_open() is called */
1218 netif_carrier_off(netdev);
1219 netif_stop_queue(netdev);
416b5d10
AK		 1220
1221 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1222 err = register_netdev(netdev);
1223 if (err)
416b5d10 1224 goto err_register;
1314bbf3 1225
1da177e4
LT		 1226 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1227
1228 cards_found++;
1229 return 0;
1230
1231err_register:
6dd62ab0
VA		 1232 e1000_release_hw_control(adapter);
1233err_eeprom:
1dc32918
JP		 1234 if (!e1000_check_phy_reset_block(hw))
1235 e1000_phy_hw_reset(hw);
6dd62ab0 1236
1dc32918
JP		 1237 if (hw->flash_address)
1238 iounmap(hw->flash_address);
cd94dd0b 1239err_flashmap:
6dd62ab0
VA		 1240 for (i = 0; i < adapter->num_rx_queues; i++)
1241 dev_put(&adapter->polling_netdev[i]);
6dd62ab0
VA		 1242
1243 kfree(adapter->tx_ring);
1244 kfree(adapter->rx_ring);
6dd62ab0 1245 kfree(adapter->polling_netdev);
1da177e4 1246err_sw_init:
1dc32918 1247 iounmap(hw->hw_addr);
1da177e4
LT		 1248err_ioremap:
1249 free_netdev(netdev);
1250err_alloc_etherdev:
81250297 1251 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1252err_pci_reg:
1253err_dma:
1254 pci_disable_device(pdev);
1da177e4
LT		 1255 return err;
1256}
1257
1258/**
1259 * e1000_remove - Device Removal Routine
1260 * @pdev: PCI device information struct
1261 *
1262 * e1000_remove is called by the PCI subsystem to alert the driver
1263 * that it should release a PCI device. The could be caused by a
1264 * Hot-Plug event, or because the driver is going to be removed from
1265 * memory.
1266 **/
1267
64798845 1268static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1269{
1270 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1271 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1272 struct e1000_hw *hw = &adapter->hw;
581d708e 1273 int i;
1da177e4 1274
28e53bdd 1275 cancel_work_sync(&adapter->reset_task);
be2b28ed 1276
0fccd0e9 1277 e1000_release_manageability(adapter);
1da177e4 1278
b55ccb35
JK		 1279 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1280 * would have already happened in close and is redundant. */
1281 e1000_release_hw_control(adapter);
2d7edb92 1282
f56799ea 1283 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1284 dev_put(&adapter->polling_netdev[i]);
1da177e4 1285
bea3348e
SH		 1286 unregister_netdev(netdev);
1287
1dc32918
JP		 1288 if (!e1000_check_phy_reset_block(hw))
1289 e1000_phy_hw_reset(hw);
1da177e4 1290
24025e4e
MC		 1291 kfree(adapter->tx_ring);
1292 kfree(adapter->rx_ring);
24025e4e 1293 kfree(adapter->polling_netdev);
24025e4e 1294
1dc32918
JP		 1295 iounmap(hw->hw_addr);
1296 if (hw->flash_address)
1297 iounmap(hw->flash_address);
81250297 1298 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1299
1300 free_netdev(netdev);
1301
1302 pci_disable_device(pdev);
1303}
1304
1305/**
1306 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1307 * @adapter: board private structure to initialize
1308 *
1309 * e1000_sw_init initializes the Adapter private data structure.
1310 * Fields are initialized based on PCI device information and
1311 * OS network device settings (MTU size).
1312 **/
1313
64798845 1314static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1315{
1316 struct e1000_hw *hw = &adapter->hw;
1317 struct net_device *netdev = adapter->netdev;
1318 struct pci_dev *pdev = adapter->pdev;
581d708e 1319 int i;
1da177e4
LT		 1320
1321 /* PCI config space info */
1322
1323 hw->vendor_id = pdev->vendor;
1324 hw->device_id = pdev->device;
1325 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1326 hw->subsystem_id = pdev->subsystem_device;
44c10138 1327 hw->revision_id = pdev->revision;
1da177e4
LT		 1328
1329 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1330
eb0f8054 1331 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1332 hw->max_frame_size = netdev->mtu +
1333 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1334 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1335
1336 /* identify the MAC */
1337
96838a40 1338 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1339 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1340 return -EIO;
1341 }
1342
96838a40 1343 switch (hw->mac_type) {
1da177e4
LT		 1344 default:
1345 break;
1346 case e1000_82541:
1347 case e1000_82547:
1348 case e1000_82541_rev_2:
1349 case e1000_82547_rev_2:
1350 hw->phy_init_script = 1;
1351 break;
1352 }
1353
1354 e1000_set_media_type(hw);
1355
c3033b01
JP		 1356 hw->wait_autoneg_complete = false;
1357 hw->tbi_compatibility_en = true;
1358 hw->adaptive_ifs = true;
1da177e4
LT		 1359
1360 /* Copper options */
1361
96838a40 1362 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1363 hw->mdix = AUTO_ALL_MODES;
c3033b01 1364 hw->disable_polarity_correction = false;
1da177e4
LT		 1365 hw->master_slave = E1000_MASTER_SLAVE;
1366 }
1367
f56799ea
JK		 1368 adapter->num_tx_queues = 1;
1369 adapter->num_rx_queues = 1;
581d708e
MC		 1370
1371 if (e1000_alloc_queues(adapter)) {
1372 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1373 return -ENOMEM;
1374 }
1375
f56799ea 1376 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e 1377 adapter->polling_netdev[i].priv = adapter;
581d708e
MC		 1378 dev_hold(&adapter->polling_netdev[i]);
1379 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1380 }
7bfa4816 1381 spin_lock_init(&adapter->tx_queue_lock);
24025e4e 1382
47313054 1383 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1384 e1000_irq_disable(adapter);
1385
1da177e4 1386 spin_lock_init(&adapter->stats_lock);
1da177e4 1387
1314bbf3
AK		 1388 set_bit(__E1000_DOWN, &adapter->flags);
1389
1da177e4
LT		 1390 return 0;
1391}
1392
581d708e
MC		 1393/**
1394 * e1000_alloc_queues - Allocate memory for all rings
1395 * @adapter: board private structure to initialize
1396 *
1397 * We allocate one ring per queue at run-time since we don't know the
1398 * number of queues at compile-time. The polling_netdev array is
1399 * intended for Multiqueue, but should work fine with a single queue.
1400 **/
1401
64798845 1402static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1403{
1c7e5b12
YB		 1404 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1405 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1406 if (!adapter->tx_ring)
1407 return -ENOMEM;
581d708e 1408
1c7e5b12
YB		 1409 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1410 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1411 if (!adapter->rx_ring) {
1412 kfree(adapter->tx_ring);
1413 return -ENOMEM;
1414 }
581d708e 1415
1c7e5b12
YB		 1416 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1417 sizeof(struct net_device),
1418 GFP_KERNEL);
581d708e
MC		 1419 if (!adapter->polling_netdev) {
1420 kfree(adapter->tx_ring);
1421 kfree(adapter->rx_ring);
1422 return -ENOMEM;
1423 }
581d708e
MC		 1424
1425 return E1000_SUCCESS;
1426}
1427
1da177e4
LT		 1428/**
1429 * e1000_open - Called when a network interface is made active
1430 * @netdev: network interface device structure
1431 *
1432 * Returns 0 on success, negative value on failure
1433 *
1434 * The open entry point is called when a network interface is made
1435 * active by the system (IFF_UP). At this point all resources needed
1436 * for transmit and receive operations are allocated, the interrupt
1437 * handler is registered with the OS, the watchdog timer is started,
1438 * and the stack is notified that the interface is ready.
1439 **/
1440
64798845 1441static int e1000_open(struct net_device *netdev)
1da177e4 1442{
60490fe0 1443 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1444 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1445 int err;
1446
2db10a08 1447 /* disallow open during test */
1314bbf3 1448 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1449 return -EBUSY;
1450
1da177e4 1451 /* allocate transmit descriptors */
e0aac5a2
AK		 1452 err = e1000_setup_all_tx_resources(adapter);
1453 if (err)
1da177e4
LT		 1454 goto err_setup_tx;
1455
1456 /* allocate receive descriptors */
e0aac5a2 1457 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1458 if (err)
e0aac5a2 1459 goto err_setup_rx;
b5bf28cd 1460
79f05bf0
AK		 1461 e1000_power_up_phy(adapter);
1462
2d7edb92 1463 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1464 if ((hw->mng_cookie.status &
2d7edb92
MC		 1465 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1466 e1000_update_mng_vlan(adapter);
1467 }
1da177e4 1468
b55ccb35
JK		 1469 /* If AMT is enabled, let the firmware know that the network
1470 * interface is now open */
1dc32918
JP		 1471 if (hw->mac_type == e1000_82573 &&
1472 e1000_check_mng_mode(hw))
b55ccb35
JK		 1473 e1000_get_hw_control(adapter);
1474
e0aac5a2
AK		 1475 /* before we allocate an interrupt, we must be ready to handle it.
1476 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1477 * as soon as we call pci_request_irq, so we have to setup our
1478 * clean_rx handler before we do so. */
1479 e1000_configure(adapter);
1480
1481 err = e1000_request_irq(adapter);
1482 if (err)
1483 goto err_req_irq;
1484
1485 /* From here on the code is the same as e1000_up() */
1486 clear_bit(__E1000_DOWN, &adapter->flags);
1487
bea3348e 1488 napi_enable(&adapter->napi);
47313054 1489
e0aac5a2
AK		 1490 e1000_irq_enable(adapter);
1491
076152d5
BH		 1492 netif_start_queue(netdev);
1493
e0aac5a2 1494 /* fire a link status change interrupt to start the watchdog */
1dc32918 1495 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1496
1da177e4
LT		 1497 return E1000_SUCCESS;
1498
b5bf28cd 1499err_req_irq:
e0aac5a2
AK		 1500 e1000_release_hw_control(adapter);
1501 e1000_power_down_phy(adapter);
581d708e 1502 e1000_free_all_rx_resources(adapter);
1da177e4 1503err_setup_rx:
581d708e 1504 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1505err_setup_tx:
1506 e1000_reset(adapter);
1507
1508 return err;
1509}
1510
1511/**
1512 * e1000_close - Disables a network interface
1513 * @netdev: network interface device structure
1514 *
1515 * Returns 0, this is not allowed to fail
1516 *
1517 * The close entry point is called when an interface is de-activated
1518 * by the OS. The hardware is still under the drivers control, but
1519 * needs to be disabled. A global MAC reset is issued to stop the
1520 * hardware, and all transmit and receive resources are freed.
1521 **/
1522
64798845 1523static int e1000_close(struct net_device *netdev)
1da177e4 1524{
60490fe0 1525 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1526 struct e1000_hw *hw = &adapter->hw;
1da177e4 1527
2db10a08 1528 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1529 e1000_down(adapter);
79f05bf0 1530 e1000_power_down_phy(adapter);
2db10a08 1531 e1000_free_irq(adapter);
1da177e4 1532
581d708e
MC		 1533 e1000_free_all_tx_resources(adapter);
1534 e1000_free_all_rx_resources(adapter);
1da177e4 1535
4666560a
BA		 1536 /* kill manageability vlan ID if supported, but not if a vlan with
1537 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1538 if ((hw->mng_cookie.status &
4666560a
BA		 1539 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1540 !(adapter->vlgrp &&
5c15bdec 1541 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1542 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1543 }
b55ccb35
JK		 1544
1545 /* If AMT is enabled, let the firmware know that the network
1546 * interface is now closed */
1dc32918
JP		 1547 if (hw->mac_type == e1000_82573 &&
1548 e1000_check_mng_mode(hw))
b55ccb35
JK		 1549 e1000_release_hw_control(adapter);
1550
1da177e4
LT		 1551 return 0;
1552}
1553
1554/**
1555 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1556 * @adapter: address of board private structure
2d7edb92
MC		 1557 * @start: address of beginning of memory
1558 * @len: length of memory
1da177e4 1559 **/
64798845
JP		 1560static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1561 unsigned long len)
1da177e4 1562{
1dc32918 1563 struct e1000_hw *hw = &adapter->hw;
e982f17c 1564 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1565 unsigned long end = begin + len;
1566
2648345f
MC		 1567 /* First rev 82545 and 82546 need to not allow any memory
1568 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1569 if (hw->mac_type == e1000_82545 ||
1570 hw->mac_type == e1000_82546) {
c3033b01 1571 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1572 }
1573
c3033b01 1574 return true;
1da177e4
LT		 1575}
1576
1577/**
1578 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1579 * @adapter: board private structure
581d708e 1580 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1581 *
1582 * Return 0 on success, negative on failure
1583 **/
1584
64798845
JP		 1585static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1586 struct e1000_tx_ring *txdr)
1da177e4 1587{
1da177e4
LT		 1588 struct pci_dev *pdev = adapter->pdev;
1589 int size;
1590
1591 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1592 txdr->buffer_info = vmalloc(size);
96838a40 1593 if (!txdr->buffer_info) {
2648345f
MC		 1594 DPRINTK(PROBE, ERR,
1595 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1596 return -ENOMEM;
1597 }
1598 memset(txdr->buffer_info, 0, size);
1599
1600 /* round up to nearest 4K */
1601
1602 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1603 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1604
1605 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1606 if (!txdr->desc) {
1da177e4 1607setup_tx_desc_die:
1da177e4 1608 vfree(txdr->buffer_info);
2648345f
MC		 1609 DPRINTK(PROBE, ERR,
1610 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1611 return -ENOMEM;
1612 }
1613
2648345f 1614 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1615 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1616 void *olddesc = txdr->desc;
1617 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1618 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1619 "at %p\n", txdr->size, txdr->desc);
1620 /* Try again, without freeing the previous */
1da177e4 1621 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1622 /* Failed allocation, critical failure */
96838a40 1623 if (!txdr->desc) {
1da177e4
LT		 1624 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1625 goto setup_tx_desc_die;
1626 }
1627
1628 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1629 /* give up */
2648345f
MC		 1630 pci_free_consistent(pdev, txdr->size, txdr->desc,
1631 txdr->dma);
1da177e4
LT		 1632 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1633 DPRINTK(PROBE, ERR,
2648345f
MC		 1634 "Unable to allocate aligned memory "
1635 "for the transmit descriptor ring\n");
1da177e4
LT		 1636 vfree(txdr->buffer_info);
1637 return -ENOMEM;
1638 } else {
2648345f 1639 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1640 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1641 }
1642 }
1643 memset(txdr->desc, 0, txdr->size);
1644
1645 txdr->next_to_use = 0;
1646 txdr->next_to_clean = 0;
2ae76d98 1647 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1648
1649 return 0;
1650}
1651
581d708e
MC		 1652/**
1653 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1654 * (Descriptors) for all queues
1655 * @adapter: board private structure
1656 *
581d708e
MC		 1657 * Return 0 on success, negative on failure
1658 **/
1659
64798845 1660int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1661{
1662 int i, err = 0;
1663
f56799ea 1664 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1665 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1666 if (err) {
1667 DPRINTK(PROBE, ERR,
1668 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1669 for (i-- ; i >= 0; i--)
1670 e1000_free_tx_resources(adapter,
1671 &adapter->tx_ring[i]);
581d708e
MC		 1672 break;
1673 }
1674 }
1675
1676 return err;
1677}
1678
1da177e4
LT		 1679/**
1680 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1681 * @adapter: board private structure
1682 *
1683 * Configure the Tx unit of the MAC after a reset.
1684 **/
1685
64798845 1686static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1687{
406874a7 1688 u64 tdba;
581d708e 1689 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1690 u32 tdlen, tctl, tipg, tarc;
1691 u32 ipgr1, ipgr2;
1da177e4
LT		 1692
1693 /* Setup the HW Tx Head and Tail descriptor pointers */
1694
f56799ea 1695 switch (adapter->num_tx_queues) {
24025e4e
MC		 1696 case 1:
1697 default:
581d708e
MC		 1698 tdba = adapter->tx_ring[0].dma;
1699 tdlen = adapter->tx_ring[0].count *
1700 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1701 ew32(TDLEN, tdlen);
1702 ew32(TDBAH, (tdba >> 32));
1703 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1704 ew32(TDT, 0);
1705 ew32(TDH, 0);
6a951698
AK		 1706 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1707 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1708 break;
1709 }
1da177e4
LT		 1710
1711 /* Set the default values for the Tx Inter Packet Gap timer */
1dc32918 1712 if (hw->mac_type <= e1000_82547_rev_2 &&
d89b6c67
JB		 1713 (hw->media_type == e1000_media_type_fiber ||
1714 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1715 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1716 else
1717 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1718
581d708e 1719 switch (hw->mac_type) {
1da177e4
LT		 1720 case e1000_82542_rev2_0:
1721 case e1000_82542_rev2_1:
1722 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1723 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1724 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1725 break;
87041639
JK		 1726 case e1000_80003es2lan:
1727 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1728 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1729 break;
1da177e4 1730 default:
0fadb059
JK		 1731 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1732 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1733 break;
1da177e4 1734 }
0fadb059
JK		 1735 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1736 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1737 ew32(TIPG, tipg);
1da177e4
LT		 1738
1739 /* Set the Tx Interrupt Delay register */
1740
1dc32918 1741 ew32(TIDV, adapter->tx_int_delay);
581d708e 1742 if (hw->mac_type >= e1000_82540)
1dc32918 1743 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1744
1745 /* Program the Transmit Control Register */
1746
1dc32918 1747 tctl = er32(TCTL);
1da177e4 1748 tctl &= ~E1000_TCTL_CT;
7e6c9861 1749 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1750 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1751
2ae76d98 1752 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1dc32918 1753 tarc = er32(TARC0);
90fb5135
AK		 1754 /* set the speed mode bit, we'll clear it if we're not at
1755 * gigabit link later */
09ae3e88 1756 tarc |= (1 << 21);
1dc32918 1757 ew32(TARC0, tarc);
87041639 1758 } else if (hw->mac_type == e1000_80003es2lan) {
1dc32918 1759 tarc = er32(TARC0);
87041639 1760 tarc |= 1;
1dc32918
JP		 1761 ew32(TARC0, tarc);
1762 tarc = er32(TARC1);
87041639 1763 tarc |= 1;
1dc32918 1764 ew32(TARC1, tarc);
2ae76d98
MC		 1765 }
1766
581d708e 1767 e1000_config_collision_dist(hw);
1da177e4
LT		 1768
1769 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1770 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1771
1772 /* only set IDE if we are delaying interrupts using the timers */
1773 if (adapter->tx_int_delay)
1774 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1775
581d708e 1776 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1777 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1778 else
1779 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1780
1781 /* Cache if we're 82544 running in PCI-X because we'll
1782 * need this to apply a workaround later in the send path. */
581d708e
MC		 1783 if (hw->mac_type == e1000_82544 &&
1784 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1785 adapter->pcix_82544 = 1;
7e6c9861 1786
1dc32918 1787 ew32(TCTL, tctl);
7e6c9861 1788
1da177e4
LT		 1789}
1790
1791/**
1792 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1793 * @adapter: board private structure
581d708e 1794 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1795 *
1796 * Returns 0 on success, negative on failure
1797 **/
1798
64798845
JP		 1799static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1800 struct e1000_rx_ring *rxdr)
1da177e4 1801{
1dc32918 1802 struct e1000_hw *hw = &adapter->hw;
1da177e4 1803 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1804 int size, desc_len;
1da177e4
LT		 1805
1806 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1807 rxdr->buffer_info = vmalloc(size);
581d708e 1808 if (!rxdr->buffer_info) {
2648345f
MC		 1809 DPRINTK(PROBE, ERR,
1810 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1811 return -ENOMEM;
1812 }
1813 memset(rxdr->buffer_info, 0, size);
1814
1dc32918 1815 if (hw->mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1816 desc_len = sizeof(struct e1000_rx_desc);
1817 else
1818 desc_len = sizeof(union e1000_rx_desc_packet_split);
1819
1da177e4
LT		 1820 /* Round up to nearest 4K */
1821
2d7edb92 1822 rxdr->size = rxdr->count * desc_len;
9099cfb9 1823 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1824
1825 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1826
581d708e
MC		 1827 if (!rxdr->desc) {
1828 DPRINTK(PROBE, ERR,
1829 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1830setup_rx_desc_die:
1da177e4
LT		 1831 vfree(rxdr->buffer_info);
1832 return -ENOMEM;
1833 }
1834
2648345f 1835 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1836 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1837 void *olddesc = rxdr->desc;
1838 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1839 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1840 "at %p\n", rxdr->size, rxdr->desc);
1841 /* Try again, without freeing the previous */
1da177e4 1842 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1843 /* Failed allocation, critical failure */
581d708e 1844 if (!rxdr->desc) {
1da177e4 1845 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1846 DPRINTK(PROBE, ERR,
1847 "Unable to allocate memory "
1848 "for the receive descriptor ring\n");
1da177e4
LT		 1849 goto setup_rx_desc_die;
1850 }
1851
1852 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1853 /* give up */
2648345f
MC		 1854 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1855 rxdr->dma);
1da177e4 1856 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1857 DPRINTK(PROBE, ERR,
1858 "Unable to allocate aligned memory "
1859 "for the receive descriptor ring\n");
581d708e 1860 goto setup_rx_desc_die;
1da177e4 1861 } else {
2648345f 1862 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1863 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1864 }
1865 }
1866 memset(rxdr->desc, 0, rxdr->size);
1867
1868 rxdr->next_to_clean = 0;
1869 rxdr->next_to_use = 0;
1870
1871 return 0;
1872}
1873
581d708e
MC		 1874/**
1875 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1876 * (Descriptors) for all queues
1877 * @adapter: board private structure
1878 *
581d708e
MC		 1879 * Return 0 on success, negative on failure
1880 **/
1881
64798845 1882int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1883{
1884 int i, err = 0;
1885
f56799ea 1886 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1887 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1888 if (err) {
1889 DPRINTK(PROBE, ERR,
1890 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1891 for (i-- ; i >= 0; i--)
1892 e1000_free_rx_resources(adapter,
1893 &adapter->rx_ring[i]);
581d708e
MC		 1894 break;
1895 }
1896 }
1897
1898 return err;
1899}
1900
1da177e4 1901/**
2648345f 1902 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1903 * @adapter: Board private structure
1904 **/
e4c811c9
MC		 1905#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1906 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
64798845 1907static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1908{
1dc32918 1909 struct e1000_hw *hw = &adapter->hw;
630b25cd 1910 u32 rctl;
1da177e4 1911
1dc32918 1912 rctl = er32(RCTL);
1da177e4
LT		 1913
1914 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1915
1916 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1917 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1918 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1919
1dc32918 1920 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1921 rctl |= E1000_RCTL_SBP;
1922 else
1923 rctl &= ~E1000_RCTL_SBP;
1924
2d7edb92
MC		 1925 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1926 rctl &= ~E1000_RCTL_LPE;
1927 else
1928 rctl |= E1000_RCTL_LPE;
1929
1da177e4 1930 /* Setup buffer sizes */
9e2feace
AK		 1931 rctl &= ~E1000_RCTL_SZ_4096;
1932 rctl |= E1000_RCTL_BSEX;
1933 switch (adapter->rx_buffer_len) {
1934 case E1000_RXBUFFER_256:
1935 rctl |= E1000_RCTL_SZ_256;
1936 rctl &= ~E1000_RCTL_BSEX;
1937 break;
1938 case E1000_RXBUFFER_512:
1939 rctl |= E1000_RCTL_SZ_512;
1940 rctl &= ~E1000_RCTL_BSEX;
1941 break;
1942 case E1000_RXBUFFER_1024:
1943 rctl |= E1000_RCTL_SZ_1024;
1944 rctl &= ~E1000_RCTL_BSEX;
1945 break;
a1415ee6
JK		 1946 case E1000_RXBUFFER_2048:
1947 default:
1948 rctl |= E1000_RCTL_SZ_2048;
1949 rctl &= ~E1000_RCTL_BSEX;
1950 break;
1951 case E1000_RXBUFFER_4096:
1952 rctl |= E1000_RCTL_SZ_4096;
1953 break;
1954 case E1000_RXBUFFER_8192:
1955 rctl |= E1000_RCTL_SZ_8192;
1956 break;
1957 case E1000_RXBUFFER_16384:
1958 rctl |= E1000_RCTL_SZ_16384;
1959 break;
2d7edb92
MC		 1960 }
1961
1dc32918 1962 ew32(RCTL, rctl);
1da177e4
LT		 1963}
1964
1965/**
1966 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1967 * @adapter: board private structure
1968 *
1969 * Configure the Rx unit of the MAC after a reset.
1970 **/
1971
64798845 1972static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1973{
406874a7 1974 u64 rdba;
581d708e 1975 struct e1000_hw *hw = &adapter->hw;
406874a7 1976 u32 rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1977
630b25cd
BJ		 1978 rdlen = adapter->rx_ring[0].count *
1979 sizeof(struct e1000_rx_desc);
1980 adapter->clean_rx = e1000_clean_rx_irq;
1981 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1da177e4
LT		 1982
1983 /* disable receives while setting up the descriptors */
1dc32918
JP		 1984 rctl = er32(RCTL);
1985 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1986
1987 /* set the Receive Delay Timer Register */
1dc32918 1988 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1989
581d708e 1990 if (hw->mac_type >= e1000_82540) {
1dc32918 1991 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1992 if (adapter->itr_setting != 0)
1dc32918 1993 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1994 }
1995
2ae76d98 1996 if (hw->mac_type >= e1000_82571) {
1dc32918 1997 ctrl_ext = er32(CTRL_EXT);
1e613fd9 1998 /* Reset delay timers after every interrupt */
6fc7a7ec 1999 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
835bb129 2000 /* Auto-Mask interrupts upon ICR access */
1e613fd9 2001 ctrl_ext |= E1000_CTRL_EXT_IAME;
1dc32918 2002 ew32(IAM, 0xffffffff);
1dc32918
JP		 2003 ew32(CTRL_EXT, ctrl_ext);
2004 E1000_WRITE_FLUSH();
2ae76d98
MC		 2005 }
2006
581d708e
MC		 2007 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2008 * the Base and Length of the Rx Descriptor Ring */
f56799ea 2009 switch (adapter->num_rx_queues) {
24025e4e
MC		 2010 case 1:
2011 default:
581d708e 2012 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 2013 ew32(RDLEN, rdlen);
2014 ew32(RDBAH, (rdba >> 32));
2015 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
2016 ew32(RDT, 0);
2017 ew32(RDH, 0);
6a951698
AK		 2018 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2019 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2020 break;
24025e4e
MC		 2021 }
2022
1da177e4 2023 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 2024 if (hw->mac_type >= e1000_82543) {
1dc32918 2025 rxcsum = er32(RXCSUM);
630b25cd 2026 if (adapter->rx_csum)
2d7edb92 2027 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 2028 else
2d7edb92 2029 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 2030 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 2031 ew32(RXCSUM, rxcsum);
1da177e4
LT		 2032 }
2033
2034 /* Enable Receives */
1dc32918 2035 ew32(RCTL, rctl);
1da177e4
LT		 2036}
2037
2038/**
581d708e 2039 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2040 * @adapter: board private structure
581d708e 2041 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2042 *
2043 * Free all transmit software resources
2044 **/
2045
64798845
JP		 2046static void e1000_free_tx_resources(struct e1000_adapter *adapter,
2047 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2048{
2049 struct pci_dev *pdev = adapter->pdev;
2050
581d708e 2051 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2052
581d708e
MC		 2053 vfree(tx_ring->buffer_info);
2054 tx_ring->buffer_info = NULL;
1da177e4 2055
581d708e 2056 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2057
581d708e
MC		 2058 tx_ring->desc = NULL;
2059}
2060
2061/**
2062 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2063 * @adapter: board private structure
2064 *
2065 * Free all transmit software resources
2066 **/
2067
64798845 2068void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2069{
2070 int i;
2071
f56799ea 2072 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2073 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2074}
2075
64798845
JP		 2076static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2077 struct e1000_buffer *buffer_info)
1da177e4 2078{
96838a40 2079 if (buffer_info->dma) {
2648345f
MC		 2080 pci_unmap_page(adapter->pdev,
2081 buffer_info->dma,
2082 buffer_info->length,
2083 PCI_DMA_TODEVICE);
a9ebadd6 2084 buffer_info->dma = 0;
1da177e4 2085 }
a9ebadd6 2086 if (buffer_info->skb) {
1da177e4 2087 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2088 buffer_info->skb = NULL;
2089 }
2090 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2091}
2092
2093/**
2094 * e1000_clean_tx_ring - Free Tx Buffers
2095 * @adapter: board private structure
581d708e 2096 * @tx_ring: ring to be cleaned
1da177e4
LT		 2097 **/
2098
64798845
JP		 2099static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2100 struct e1000_tx_ring *tx_ring)
1da177e4 2101{
1dc32918 2102 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2103 struct e1000_buffer *buffer_info;
2104 unsigned long size;
2105 unsigned int i;
2106
2107 /* Free all the Tx ring sk_buffs */
2108
96838a40 2109 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2110 buffer_info = &tx_ring->buffer_info[i];
2111 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2112 }
2113
2114 size = sizeof(struct e1000_buffer) * tx_ring->count;
2115 memset(tx_ring->buffer_info, 0, size);
2116
2117 /* Zero out the descriptor ring */
2118
2119 memset(tx_ring->desc, 0, tx_ring->size);
2120
2121 tx_ring->next_to_use = 0;
2122 tx_ring->next_to_clean = 0;
fd803241 2123 tx_ring->last_tx_tso = 0;
1da177e4 2124
1dc32918
JP		 2125 writel(0, hw->hw_addr + tx_ring->tdh);
2126 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2127}
2128
2129/**
2130 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2131 * @adapter: board private structure
2132 **/
2133
64798845 2134static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2135{
2136 int i;
2137
f56799ea 2138 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2139 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2140}
2141
2142/**
2143 * e1000_free_rx_resources - Free Rx Resources
2144 * @adapter: board private structure
581d708e 2145 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2146 *
2147 * Free all receive software resources
2148 **/
2149
64798845
JP		 2150static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2151 struct e1000_rx_ring *rx_ring)
1da177e4 2152{
1da177e4
LT		 2153 struct pci_dev *pdev = adapter->pdev;
2154
581d708e 2155 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2156
2157 vfree(rx_ring->buffer_info);
2158 rx_ring->buffer_info = NULL;
2159
2160 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2161
2162 rx_ring->desc = NULL;
2163}
2164
2165/**
581d708e 2166 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2167 * @adapter: board private structure
581d708e
MC		 2168 *
2169 * Free all receive software resources
2170 **/
2171
64798845 2172void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2173{
2174 int i;
2175
f56799ea 2176 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2177 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2178}
2179
2180/**
2181 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2182 * @adapter: board private structure
2183 * @rx_ring: ring to free buffers from
1da177e4
LT		 2184 **/
2185
64798845
JP		 2186static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2187 struct e1000_rx_ring *rx_ring)
1da177e4 2188{
1dc32918 2189 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2190 struct e1000_buffer *buffer_info;
2191 struct pci_dev *pdev = adapter->pdev;
2192 unsigned long size;
630b25cd 2193 unsigned int i;
1da177e4
LT		 2194
2195 /* Free all the Rx ring sk_buffs */
96838a40 2196 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2197 buffer_info = &rx_ring->buffer_info[i];
96838a40 2198 if (buffer_info->skb) {
1da177e4
LT		 2199 pci_unmap_single(pdev,
2200 buffer_info->dma,
2201 buffer_info->length,
2202 PCI_DMA_FROMDEVICE);
2203
2204 dev_kfree_skb(buffer_info->skb);
2205 buffer_info->skb = NULL;
997f5cbd 2206 }
1da177e4
LT		 2207 }
2208
2209 size = sizeof(struct e1000_buffer) * rx_ring->count;
2210 memset(rx_ring->buffer_info, 0, size);
2211
2212 /* Zero out the descriptor ring */
2213
2214 memset(rx_ring->desc, 0, rx_ring->size);
2215
2216 rx_ring->next_to_clean = 0;
2217 rx_ring->next_to_use = 0;
2218
1dc32918
JP		 2219 writel(0, hw->hw_addr + rx_ring->rdh);
2220 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2221}
2222
2223/**
2224 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2225 * @adapter: board private structure
2226 **/
2227
64798845 2228static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2229{
2230 int i;
2231
f56799ea 2232 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2233 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2234}
2235
2236/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2237 * and memory write and invalidate disabled for certain operations
2238 */
64798845 2239static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2240{
1dc32918 2241 struct e1000_hw *hw = &adapter->hw;
1da177e4 2242 struct net_device *netdev = adapter->netdev;
406874a7 2243 u32 rctl;
1da177e4 2244
1dc32918 2245 e1000_pci_clear_mwi(hw);
1da177e4 2246
1dc32918 2247 rctl = er32(RCTL);
1da177e4 2248 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2249 ew32(RCTL, rctl);
2250 E1000_WRITE_FLUSH();
1da177e4
LT		 2251 mdelay(5);
2252
96838a40 2253 if (netif_running(netdev))
581d708e 2254 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2255}
2256
64798845 2257static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2258{
1dc32918 2259 struct e1000_hw *hw = &adapter->hw;
1da177e4 2260 struct net_device *netdev = adapter->netdev;
406874a7 2261 u32 rctl;
1da177e4 2262
1dc32918 2263 rctl = er32(RCTL);
1da177e4 2264 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2265 ew32(RCTL, rctl);
2266 E1000_WRITE_FLUSH();
1da177e4
LT		 2267 mdelay(5);
2268
1dc32918
JP		 2269 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2270 e1000_pci_set_mwi(hw);
1da177e4 2271
96838a40 2272 if (netif_running(netdev)) {
72d64a43
JK		 2273 /* No need to loop, because 82542 supports only 1 queue */
2274 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2275 e1000_configure_rx(adapter);
72d64a43 2276 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2277 }
2278}
2279
2280/**
2281 * e1000_set_mac - Change the Ethernet Address of the NIC
2282 * @netdev: network interface device structure
2283 * @p: pointer to an address structure
2284 *
2285 * Returns 0 on success, negative on failure
2286 **/
2287
64798845 2288static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2289{
60490fe0 2290 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2291 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2292 struct sockaddr *addr = p;
2293
96838a40 2294 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2295 return -EADDRNOTAVAIL;
2296
2297 /* 82542 2.0 needs to be in reset to write receive address registers */
2298
1dc32918 2299 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2300 e1000_enter_82542_rst(adapter);
2301
2302 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2303 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2304
1dc32918 2305 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2306
868d5309
MC		 2307 /* With 82571 controllers, LAA may be overwritten (with the default)
2308 * due to controller reset from the other port. */
1dc32918 2309 if (hw->mac_type == e1000_82571) {
868d5309 2310 /* activate the work around */
1dc32918 2311 hw->laa_is_present = 1;
868d5309 2312
96838a40
JB		 2313 /* Hold a copy of the LAA in RAR[14] This is done so that
2314 * between the time RAR[0] gets clobbered and the time it
2315 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2316 * of the RARs and no incoming packets directed to this port
96838a40 2317 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2318 * RAR[14] */
1dc32918 2319 e1000_rar_set(hw, hw->mac_addr,
868d5309
MC		 2320 E1000_RAR_ENTRIES - 1);
2321 }
2322
1dc32918 2323 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2324 e1000_leave_82542_rst(adapter);
2325
2326 return 0;
2327}
2328
2329/**
db0ce50d 2330 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2331 * @netdev: network interface device structure
2332 *
db0ce50d
PM		 2333 * The set_rx_mode entry point is called whenever the unicast or multicast
2334 * address lists or the network interface flags are updated. This routine is
2335 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2336 * promiscuous mode, and all-multi behavior.
2337 **/
2338
64798845 2339static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2340{
60490fe0 2341 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2342 struct e1000_hw *hw = &adapter->hw;
db0ce50d
PM		 2343 struct dev_addr_list *uc_ptr;
2344 struct dev_addr_list *mc_ptr;
406874a7
JP		 2345 u32 rctl;
2346 u32 hash_value;
868d5309 2347 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2348 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2349 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2350 E1000_NUM_MTA_REGISTERS;
2351
1dc32918 2352 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 2353 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2354
868d5309 2355 /* reserve RAR[14] for LAA over-write work-around */
1dc32918 2356 if (hw->mac_type == e1000_82571)
868d5309 2357 rar_entries--;
1da177e4 2358
2648345f
MC		 2359 /* Check for Promiscuous and All Multicast modes */
2360
1dc32918 2361 rctl = er32(RCTL);
1da177e4 2362
96838a40 2363 if (netdev->flags & IFF_PROMISC) {
1da177e4 2364 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2365 rctl &= ~E1000_RCTL_VFE;
1da177e4 2366 } else {
746b9f02
PM		 2367 if (netdev->flags & IFF_ALLMULTI) {
2368 rctl |= E1000_RCTL_MPE;
2369 } else {
2370 rctl &= ~E1000_RCTL_MPE;
2371 }
78ed11a5 2372 if (adapter->hw.mac_type != e1000_ich8lan)
746b9f02 2373 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2374 }
2375
2376 uc_ptr = NULL;
2377 if (netdev->uc_count > rar_entries - 1) {
2378 rctl |= E1000_RCTL_UPE;
2379 } else if (!(netdev->flags & IFF_PROMISC)) {
2380 rctl &= ~E1000_RCTL_UPE;
2381 uc_ptr = netdev->uc_list;
1da177e4
LT		 2382 }
2383
1dc32918 2384 ew32(RCTL, rctl);
1da177e4
LT		 2385
2386 /* 82542 2.0 needs to be in reset to write receive address registers */
2387
96838a40 2388 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2389 e1000_enter_82542_rst(adapter);
2390
db0ce50d
PM		 2391 /* load the first 14 addresses into the exact filters 1-14. Unicast
2392 * addresses take precedence to avoid disabling unicast filtering
2393 * when possible.
2394 *
1da177e4
LT		 2395 * RAR 0 is used for the station MAC adddress
2396 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2397 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2398 */
2399 mc_ptr = netdev->mc_list;
2400
96838a40 2401 for (i = 1; i < rar_entries; i++) {
db0ce50d
PM		 2402 if (uc_ptr) {
2403 e1000_rar_set(hw, uc_ptr->da_addr, i);
2404 uc_ptr = uc_ptr->next;
2405 } else if (mc_ptr) {
2406 e1000_rar_set(hw, mc_ptr->da_addr, i);
1da177e4
LT		 2407 mc_ptr = mc_ptr->next;
2408 } else {
2409 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
1dc32918 2410 E1000_WRITE_FLUSH();
1da177e4 2411 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
1dc32918 2412 E1000_WRITE_FLUSH();
1da177e4
LT		 2413 }
2414 }
db0ce50d 2415 WARN_ON(uc_ptr != NULL);
1da177e4
LT		 2416
2417 /* clear the old settings from the multicast hash table */
2418
cd94dd0b 2419 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2420 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
1dc32918 2421 E1000_WRITE_FLUSH();
4ca213a6 2422 }
1da177e4
LT		 2423
2424 /* load any remaining addresses into the hash table */
2425
96838a40 2426 for (; mc_ptr; mc_ptr = mc_ptr->next) {
db0ce50d 2427 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
1da177e4
LT		 2428 e1000_mta_set(hw, hash_value);
2429 }
2430
96838a40 2431 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2432 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2433}
2434
2435/* Need to wait a few seconds after link up to get diagnostic information from
2436 * the phy */
2437
64798845 2438static void e1000_update_phy_info(unsigned long data)
1da177e4 2439{
e982f17c 2440 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2441 struct e1000_hw *hw = &adapter->hw;
2442 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2443}
2444
2445/**
2446 * e1000_82547_tx_fifo_stall - Timer Call-back
2447 * @data: pointer to adapter cast into an unsigned long
2448 **/
2449
64798845 2450static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2451{
e982f17c 2452 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2453 struct e1000_hw *hw = &adapter->hw;
1da177e4 2454 struct net_device *netdev = adapter->netdev;
406874a7 2455 u32 tctl;
1da177e4 2456
96838a40 2457 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2458 if ((er32(TDT) == er32(TDH)) &&
2459 (er32(TDFT) == er32(TDFH)) &&
2460 (er32(TDFTS) == er32(TDFHS))) {
2461 tctl = er32(TCTL);
2462 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2463 ew32(TDFT, adapter->tx_head_addr);
2464 ew32(TDFH, adapter->tx_head_addr);
2465 ew32(TDFTS, adapter->tx_head_addr);
2466 ew32(TDFHS, adapter->tx_head_addr);
2467 ew32(TCTL, tctl);
2468 E1000_WRITE_FLUSH();
1da177e4
LT		 2469
2470 adapter->tx_fifo_head = 0;
2471 atomic_set(&adapter->tx_fifo_stall, 0);
2472 netif_wake_queue(netdev);
2473 } else {
2474 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2475 }
2476 }
2477}
2478
2479/**
2480 * e1000_watchdog - Timer Call-back
2481 * @data: pointer to adapter cast into an unsigned long
2482 **/
64798845 2483static void e1000_watchdog(unsigned long data)
1da177e4 2484{
e982f17c 2485 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2486 struct e1000_hw *hw = &adapter->hw;
1da177e4 2487 struct net_device *netdev = adapter->netdev;
545c67c0 2488 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7
JP		 2489 u32 link, tctl;
2490 s32 ret_val;
cd94dd0b 2491
1dc32918 2492 ret_val = e1000_check_for_link(hw);
cd94dd0b 2493 if ((ret_val == E1000_ERR_PHY) &&
1dc32918
JP		 2494 (hw->phy_type == e1000_phy_igp_3) &&
2495 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
cd94dd0b
AK		 2496 /* See e1000_kumeran_lock_loss_workaround() */
2497 DPRINTK(LINK, INFO,
2498 "Gigabit has been disabled, downgrading speed\n");
2499 }
90fb5135 2500
1dc32918
JP		 2501 if (hw->mac_type == e1000_82573) {
2502 e1000_enable_tx_pkt_filtering(hw);
2503 if (adapter->mng_vlan_id != hw->mng_cookie.vlan_id)
2d7edb92 2504 e1000_update_mng_vlan(adapter);
96838a40 2505 }
1da177e4 2506
1dc32918
JP		 2507 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2508 !(er32(TXCW) & E1000_TXCW_ANE))
2509 link = !hw->serdes_link_down;
1da177e4 2510 else
1dc32918 2511 link = er32(STATUS) & E1000_STATUS_LU;
1da177e4 2512
96838a40
JB		 2513 if (link) {
2514 if (!netif_carrier_ok(netdev)) {
406874a7 2515 u32 ctrl;
c3033b01 2516 bool txb2b = true;
1dc32918 2517 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2518 &adapter->link_speed,
2519 &adapter->link_duplex);
2520
1dc32918 2521 ctrl = er32(CTRL);
9669f53b
AK		 2522 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2523 "Flow Control: %s\n",
2524 adapter->link_speed,
2525 adapter->link_duplex == FULL_DUPLEX ?
2526 "Full Duplex" : "Half Duplex",
2527 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2528 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2529 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2530 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2531
7e6c9861
JK		 2532 /* tweak tx_queue_len according to speed/duplex
2533 * and adjust the timeout factor */
66a2b0a3
JK		 2534 netdev->tx_queue_len = adapter->tx_queue_len;
2535 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2536 switch (adapter->link_speed) {
2537 case SPEED_10:
c3033b01 2538 txb2b = false;
7e6c9861
JK		 2539 netdev->tx_queue_len = 10;
2540 adapter->tx_timeout_factor = 8;
2541 break;
2542 case SPEED_100:
c3033b01 2543 txb2b = false;
7e6c9861
JK		 2544 netdev->tx_queue_len = 100;
2545 /* maybe add some timeout factor ? */
2546 break;
2547 }
2548
1dc32918
JP		 2549 if ((hw->mac_type == e1000_82571 ||
2550 hw->mac_type == e1000_82572) &&
c3033b01 2551 !txb2b) {
406874a7 2552 u32 tarc0;
1dc32918 2553 tarc0 = er32(TARC0);
90fb5135 2554 tarc0 &= ~(1 << 21);
1dc32918 2555 ew32(TARC0, tarc0);
7e6c9861 2556 }
90fb5135 2557
7e6c9861
JK		 2558 /* disable TSO for pcie and 10/100 speeds, to avoid
2559 * some hardware issues */
2560 if (!adapter->tso_force &&
1dc32918 2561 hw->bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2562 switch (adapter->link_speed) {
2563 case SPEED_10:
66a2b0a3 2564 case SPEED_100:
7e6c9861
JK		 2565 DPRINTK(PROBE,INFO,
2566 "10/100 speed: disabling TSO\n");
2567 netdev->features &= ~NETIF_F_TSO;
87ca4e5b 2568 netdev->features &= ~NETIF_F_TSO6;
7e6c9861
JK		 2569 break;
2570 case SPEED_1000:
2571 netdev->features |= NETIF_F_TSO;
87ca4e5b 2572 netdev->features |= NETIF_F_TSO6;
7e6c9861
JK		 2573 break;
2574 default:
2575 /* oops */
66a2b0a3
JK		 2576 break;
2577 }
2578 }
7e6c9861
JK		 2579
2580 /* enable transmits in the hardware, need to do this
2581 * after setting TARC0 */
1dc32918 2582 tctl = er32(TCTL);
7e6c9861 2583 tctl |= E1000_TCTL_EN;
1dc32918 2584 ew32(TCTL, tctl);
66a2b0a3 2585
1da177e4
LT		 2586 netif_carrier_on(netdev);
2587 netif_wake_queue(netdev);
56e1393f 2588 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4 2589 adapter->smartspeed = 0;
bb8e3311
JG		 2590 } else {
2591 /* make sure the receive unit is started */
1dc32918
JP		 2592 if (hw->rx_needs_kicking) {
2593 u32 rctl = er32(RCTL);
2594 ew32(RCTL, rctl | E1000_RCTL_EN);
bb8e3311 2595 }
1da177e4
LT		 2596 }
2597 } else {
96838a40 2598 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2599 adapter->link_speed = 0;
2600 adapter->link_duplex = 0;
2601 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2602 netif_carrier_off(netdev);
2603 netif_stop_queue(netdev);
56e1393f 2604 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
87041639
JK		 2605
2606 /* 80003ES2LAN workaround--
2607 * For packet buffer work-around on link down event;
2608 * disable receives in the ISR and
2609 * reset device here in the watchdog
2610 */
1dc32918 2611 if (hw->mac_type == e1000_80003es2lan)
87041639
JK		 2612 /* reset device */
2613 schedule_work(&adapter->reset_task);
1da177e4
LT		 2614 }
2615
2616 e1000_smartspeed(adapter);
2617 }
2618
2619 e1000_update_stats(adapter);
2620
1dc32918 2621 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2622 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2623 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2624 adapter->colc_old = adapter->stats.colc;
2625
2626 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2627 adapter->gorcl_old = adapter->stats.gorcl;
2628 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2629 adapter->gotcl_old = adapter->stats.gotcl;
2630
1dc32918 2631 e1000_update_adaptive(hw);
1da177e4 2632
f56799ea 2633 if (!netif_carrier_ok(netdev)) {
581d708e 2634 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2635 /* We've lost link, so the controller stops DMA,
2636 * but we've got queued Tx work that's never going
2637 * to get done, so reset controller to flush Tx.
2638 * (Do the reset outside of interrupt context). */
87041639
JK		 2639 adapter->tx_timeout_count++;
2640 schedule_work(&adapter->reset_task);
1da177e4
LT		 2641 }
2642 }
2643
1da177e4 2644 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2645 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2646
2648345f 2647 /* Force detection of hung controller every watchdog period */
c3033b01 2648 adapter->detect_tx_hung = true;
1da177e4 2649
96838a40 2650 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309 2651 * reset from the other port. Set the appropriate LAA in RAR[0] */
1dc32918
JP		 2652 if (hw->mac_type == e1000_82571 && hw->laa_is_present)
2653 e1000_rar_set(hw, hw->mac_addr, 0);
868d5309 2654
1da177e4 2655 /* Reset the timer */
56e1393f 2656 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2657}
2658
835bb129
JB		 2659enum latency_range {
2660 lowest_latency = 0,
2661 low_latency = 1,
2662 bulk_latency = 2,
2663 latency_invalid = 255
2664};
2665
2666/**
2667 * e1000_update_itr - update the dynamic ITR value based on statistics
2668 * Stores a new ITR value based on packets and byte
2669 * counts during the last interrupt. The advantage of per interrupt
2670 * computation is faster updates and more accurate ITR for the current
2671 * traffic pattern. Constants in this function were computed
2672 * based on theoretical maximum wire speed and thresholds were set based
2673 * on testing data as well as attempting to minimize response time
2674 * while increasing bulk throughput.
2675 * this functionality is controlled by the InterruptThrottleRate module
2676 * parameter (see e1000_param.c)
2677 * @adapter: pointer to adapter
2678 * @itr_setting: current adapter->itr
2679 * @packets: the number of packets during this measurement interval
2680 * @bytes: the number of bytes during this measurement interval
2681 **/
2682static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2683 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2684{
2685 unsigned int retval = itr_setting;
2686 struct e1000_hw *hw = &adapter->hw;
2687
2688 if (unlikely(hw->mac_type < e1000_82540))
2689 goto update_itr_done;
2690
2691 if (packets == 0)
2692 goto update_itr_done;
2693
835bb129
JB		 2694 switch (itr_setting) {
2695 case lowest_latency:
2b65326e
JB		 2696 /* jumbo frames get bulk treatment*/
2697 if (bytes/packets > 8000)
2698 retval = bulk_latency;
2699 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2700 retval = low_latency;
2701 break;
2702 case low_latency: /* 50 usec aka 20000 ints/s */
2703 if (bytes > 10000) {
2b65326e
JB		 2704 /* jumbo frames need bulk latency setting */
2705 if (bytes/packets > 8000)
2706 retval = bulk_latency;
2707 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2708 retval = bulk_latency;
2709 else if ((packets > 35))
2710 retval = lowest_latency;
2b65326e
JB		 2711 } else if (bytes/packets > 2000)
2712 retval = bulk_latency;
2713 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2714 retval = lowest_latency;
2715 break;
2716 case bulk_latency: /* 250 usec aka 4000 ints/s */
2717 if (bytes > 25000) {
2718 if (packets > 35)
2719 retval = low_latency;
2b65326e
JB		 2720 } else if (bytes < 6000) {
2721 retval = low_latency;
835bb129
JB		 2722 }
2723 break;
2724 }
2725
2726update_itr_done:
2727 return retval;
2728}
2729
2730static void e1000_set_itr(struct e1000_adapter *adapter)
2731{
2732 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2733 u16 current_itr;
2734 u32 new_itr = adapter->itr;
835bb129
JB		 2735
2736 if (unlikely(hw->mac_type < e1000_82540))
2737 return;
2738
2739 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2740 if (unlikely(adapter->link_speed != SPEED_1000)) {
2741 current_itr = 0;
2742 new_itr = 4000;
2743 goto set_itr_now;
2744 }
2745
2746 adapter->tx_itr = e1000_update_itr(adapter,
2747 adapter->tx_itr,
2748 adapter->total_tx_packets,
2749 adapter->total_tx_bytes);
2b65326e
JB		 2750 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2751 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2752 adapter->tx_itr = low_latency;
2753
835bb129
JB		 2754 adapter->rx_itr = e1000_update_itr(adapter,
2755 adapter->rx_itr,
2756 adapter->total_rx_packets,
2757 adapter->total_rx_bytes);
2b65326e
JB		 2758 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2759 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2760 adapter->rx_itr = low_latency;
835bb129
JB		 2761
2762 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2763
835bb129
JB		 2764 switch (current_itr) {
2765 /* counts and packets in update_itr are dependent on these numbers */
2766 case lowest_latency:
2767 new_itr = 70000;
2768 break;
2769 case low_latency:
2770 new_itr = 20000; /* aka hwitr = ~200 */
2771 break;
2772 case bulk_latency:
2773 new_itr = 4000;
2774 break;
2775 default:
2776 break;
2777 }
2778
2779set_itr_now:
2780 if (new_itr != adapter->itr) {
2781 /* this attempts to bias the interrupt rate towards Bulk
2782 * by adding intermediate steps when interrupt rate is
2783 * increasing */
2784 new_itr = new_itr > adapter->itr ?
2785 min(adapter->itr + (new_itr >> 2), new_itr) :
2786 new_itr;
2787 adapter->itr = new_itr;
1dc32918 2788 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2789 }
2790
2791 return;
2792}
2793
1da177e4
LT		 2794#define E1000_TX_FLAGS_CSUM 0x00000001
2795#define E1000_TX_FLAGS_VLAN 0x00000002
2796#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2797#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2798#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2799#define E1000_TX_FLAGS_VLAN_SHIFT 16
2800
64798845
JP		 2801static int e1000_tso(struct e1000_adapter *adapter,
2802 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2803{
1da177e4 2804 struct e1000_context_desc *context_desc;
545c67c0 2805 struct e1000_buffer *buffer_info;
1da177e4 2806 unsigned int i;
406874a7
JP		 2807 u32 cmd_length = 0;
2808 u16 ipcse = 0, tucse, mss;
2809 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2810 int err;
2811
89114afd 2812 if (skb_is_gso(skb)) {
1da177e4
LT		 2813 if (skb_header_cloned(skb)) {
2814 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2815 if (err)
2816 return err;
2817 }
2818
ab6a5bb6 2819 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2820 mss = skb_shinfo(skb)->gso_size;
60828236 2821 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2822 struct iphdr *iph = ip_hdr(skb);
2823 iph->tot_len = 0;
2824 iph->check = 0;
aa8223c7
ACM		 2825 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2826 iph->daddr, 0,
2827 IPPROTO_TCP,
2828 0);
2d7edb92 2829 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2830 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2831 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2832 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2833 tcp_hdr(skb)->check =
0660e03f
ACM		 2834 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2835 &ipv6_hdr(skb)->daddr,
2836 0, IPPROTO_TCP, 0);
2d7edb92 2837 ipcse = 0;
2d7edb92 2838 }
bbe735e4 2839 ipcss = skb_network_offset(skb);
eddc9ec5 2840 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2841 tucss = skb_transport_offset(skb);
aa8223c7 2842 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2843 tucse = 0;
2844
2845 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2846 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2847
581d708e
MC		 2848 i = tx_ring->next_to_use;
2849 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2850 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2851
2852 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2853 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2854 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2855 context_desc->upper_setup.tcp_fields.tucss = tucss;
2856 context_desc->upper_setup.tcp_fields.tucso = tucso;
2857 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2858 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2859 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2860 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2861
545c67c0 2862 buffer_info->time_stamp = jiffies;
a9ebadd6 2863 buffer_info->next_to_watch = i;
545c67c0 2864
581d708e
MC		 2865 if (++i == tx_ring->count) i = 0;
2866 tx_ring->next_to_use = i;
1da177e4 2867
c3033b01 2868 return true;
1da177e4 2869 }
c3033b01 2870 return false;
1da177e4
LT		 2871}
2872
64798845
JP		 2873static bool e1000_tx_csum(struct e1000_adapter *adapter,
2874 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2875{
2876 struct e1000_context_desc *context_desc;
545c67c0 2877 struct e1000_buffer *buffer_info;
1da177e4 2878 unsigned int i;
406874a7 2879 u8 css;
3ed30676 2880 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2881
3ed30676
DG		 2882 if (skb->ip_summed != CHECKSUM_PARTIAL)
2883 return false;
1da177e4 2884
3ed30676
DG		 2885 switch (skb->protocol) {
2886 case __constant_htons(ETH_P_IP):
2887 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2888 cmd_len |= E1000_TXD_CMD_TCP;
2889 break;
2890 case __constant_htons(ETH_P_IPV6):
2891 /* XXX not handling all IPV6 headers */
2892 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2893 cmd_len |= E1000_TXD_CMD_TCP;
2894 break;
2895 default:
2896 if (unlikely(net_ratelimit()))
2897 DPRINTK(DRV, WARNING,
2898 "checksum_partial proto=%x!\n", skb->protocol);
2899 break;
2900 }
1da177e4 2901
3ed30676 2902 css = skb_transport_offset(skb);
1da177e4 2903
3ed30676
DG		 2904 i = tx_ring->next_to_use;
2905 buffer_info = &tx_ring->buffer_info[i];
2906 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2907
3ed30676
DG		 2908 context_desc->lower_setup.ip_config = 0;
2909 context_desc->upper_setup.tcp_fields.tucss = css;
2910 context_desc->upper_setup.tcp_fields.tucso =
2911 css + skb->csum_offset;
2912 context_desc->upper_setup.tcp_fields.tucse = 0;
2913 context_desc->tcp_seg_setup.data = 0;
2914 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2915
3ed30676
DG		 2916 buffer_info->time_stamp = jiffies;
2917 buffer_info->next_to_watch = i;
1da177e4 2918
3ed30676
DG		 2919 if (unlikely(++i == tx_ring->count)) i = 0;
2920 tx_ring->next_to_use = i;
2921
2922 return true;
1da177e4
LT		 2923}
2924
2925#define E1000_MAX_TXD_PWR 12
2926#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2927
64798845
JP		 2928static int e1000_tx_map(struct e1000_adapter *adapter,
2929 struct e1000_tx_ring *tx_ring,
2930 struct sk_buff *skb, unsigned int first,
2931 unsigned int max_per_txd, unsigned int nr_frags,
2932 unsigned int mss)
1da177e4 2933{
1dc32918 2934 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2935 struct e1000_buffer *buffer_info;
2936 unsigned int len = skb->len;
2937 unsigned int offset = 0, size, count = 0, i;
2938 unsigned int f;
2939 len -= skb->data_len;
2940
2941 i = tx_ring->next_to_use;
2942
96838a40 2943 while (len) {
1da177e4
LT		 2944 buffer_info = &tx_ring->buffer_info[i];
2945 size = min(len, max_per_txd);
fd803241
JK		 2946 /* Workaround for Controller erratum --
2947 * descriptor for non-tso packet in a linear SKB that follows a
2948 * tso gets written back prematurely before the data is fully
0f15a8fa 2949 * DMA'd to the controller */
fd803241 2950 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2951 !skb_is_gso(skb)) {
fd803241
JK		 2952 tx_ring->last_tx_tso = 0;
2953 size -= 4;
2954 }
2955
1da177e4
LT		 2956 /* Workaround for premature desc write-backs
2957 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2958 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2959 size -= 4;
97338bde
MC		 2960 /* work-around for errata 10 and it applies
2961 * to all controllers in PCI-X mode
2962 * The fix is to make sure that the first descriptor of a
2963 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2964 */
1dc32918 2965 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2966 (size > 2015) && count == 0))
2967 size = 2015;
96838a40 2968
1da177e4
LT		 2969 /* Workaround for potential 82544 hang in PCI-X. Avoid
2970 * terminating buffers within evenly-aligned dwords. */
96838a40 2971 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2972 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2973 size > 4))
2974 size -= 4;
2975
2976 buffer_info->length = size;
2977 buffer_info->dma =
2978 pci_map_single(adapter->pdev,
2979 skb->data + offset,
2980 size,
2981 PCI_DMA_TODEVICE);
2982 buffer_info->time_stamp = jiffies;
a9ebadd6 2983 buffer_info->next_to_watch = i;
1da177e4
LT		 2984
2985 len -= size;
2986 offset += size;
2987 count++;
96838a40 2988 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2989 }
2990
96838a40 2991 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2992 struct skb_frag_struct *frag;
2993
2994 frag = &skb_shinfo(skb)->frags[f];
2995 len = frag->size;
2996 offset = frag->page_offset;
2997
96838a40 2998 while (len) {
1da177e4
LT		 2999 buffer_info = &tx_ring->buffer_info[i];
3000 size = min(len, max_per_txd);
1da177e4
LT		 3001 /* Workaround for premature desc write-backs
3002 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3003 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 3004 size -= 4;
1da177e4
LT		 3005 /* Workaround for potential 82544 hang in PCI-X.
3006 * Avoid terminating buffers within evenly-aligned
3007 * dwords. */
96838a40 3008 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3009 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3010 size > 4))
3011 size -= 4;
3012
3013 buffer_info->length = size;
3014 buffer_info->dma =
3015 pci_map_page(adapter->pdev,
3016 frag->page,
3017 offset,
3018 size,
3019 PCI_DMA_TODEVICE);
3020 buffer_info->time_stamp = jiffies;
a9ebadd6 3021 buffer_info->next_to_watch = i;
1da177e4
LT		 3022
3023 len -= size;
3024 offset += size;
3025 count++;
96838a40 3026 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3027 }
3028 }
3029
3030 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3031 tx_ring->buffer_info[i].skb = skb;
3032 tx_ring->buffer_info[first].next_to_watch = i;
3033
3034 return count;
3035}
3036
64798845
JP		 3037static void e1000_tx_queue(struct e1000_adapter *adapter,
3038 struct e1000_tx_ring *tx_ring, int tx_flags,
3039 int count)
1da177e4 3040{
1dc32918 3041 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3042 struct e1000_tx_desc *tx_desc = NULL;
3043 struct e1000_buffer *buffer_info;
406874a7 3044 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 3045 unsigned int i;
3046
96838a40 3047 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3048 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3049 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3050 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3051
96838a40 3052 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3053 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3054 }
3055
96838a40 3056 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3057 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3058 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3059 }
3060
96838a40 3061 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3062 txd_lower |= E1000_TXD_CMD_VLE;
3063 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3064 }
3065
3066 i = tx_ring->next_to_use;
3067
96838a40 3068 while (count--) {
1da177e4
LT		 3069 buffer_info = &tx_ring->buffer_info[i];
3070 tx_desc = E1000_TX_DESC(*tx_ring, i);
3071 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3072 tx_desc->lower.data =
3073 cpu_to_le32(txd_lower | buffer_info->length);
3074 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3075 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3076 }
3077
3078 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3079
3080 /* Force memory writes to complete before letting h/w
3081 * know there are new descriptors to fetch. (Only
3082 * applicable for weak-ordered memory model archs,
3083 * such as IA-64). */
3084 wmb();
3085
3086 tx_ring->next_to_use = i;
1dc32918 3087 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 3088 /* we need this if more than one processor can write to our tail
3089 * at a time, it syncronizes IO on IA64/Altix systems */
3090 mmiowb();
1da177e4
LT		 3091}
3092
3093/**
3094 * 82547 workaround to avoid controller hang in half-duplex environment.
3095 * The workaround is to avoid queuing a large packet that would span
3096 * the internal Tx FIFO ring boundary by notifying the stack to resend
3097 * the packet at a later time. This gives the Tx FIFO an opportunity to
3098 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3099 * to the beginning of the Tx FIFO.
3100 **/
3101
3102#define E1000_FIFO_HDR 0x10
3103#define E1000_82547_PAD_LEN 0x3E0
3104
64798845
JP		 3105static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3106 struct sk_buff *skb)
1da177e4 3107{
406874a7
JP		 3108 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3109 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3110
9099cfb9 3111 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3112
96838a40 3113 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3114 goto no_fifo_stall_required;
3115
96838a40 3116 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3117 return 1;
3118
96838a40 3119 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3120 atomic_set(&adapter->tx_fifo_stall, 1);
3121 return 1;
3122 }
3123
3124no_fifo_stall_required:
3125 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3126 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3127 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3128 return 0;
3129}
3130
2d7edb92 3131#define MINIMUM_DHCP_PACKET_SIZE 282
64798845
JP		 3132static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3133 struct sk_buff *skb)
2d7edb92
MC		 3134{
3135 struct e1000_hw *hw = &adapter->hw;
406874a7 3136 u16 length, offset;
96838a40 3137 if (vlan_tx_tag_present(skb)) {
1dc32918
JP		 3138 if (!((vlan_tx_tag_get(skb) == hw->mng_cookie.vlan_id) &&
3139 ( hw->mng_cookie.status &
2d7edb92
MC		 3140 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3141 return 0;
3142 }
20a44028 3143 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
e982f17c 3144 struct ethhdr *eth = (struct ethhdr *)skb->data;
96838a40
JB		 3145 if ((htons(ETH_P_IP) == eth->h_proto)) {
3146 const struct iphdr *ip =
406874a7 3147 (struct iphdr *)((u8 *)skb->data+14);
96838a40
JB		 3148 if (IPPROTO_UDP == ip->protocol) {
3149 struct udphdr *udp =
406874a7 3150 (struct udphdr *)((u8 *)ip +
2d7edb92 3151 (ip->ihl << 2));
96838a40 3152 if (ntohs(udp->dest) == 67) {
406874a7 3153 offset = (u8 *)udp + 8 - skb->data;
2d7edb92
MC		 3154 length = skb->len - offset;
3155
3156 return e1000_mng_write_dhcp_info(hw,
406874a7 3157 (u8 *)udp + 8,
2d7edb92
MC		 3158 length);
3159 }
3160 }
3161 }
3162 }
3163 return 0;
3164}
3165
65c7973f
JB		 3166static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3167{
3168 struct e1000_adapter *adapter = netdev_priv(netdev);
3169 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3170
3171 netif_stop_queue(netdev);
3172 /* Herbert's original patch had:
3173 * smp_mb__after_netif_stop_queue();
3174 * but since that doesn't exist yet, just open code it. */
3175 smp_mb();
3176
3177 /* We need to check again in a case another CPU has just
3178 * made room available. */
3179 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3180 return -EBUSY;
3181
3182 /* A reprieve! */
3183 netif_start_queue(netdev);
fcfb1224 3184 ++adapter->restart_queue;
65c7973f
JB		 3185 return 0;
3186}
3187
3188static int e1000_maybe_stop_tx(struct net_device *netdev,
3189 struct e1000_tx_ring *tx_ring, int size)
3190{
3191 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3192 return 0;
3193 return __e1000_maybe_stop_tx(netdev, size);
3194}
3195
1da177e4 3196#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
64798845 3197static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1da177e4 3198{
60490fe0 3199 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3200 struct e1000_hw *hw = &adapter->hw;
581d708e 3201 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3202 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3203 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3204 unsigned int tx_flags = 0;
6d1e3aa7 3205 unsigned int len = skb->len - skb->data_len;
1da177e4 3206 unsigned long flags;
6d1e3aa7
KK		 3207 unsigned int nr_frags;
3208 unsigned int mss;
1da177e4 3209 int count = 0;
76c224bc 3210 int tso;
1da177e4 3211 unsigned int f;
1da177e4 3212
65c7973f
JB		 3213 /* This goes back to the question of how to logically map a tx queue
3214 * to a flow. Right now, performance is impacted slightly negatively
3215 * if using multiple tx queues. If the stack breaks away from a
3216 * single qdisc implementation, we can look at this again. */
581d708e 3217 tx_ring = adapter->tx_ring;
24025e4e 3218
581d708e 3219 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3220 dev_kfree_skb_any(skb);
3221 return NETDEV_TX_OK;
3222 }
3223
032fe6e9
JB		 3224 /* 82571 and newer doesn't need the workaround that limited descriptor
3225 * length to 4kB */
1dc32918 3226 if (hw->mac_type >= e1000_82571)
032fe6e9
JB		 3227 max_per_txd = 8192;
3228
7967168c 3229 mss = skb_shinfo(skb)->gso_size;
76c224bc 3230 /* The controller does a simple calculation to
1da177e4
LT		 3231 * make sure there is enough room in the FIFO before
3232 * initiating the DMA for each buffer. The calc is:
3233 * 4 = ceil(buffer len/mss). To make sure we don't
3234 * overrun the FIFO, adjust the max buffer len if mss
3235 * drops. */
96838a40 3236 if (mss) {
406874a7 3237 u8 hdr_len;
1da177e4
LT		 3238 max_per_txd = min(mss << 2, max_per_txd);
3239 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3240
90fb5135
AK		 3241 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3242 * points to just header, pull a few bytes of payload from
3243 * frags into skb->data */
ab6a5bb6 3244 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3245 if (skb->data_len && hdr_len == len) {
1dc32918 3246 switch (hw->mac_type) {
9f687888 3247 unsigned int pull_size;
683a2aa3
HX		 3248 case e1000_82544:
3249 /* Make sure we have room to chop off 4 bytes,
3250 * and that the end alignment will work out to
3251 * this hardware's requirements
3252 * NOTE: this is a TSO only workaround
3253 * if end byte alignment not correct move us
3254 * into the next dword */
27a884dc 3255 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3256 break;
3257 /* fall through */
9f687888
JK		 3258 case e1000_82571:
3259 case e1000_82572:
3260 case e1000_82573:
cd94dd0b 3261 case e1000_ich8lan:
9f687888
JK		 3262 pull_size = min((unsigned int)4, skb->data_len);
3263 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3264 DPRINTK(DRV, ERR,
9f687888
JK		 3265 "__pskb_pull_tail failed.\n");
3266 dev_kfree_skb_any(skb);
749dfc70 3267 return NETDEV_TX_OK;
9f687888
JK		 3268 }
3269 len = skb->len - skb->data_len;
3270 break;
3271 default:
3272 /* do nothing */
3273 break;
d74bbd3b 3274 }
9a3056da 3275 }
1da177e4
LT		 3276 }
3277
9a3056da 3278 /* reserve a descriptor for the offload context */
84fa7933 3279 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3280 count++;
2648345f 3281 count++;
fd803241 3282
fd803241 3283 /* Controller Erratum workaround */
89114afd 3284 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3285 count++;
fd803241 3286
1da177e4
LT		 3287 count += TXD_USE_COUNT(len, max_txd_pwr);
3288
96838a40 3289 if (adapter->pcix_82544)
1da177e4
LT		 3290 count++;
3291
96838a40 3292 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3293 * in PCI-X mode, so add one more descriptor to the count
3294 */
1dc32918 3295 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3296 (len > 2015)))
3297 count++;
3298
1da177e4 3299 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3300 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3301 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3302 max_txd_pwr);
96838a40 3303 if (adapter->pcix_82544)
1da177e4
LT		 3304 count += nr_frags;
3305
0f15a8fa 3306
1dc32918
JP		 3307 if (hw->tx_pkt_filtering &&
3308 (hw->mac_type == e1000_82573))
2d7edb92
MC		 3309 e1000_transfer_dhcp_info(adapter, skb);
3310
f50393fe 3311 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
581d708e 3312 /* Collision - tell upper layer to requeue */
581d708e 3313 return NETDEV_TX_LOCKED;
1da177e4
LT		 3314
3315 /* need: count + 2 desc gap to keep tail from touching
3316 * head, otherwise try next time */
65c7973f 3317 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3318 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3319 return NETDEV_TX_BUSY;
3320 }
3321
1dc32918 3322 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3323 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3324 netif_stop_queue(netdev);
1314bbf3 3325 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3326 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3327 return NETDEV_TX_BUSY;
3328 }
3329 }
3330
96838a40 3331 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3332 tx_flags |= E1000_TX_FLAGS_VLAN;
3333 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3334 }
3335
581d708e 3336 first = tx_ring->next_to_use;
96838a40 3337
581d708e 3338 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3339 if (tso < 0) {
3340 dev_kfree_skb_any(skb);
581d708e 3341 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3342 return NETDEV_TX_OK;
3343 }
3344
fd803241
JK		 3345 if (likely(tso)) {
3346 tx_ring->last_tx_tso = 1;
1da177e4 3347 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3348 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3349 tx_flags |= E1000_TX_FLAGS_CSUM;
3350
2d7edb92 3351 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3352 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3353 * no longer assume, we must. */
60828236 3354 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3355 tx_flags |= E1000_TX_FLAGS_IPV4;
3356
581d708e
MC		 3357 e1000_tx_queue(adapter, tx_ring, tx_flags,
3358 e1000_tx_map(adapter, tx_ring, skb, first,
3359 max_per_txd, nr_frags, mss));
1da177e4
LT		 3360
3361 netdev->trans_start = jiffies;
3362
3363 /* Make sure there is space in the ring for the next send. */
65c7973f 3364 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3365
581d708e 3366 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3367 return NETDEV_TX_OK;
3368}
3369
3370/**
3371 * e1000_tx_timeout - Respond to a Tx Hang
3372 * @netdev: network interface device structure
3373 **/
3374
64798845 3375static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3376{
60490fe0 3377 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3378
3379 /* Do the reset outside of interrupt context */
87041639
JK		 3380 adapter->tx_timeout_count++;
3381 schedule_work(&adapter->reset_task);
1da177e4
LT		 3382}
3383
64798845 3384static void e1000_reset_task(struct work_struct *work)
1da177e4 3385{
65f27f38
DH		 3386 struct e1000_adapter *adapter =
3387 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3388
2db10a08 3389 e1000_reinit_locked(adapter);
1da177e4
LT		 3390}
3391
3392/**
3393 * e1000_get_stats - Get System Network Statistics
3394 * @netdev: network interface device structure
3395 *
3396 * Returns the address of the device statistics structure.
3397 * The statistics are actually updated from the timer callback.
3398 **/
3399
64798845 3400static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3401{
60490fe0 3402 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3403
6b7660cd 3404 /* only return the current stats */
1da177e4
LT		 3405 return &adapter->net_stats;
3406}
3407
3408/**
3409 * e1000_change_mtu - Change the Maximum Transfer Unit
3410 * @netdev: network interface device structure
3411 * @new_mtu: new value for maximum frame size
3412 *
3413 * Returns 0 on success, negative on failure
3414 **/
3415
64798845 3416static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3417{
60490fe0 3418 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3419 struct e1000_hw *hw = &adapter->hw;
1da177e4 3420 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
406874a7 3421 u16 eeprom_data = 0;
1da177e4 3422
96838a40
JB		 3423 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3424 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3425 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3426 return -EINVAL;
2d7edb92 3427 }
1da177e4 3428
997f5cbd 3429 /* Adapter-specific max frame size limits. */
1dc32918 3430 switch (hw->mac_type) {
9e2feace 3431 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3432 case e1000_ich8lan:
997f5cbd
JK		 3433 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3434 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3435 return -EINVAL;
2d7edb92 3436 }
997f5cbd 3437 break;
85b22eb6 3438 case e1000_82573:
249d71d6
BA		 3439 /* Jumbo Frames not supported if:
3440 * - this is not an 82573L device
3441 * - ASPM is enabled in any way (0x1A bits 3:2) */
1dc32918 3442 e1000_read_eeprom(hw, EEPROM_INIT_3GIO_3, 1,
85b22eb6 3443 &eeprom_data);
1dc32918 3444 if ((hw->device_id != E1000_DEV_ID_82573L) ||
249d71d6 3445 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3446 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3447 DPRINTK(PROBE, ERR,
3448 "Jumbo Frames not supported.\n");
3449 return -EINVAL;
3450 }
3451 break;
3452 }
249d71d6
BA		 3453 /* ERT will be enabled later to enable wire speed receives */
3454
85b22eb6 3455 /* fall through to get support */
997f5cbd
JK		 3456 case e1000_82571:
3457 case e1000_82572:
87041639 3458 case e1000_80003es2lan:
997f5cbd
JK		 3459#define MAX_STD_JUMBO_FRAME_SIZE 9234
3460 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3461 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3462 return -EINVAL;
3463 }
3464 break;
3465 default:
3466 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3467 break;
1da177e4
LT		 3468 }
3469
87f5032e 3470 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3471 * means we reserve 2 more, this pushes us to allocate from the next
3472 * larger slab size
3473 * i.e. RXBUFFER_2048 --> size-4096 slab */
3474
3475 if (max_frame <= E1000_RXBUFFER_256)
3476 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3477 else if (max_frame <= E1000_RXBUFFER_512)
3478 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3479 else if (max_frame <= E1000_RXBUFFER_1024)
3480 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3481 else if (max_frame <= E1000_RXBUFFER_2048)
3482 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3483 else if (max_frame <= E1000_RXBUFFER_4096)
3484 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3485 else if (max_frame <= E1000_RXBUFFER_8192)
3486 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3487 else if (max_frame <= E1000_RXBUFFER_16384)
3488 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3489
3490 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3491 if (!hw->tbi_compatibility_on &&
9e2feace
AK		 3492 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3493 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3494 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3495
2d7edb92 3496 netdev->mtu = new_mtu;
1dc32918 3497 hw->max_frame_size = max_frame;
2d7edb92 3498
2db10a08
AK		 3499 if (netif_running(netdev))
3500 e1000_reinit_locked(adapter);
1da177e4 3501
1da177e4
LT		 3502 return 0;
3503}
3504
3505/**
3506 * e1000_update_stats - Update the board statistics counters
3507 * @adapter: board private structure
3508 **/
3509
64798845 3510void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4
LT		 3511{
3512 struct e1000_hw *hw = &adapter->hw;
282f33c9 3513 struct pci_dev *pdev = adapter->pdev;
1da177e4 3514 unsigned long flags;
406874a7 3515 u16 phy_tmp;
1da177e4
LT		 3516
3517#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3518
282f33c9
LV		 3519 /*
3520 * Prevent stats update while adapter is being reset, or if the pci
3521 * connection is down.
3522 */
9026729b 3523 if (adapter->link_speed == 0)
282f33c9 3524 return;
81b1955e 3525 if (pci_channel_offline(pdev))
9026729b
AK		 3526 return;
3527
1da177e4
LT		 3528 spin_lock_irqsave(&adapter->stats_lock, flags);
3529
828d055f 3530 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3531 * called from the interrupt context, so they must only
3532 * be written while holding adapter->stats_lock
3533 */
3534
1dc32918
JP		 3535 adapter->stats.crcerrs += er32(CRCERRS);
3536 adapter->stats.gprc += er32(GPRC);
3537 adapter->stats.gorcl += er32(GORCL);
3538 adapter->stats.gorch += er32(GORCH);
3539 adapter->stats.bprc += er32(BPRC);
3540 adapter->stats.mprc += er32(MPRC);
3541 adapter->stats.roc += er32(ROC);
3542
3543 if (hw->mac_type != e1000_ich8lan) {
3544 adapter->stats.prc64 += er32(PRC64);
3545 adapter->stats.prc127 += er32(PRC127);
3546 adapter->stats.prc255 += er32(PRC255);
3547 adapter->stats.prc511 += er32(PRC511);
3548 adapter->stats.prc1023 += er32(PRC1023);
3549 adapter->stats.prc1522 += er32(PRC1522);
3550 }
3551
3552 adapter->stats.symerrs += er32(SYMERRS);
3553 adapter->stats.mpc += er32(MPC);
3554 adapter->stats.scc += er32(SCC);
3555 adapter->stats.ecol += er32(ECOL);
3556 adapter->stats.mcc += er32(MCC);
3557 adapter->stats.latecol += er32(LATECOL);
3558 adapter->stats.dc += er32(DC);
3559 adapter->stats.sec += er32(SEC);
3560 adapter->stats.rlec += er32(RLEC);
3561 adapter->stats.xonrxc += er32(XONRXC);
3562 adapter->stats.xontxc += er32(XONTXC);
3563 adapter->stats.xoffrxc += er32(XOFFRXC);
3564 adapter->stats.xofftxc += er32(XOFFTXC);
3565 adapter->stats.fcruc += er32(FCRUC);
3566 adapter->stats.gptc += er32(GPTC);
3567 adapter->stats.gotcl += er32(GOTCL);
3568 adapter->stats.gotch += er32(GOTCH);
3569 adapter->stats.rnbc += er32(RNBC);
3570 adapter->stats.ruc += er32(RUC);
3571 adapter->stats.rfc += er32(RFC);
3572 adapter->stats.rjc += er32(RJC);
3573 adapter->stats.torl += er32(TORL);
3574 adapter->stats.torh += er32(TORH);
3575 adapter->stats.totl += er32(TOTL);
3576 adapter->stats.toth += er32(TOTH);
3577 adapter->stats.tpr += er32(TPR);
3578
3579 if (hw->mac_type != e1000_ich8lan) {
3580 adapter->stats.ptc64 += er32(PTC64);
3581 adapter->stats.ptc127 += er32(PTC127);
3582 adapter->stats.ptc255 += er32(PTC255);
3583 adapter->stats.ptc511 += er32(PTC511);
3584 adapter->stats.ptc1023 += er32(PTC1023);
3585 adapter->stats.ptc1522 += er32(PTC1522);
3586 }
3587
3588 adapter->stats.mptc += er32(MPTC);
3589 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3590
3591 /* used for adaptive IFS */
3592
1dc32918 3593 hw->tx_packet_delta = er32(TPT);
1da177e4 3594 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3595 hw->collision_delta = er32(COLC);
1da177e4
LT		 3596 adapter->stats.colc += hw->collision_delta;
3597
96838a40 3598 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3599 adapter->stats.algnerrc += er32(ALGNERRC);
3600 adapter->stats.rxerrc += er32(RXERRC);
3601 adapter->stats.tncrs += er32(TNCRS);
3602 adapter->stats.cexterr += er32(CEXTERR);
3603 adapter->stats.tsctc += er32(TSCTC);
3604 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4 3605 }
96838a40 3606 if (hw->mac_type > e1000_82547_rev_2) {
1dc32918
JP		 3607 adapter->stats.iac += er32(IAC);
3608 adapter->stats.icrxoc += er32(ICRXOC);
3609
3610 if (hw->mac_type != e1000_ich8lan) {
3611 adapter->stats.icrxptc += er32(ICRXPTC);
3612 adapter->stats.icrxatc += er32(ICRXATC);
3613 adapter->stats.ictxptc += er32(ICTXPTC);
3614 adapter->stats.ictxatc += er32(ICTXATC);
3615 adapter->stats.ictxqec += er32(ICTXQEC);
3616 adapter->stats.ictxqmtc += er32(ICTXQMTC);
3617 adapter->stats.icrxdmtc += er32(ICRXDMTC);
cd94dd0b 3618 }
2d7edb92 3619 }
1da177e4
LT		 3620
3621 /* Fill out the OS statistics structure */
1da177e4
LT		 3622 adapter->net_stats.multicast = adapter->stats.mprc;
3623 adapter->net_stats.collisions = adapter->stats.colc;
3624
3625 /* Rx Errors */
3626
87041639
JK		 3627 /* RLEC on some newer hardware can be incorrect so build
3628 * our own version based on RUC and ROC */
1da177e4
LT		 3629 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3630 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3631 adapter->stats.ruc + adapter->stats.roc +
3632 adapter->stats.cexterr;
49559854
MW		 3633 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3634 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3635 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3636 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3637 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3638
3639 /* Tx Errors */
49559854
MW		 3640 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3641 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3642 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3643 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3644 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3645 if (hw->bad_tx_carr_stats_fd &&
167fb284
JG		 3646 adapter->link_duplex == FULL_DUPLEX) {
3647 adapter->net_stats.tx_carrier_errors = 0;
3648 adapter->stats.tncrs = 0;
3649 }
1da177e4
LT		 3650
3651 /* Tx Dropped needs to be maintained elsewhere */
3652
3653 /* Phy Stats */
96838a40
JB		 3654 if (hw->media_type == e1000_media_type_copper) {
3655 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3656 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3657 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3658 adapter->phy_stats.idle_errors += phy_tmp;
3659 }
3660
96838a40 3661 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3662 (hw->phy_type == e1000_phy_m88) &&
3663 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3664 adapter->phy_stats.receive_errors += phy_tmp;
3665 }
3666
15e376b4 3667 /* Management Stats */
1dc32918
JP		 3668 if (hw->has_smbus) {
3669 adapter->stats.mgptc += er32(MGTPTC);
3670 adapter->stats.mgprc += er32(MGTPRC);
3671 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3672 }
3673
1da177e4
LT		 3674 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3675}
9ac98284
JB		 3676
3677/**
3678 * e1000_intr_msi - Interrupt Handler
3679 * @irq: interrupt number
3680 * @data: pointer to a network interface device structure
3681 **/
3682
64798845 3683static irqreturn_t e1000_intr_msi(int irq, void *data)
9ac98284
JB		 3684{
3685 struct net_device *netdev = data;
3686 struct e1000_adapter *adapter = netdev_priv(netdev);
3687 struct e1000_hw *hw = &adapter->hw;
1dc32918 3688 u32 icr = er32(ICR);
9ac98284 3689
9150b76a
JB		 3690 /* in NAPI mode read ICR disables interrupts using IAM */
3691
b5fc8f0c
JB		 3692 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3693 hw->get_link_status = 1;
3694 /* 80003ES2LAN workaround-- For packet buffer work-around on
3695 * link down event; disable receives here in the ISR and reset
3696 * adapter in watchdog */
3697 if (netif_carrier_ok(netdev) &&
1dc32918 3698 (hw->mac_type == e1000_80003es2lan)) {
b5fc8f0c 3699 /* disable receives */
1dc32918
JP		 3700 u32 rctl = er32(RCTL);
3701 ew32(RCTL, rctl & ~E1000_RCTL_EN);
9ac98284 3702 }
b5fc8f0c
JB		 3703 /* guard against interrupt when we're going down */
3704 if (!test_bit(__E1000_DOWN, &adapter->flags))
3705 mod_timer(&adapter->watchdog_timer, jiffies + 1);
9ac98284
JB		 3706 }
3707
bea3348e 3708 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3709 adapter->total_tx_bytes = 0;
3710 adapter->total_tx_packets = 0;
3711 adapter->total_rx_bytes = 0;
3712 adapter->total_rx_packets = 0;
bea3348e 3713 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3714 } else
9ac98284 3715 e1000_irq_enable(adapter);
9ac98284
JB		 3716
3717 return IRQ_HANDLED;
3718}
1da177e4
LT		 3719
3720/**
3721 * e1000_intr - Interrupt Handler
3722 * @irq: interrupt number
3723 * @data: pointer to a network interface device structure
1da177e4
LT		 3724 **/
3725
64798845 3726static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3727{
3728 struct net_device *netdev = data;
60490fe0 3729 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3730 struct e1000_hw *hw = &adapter->hw;
1dc32918 3731 u32 rctl, icr = er32(ICR);
c3570acb 3732
835bb129
JB		 3733 if (unlikely(!icr))
3734 return IRQ_NONE; /* Not our interrupt */
3735
835bb129
JB		 3736 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3737 * not set, then the adapter didn't send an interrupt */
3738 if (unlikely(hw->mac_type >= e1000_82571 &&
3739 !(icr & E1000_ICR_INT_ASSERTED)))
3740 return IRQ_NONE;
3741
9150b76a
JB		 3742 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3743 * need for the IMC write */
1da177e4 3744
96838a40 3745 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3746 hw->get_link_status = 1;
87041639
JK		 3747 /* 80003ES2LAN workaround--
3748 * For packet buffer work-around on link down event;
3749 * disable receives here in the ISR and
3750 * reset adapter in watchdog
3751 */
3752 if (netif_carrier_ok(netdev) &&
1dc32918 3753 (hw->mac_type == e1000_80003es2lan)) {
87041639 3754 /* disable receives */
1dc32918
JP		 3755 rctl = er32(RCTL);
3756 ew32(RCTL, rctl & ~E1000_RCTL_EN);
87041639 3757 }
1314bbf3
AK		 3758 /* guard against interrupt when we're going down */
3759 if (!test_bit(__E1000_DOWN, &adapter->flags))
3760 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3761 }
3762
1e613fd9 3763 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3764 /* disable interrupts, without the synchronize_irq bit */
1dc32918
JP		 3765 ew32(IMC, ~0);
3766 E1000_WRITE_FLUSH();
1e613fd9 3767 }
bea3348e 3768 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3769 adapter->total_tx_bytes = 0;
3770 adapter->total_tx_packets = 0;
3771 adapter->total_rx_bytes = 0;
3772 adapter->total_rx_packets = 0;
bea3348e 3773 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3774 } else
90fb5135
AK		 3775 /* this really should not happen! if it does it is basically a
3776 * bug, but not a hard error, so enable ints and continue */
581d708e 3777 e1000_irq_enable(adapter);
1da177e4 3778
1da177e4
LT		 3779 return IRQ_HANDLED;
3780}
3781
1da177e4
LT		 3782/**
3783 * e1000_clean - NAPI Rx polling callback
3784 * @adapter: board private structure
3785 **/
64798845 3786static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3787{
bea3348e
SH		 3788 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3789 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 3790 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3791
3792 /* Must NOT use netdev_priv macro here. */
3793 adapter = poll_dev->priv;
3794
d3d9e484
AK		 3795 /* e1000_clean is called per-cpu. This lock protects
3796 * tx_ring[0] from being cleaned by multiple cpus
3797 * simultaneously. A failure obtaining the lock means
3798 * tx_ring[0] is currently being cleaned anyway. */
3799 if (spin_trylock(&adapter->tx_queue_lock)) {
d2c7ddd6
DM		 3800 tx_cleaned = e1000_clean_tx_irq(adapter,
3801 &adapter->tx_ring[0]);
d3d9e484 3802 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3803 }
3804
d3d9e484 3805 adapter->clean_rx(adapter, &adapter->rx_ring[0],
bea3348e 3806 &work_done, budget);
96838a40 3807
d2c7ddd6
DM		 3808 if (tx_cleaned)
3809 work_done = budget;
3810
53e52c72
DM		 3811 /* If budget not fully consumed, exit the polling mode */
3812 if (work_done < budget) {
835bb129
JB		 3813 if (likely(adapter->itr_setting & 3))
3814 e1000_set_itr(adapter);
bea3348e 3815 netif_rx_complete(poll_dev, napi);
1da177e4 3816 e1000_irq_enable(adapter);
1da177e4
LT		 3817 }
3818
bea3348e 3819 return work_done;
1da177e4
LT		 3820}
3821
1da177e4
LT		 3822/**
3823 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3824 * @adapter: board private structure
3825 **/
64798845
JP		 3826static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3827 struct e1000_tx_ring *tx_ring)
1da177e4 3828{
1dc32918 3829 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3830 struct net_device *netdev = adapter->netdev;
3831 struct e1000_tx_desc *tx_desc, *eop_desc;
3832 struct e1000_buffer *buffer_info;
3833 unsigned int i, eop;
2a1af5d7 3834 unsigned int count = 0;
c3033b01 3835 bool cleaned = false;
835bb129 3836 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3837
3838 i = tx_ring->next_to_clean;
3839 eop = tx_ring->buffer_info[i].next_to_watch;
3840 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3841
581d708e 3842 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
c3033b01 3843 for (cleaned = false; !cleaned; ) {
1da177e4
LT		 3844 tx_desc = E1000_TX_DESC(*tx_ring, i);
3845 buffer_info = &tx_ring->buffer_info[i];
3846 cleaned = (i == eop);
3847
835bb129 3848 if (cleaned) {
2b65326e 3849 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3850 unsigned int segs, bytecount;
3851 segs = skb_shinfo(skb)->gso_segs ?: 1;
3852 /* multiply data chunks by size of headers */
3853 bytecount = ((segs - 1) * skb_headlen(skb)) +
3854 skb->len;
2b65326e 3855 total_tx_packets += segs;
7753b171 3856 total_tx_bytes += bytecount;
835bb129 3857 }
fd803241 3858 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3859 tx_desc->upper.data = 0;
1da177e4 3860
96838a40 3861 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3862 }
581d708e 3863
1da177e4
LT		 3864 eop = tx_ring->buffer_info[i].next_to_watch;
3865 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3866#define E1000_TX_WEIGHT 64
3867 /* weight of a sort for tx, to avoid endless transmit cleanup */
c3570acb
FR		 3868 if (count++ == E1000_TX_WEIGHT)
3869 break;
1da177e4
LT		 3870 }
3871
3872 tx_ring->next_to_clean = i;
3873
77b2aad5 3874#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3875 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3876 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3877 /* Make sure that anybody stopping the queue after this
3878 * sees the new next_to_clean.
3879 */
3880 smp_mb();
fcfb1224 3881 if (netif_queue_stopped(netdev)) {
77b2aad5 3882 netif_wake_queue(netdev);
fcfb1224
JB		 3883 ++adapter->restart_queue;
3884 }
77b2aad5 3885 }
2648345f 3886
581d708e 3887 if (adapter->detect_tx_hung) {
2648345f 3888 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3889 * check with the clearing of time_stamp and movement of i */
c3033b01 3890 adapter->detect_tx_hung = false;
392137fa
JK		 3891 if (tx_ring->buffer_info[eop].dma &&
3892 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3893 (adapter->tx_timeout_factor * HZ))
1dc32918 3894 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3895
3896 /* detected Tx unit hang */
c6963ef5 3897 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3898 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3899 " TDH <%x>\n"
3900 " TDT <%x>\n"
3901 " next_to_use <%x>\n"
3902 " next_to_clean <%x>\n"
3903 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3904 " time_stamp <%lx>\n"
3905 " next_to_watch <%x>\n"
3906 " jiffies <%lx>\n"
3907 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3908 (unsigned long)((tx_ring - adapter->tx_ring) /
3909 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3910 readl(hw->hw_addr + tx_ring->tdh),
3911 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3912 tx_ring->next_to_use,
392137fa
JK		 3913 tx_ring->next_to_clean,
3914 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3915 eop,
3916 jiffies,
3917 eop_desc->upper.fields.status);
1da177e4 3918 netif_stop_queue(netdev);
70b8f1e1 3919 }
1da177e4 3920 }
835bb129
JB		 3921 adapter->total_tx_bytes += total_tx_bytes;
3922 adapter->total_tx_packets += total_tx_packets;
ef90e4ec
AK		 3923 adapter->net_stats.tx_bytes += total_tx_bytes;
3924 adapter->net_stats.tx_packets += total_tx_packets;
1da177e4
LT		 3925 return cleaned;
3926}
3927
3928/**
3929 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3930 * @adapter: board private structure
3931 * @status_err: receive descriptor status and error fields
3932 * @csum: receive descriptor csum field
3933 * @sk_buff: socket buffer with received data
1da177e4
LT		 3934 **/
3935
64798845
JP		 3936static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3937 u32 csum, struct sk_buff *skb)
1da177e4 3938{
1dc32918 3939 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3940 u16 status = (u16)status_err;
3941 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3942 skb->ip_summed = CHECKSUM_NONE;
3943
1da177e4 3944 /* 82543 or newer only */
1dc32918 3945 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3946 /* Ignore Checksum bit is set */
96838a40 3947 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3948 /* TCP/UDP checksum error bit is set */
96838a40 3949 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3950 /* let the stack verify checksum errors */
1da177e4 3951 adapter->hw_csum_err++;
2d7edb92
MC		 3952 return;
3953 }
3954 /* TCP/UDP Checksum has not been calculated */
1dc32918 3955 if (hw->mac_type <= e1000_82547_rev_2) {
96838a40 3956 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3957 return;
1da177e4 3958 } else {
96838a40 3959 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3960 return;
3961 }
3962 /* It must be a TCP or UDP packet with a valid checksum */
3963 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3964 /* TCP checksum is good */
3965 skb->ip_summed = CHECKSUM_UNNECESSARY;
1dc32918 3966 } else if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3967 /* IP fragment with UDP payload */
3968 /* Hardware complements the payload checksum, so we undo it
3969 * and then put the value in host order for further stack use.
3970 */
3e18826c
AV		 3971 __sum16 sum = (__force __sum16)htons(csum);
3972 skb->csum = csum_unfold(~sum);
84fa7933 3973 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3974 }
2d7edb92 3975 adapter->hw_csum_good++;
1da177e4
LT		 3976}
3977
3978/**
2d7edb92 3979 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3980 * @adapter: board private structure
3981 **/
64798845
JP		 3982static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3983 struct e1000_rx_ring *rx_ring,
3984 int *work_done, int work_to_do)
1da177e4 3985{
1dc32918 3986 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3987 struct net_device *netdev = adapter->netdev;
3988 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3989 struct e1000_rx_desc *rx_desc, *next_rxd;
3990 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3991 unsigned long flags;
406874a7
JP		 3992 u32 length;
3993 u8 last_byte;
1da177e4 3994 unsigned int i;
72d64a43 3995 int cleaned_count = 0;
c3033b01 3996 bool cleaned = false;
835bb129 3997 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3998
3999 i = rx_ring->next_to_clean;
4000 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4001 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4002
b92ff8ee 4003 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4004 struct sk_buff *skb;
a292ca6e 4005 u8 status;
90fb5135 4006
96838a40 4007 if (*work_done >= work_to_do)
1da177e4
LT		 4008 break;
4009 (*work_done)++;
c3570acb 4010
a292ca6e 4011 status = rx_desc->status;
b92ff8ee 4012 skb = buffer_info->skb;
86c3d59f
JB		 4013 buffer_info->skb = NULL;
4014
30320be8
JK		 4015 prefetch(skb->data - NET_IP_ALIGN);
4016
86c3d59f
JB		 4017 if (++i == rx_ring->count) i = 0;
4018 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4019 prefetch(next_rxd);
4020
86c3d59f 4021 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4022
c3033b01 4023 cleaned = true;
72d64a43 4024 cleaned_count++;
a292ca6e
JK		 4025 pci_unmap_single(pdev,
4026 buffer_info->dma,
4027 buffer_info->length,
1da177e4
LT		 4028 PCI_DMA_FROMDEVICE);
4029
1da177e4
LT		 4030 length = le16_to_cpu(rx_desc->length);
4031
a1415ee6
JK		 4032 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4033 /* All receives must fit into a single buffer */
4034 E1000_DBG("%s: Receive packet consumed multiple"
4035 " buffers\n", netdev->name);
864c4e45 4036 /* recycle */
8fc897b0 4037 buffer_info->skb = skb;
1da177e4
LT		 4038 goto next_desc;
4039 }
4040
96838a40 4041 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4042 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4043 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4044 last_byte)) {
1da177e4 4045 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4046 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 4047 length, skb->data);
4048 spin_unlock_irqrestore(&adapter->stats_lock,
4049 flags);
4050 length--;
4051 } else {
9e2feace
AK		 4052 /* recycle */
4053 buffer_info->skb = skb;
1da177e4
LT		 4054 goto next_desc;
4055 }
1cb5821f 4056 }
1da177e4 4057
d2a1e213
JB		 4058 /* adjust length to remove Ethernet CRC, this must be
4059 * done after the TBI_ACCEPT workaround above */
4060 length -= 4;
4061
835bb129
JB		 4062 /* probably a little skewed due to removing CRC */
4063 total_rx_bytes += length;
4064 total_rx_packets++;
4065
a292ca6e
JK		 4066 /* code added for copybreak, this should improve
4067 * performance for small packets with large amounts
4068 * of reassembly being done in the stack */
1f753861 4069 if (length < copybreak) {
a292ca6e 4070 struct sk_buff *new_skb =
87f5032e 4071 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4072 if (new_skb) {
4073 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 4074 skb_copy_to_linear_data_offset(new_skb,
4075 -NET_IP_ALIGN,
4076 (skb->data -
4077 NET_IP_ALIGN),
4078 (length +
4079 NET_IP_ALIGN));
a292ca6e
JK		 4080 /* save the skb in buffer_info as good */
4081 buffer_info->skb = skb;
4082 skb = new_skb;
a292ca6e 4083 }
996695de
AK		 4084 /* else just continue with the old one */
4085 }
a292ca6e 4086 /* end copybreak code */
996695de 4087 skb_put(skb, length);
1da177e4
LT		 4088
4089 /* Receive Checksum Offload */
a292ca6e 4090 e1000_rx_checksum(adapter,
406874a7
JP		 4091 (u32)(status) |
4092 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4093 le16_to_cpu(rx_desc->csum), skb);
96838a40 4094
1da177e4 4095 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 4096
96838a40 4097 if (unlikely(adapter->vlgrp &&
a292ca6e 4098 (status & E1000_RXD_STAT_VP))) {
1da177e4 4099 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
38b22195 4100 le16_to_cpu(rx_desc->special));
1da177e4
LT		 4101 } else {
4102 netif_receive_skb(skb);
4103 }
c3570acb 4104
1da177e4
LT		 4105 netdev->last_rx = jiffies;
4106
4107next_desc:
4108 rx_desc->status = 0;
1da177e4 4109
72d64a43
JK		 4110 /* return some buffers to hardware, one at a time is too slow */
4111 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4112 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4113 cleaned_count = 0;
4114 }
4115
30320be8 4116 /* use prefetched values */
86c3d59f
JB		 4117 rx_desc = next_rxd;
4118 buffer_info = next_buffer;
1da177e4 4119 }
1da177e4 4120 rx_ring->next_to_clean = i;
72d64a43
JK		 4121
4122 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4123 if (cleaned_count)
4124 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4125
835bb129
JB		 4126 adapter->total_rx_packets += total_rx_packets;
4127 adapter->total_rx_bytes += total_rx_bytes;
ef90e4ec
AK		 4128 adapter->net_stats.rx_bytes += total_rx_bytes;
4129 adapter->net_stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4130 return cleaned;
4131}
4132
1da177e4 4133/**
2d7edb92 4134 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4135 * @adapter: address of board private structure
4136 **/
4137
64798845
JP		 4138static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4139 struct e1000_rx_ring *rx_ring,
4140 int cleaned_count)
1da177e4 4141{
1dc32918 4142 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4143 struct net_device *netdev = adapter->netdev;
4144 struct pci_dev *pdev = adapter->pdev;
4145 struct e1000_rx_desc *rx_desc;
4146 struct e1000_buffer *buffer_info;
4147 struct sk_buff *skb;
2648345f
MC		 4148 unsigned int i;
4149 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4150
4151 i = rx_ring->next_to_use;
4152 buffer_info = &rx_ring->buffer_info[i];
4153
a292ca6e 4154 while (cleaned_count--) {
ca6f7224
CH		 4155 skb = buffer_info->skb;
4156 if (skb) {
a292ca6e
JK		 4157 skb_trim(skb, 0);
4158 goto map_skb;
4159 }
4160
ca6f7224 4161 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4162 if (unlikely(!skb)) {
1da177e4 4163 /* Better luck next round */
72d64a43 4164 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4165 break;
4166 }
4167
2648345f 4168 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4169 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4170 struct sk_buff *oldskb = skb;
2648345f
MC		 4171 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4172 "at %p\n", bufsz, skb->data);
4173 /* Try again, without freeing the previous */
87f5032e 4174 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4175 /* Failed allocation, critical failure */
1da177e4
LT		 4176 if (!skb) {
4177 dev_kfree_skb(oldskb);
4178 break;
4179 }
2648345f 4180
1da177e4
LT		 4181 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4182 /* give up */
4183 dev_kfree_skb(skb);
4184 dev_kfree_skb(oldskb);
4185 break; /* while !buffer_info->skb */
1da177e4 4186 }
ca6f7224
CH		 4187
4188 /* Use new allocation */
4189 dev_kfree_skb(oldskb);
1da177e4 4190 }
1da177e4
LT		 4191 /* Make buffer alignment 2 beyond a 16 byte boundary
4192 * this will result in a 16 byte aligned IP header after
4193 * the 14 byte MAC header is removed
4194 */
4195 skb_reserve(skb, NET_IP_ALIGN);
4196
1da177e4
LT		 4197 buffer_info->skb = skb;
4198 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4199map_skb:
1da177e4
LT		 4200 buffer_info->dma = pci_map_single(pdev,
4201 skb->data,
4202 adapter->rx_buffer_len,
4203 PCI_DMA_FROMDEVICE);
4204
2648345f
MC		 4205 /* Fix for errata 23, can't cross 64kB boundary */
4206 if (!e1000_check_64k_bound(adapter,
4207 (void *)(unsigned long)buffer_info->dma,
4208 adapter->rx_buffer_len)) {
4209 DPRINTK(RX_ERR, ERR,
4210 "dma align check failed: %u bytes at %p\n",
4211 adapter->rx_buffer_len,
4212 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4213 dev_kfree_skb(skb);
4214 buffer_info->skb = NULL;
4215
2648345f 4216 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4217 adapter->rx_buffer_len,
4218 PCI_DMA_FROMDEVICE);
4219
4220 break; /* while !buffer_info->skb */
4221 }
1da177e4
LT		 4222 rx_desc = E1000_RX_DESC(*rx_ring, i);
4223 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4224
96838a40
JB		 4225 if (unlikely(++i == rx_ring->count))
4226 i = 0;
1da177e4
LT		 4227 buffer_info = &rx_ring->buffer_info[i];
4228 }
4229
b92ff8ee
JB		 4230 if (likely(rx_ring->next_to_use != i)) {
4231 rx_ring->next_to_use = i;
4232 if (unlikely(i-- == 0))
4233 i = (rx_ring->count - 1);
4234
4235 /* Force memory writes to complete before letting h/w
4236 * know there are new descriptors to fetch. (Only
4237 * applicable for weak-ordered memory model archs,
4238 * such as IA-64). */
4239 wmb();
1dc32918 4240 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4241 }
1da177e4
LT		 4242}
4243
4244/**
4245 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4246 * @adapter:
4247 **/
4248
64798845 4249static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4250{
1dc32918 4251 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4252 u16 phy_status;
4253 u16 phy_ctrl;
1da177e4 4254
1dc32918
JP		 4255 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4256 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4257 return;
4258
96838a40 4259 if (adapter->smartspeed == 0) {
1da177e4
LT		 4260 /* If Master/Slave config fault is asserted twice,
4261 * we assume back-to-back */
1dc32918 4262 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4263 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4264 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4265 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4266 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4267 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4268 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4269 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4270 phy_ctrl);
4271 adapter->smartspeed++;
1dc32918
JP		 4272 if (!e1000_phy_setup_autoneg(hw) &&
4273 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4274 &phy_ctrl)) {
4275 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4276 MII_CR_RESTART_AUTO_NEG);
1dc32918 4277 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4278 phy_ctrl);
4279 }
4280 }
4281 return;
96838a40 4282 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4283 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4284 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4285 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4286 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4287 if (!e1000_phy_setup_autoneg(hw) &&
4288 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4289 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4290 MII_CR_RESTART_AUTO_NEG);
1dc32918 4291 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4292 }
4293 }
4294 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4295 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4296 adapter->smartspeed = 0;
4297}
4298
4299/**
4300 * e1000_ioctl -
4301 * @netdev:
4302 * @ifreq:
4303 * @cmd:
4304 **/
4305
64798845 4306static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4307{
4308 switch (cmd) {
4309 case SIOCGMIIPHY:
4310 case SIOCGMIIREG:
4311 case SIOCSMIIREG:
4312 return e1000_mii_ioctl(netdev, ifr, cmd);
4313 default:
4314 return -EOPNOTSUPP;
4315 }
4316}
4317
4318/**
4319 * e1000_mii_ioctl -
4320 * @netdev:
4321 * @ifreq:
4322 * @cmd:
4323 **/
4324
64798845
JP		 4325static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4326 int cmd)
1da177e4 4327{
60490fe0 4328 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4329 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4330 struct mii_ioctl_data *data = if_mii(ifr);
4331 int retval;
406874a7
JP		 4332 u16 mii_reg;
4333 u16 spddplx;
97876fc6 4334 unsigned long flags;
1da177e4 4335
1dc32918 4336 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4337 return -EOPNOTSUPP;
4338
4339 switch (cmd) {
4340 case SIOCGMIIPHY:
1dc32918 4341 data->phy_id = hw->phy_addr;
1da177e4
LT		 4342 break;
4343 case SIOCGMIIREG:
96838a40 4344 if (!capable(CAP_NET_ADMIN))
1da177e4 4345 return -EPERM;
97876fc6 4346 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4347 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4348 &data->val_out)) {
4349 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4350 return -EIO;
97876fc6
MC		 4351 }
4352 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4353 break;
4354 case SIOCSMIIREG:
96838a40 4355 if (!capable(CAP_NET_ADMIN))
1da177e4 4356 return -EPERM;
96838a40 4357 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4358 return -EFAULT;
4359 mii_reg = data->val_in;
97876fc6 4360 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4361 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4362 mii_reg)) {
4363 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4364 return -EIO;
97876fc6 4365 }
f0163ac4 4366 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4367 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4368 switch (data->reg_num) {
4369 case PHY_CTRL:
96838a40 4370 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4371 break;
96838a40 4372 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4373 hw->autoneg = 1;
4374 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4375 } else {
4376 if (mii_reg & 0x40)
4377 spddplx = SPEED_1000;
4378 else if (mii_reg & 0x2000)
4379 spddplx = SPEED_100;
4380 else
4381 spddplx = SPEED_10;
4382 spddplx += (mii_reg & 0x100)
cb764326
JK		 4383 ? DUPLEX_FULL :
4384 DUPLEX_HALF;
1da177e4
LT		 4385 retval = e1000_set_spd_dplx(adapter,
4386 spddplx);
f0163ac4 4387 if (retval)
1da177e4
LT		 4388 return retval;
4389 }
2db10a08
AK		 4390 if (netif_running(adapter->netdev))
4391 e1000_reinit_locked(adapter);
4392 else
1da177e4
LT		 4393 e1000_reset(adapter);
4394 break;
4395 case M88E1000_PHY_SPEC_CTRL:
4396 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4397 if (e1000_phy_reset(hw))
1da177e4
LT		 4398 return -EIO;
4399 break;
4400 }
4401 } else {
4402 switch (data->reg_num) {
4403 case PHY_CTRL:
96838a40 4404 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4405 break;
2db10a08
AK		 4406 if (netif_running(adapter->netdev))
4407 e1000_reinit_locked(adapter);
4408 else
1da177e4
LT		 4409 e1000_reset(adapter);
4410 break;
4411 }
4412 }
4413 break;
4414 default:
4415 return -EOPNOTSUPP;
4416 }
4417 return E1000_SUCCESS;
4418}
4419
64798845 4420void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4421{
4422 struct e1000_adapter *adapter = hw->back;
2648345f 4423 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4424
96838a40 4425 if (ret_val)
2648345f 4426 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4427}
4428
64798845 4429void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4430{
4431 struct e1000_adapter *adapter = hw->back;
4432
4433 pci_clear_mwi(adapter->pdev);
4434}
4435
64798845 4436int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4437{
4438 struct e1000_adapter *adapter = hw->back;
4439 return pcix_get_mmrbc(adapter->pdev);
4440}
4441
64798845 4442void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4443{
4444 struct e1000_adapter *adapter = hw->back;
4445 pcix_set_mmrbc(adapter->pdev, mmrbc);
4446}
4447
64798845 4448s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
caeccb68
JK		 4449{
4450 struct e1000_adapter *adapter = hw->back;
406874a7 4451 u16 cap_offset;
caeccb68
JK		 4452
4453 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4454 if (!cap_offset)
4455 return -E1000_ERR_CONFIG;
4456
4457 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4458
4459 return E1000_SUCCESS;
4460}
4461
64798845 4462void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4463{
4464 outl(value, port);
4465}
4466
64798845
JP		 4467static void e1000_vlan_rx_register(struct net_device *netdev,
4468 struct vlan_group *grp)
1da177e4 4469{
60490fe0 4470 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4471 struct e1000_hw *hw = &adapter->hw;
406874a7 4472 u32 ctrl, rctl;
1da177e4 4473
9150b76a
JB		 4474 if (!test_bit(__E1000_DOWN, &adapter->flags))
4475 e1000_irq_disable(adapter);
1da177e4
LT		 4476 adapter->vlgrp = grp;
4477
96838a40 4478 if (grp) {
1da177e4 4479 /* enable VLAN tag insert/strip */
1dc32918 4480 ctrl = er32(CTRL);
1da177e4 4481 ctrl |= E1000_CTRL_VME;
1dc32918 4482 ew32(CTRL, ctrl);
1da177e4 4483
cd94dd0b 4484 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4485 /* enable VLAN receive filtering */
1dc32918 4486 rctl = er32(RCTL);
90fb5135 4487 rctl &= ~E1000_RCTL_CFIEN;
1dc32918 4488 ew32(RCTL, rctl);
90fb5135 4489 e1000_update_mng_vlan(adapter);
cd94dd0b 4490 }
1da177e4
LT		 4491 } else {
4492 /* disable VLAN tag insert/strip */
1dc32918 4493 ctrl = er32(CTRL);
1da177e4 4494 ctrl &= ~E1000_CTRL_VME;
1dc32918 4495 ew32(CTRL, ctrl);
1da177e4 4496
cd94dd0b 4497 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4498 if (adapter->mng_vlan_id !=
406874a7 4499 (u16)E1000_MNG_VLAN_NONE) {
90fb5135
AK		 4500 e1000_vlan_rx_kill_vid(netdev,
4501 adapter->mng_vlan_id);
4502 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4503 }
cd94dd0b 4504 }
1da177e4
LT		 4505 }
4506
9150b76a
JB		 4507 if (!test_bit(__E1000_DOWN, &adapter->flags))
4508 e1000_irq_enable(adapter);
1da177e4
LT		 4509}
4510
64798845 4511static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4512{
60490fe0 4513 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4514 struct e1000_hw *hw = &adapter->hw;
406874a7 4515 u32 vfta, index;
96838a40 4516
1dc32918 4517 if ((hw->mng_cookie.status &
96838a40
JB		 4518 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4519 (vid == adapter->mng_vlan_id))
2d7edb92 4520 return;
1da177e4
LT		 4521 /* add VID to filter table */
4522 index = (vid >> 5) & 0x7F;
1dc32918 4523 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4524 vfta |= (1 << (vid & 0x1F));
1dc32918 4525 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4526}
4527
64798845 4528static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4529{
60490fe0 4530 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4531 struct e1000_hw *hw = &adapter->hw;
406874a7 4532 u32 vfta, index;
1da177e4 4533
9150b76a
JB		 4534 if (!test_bit(__E1000_DOWN, &adapter->flags))
4535 e1000_irq_disable(adapter);
5c15bdec 4536 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4537 if (!test_bit(__E1000_DOWN, &adapter->flags))
4538 e1000_irq_enable(adapter);
1da177e4 4539
1dc32918 4540 if ((hw->mng_cookie.status &
96838a40 4541 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4542 (vid == adapter->mng_vlan_id)) {
4543 /* release control to f/w */
4544 e1000_release_hw_control(adapter);
2d7edb92 4545 return;
ff147013
JK		 4546 }
4547
1da177e4
LT		 4548 /* remove VID from filter table */
4549 index = (vid >> 5) & 0x7F;
1dc32918 4550 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4551 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4552 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4553}
4554
64798845 4555static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4556{
4557 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4558
96838a40 4559 if (adapter->vlgrp) {
406874a7 4560 u16 vid;
96838a40 4561 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4562 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4563 continue;
4564 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4565 }
4566 }
4567}
4568
64798845 4569int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4570{
1dc32918
JP		 4571 struct e1000_hw *hw = &adapter->hw;
4572
4573 hw->autoneg = 0;
1da177e4 4574
6921368f 4575 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4576 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4577 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4578 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4579 return -EINVAL;
4580 }
4581
96838a40 4582 switch (spddplx) {
1da177e4 4583 case SPEED_10 + DUPLEX_HALF:
1dc32918 4584 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4585 break;
4586 case SPEED_10 + DUPLEX_FULL:
1dc32918 4587 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4588 break;
4589 case SPEED_100 + DUPLEX_HALF:
1dc32918 4590 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4591 break;
4592 case SPEED_100 + DUPLEX_FULL:
1dc32918 4593 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4594 break;
4595 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4596 hw->autoneg = 1;
4597 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4598 break;
4599 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4600 default:
2648345f 4601 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4602 return -EINVAL;
4603 }
4604 return 0;
4605}
4606
64798845 4607static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4608{
4609 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4610 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4611 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4612 u32 ctrl, ctrl_ext, rctl, status;
4613 u32 wufc = adapter->wol;
6fdfef16 4614#ifdef CONFIG_PM
240b1710 4615 int retval = 0;
6fdfef16 4616#endif
1da177e4
LT		 4617
4618 netif_device_detach(netdev);
4619
2db10a08
AK		 4620 if (netif_running(netdev)) {
4621 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4622 e1000_down(adapter);
2db10a08 4623 }
1da177e4 4624
2f82665f 4625#ifdef CONFIG_PM
1d33e9c6 4626 retval = pci_save_state(pdev);
2f82665f
JB		 4627 if (retval)
4628 return retval;
4629#endif
4630
1dc32918 4631 status = er32(STATUS);
96838a40 4632 if (status & E1000_STATUS_LU)
1da177e4
LT		 4633 wufc &= ~E1000_WUFC_LNKC;
4634
96838a40 4635 if (wufc) {
1da177e4 4636 e1000_setup_rctl(adapter);
db0ce50d 4637 e1000_set_rx_mode(netdev);
1da177e4
LT		 4638
4639 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4640 if (wufc & E1000_WUFC_MC) {
1dc32918 4641 rctl = er32(RCTL);
1da177e4 4642 rctl |= E1000_RCTL_MPE;
1dc32918 4643 ew32(RCTL, rctl);
1da177e4
LT		 4644 }
4645
1dc32918
JP		 4646 if (hw->mac_type >= e1000_82540) {
4647 ctrl = er32(CTRL);
1da177e4
LT		 4648 /* advertise wake from D3Cold */
4649 #define E1000_CTRL_ADVD3WUC 0x00100000
4650 /* phy power management enable */
4651 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4652 ctrl |= E1000_CTRL_ADVD3WUC |
4653 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4654 ew32(CTRL, ctrl);
1da177e4
LT		 4655 }
4656
1dc32918
JP		 4657 if (hw->media_type == e1000_media_type_fiber ||
4658 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4659 /* keep the laser running in D3 */
1dc32918 4660 ctrl_ext = er32(CTRL_EXT);
1da177e4 4661 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4662 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4663 }
4664
2d7edb92 4665 /* Allow time for pending master requests to run */
1dc32918 4666 e1000_disable_pciex_master(hw);
2d7edb92 4667
1dc32918
JP		 4668 ew32(WUC, E1000_WUC_PME_EN);
4669 ew32(WUFC, wufc);
d0e027db
AK		 4670 pci_enable_wake(pdev, PCI_D3hot, 1);
4671 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4 4672 } else {
1dc32918
JP		 4673 ew32(WUC, 0);
4674 ew32(WUFC, 0);
d0e027db
AK		 4675 pci_enable_wake(pdev, PCI_D3hot, 0);
4676 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4677 }
4678
0fccd0e9
JG		 4679 e1000_release_manageability(adapter);
4680
4681 /* make sure adapter isn't asleep if manageability is enabled */
4682 if (adapter->en_mng_pt) {
4683 pci_enable_wake(pdev, PCI_D3hot, 1);
4684 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4685 }
4686
1dc32918
JP		 4687 if (hw->phy_type == e1000_phy_igp_3)
4688 e1000_phy_powerdown_workaround(hw);
cd94dd0b 4689
edd106fc
AK		 4690 if (netif_running(netdev))
4691 e1000_free_irq(adapter);
4692
b55ccb35
JK		 4693 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4694 * would have already happened in close and is redundant. */
4695 e1000_release_hw_control(adapter);
2d7edb92 4696
1da177e4 4697 pci_disable_device(pdev);
240b1710 4698
d0e027db 4699 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4700
4701 return 0;
4702}
4703
2f82665f 4704#ifdef CONFIG_PM
64798845 4705static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4706{
4707 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4708 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4709 struct e1000_hw *hw = &adapter->hw;
406874a7 4710 u32 err;
1da177e4 4711
d0e027db 4712 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4713 pci_restore_state(pdev);
81250297
TI		 4714
4715 if (adapter->need_ioport)
4716 err = pci_enable_device(pdev);
4717 else
4718 err = pci_enable_device_mem(pdev);
c7be73bc 4719 if (err) {
3d1dd8cb
AK		 4720 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4721 return err;
4722 }
a4cb847d 4723 pci_set_master(pdev);
1da177e4 4724
d0e027db
AK		 4725 pci_enable_wake(pdev, PCI_D3hot, 0);
4726 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4727
c7be73bc
JP		 4728 if (netif_running(netdev)) {
4729 err = e1000_request_irq(adapter);
4730 if (err)
4731 return err;
4732 }
edd106fc
AK		 4733
4734 e1000_power_up_phy(adapter);
1da177e4 4735 e1000_reset(adapter);
1dc32918 4736 ew32(WUS, ~0);
1da177e4 4737
0fccd0e9
JG		 4738 e1000_init_manageability(adapter);
4739
96838a40 4740 if (netif_running(netdev))
1da177e4
LT		 4741 e1000_up(adapter);
4742
4743 netif_device_attach(netdev);
4744
b55ccb35
JK		 4745 /* If the controller is 82573 and f/w is AMT, do not set
4746 * DRV_LOAD until the interface is up. For all other cases,
4747 * let the f/w know that the h/w is now under the control
4748 * of the driver. */
1dc32918
JP		 4749 if (hw->mac_type != e1000_82573 ||
4750 !e1000_check_mng_mode(hw))
b55ccb35 4751 e1000_get_hw_control(adapter);
2d7edb92 4752
1da177e4
LT		 4753 return 0;
4754}
4755#endif
c653e635
AK		 4756
4757static void e1000_shutdown(struct pci_dev *pdev)
4758{
4759 e1000_suspend(pdev, PMSG_SUSPEND);
4760}
4761
1da177e4
LT		 4762#ifdef CONFIG_NET_POLL_CONTROLLER
4763/*
4764 * Polling 'interrupt' - used by things like netconsole to send skbs
4765 * without having to re-enable interrupts. It's not called while
4766 * the interrupt routine is executing.
4767 */
64798845 4768static void e1000_netpoll(struct net_device *netdev)
1da177e4 4769{
60490fe0 4770 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4771
1da177e4 4772 disable_irq(adapter->pdev->irq);
7d12e780 4773 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4774 enable_irq(adapter->pdev->irq);
4775}
4776#endif
4777
9026729b
AK		 4778/**
4779 * e1000_io_error_detected - called when PCI error is detected
4780 * @pdev: Pointer to PCI device
4781 * @state: The current pci conneection state
4782 *
4783 * This function is called after a PCI bus error affecting
4784 * this device has been detected.
4785 */
64798845
JP		 4786static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4787 pci_channel_state_t state)
9026729b
AK		 4788{
4789 struct net_device *netdev = pci_get_drvdata(pdev);
4790 struct e1000_adapter *adapter = netdev->priv;
4791
4792 netif_device_detach(netdev);
4793
4794 if (netif_running(netdev))
4795 e1000_down(adapter);
72e8d6bb 4796 pci_disable_device(pdev);
9026729b
AK		 4797
4798 /* Request a slot slot reset. */
4799 return PCI_ERS_RESULT_NEED_RESET;
4800}
4801
4802/**
4803 * e1000_io_slot_reset - called after the pci bus has been reset.
4804 * @pdev: Pointer to PCI device
4805 *
4806 * Restart the card from scratch, as if from a cold-boot. Implementation
4807 * resembles the first-half of the e1000_resume routine.
4808 */
4809static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4810{
4811 struct net_device *netdev = pci_get_drvdata(pdev);
4812 struct e1000_adapter *adapter = netdev->priv;
1dc32918 4813 struct e1000_hw *hw = &adapter->hw;
81250297 4814 int err;
9026729b 4815
81250297
TI		 4816 if (adapter->need_ioport)
4817 err = pci_enable_device(pdev);
4818 else
4819 err = pci_enable_device_mem(pdev);
4820 if (err) {
9026729b
AK		 4821 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4822 return PCI_ERS_RESULT_DISCONNECT;
4823 }
4824 pci_set_master(pdev);
4825
dbf38c94
LV		 4826 pci_enable_wake(pdev, PCI_D3hot, 0);
4827 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4828
9026729b 4829 e1000_reset(adapter);
1dc32918 4830 ew32(WUS, ~0);
9026729b
AK		 4831
4832 return PCI_ERS_RESULT_RECOVERED;
4833}
4834
4835/**
4836 * e1000_io_resume - called when traffic can start flowing again.
4837 * @pdev: Pointer to PCI device
4838 *
4839 * This callback is called when the error recovery driver tells us that
4840 * its OK to resume normal operation. Implementation resembles the
4841 * second-half of the e1000_resume routine.
4842 */
4843static void e1000_io_resume(struct pci_dev *pdev)
4844{
4845 struct net_device *netdev = pci_get_drvdata(pdev);
4846 struct e1000_adapter *adapter = netdev->priv;
1dc32918 4847 struct e1000_hw *hw = &adapter->hw;
0fccd0e9
JG		 4848
4849 e1000_init_manageability(adapter);
9026729b
AK		 4850
4851 if (netif_running(netdev)) {
4852 if (e1000_up(adapter)) {
4853 printk("e1000: can't bring device back up after reset\n");
4854 return;
4855 }
4856 }
4857
4858 netif_device_attach(netdev);
4859
0fccd0e9
JG		 4860 /* If the controller is 82573 and f/w is AMT, do not set
4861 * DRV_LOAD until the interface is up. For all other cases,
4862 * let the f/w know that the h/w is now under the control
4863 * of the driver. */
1dc32918
JP		 4864 if (hw->mac_type != e1000_82573 ||
4865 !e1000_check_mng_mode(hw))
0fccd0e9 4866 e1000_get_hw_control(adapter);
9026729b 4867
9026729b
AK		 4868}
4869
1da177e4 4870/* e1000_main.c */
Linux kernel - Deliverables
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