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e1000: simplify skb_put call.
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
1da177e4 31char e1000_driver_name[] = "e1000";
3ad2cc67 32static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 33#ifndef CONFIG_E1000_NAPI
34#define DRIVERNAPI
35#else
36#define DRIVERNAPI "-NAPI"
37#endif
ff1e55b0 38#define DRV_VERSION "7.2.9-k4"DRIVERNAPI
1da177e4 39char e1000_driver_version[] = DRV_VERSION;
3d41e30a 40static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
49static struct pci_device_id e1000_pci_tbl[] = {
50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 101 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
b7ee49db 102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
1da177e4
LT		 106 /* required last entry */
107 {0,}
108};
109
110MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
111
35574764
NN		 112int e1000_up(struct e1000_adapter *adapter);
113void e1000_down(struct e1000_adapter *adapter);
114void e1000_reinit_locked(struct e1000_adapter *adapter);
115void e1000_reset(struct e1000_adapter *adapter);
116int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
117int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
118int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
119void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
120void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 121static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 122 struct e1000_tx_ring *txdr);
3ad2cc67 123static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 124 struct e1000_rx_ring *rxdr);
3ad2cc67 125static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 126 struct e1000_tx_ring *tx_ring);
3ad2cc67 127static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 128 struct e1000_rx_ring *rx_ring);
129void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 130
131static int e1000_init_module(void);
132static void e1000_exit_module(void);
133static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
134static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 135static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 136static int e1000_sw_init(struct e1000_adapter *adapter);
137static int e1000_open(struct net_device *netdev);
138static int e1000_close(struct net_device *netdev);
139static void e1000_configure_tx(struct e1000_adapter *adapter);
140static void e1000_configure_rx(struct e1000_adapter *adapter);
141static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 142static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
143static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
144static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
145 struct e1000_tx_ring *tx_ring);
146static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 148static void e1000_set_multi(struct net_device *netdev);
149static void e1000_update_phy_info(unsigned long data);
150static void e1000_watchdog(unsigned long data);
1da177e4
LT		 151static void e1000_82547_tx_fifo_stall(unsigned long data);
152static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 156static irqreturn_t e1000_intr(int irq, void *data);
581d708e
MC		 157static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
1da177e4 159#ifdef CONFIG_E1000_NAPI
581d708e 160static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 161static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 162 struct e1000_rx_ring *rx_ring,
1da177e4 163 int *work_done, int work_to_do);
2d7edb92 164static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 165 struct e1000_rx_ring *rx_ring,
2d7edb92 166 int *work_done, int work_to_do);
1da177e4 167#else
581d708e
MC		 168static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
1da177e4 172#endif
581d708e 173static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 174 struct e1000_rx_ring *rx_ring,
175 int cleaned_count);
581d708e 176static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 177 struct e1000_rx_ring *rx_ring,
178 int cleaned_count);
1da177e4
LT		 179static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
180static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
181 int cmd);
35574764 182void e1000_set_ethtool_ops(struct net_device *netdev);
1da177e4
LT		 183static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
184static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
185static void e1000_tx_timeout(struct net_device *dev);
87041639 186static void e1000_reset_task(struct net_device *dev);
1da177e4 187static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 188static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
189 struct sk_buff *skb);
1da177e4
LT		 190
191static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
192static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
193static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
194static void e1000_restore_vlan(struct e1000_adapter *adapter);
195
977e74b5 196static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 197#ifdef CONFIG_PM
1da177e4
LT		 198static int e1000_resume(struct pci_dev *pdev);
199#endif
c653e635 200static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 201
202#ifdef CONFIG_NET_POLL_CONTROLLER
203/* for netdump / net console */
204static void e1000_netpoll (struct net_device *netdev);
205#endif
206
35574764
NN		 207extern void e1000_check_options(struct e1000_adapter *adapter);
208
9026729b
AK		 209static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
210 pci_channel_state_t state);
211static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
212static void e1000_io_resume(struct pci_dev *pdev);
213
214static struct pci_error_handlers e1000_err_handler = {
215 .error_detected = e1000_io_error_detected,
216 .slot_reset = e1000_io_slot_reset,
217 .resume = e1000_io_resume,
218};
24025e4e 219
1da177e4
LT		 220static struct pci_driver e1000_driver = {
221 .name = e1000_driver_name,
222 .id_table = e1000_pci_tbl,
223 .probe = e1000_probe,
224 .remove = __devexit_p(e1000_remove),
c4e24f01 225#ifdef CONFIG_PM
1da177e4 226 /* Power Managment Hooks */
1da177e4 227 .suspend = e1000_suspend,
c653e635 228 .resume = e1000_resume,
1da177e4 229#endif
9026729b
AK		 230 .shutdown = e1000_shutdown,
231 .err_handler = &e1000_err_handler
1da177e4
LT		 232};
233
234MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
235MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
236MODULE_LICENSE("GPL");
237MODULE_VERSION(DRV_VERSION);
238
239static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
240module_param(debug, int, 0);
241MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
242
243/**
244 * e1000_init_module - Driver Registration Routine
245 *
246 * e1000_init_module is the first routine called when the driver is
247 * loaded. All it does is register with the PCI subsystem.
248 **/
249
250static int __init
251e1000_init_module(void)
252{
253 int ret;
254 printk(KERN_INFO "%s - version %s\n",
255 e1000_driver_string, e1000_driver_version);
256
257 printk(KERN_INFO "%s\n", e1000_copyright);
258
29917620 259 ret = pci_register_driver(&e1000_driver);
8b378def 260
1da177e4
LT		 261 return ret;
262}
263
264module_init(e1000_init_module);
265
266/**
267 * e1000_exit_module - Driver Exit Cleanup Routine
268 *
269 * e1000_exit_module is called just before the driver is removed
270 * from memory.
271 **/
272
273static void __exit
274e1000_exit_module(void)
275{
1da177e4
LT		 276 pci_unregister_driver(&e1000_driver);
277}
278
279module_exit(e1000_exit_module);
280
2db10a08
AK		 281static int e1000_request_irq(struct e1000_adapter *adapter)
282{
283 struct net_device *netdev = adapter->netdev;
284 int flags, err = 0;
285
c0bc8721 286 flags = IRQF_SHARED;
2db10a08
AK		 287#ifdef CONFIG_PCI_MSI
288 if (adapter->hw.mac_type > e1000_82547_rev_2) {
289 adapter->have_msi = TRUE;
290 if ((err = pci_enable_msi(adapter->pdev))) {
291 DPRINTK(PROBE, ERR,
292 "Unable to allocate MSI interrupt Error: %d\n", err);
293 adapter->have_msi = FALSE;
294 }
295 }
296 if (adapter->have_msi)
61ef5c00 297 flags &= ~IRQF_SHARED;
2db10a08
AK		 298#endif
299 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
300 netdev->name, netdev)))
301 DPRINTK(PROBE, ERR,
302 "Unable to allocate interrupt Error: %d\n", err);
303
304 return err;
305}
306
307static void e1000_free_irq(struct e1000_adapter *adapter)
308{
309 struct net_device *netdev = adapter->netdev;
310
311 free_irq(adapter->pdev->irq, netdev);
312
313#ifdef CONFIG_PCI_MSI
314 if (adapter->have_msi)
315 pci_disable_msi(adapter->pdev);
316#endif
317}
318
1da177e4
LT		 319/**
320 * e1000_irq_disable - Mask off interrupt generation on the NIC
321 * @adapter: board private structure
322 **/
323
e619d523 324static void
1da177e4
LT		 325e1000_irq_disable(struct e1000_adapter *adapter)
326{
327 atomic_inc(&adapter->irq_sem);
328 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
329 E1000_WRITE_FLUSH(&adapter->hw);
330 synchronize_irq(adapter->pdev->irq);
331}
332
333/**
334 * e1000_irq_enable - Enable default interrupt generation settings
335 * @adapter: board private structure
336 **/
337
e619d523 338static void
1da177e4
LT		 339e1000_irq_enable(struct e1000_adapter *adapter)
340{
96838a40 341 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 342 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
343 E1000_WRITE_FLUSH(&adapter->hw);
344 }
345}
3ad2cc67
AB		 346
347static void
2d7edb92
MC		 348e1000_update_mng_vlan(struct e1000_adapter *adapter)
349{
350 struct net_device *netdev = adapter->netdev;
351 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
352 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 353 if (adapter->vlgrp) {
354 if (!adapter->vlgrp->vlan_devices[vid]) {
355 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 356 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
357 e1000_vlan_rx_add_vid(netdev, vid);
358 adapter->mng_vlan_id = vid;
359 } else
360 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 361
362 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
363 (vid != old_vid) &&
2d7edb92
MC		 364 !adapter->vlgrp->vlan_devices[old_vid])
365 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 366 } else
367 adapter->mng_vlan_id = vid;
2d7edb92
MC		 368 }
369}
b55ccb35
JK		 370
371/**
372 * e1000_release_hw_control - release control of the h/w to f/w
373 * @adapter: address of board private structure
374 *
375 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
376 * For ASF and Pass Through versions of f/w this means that the
377 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 378 * of the f/w this means that the network i/f is closed.
76c224bc 379 *
b55ccb35
JK		 380 **/
381
e619d523 382static void
b55ccb35
JK		 383e1000_release_hw_control(struct e1000_adapter *adapter)
384{
385 uint32_t ctrl_ext;
386 uint32_t swsm;
cd94dd0b 387 uint32_t extcnf;
b55ccb35
JK		 388
389 /* Let firmware taken over control of h/w */
390 switch (adapter->hw.mac_type) {
391 case e1000_82571:
392 case e1000_82572:
4cc15f54 393 case e1000_80003es2lan:
b55ccb35
JK		 394 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
395 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
396 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
397 break;
398 case e1000_82573:
399 swsm = E1000_READ_REG(&adapter->hw, SWSM);
400 E1000_WRITE_REG(&adapter->hw, SWSM,
401 swsm & ~E1000_SWSM_DRV_LOAD);
cd94dd0b
AK		 402 case e1000_ich8lan:
403 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
404 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
405 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
406 break;
b55ccb35
JK		 407 default:
408 break;
409 }
410}
411
412/**
413 * e1000_get_hw_control - get control of the h/w from f/w
414 * @adapter: address of board private structure
415 *
416 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 417 * For ASF and Pass Through versions of f/w this means that
418 * the driver is loaded. For AMT version (only with 82573)
90fb5135 419 * of the f/w this means that the network i/f is open.
76c224bc 420 *
b55ccb35
JK		 421 **/
422
e619d523 423static void
b55ccb35
JK		 424e1000_get_hw_control(struct e1000_adapter *adapter)
425{
426 uint32_t ctrl_ext;
427 uint32_t swsm;
cd94dd0b 428 uint32_t extcnf;
90fb5135 429
b55ccb35
JK		 430 /* Let firmware know the driver has taken over */
431 switch (adapter->hw.mac_type) {
432 case e1000_82571:
433 case e1000_82572:
4cc15f54 434 case e1000_80003es2lan:
b55ccb35
JK		 435 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
436 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
437 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
438 break;
439 case e1000_82573:
440 swsm = E1000_READ_REG(&adapter->hw, SWSM);
441 E1000_WRITE_REG(&adapter->hw, SWSM,
442 swsm | E1000_SWSM_DRV_LOAD);
443 break;
cd94dd0b
AK		 444 case e1000_ich8lan:
445 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
446 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
447 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
448 break;
b55ccb35
JK		 449 default:
450 break;
451 }
452}
453
1da177e4
LT		 454int
455e1000_up(struct e1000_adapter *adapter)
456{
457 struct net_device *netdev = adapter->netdev;
2db10a08 458 int i;
1da177e4
LT		 459
460 /* hardware has been reset, we need to reload some things */
461
1da177e4
LT		 462 e1000_set_multi(netdev);
463
464 e1000_restore_vlan(adapter);
465
466 e1000_configure_tx(adapter);
467 e1000_setup_rctl(adapter);
468 e1000_configure_rx(adapter);
72d64a43
JK		 469 /* call E1000_DESC_UNUSED which always leaves
470 * at least 1 descriptor unused to make sure
471 * next_to_use != next_to_clean */
f56799ea 472 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 473 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 474 adapter->alloc_rx_buf(adapter, ring,
475 E1000_DESC_UNUSED(ring));
f56799ea 476 }
1da177e4 477
7bfa4816
JK		 478 adapter->tx_queue_len = netdev->tx_queue_len;
479
1da177e4
LT		 480#ifdef CONFIG_E1000_NAPI
481 netif_poll_enable(netdev);
482#endif
5de55624
MC		 483 e1000_irq_enable(adapter);
484
1314bbf3
AK		 485 clear_bit(__E1000_DOWN, &adapter->flags);
486
487 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1da177e4
LT		 488 return 0;
489}
490
79f05bf0
AK		 491/**
492 * e1000_power_up_phy - restore link in case the phy was powered down
493 * @adapter: address of board private structure
494 *
495 * The phy may be powered down to save power and turn off link when the
496 * driver is unloaded and wake on lan is not enabled (among others)
497 * *** this routine MUST be followed by a call to e1000_reset ***
498 *
499 **/
500
d658266e 501void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 502{
503 uint16_t mii_reg = 0;
504
505 /* Just clear the power down bit to wake the phy back up */
506 if (adapter->hw.media_type == e1000_media_type_copper) {
507 /* according to the manual, the phy will retain its
508 * settings across a power-down/up cycle */
509 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
510 mii_reg &= ~MII_CR_POWER_DOWN;
511 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
512 }
513}
514
515static void e1000_power_down_phy(struct e1000_adapter *adapter)
516{
61c2505f
BA		 517 /* Power down the PHY so no link is implied when interface is down *
518 * The PHY cannot be powered down if any of the following is TRUE *
79f05bf0
AK		 519 * (a) WoL is enabled
520 * (b) AMT is active
521 * (c) SoL/IDER session is active */
522 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
61c2505f 523 adapter->hw.media_type == e1000_media_type_copper) {
79f05bf0 524 uint16_t mii_reg = 0;
61c2505f
BA		 525
526 switch (adapter->hw.mac_type) {
527 case e1000_82540:
528 case e1000_82545:
529 case e1000_82545_rev_3:
530 case e1000_82546:
531 case e1000_82546_rev_3:
532 case e1000_82541:
533 case e1000_82541_rev_2:
534 case e1000_82547:
535 case e1000_82547_rev_2:
536 if (E1000_READ_REG(&adapter->hw, MANC) &
537 E1000_MANC_SMBUS_EN)
538 goto out;
539 break;
540 case e1000_82571:
541 case e1000_82572:
542 case e1000_82573:
543 case e1000_80003es2lan:
544 case e1000_ich8lan:
545 if (e1000_check_mng_mode(&adapter->hw) ||
546 e1000_check_phy_reset_block(&adapter->hw))
547 goto out;
548 break;
549 default:
550 goto out;
551 }
79f05bf0
AK		 552 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
553 mii_reg |= MII_CR_POWER_DOWN;
554 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
555 mdelay(1);
556 }
61c2505f
BA		 557out:
558 return;
79f05bf0
AK		 559}
560
1da177e4
LT		 561void
562e1000_down(struct e1000_adapter *adapter)
563{
564 struct net_device *netdev = adapter->netdev;
565
1314bbf3
AK		 566 /* signal that we're down so the interrupt handler does not
567 * reschedule our watchdog timer */
568 set_bit(__E1000_DOWN, &adapter->flags);
569
1da177e4 570 e1000_irq_disable(adapter);
c1605eb3 571
1da177e4
LT		 572 del_timer_sync(&adapter->tx_fifo_stall_timer);
573 del_timer_sync(&adapter->watchdog_timer);
574 del_timer_sync(&adapter->phy_info_timer);
575
576#ifdef CONFIG_E1000_NAPI
577 netif_poll_disable(netdev);
578#endif
7bfa4816 579 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 580 adapter->link_speed = 0;
581 adapter->link_duplex = 0;
582 netif_carrier_off(netdev);
583 netif_stop_queue(netdev);
584
585 e1000_reset(adapter);
581d708e
MC		 586 e1000_clean_all_tx_rings(adapter);
587 e1000_clean_all_rx_rings(adapter);
1da177e4 588}
1da177e4 589
2db10a08
AK		 590void
591e1000_reinit_locked(struct e1000_adapter *adapter)
592{
593 WARN_ON(in_interrupt());
594 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
595 msleep(1);
596 e1000_down(adapter);
597 e1000_up(adapter);
598 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 599}
600
601void
602e1000_reset(struct e1000_adapter *adapter)
603{
2d7edb92 604 uint32_t pba, manc;
1125ecbc 605 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 606
607 /* Repartition Pba for greater than 9k mtu
608 * To take effect CTRL.RST is required.
609 */
610
2d7edb92
MC		 611 switch (adapter->hw.mac_type) {
612 case e1000_82547:
0e6ef3e0 613 case e1000_82547_rev_2:
2d7edb92
MC		 614 pba = E1000_PBA_30K;
615 break;
868d5309
MC		 616 case e1000_82571:
617 case e1000_82572:
6418ecc6 618 case e1000_80003es2lan:
868d5309
MC		 619 pba = E1000_PBA_38K;
620 break;
2d7edb92
MC		 621 case e1000_82573:
622 pba = E1000_PBA_12K;
623 break;
cd94dd0b
AK		 624 case e1000_ich8lan:
625 pba = E1000_PBA_8K;
626 break;
2d7edb92
MC		 627 default:
628 pba = E1000_PBA_48K;
629 break;
630 }
631
96838a40 632 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 633 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 634 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 635
636
96838a40 637 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 638 adapter->tx_fifo_head = 0;
639 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
640 adapter->tx_fifo_size =
641 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
642 atomic_set(&adapter->tx_fifo_stall, 0);
643 }
2d7edb92 644
1da177e4
LT		 645 E1000_WRITE_REG(&adapter->hw, PBA, pba);
646
647 /* flow control settings */
f11b7f85
JK		 648 /* Set the FC high water mark to 90% of the FIFO size.
649 * Required to clear last 3 LSB */
650 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 651 /* We can't use 90% on small FIFOs because the remainder
652 * would be less than 1 full frame. In this case, we size
653 * it to allow at least a full frame above the high water
654 * mark. */
655 if (pba < E1000_PBA_16K)
656 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 657
658 adapter->hw.fc_high_water = fc_high_water_mark;
659 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 660 if (adapter->hw.mac_type == e1000_80003es2lan)
661 adapter->hw.fc_pause_time = 0xFFFF;
662 else
663 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 664 adapter->hw.fc_send_xon = 1;
665 adapter->hw.fc = adapter->hw.original_fc;
666
2d7edb92 667 /* Allow time for pending master requests to run */
1da177e4 668 e1000_reset_hw(&adapter->hw);
96838a40 669 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 670 E1000_WRITE_REG(&adapter->hw, WUC, 0);
09ae3e88 671
96838a40 672 if (e1000_init_hw(&adapter->hw))
1da177e4 673 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 674 e1000_update_mng_vlan(adapter);
1da177e4
LT		 675 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
676 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
677
678 e1000_reset_adaptive(&adapter->hw);
679 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 680
681 if (!adapter->smart_power_down &&
682 (adapter->hw.mac_type == e1000_82571 ||
683 adapter->hw.mac_type == e1000_82572)) {
684 uint16_t phy_data = 0;
685 /* speed up time to link by disabling smart power down, ignore
686 * the return value of this function because there is nothing
687 * different we would do if it failed */
688 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
689 &phy_data);
690 phy_data &= ~IGP02E1000_PM_SPD;
691 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
692 phy_data);
693 }
694
4ccc12ae
JB		 695 if ((adapter->en_mng_pt) &&
696 (adapter->hw.mac_type >= e1000_82540) &&
697 (adapter->hw.mac_type < e1000_82571) &&
698 (adapter->hw.media_type == e1000_media_type_copper)) {
2d7edb92
MC		 699 manc = E1000_READ_REG(&adapter->hw, MANC);
700 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
701 E1000_WRITE_REG(&adapter->hw, MANC, manc);
702 }
1da177e4
LT		 703}
704
705/**
706 * e1000_probe - Device Initialization Routine
707 * @pdev: PCI device information struct
708 * @ent: entry in e1000_pci_tbl
709 *
710 * Returns 0 on success, negative on failure
711 *
712 * e1000_probe initializes an adapter identified by a pci_dev structure.
713 * The OS initialization, configuring of the adapter private structure,
714 * and a hardware reset occur.
715 **/
716
717static int __devinit
718e1000_probe(struct pci_dev *pdev,
719 const struct pci_device_id *ent)
720{
721 struct net_device *netdev;
722 struct e1000_adapter *adapter;
2d7edb92 723 unsigned long mmio_start, mmio_len;
cd94dd0b 724 unsigned long flash_start, flash_len;
2d7edb92 725
1da177e4 726 static int cards_found = 0;
120cd576 727 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 728 int i, err, pci_using_dac;
120cd576 729 uint16_t eeprom_data = 0;
1da177e4 730 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 731 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 732 return err;
733
cd94dd0b
AK		 734 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
735 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 736 pci_using_dac = 1;
737 } else {
cd94dd0b
AK		 738 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
739 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 740 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 741 goto err_dma;
1da177e4
LT		 742 }
743 pci_using_dac = 0;
744 }
745
96838a40 746 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 747 goto err_pci_reg;
1da177e4
LT		 748
749 pci_set_master(pdev);
750
6dd62ab0 751 err = -ENOMEM;
1da177e4 752 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 753 if (!netdev)
1da177e4 754 goto err_alloc_etherdev;
1da177e4
LT		 755
756 SET_MODULE_OWNER(netdev);
757 SET_NETDEV_DEV(netdev, &pdev->dev);
758
759 pci_set_drvdata(pdev, netdev);
60490fe0 760 adapter = netdev_priv(netdev);
1da177e4
LT		 761 adapter->netdev = netdev;
762 adapter->pdev = pdev;
763 adapter->hw.back = adapter;
764 adapter->msg_enable = (1 << debug) - 1;
765
766 mmio_start = pci_resource_start(pdev, BAR_0);
767 mmio_len = pci_resource_len(pdev, BAR_0);
768
6dd62ab0 769 err = -EIO;
1da177e4 770 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 771 if (!adapter->hw.hw_addr)
1da177e4 772 goto err_ioremap;
1da177e4 773
96838a40
JB		 774 for (i = BAR_1; i <= BAR_5; i++) {
775 if (pci_resource_len(pdev, i) == 0)
1da177e4 776 continue;
96838a40 777 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 778 adapter->hw.io_base = pci_resource_start(pdev, i);
779 break;
780 }
781 }
782
783 netdev->open = &e1000_open;
784 netdev->stop = &e1000_close;
785 netdev->hard_start_xmit = &e1000_xmit_frame;
786 netdev->get_stats = &e1000_get_stats;
787 netdev->set_multicast_list = &e1000_set_multi;
788 netdev->set_mac_address = &e1000_set_mac;
789 netdev->change_mtu = &e1000_change_mtu;
790 netdev->do_ioctl = &e1000_ioctl;
791 e1000_set_ethtool_ops(netdev);
792 netdev->tx_timeout = &e1000_tx_timeout;
793 netdev->watchdog_timeo = 5 * HZ;
794#ifdef CONFIG_E1000_NAPI
795 netdev->poll = &e1000_clean;
796 netdev->weight = 64;
797#endif
798 netdev->vlan_rx_register = e1000_vlan_rx_register;
799 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
800 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
801#ifdef CONFIG_NET_POLL_CONTROLLER
802 netdev->poll_controller = e1000_netpoll;
803#endif
0eb5a34c 804 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 805
806 netdev->mem_start = mmio_start;
807 netdev->mem_end = mmio_start + mmio_len;
808 netdev->base_addr = adapter->hw.io_base;
809
810 adapter->bd_number = cards_found;
811
812 /* setup the private structure */
813
96838a40 814 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 815 goto err_sw_init;
816
6dd62ab0 817 err = -EIO;
cd94dd0b
AK		 818 /* Flash BAR mapping must happen after e1000_sw_init
819 * because it depends on mac_type */
820 if ((adapter->hw.mac_type == e1000_ich8lan) &&
821 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
822 flash_start = pci_resource_start(pdev, 1);
823 flash_len = pci_resource_len(pdev, 1);
824 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 825 if (!adapter->hw.flash_address)
cd94dd0b 826 goto err_flashmap;
cd94dd0b
AK		 827 }
828
6dd62ab0 829 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 830 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
831
96838a40 832 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 833 netdev->features = NETIF_F_SG |
834 NETIF_F_HW_CSUM |
835 NETIF_F_HW_VLAN_TX |
836 NETIF_F_HW_VLAN_RX |
837 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 838 if (adapter->hw.mac_type == e1000_ich8lan)
839 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 840 }
841
842#ifdef NETIF_F_TSO
96838a40 843 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 844 (adapter->hw.mac_type != e1000_82547))
845 netdev->features |= NETIF_F_TSO;
2d7edb92 846
87ca4e5b 847#ifdef NETIF_F_TSO6
96838a40 848 if (adapter->hw.mac_type > e1000_82547_rev_2)
87ca4e5b 849 netdev->features |= NETIF_F_TSO6;
2d7edb92 850#endif
1da177e4 851#endif
96838a40 852 if (pci_using_dac)
1da177e4
LT		 853 netdev->features |= NETIF_F_HIGHDMA;
854
76c224bc
AK		 855 netdev->features |= NETIF_F_LLTX;
856
2d7edb92
MC		 857 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
858
cd94dd0b
AK		 859 /* initialize eeprom parameters */
860
861 if (e1000_init_eeprom_params(&adapter->hw)) {
862 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 863 goto err_eeprom;
cd94dd0b
AK		 864 }
865
96838a40 866 /* before reading the EEPROM, reset the controller to
1da177e4 867 * put the device in a known good starting state */
96838a40 868
1da177e4
LT		 869 e1000_reset_hw(&adapter->hw);
870
871 /* make sure the EEPROM is good */
872
96838a40 873 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 874 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 875 goto err_eeprom;
876 }
877
878 /* copy the MAC address out of the EEPROM */
879
96838a40 880 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 881 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
882 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 883 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 884
96838a40 885 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 886 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 887 goto err_eeprom;
888 }
889
1da177e4
LT		 890 e1000_get_bus_info(&adapter->hw);
891
892 init_timer(&adapter->tx_fifo_stall_timer);
893 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
894 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
895
896 init_timer(&adapter->watchdog_timer);
897 adapter->watchdog_timer.function = &e1000_watchdog;
898 adapter->watchdog_timer.data = (unsigned long) adapter;
899
1da177e4
LT		 900 init_timer(&adapter->phy_info_timer);
901 adapter->phy_info_timer.function = &e1000_update_phy_info;
902 adapter->phy_info_timer.data = (unsigned long) adapter;
903
87041639
JK		 904 INIT_WORK(&adapter->reset_task,
905 (void (*)(void *))e1000_reset_task, netdev);
1da177e4 906
1da177e4
LT		 907 e1000_check_options(adapter);
908
909 /* Initial Wake on LAN setting
910 * If APM wake is enabled in the EEPROM,
911 * enable the ACPI Magic Packet filter
912 */
913
96838a40 914 switch (adapter->hw.mac_type) {
1da177e4
LT		 915 case e1000_82542_rev2_0:
916 case e1000_82542_rev2_1:
917 case e1000_82543:
918 break;
919 case e1000_82544:
920 e1000_read_eeprom(&adapter->hw,
921 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
922 eeprom_apme_mask = E1000_EEPROM_82544_APM;
923 break;
cd94dd0b
AK		 924 case e1000_ich8lan:
925 e1000_read_eeprom(&adapter->hw,
926 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
927 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
928 break;
1da177e4
LT		 929 case e1000_82546:
930 case e1000_82546_rev_3:
fd803241 931 case e1000_82571:
6418ecc6 932 case e1000_80003es2lan:
96838a40 933 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 934 e1000_read_eeprom(&adapter->hw,
935 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
936 break;
937 }
938 /* Fall Through */
939 default:
940 e1000_read_eeprom(&adapter->hw,
941 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
942 break;
943 }
96838a40 944 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 945 adapter->eeprom_wol |= E1000_WUFC_MAG;
946
947 /* now that we have the eeprom settings, apply the special cases
948 * where the eeprom may be wrong or the board simply won't support
949 * wake on lan on a particular port */
950 switch (pdev->device) {
951 case E1000_DEV_ID_82546GB_PCIE:
952 adapter->eeprom_wol = 0;
953 break;
954 case E1000_DEV_ID_82546EB_FIBER:
955 case E1000_DEV_ID_82546GB_FIBER:
956 case E1000_DEV_ID_82571EB_FIBER:
957 /* Wake events only supported on port A for dual fiber
958 * regardless of eeprom setting */
959 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
960 adapter->eeprom_wol = 0;
961 break;
962 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 963 case E1000_DEV_ID_82571EB_QUAD_COPPER:
120cd576
JB		 964 /* if quad port adapter, disable WoL on all but port A */
965 if (global_quad_port_a != 0)
966 adapter->eeprom_wol = 0;
967 else
968 adapter->quad_port_a = 1;
969 /* Reset for multiple quad port adapters */
970 if (++global_quad_port_a == 4)
971 global_quad_port_a = 0;
972 break;
973 }
974
975 /* initialize the wol settings based on the eeprom settings */
976 adapter->wol = adapter->eeprom_wol;
1da177e4 977
fb3d47d4
JK		 978 /* print bus type/speed/width info */
979 {
980 struct e1000_hw *hw = &adapter->hw;
981 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
982 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
983 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
984 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
985 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
986 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
987 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
988 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
989 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
990 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
991 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
992 "32-bit"));
993 }
994
995 for (i = 0; i < 6; i++)
996 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
997
1da177e4
LT		 998 /* reset the hardware with the new settings */
999 e1000_reset(adapter);
1000
b55ccb35
JK		 1001 /* If the controller is 82573 and f/w is AMT, do not set
1002 * DRV_LOAD until the interface is up. For all other cases,
1003 * let the f/w know that the h/w is now under the control
1004 * of the driver. */
1005 if (adapter->hw.mac_type != e1000_82573 ||
1006 !e1000_check_mng_mode(&adapter->hw))
1007 e1000_get_hw_control(adapter);
2d7edb92 1008
1da177e4 1009 strcpy(netdev->name, "eth%d");
96838a40 1010 if ((err = register_netdev(netdev)))
1da177e4
LT		 1011 goto err_register;
1012
1314bbf3
AK		 1013 /* tell the stack to leave us alone until e1000_open() is called */
1014 netif_carrier_off(netdev);
1015 netif_stop_queue(netdev);
1016
1da177e4
LT		 1017 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1018
1019 cards_found++;
1020 return 0;
1021
1022err_register:
6dd62ab0
VA		 1023 e1000_release_hw_control(adapter);
1024err_eeprom:
1025 if (!e1000_check_phy_reset_block(&adapter->hw))
1026 e1000_phy_hw_reset(&adapter->hw);
1027
cd94dd0b
AK		 1028 if (adapter->hw.flash_address)
1029 iounmap(adapter->hw.flash_address);
1030err_flashmap:
6dd62ab0
VA		 1031#ifdef CONFIG_E1000_NAPI
1032 for (i = 0; i < adapter->num_rx_queues; i++)
1033 dev_put(&adapter->polling_netdev[i]);
1034#endif
1035
1036 kfree(adapter->tx_ring);
1037 kfree(adapter->rx_ring);
1038#ifdef CONFIG_E1000_NAPI
1039 kfree(adapter->polling_netdev);
1040#endif
1da177e4 1041err_sw_init:
1da177e4
LT		 1042 iounmap(adapter->hw.hw_addr);
1043err_ioremap:
1044 free_netdev(netdev);
1045err_alloc_etherdev:
1046 pci_release_regions(pdev);
6dd62ab0
VA		 1047err_pci_reg:
1048err_dma:
1049 pci_disable_device(pdev);
1da177e4
LT		 1050 return err;
1051}
1052
1053/**
1054 * e1000_remove - Device Removal Routine
1055 * @pdev: PCI device information struct
1056 *
1057 * e1000_remove is called by the PCI subsystem to alert the driver
1058 * that it should release a PCI device. The could be caused by a
1059 * Hot-Plug event, or because the driver is going to be removed from
1060 * memory.
1061 **/
1062
1063static void __devexit
1064e1000_remove(struct pci_dev *pdev)
1065{
1066 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1067 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 1068 uint32_t manc;
581d708e
MC		 1069#ifdef CONFIG_E1000_NAPI
1070 int i;
1071#endif
1da177e4 1072
be2b28ed
JG		 1073 flush_scheduled_work();
1074
4ccc12ae
JB		 1075 if (adapter->hw.mac_type >= e1000_82540 &&
1076 adapter->hw.mac_type < e1000_82571 &&
1077 adapter->hw.media_type == e1000_media_type_copper) {
1da177e4 1078 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 1079 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 1080 manc |= E1000_MANC_ARP_EN;
1081 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1082 }
1083 }
1084
b55ccb35
JK		 1085 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1086 * would have already happened in close and is redundant. */
1087 e1000_release_hw_control(adapter);
2d7edb92 1088
1da177e4 1089 unregister_netdev(netdev);
581d708e 1090#ifdef CONFIG_E1000_NAPI
f56799ea 1091 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1092 dev_put(&adapter->polling_netdev[i]);
581d708e 1093#endif
1da177e4 1094
96838a40 1095 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1096 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1097
24025e4e
MC		 1098 kfree(adapter->tx_ring);
1099 kfree(adapter->rx_ring);
1100#ifdef CONFIG_E1000_NAPI
1101 kfree(adapter->polling_netdev);
1102#endif
1103
1da177e4 1104 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1105 if (adapter->hw.flash_address)
1106 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1107 pci_release_regions(pdev);
1108
1109 free_netdev(netdev);
1110
1111 pci_disable_device(pdev);
1112}
1113
1114/**
1115 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1116 * @adapter: board private structure to initialize
1117 *
1118 * e1000_sw_init initializes the Adapter private data structure.
1119 * Fields are initialized based on PCI device information and
1120 * OS network device settings (MTU size).
1121 **/
1122
1123static int __devinit
1124e1000_sw_init(struct e1000_adapter *adapter)
1125{
1126 struct e1000_hw *hw = &adapter->hw;
1127 struct net_device *netdev = adapter->netdev;
1128 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1129#ifdef CONFIG_E1000_NAPI
1130 int i;
1131#endif
1da177e4
LT		 1132
1133 /* PCI config space info */
1134
1135 hw->vendor_id = pdev->vendor;
1136 hw->device_id = pdev->device;
1137 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1138 hw->subsystem_id = pdev->subsystem_device;
1139
1140 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1141
1142 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1143
eb0f8054 1144 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1145 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1146 hw->max_frame_size = netdev->mtu +
1147 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1148 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1149
1150 /* identify the MAC */
1151
96838a40 1152 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1153 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1154 return -EIO;
1155 }
1156
96838a40 1157 switch (hw->mac_type) {
1da177e4
LT		 1158 default:
1159 break;
1160 case e1000_82541:
1161 case e1000_82547:
1162 case e1000_82541_rev_2:
1163 case e1000_82547_rev_2:
1164 hw->phy_init_script = 1;
1165 break;
1166 }
1167
1168 e1000_set_media_type(hw);
1169
1170 hw->wait_autoneg_complete = FALSE;
1171 hw->tbi_compatibility_en = TRUE;
1172 hw->adaptive_ifs = TRUE;
1173
1174 /* Copper options */
1175
96838a40 1176 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1177 hw->mdix = AUTO_ALL_MODES;
1178 hw->disable_polarity_correction = FALSE;
1179 hw->master_slave = E1000_MASTER_SLAVE;
1180 }
1181
f56799ea
JK		 1182 adapter->num_tx_queues = 1;
1183 adapter->num_rx_queues = 1;
581d708e
MC		 1184
1185 if (e1000_alloc_queues(adapter)) {
1186 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1187 return -ENOMEM;
1188 }
1189
1190#ifdef CONFIG_E1000_NAPI
f56799ea 1191 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1192 adapter->polling_netdev[i].priv = adapter;
1193 adapter->polling_netdev[i].poll = &e1000_clean;
1194 adapter->polling_netdev[i].weight = 64;
1195 dev_hold(&adapter->polling_netdev[i]);
1196 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1197 }
7bfa4816 1198 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1199#endif
1200
1da177e4
LT		 1201 atomic_set(&adapter->irq_sem, 1);
1202 spin_lock_init(&adapter->stats_lock);
1da177e4 1203
1314bbf3
AK		 1204 set_bit(__E1000_DOWN, &adapter->flags);
1205
1da177e4
LT		 1206 return 0;
1207}
1208
581d708e
MC		 1209/**
1210 * e1000_alloc_queues - Allocate memory for all rings
1211 * @adapter: board private structure to initialize
1212 *
1213 * We allocate one ring per queue at run-time since we don't know the
1214 * number of queues at compile-time. The polling_netdev array is
1215 * intended for Multiqueue, but should work fine with a single queue.
1216 **/
1217
1218static int __devinit
1219e1000_alloc_queues(struct e1000_adapter *adapter)
1220{
1221 int size;
1222
f56799ea 1223 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1224 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1225 if (!adapter->tx_ring)
1226 return -ENOMEM;
1227 memset(adapter->tx_ring, 0, size);
1228
f56799ea 1229 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1230 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1231 if (!adapter->rx_ring) {
1232 kfree(adapter->tx_ring);
1233 return -ENOMEM;
1234 }
1235 memset(adapter->rx_ring, 0, size);
1236
1237#ifdef CONFIG_E1000_NAPI
f56799ea 1238 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1239 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1240 if (!adapter->polling_netdev) {
1241 kfree(adapter->tx_ring);
1242 kfree(adapter->rx_ring);
1243 return -ENOMEM;
1244 }
1245 memset(adapter->polling_netdev, 0, size);
1246#endif
1247
1248 return E1000_SUCCESS;
1249}
1250
1da177e4
LT		 1251/**
1252 * e1000_open - Called when a network interface is made active
1253 * @netdev: network interface device structure
1254 *
1255 * Returns 0 on success, negative value on failure
1256 *
1257 * The open entry point is called when a network interface is made
1258 * active by the system (IFF_UP). At this point all resources needed
1259 * for transmit and receive operations are allocated, the interrupt
1260 * handler is registered with the OS, the watchdog timer is started,
1261 * and the stack is notified that the interface is ready.
1262 **/
1263
1264static int
1265e1000_open(struct net_device *netdev)
1266{
60490fe0 1267 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1268 int err;
1269
2db10a08 1270 /* disallow open during test */
1314bbf3 1271 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1272 return -EBUSY;
1273
1da177e4 1274 /* allocate transmit descriptors */
581d708e 1275 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1276 goto err_setup_tx;
1277
1278 /* allocate receive descriptors */
581d708e 1279 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1280 goto err_setup_rx;
1281
2db10a08
AK		 1282 err = e1000_request_irq(adapter);
1283 if (err)
401a552b 1284 goto err_req_irq;
2db10a08 1285
79f05bf0
AK		 1286 e1000_power_up_phy(adapter);
1287
96838a40 1288 if ((err = e1000_up(adapter)))
1da177e4 1289 goto err_up;
2d7edb92 1290 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1291 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1292 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1293 e1000_update_mng_vlan(adapter);
1294 }
1da177e4 1295
b55ccb35
JK		 1296 /* If AMT is enabled, let the firmware know that the network
1297 * interface is now open */
1298 if (adapter->hw.mac_type == e1000_82573 &&
1299 e1000_check_mng_mode(&adapter->hw))
1300 e1000_get_hw_control(adapter);
1301
1da177e4
LT		 1302 return E1000_SUCCESS;
1303
1304err_up:
401a552b
VA		 1305 e1000_power_down_phy(adapter);
1306 e1000_free_irq(adapter);
1307err_req_irq:
581d708e 1308 e1000_free_all_rx_resources(adapter);
1da177e4 1309err_setup_rx:
581d708e 1310 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1311err_setup_tx:
1312 e1000_reset(adapter);
1313
1314 return err;
1315}
1316
1317/**
1318 * e1000_close - Disables a network interface
1319 * @netdev: network interface device structure
1320 *
1321 * Returns 0, this is not allowed to fail
1322 *
1323 * The close entry point is called when an interface is de-activated
1324 * by the OS. The hardware is still under the drivers control, but
1325 * needs to be disabled. A global MAC reset is issued to stop the
1326 * hardware, and all transmit and receive resources are freed.
1327 **/
1328
1329static int
1330e1000_close(struct net_device *netdev)
1331{
60490fe0 1332 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1333
2db10a08 1334 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1335 e1000_down(adapter);
79f05bf0 1336 e1000_power_down_phy(adapter);
2db10a08 1337 e1000_free_irq(adapter);
1da177e4 1338
581d708e
MC		 1339 e1000_free_all_tx_resources(adapter);
1340 e1000_free_all_rx_resources(adapter);
1da177e4 1341
4666560a
BA		 1342 /* kill manageability vlan ID if supported, but not if a vlan with
1343 * the same ID is registered on the host OS (let 8021q kill it) */
96838a40 1344 if ((adapter->hw.mng_cookie.status &
4666560a
BA		 1345 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1346 !(adapter->vlgrp &&
1347 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
2d7edb92
MC		 1348 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1349 }
b55ccb35
JK		 1350
1351 /* If AMT is enabled, let the firmware know that the network
1352 * interface is now closed */
1353 if (adapter->hw.mac_type == e1000_82573 &&
1354 e1000_check_mng_mode(&adapter->hw))
1355 e1000_release_hw_control(adapter);
1356
1da177e4
LT		 1357 return 0;
1358}
1359
1360/**
1361 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1362 * @adapter: address of board private structure
2d7edb92
MC		 1363 * @start: address of beginning of memory
1364 * @len: length of memory
1da177e4 1365 **/
e619d523 1366static boolean_t
1da177e4
LT		 1367e1000_check_64k_bound(struct e1000_adapter *adapter,
1368 void *start, unsigned long len)
1369{
1370 unsigned long begin = (unsigned long) start;
1371 unsigned long end = begin + len;
1372
2648345f
MC		 1373 /* First rev 82545 and 82546 need to not allow any memory
1374 * write location to cross 64k boundary due to errata 23 */
1da177e4 1375 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1376 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1377 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1378 }
1379
1380 return TRUE;
1381}
1382
1383/**
1384 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1385 * @adapter: board private structure
581d708e 1386 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1387 *
1388 * Return 0 on success, negative on failure
1389 **/
1390
3ad2cc67 1391static int
581d708e
MC		 1392e1000_setup_tx_resources(struct e1000_adapter *adapter,
1393 struct e1000_tx_ring *txdr)
1da177e4 1394{
1da177e4
LT		 1395 struct pci_dev *pdev = adapter->pdev;
1396 int size;
1397
1398 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1399 txdr->buffer_info = vmalloc(size);
96838a40 1400 if (!txdr->buffer_info) {
2648345f
MC		 1401 DPRINTK(PROBE, ERR,
1402 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1403 return -ENOMEM;
1404 }
1405 memset(txdr->buffer_info, 0, size);
1406
1407 /* round up to nearest 4K */
1408
1409 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1410 E1000_ROUNDUP(txdr->size, 4096);
1411
1412 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1413 if (!txdr->desc) {
1da177e4 1414setup_tx_desc_die:
1da177e4 1415 vfree(txdr->buffer_info);
2648345f
MC		 1416 DPRINTK(PROBE, ERR,
1417 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1418 return -ENOMEM;
1419 }
1420
2648345f 1421 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1422 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1423 void *olddesc = txdr->desc;
1424 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1425 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1426 "at %p\n", txdr->size, txdr->desc);
1427 /* Try again, without freeing the previous */
1da177e4 1428 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1429 /* Failed allocation, critical failure */
96838a40 1430 if (!txdr->desc) {
1da177e4
LT		 1431 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1432 goto setup_tx_desc_die;
1433 }
1434
1435 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1436 /* give up */
2648345f
MC		 1437 pci_free_consistent(pdev, txdr->size, txdr->desc,
1438 txdr->dma);
1da177e4
LT		 1439 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1440 DPRINTK(PROBE, ERR,
2648345f
MC		 1441 "Unable to allocate aligned memory "
1442 "for the transmit descriptor ring\n");
1da177e4
LT		 1443 vfree(txdr->buffer_info);
1444 return -ENOMEM;
1445 } else {
2648345f 1446 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1447 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1448 }
1449 }
1450 memset(txdr->desc, 0, txdr->size);
1451
1452 txdr->next_to_use = 0;
1453 txdr->next_to_clean = 0;
2ae76d98 1454 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1455
1456 return 0;
1457}
1458
581d708e
MC		 1459/**
1460 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1461 * (Descriptors) for all queues
1462 * @adapter: board private structure
1463 *
581d708e
MC		 1464 * Return 0 on success, negative on failure
1465 **/
1466
1467int
1468e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1469{
1470 int i, err = 0;
1471
f56799ea 1472 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1473 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1474 if (err) {
1475 DPRINTK(PROBE, ERR,
1476 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1477 for (i-- ; i >= 0; i--)
1478 e1000_free_tx_resources(adapter,
1479 &adapter->tx_ring[i]);
581d708e
MC		 1480 break;
1481 }
1482 }
1483
1484 return err;
1485}
1486
1da177e4
LT		 1487/**
1488 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1489 * @adapter: board private structure
1490 *
1491 * Configure the Tx unit of the MAC after a reset.
1492 **/
1493
1494static void
1495e1000_configure_tx(struct e1000_adapter *adapter)
1496{
581d708e
MC		 1497 uint64_t tdba;
1498 struct e1000_hw *hw = &adapter->hw;
1499 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1500 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1501
1502 /* Setup the HW Tx Head and Tail descriptor pointers */
1503
f56799ea 1504 switch (adapter->num_tx_queues) {
24025e4e
MC		 1505 case 1:
1506 default:
581d708e
MC		 1507 tdba = adapter->tx_ring[0].dma;
1508 tdlen = adapter->tx_ring[0].count *
1509 sizeof(struct e1000_tx_desc);
581d708e 1510 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1511 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1512 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1513 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1514 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1515 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1516 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1517 break;
1518 }
1da177e4
LT		 1519
1520 /* Set the default values for the Tx Inter Packet Gap timer */
1521
0fadb059
JK		 1522 if (hw->media_type == e1000_media_type_fiber ||
1523 hw->media_type == e1000_media_type_internal_serdes)
1524 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1525 else
1526 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1527
581d708e 1528 switch (hw->mac_type) {
1da177e4
LT		 1529 case e1000_82542_rev2_0:
1530 case e1000_82542_rev2_1:
1531 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1532 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1533 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1534 break;
87041639
JK		 1535 case e1000_80003es2lan:
1536 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1537 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1538 break;
1da177e4 1539 default:
0fadb059
JK		 1540 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1541 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1542 break;
1da177e4 1543 }
0fadb059
JK		 1544 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1545 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1546 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1547
1548 /* Set the Tx Interrupt Delay register */
1549
581d708e
MC		 1550 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1551 if (hw->mac_type >= e1000_82540)
1552 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1553
1554 /* Program the Transmit Control Register */
1555
581d708e 1556 tctl = E1000_READ_REG(hw, TCTL);
1da177e4 1557 tctl &= ~E1000_TCTL_CT;
7e6c9861 1558 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1559 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1560
2ae76d98
MC		 1561 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1562 tarc = E1000_READ_REG(hw, TARC0);
90fb5135
AK		 1563 /* set the speed mode bit, we'll clear it if we're not at
1564 * gigabit link later */
09ae3e88 1565 tarc |= (1 << 21);
2ae76d98 1566 E1000_WRITE_REG(hw, TARC0, tarc);
87041639
JK		 1567 } else if (hw->mac_type == e1000_80003es2lan) {
1568 tarc = E1000_READ_REG(hw, TARC0);
1569 tarc |= 1;
87041639
JK		 1570 E1000_WRITE_REG(hw, TARC0, tarc);
1571 tarc = E1000_READ_REG(hw, TARC1);
1572 tarc |= 1;
1573 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1574 }
1575
581d708e 1576 e1000_config_collision_dist(hw);
1da177e4
LT		 1577
1578 /* Setup Transmit Descriptor Settings for eop descriptor */
1579 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1580 E1000_TXD_CMD_IFCS;
1581
581d708e 1582 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1583 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1584 else
1585 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1586
1587 /* Cache if we're 82544 running in PCI-X because we'll
1588 * need this to apply a workaround later in the send path. */
581d708e
MC		 1589 if (hw->mac_type == e1000_82544 &&
1590 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1591 adapter->pcix_82544 = 1;
7e6c9861
JK		 1592
1593 E1000_WRITE_REG(hw, TCTL, tctl);
1594
1da177e4
LT		 1595}
1596
1597/**
1598 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1599 * @adapter: board private structure
581d708e 1600 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1601 *
1602 * Returns 0 on success, negative on failure
1603 **/
1604
3ad2cc67 1605static int
581d708e
MC		 1606e1000_setup_rx_resources(struct e1000_adapter *adapter,
1607 struct e1000_rx_ring *rxdr)
1da177e4 1608{
1da177e4 1609 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1610 int size, desc_len;
1da177e4
LT		 1611
1612 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1613 rxdr->buffer_info = vmalloc(size);
581d708e 1614 if (!rxdr->buffer_info) {
2648345f
MC		 1615 DPRINTK(PROBE, ERR,
1616 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1617 return -ENOMEM;
1618 }
1619 memset(rxdr->buffer_info, 0, size);
1620
2d7edb92
MC		 1621 size = sizeof(struct e1000_ps_page) * rxdr->count;
1622 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1623 if (!rxdr->ps_page) {
2d7edb92
MC		 1624 vfree(rxdr->buffer_info);
1625 DPRINTK(PROBE, ERR,
1626 "Unable to allocate memory for the receive descriptor ring\n");
1627 return -ENOMEM;
1628 }
1629 memset(rxdr->ps_page, 0, size);
1630
1631 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1632 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1633 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1634 vfree(rxdr->buffer_info);
1635 kfree(rxdr->ps_page);
1636 DPRINTK(PROBE, ERR,
1637 "Unable to allocate memory for the receive descriptor ring\n");
1638 return -ENOMEM;
1639 }
1640 memset(rxdr->ps_page_dma, 0, size);
1641
96838a40 1642 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1643 desc_len = sizeof(struct e1000_rx_desc);
1644 else
1645 desc_len = sizeof(union e1000_rx_desc_packet_split);
1646
1da177e4
LT		 1647 /* Round up to nearest 4K */
1648
2d7edb92 1649 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1650 E1000_ROUNDUP(rxdr->size, 4096);
1651
1652 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1653
581d708e
MC		 1654 if (!rxdr->desc) {
1655 DPRINTK(PROBE, ERR,
1656 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1657setup_rx_desc_die:
1da177e4 1658 vfree(rxdr->buffer_info);
2d7edb92
MC		 1659 kfree(rxdr->ps_page);
1660 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1661 return -ENOMEM;
1662 }
1663
2648345f 1664 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1665 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1666 void *olddesc = rxdr->desc;
1667 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1668 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1669 "at %p\n", rxdr->size, rxdr->desc);
1670 /* Try again, without freeing the previous */
1da177e4 1671 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1672 /* Failed allocation, critical failure */
581d708e 1673 if (!rxdr->desc) {
1da177e4 1674 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1675 DPRINTK(PROBE, ERR,
1676 "Unable to allocate memory "
1677 "for the receive descriptor ring\n");
1da177e4
LT		 1678 goto setup_rx_desc_die;
1679 }
1680
1681 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1682 /* give up */
2648345f
MC		 1683 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1684 rxdr->dma);
1da177e4 1685 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1686 DPRINTK(PROBE, ERR,
1687 "Unable to allocate aligned memory "
1688 "for the receive descriptor ring\n");
581d708e 1689 goto setup_rx_desc_die;
1da177e4 1690 } else {
2648345f 1691 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1692 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1693 }
1694 }
1695 memset(rxdr->desc, 0, rxdr->size);
1696
1697 rxdr->next_to_clean = 0;
1698 rxdr->next_to_use = 0;
1699
1700 return 0;
1701}
1702
581d708e
MC		 1703/**
1704 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1705 * (Descriptors) for all queues
1706 * @adapter: board private structure
1707 *
581d708e
MC		 1708 * Return 0 on success, negative on failure
1709 **/
1710
1711int
1712e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1713{
1714 int i, err = 0;
1715
f56799ea 1716 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1717 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1718 if (err) {
1719 DPRINTK(PROBE, ERR,
1720 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1721 for (i-- ; i >= 0; i--)
1722 e1000_free_rx_resources(adapter,
1723 &adapter->rx_ring[i]);
581d708e
MC		 1724 break;
1725 }
1726 }
1727
1728 return err;
1729}
1730
1da177e4 1731/**
2648345f 1732 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1733 * @adapter: Board private structure
1734 **/
e4c811c9
MC		 1735#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1736 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1737static void
1738e1000_setup_rctl(struct e1000_adapter *adapter)
1739{
2d7edb92
MC		 1740 uint32_t rctl, rfctl;
1741 uint32_t psrctl = 0;
35ec56bb 1742#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1743 uint32_t pages = 0;
1744#endif
1da177e4
LT		 1745
1746 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1747
1748 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1749
1750 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1751 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1752 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1753
0fadb059 1754 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1755 rctl |= E1000_RCTL_SBP;
1756 else
1757 rctl &= ~E1000_RCTL_SBP;
1758
2d7edb92
MC		 1759 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1760 rctl &= ~E1000_RCTL_LPE;
1761 else
1762 rctl |= E1000_RCTL_LPE;
1763
1da177e4 1764 /* Setup buffer sizes */
9e2feace
AK		 1765 rctl &= ~E1000_RCTL_SZ_4096;
1766 rctl |= E1000_RCTL_BSEX;
1767 switch (adapter->rx_buffer_len) {
1768 case E1000_RXBUFFER_256:
1769 rctl |= E1000_RCTL_SZ_256;
1770 rctl &= ~E1000_RCTL_BSEX;
1771 break;
1772 case E1000_RXBUFFER_512:
1773 rctl |= E1000_RCTL_SZ_512;
1774 rctl &= ~E1000_RCTL_BSEX;
1775 break;
1776 case E1000_RXBUFFER_1024:
1777 rctl |= E1000_RCTL_SZ_1024;
1778 rctl &= ~E1000_RCTL_BSEX;
1779 break;
a1415ee6
JK		 1780 case E1000_RXBUFFER_2048:
1781 default:
1782 rctl |= E1000_RCTL_SZ_2048;
1783 rctl &= ~E1000_RCTL_BSEX;
1784 break;
1785 case E1000_RXBUFFER_4096:
1786 rctl |= E1000_RCTL_SZ_4096;
1787 break;
1788 case E1000_RXBUFFER_8192:
1789 rctl |= E1000_RCTL_SZ_8192;
1790 break;
1791 case E1000_RXBUFFER_16384:
1792 rctl |= E1000_RCTL_SZ_16384;
1793 break;
2d7edb92
MC		 1794 }
1795
35ec56bb 1796#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1797 /* 82571 and greater support packet-split where the protocol
1798 * header is placed in skb->data and the packet data is
1799 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1800 * In the case of a non-split, skb->data is linearly filled,
1801 * followed by the page buffers. Therefore, skb->data is
1802 * sized to hold the largest protocol header.
1803 */
e64d7d02
JB		 1804 /* allocations using alloc_page take too long for regular MTU
1805 * so only enable packet split for jumbo frames */
e4c811c9 1806 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
e64d7d02
JB		 1807 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1808 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
e4c811c9
MC		 1809 adapter->rx_ps_pages = pages;
1810 else
1811 adapter->rx_ps_pages = 0;
2d7edb92 1812#endif
e4c811c9 1813 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1814 /* Configure extra packet-split registers */
1815 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1816 rfctl |= E1000_RFCTL_EXTEN;
87ca4e5b
AK		 1817 /* disable packet split support for IPv6 extension headers,
1818 * because some malformed IPv6 headers can hang the RX */
1819 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1820 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1821
2d7edb92
MC		 1822 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1823
7dfee0cb 1824 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1825
2d7edb92
MC		 1826 psrctl |= adapter->rx_ps_bsize0 >>
1827 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1828
1829 switch (adapter->rx_ps_pages) {
1830 case 3:
1831 psrctl |= PAGE_SIZE <<
1832 E1000_PSRCTL_BSIZE3_SHIFT;
1833 case 2:
1834 psrctl |= PAGE_SIZE <<
1835 E1000_PSRCTL_BSIZE2_SHIFT;
1836 case 1:
1837 psrctl |= PAGE_SIZE >>
1838 E1000_PSRCTL_BSIZE1_SHIFT;
1839 break;
1840 }
2d7edb92
MC		 1841
1842 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1843 }
1844
1845 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1846}
1847
1848/**
1849 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1850 * @adapter: board private structure
1851 *
1852 * Configure the Rx unit of the MAC after a reset.
1853 **/
1854
1855static void
1856e1000_configure_rx(struct e1000_adapter *adapter)
1857{
581d708e
MC		 1858 uint64_t rdba;
1859 struct e1000_hw *hw = &adapter->hw;
1860 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1861
e4c811c9 1862 if (adapter->rx_ps_pages) {
0f15a8fa 1863 /* this is a 32 byte descriptor */
581d708e 1864 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1865 sizeof(union e1000_rx_desc_packet_split);
1866 adapter->clean_rx = e1000_clean_rx_irq_ps;
1867 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1868 } else {
581d708e
MC		 1869 rdlen = adapter->rx_ring[0].count *
1870 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1871 adapter->clean_rx = e1000_clean_rx_irq;
1872 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1873 }
1da177e4
LT		 1874
1875 /* disable receives while setting up the descriptors */
581d708e
MC		 1876 rctl = E1000_READ_REG(hw, RCTL);
1877 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1878
1879 /* set the Receive Delay Timer Register */
581d708e 1880 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1881
581d708e
MC		 1882 if (hw->mac_type >= e1000_82540) {
1883 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1884 if (adapter->itr > 1)
581d708e 1885 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1886 1000000000 / (adapter->itr * 256));
1887 }
1888
2ae76d98 1889 if (hw->mac_type >= e1000_82571) {
2ae76d98 1890 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1891 /* Reset delay timers after every interrupt */
6fc7a7ec 1892 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1893#ifdef CONFIG_E1000_NAPI
1894 /* Auto-Mask interrupts upon ICR read. */
1895 ctrl_ext |= E1000_CTRL_EXT_IAME;
1896#endif
2ae76d98 1897 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1898 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1899 E1000_WRITE_FLUSH(hw);
1900 }
1901
581d708e
MC		 1902 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1903 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1904 switch (adapter->num_rx_queues) {
24025e4e
MC		 1905 case 1:
1906 default:
581d708e 1907 rdba = adapter->rx_ring[0].dma;
581d708e 1908 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1909 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1910 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1911 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1912 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 1913 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1914 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1915 break;
24025e4e
MC		 1916 }
1917
1da177e4 1918 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1919 if (hw->mac_type >= e1000_82543) {
1920 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1921 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1922 rxcsum |= E1000_RXCSUM_TUOFL;
1923
868d5309 1924 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1925 * Must be used in conjunction with packet-split. */
96838a40
JB		 1926 if ((hw->mac_type >= e1000_82571) &&
1927 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1928 rxcsum |= E1000_RXCSUM_IPPCSE;
1929 }
1930 } else {
1931 rxcsum &= ~E1000_RXCSUM_TUOFL;
1932 /* don't need to clear IPPCSE as it defaults to 0 */
1933 }
581d708e 1934 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1935 }
1936
21c4d5e0
AK		 1937 /* enable early receives on 82573, only takes effect if using > 2048
1938 * byte total frame size. for example only for jumbo frames */
1939#define E1000_ERT_2048 0x100
1940 if (hw->mac_type == e1000_82573)
1941 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
1942
1da177e4 1943 /* Enable Receives */
581d708e 1944 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1945}
1946
1947/**
581d708e 1948 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1949 * @adapter: board private structure
581d708e 1950 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1951 *
1952 * Free all transmit software resources
1953 **/
1954
3ad2cc67 1955static void
581d708e
MC		 1956e1000_free_tx_resources(struct e1000_adapter *adapter,
1957 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1958{
1959 struct pci_dev *pdev = adapter->pdev;
1960
581d708e 1961 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1962
581d708e
MC		 1963 vfree(tx_ring->buffer_info);
1964 tx_ring->buffer_info = NULL;
1da177e4 1965
581d708e 1966 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1967
581d708e
MC		 1968 tx_ring->desc = NULL;
1969}
1970
1971/**
1972 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1973 * @adapter: board private structure
1974 *
1975 * Free all transmit software resources
1976 **/
1977
1978void
1979e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1980{
1981 int i;
1982
f56799ea 1983 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1984 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1985}
1986
e619d523 1987static void
1da177e4
LT		 1988e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1989 struct e1000_buffer *buffer_info)
1990{
96838a40 1991 if (buffer_info->dma) {
2648345f
MC		 1992 pci_unmap_page(adapter->pdev,
1993 buffer_info->dma,
1994 buffer_info->length,
1995 PCI_DMA_TODEVICE);
1da177e4 1996 }
8241e35e 1997 if (buffer_info->skb)
1da177e4 1998 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1999 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 2000}
2001
2002/**
2003 * e1000_clean_tx_ring - Free Tx Buffers
2004 * @adapter: board private structure
581d708e 2005 * @tx_ring: ring to be cleaned
1da177e4
LT		 2006 **/
2007
2008static void
581d708e
MC		 2009e1000_clean_tx_ring(struct e1000_adapter *adapter,
2010 struct e1000_tx_ring *tx_ring)
1da177e4 2011{
1da177e4
LT		 2012 struct e1000_buffer *buffer_info;
2013 unsigned long size;
2014 unsigned int i;
2015
2016 /* Free all the Tx ring sk_buffs */
2017
96838a40 2018 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2019 buffer_info = &tx_ring->buffer_info[i];
2020 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2021 }
2022
2023 size = sizeof(struct e1000_buffer) * tx_ring->count;
2024 memset(tx_ring->buffer_info, 0, size);
2025
2026 /* Zero out the descriptor ring */
2027
2028 memset(tx_ring->desc, 0, tx_ring->size);
2029
2030 tx_ring->next_to_use = 0;
2031 tx_ring->next_to_clean = 0;
fd803241 2032 tx_ring->last_tx_tso = 0;
1da177e4 2033
581d708e
MC		 2034 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2035 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2036}
2037
2038/**
2039 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2040 * @adapter: board private structure
2041 **/
2042
2043static void
2044e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2045{
2046 int i;
2047
f56799ea 2048 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2049 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2050}
2051
2052/**
2053 * e1000_free_rx_resources - Free Rx Resources
2054 * @adapter: board private structure
581d708e 2055 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2056 *
2057 * Free all receive software resources
2058 **/
2059
3ad2cc67 2060static void
581d708e
MC		 2061e1000_free_rx_resources(struct e1000_adapter *adapter,
2062 struct e1000_rx_ring *rx_ring)
1da177e4 2063{
1da177e4
LT		 2064 struct pci_dev *pdev = adapter->pdev;
2065
581d708e 2066 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2067
2068 vfree(rx_ring->buffer_info);
2069 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2070 kfree(rx_ring->ps_page);
2071 rx_ring->ps_page = NULL;
2072 kfree(rx_ring->ps_page_dma);
2073 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2074
2075 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2076
2077 rx_ring->desc = NULL;
2078}
2079
2080/**
581d708e 2081 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2082 * @adapter: board private structure
581d708e
MC		 2083 *
2084 * Free all receive software resources
2085 **/
2086
2087void
2088e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2089{
2090 int i;
2091
f56799ea 2092 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2093 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2094}
2095
2096/**
2097 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2098 * @adapter: board private structure
2099 * @rx_ring: ring to free buffers from
1da177e4
LT		 2100 **/
2101
2102static void
581d708e
MC		 2103e1000_clean_rx_ring(struct e1000_adapter *adapter,
2104 struct e1000_rx_ring *rx_ring)
1da177e4 2105{
1da177e4 2106 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2107 struct e1000_ps_page *ps_page;
2108 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2109 struct pci_dev *pdev = adapter->pdev;
2110 unsigned long size;
2d7edb92 2111 unsigned int i, j;
1da177e4
LT		 2112
2113 /* Free all the Rx ring sk_buffs */
96838a40 2114 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2115 buffer_info = &rx_ring->buffer_info[i];
96838a40 2116 if (buffer_info->skb) {
1da177e4
LT		 2117 pci_unmap_single(pdev,
2118 buffer_info->dma,
2119 buffer_info->length,
2120 PCI_DMA_FROMDEVICE);
2121
2122 dev_kfree_skb(buffer_info->skb);
2123 buffer_info->skb = NULL;
997f5cbd
JK		 2124 }
2125 ps_page = &rx_ring->ps_page[i];
2126 ps_page_dma = &rx_ring->ps_page_dma[i];
2127 for (j = 0; j < adapter->rx_ps_pages; j++) {
2128 if (!ps_page->ps_page[j]) break;
2129 pci_unmap_page(pdev,
2130 ps_page_dma->ps_page_dma[j],
2131 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2132 ps_page_dma->ps_page_dma[j] = 0;
2133 put_page(ps_page->ps_page[j]);
2134 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2135 }
2136 }
2137
2138 size = sizeof(struct e1000_buffer) * rx_ring->count;
2139 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2140 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2141 memset(rx_ring->ps_page, 0, size);
2142 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2143 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2144
2145 /* Zero out the descriptor ring */
2146
2147 memset(rx_ring->desc, 0, rx_ring->size);
2148
2149 rx_ring->next_to_clean = 0;
2150 rx_ring->next_to_use = 0;
2151
581d708e
MC		 2152 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2153 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2154}
2155
2156/**
2157 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2158 * @adapter: board private structure
2159 **/
2160
2161static void
2162e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2163{
2164 int i;
2165
f56799ea 2166 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2167 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2168}
2169
2170/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2171 * and memory write and invalidate disabled for certain operations
2172 */
2173static void
2174e1000_enter_82542_rst(struct e1000_adapter *adapter)
2175{
2176 struct net_device *netdev = adapter->netdev;
2177 uint32_t rctl;
2178
2179 e1000_pci_clear_mwi(&adapter->hw);
2180
2181 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2182 rctl |= E1000_RCTL_RST;
2183 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2184 E1000_WRITE_FLUSH(&adapter->hw);
2185 mdelay(5);
2186
96838a40 2187 if (netif_running(netdev))
581d708e 2188 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2189}
2190
2191static void
2192e1000_leave_82542_rst(struct e1000_adapter *adapter)
2193{
2194 struct net_device *netdev = adapter->netdev;
2195 uint32_t rctl;
2196
2197 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2198 rctl &= ~E1000_RCTL_RST;
2199 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2200 E1000_WRITE_FLUSH(&adapter->hw);
2201 mdelay(5);
2202
96838a40 2203 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2204 e1000_pci_set_mwi(&adapter->hw);
2205
96838a40 2206 if (netif_running(netdev)) {
72d64a43
JK		 2207 /* No need to loop, because 82542 supports only 1 queue */
2208 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2209 e1000_configure_rx(adapter);
72d64a43 2210 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2211 }
2212}
2213
2214/**
2215 * e1000_set_mac - Change the Ethernet Address of the NIC
2216 * @netdev: network interface device structure
2217 * @p: pointer to an address structure
2218 *
2219 * Returns 0 on success, negative on failure
2220 **/
2221
2222static int
2223e1000_set_mac(struct net_device *netdev, void *p)
2224{
60490fe0 2225 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2226 struct sockaddr *addr = p;
2227
96838a40 2228 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2229 return -EADDRNOTAVAIL;
2230
2231 /* 82542 2.0 needs to be in reset to write receive address registers */
2232
96838a40 2233 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2234 e1000_enter_82542_rst(adapter);
2235
2236 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2237 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2238
2239 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2240
868d5309
MC		 2241 /* With 82571 controllers, LAA may be overwritten (with the default)
2242 * due to controller reset from the other port. */
2243 if (adapter->hw.mac_type == e1000_82571) {
2244 /* activate the work around */
2245 adapter->hw.laa_is_present = 1;
2246
96838a40
JB		 2247 /* Hold a copy of the LAA in RAR[14] This is done so that
2248 * between the time RAR[0] gets clobbered and the time it
2249 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2250 * of the RARs and no incoming packets directed to this port
96838a40 2251 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2252 * RAR[14] */
96838a40 2253 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2254 E1000_RAR_ENTRIES - 1);
2255 }
2256
96838a40 2257 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2258 e1000_leave_82542_rst(adapter);
2259
2260 return 0;
2261}
2262
2263/**
2264 * e1000_set_multi - Multicast and Promiscuous mode set
2265 * @netdev: network interface device structure
2266 *
2267 * The set_multi entry point is called whenever the multicast address
2268 * list or the network interface flags are updated. This routine is
2269 * responsible for configuring the hardware for proper multicast,
2270 * promiscuous mode, and all-multi behavior.
2271 **/
2272
2273static void
2274e1000_set_multi(struct net_device *netdev)
2275{
60490fe0 2276 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2277 struct e1000_hw *hw = &adapter->hw;
2278 struct dev_mc_list *mc_ptr;
2279 uint32_t rctl;
2280 uint32_t hash_value;
868d5309 2281 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2282 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2283 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2284 E1000_NUM_MTA_REGISTERS;
2285
2286 if (adapter->hw.mac_type == e1000_ich8lan)
2287 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2288
868d5309
MC		 2289 /* reserve RAR[14] for LAA over-write work-around */
2290 if (adapter->hw.mac_type == e1000_82571)
2291 rar_entries--;
1da177e4 2292
2648345f
MC		 2293 /* Check for Promiscuous and All Multicast modes */
2294
1da177e4
LT		 2295 rctl = E1000_READ_REG(hw, RCTL);
2296
96838a40 2297 if (netdev->flags & IFF_PROMISC) {
1da177e4 2298 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2299 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2300 rctl |= E1000_RCTL_MPE;
2301 rctl &= ~E1000_RCTL_UPE;
2302 } else {
2303 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2304 }
2305
2306 E1000_WRITE_REG(hw, RCTL, rctl);
2307
2308 /* 82542 2.0 needs to be in reset to write receive address registers */
2309
96838a40 2310 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2311 e1000_enter_82542_rst(adapter);
2312
2313 /* load the first 14 multicast address into the exact filters 1-14
2314 * RAR 0 is used for the station MAC adddress
2315 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2316 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2317 */
2318 mc_ptr = netdev->mc_list;
2319
96838a40 2320 for (i = 1; i < rar_entries; i++) {
868d5309 2321 if (mc_ptr) {
1da177e4
LT		 2322 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2323 mc_ptr = mc_ptr->next;
2324 } else {
2325 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2326 E1000_WRITE_FLUSH(hw);
1da177e4 2327 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2328 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2329 }
2330 }
2331
2332 /* clear the old settings from the multicast hash table */
2333
cd94dd0b 2334 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2335 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2336 E1000_WRITE_FLUSH(hw);
2337 }
1da177e4
LT		 2338
2339 /* load any remaining addresses into the hash table */
2340
96838a40 2341 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2342 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2343 e1000_mta_set(hw, hash_value);
2344 }
2345
96838a40 2346 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2347 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2348}
2349
2350/* Need to wait a few seconds after link up to get diagnostic information from
2351 * the phy */
2352
2353static void
2354e1000_update_phy_info(unsigned long data)
2355{
2356 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2357 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2358}
2359
2360/**
2361 * e1000_82547_tx_fifo_stall - Timer Call-back
2362 * @data: pointer to adapter cast into an unsigned long
2363 **/
2364
2365static void
2366e1000_82547_tx_fifo_stall(unsigned long data)
2367{
2368 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2369 struct net_device *netdev = adapter->netdev;
2370 uint32_t tctl;
2371
96838a40
JB		 2372 if (atomic_read(&adapter->tx_fifo_stall)) {
2373 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2374 E1000_READ_REG(&adapter->hw, TDH)) &&
2375 (E1000_READ_REG(&adapter->hw, TDFT) ==
2376 E1000_READ_REG(&adapter->hw, TDFH)) &&
2377 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2378 E1000_READ_REG(&adapter->hw, TDFHS))) {
2379 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2380 E1000_WRITE_REG(&adapter->hw, TCTL,
2381 tctl & ~E1000_TCTL_EN);
2382 E1000_WRITE_REG(&adapter->hw, TDFT,
2383 adapter->tx_head_addr);
2384 E1000_WRITE_REG(&adapter->hw, TDFH,
2385 adapter->tx_head_addr);
2386 E1000_WRITE_REG(&adapter->hw, TDFTS,
2387 adapter->tx_head_addr);
2388 E1000_WRITE_REG(&adapter->hw, TDFHS,
2389 adapter->tx_head_addr);
2390 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2391 E1000_WRITE_FLUSH(&adapter->hw);
2392
2393 adapter->tx_fifo_head = 0;
2394 atomic_set(&adapter->tx_fifo_stall, 0);
2395 netif_wake_queue(netdev);
2396 } else {
2397 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2398 }
2399 }
2400}
2401
2402/**
2403 * e1000_watchdog - Timer Call-back
2404 * @data: pointer to adapter cast into an unsigned long
2405 **/
2406static void
2407e1000_watchdog(unsigned long data)
2408{
2409 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2410 struct net_device *netdev = adapter->netdev;
545c67c0 2411 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2412 uint32_t link, tctl;
cd94dd0b
AK		 2413 int32_t ret_val;
2414
2415 ret_val = e1000_check_for_link(&adapter->hw);
2416 if ((ret_val == E1000_ERR_PHY) &&
2417 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2418 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2419 /* See e1000_kumeran_lock_loss_workaround() */
2420 DPRINTK(LINK, INFO,
2421 "Gigabit has been disabled, downgrading speed\n");
2422 }
90fb5135 2423
2d7edb92
MC		 2424 if (adapter->hw.mac_type == e1000_82573) {
2425 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2426 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2427 e1000_update_mng_vlan(adapter);
96838a40 2428 }
1da177e4 2429
96838a40 2430 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2431 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2432 link = !adapter->hw.serdes_link_down;
2433 else
2434 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2435
96838a40
JB		 2436 if (link) {
2437 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2438 boolean_t txb2b = 1;
1da177e4
LT		 2439 e1000_get_speed_and_duplex(&adapter->hw,
2440 &adapter->link_speed,
2441 &adapter->link_duplex);
2442
2443 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2444 adapter->link_speed,
2445 adapter->link_duplex == FULL_DUPLEX ?
2446 "Full Duplex" : "Half Duplex");
2447
7e6c9861
JK		 2448 /* tweak tx_queue_len according to speed/duplex
2449 * and adjust the timeout factor */
66a2b0a3
JK		 2450 netdev->tx_queue_len = adapter->tx_queue_len;
2451 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2452 switch (adapter->link_speed) {
2453 case SPEED_10:
fe7fe28e 2454 txb2b = 0;
7e6c9861
JK		 2455 netdev->tx_queue_len = 10;
2456 adapter->tx_timeout_factor = 8;
2457 break;
2458 case SPEED_100:
fe7fe28e 2459 txb2b = 0;
7e6c9861
JK		 2460 netdev->tx_queue_len = 100;
2461 /* maybe add some timeout factor ? */
2462 break;
2463 }
2464
fe7fe28e 2465 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2466 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2467 txb2b == 0) {
7e6c9861
JK		 2468 uint32_t tarc0;
2469 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
90fb5135 2470 tarc0 &= ~(1 << 21);
7e6c9861
JK		 2471 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2472 }
90fb5135 2473
7e6c9861
JK		 2474#ifdef NETIF_F_TSO
2475 /* disable TSO for pcie and 10/100 speeds, to avoid
2476 * some hardware issues */
2477 if (!adapter->tso_force &&
2478 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2479 switch (adapter->link_speed) {
2480 case SPEED_10:
66a2b0a3 2481 case SPEED_100:
7e6c9861
JK		 2482 DPRINTK(PROBE,INFO,
2483 "10/100 speed: disabling TSO\n");
2484 netdev->features &= ~NETIF_F_TSO;
87ca4e5b
AK		 2485#ifdef NETIF_F_TSO6
2486 netdev->features &= ~NETIF_F_TSO6;
2487#endif
7e6c9861
JK		 2488 break;
2489 case SPEED_1000:
2490 netdev->features |= NETIF_F_TSO;
87ca4e5b
AK		 2491#ifdef NETIF_F_TSO6
2492 netdev->features |= NETIF_F_TSO6;
2493#endif
7e6c9861
JK		 2494 break;
2495 default:
2496 /* oops */
66a2b0a3
JK		 2497 break;
2498 }
2499 }
7e6c9861
JK		 2500#endif
2501
2502 /* enable transmits in the hardware, need to do this
2503 * after setting TARC0 */
2504 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2505 tctl |= E1000_TCTL_EN;
2506 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2507
1da177e4
LT		 2508 netif_carrier_on(netdev);
2509 netif_wake_queue(netdev);
2510 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2511 adapter->smartspeed = 0;
2512 }
2513 } else {
96838a40 2514 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2515 adapter->link_speed = 0;
2516 adapter->link_duplex = 0;
2517 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2518 netif_carrier_off(netdev);
2519 netif_stop_queue(netdev);
2520 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2521
2522 /* 80003ES2LAN workaround--
2523 * For packet buffer work-around on link down event;
2524 * disable receives in the ISR and
2525 * reset device here in the watchdog
2526 */
8fc897b0 2527 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2528 /* reset device */
2529 schedule_work(&adapter->reset_task);
1da177e4
LT		 2530 }
2531
2532 e1000_smartspeed(adapter);
2533 }
2534
2535 e1000_update_stats(adapter);
2536
2537 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2538 adapter->tpt_old = adapter->stats.tpt;
2539 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2540 adapter->colc_old = adapter->stats.colc;
2541
2542 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2543 adapter->gorcl_old = adapter->stats.gorcl;
2544 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2545 adapter->gotcl_old = adapter->stats.gotcl;
2546
2547 e1000_update_adaptive(&adapter->hw);
2548
f56799ea 2549 if (!netif_carrier_ok(netdev)) {
581d708e 2550 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2551 /* We've lost link, so the controller stops DMA,
2552 * but we've got queued Tx work that's never going
2553 * to get done, so reset controller to flush Tx.
2554 * (Do the reset outside of interrupt context). */
87041639
JK		 2555 adapter->tx_timeout_count++;
2556 schedule_work(&adapter->reset_task);
1da177e4
LT		 2557 }
2558 }
2559
2560 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2561 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2562 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2563 * asymmetrical Tx or Rx gets ITR=8000; everyone
2564 * else is between 2000-8000. */
2565 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2566 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2567 adapter->gotcl - adapter->gorcl :
2568 adapter->gorcl - adapter->gotcl) / 10000;
2569 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2570 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2571 }
2572
2573 /* Cause software interrupt to ensure rx ring is cleaned */
2574 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2575
2648345f 2576 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2577 adapter->detect_tx_hung = TRUE;
2578
96838a40 2579 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2580 * reset from the other port. Set the appropriate LAA in RAR[0] */
2581 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2582 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2583
1da177e4
LT		 2584 /* Reset the timer */
2585 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2586}
2587
2588#define E1000_TX_FLAGS_CSUM 0x00000001
2589#define E1000_TX_FLAGS_VLAN 0x00000002
2590#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2591#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2592#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2593#define E1000_TX_FLAGS_VLAN_SHIFT 16
2594
e619d523 2595static int
581d708e
MC		 2596e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2597 struct sk_buff *skb)
1da177e4
LT		 2598{
2599#ifdef NETIF_F_TSO
2600 struct e1000_context_desc *context_desc;
545c67c0 2601 struct e1000_buffer *buffer_info;
1da177e4
LT		 2602 unsigned int i;
2603 uint32_t cmd_length = 0;
2d7edb92 2604 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2605 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2606 int err;
2607
89114afd 2608 if (skb_is_gso(skb)) {
1da177e4
LT		 2609 if (skb_header_cloned(skb)) {
2610 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2611 if (err)
2612 return err;
2613 }
2614
2615 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 2616 mss = skb_shinfo(skb)->gso_size;
60828236 2617 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2618 skb->nh.iph->tot_len = 0;
2619 skb->nh.iph->check = 0;
2620 skb->h.th->check =
2621 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2622 skb->nh.iph->daddr,
2623 0,
2624 IPPROTO_TCP,
2625 0);
2626 cmd_length = E1000_TXD_CMD_IP;
2627 ipcse = skb->h.raw - skb->data - 1;
87ca4e5b 2628#ifdef NETIF_F_TSO6
e15fdd03 2629 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2d7edb92
MC		 2630 skb->nh.ipv6h->payload_len = 0;
2631 skb->h.th->check =
2632 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2633 &skb->nh.ipv6h->daddr,
2634 0,
2635 IPPROTO_TCP,
2636 0);
2637 ipcse = 0;
2638#endif
2639 }
1da177e4
LT		 2640 ipcss = skb->nh.raw - skb->data;
2641 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2642 tucss = skb->h.raw - skb->data;
2643 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2644 tucse = 0;
2645
2646 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2647 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2648
581d708e
MC		 2649 i = tx_ring->next_to_use;
2650 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2651 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2652
2653 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2654 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2655 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2656 context_desc->upper_setup.tcp_fields.tucss = tucss;
2657 context_desc->upper_setup.tcp_fields.tucso = tucso;
2658 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2659 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2660 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2661 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2662
545c67c0
JK		 2663 buffer_info->time_stamp = jiffies;
2664
581d708e
MC		 2665 if (++i == tx_ring->count) i = 0;
2666 tx_ring->next_to_use = i;
1da177e4 2667
8241e35e 2668 return TRUE;
1da177e4
LT		 2669 }
2670#endif
2671
8241e35e 2672 return FALSE;
1da177e4
LT		 2673}
2674
e619d523 2675static boolean_t
581d708e
MC		 2676e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2677 struct sk_buff *skb)
1da177e4
LT		 2678{
2679 struct e1000_context_desc *context_desc;
545c67c0 2680 struct e1000_buffer *buffer_info;
1da177e4
LT		 2681 unsigned int i;
2682 uint8_t css;
2683
84fa7933 2684 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1da177e4
LT		 2685 css = skb->h.raw - skb->data;
2686
581d708e 2687 i = tx_ring->next_to_use;
545c67c0 2688 buffer_info = &tx_ring->buffer_info[i];
581d708e 2689 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2690
2691 context_desc->upper_setup.tcp_fields.tucss = css;
2692 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2693 context_desc->upper_setup.tcp_fields.tucse = 0;
2694 context_desc->tcp_seg_setup.data = 0;
2695 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2696
545c67c0
JK		 2697 buffer_info->time_stamp = jiffies;
2698
581d708e
MC		 2699 if (unlikely(++i == tx_ring->count)) i = 0;
2700 tx_ring->next_to_use = i;
1da177e4
LT		 2701
2702 return TRUE;
2703 }
2704
2705 return FALSE;
2706}
2707
2708#define E1000_MAX_TXD_PWR 12
2709#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2710
e619d523 2711static int
581d708e
MC		 2712e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2713 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2714 unsigned int nr_frags, unsigned int mss)
1da177e4 2715{
1da177e4
LT		 2716 struct e1000_buffer *buffer_info;
2717 unsigned int len = skb->len;
2718 unsigned int offset = 0, size, count = 0, i;
2719 unsigned int f;
2720 len -= skb->data_len;
2721
2722 i = tx_ring->next_to_use;
2723
96838a40 2724 while (len) {
1da177e4
LT		 2725 buffer_info = &tx_ring->buffer_info[i];
2726 size = min(len, max_per_txd);
2727#ifdef NETIF_F_TSO
fd803241
JK		 2728 /* Workaround for Controller erratum --
2729 * descriptor for non-tso packet in a linear SKB that follows a
2730 * tso gets written back prematurely before the data is fully
0f15a8fa 2731 * DMA'd to the controller */
fd803241 2732 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2733 !skb_is_gso(skb)) {
fd803241
JK		 2734 tx_ring->last_tx_tso = 0;
2735 size -= 4;
2736 }
2737
1da177e4
LT		 2738 /* Workaround for premature desc write-backs
2739 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2740 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2741 size -= 4;
2742#endif
97338bde
MC		 2743 /* work-around for errata 10 and it applies
2744 * to all controllers in PCI-X mode
2745 * The fix is to make sure that the first descriptor of a
2746 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2747 */
96838a40 2748 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2749 (size > 2015) && count == 0))
2750 size = 2015;
96838a40 2751
1da177e4
LT		 2752 /* Workaround for potential 82544 hang in PCI-X. Avoid
2753 * terminating buffers within evenly-aligned dwords. */
96838a40 2754 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2755 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2756 size > 4))
2757 size -= 4;
2758
2759 buffer_info->length = size;
2760 buffer_info->dma =
2761 pci_map_single(adapter->pdev,
2762 skb->data + offset,
2763 size,
2764 PCI_DMA_TODEVICE);
2765 buffer_info->time_stamp = jiffies;
2766
2767 len -= size;
2768 offset += size;
2769 count++;
96838a40 2770 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2771 }
2772
96838a40 2773 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2774 struct skb_frag_struct *frag;
2775
2776 frag = &skb_shinfo(skb)->frags[f];
2777 len = frag->size;
2778 offset = frag->page_offset;
2779
96838a40 2780 while (len) {
1da177e4
LT		 2781 buffer_info = &tx_ring->buffer_info[i];
2782 size = min(len, max_per_txd);
2783#ifdef NETIF_F_TSO
2784 /* Workaround for premature desc write-backs
2785 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2786 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2787 size -= 4;
2788#endif
2789 /* Workaround for potential 82544 hang in PCI-X.
2790 * Avoid terminating buffers within evenly-aligned
2791 * dwords. */
96838a40 2792 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2793 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2794 size > 4))
2795 size -= 4;
2796
2797 buffer_info->length = size;
2798 buffer_info->dma =
2799 pci_map_page(adapter->pdev,
2800 frag->page,
2801 offset,
2802 size,
2803 PCI_DMA_TODEVICE);
2804 buffer_info->time_stamp = jiffies;
2805
2806 len -= size;
2807 offset += size;
2808 count++;
96838a40 2809 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2810 }
2811 }
2812
2813 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2814 tx_ring->buffer_info[i].skb = skb;
2815 tx_ring->buffer_info[first].next_to_watch = i;
2816
2817 return count;
2818}
2819
e619d523 2820static void
581d708e
MC		 2821e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2822 int tx_flags, int count)
1da177e4 2823{
1da177e4
LT		 2824 struct e1000_tx_desc *tx_desc = NULL;
2825 struct e1000_buffer *buffer_info;
2826 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2827 unsigned int i;
2828
96838a40 2829 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2830 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2831 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2832 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2833
96838a40 2834 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2835 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2836 }
2837
96838a40 2838 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2839 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2840 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2841 }
2842
96838a40 2843 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2844 txd_lower |= E1000_TXD_CMD_VLE;
2845 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2846 }
2847
2848 i = tx_ring->next_to_use;
2849
96838a40 2850 while (count--) {
1da177e4
LT		 2851 buffer_info = &tx_ring->buffer_info[i];
2852 tx_desc = E1000_TX_DESC(*tx_ring, i);
2853 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2854 tx_desc->lower.data =
2855 cpu_to_le32(txd_lower | buffer_info->length);
2856 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2857 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2858 }
2859
2860 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2861
2862 /* Force memory writes to complete before letting h/w
2863 * know there are new descriptors to fetch. (Only
2864 * applicable for weak-ordered memory model archs,
2865 * such as IA-64). */
2866 wmb();
2867
2868 tx_ring->next_to_use = i;
581d708e 2869 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2ce9047f
JB		 2870 /* we need this if more than one processor can write to our tail
2871 * at a time, it syncronizes IO on IA64/Altix systems */
2872 mmiowb();
1da177e4
LT		 2873}
2874
2875/**
2876 * 82547 workaround to avoid controller hang in half-duplex environment.
2877 * The workaround is to avoid queuing a large packet that would span
2878 * the internal Tx FIFO ring boundary by notifying the stack to resend
2879 * the packet at a later time. This gives the Tx FIFO an opportunity to
2880 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2881 * to the beginning of the Tx FIFO.
2882 **/
2883
2884#define E1000_FIFO_HDR 0x10
2885#define E1000_82547_PAD_LEN 0x3E0
2886
e619d523 2887static int
1da177e4
LT		 2888e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2889{
2890 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2891 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2892
2893 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2894
96838a40 2895 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2896 goto no_fifo_stall_required;
2897
96838a40 2898 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2899 return 1;
2900
96838a40 2901 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2902 atomic_set(&adapter->tx_fifo_stall, 1);
2903 return 1;
2904 }
2905
2906no_fifo_stall_required:
2907 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2908 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2909 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2910 return 0;
2911}
2912
2d7edb92 2913#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2914static int
2d7edb92
MC		 2915e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2916{
2917 struct e1000_hw *hw = &adapter->hw;
2918 uint16_t length, offset;
96838a40
JB		 2919 if (vlan_tx_tag_present(skb)) {
2920 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2921 ( adapter->hw.mng_cookie.status &
2922 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2923 return 0;
2924 }
20a44028 2925 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2926 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2927 if ((htons(ETH_P_IP) == eth->h_proto)) {
2928 const struct iphdr *ip =
2d7edb92 2929 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2930 if (IPPROTO_UDP == ip->protocol) {
2931 struct udphdr *udp =
2932 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2933 (ip->ihl << 2));
96838a40 2934 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2935 offset = (uint8_t *)udp + 8 - skb->data;
2936 length = skb->len - offset;
2937
2938 return e1000_mng_write_dhcp_info(hw,
96838a40 2939 (uint8_t *)udp + 8,
2d7edb92
MC		 2940 length);
2941 }
2942 }
2943 }
2944 }
2945 return 0;
2946}
2947
65c7973f
JB		 2948static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2949{
2950 struct e1000_adapter *adapter = netdev_priv(netdev);
2951 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2952
2953 netif_stop_queue(netdev);
2954 /* Herbert's original patch had:
2955 * smp_mb__after_netif_stop_queue();
2956 * but since that doesn't exist yet, just open code it. */
2957 smp_mb();
2958
2959 /* We need to check again in a case another CPU has just
2960 * made room available. */
2961 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2962 return -EBUSY;
2963
2964 /* A reprieve! */
2965 netif_start_queue(netdev);
2966 return 0;
2967}
2968
2969static int e1000_maybe_stop_tx(struct net_device *netdev,
2970 struct e1000_tx_ring *tx_ring, int size)
2971{
2972 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2973 return 0;
2974 return __e1000_maybe_stop_tx(netdev, size);
2975}
2976
1da177e4
LT		 2977#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2978static int
2979e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2980{
60490fe0 2981 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2982 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2983 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2984 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2985 unsigned int tx_flags = 0;
2986 unsigned int len = skb->len;
2987 unsigned long flags;
2988 unsigned int nr_frags = 0;
2989 unsigned int mss = 0;
2990 int count = 0;
76c224bc 2991 int tso;
1da177e4
LT		 2992 unsigned int f;
2993 len -= skb->data_len;
2994
65c7973f
JB		 2995 /* This goes back to the question of how to logically map a tx queue
2996 * to a flow. Right now, performance is impacted slightly negatively
2997 * if using multiple tx queues. If the stack breaks away from a
2998 * single qdisc implementation, we can look at this again. */
581d708e 2999 tx_ring = adapter->tx_ring;
24025e4e 3000
581d708e 3001 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3002 dev_kfree_skb_any(skb);
3003 return NETDEV_TX_OK;
3004 }
3005
032fe6e9
JB		 3006 /* 82571 and newer doesn't need the workaround that limited descriptor
3007 * length to 4kB */
3008 if (adapter->hw.mac_type >= e1000_82571)
3009 max_per_txd = 8192;
3010
1da177e4 3011#ifdef NETIF_F_TSO
7967168c 3012 mss = skb_shinfo(skb)->gso_size;
76c224bc 3013 /* The controller does a simple calculation to
1da177e4
LT		 3014 * make sure there is enough room in the FIFO before
3015 * initiating the DMA for each buffer. The calc is:
3016 * 4 = ceil(buffer len/mss). To make sure we don't
3017 * overrun the FIFO, adjust the max buffer len if mss
3018 * drops. */
96838a40 3019 if (mss) {
9a3056da 3020 uint8_t hdr_len;
1da177e4
LT		 3021 max_per_txd = min(mss << 2, max_per_txd);
3022 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3023
90fb5135
AK		 3024 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3025 * points to just header, pull a few bytes of payload from
3026 * frags into skb->data */
9a3056da 3027 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 3028 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3029 switch (adapter->hw.mac_type) {
3030 unsigned int pull_size;
3031 case e1000_82571:
3032 case e1000_82572:
3033 case e1000_82573:
cd94dd0b 3034 case e1000_ich8lan:
9f687888
JK		 3035 pull_size = min((unsigned int)4, skb->data_len);
3036 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3037 DPRINTK(DRV, ERR,
9f687888
JK		 3038 "__pskb_pull_tail failed.\n");
3039 dev_kfree_skb_any(skb);
749dfc70 3040 return NETDEV_TX_OK;
9f687888
JK		 3041 }
3042 len = skb->len - skb->data_len;
3043 break;
3044 default:
3045 /* do nothing */
3046 break;
d74bbd3b 3047 }
9a3056da 3048 }
1da177e4
LT		 3049 }
3050
9a3056da 3051 /* reserve a descriptor for the offload context */
84fa7933 3052 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3053 count++;
2648345f 3054 count++;
1da177e4 3055#else
84fa7933 3056 if (skb->ip_summed == CHECKSUM_PARTIAL)
1da177e4
LT		 3057 count++;
3058#endif
fd803241
JK		 3059
3060#ifdef NETIF_F_TSO
3061 /* Controller Erratum workaround */
89114afd 3062 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241
JK		 3063 count++;
3064#endif
3065
1da177e4
LT		 3066 count += TXD_USE_COUNT(len, max_txd_pwr);
3067
96838a40 3068 if (adapter->pcix_82544)
1da177e4
LT		 3069 count++;
3070
96838a40 3071 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3072 * in PCI-X mode, so add one more descriptor to the count
3073 */
96838a40 3074 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3075 (len > 2015)))
3076 count++;
3077
1da177e4 3078 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3079 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3080 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3081 max_txd_pwr);
96838a40 3082 if (adapter->pcix_82544)
1da177e4
LT		 3083 count += nr_frags;
3084
0f15a8fa
JK		 3085
3086 if (adapter->hw.tx_pkt_filtering &&
3087 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 3088 e1000_transfer_dhcp_info(adapter, skb);
3089
581d708e
MC		 3090 local_irq_save(flags);
3091 if (!spin_trylock(&tx_ring->tx_lock)) {
3092 /* Collision - tell upper layer to requeue */
3093 local_irq_restore(flags);
3094 return NETDEV_TX_LOCKED;
3095 }
1da177e4
LT		 3096
3097 /* need: count + 2 desc gap to keep tail from touching
3098 * head, otherwise try next time */
65c7973f 3099 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3100 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3101 return NETDEV_TX_BUSY;
3102 }
3103
96838a40
JB		 3104 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3105 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3106 netif_stop_queue(netdev);
1314bbf3 3107 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3108 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3109 return NETDEV_TX_BUSY;
3110 }
3111 }
3112
96838a40 3113 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3114 tx_flags |= E1000_TX_FLAGS_VLAN;
3115 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3116 }
3117
581d708e 3118 first = tx_ring->next_to_use;
96838a40 3119
581d708e 3120 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3121 if (tso < 0) {
3122 dev_kfree_skb_any(skb);
581d708e 3123 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3124 return NETDEV_TX_OK;
3125 }
3126
fd803241
JK		 3127 if (likely(tso)) {
3128 tx_ring->last_tx_tso = 1;
1da177e4 3129 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3130 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3131 tx_flags |= E1000_TX_FLAGS_CSUM;
3132
2d7edb92 3133 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3134 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3135 * no longer assume, we must. */
60828236 3136 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3137 tx_flags |= E1000_TX_FLAGS_IPV4;
3138
581d708e
MC		 3139 e1000_tx_queue(adapter, tx_ring, tx_flags,
3140 e1000_tx_map(adapter, tx_ring, skb, first,
3141 max_per_txd, nr_frags, mss));
1da177e4
LT		 3142
3143 netdev->trans_start = jiffies;
3144
3145 /* Make sure there is space in the ring for the next send. */
65c7973f 3146 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3147
581d708e 3148 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3149 return NETDEV_TX_OK;
3150}
3151
3152/**
3153 * e1000_tx_timeout - Respond to a Tx Hang
3154 * @netdev: network interface device structure
3155 **/
3156
3157static void
3158e1000_tx_timeout(struct net_device *netdev)
3159{
60490fe0 3160 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3161
3162 /* Do the reset outside of interrupt context */
87041639
JK		 3163 adapter->tx_timeout_count++;
3164 schedule_work(&adapter->reset_task);
1da177e4
LT		 3165}
3166
3167static void
87041639 3168e1000_reset_task(struct net_device *netdev)
1da177e4 3169{
60490fe0 3170 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3171
2db10a08 3172 e1000_reinit_locked(adapter);
1da177e4
LT		 3173}
3174
3175/**
3176 * e1000_get_stats - Get System Network Statistics
3177 * @netdev: network interface device structure
3178 *
3179 * Returns the address of the device statistics structure.
3180 * The statistics are actually updated from the timer callback.
3181 **/
3182
3183static struct net_device_stats *
3184e1000_get_stats(struct net_device *netdev)
3185{
60490fe0 3186 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3187
6b7660cd 3188 /* only return the current stats */
1da177e4
LT		 3189 return &adapter->net_stats;
3190}
3191
3192/**
3193 * e1000_change_mtu - Change the Maximum Transfer Unit
3194 * @netdev: network interface device structure
3195 * @new_mtu: new value for maximum frame size
3196 *
3197 * Returns 0 on success, negative on failure
3198 **/
3199
3200static int
3201e1000_change_mtu(struct net_device *netdev, int new_mtu)
3202{
60490fe0 3203 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3204 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3205 uint16_t eeprom_data = 0;
1da177e4 3206
96838a40
JB		 3207 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3208 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3209 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3210 return -EINVAL;
2d7edb92 3211 }
1da177e4 3212
997f5cbd
JK		 3213 /* Adapter-specific max frame size limits. */
3214 switch (adapter->hw.mac_type) {
9e2feace 3215 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3216 case e1000_ich8lan:
997f5cbd
JK		 3217 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3218 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3219 return -EINVAL;
2d7edb92 3220 }
997f5cbd 3221 break;
85b22eb6 3222 case e1000_82573:
249d71d6
BA		 3223 /* Jumbo Frames not supported if:
3224 * - this is not an 82573L device
3225 * - ASPM is enabled in any way (0x1A bits 3:2) */
85b22eb6
JK		 3226 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3227 &eeprom_data);
249d71d6
BA		 3228 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3229 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3230 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3231 DPRINTK(PROBE, ERR,
3232 "Jumbo Frames not supported.\n");
3233 return -EINVAL;
3234 }
3235 break;
3236 }
249d71d6
BA		 3237 /* ERT will be enabled later to enable wire speed receives */
3238
85b22eb6 3239 /* fall through to get support */
997f5cbd
JK		 3240 case e1000_82571:
3241 case e1000_82572:
87041639 3242 case e1000_80003es2lan:
997f5cbd
JK		 3243#define MAX_STD_JUMBO_FRAME_SIZE 9234
3244 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3245 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3246 return -EINVAL;
3247 }
3248 break;
3249 default:
3250 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3251 break;
1da177e4
LT		 3252 }
3253
87f5032e 3254 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3255 * means we reserve 2 more, this pushes us to allocate from the next
3256 * larger slab size
3257 * i.e. RXBUFFER_2048 --> size-4096 slab */
3258
3259 if (max_frame <= E1000_RXBUFFER_256)
3260 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3261 else if (max_frame <= E1000_RXBUFFER_512)
3262 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3263 else if (max_frame <= E1000_RXBUFFER_1024)
3264 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3265 else if (max_frame <= E1000_RXBUFFER_2048)
3266 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3267 else if (max_frame <= E1000_RXBUFFER_4096)
3268 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3269 else if (max_frame <= E1000_RXBUFFER_8192)
3270 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3271 else if (max_frame <= E1000_RXBUFFER_16384)
3272 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3273
3274 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3275 if (!adapter->hw.tbi_compatibility_on &&
3276 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3277 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3278 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3279
2d7edb92
MC		 3280 netdev->mtu = new_mtu;
3281
2db10a08
AK		 3282 if (netif_running(netdev))
3283 e1000_reinit_locked(adapter);
1da177e4 3284
1da177e4
LT		 3285 adapter->hw.max_frame_size = max_frame;
3286
3287 return 0;
3288}
3289
3290/**
3291 * e1000_update_stats - Update the board statistics counters
3292 * @adapter: board private structure
3293 **/
3294
3295void
3296e1000_update_stats(struct e1000_adapter *adapter)
3297{
3298 struct e1000_hw *hw = &adapter->hw;
282f33c9 3299 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3300 unsigned long flags;
3301 uint16_t phy_tmp;
3302
3303#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3304
282f33c9
LV		 3305 /*
3306 * Prevent stats update while adapter is being reset, or if the pci
3307 * connection is down.
3308 */
9026729b 3309 if (adapter->link_speed == 0)
282f33c9
LV		 3310 return;
3311 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3312 return;
3313
1da177e4
LT		 3314 spin_lock_irqsave(&adapter->stats_lock, flags);
3315
3316 /* these counters are modified from e1000_adjust_tbi_stats,
3317 * called from the interrupt context, so they must only
3318 * be written while holding adapter->stats_lock
3319 */
3320
3321 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3322 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3323 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3324 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3325 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3326 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3327 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3328
3329 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3330 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3331 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3332 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3333 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3334 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3335 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3336 }
1da177e4
LT		 3337
3338 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3339 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3340 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3341 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3342 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3343 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3344 adapter->stats.dc += E1000_READ_REG(hw, DC);
3345 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3346 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3347 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3348 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3349 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3350 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3351 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3352 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3353 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3354 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3355 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3356 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3357 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3358 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3359 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3360 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3361 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3362 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3363 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3364
3365 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3366 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3367 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3368 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3369 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3370 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3371 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3372 }
3373
1da177e4
LT		 3374 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3375 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3376
3377 /* used for adaptive IFS */
3378
3379 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3380 adapter->stats.tpt += hw->tx_packet_delta;
3381 hw->collision_delta = E1000_READ_REG(hw, COLC);
3382 adapter->stats.colc += hw->collision_delta;
3383
96838a40 3384 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3385 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3386 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3387 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3388 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3389 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3390 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3391 }
96838a40 3392 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3393 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3394 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3395
3396 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3397 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3398 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3399 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3400 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3401 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3402 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3403 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3404 }
2d7edb92 3405 }
1da177e4
LT		 3406
3407 /* Fill out the OS statistics structure */
1da177e4
LT		 3408 adapter->net_stats.rx_packets = adapter->stats.gprc;
3409 adapter->net_stats.tx_packets = adapter->stats.gptc;
3410 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3411 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3412 adapter->net_stats.multicast = adapter->stats.mprc;
3413 adapter->net_stats.collisions = adapter->stats.colc;
3414
3415 /* Rx Errors */
3416
87041639
JK		 3417 /* RLEC on some newer hardware can be incorrect so build
3418 * our own version based on RUC and ROC */
1da177e4
LT		 3419 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3420 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3421 adapter->stats.ruc + adapter->stats.roc +
3422 adapter->stats.cexterr;
49559854
MW		 3423 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3424 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3425 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3426 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3427 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3428
3429 /* Tx Errors */
49559854
MW		 3430 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3431 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3432 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3433 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3434 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3435
3436 /* Tx Dropped needs to be maintained elsewhere */
3437
3438 /* Phy Stats */
96838a40
JB		 3439 if (hw->media_type == e1000_media_type_copper) {
3440 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3441 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3442 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3443 adapter->phy_stats.idle_errors += phy_tmp;
3444 }
3445
96838a40 3446 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3447 (hw->phy_type == e1000_phy_m88) &&
3448 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3449 adapter->phy_stats.receive_errors += phy_tmp;
3450 }
3451
3452 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3453}
3454
3455/**
3456 * e1000_intr - Interrupt Handler
3457 * @irq: interrupt number
3458 * @data: pointer to a network interface device structure
1da177e4
LT		 3459 **/
3460
3461static irqreturn_t
7d12e780 3462e1000_intr(int irq, void *data)
1da177e4
LT		 3463{
3464 struct net_device *netdev = data;
60490fe0 3465 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3466 struct e1000_hw *hw = &adapter->hw;
87041639 3467 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3468#ifndef CONFIG_E1000_NAPI
581d708e 3469 int i;
1e613fd9
JK		 3470#else
3471 /* Interrupt Auto-Mask...upon reading ICR,
3472 * interrupts are masked. No need for the
3473 * IMC write, but it does mean we should
3474 * account for it ASAP. */
3475 if (likely(hw->mac_type >= e1000_82571))
3476 atomic_inc(&adapter->irq_sem);
be2b28ed 3477#endif
1da177e4 3478
1e613fd9
JK		 3479 if (unlikely(!icr)) {
3480#ifdef CONFIG_E1000_NAPI
3481 if (hw->mac_type >= e1000_82571)
3482 e1000_irq_enable(adapter);
3483#endif
1da177e4 3484 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3485 }
1da177e4 3486
96838a40 3487 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3488 hw->get_link_status = 1;
87041639
JK		 3489 /* 80003ES2LAN workaround--
3490 * For packet buffer work-around on link down event;
3491 * disable receives here in the ISR and
3492 * reset adapter in watchdog
3493 */
3494 if (netif_carrier_ok(netdev) &&
3495 (adapter->hw.mac_type == e1000_80003es2lan)) {
3496 /* disable receives */
3497 rctl = E1000_READ_REG(hw, RCTL);
3498 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3499 }
1314bbf3
AK		 3500 /* guard against interrupt when we're going down */
3501 if (!test_bit(__E1000_DOWN, &adapter->flags))
3502 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3503 }
3504
3505#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3506 if (unlikely(hw->mac_type < e1000_82571)) {
3507 atomic_inc(&adapter->irq_sem);
3508 E1000_WRITE_REG(hw, IMC, ~0);
3509 E1000_WRITE_FLUSH(hw);
3510 }
d3d9e484
AK		 3511 if (likely(netif_rx_schedule_prep(netdev)))
3512 __netif_rx_schedule(netdev);
581d708e 3513 else
90fb5135
AK		 3514 /* this really should not happen! if it does it is basically a
3515 * bug, but not a hard error, so enable ints and continue */
581d708e 3516 e1000_irq_enable(adapter);
c1605eb3 3517#else
1da177e4 3518 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3519 * Due to Hub Link bus being occupied, an interrupt
3520 * de-assertion message is not able to be sent.
3521 * When an interrupt assertion message is generated later,
3522 * two messages are re-ordered and sent out.
3523 * That causes APIC to think 82547 is in de-assertion
3524 * state, while 82547 is in assertion state, resulting
3525 * in dead lock. Writing IMC forces 82547 into
3526 * de-assertion state.
3527 */
3528 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3529 atomic_inc(&adapter->irq_sem);
2648345f 3530 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3531 }
3532
96838a40
JB		 3533 for (i = 0; i < E1000_MAX_INTR; i++)
3534 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3535 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3536 break;
3537
96838a40 3538 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3539 e1000_irq_enable(adapter);
581d708e 3540
c1605eb3 3541#endif
1da177e4
LT		 3542 return IRQ_HANDLED;
3543}
3544
3545#ifdef CONFIG_E1000_NAPI
3546/**
3547 * e1000_clean - NAPI Rx polling callback
3548 * @adapter: board private structure
3549 **/
3550
3551static int
581d708e 3552e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3553{
581d708e
MC		 3554 struct e1000_adapter *adapter;
3555 int work_to_do = min(*budget, poll_dev->quota);
d3d9e484 3556 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3557
3558 /* Must NOT use netdev_priv macro here. */
3559 adapter = poll_dev->priv;
3560
3561 /* Keep link state information with original netdev */
d3d9e484 3562 if (!netif_carrier_ok(poll_dev))
581d708e 3563 goto quit_polling;
2648345f 3564
d3d9e484
AK		 3565 /* e1000_clean is called per-cpu. This lock protects
3566 * tx_ring[0] from being cleaned by multiple cpus
3567 * simultaneously. A failure obtaining the lock means
3568 * tx_ring[0] is currently being cleaned anyway. */
3569 if (spin_trylock(&adapter->tx_queue_lock)) {
3570 tx_cleaned = e1000_clean_tx_irq(adapter,
3571 &adapter->tx_ring[0]);
3572 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3573 }
3574
d3d9e484 3575 adapter->clean_rx(adapter, &adapter->rx_ring[0],
581d708e 3576 &work_done, work_to_do);
1da177e4
LT		 3577
3578 *budget -= work_done;
581d708e 3579 poll_dev->quota -= work_done;
96838a40 3580
2b02893e 3581 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3582 if ((!tx_cleaned && (work_done == 0)) ||
d3d9e484 3583 !netif_running(poll_dev)) {
581d708e
MC		 3584quit_polling:
3585 netif_rx_complete(poll_dev);
1da177e4
LT		 3586 e1000_irq_enable(adapter);
3587 return 0;
3588 }
3589
3590 return 1;
3591}
3592
3593#endif
3594/**
3595 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3596 * @adapter: board private structure
3597 **/
3598
3599static boolean_t
581d708e
MC		 3600e1000_clean_tx_irq(struct e1000_adapter *adapter,
3601 struct e1000_tx_ring *tx_ring)
1da177e4 3602{
1da177e4
LT		 3603 struct net_device *netdev = adapter->netdev;
3604 struct e1000_tx_desc *tx_desc, *eop_desc;
3605 struct e1000_buffer *buffer_info;
3606 unsigned int i, eop;
2a1af5d7
JK		 3607#ifdef CONFIG_E1000_NAPI
3608 unsigned int count = 0;
3609#endif
1da177e4
LT		 3610 boolean_t cleaned = FALSE;
3611
3612 i = tx_ring->next_to_clean;
3613 eop = tx_ring->buffer_info[i].next_to_watch;
3614 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3615
581d708e 3616 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3617 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3618 tx_desc = E1000_TX_DESC(*tx_ring, i);
3619 buffer_info = &tx_ring->buffer_info[i];
3620 cleaned = (i == eop);
3621
fd803241 3622 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3623 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3624
96838a40 3625 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3626 }
581d708e 3627
1da177e4
LT		 3628 eop = tx_ring->buffer_info[i].next_to_watch;
3629 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3630#ifdef CONFIG_E1000_NAPI
3631#define E1000_TX_WEIGHT 64
3632 /* weight of a sort for tx, to avoid endless transmit cleanup */
3633 if (count++ == E1000_TX_WEIGHT) break;
3634#endif
1da177e4
LT		 3635 }
3636
3637 tx_ring->next_to_clean = i;
3638
77b2aad5 3639#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3640 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3641 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3642 /* Make sure that anybody stopping the queue after this
3643 * sees the new next_to_clean.
3644 */
3645 smp_mb();
3646 if (netif_queue_stopped(netdev))
77b2aad5 3647 netif_wake_queue(netdev);
77b2aad5 3648 }
2648345f 3649
581d708e 3650 if (adapter->detect_tx_hung) {
2648345f 3651 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3652 * check with the clearing of time_stamp and movement of i */
3653 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3654 if (tx_ring->buffer_info[eop].dma &&
3655 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3656 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3657 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3658 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3659
3660 /* detected Tx unit hang */
c6963ef5 3661 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3662 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3663 " TDH <%x>\n"
3664 " TDT <%x>\n"
3665 " next_to_use <%x>\n"
3666 " next_to_clean <%x>\n"
3667 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3668 " time_stamp <%lx>\n"
3669 " next_to_watch <%x>\n"
3670 " jiffies <%lx>\n"
3671 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3672 (unsigned long)((tx_ring - adapter->tx_ring) /
3673 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3674 readl(adapter->hw.hw_addr + tx_ring->tdh),
3675 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3676 tx_ring->next_to_use,
392137fa
JK		 3677 tx_ring->next_to_clean,
3678 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3679 eop,
3680 jiffies,
3681 eop_desc->upper.fields.status);
1da177e4 3682 netif_stop_queue(netdev);
70b8f1e1 3683 }
1da177e4 3684 }
1da177e4
LT		 3685 return cleaned;
3686}
3687
3688/**
3689 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3690 * @adapter: board private structure
3691 * @status_err: receive descriptor status and error fields
3692 * @csum: receive descriptor csum field
3693 * @sk_buff: socket buffer with received data
1da177e4
LT		 3694 **/
3695
e619d523 3696static void
1da177e4 3697e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3698 uint32_t status_err, uint32_t csum,
3699 struct sk_buff *skb)
1da177e4 3700{
2d7edb92
MC		 3701 uint16_t status = (uint16_t)status_err;
3702 uint8_t errors = (uint8_t)(status_err >> 24);
3703 skb->ip_summed = CHECKSUM_NONE;
3704
1da177e4 3705 /* 82543 or newer only */
96838a40 3706 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3707 /* Ignore Checksum bit is set */
96838a40 3708 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3709 /* TCP/UDP checksum error bit is set */
96838a40 3710 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3711 /* let the stack verify checksum errors */
1da177e4 3712 adapter->hw_csum_err++;
2d7edb92
MC		 3713 return;
3714 }
3715 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3716 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3717 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3718 return;
1da177e4 3719 } else {
96838a40 3720 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3721 return;
3722 }
3723 /* It must be a TCP or UDP packet with a valid checksum */
3724 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3725 /* TCP checksum is good */
3726 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3727 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3728 /* IP fragment with UDP payload */
3729 /* Hardware complements the payload checksum, so we undo it
3730 * and then put the value in host order for further stack use.
3731 */
3732 csum = ntohl(csum ^ 0xFFFF);
3733 skb->csum = csum;
84fa7933 3734 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3735 }
2d7edb92 3736 adapter->hw_csum_good++;
1da177e4
LT		 3737}
3738
3739/**
2d7edb92 3740 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3741 * @adapter: board private structure
3742 **/
3743
3744static boolean_t
3745#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3746e1000_clean_rx_irq(struct e1000_adapter *adapter,
3747 struct e1000_rx_ring *rx_ring,
3748 int *work_done, int work_to_do)
1da177e4 3749#else
581d708e
MC		 3750e1000_clean_rx_irq(struct e1000_adapter *adapter,
3751 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3752#endif
3753{
1da177e4
LT		 3754 struct net_device *netdev = adapter->netdev;
3755 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3756 struct e1000_rx_desc *rx_desc, *next_rxd;
3757 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3758 unsigned long flags;
3759 uint32_t length;
3760 uint8_t last_byte;
3761 unsigned int i;
72d64a43 3762 int cleaned_count = 0;
a1415ee6 3763 boolean_t cleaned = FALSE;
1da177e4
LT		 3764
3765 i = rx_ring->next_to_clean;
3766 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3767 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3768
b92ff8ee 3769 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3770 struct sk_buff *skb;
a292ca6e 3771 u8 status;
90fb5135 3772
1da177e4 3773#ifdef CONFIG_E1000_NAPI
96838a40 3774 if (*work_done >= work_to_do)
1da177e4
LT		 3775 break;
3776 (*work_done)++;
3777#endif
a292ca6e 3778 status = rx_desc->status;
b92ff8ee 3779 skb = buffer_info->skb;
86c3d59f
JB		 3780 buffer_info->skb = NULL;
3781
30320be8
JK		 3782 prefetch(skb->data - NET_IP_ALIGN);
3783
86c3d59f
JB		 3784 if (++i == rx_ring->count) i = 0;
3785 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3786 prefetch(next_rxd);
3787
86c3d59f 3788 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3789
72d64a43
JK		 3790 cleaned = TRUE;
3791 cleaned_count++;
a292ca6e
JK		 3792 pci_unmap_single(pdev,
3793 buffer_info->dma,
3794 buffer_info->length,
1da177e4
LT		 3795 PCI_DMA_FROMDEVICE);
3796
1da177e4
LT		 3797 length = le16_to_cpu(rx_desc->length);
3798
a1415ee6
JK		 3799 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3800 /* All receives must fit into a single buffer */
3801 E1000_DBG("%s: Receive packet consumed multiple"
3802 " buffers\n", netdev->name);
864c4e45 3803 /* recycle */
8fc897b0 3804 buffer_info->skb = skb;
1da177e4
LT		 3805 goto next_desc;
3806 }
3807
96838a40 3808 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3809 last_byte = *(skb->data + length - 1);
b92ff8ee 3810 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3811 rx_desc->errors, length, last_byte)) {
3812 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3813 e1000_tbi_adjust_stats(&adapter->hw,
3814 &adapter->stats,
1da177e4
LT		 3815 length, skb->data);
3816 spin_unlock_irqrestore(&adapter->stats_lock,
3817 flags);
3818 length--;
3819 } else {
9e2feace
AK		 3820 /* recycle */
3821 buffer_info->skb = skb;
1da177e4
LT		 3822 goto next_desc;
3823 }
1cb5821f 3824 }
1da177e4 3825
d2a1e213
JB		 3826 /* adjust length to remove Ethernet CRC, this must be
3827 * done after the TBI_ACCEPT workaround above */
3828 length -= 4;
3829
a292ca6e
JK		 3830 /* code added for copybreak, this should improve
3831 * performance for small packets with large amounts
3832 * of reassembly being done in the stack */
3833#define E1000_CB_LENGTH 256
a1415ee6 3834 if (length < E1000_CB_LENGTH) {
a292ca6e 3835 struct sk_buff *new_skb =
87f5032e 3836 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 3837 if (new_skb) {
3838 skb_reserve(new_skb, NET_IP_ALIGN);
a292ca6e
JK		 3839 memcpy(new_skb->data - NET_IP_ALIGN,
3840 skb->data - NET_IP_ALIGN,
3841 length + NET_IP_ALIGN);
3842 /* save the skb in buffer_info as good */
3843 buffer_info->skb = skb;
3844 skb = new_skb;
a292ca6e 3845 }
996695de
AK		 3846 /* else just continue with the old one */
3847 }
a292ca6e 3848 /* end copybreak code */
996695de 3849 skb_put(skb, length);
1da177e4
LT		 3850
3851 /* Receive Checksum Offload */
a292ca6e
JK		 3852 e1000_rx_checksum(adapter,
3853 (uint32_t)(status) |
2d7edb92 3854 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3855 le16_to_cpu(rx_desc->csum), skb);
96838a40 3856
1da177e4
LT		 3857 skb->protocol = eth_type_trans(skb, netdev);
3858#ifdef CONFIG_E1000_NAPI
96838a40 3859 if (unlikely(adapter->vlgrp &&
a292ca6e 3860 (status & E1000_RXD_STAT_VP))) {
1da177e4 3861 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3862 le16_to_cpu(rx_desc->special) &
3863 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3864 } else {
3865 netif_receive_skb(skb);
3866 }
3867#else /* CONFIG_E1000_NAPI */
96838a40 3868 if (unlikely(adapter->vlgrp &&
b92ff8ee 3869 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3870 vlan_hwaccel_rx(skb, adapter->vlgrp,
3871 le16_to_cpu(rx_desc->special) &
3872 E1000_RXD_SPC_VLAN_MASK);
3873 } else {
3874 netif_rx(skb);
3875 }
3876#endif /* CONFIG_E1000_NAPI */
3877 netdev->last_rx = jiffies;
3878
3879next_desc:
3880 rx_desc->status = 0;
1da177e4 3881
72d64a43
JK		 3882 /* return some buffers to hardware, one at a time is too slow */
3883 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3884 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3885 cleaned_count = 0;
3886 }
3887
30320be8 3888 /* use prefetched values */
86c3d59f
JB		 3889 rx_desc = next_rxd;
3890 buffer_info = next_buffer;
1da177e4 3891 }
1da177e4 3892 rx_ring->next_to_clean = i;
72d64a43
JK		 3893
3894 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3895 if (cleaned_count)
3896 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3897
3898 return cleaned;
3899}
3900
3901/**
3902 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3903 * @adapter: board private structure
3904 **/
3905
3906static boolean_t
3907#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3908e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3909 struct e1000_rx_ring *rx_ring,
3910 int *work_done, int work_to_do)
2d7edb92 3911#else
581d708e
MC		 3912e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3913 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3914#endif
3915{
86c3d59f 3916 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3917 struct net_device *netdev = adapter->netdev;
3918 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3919 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3920 struct e1000_ps_page *ps_page;
3921 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3922 struct sk_buff *skb;
2d7edb92
MC		 3923 unsigned int i, j;
3924 uint32_t length, staterr;
72d64a43 3925 int cleaned_count = 0;
2d7edb92
MC		 3926 boolean_t cleaned = FALSE;
3927
3928 i = rx_ring->next_to_clean;
3929 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3930 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3931 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3932
96838a40 3933 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3934 ps_page = &rx_ring->ps_page[i];
3935 ps_page_dma = &rx_ring->ps_page_dma[i];
3936#ifdef CONFIG_E1000_NAPI
96838a40 3937 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3938 break;
3939 (*work_done)++;
3940#endif
86c3d59f
JB		 3941 skb = buffer_info->skb;
3942
30320be8
JK		 3943 /* in the packet split case this is header only */
3944 prefetch(skb->data - NET_IP_ALIGN);
3945
86c3d59f
JB		 3946 if (++i == rx_ring->count) i = 0;
3947 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3948 prefetch(next_rxd);
3949
86c3d59f 3950 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3951
2d7edb92 3952 cleaned = TRUE;
72d64a43 3953 cleaned_count++;
2d7edb92
MC		 3954 pci_unmap_single(pdev, buffer_info->dma,
3955 buffer_info->length,
3956 PCI_DMA_FROMDEVICE);
3957
96838a40 3958 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3959 E1000_DBG("%s: Packet Split buffers didn't pick up"
3960 " the full packet\n", netdev->name);
3961 dev_kfree_skb_irq(skb);
3962 goto next_desc;
3963 }
1da177e4 3964
96838a40 3965 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3966 dev_kfree_skb_irq(skb);
3967 goto next_desc;
3968 }
3969
3970 length = le16_to_cpu(rx_desc->wb.middle.length0);
3971
96838a40 3972 if (unlikely(!length)) {
2d7edb92
MC		 3973 E1000_DBG("%s: Last part of the packet spanning"
3974 " multiple descriptors\n", netdev->name);
3975 dev_kfree_skb_irq(skb);
3976 goto next_desc;
3977 }
3978
3979 /* Good Receive */
3980 skb_put(skb, length);
3981
dc7c6add
JK		 3982 {
3983 /* this looks ugly, but it seems compiler issues make it
3984 more efficient than reusing j */
3985 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3986
3987 /* page alloc/put takes too long and effects small packet
3988 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 3989 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 3990 u8 *vaddr;
76c224bc 3991 /* there is no documentation about how to call
dc7c6add
JK		 3992 * kmap_atomic, so we can't hold the mapping
3993 * very long */
3994 pci_dma_sync_single_for_cpu(pdev,
3995 ps_page_dma->ps_page_dma[0],
3996 PAGE_SIZE,
3997 PCI_DMA_FROMDEVICE);
3998 vaddr = kmap_atomic(ps_page->ps_page[0],
3999 KM_SKB_DATA_SOFTIRQ);
4000 memcpy(skb->tail, vaddr, l1);
4001 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4002 pci_dma_sync_single_for_device(pdev,
4003 ps_page_dma->ps_page_dma[0],
4004 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 4005 /* remove the CRC */
4006 l1 -= 4;
dc7c6add 4007 skb_put(skb, l1);
dc7c6add
JK		 4008 goto copydone;
4009 } /* if */
4010 }
90fb5135 4011
96838a40 4012 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 4013 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 4014 break;
2d7edb92
MC		 4015 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4016 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4017 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 4018 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4019 length);
2d7edb92 4020 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 4021 skb->len += length;
4022 skb->data_len += length;
5d51b80f 4023 skb->truesize += length;
2d7edb92
MC		 4024 }
4025
f235a2ab
AK		 4026 /* strip the ethernet crc, problem is we're using pages now so
4027 * this whole operation can get a little cpu intensive */
4028 pskb_trim(skb, skb->len - 4);
4029
dc7c6add 4030copydone:
2d7edb92 4031 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 4032 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 4033 skb->protocol = eth_type_trans(skb, netdev);
4034
96838a40 4035 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 4036 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 4037 adapter->rx_hdr_split++;
2d7edb92 4038#ifdef CONFIG_E1000_NAPI
96838a40 4039 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4040 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 4041 le16_to_cpu(rx_desc->wb.middle.vlan) &
4042 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4043 } else {
4044 netif_receive_skb(skb);
4045 }
4046#else /* CONFIG_E1000_NAPI */
96838a40 4047 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4048 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 4049 le16_to_cpu(rx_desc->wb.middle.vlan) &
4050 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4051 } else {
4052 netif_rx(skb);
4053 }
4054#endif /* CONFIG_E1000_NAPI */
4055 netdev->last_rx = jiffies;
4056
4057next_desc:
c3d7a3a4 4058 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 4059 buffer_info->skb = NULL;
2d7edb92 4060
72d64a43
JK		 4061 /* return some buffers to hardware, one at a time is too slow */
4062 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4063 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4064 cleaned_count = 0;
4065 }
4066
30320be8 4067 /* use prefetched values */
86c3d59f
JB		 4068 rx_desc = next_rxd;
4069 buffer_info = next_buffer;
4070
683a38f3 4071 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 4072 }
4073 rx_ring->next_to_clean = i;
72d64a43
JK		 4074
4075 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4076 if (cleaned_count)
4077 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 4078
4079 return cleaned;
4080}
4081
4082/**
2d7edb92 4083 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4084 * @adapter: address of board private structure
4085 **/
4086
4087static void
581d708e 4088e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 4089 struct e1000_rx_ring *rx_ring,
a292ca6e 4090 int cleaned_count)
1da177e4 4091{
1da177e4
LT		 4092 struct net_device *netdev = adapter->netdev;
4093 struct pci_dev *pdev = adapter->pdev;
4094 struct e1000_rx_desc *rx_desc;
4095 struct e1000_buffer *buffer_info;
4096 struct sk_buff *skb;
2648345f
MC		 4097 unsigned int i;
4098 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4099
4100 i = rx_ring->next_to_use;
4101 buffer_info = &rx_ring->buffer_info[i];
4102
a292ca6e 4103 while (cleaned_count--) {
ca6f7224
CH		 4104 skb = buffer_info->skb;
4105 if (skb) {
a292ca6e
JK		 4106 skb_trim(skb, 0);
4107 goto map_skb;
4108 }
4109
ca6f7224 4110 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4111 if (unlikely(!skb)) {
1da177e4 4112 /* Better luck next round */
72d64a43 4113 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4114 break;
4115 }
4116
2648345f 4117 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4118 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4119 struct sk_buff *oldskb = skb;
2648345f
MC		 4120 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4121 "at %p\n", bufsz, skb->data);
4122 /* Try again, without freeing the previous */
87f5032e 4123 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4124 /* Failed allocation, critical failure */
1da177e4
LT		 4125 if (!skb) {
4126 dev_kfree_skb(oldskb);
4127 break;
4128 }
2648345f 4129
1da177e4
LT		 4130 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4131 /* give up */
4132 dev_kfree_skb(skb);
4133 dev_kfree_skb(oldskb);
4134 break; /* while !buffer_info->skb */
1da177e4 4135 }
ca6f7224
CH		 4136
4137 /* Use new allocation */
4138 dev_kfree_skb(oldskb);
1da177e4 4139 }
1da177e4
LT		 4140 /* Make buffer alignment 2 beyond a 16 byte boundary
4141 * this will result in a 16 byte aligned IP header after
4142 * the 14 byte MAC header is removed
4143 */
4144 skb_reserve(skb, NET_IP_ALIGN);
4145
1da177e4
LT		 4146 buffer_info->skb = skb;
4147 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4148map_skb:
1da177e4
LT		 4149 buffer_info->dma = pci_map_single(pdev,
4150 skb->data,
4151 adapter->rx_buffer_len,
4152 PCI_DMA_FROMDEVICE);
4153
2648345f
MC		 4154 /* Fix for errata 23, can't cross 64kB boundary */
4155 if (!e1000_check_64k_bound(adapter,
4156 (void *)(unsigned long)buffer_info->dma,
4157 adapter->rx_buffer_len)) {
4158 DPRINTK(RX_ERR, ERR,
4159 "dma align check failed: %u bytes at %p\n",
4160 adapter->rx_buffer_len,
4161 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4162 dev_kfree_skb(skb);
4163 buffer_info->skb = NULL;
4164
2648345f 4165 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4166 adapter->rx_buffer_len,
4167 PCI_DMA_FROMDEVICE);
4168
4169 break; /* while !buffer_info->skb */
4170 }
1da177e4
LT		 4171 rx_desc = E1000_RX_DESC(*rx_ring, i);
4172 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4173
96838a40
JB		 4174 if (unlikely(++i == rx_ring->count))
4175 i = 0;
1da177e4
LT		 4176 buffer_info = &rx_ring->buffer_info[i];
4177 }
4178
b92ff8ee
JB		 4179 if (likely(rx_ring->next_to_use != i)) {
4180 rx_ring->next_to_use = i;
4181 if (unlikely(i-- == 0))
4182 i = (rx_ring->count - 1);
4183
4184 /* Force memory writes to complete before letting h/w
4185 * know there are new descriptors to fetch. (Only
4186 * applicable for weak-ordered memory model archs,
4187 * such as IA-64). */
4188 wmb();
4189 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4190 }
1da177e4
LT		 4191}
4192
2d7edb92
MC		 4193/**
4194 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4195 * @adapter: address of board private structure
4196 **/
4197
4198static void
581d708e 4199e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4200 struct e1000_rx_ring *rx_ring,
4201 int cleaned_count)
2d7edb92 4202{
2d7edb92
MC		 4203 struct net_device *netdev = adapter->netdev;
4204 struct pci_dev *pdev = adapter->pdev;
4205 union e1000_rx_desc_packet_split *rx_desc;
4206 struct e1000_buffer *buffer_info;
4207 struct e1000_ps_page *ps_page;
4208 struct e1000_ps_page_dma *ps_page_dma;
4209 struct sk_buff *skb;
4210 unsigned int i, j;
4211
4212 i = rx_ring->next_to_use;
4213 buffer_info = &rx_ring->buffer_info[i];
4214 ps_page = &rx_ring->ps_page[i];
4215 ps_page_dma = &rx_ring->ps_page_dma[i];
4216
72d64a43 4217 while (cleaned_count--) {
2d7edb92
MC		 4218 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4219
96838a40 4220 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4221 if (j < adapter->rx_ps_pages) {
4222 if (likely(!ps_page->ps_page[j])) {
4223 ps_page->ps_page[j] =
4224 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4225 if (unlikely(!ps_page->ps_page[j])) {
4226 adapter->alloc_rx_buff_failed++;
e4c811c9 4227 goto no_buffers;
b92ff8ee 4228 }
e4c811c9
MC		 4229 ps_page_dma->ps_page_dma[j] =
4230 pci_map_page(pdev,
4231 ps_page->ps_page[j],
4232 0, PAGE_SIZE,
4233 PCI_DMA_FROMDEVICE);
4234 }
4235 /* Refresh the desc even if buffer_addrs didn't
96838a40 4236 * change because each write-back erases
e4c811c9
MC		 4237 * this info.
4238 */
4239 rx_desc->read.buffer_addr[j+1] =
4240 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4241 } else
4242 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4243 }
4244
87f5032e 4245 skb = netdev_alloc_skb(netdev,
90fb5135 4246 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4247
b92ff8ee
JB		 4248 if (unlikely(!skb)) {
4249 adapter->alloc_rx_buff_failed++;
2d7edb92 4250 break;
b92ff8ee 4251 }
2d7edb92
MC		 4252
4253 /* Make buffer alignment 2 beyond a 16 byte boundary
4254 * this will result in a 16 byte aligned IP header after
4255 * the 14 byte MAC header is removed
4256 */
4257 skb_reserve(skb, NET_IP_ALIGN);
4258
2d7edb92
MC		 4259 buffer_info->skb = skb;
4260 buffer_info->length = adapter->rx_ps_bsize0;
4261 buffer_info->dma = pci_map_single(pdev, skb->data,
4262 adapter->rx_ps_bsize0,
4263 PCI_DMA_FROMDEVICE);
4264
4265 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4266
96838a40 4267 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4268 buffer_info = &rx_ring->buffer_info[i];
4269 ps_page = &rx_ring->ps_page[i];
4270 ps_page_dma = &rx_ring->ps_page_dma[i];
4271 }
4272
4273no_buffers:
b92ff8ee
JB		 4274 if (likely(rx_ring->next_to_use != i)) {
4275 rx_ring->next_to_use = i;
4276 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4277
4278 /* Force memory writes to complete before letting h/w
4279 * know there are new descriptors to fetch. (Only
4280 * applicable for weak-ordered memory model archs,
4281 * such as IA-64). */
4282 wmb();
4283 /* Hardware increments by 16 bytes, but packet split
4284 * descriptors are 32 bytes...so we increment tail
4285 * twice as much.
4286 */
4287 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4288 }
2d7edb92
MC		 4289}
4290
1da177e4
LT		 4291/**
4292 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4293 * @adapter:
4294 **/
4295
4296static void
4297e1000_smartspeed(struct e1000_adapter *adapter)
4298{
4299 uint16_t phy_status;
4300 uint16_t phy_ctrl;
4301
96838a40 4302 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4303 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4304 return;
4305
96838a40 4306 if (adapter->smartspeed == 0) {
1da177e4
LT		 4307 /* If Master/Slave config fault is asserted twice,
4308 * we assume back-to-back */
4309 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4310 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4311 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4312 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4313 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4314 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4315 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4316 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4317 phy_ctrl);
4318 adapter->smartspeed++;
96838a40 4319 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4320 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4321 &phy_ctrl)) {
4322 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4323 MII_CR_RESTART_AUTO_NEG);
4324 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4325 phy_ctrl);
4326 }
4327 }
4328 return;
96838a40 4329 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4330 /* If still no link, perhaps using 2/3 pair cable */
4331 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4332 phy_ctrl |= CR_1000T_MS_ENABLE;
4333 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4334 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4335 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4336 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4337 MII_CR_RESTART_AUTO_NEG);
4338 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4339 }
4340 }
4341 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4342 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4343 adapter->smartspeed = 0;
4344}
4345
4346/**
4347 * e1000_ioctl -
4348 * @netdev:
4349 * @ifreq:
4350 * @cmd:
4351 **/
4352
4353static int
4354e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4355{
4356 switch (cmd) {
4357 case SIOCGMIIPHY:
4358 case SIOCGMIIREG:
4359 case SIOCSMIIREG:
4360 return e1000_mii_ioctl(netdev, ifr, cmd);
4361 default:
4362 return -EOPNOTSUPP;
4363 }
4364}
4365
4366/**
4367 * e1000_mii_ioctl -
4368 * @netdev:
4369 * @ifreq:
4370 * @cmd:
4371 **/
4372
4373static int
4374e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4375{
60490fe0 4376 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4377 struct mii_ioctl_data *data = if_mii(ifr);
4378 int retval;
4379 uint16_t mii_reg;
4380 uint16_t spddplx;
97876fc6 4381 unsigned long flags;
1da177e4 4382
96838a40 4383 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4384 return -EOPNOTSUPP;
4385
4386 switch (cmd) {
4387 case SIOCGMIIPHY:
4388 data->phy_id = adapter->hw.phy_addr;
4389 break;
4390 case SIOCGMIIREG:
96838a40 4391 if (!capable(CAP_NET_ADMIN))
1da177e4 4392 return -EPERM;
97876fc6 4393 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4394 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4395 &data->val_out)) {
4396 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4397 return -EIO;
97876fc6
MC		 4398 }
4399 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4400 break;
4401 case SIOCSMIIREG:
96838a40 4402 if (!capable(CAP_NET_ADMIN))
1da177e4 4403 return -EPERM;
96838a40 4404 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4405 return -EFAULT;
4406 mii_reg = data->val_in;
97876fc6 4407 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4408 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4409 mii_reg)) {
4410 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4411 return -EIO;
97876fc6 4412 }
dc86d32a 4413 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4414 switch (data->reg_num) {
4415 case PHY_CTRL:
96838a40 4416 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4417 break;
96838a40 4418 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4419 adapter->hw.autoneg = 1;
4420 adapter->hw.autoneg_advertised = 0x2F;
4421 } else {
4422 if (mii_reg & 0x40)
4423 spddplx = SPEED_1000;
4424 else if (mii_reg & 0x2000)
4425 spddplx = SPEED_100;
4426 else
4427 spddplx = SPEED_10;
4428 spddplx += (mii_reg & 0x100)
cb764326
JK		 4429 ? DUPLEX_FULL :
4430 DUPLEX_HALF;
1da177e4
LT		 4431 retval = e1000_set_spd_dplx(adapter,
4432 spddplx);
96838a40 4433 if (retval) {
97876fc6 4434 spin_unlock_irqrestore(
96838a40 4435 &adapter->stats_lock,
97876fc6 4436 flags);
1da177e4 4437 return retval;
97876fc6 4438 }
1da177e4 4439 }
2db10a08
AK		 4440 if (netif_running(adapter->netdev))
4441 e1000_reinit_locked(adapter);
4442 else
1da177e4
LT		 4443 e1000_reset(adapter);
4444 break;
4445 case M88E1000_PHY_SPEC_CTRL:
4446 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4447 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4448 spin_unlock_irqrestore(
4449 &adapter->stats_lock, flags);
1da177e4 4450 return -EIO;
97876fc6 4451 }
1da177e4
LT		 4452 break;
4453 }
4454 } else {
4455 switch (data->reg_num) {
4456 case PHY_CTRL:
96838a40 4457 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4458 break;
2db10a08
AK		 4459 if (netif_running(adapter->netdev))
4460 e1000_reinit_locked(adapter);
4461 else
1da177e4
LT		 4462 e1000_reset(adapter);
4463 break;
4464 }
4465 }
97876fc6 4466 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4467 break;
4468 default:
4469 return -EOPNOTSUPP;
4470 }
4471 return E1000_SUCCESS;
4472}
4473
4474void
4475e1000_pci_set_mwi(struct e1000_hw *hw)
4476{
4477 struct e1000_adapter *adapter = hw->back;
2648345f 4478 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4479
96838a40 4480 if (ret_val)
2648345f 4481 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4482}
4483
4484void
4485e1000_pci_clear_mwi(struct e1000_hw *hw)
4486{
4487 struct e1000_adapter *adapter = hw->back;
4488
4489 pci_clear_mwi(adapter->pdev);
4490}
4491
4492void
4493e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4494{
4495 struct e1000_adapter *adapter = hw->back;
4496
4497 pci_read_config_word(adapter->pdev, reg, value);
4498}
4499
4500void
4501e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4502{
4503 struct e1000_adapter *adapter = hw->back;
4504
4505 pci_write_config_word(adapter->pdev, reg, *value);
4506}
4507
caeccb68
JK		 4508int32_t
4509e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4510{
4511 struct e1000_adapter *adapter = hw->back;
4512 uint16_t cap_offset;
4513
4514 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4515 if (!cap_offset)
4516 return -E1000_ERR_CONFIG;
4517
4518 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4519
4520 return E1000_SUCCESS;
4521}
4522
1da177e4
LT		 4523void
4524e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4525{
4526 outl(value, port);
4527}
4528
4529static void
4530e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4531{
60490fe0 4532 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4533 uint32_t ctrl, rctl;
4534
4535 e1000_irq_disable(adapter);
4536 adapter->vlgrp = grp;
4537
96838a40 4538 if (grp) {
1da177e4
LT		 4539 /* enable VLAN tag insert/strip */
4540 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4541 ctrl |= E1000_CTRL_VME;
4542 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4543
cd94dd0b 4544 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4545 /* enable VLAN receive filtering */
4546 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4547 rctl |= E1000_RCTL_VFE;
4548 rctl &= ~E1000_RCTL_CFIEN;
4549 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4550 e1000_update_mng_vlan(adapter);
cd94dd0b 4551 }
1da177e4
LT		 4552 } else {
4553 /* disable VLAN tag insert/strip */
4554 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4555 ctrl &= ~E1000_CTRL_VME;
4556 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4557
cd94dd0b 4558 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4559 /* disable VLAN filtering */
4560 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4561 rctl &= ~E1000_RCTL_VFE;
4562 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4563 if (adapter->mng_vlan_id !=
4564 (uint16_t)E1000_MNG_VLAN_NONE) {
4565 e1000_vlan_rx_kill_vid(netdev,
4566 adapter->mng_vlan_id);
4567 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4568 }
cd94dd0b 4569 }
1da177e4
LT		 4570 }
4571
4572 e1000_irq_enable(adapter);
4573}
4574
4575static void
4576e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4577{
60490fe0 4578 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4579 uint32_t vfta, index;
96838a40
JB		 4580
4581 if ((adapter->hw.mng_cookie.status &
4582 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4583 (vid == adapter->mng_vlan_id))
2d7edb92 4584 return;
1da177e4
LT		 4585 /* add VID to filter table */
4586 index = (vid >> 5) & 0x7F;
4587 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4588 vfta |= (1 << (vid & 0x1F));
4589 e1000_write_vfta(&adapter->hw, index, vfta);
4590}
4591
4592static void
4593e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4594{
60490fe0 4595 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4596 uint32_t vfta, index;
4597
4598 e1000_irq_disable(adapter);
4599
96838a40 4600 if (adapter->vlgrp)
1da177e4
LT		 4601 adapter->vlgrp->vlan_devices[vid] = NULL;
4602
4603 e1000_irq_enable(adapter);
4604
96838a40
JB		 4605 if ((adapter->hw.mng_cookie.status &
4606 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4607 (vid == adapter->mng_vlan_id)) {
4608 /* release control to f/w */
4609 e1000_release_hw_control(adapter);
2d7edb92 4610 return;
ff147013
JK		 4611 }
4612
1da177e4
LT		 4613 /* remove VID from filter table */
4614 index = (vid >> 5) & 0x7F;
4615 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4616 vfta &= ~(1 << (vid & 0x1F));
4617 e1000_write_vfta(&adapter->hw, index, vfta);
4618}
4619
4620static void
4621e1000_restore_vlan(struct e1000_adapter *adapter)
4622{
4623 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4624
96838a40 4625 if (adapter->vlgrp) {
1da177e4 4626 uint16_t vid;
96838a40
JB		 4627 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4628 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4629 continue;
4630 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4631 }
4632 }
4633}
4634
4635int
4636e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4637{
4638 adapter->hw.autoneg = 0;
4639
6921368f 4640 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4641 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4642 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4643 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4644 return -EINVAL;
4645 }
4646
96838a40 4647 switch (spddplx) {
1da177e4
LT		 4648 case SPEED_10 + DUPLEX_HALF:
4649 adapter->hw.forced_speed_duplex = e1000_10_half;
4650 break;
4651 case SPEED_10 + DUPLEX_FULL:
4652 adapter->hw.forced_speed_duplex = e1000_10_full;
4653 break;
4654 case SPEED_100 + DUPLEX_HALF:
4655 adapter->hw.forced_speed_duplex = e1000_100_half;
4656 break;
4657 case SPEED_100 + DUPLEX_FULL:
4658 adapter->hw.forced_speed_duplex = e1000_100_full;
4659 break;
4660 case SPEED_1000 + DUPLEX_FULL:
4661 adapter->hw.autoneg = 1;
4662 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4663 break;
4664 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4665 default:
2648345f 4666 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4667 return -EINVAL;
4668 }
4669 return 0;
4670}
4671
b6a1d5f8 4672#ifdef CONFIG_PM
0f15a8fa
JK		 4673/* Save/restore 16 or 64 dwords of PCI config space depending on which
4674 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4675 */
4676#define PCIE_CONFIG_SPACE_LEN 256
4677#define PCI_CONFIG_SPACE_LEN 64
4678static int
4679e1000_pci_save_state(struct e1000_adapter *adapter)
4680{
4681 struct pci_dev *dev = adapter->pdev;
4682 int size;
4683 int i;
0f15a8fa 4684
2f82665f
JB		 4685 if (adapter->hw.mac_type >= e1000_82571)
4686 size = PCIE_CONFIG_SPACE_LEN;
4687 else
4688 size = PCI_CONFIG_SPACE_LEN;
4689
4690 WARN_ON(adapter->config_space != NULL);
4691
4692 adapter->config_space = kmalloc(size, GFP_KERNEL);
4693 if (!adapter->config_space) {
4694 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4695 return -ENOMEM;
4696 }
4697 for (i = 0; i < (size / 4); i++)
4698 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4699 return 0;
4700}
4701
4702static void
4703e1000_pci_restore_state(struct e1000_adapter *adapter)
4704{
4705 struct pci_dev *dev = adapter->pdev;
4706 int size;
4707 int i;
0f15a8fa 4708
2f82665f
JB		 4709 if (adapter->config_space == NULL)
4710 return;
0f15a8fa 4711
2f82665f
JB		 4712 if (adapter->hw.mac_type >= e1000_82571)
4713 size = PCIE_CONFIG_SPACE_LEN;
4714 else
4715 size = PCI_CONFIG_SPACE_LEN;
4716 for (i = 0; i < (size / 4); i++)
4717 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4718 kfree(adapter->config_space);
4719 adapter->config_space = NULL;
4720 return;
4721}
4722#endif /* CONFIG_PM */
4723
1da177e4 4724static int
829ca9a3 4725e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4726{
4727 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4728 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4729 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4730 uint32_t wufc = adapter->wol;
6fdfef16 4731#ifdef CONFIG_PM
240b1710 4732 int retval = 0;
6fdfef16 4733#endif
1da177e4
LT		 4734
4735 netif_device_detach(netdev);
4736
2db10a08
AK		 4737 if (netif_running(netdev)) {
4738 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4739 e1000_down(adapter);
2db10a08 4740 }
1da177e4 4741
2f82665f 4742#ifdef CONFIG_PM
0f15a8fa
JK		 4743 /* Implement our own version of pci_save_state(pdev) because pci-
4744 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4745 retval = e1000_pci_save_state(adapter);
4746 if (retval)
4747 return retval;
4748#endif
4749
1da177e4 4750 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4751 if (status & E1000_STATUS_LU)
1da177e4
LT		 4752 wufc &= ~E1000_WUFC_LNKC;
4753
96838a40 4754 if (wufc) {
1da177e4
LT		 4755 e1000_setup_rctl(adapter);
4756 e1000_set_multi(netdev);
4757
4758 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4759 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 4760 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4761 rctl |= E1000_RCTL_MPE;
4762 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4763 }
4764
96838a40 4765 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4766 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4767 /* advertise wake from D3Cold */
4768 #define E1000_CTRL_ADVD3WUC 0x00100000
4769 /* phy power management enable */
4770 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4771 ctrl |= E1000_CTRL_ADVD3WUC |
4772 E1000_CTRL_EN_PHY_PWR_MGMT;
4773 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4774 }
4775
96838a40 4776 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4777 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4778 /* keep the laser running in D3 */
4779 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4780 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4781 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4782 }
4783
2d7edb92
MC		 4784 /* Allow time for pending master requests to run */
4785 e1000_disable_pciex_master(&adapter->hw);
4786
1da177e4
LT		 4787 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4788 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4789 pci_enable_wake(pdev, PCI_D3hot, 1);
4790 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4791 } else {
4792 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4793 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4794 pci_enable_wake(pdev, PCI_D3hot, 0);
4795 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4796 }
4797
4ccc12ae
JB		 4798 if (adapter->hw.mac_type >= e1000_82540 &&
4799 adapter->hw.mac_type < e1000_82571 &&
4800 adapter->hw.media_type == e1000_media_type_copper) {
1da177e4 4801 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4802 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4803 manc |= E1000_MANC_ARP_EN;
4804 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4805 pci_enable_wake(pdev, PCI_D3hot, 1);
4806 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4807 }
4808 }
4809
cd94dd0b
AK		 4810 if (adapter->hw.phy_type == e1000_phy_igp_3)
4811 e1000_phy_powerdown_workaround(&adapter->hw);
4812
edd106fc
AK		 4813 if (netif_running(netdev))
4814 e1000_free_irq(adapter);
4815
b55ccb35
JK		 4816 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4817 * would have already happened in close and is redundant. */
4818 e1000_release_hw_control(adapter);
2d7edb92 4819
1da177e4 4820 pci_disable_device(pdev);
240b1710 4821
d0e027db 4822 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4823
4824 return 0;
4825}
4826
2f82665f 4827#ifdef CONFIG_PM
1da177e4
LT		 4828static int
4829e1000_resume(struct pci_dev *pdev)
4830{
4831 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4832 struct e1000_adapter *adapter = netdev_priv(netdev);
3d1dd8cb 4833 uint32_t manc, err;
1da177e4 4834
d0e027db 4835 pci_set_power_state(pdev, PCI_D0);
2f82665f 4836 e1000_pci_restore_state(adapter);
3d1dd8cb
AK		 4837 if ((err = pci_enable_device(pdev))) {
4838 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4839 return err;
4840 }
a4cb847d 4841 pci_set_master(pdev);
1da177e4 4842
d0e027db
AK		 4843 pci_enable_wake(pdev, PCI_D3hot, 0);
4844 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4845
edd106fc
AK		 4846 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
4847 return err;
4848
4849 e1000_power_up_phy(adapter);
1da177e4
LT		 4850 e1000_reset(adapter);
4851 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4852
96838a40 4853 if (netif_running(netdev))
1da177e4
LT		 4854 e1000_up(adapter);
4855
4856 netif_device_attach(netdev);
4857
4ccc12ae
JB		 4858 if (adapter->hw.mac_type >= e1000_82540 &&
4859 adapter->hw.mac_type < e1000_82571 &&
4860 adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4861 manc = E1000_READ_REG(&adapter->hw, MANC);
4862 manc &= ~(E1000_MANC_ARP_EN);
4863 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4864 }
4865
b55ccb35
JK		 4866 /* If the controller is 82573 and f/w is AMT, do not set
4867 * DRV_LOAD until the interface is up. For all other cases,
4868 * let the f/w know that the h/w is now under the control
4869 * of the driver. */
4870 if (adapter->hw.mac_type != e1000_82573 ||
4871 !e1000_check_mng_mode(&adapter->hw))
4872 e1000_get_hw_control(adapter);
2d7edb92 4873
1da177e4
LT		 4874 return 0;
4875}
4876#endif
c653e635
AK		 4877
4878static void e1000_shutdown(struct pci_dev *pdev)
4879{
4880 e1000_suspend(pdev, PMSG_SUSPEND);
4881}
4882
1da177e4
LT		 4883#ifdef CONFIG_NET_POLL_CONTROLLER
4884/*
4885 * Polling 'interrupt' - used by things like netconsole to send skbs
4886 * without having to re-enable interrupts. It's not called while
4887 * the interrupt routine is executing.
4888 */
4889static void
2648345f 4890e1000_netpoll(struct net_device *netdev)
1da177e4 4891{
60490fe0 4892 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4893
1da177e4 4894 disable_irq(adapter->pdev->irq);
7d12e780 4895 e1000_intr(adapter->pdev->irq, netdev);
c4cfe567 4896 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4897#ifndef CONFIG_E1000_NAPI
4898 adapter->clean_rx(adapter, adapter->rx_ring);
4899#endif
1da177e4
LT		 4900 enable_irq(adapter->pdev->irq);
4901}
4902#endif
4903
9026729b
AK		 4904/**
4905 * e1000_io_error_detected - called when PCI error is detected
4906 * @pdev: Pointer to PCI device
4907 * @state: The current pci conneection state
4908 *
4909 * This function is called after a PCI bus error affecting
4910 * this device has been detected.
4911 */
4912static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4913{
4914 struct net_device *netdev = pci_get_drvdata(pdev);
4915 struct e1000_adapter *adapter = netdev->priv;
4916
4917 netif_device_detach(netdev);
4918
4919 if (netif_running(netdev))
4920 e1000_down(adapter);
72e8d6bb 4921 pci_disable_device(pdev);
9026729b
AK		 4922
4923 /* Request a slot slot reset. */
4924 return PCI_ERS_RESULT_NEED_RESET;
4925}
4926
4927/**
4928 * e1000_io_slot_reset - called after the pci bus has been reset.
4929 * @pdev: Pointer to PCI device
4930 *
4931 * Restart the card from scratch, as if from a cold-boot. Implementation
4932 * resembles the first-half of the e1000_resume routine.
4933 */
4934static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4935{
4936 struct net_device *netdev = pci_get_drvdata(pdev);
4937 struct e1000_adapter *adapter = netdev->priv;
4938
4939 if (pci_enable_device(pdev)) {
4940 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4941 return PCI_ERS_RESULT_DISCONNECT;
4942 }
4943 pci_set_master(pdev);
4944
dbf38c94
LV		 4945 pci_enable_wake(pdev, PCI_D3hot, 0);
4946 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4947
9026729b
AK		 4948 e1000_reset(adapter);
4949 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4950
4951 return PCI_ERS_RESULT_RECOVERED;
4952}
4953
4954/**
4955 * e1000_io_resume - called when traffic can start flowing again.
4956 * @pdev: Pointer to PCI device
4957 *
4958 * This callback is called when the error recovery driver tells us that
4959 * its OK to resume normal operation. Implementation resembles the
4960 * second-half of the e1000_resume routine.
4961 */
4962static void e1000_io_resume(struct pci_dev *pdev)
4963{
4964 struct net_device *netdev = pci_get_drvdata(pdev);
4965 struct e1000_adapter *adapter = netdev->priv;
4966 uint32_t manc, swsm;
4967
4968 if (netif_running(netdev)) {
4969 if (e1000_up(adapter)) {
4970 printk("e1000: can't bring device back up after reset\n");
4971 return;
4972 }
4973 }
4974
4975 netif_device_attach(netdev);
4976
4977 if (adapter->hw.mac_type >= e1000_82540 &&
4ccc12ae 4978 adapter->hw.mac_type < e1000_82571 &&
9026729b
AK		 4979 adapter->hw.media_type == e1000_media_type_copper) {
4980 manc = E1000_READ_REG(&adapter->hw, MANC);
4981 manc &= ~(E1000_MANC_ARP_EN);
4982 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4983 }
4984
4985 switch (adapter->hw.mac_type) {
4986 case e1000_82573:
4987 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4988 E1000_WRITE_REG(&adapter->hw, SWSM,
4989 swsm | E1000_SWSM_DRV_LOAD);
4990 break;
4991 default:
4992 break;
4993 }
4994
4995 if (netif_running(netdev))
4996 mod_timer(&adapter->watchdog_timer, jiffies);
4997}
4998
1da177e4 4999/* e1000_main.c */
Linux kernel - Deliverables
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