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e1000e: fix bug in restart queue logic
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
15b2bee2 34#define DRV_VERSION "7.3.21-k3-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4
LT		 127static void e1000_82547_tx_fifo_stall(unsigned long data);
128static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
129static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
130static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
131static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 132static irqreturn_t e1000_intr(int irq, void *data);
9ac98284 133static irqreturn_t e1000_intr_msi(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
581d708e 140static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 141 struct e1000_rx_ring *rx_ring,
142 int cleaned_count);
1da177e4
LT		 143static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
144static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
145 int cmd);
1da177e4
LT		 146static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
147static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
148static void e1000_tx_timeout(struct net_device *dev);
65f27f38 149static void e1000_reset_task(struct work_struct *work);
1da177e4 150static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 151static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
152 struct sk_buff *skb);
1da177e4
LT		 153
154static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 155static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
156static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 157static void e1000_restore_vlan(struct e1000_adapter *adapter);
158
6fdfef16 159#ifdef CONFIG_PM
b43fcd7d 160static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 161static int e1000_resume(struct pci_dev *pdev);
162#endif
c653e635 163static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 164
165#ifdef CONFIG_NET_POLL_CONTROLLER
166/* for netdump / net console */
167static void e1000_netpoll (struct net_device *netdev);
168#endif
169
1f753861
JB		 170#define COPYBREAK_DEFAULT 256
171static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
172module_param(copybreak, uint, 0644);
173MODULE_PARM_DESC(copybreak,
174 "Maximum size of packet that is copied to a new buffer on receive");
175
9026729b
AK		 176static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
177 pci_channel_state_t state);
178static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
179static void e1000_io_resume(struct pci_dev *pdev);
180
181static struct pci_error_handlers e1000_err_handler = {
182 .error_detected = e1000_io_error_detected,
183 .slot_reset = e1000_io_slot_reset,
184 .resume = e1000_io_resume,
185};
24025e4e 186
1da177e4
LT		 187static struct pci_driver e1000_driver = {
188 .name = e1000_driver_name,
189 .id_table = e1000_pci_tbl,
190 .probe = e1000_probe,
191 .remove = __devexit_p(e1000_remove),
c4e24f01 192#ifdef CONFIG_PM
1da177e4 193 /* Power Managment Hooks */
1da177e4 194 .suspend = e1000_suspend,
c653e635 195 .resume = e1000_resume,
1da177e4 196#endif
9026729b
AK		 197 .shutdown = e1000_shutdown,
198 .err_handler = &e1000_err_handler
1da177e4
LT		 199};
200
201MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
202MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
203MODULE_LICENSE("GPL");
204MODULE_VERSION(DRV_VERSION);
205
206static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
207module_param(debug, int, 0);
208MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
209
210/**
211 * e1000_init_module - Driver Registration Routine
212 *
213 * e1000_init_module is the first routine called when the driver is
214 * loaded. All it does is register with the PCI subsystem.
215 **/
216
64798845 217static int __init e1000_init_module(void)
1da177e4
LT		 218{
219 int ret;
220 printk(KERN_INFO "%s - version %s\n",
221 e1000_driver_string, e1000_driver_version);
222
223 printk(KERN_INFO "%s\n", e1000_copyright);
224
29917620 225 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 226 if (copybreak != COPYBREAK_DEFAULT) {
227 if (copybreak == 0)
228 printk(KERN_INFO "e1000: copybreak disabled\n");
229 else
230 printk(KERN_INFO "e1000: copybreak enabled for "
231 "packets <= %u bytes\n", copybreak);
232 }
1da177e4
LT		 233 return ret;
234}
235
236module_init(e1000_init_module);
237
238/**
239 * e1000_exit_module - Driver Exit Cleanup Routine
240 *
241 * e1000_exit_module is called just before the driver is removed
242 * from memory.
243 **/
244
64798845 245static void __exit e1000_exit_module(void)
1da177e4 246{
1da177e4
LT		 247 pci_unregister_driver(&e1000_driver);
248}
249
250module_exit(e1000_exit_module);
251
2db10a08
AK		 252static int e1000_request_irq(struct e1000_adapter *adapter)
253{
1dc32918 254 struct e1000_hw *hw = &adapter->hw;
2db10a08 255 struct net_device *netdev = adapter->netdev;
3e18826c 256 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 257 int irq_flags = IRQF_SHARED;
258 int err;
2db10a08 259
1dc32918 260 if (hw->mac_type >= e1000_82571) {
e94bd23f
AK		 261 adapter->have_msi = !pci_enable_msi(adapter->pdev);
262 if (adapter->have_msi) {
3e18826c 263 handler = e1000_intr_msi;
e94bd23f 264 irq_flags = 0;
2db10a08
AK		 265 }
266 }
e94bd23f
AK		 267
268 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
269 netdev);
270 if (err) {
271 if (adapter->have_msi)
272 pci_disable_msi(adapter->pdev);
2db10a08
AK		 273 DPRINTK(PROBE, ERR,
274 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 275 }
2db10a08
AK		 276
277 return err;
278}
279
280static void e1000_free_irq(struct e1000_adapter *adapter)
281{
282 struct net_device *netdev = adapter->netdev;
283
284 free_irq(adapter->pdev->irq, netdev);
285
2db10a08
AK		 286 if (adapter->have_msi)
287 pci_disable_msi(adapter->pdev);
2db10a08
AK		 288}
289
1da177e4
LT		 290/**
291 * e1000_irq_disable - Mask off interrupt generation on the NIC
292 * @adapter: board private structure
293 **/
294
64798845 295static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 296{
1dc32918
JP		 297 struct e1000_hw *hw = &adapter->hw;
298
299 ew32(IMC, ~0);
300 E1000_WRITE_FLUSH();
1da177e4
LT		 301 synchronize_irq(adapter->pdev->irq);
302}
303
304/**
305 * e1000_irq_enable - Enable default interrupt generation settings
306 * @adapter: board private structure
307 **/
308
64798845 309static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 310{
1dc32918
JP		 311 struct e1000_hw *hw = &adapter->hw;
312
313 ew32(IMS, IMS_ENABLE_MASK);
314 E1000_WRITE_FLUSH();
1da177e4 315}
3ad2cc67 316
64798845 317static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 318{
1dc32918 319 struct e1000_hw *hw = &adapter->hw;
2d7edb92 320 struct net_device *netdev = adapter->netdev;
1dc32918 321 u16 vid = hw->mng_cookie.vlan_id;
406874a7 322 u16 old_vid = adapter->mng_vlan_id;
96838a40 323 if (adapter->vlgrp) {
5c15bdec 324 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 325 if (hw->mng_cookie.status &
2d7edb92
MC		 326 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
327 e1000_vlan_rx_add_vid(netdev, vid);
328 adapter->mng_vlan_id = vid;
329 } else
330 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 331
406874a7 332 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 333 (vid != old_vid) &&
5c15bdec 334 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 335 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 336 } else
337 adapter->mng_vlan_id = vid;
2d7edb92
MC		 338 }
339}
b55ccb35
JK		 340
341/**
342 * e1000_release_hw_control - release control of the h/w to f/w
343 * @adapter: address of board private structure
344 *
345 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
346 * For ASF and Pass Through versions of f/w this means that the
347 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 348 * of the f/w this means that the network i/f is closed.
76c224bc 349 *
b55ccb35
JK		 350 **/
351
64798845 352static void e1000_release_hw_control(struct e1000_adapter *adapter)
b55ccb35 353{
406874a7
JP		 354 u32 ctrl_ext;
355 u32 swsm;
1dc32918 356 struct e1000_hw *hw = &adapter->hw;
b55ccb35
JK		 357
358 /* Let firmware taken over control of h/w */
1dc32918 359 switch (hw->mac_type) {
b55ccb35 360 case e1000_82573:
1dc32918
JP		 361 swsm = er32(SWSM);
362 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
31d76442
BA		 363 break;
364 case e1000_82571:
365 case e1000_82572:
366 case e1000_80003es2lan:
cd94dd0b 367 case e1000_ich8lan:
1dc32918
JP		 368 ctrl_ext = er32(CTRL_EXT);
369 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 370 break;
b55ccb35
JK		 371 default:
372 break;
373 }
374}
375
376/**
377 * e1000_get_hw_control - get control of the h/w from f/w
378 * @adapter: address of board private structure
379 *
380 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 381 * For ASF and Pass Through versions of f/w this means that
382 * the driver is loaded. For AMT version (only with 82573)
90fb5135 383 * of the f/w this means that the network i/f is open.
76c224bc 384 *
b55ccb35
JK		 385 **/
386
64798845 387static void e1000_get_hw_control(struct e1000_adapter *adapter)
b55ccb35 388{
406874a7
JP		 389 u32 ctrl_ext;
390 u32 swsm;
1dc32918 391 struct e1000_hw *hw = &adapter->hw;
90fb5135 392
b55ccb35 393 /* Let firmware know the driver has taken over */
1dc32918 394 switch (hw->mac_type) {
b55ccb35 395 case e1000_82573:
1dc32918
JP		 396 swsm = er32(SWSM);
397 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
b55ccb35 398 break;
31d76442
BA		 399 case e1000_82571:
400 case e1000_82572:
401 case e1000_80003es2lan:
cd94dd0b 402 case e1000_ich8lan:
1dc32918
JP		 403 ctrl_ext = er32(CTRL_EXT);
404 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 405 break;
b55ccb35
JK		 406 default:
407 break;
408 }
409}
410
64798845 411static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 412{
1dc32918
JP		 413 struct e1000_hw *hw = &adapter->hw;
414
0fccd0e9 415 if (adapter->en_mng_pt) {
1dc32918 416 u32 manc = er32(MANC);
0fccd0e9
JG		 417
418 /* disable hardware interception of ARP */
419 manc &= ~(E1000_MANC_ARP_EN);
420
421 /* enable receiving management packets to the host */
422 /* this will probably generate destination unreachable messages
423 * from the host OS, but the packets will be handled on SMBUS */
1dc32918
JP		 424 if (hw->has_manc2h) {
425 u32 manc2h = er32(MANC2H);
0fccd0e9
JG		 426
427 manc |= E1000_MANC_EN_MNG2HOST;
428#define E1000_MNG2HOST_PORT_623 (1 << 5)
429#define E1000_MNG2HOST_PORT_664 (1 << 6)
430 manc2h |= E1000_MNG2HOST_PORT_623;
431 manc2h |= E1000_MNG2HOST_PORT_664;
1dc32918 432 ew32(MANC2H, manc2h);
0fccd0e9
JG		 433 }
434
1dc32918 435 ew32(MANC, manc);
0fccd0e9
JG		 436 }
437}
438
64798845 439static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 440{
1dc32918
JP		 441 struct e1000_hw *hw = &adapter->hw;
442
0fccd0e9 443 if (adapter->en_mng_pt) {
1dc32918 444 u32 manc = er32(MANC);
0fccd0e9
JG		 445
446 /* re-enable hardware interception of ARP */
447 manc |= E1000_MANC_ARP_EN;
448
1dc32918 449 if (hw->has_manc2h)
0fccd0e9
JG		 450 manc &= ~E1000_MANC_EN_MNG2HOST;
451
452 /* don't explicitly have to mess with MANC2H since
453 * MANC has an enable disable that gates MANC2H */
454
1dc32918 455 ew32(MANC, manc);
0fccd0e9
JG		 456 }
457}
458
e0aac5a2
AK		 459/**
460 * e1000_configure - configure the hardware for RX and TX
461 * @adapter = private board structure
462 **/
463static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 464{
465 struct net_device *netdev = adapter->netdev;
2db10a08 466 int i;
1da177e4 467
db0ce50d 468 e1000_set_rx_mode(netdev);
1da177e4
LT		 469
470 e1000_restore_vlan(adapter);
0fccd0e9 471 e1000_init_manageability(adapter);
1da177e4
LT		 472
473 e1000_configure_tx(adapter);
474 e1000_setup_rctl(adapter);
475 e1000_configure_rx(adapter);
72d64a43
JK		 476 /* call E1000_DESC_UNUSED which always leaves
477 * at least 1 descriptor unused to make sure
478 * next_to_use != next_to_clean */
f56799ea 479 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 480 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 481 adapter->alloc_rx_buf(adapter, ring,
482 E1000_DESC_UNUSED(ring));
f56799ea 483 }
1da177e4 484
7bfa4816 485 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 486}
487
488int e1000_up(struct e1000_adapter *adapter)
489{
1dc32918
JP		 490 struct e1000_hw *hw = &adapter->hw;
491
e0aac5a2
AK		 492 /* hardware has been reset, we need to reload some things */
493 e1000_configure(adapter);
494
495 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 496
bea3348e 497 napi_enable(&adapter->napi);
c3570acb 498
5de55624
MC		 499 e1000_irq_enable(adapter);
500
79f3d399 501 /* fire a link change interrupt to start the watchdog */
1dc32918 502 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 503 return 0;
504}
505
79f05bf0
AK		 506/**
507 * e1000_power_up_phy - restore link in case the phy was powered down
508 * @adapter: address of board private structure
509 *
510 * The phy may be powered down to save power and turn off link when the
511 * driver is unloaded and wake on lan is not enabled (among others)
512 * *** this routine MUST be followed by a call to e1000_reset ***
513 *
514 **/
515
d658266e 516void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 517{
1dc32918 518 struct e1000_hw *hw = &adapter->hw;
406874a7 519 u16 mii_reg = 0;
79f05bf0
AK		 520
521 /* Just clear the power down bit to wake the phy back up */
1dc32918 522 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 523 /* according to the manual, the phy will retain its
524 * settings across a power-down/up cycle */
1dc32918 525 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 526 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 527 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 528 }
529}
530
531static void e1000_power_down_phy(struct e1000_adapter *adapter)
532{
1dc32918
JP		 533 struct e1000_hw *hw = &adapter->hw;
534
61c2505f 535 /* Power down the PHY so no link is implied when interface is down *
c3033b01 536 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 537 * (a) WoL is enabled
538 * (b) AMT is active
539 * (c) SoL/IDER session is active */
1dc32918
JP		 540 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
541 hw->media_type == e1000_media_type_copper) {
406874a7 542 u16 mii_reg = 0;
61c2505f 543
1dc32918 544 switch (hw->mac_type) {
61c2505f
BA		 545 case e1000_82540:
546 case e1000_82545:
547 case e1000_82545_rev_3:
548 case e1000_82546:
549 case e1000_82546_rev_3:
550 case e1000_82541:
551 case e1000_82541_rev_2:
552 case e1000_82547:
553 case e1000_82547_rev_2:
1dc32918 554 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 555 goto out;
556 break;
557 case e1000_82571:
558 case e1000_82572:
559 case e1000_82573:
560 case e1000_80003es2lan:
561 case e1000_ich8lan:
1dc32918
JP		 562 if (e1000_check_mng_mode(hw) ||
563 e1000_check_phy_reset_block(hw))
61c2505f
BA		 564 goto out;
565 break;
566 default:
567 goto out;
568 }
1dc32918 569 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 570 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 571 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 572 mdelay(1);
573 }
61c2505f
BA		 574out:
575 return;
79f05bf0
AK		 576}
577
64798845 578void e1000_down(struct e1000_adapter *adapter)
1da177e4 579{
a6c42322 580 struct e1000_hw *hw = &adapter->hw;
1da177e4 581 struct net_device *netdev = adapter->netdev;
a6c42322 582 u32 rctl, tctl;
1da177e4 583
1314bbf3
AK		 584 /* signal that we're down so the interrupt handler does not
585 * reschedule our watchdog timer */
586 set_bit(__E1000_DOWN, &adapter->flags);
587
a6c42322
JB		 588 /* disable receives in the hardware */
589 rctl = er32(RCTL);
590 ew32(RCTL, rctl & ~E1000_RCTL_EN);
591 /* flush and sleep below */
592
593 /* can be netif_tx_disable when NETIF_F_LLTX is removed */
594 netif_stop_queue(netdev);
595
596 /* disable transmits in the hardware */
597 tctl = er32(TCTL);
598 tctl &= ~E1000_TCTL_EN;
599 ew32(TCTL, tctl);
600 /* flush both disables and wait for them to finish */
601 E1000_WRITE_FLUSH();
602 msleep(10);
603
bea3348e 604 napi_disable(&adapter->napi);
c3570acb 605
1da177e4 606 e1000_irq_disable(adapter);
c1605eb3 607
1da177e4
LT		 608 del_timer_sync(&adapter->tx_fifo_stall_timer);
609 del_timer_sync(&adapter->watchdog_timer);
610 del_timer_sync(&adapter->phy_info_timer);
611
7bfa4816 612 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 613 adapter->link_speed = 0;
614 adapter->link_duplex = 0;
615 netif_carrier_off(netdev);
1da177e4
LT		 616
617 e1000_reset(adapter);
581d708e
MC		 618 e1000_clean_all_tx_rings(adapter);
619 e1000_clean_all_rx_rings(adapter);
1da177e4 620}
1da177e4 621
64798845 622void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 623{
624 WARN_ON(in_interrupt());
625 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
626 msleep(1);
627 e1000_down(adapter);
628 e1000_up(adapter);
629 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 630}
631
64798845 632void e1000_reset(struct e1000_adapter *adapter)
1da177e4 633{
1dc32918 634 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 635 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
636 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
c3033b01 637 bool legacy_pba_adjust = false;
1da177e4
LT		 638
639 /* Repartition Pba for greater than 9k mtu
640 * To take effect CTRL.RST is required.
641 */
642
1dc32918 643 switch (hw->mac_type) {
018ea44e
BA		 644 case e1000_82542_rev2_0:
645 case e1000_82542_rev2_1:
646 case e1000_82543:
647 case e1000_82544:
648 case e1000_82540:
649 case e1000_82541:
650 case e1000_82541_rev_2:
c3033b01 651 legacy_pba_adjust = true;
018ea44e
BA		 652 pba = E1000_PBA_48K;
653 break;
654 case e1000_82545:
655 case e1000_82545_rev_3:
656 case e1000_82546:
657 case e1000_82546_rev_3:
658 pba = E1000_PBA_48K;
659 break;
2d7edb92 660 case e1000_82547:
0e6ef3e0 661 case e1000_82547_rev_2:
c3033b01 662 legacy_pba_adjust = true;
2d7edb92
MC		 663 pba = E1000_PBA_30K;
664 break;
868d5309
MC		 665 case e1000_82571:
666 case e1000_82572:
6418ecc6 667 case e1000_80003es2lan:
868d5309
MC		 668 pba = E1000_PBA_38K;
669 break;
2d7edb92 670 case e1000_82573:
018ea44e 671 pba = E1000_PBA_20K;
2d7edb92 672 break;
cd94dd0b
AK		 673 case e1000_ich8lan:
674 pba = E1000_PBA_8K;
018ea44e
BA		 675 case e1000_undefined:
676 case e1000_num_macs:
2d7edb92
MC		 677 break;
678 }
679
c3033b01 680 if (legacy_pba_adjust) {
018ea44e
BA		 681 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
682 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 683
1dc32918 684 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 685 adapter->tx_fifo_head = 0;
686 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
687 adapter->tx_fifo_size =
688 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
689 atomic_set(&adapter->tx_fifo_stall, 0);
690 }
1dc32918 691 } else if (hw->max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
018ea44e 692 /* adjust PBA for jumbo frames */
1dc32918 693 ew32(PBA, pba);
018ea44e
BA		 694
695 /* To maintain wire speed transmits, the Tx FIFO should be
696 * large enough to accomodate two full transmit packets,
697 * rounded up to the next 1KB and expressed in KB. Likewise,
698 * the Rx FIFO should be large enough to accomodate at least
699 * one full receive packet and is similarly rounded up and
700 * expressed in KB. */
1dc32918 701 pba = er32(PBA);
018ea44e
BA		 702 /* upper 16 bits has Tx packet buffer allocation size in KB */
703 tx_space = pba >> 16;
704 /* lower 16 bits has Rx packet buffer allocation size in KB */
705 pba &= 0xffff;
706 /* don't include ethernet FCS because hardware appends/strips */
707 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
708 VLAN_TAG_SIZE;
709 min_tx_space = min_rx_space;
710 min_tx_space *= 2;
9099cfb9 711 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 712 min_tx_space >>= 10;
9099cfb9 713 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 714 min_rx_space >>= 10;
715
716 /* If current Tx allocation is less than the min Tx FIFO size,
717 * and the min Tx FIFO size is less than the current Rx FIFO
718 * allocation, take space away from current Rx allocation */
719 if (tx_space < min_tx_space &&
720 ((min_tx_space - tx_space) < pba)) {
721 pba = pba - (min_tx_space - tx_space);
722
723 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 724 switch (hw->mac_type) {
018ea44e
BA		 725 case e1000_82545 ... e1000_82546_rev_3:
726 pba &= ~(E1000_PBA_8K - 1);
727 break;
728 default:
729 break;
730 }
731
732 /* if short on rx space, rx wins and must trump tx
733 * adjustment or use Early Receive if available */
734 if (pba < min_rx_space) {
1dc32918 735 switch (hw->mac_type) {
018ea44e
BA		 736 case e1000_82573:
737 /* ERT enabled in e1000_configure_rx */
738 break;
739 default:
740 pba = min_rx_space;
741 break;
742 }
743 }
744 }
1da177e4 745 }
2d7edb92 746
1dc32918 747 ew32(PBA, pba);
1da177e4
LT		 748
749 /* flow control settings */
f11b7f85
JK		 750 /* Set the FC high water mark to 90% of the FIFO size.
751 * Required to clear last 3 LSB */
752 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 753 /* We can't use 90% on small FIFOs because the remainder
754 * would be less than 1 full frame. In this case, we size
755 * it to allow at least a full frame above the high water
756 * mark. */
757 if (pba < E1000_PBA_16K)
758 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85 759
1dc32918
JP		 760 hw->fc_high_water = fc_high_water_mark;
761 hw->fc_low_water = fc_high_water_mark - 8;
762 if (hw->mac_type == e1000_80003es2lan)
763 hw->fc_pause_time = 0xFFFF;
87041639 764 else
1dc32918
JP		 765 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
766 hw->fc_send_xon = 1;
767 hw->fc = hw->original_fc;
1da177e4 768
2d7edb92 769 /* Allow time for pending master requests to run */
1dc32918
JP		 770 e1000_reset_hw(hw);
771 if (hw->mac_type >= e1000_82544)
772 ew32(WUC, 0);
09ae3e88 773
1dc32918 774 if (e1000_init_hw(hw))
1da177e4 775 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 776 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 777
778 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918
JP		 779 if (hw->mac_type >= e1000_82544 &&
780 hw->mac_type <= e1000_82547_rev_2 &&
781 hw->autoneg == 1 &&
782 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
783 u32 ctrl = er32(CTRL);
3d5460a0
JB		 784 /* clear phy power management bit if we are in gig only mode,
785 * which if enabled will attempt negotiation to 100Mb, which
786 * can cause a loss of link at power off or driver unload */
787 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 788 ew32(CTRL, ctrl);
3d5460a0
JB		 789 }
790
1da177e4 791 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 792 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 793
1dc32918
JP		 794 e1000_reset_adaptive(hw);
795 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202
AK		 796
797 if (!adapter->smart_power_down &&
1dc32918
JP		 798 (hw->mac_type == e1000_82571 ||
799 hw->mac_type == e1000_82572)) {
406874a7 800 u16 phy_data = 0;
9a53a202
AK		 801 /* speed up time to link by disabling smart power down, ignore
802 * the return value of this function because there is nothing
803 * different we would do if it failed */
1dc32918 804 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 805 &phy_data);
806 phy_data &= ~IGP02E1000_PM_SPD;
1dc32918 807 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 808 phy_data);
809 }
810
0fccd0e9 811 e1000_release_manageability(adapter);
1da177e4
LT		 812}
813
67b3c27c
AK		 814/**
815 * Dump the eeprom for users having checksum issues
816 **/
b4ea895d 817static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 818{
819 struct net_device *netdev = adapter->netdev;
820 struct ethtool_eeprom eeprom;
821 const struct ethtool_ops *ops = netdev->ethtool_ops;
822 u8 *data;
823 int i;
824 u16 csum_old, csum_new = 0;
825
826 eeprom.len = ops->get_eeprom_len(netdev);
827 eeprom.offset = 0;
828
829 data = kmalloc(eeprom.len, GFP_KERNEL);
830 if (!data) {
831 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
832 " data\n");
833 return;
834 }
835
836 ops->get_eeprom(netdev, &eeprom, data);
837
838 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
839 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
840 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
841 csum_new += data[i] + (data[i + 1] << 8);
842 csum_new = EEPROM_SUM - csum_new;
843
844 printk(KERN_ERR "/*********************/\n");
845 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
846 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
847
848 printk(KERN_ERR "Offset Values\n");
849 printk(KERN_ERR "======== ======\n");
850 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
851
852 printk(KERN_ERR "Include this output when contacting your support "
853 "provider.\n");
854 printk(KERN_ERR "This is not a software error! Something bad "
855 "happened to your hardware or\n");
856 printk(KERN_ERR "EEPROM image. Ignoring this "
857 "problem could result in further problems,\n");
858 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
859 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
860 "which is invalid\n");
861 printk(KERN_ERR "and requires you to set the proper MAC "
862 "address manually before continuing\n");
863 printk(KERN_ERR "to enable this network device.\n");
864 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
865 "to your hardware vendor\n");
63cd31f6 866 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 867 printk(KERN_ERR "/*********************/\n");
868
869 kfree(data);
870}
871
81250297
TI		 872/**
873 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
874 * @pdev: PCI device information struct
875 *
876 * Return true if an adapter needs ioport resources
877 **/
878static int e1000_is_need_ioport(struct pci_dev *pdev)
879{
880 switch (pdev->device) {
881 case E1000_DEV_ID_82540EM:
882 case E1000_DEV_ID_82540EM_LOM:
883 case E1000_DEV_ID_82540EP:
884 case E1000_DEV_ID_82540EP_LOM:
885 case E1000_DEV_ID_82540EP_LP:
886 case E1000_DEV_ID_82541EI:
887 case E1000_DEV_ID_82541EI_MOBILE:
888 case E1000_DEV_ID_82541ER:
889 case E1000_DEV_ID_82541ER_LOM:
890 case E1000_DEV_ID_82541GI:
891 case E1000_DEV_ID_82541GI_LF:
892 case E1000_DEV_ID_82541GI_MOBILE:
893 case E1000_DEV_ID_82544EI_COPPER:
894 case E1000_DEV_ID_82544EI_FIBER:
895 case E1000_DEV_ID_82544GC_COPPER:
896 case E1000_DEV_ID_82544GC_LOM:
897 case E1000_DEV_ID_82545EM_COPPER:
898 case E1000_DEV_ID_82545EM_FIBER:
899 case E1000_DEV_ID_82546EB_COPPER:
900 case E1000_DEV_ID_82546EB_FIBER:
901 case E1000_DEV_ID_82546EB_QUAD_COPPER:
902 return true;
903 default:
904 return false;
905 }
906}
907
0e7614bc
SH		 908static const struct net_device_ops e1000_netdev_ops = {
909 .ndo_open = e1000_open,
910 .ndo_stop = e1000_close,
00829823 911 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 912 .ndo_get_stats = e1000_get_stats,
913 .ndo_set_rx_mode = e1000_set_rx_mode,
914 .ndo_set_mac_address = e1000_set_mac,
915 .ndo_tx_timeout = e1000_tx_timeout,
916 .ndo_change_mtu = e1000_change_mtu,
917 .ndo_do_ioctl = e1000_ioctl,
918 .ndo_validate_addr = eth_validate_addr,
919
920 .ndo_vlan_rx_register = e1000_vlan_rx_register,
921 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
922 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
923#ifdef CONFIG_NET_POLL_CONTROLLER
924 .ndo_poll_controller = e1000_netpoll,
925#endif
926};
927
1da177e4
LT		 928/**
929 * e1000_probe - Device Initialization Routine
930 * @pdev: PCI device information struct
931 * @ent: entry in e1000_pci_tbl
932 *
933 * Returns 0 on success, negative on failure
934 *
935 * e1000_probe initializes an adapter identified by a pci_dev structure.
936 * The OS initialization, configuring of the adapter private structure,
937 * and a hardware reset occur.
938 **/
1dc32918
JP		 939static int __devinit e1000_probe(struct pci_dev *pdev,
940 const struct pci_device_id *ent)
1da177e4
LT		 941{
942 struct net_device *netdev;
943 struct e1000_adapter *adapter;
1dc32918 944 struct e1000_hw *hw;
2d7edb92 945
1da177e4 946 static int cards_found = 0;
120cd576 947 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 948 int i, err, pci_using_dac;
406874a7
JP		 949 u16 eeprom_data = 0;
950 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 951 int bars, need_ioport;
0795af57 952
81250297
TI		 953 /* do not allocate ioport bars when not needed */
954 need_ioport = e1000_is_need_ioport(pdev);
955 if (need_ioport) {
956 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
957 err = pci_enable_device(pdev);
958 } else {
959 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 960 err = pci_enable_device_mem(pdev);
81250297 961 }
c7be73bc 962 if (err)
1da177e4
LT		 963 return err;
964
6a35528a
YH		 965 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
966 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1da177e4
LT		 967 pci_using_dac = 1;
968 } else {
284901a9 969 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc 970 if (err) {
284901a9 971 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc
JP		 972 if (err) {
973 E1000_ERR("No usable DMA configuration, "
974 "aborting\n");
975 goto err_dma;
976 }
1da177e4
LT		 977 }
978 pci_using_dac = 0;
979 }
980
81250297 981 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 982 if (err)
6dd62ab0 983 goto err_pci_reg;
1da177e4
LT		 984
985 pci_set_master(pdev);
986
6dd62ab0 987 err = -ENOMEM;
1da177e4 988 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 989 if (!netdev)
1da177e4 990 goto err_alloc_etherdev;
1da177e4 991
1da177e4
LT		 992 SET_NETDEV_DEV(netdev, &pdev->dev);
993
994 pci_set_drvdata(pdev, netdev);
60490fe0 995 adapter = netdev_priv(netdev);
1da177e4
LT		 996 adapter->netdev = netdev;
997 adapter->pdev = pdev;
1da177e4 998 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 999 adapter->bars = bars;
1000 adapter->need_ioport = need_ioport;
1da177e4 1001
1dc32918
JP		 1002 hw = &adapter->hw;
1003 hw->back = adapter;
1004
6dd62ab0 1005 err = -EIO;
275f165f 1006 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 1007 if (!hw->hw_addr)
1da177e4 1008 goto err_ioremap;
1da177e4 1009
81250297
TI		 1010 if (adapter->need_ioport) {
1011 for (i = BAR_1; i <= BAR_5; i++) {
1012 if (pci_resource_len(pdev, i) == 0)
1013 continue;
1014 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1015 hw->io_base = pci_resource_start(pdev, i);
1016 break;
1017 }
1da177e4
LT		 1018 }
1019 }
1020
0e7614bc 1021 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1022 e1000_set_ethtool_ops(netdev);
1da177e4 1023 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1024 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1025
0eb5a34c 1026 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1027
1da177e4
LT		 1028 adapter->bd_number = cards_found;
1029
1030 /* setup the private structure */
1031
c7be73bc
JP		 1032 err = e1000_sw_init(adapter);
1033 if (err)
1da177e4
LT		 1034 goto err_sw_init;
1035
6dd62ab0 1036 err = -EIO;
cd94dd0b
AK		 1037 /* Flash BAR mapping must happen after e1000_sw_init
1038 * because it depends on mac_type */
1dc32918 1039 if ((hw->mac_type == e1000_ich8lan) &&
cd94dd0b 1040 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
275f165f 1041 hw->flash_address = pci_ioremap_bar(pdev, 1);
1dc32918 1042 if (!hw->flash_address)
cd94dd0b 1043 goto err_flashmap;
cd94dd0b
AK		 1044 }
1045
1dc32918 1046 if (e1000_check_phy_reset_block(hw))
2d7edb92
MC		 1047 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1048
1dc32918 1049 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 1050 netdev->features = NETIF_F_SG |
1051 NETIF_F_HW_CSUM |
1052 NETIF_F_HW_VLAN_TX |
1053 NETIF_F_HW_VLAN_RX |
1054 NETIF_F_HW_VLAN_FILTER;
1dc32918 1055 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 1056 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 1057 }
1058
1dc32918
JP		 1059 if ((hw->mac_type >= e1000_82544) &&
1060 (hw->mac_type != e1000_82547))
1da177e4 1061 netdev->features |= NETIF_F_TSO;
2d7edb92 1062
1dc32918 1063 if (hw->mac_type > e1000_82547_rev_2)
87ca4e5b 1064 netdev->features |= NETIF_F_TSO6;
96838a40 1065 if (pci_using_dac)
1da177e4
LT		 1066 netdev->features |= NETIF_F_HIGHDMA;
1067
20501a69
PM		 1068 netdev->vlan_features |= NETIF_F_TSO;
1069 netdev->vlan_features |= NETIF_F_TSO6;
1070 netdev->vlan_features |= NETIF_F_HW_CSUM;
1071 netdev->vlan_features |= NETIF_F_SG;
1072
1dc32918 1073 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1074
cd94dd0b 1075 /* initialize eeprom parameters */
1dc32918 1076 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 1077 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1078 goto err_eeprom;
cd94dd0b
AK		 1079 }
1080
96838a40 1081 /* before reading the EEPROM, reset the controller to
1da177e4 1082 * put the device in a known good starting state */
96838a40 1083
1dc32918 1084 e1000_reset_hw(hw);
1da177e4
LT		 1085
1086 /* make sure the EEPROM is good */
1dc32918 1087 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 1088 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 1089 e1000_dump_eeprom(adapter);
1090 /*
1091 * set MAC address to all zeroes to invalidate and temporary
1092 * disable this device for the user. This blocks regular
1093 * traffic while still permitting ethtool ioctls from reaching
1094 * the hardware as well as allowing the user to run the
1095 * interface after manually setting a hw addr using
1096 * `ip set address`
1097 */
1dc32918 1098 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1099 } else {
1100 /* copy the MAC address out of the EEPROM */
1dc32918 1101 if (e1000_read_mac_addr(hw))
67b3c27c 1102 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 1103 }
67b3c27c 1104 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 1105 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1106 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1107
67b3c27c 1108 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 1109 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 1110
1dc32918 1111 e1000_get_bus_info(hw);
1da177e4
LT		 1112
1113 init_timer(&adapter->tx_fifo_stall_timer);
1114 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 1115 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 1116
1117 init_timer(&adapter->watchdog_timer);
1118 adapter->watchdog_timer.function = &e1000_watchdog;
1119 adapter->watchdog_timer.data = (unsigned long) adapter;
1120
1da177e4
LT		 1121 init_timer(&adapter->phy_info_timer);
1122 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 1123 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 1124
65f27f38 1125 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1126
1da177e4
LT		 1127 e1000_check_options(adapter);
1128
1129 /* Initial Wake on LAN setting
1130 * If APM wake is enabled in the EEPROM,
1131 * enable the ACPI Magic Packet filter
1132 */
1133
1dc32918 1134 switch (hw->mac_type) {
1da177e4
LT		 1135 case e1000_82542_rev2_0:
1136 case e1000_82542_rev2_1:
1137 case e1000_82543:
1138 break;
1139 case e1000_82544:
1dc32918 1140 e1000_read_eeprom(hw,
1da177e4
LT		 1141 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1142 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1143 break;
cd94dd0b 1144 case e1000_ich8lan:
1dc32918 1145 e1000_read_eeprom(hw,
cd94dd0b
AK		 1146 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1147 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1148 break;
1da177e4
LT		 1149 case e1000_82546:
1150 case e1000_82546_rev_3:
fd803241 1151 case e1000_82571:
6418ecc6 1152 case e1000_80003es2lan:
1dc32918
JP		 1153 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1154 e1000_read_eeprom(hw,
1da177e4
LT		 1155 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1156 break;
1157 }
1158 /* Fall Through */
1159 default:
1dc32918 1160 e1000_read_eeprom(hw,
1da177e4
LT		 1161 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1162 break;
1163 }
96838a40 1164 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1165 adapter->eeprom_wol |= E1000_WUFC_MAG;
1166
1167 /* now that we have the eeprom settings, apply the special cases
1168 * where the eeprom may be wrong or the board simply won't support
1169 * wake on lan on a particular port */
1170 switch (pdev->device) {
1171 case E1000_DEV_ID_82546GB_PCIE:
1172 adapter->eeprom_wol = 0;
1173 break;
1174 case E1000_DEV_ID_82546EB_FIBER:
1175 case E1000_DEV_ID_82546GB_FIBER:
1176 case E1000_DEV_ID_82571EB_FIBER:
1177 /* Wake events only supported on port A for dual fiber
1178 * regardless of eeprom setting */
1dc32918 1179 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1180 adapter->eeprom_wol = 0;
1181 break;
1182 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1183 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1184 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1185 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
f4ec7f98 1186 case E1000_DEV_ID_82571PT_QUAD_COPPER:
120cd576
JB		 1187 /* if quad port adapter, disable WoL on all but port A */
1188 if (global_quad_port_a != 0)
1189 adapter->eeprom_wol = 0;
1190 else
1191 adapter->quad_port_a = 1;
1192 /* Reset for multiple quad port adapters */
1193 if (++global_quad_port_a == 4)
1194 global_quad_port_a = 0;
1195 break;
1196 }
1197
1198 /* initialize the wol settings based on the eeprom settings */
1199 adapter->wol = adapter->eeprom_wol;
de126489 1200 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1201
fb3d47d4 1202 /* print bus type/speed/width info */
fb3d47d4
JK		 1203 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1204 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1205 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1206 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1207 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1208 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1209 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1210 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1211 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1212 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1213 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1214 "32-bit"));
fb3d47d4 1215
e174961c 1216 printk("%pM\n", netdev->dev_addr);
fb3d47d4 1217
1dc32918 1218 if (hw->bus_type == e1000_bus_type_pci_express) {
14782ca8
AK		 1219 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1220 "longer be supported by this driver in the future.\n",
1221 pdev->vendor, pdev->device);
1222 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1223 "driver instead.\n");
1224 }
1225
1da177e4
LT		 1226 /* reset the hardware with the new settings */
1227 e1000_reset(adapter);
1228
b55ccb35
JK		 1229 /* If the controller is 82573 and f/w is AMT, do not set
1230 * DRV_LOAD until the interface is up. For all other cases,
1231 * let the f/w know that the h/w is now under the control
1232 * of the driver. */
1dc32918
JP		 1233 if (hw->mac_type != e1000_82573 ||
1234 !e1000_check_mng_mode(hw))
b55ccb35 1235 e1000_get_hw_control(adapter);
2d7edb92 1236
1314bbf3
AK		 1237 /* tell the stack to leave us alone until e1000_open() is called */
1238 netif_carrier_off(netdev);
1239 netif_stop_queue(netdev);
416b5d10
AK		 1240
1241 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1242 err = register_netdev(netdev);
1243 if (err)
416b5d10 1244 goto err_register;
1314bbf3 1245
1da177e4
LT		 1246 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1247
1248 cards_found++;
1249 return 0;
1250
1251err_register:
6dd62ab0
VA		 1252 e1000_release_hw_control(adapter);
1253err_eeprom:
1dc32918
JP		 1254 if (!e1000_check_phy_reset_block(hw))
1255 e1000_phy_hw_reset(hw);
6dd62ab0 1256
1dc32918
JP		 1257 if (hw->flash_address)
1258 iounmap(hw->flash_address);
cd94dd0b 1259err_flashmap:
6dd62ab0
VA		 1260 kfree(adapter->tx_ring);
1261 kfree(adapter->rx_ring);
1da177e4 1262err_sw_init:
1dc32918 1263 iounmap(hw->hw_addr);
1da177e4
LT		 1264err_ioremap:
1265 free_netdev(netdev);
1266err_alloc_etherdev:
81250297 1267 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1268err_pci_reg:
1269err_dma:
1270 pci_disable_device(pdev);
1da177e4
LT		 1271 return err;
1272}
1273
1274/**
1275 * e1000_remove - Device Removal Routine
1276 * @pdev: PCI device information struct
1277 *
1278 * e1000_remove is called by the PCI subsystem to alert the driver
1279 * that it should release a PCI device. The could be caused by a
1280 * Hot-Plug event, or because the driver is going to be removed from
1281 * memory.
1282 **/
1283
64798845 1284static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1285{
1286 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1287 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1288 struct e1000_hw *hw = &adapter->hw;
1da177e4 1289
28e53bdd 1290 cancel_work_sync(&adapter->reset_task);
be2b28ed 1291
0fccd0e9 1292 e1000_release_manageability(adapter);
1da177e4 1293
b55ccb35
JK		 1294 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1295 * would have already happened in close and is redundant. */
1296 e1000_release_hw_control(adapter);
2d7edb92 1297
bea3348e
SH		 1298 unregister_netdev(netdev);
1299
1dc32918
JP		 1300 if (!e1000_check_phy_reset_block(hw))
1301 e1000_phy_hw_reset(hw);
1da177e4 1302
24025e4e
MC		 1303 kfree(adapter->tx_ring);
1304 kfree(adapter->rx_ring);
24025e4e 1305
1dc32918
JP		 1306 iounmap(hw->hw_addr);
1307 if (hw->flash_address)
1308 iounmap(hw->flash_address);
81250297 1309 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1310
1311 free_netdev(netdev);
1312
1313 pci_disable_device(pdev);
1314}
1315
1316/**
1317 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1318 * @adapter: board private structure to initialize
1319 *
1320 * e1000_sw_init initializes the Adapter private data structure.
1321 * Fields are initialized based on PCI device information and
1322 * OS network device settings (MTU size).
1323 **/
1324
64798845 1325static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1326{
1327 struct e1000_hw *hw = &adapter->hw;
1328 struct net_device *netdev = adapter->netdev;
1329 struct pci_dev *pdev = adapter->pdev;
1330
1331 /* PCI config space info */
1332
1333 hw->vendor_id = pdev->vendor;
1334 hw->device_id = pdev->device;
1335 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1336 hw->subsystem_id = pdev->subsystem_device;
44c10138 1337 hw->revision_id = pdev->revision;
1da177e4
LT		 1338
1339 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1340
eb0f8054 1341 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1342 hw->max_frame_size = netdev->mtu +
1343 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1344 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1345
1346 /* identify the MAC */
1347
96838a40 1348 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1349 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1350 return -EIO;
1351 }
1352
96838a40 1353 switch (hw->mac_type) {
1da177e4
LT		 1354 default:
1355 break;
1356 case e1000_82541:
1357 case e1000_82547:
1358 case e1000_82541_rev_2:
1359 case e1000_82547_rev_2:
1360 hw->phy_init_script = 1;
1361 break;
1362 }
1363
1364 e1000_set_media_type(hw);
1365
c3033b01
JP		 1366 hw->wait_autoneg_complete = false;
1367 hw->tbi_compatibility_en = true;
1368 hw->adaptive_ifs = true;
1da177e4
LT		 1369
1370 /* Copper options */
1371
96838a40 1372 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1373 hw->mdix = AUTO_ALL_MODES;
c3033b01 1374 hw->disable_polarity_correction = false;
1da177e4
LT		 1375 hw->master_slave = E1000_MASTER_SLAVE;
1376 }
1377
f56799ea
JK		 1378 adapter->num_tx_queues = 1;
1379 adapter->num_rx_queues = 1;
581d708e
MC		 1380
1381 if (e1000_alloc_queues(adapter)) {
1382 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1383 return -ENOMEM;
1384 }
1385
47313054 1386 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1387 e1000_irq_disable(adapter);
1388
1da177e4 1389 spin_lock_init(&adapter->stats_lock);
1da177e4 1390
1314bbf3
AK		 1391 set_bit(__E1000_DOWN, &adapter->flags);
1392
1da177e4
LT		 1393 return 0;
1394}
1395
581d708e
MC		 1396/**
1397 * e1000_alloc_queues - Allocate memory for all rings
1398 * @adapter: board private structure to initialize
1399 *
1400 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1401 * number of queues at compile-time.
581d708e
MC		 1402 **/
1403
64798845 1404static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1405{
1c7e5b12
YB		 1406 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1407 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1408 if (!adapter->tx_ring)
1409 return -ENOMEM;
581d708e 1410
1c7e5b12
YB		 1411 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1412 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1413 if (!adapter->rx_ring) {
1414 kfree(adapter->tx_ring);
1415 return -ENOMEM;
1416 }
581d708e 1417
581d708e
MC		 1418 return E1000_SUCCESS;
1419}
1420
1da177e4
LT		 1421/**
1422 * e1000_open - Called when a network interface is made active
1423 * @netdev: network interface device structure
1424 *
1425 * Returns 0 on success, negative value on failure
1426 *
1427 * The open entry point is called when a network interface is made
1428 * active by the system (IFF_UP). At this point all resources needed
1429 * for transmit and receive operations are allocated, the interrupt
1430 * handler is registered with the OS, the watchdog timer is started,
1431 * and the stack is notified that the interface is ready.
1432 **/
1433
64798845 1434static int e1000_open(struct net_device *netdev)
1da177e4 1435{
60490fe0 1436 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1437 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1438 int err;
1439
2db10a08 1440 /* disallow open during test */
1314bbf3 1441 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1442 return -EBUSY;
1443
1da177e4 1444 /* allocate transmit descriptors */
e0aac5a2
AK		 1445 err = e1000_setup_all_tx_resources(adapter);
1446 if (err)
1da177e4
LT		 1447 goto err_setup_tx;
1448
1449 /* allocate receive descriptors */
e0aac5a2 1450 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1451 if (err)
e0aac5a2 1452 goto err_setup_rx;
b5bf28cd 1453
79f05bf0
AK		 1454 e1000_power_up_phy(adapter);
1455
2d7edb92 1456 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1457 if ((hw->mng_cookie.status &
2d7edb92
MC		 1458 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1459 e1000_update_mng_vlan(adapter);
1460 }
1da177e4 1461
b55ccb35
JK		 1462 /* If AMT is enabled, let the firmware know that the network
1463 * interface is now open */
1dc32918
JP		 1464 if (hw->mac_type == e1000_82573 &&
1465 e1000_check_mng_mode(hw))
b55ccb35
JK		 1466 e1000_get_hw_control(adapter);
1467
e0aac5a2
AK		 1468 /* before we allocate an interrupt, we must be ready to handle it.
1469 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1470 * as soon as we call pci_request_irq, so we have to setup our
1471 * clean_rx handler before we do so. */
1472 e1000_configure(adapter);
1473
1474 err = e1000_request_irq(adapter);
1475 if (err)
1476 goto err_req_irq;
1477
1478 /* From here on the code is the same as e1000_up() */
1479 clear_bit(__E1000_DOWN, &adapter->flags);
1480
bea3348e 1481 napi_enable(&adapter->napi);
47313054 1482
e0aac5a2
AK		 1483 e1000_irq_enable(adapter);
1484
076152d5
BH		 1485 netif_start_queue(netdev);
1486
e0aac5a2 1487 /* fire a link status change interrupt to start the watchdog */
1dc32918 1488 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1489
1da177e4
LT		 1490 return E1000_SUCCESS;
1491
b5bf28cd 1492err_req_irq:
e0aac5a2
AK		 1493 e1000_release_hw_control(adapter);
1494 e1000_power_down_phy(adapter);
581d708e 1495 e1000_free_all_rx_resources(adapter);
1da177e4 1496err_setup_rx:
581d708e 1497 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1498err_setup_tx:
1499 e1000_reset(adapter);
1500
1501 return err;
1502}
1503
1504/**
1505 * e1000_close - Disables a network interface
1506 * @netdev: network interface device structure
1507 *
1508 * Returns 0, this is not allowed to fail
1509 *
1510 * The close entry point is called when an interface is de-activated
1511 * by the OS. The hardware is still under the drivers control, but
1512 * needs to be disabled. A global MAC reset is issued to stop the
1513 * hardware, and all transmit and receive resources are freed.
1514 **/
1515
64798845 1516static int e1000_close(struct net_device *netdev)
1da177e4 1517{
60490fe0 1518 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1519 struct e1000_hw *hw = &adapter->hw;
1da177e4 1520
2db10a08 1521 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1522 e1000_down(adapter);
79f05bf0 1523 e1000_power_down_phy(adapter);
2db10a08 1524 e1000_free_irq(adapter);
1da177e4 1525
581d708e
MC		 1526 e1000_free_all_tx_resources(adapter);
1527 e1000_free_all_rx_resources(adapter);
1da177e4 1528
4666560a
BA		 1529 /* kill manageability vlan ID if supported, but not if a vlan with
1530 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1531 if ((hw->mng_cookie.status &
4666560a
BA		 1532 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1533 !(adapter->vlgrp &&
5c15bdec 1534 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1535 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1536 }
b55ccb35
JK		 1537
1538 /* If AMT is enabled, let the firmware know that the network
1539 * interface is now closed */
1dc32918
JP		 1540 if (hw->mac_type == e1000_82573 &&
1541 e1000_check_mng_mode(hw))
b55ccb35
JK		 1542 e1000_release_hw_control(adapter);
1543
1da177e4
LT		 1544 return 0;
1545}
1546
1547/**
1548 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1549 * @adapter: address of board private structure
2d7edb92
MC		 1550 * @start: address of beginning of memory
1551 * @len: length of memory
1da177e4 1552 **/
64798845
JP		 1553static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1554 unsigned long len)
1da177e4 1555{
1dc32918 1556 struct e1000_hw *hw = &adapter->hw;
e982f17c 1557 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1558 unsigned long end = begin + len;
1559
2648345f
MC		 1560 /* First rev 82545 and 82546 need to not allow any memory
1561 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1562 if (hw->mac_type == e1000_82545 ||
1563 hw->mac_type == e1000_82546) {
c3033b01 1564 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1565 }
1566
c3033b01 1567 return true;
1da177e4
LT		 1568}
1569
1570/**
1571 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1572 * @adapter: board private structure
581d708e 1573 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1574 *
1575 * Return 0 on success, negative on failure
1576 **/
1577
64798845
JP		 1578static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1579 struct e1000_tx_ring *txdr)
1da177e4 1580{
1da177e4
LT		 1581 struct pci_dev *pdev = adapter->pdev;
1582 int size;
1583
1584 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1585 txdr->buffer_info = vmalloc(size);
96838a40 1586 if (!txdr->buffer_info) {
2648345f
MC		 1587 DPRINTK(PROBE, ERR,
1588 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1589 return -ENOMEM;
1590 }
1591 memset(txdr->buffer_info, 0, size);
1592
1593 /* round up to nearest 4K */
1594
1595 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1596 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1597
1598 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1599 if (!txdr->desc) {
1da177e4 1600setup_tx_desc_die:
1da177e4 1601 vfree(txdr->buffer_info);
2648345f
MC		 1602 DPRINTK(PROBE, ERR,
1603 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1604 return -ENOMEM;
1605 }
1606
2648345f 1607 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1608 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1609 void *olddesc = txdr->desc;
1610 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1611 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1612 "at %p\n", txdr->size, txdr->desc);
1613 /* Try again, without freeing the previous */
1da177e4 1614 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1615 /* Failed allocation, critical failure */
96838a40 1616 if (!txdr->desc) {
1da177e4
LT		 1617 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1618 goto setup_tx_desc_die;
1619 }
1620
1621 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1622 /* give up */
2648345f
MC		 1623 pci_free_consistent(pdev, txdr->size, txdr->desc,
1624 txdr->dma);
1da177e4
LT		 1625 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1626 DPRINTK(PROBE, ERR,
2648345f
MC		 1627 "Unable to allocate aligned memory "
1628 "for the transmit descriptor ring\n");
1da177e4
LT		 1629 vfree(txdr->buffer_info);
1630 return -ENOMEM;
1631 } else {
2648345f 1632 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1633 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1634 }
1635 }
1636 memset(txdr->desc, 0, txdr->size);
1637
1638 txdr->next_to_use = 0;
1639 txdr->next_to_clean = 0;
1640
1641 return 0;
1642}
1643
581d708e
MC		 1644/**
1645 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1646 * (Descriptors) for all queues
1647 * @adapter: board private structure
1648 *
581d708e
MC		 1649 * Return 0 on success, negative on failure
1650 **/
1651
64798845 1652int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1653{
1654 int i, err = 0;
1655
f56799ea 1656 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1657 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1658 if (err) {
1659 DPRINTK(PROBE, ERR,
1660 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1661 for (i-- ; i >= 0; i--)
1662 e1000_free_tx_resources(adapter,
1663 &adapter->tx_ring[i]);
581d708e
MC		 1664 break;
1665 }
1666 }
1667
1668 return err;
1669}
1670
1da177e4
LT		 1671/**
1672 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1673 * @adapter: board private structure
1674 *
1675 * Configure the Tx unit of the MAC after a reset.
1676 **/
1677
64798845 1678static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1679{
406874a7 1680 u64 tdba;
581d708e 1681 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1682 u32 tdlen, tctl, tipg, tarc;
1683 u32 ipgr1, ipgr2;
1da177e4
LT		 1684
1685 /* Setup the HW Tx Head and Tail descriptor pointers */
1686
f56799ea 1687 switch (adapter->num_tx_queues) {
24025e4e
MC		 1688 case 1:
1689 default:
581d708e
MC		 1690 tdba = adapter->tx_ring[0].dma;
1691 tdlen = adapter->tx_ring[0].count *
1692 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1693 ew32(TDLEN, tdlen);
1694 ew32(TDBAH, (tdba >> 32));
1695 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1696 ew32(TDT, 0);
1697 ew32(TDH, 0);
6a951698
AK		 1698 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1699 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1700 break;
1701 }
1da177e4
LT		 1702
1703 /* Set the default values for the Tx Inter Packet Gap timer */
1dc32918 1704 if (hw->mac_type <= e1000_82547_rev_2 &&
d89b6c67
JB		 1705 (hw->media_type == e1000_media_type_fiber ||
1706 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1707 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1708 else
1709 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1710
581d708e 1711 switch (hw->mac_type) {
1da177e4
LT		 1712 case e1000_82542_rev2_0:
1713 case e1000_82542_rev2_1:
1714 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1715 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1716 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1717 break;
87041639
JK		 1718 case e1000_80003es2lan:
1719 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1720 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1721 break;
1da177e4 1722 default:
0fadb059
JK		 1723 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1724 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1725 break;
1da177e4 1726 }
0fadb059
JK		 1727 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1728 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1729 ew32(TIPG, tipg);
1da177e4
LT		 1730
1731 /* Set the Tx Interrupt Delay register */
1732
1dc32918 1733 ew32(TIDV, adapter->tx_int_delay);
581d708e 1734 if (hw->mac_type >= e1000_82540)
1dc32918 1735 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1736
1737 /* Program the Transmit Control Register */
1738
1dc32918 1739 tctl = er32(TCTL);
1da177e4 1740 tctl &= ~E1000_TCTL_CT;
7e6c9861 1741 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1742 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1743
2ae76d98 1744 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1dc32918 1745 tarc = er32(TARC0);
90fb5135
AK		 1746 /* set the speed mode bit, we'll clear it if we're not at
1747 * gigabit link later */
09ae3e88 1748 tarc |= (1 << 21);
1dc32918 1749 ew32(TARC0, tarc);
87041639 1750 } else if (hw->mac_type == e1000_80003es2lan) {
1dc32918 1751 tarc = er32(TARC0);
87041639 1752 tarc |= 1;
1dc32918
JP		 1753 ew32(TARC0, tarc);
1754 tarc = er32(TARC1);
87041639 1755 tarc |= 1;
1dc32918 1756 ew32(TARC1, tarc);
2ae76d98
MC		 1757 }
1758
581d708e 1759 e1000_config_collision_dist(hw);
1da177e4
LT		 1760
1761 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1762 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1763
1764 /* only set IDE if we are delaying interrupts using the timers */
1765 if (adapter->tx_int_delay)
1766 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1767
581d708e 1768 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1769 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1770 else
1771 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1772
1773 /* Cache if we're 82544 running in PCI-X because we'll
1774 * need this to apply a workaround later in the send path. */
581d708e
MC		 1775 if (hw->mac_type == e1000_82544 &&
1776 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1777 adapter->pcix_82544 = 1;
7e6c9861 1778
1dc32918 1779 ew32(TCTL, tctl);
7e6c9861 1780
1da177e4
LT		 1781}
1782
1783/**
1784 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1785 * @adapter: board private structure
581d708e 1786 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1787 *
1788 * Returns 0 on success, negative on failure
1789 **/
1790
64798845
JP		 1791static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1792 struct e1000_rx_ring *rxdr)
1da177e4 1793{
1dc32918 1794 struct e1000_hw *hw = &adapter->hw;
1da177e4 1795 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1796 int size, desc_len;
1da177e4
LT		 1797
1798 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1799 rxdr->buffer_info = vmalloc(size);
581d708e 1800 if (!rxdr->buffer_info) {
2648345f
MC		 1801 DPRINTK(PROBE, ERR,
1802 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1803 return -ENOMEM;
1804 }
1805 memset(rxdr->buffer_info, 0, size);
1806
1dc32918 1807 if (hw->mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1808 desc_len = sizeof(struct e1000_rx_desc);
1809 else
1810 desc_len = sizeof(union e1000_rx_desc_packet_split);
1811
1da177e4
LT		 1812 /* Round up to nearest 4K */
1813
2d7edb92 1814 rxdr->size = rxdr->count * desc_len;
9099cfb9 1815 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1816
1817 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1818
581d708e
MC		 1819 if (!rxdr->desc) {
1820 DPRINTK(PROBE, ERR,
1821 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1822setup_rx_desc_die:
1da177e4
LT		 1823 vfree(rxdr->buffer_info);
1824 return -ENOMEM;
1825 }
1826
2648345f 1827 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1828 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1829 void *olddesc = rxdr->desc;
1830 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1831 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1832 "at %p\n", rxdr->size, rxdr->desc);
1833 /* Try again, without freeing the previous */
1da177e4 1834 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1835 /* Failed allocation, critical failure */
581d708e 1836 if (!rxdr->desc) {
1da177e4 1837 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1838 DPRINTK(PROBE, ERR,
1839 "Unable to allocate memory "
1840 "for the receive descriptor ring\n");
1da177e4
LT		 1841 goto setup_rx_desc_die;
1842 }
1843
1844 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1845 /* give up */
2648345f
MC		 1846 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1847 rxdr->dma);
1da177e4 1848 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1849 DPRINTK(PROBE, ERR,
1850 "Unable to allocate aligned memory "
1851 "for the receive descriptor ring\n");
581d708e 1852 goto setup_rx_desc_die;
1da177e4 1853 } else {
2648345f 1854 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1855 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1856 }
1857 }
1858 memset(rxdr->desc, 0, rxdr->size);
1859
1860 rxdr->next_to_clean = 0;
1861 rxdr->next_to_use = 0;
1862
1863 return 0;
1864}
1865
581d708e
MC		 1866/**
1867 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1868 * (Descriptors) for all queues
1869 * @adapter: board private structure
1870 *
581d708e
MC		 1871 * Return 0 on success, negative on failure
1872 **/
1873
64798845 1874int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1875{
1876 int i, err = 0;
1877
f56799ea 1878 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1879 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1880 if (err) {
1881 DPRINTK(PROBE, ERR,
1882 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1883 for (i-- ; i >= 0; i--)
1884 e1000_free_rx_resources(adapter,
1885 &adapter->rx_ring[i]);
581d708e
MC		 1886 break;
1887 }
1888 }
1889
1890 return err;
1891}
1892
1da177e4 1893/**
2648345f 1894 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1895 * @adapter: Board private structure
1896 **/
64798845 1897static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1898{
1dc32918 1899 struct e1000_hw *hw = &adapter->hw;
630b25cd 1900 u32 rctl;
1da177e4 1901
1dc32918 1902 rctl = er32(RCTL);
1da177e4
LT		 1903
1904 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1905
1906 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1907 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1908 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1909
1dc32918 1910 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1911 rctl |= E1000_RCTL_SBP;
1912 else
1913 rctl &= ~E1000_RCTL_SBP;
1914
2d7edb92
MC		 1915 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1916 rctl &= ~E1000_RCTL_LPE;
1917 else
1918 rctl |= E1000_RCTL_LPE;
1919
1da177e4 1920 /* Setup buffer sizes */
9e2feace
AK		 1921 rctl &= ~E1000_RCTL_SZ_4096;
1922 rctl |= E1000_RCTL_BSEX;
1923 switch (adapter->rx_buffer_len) {
1924 case E1000_RXBUFFER_256:
1925 rctl |= E1000_RCTL_SZ_256;
1926 rctl &= ~E1000_RCTL_BSEX;
1927 break;
1928 case E1000_RXBUFFER_512:
1929 rctl |= E1000_RCTL_SZ_512;
1930 rctl &= ~E1000_RCTL_BSEX;
1931 break;
1932 case E1000_RXBUFFER_1024:
1933 rctl |= E1000_RCTL_SZ_1024;
1934 rctl &= ~E1000_RCTL_BSEX;
1935 break;
a1415ee6
JK		 1936 case E1000_RXBUFFER_2048:
1937 default:
1938 rctl |= E1000_RCTL_SZ_2048;
1939 rctl &= ~E1000_RCTL_BSEX;
1940 break;
1941 case E1000_RXBUFFER_4096:
1942 rctl |= E1000_RCTL_SZ_4096;
1943 break;
1944 case E1000_RXBUFFER_8192:
1945 rctl |= E1000_RCTL_SZ_8192;
1946 break;
1947 case E1000_RXBUFFER_16384:
1948 rctl |= E1000_RCTL_SZ_16384;
1949 break;
2d7edb92
MC		 1950 }
1951
1dc32918 1952 ew32(RCTL, rctl);
1da177e4
LT		 1953}
1954
1955/**
1956 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1957 * @adapter: board private structure
1958 *
1959 * Configure the Rx unit of the MAC after a reset.
1960 **/
1961
64798845 1962static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1963{
406874a7 1964 u64 rdba;
581d708e 1965 struct e1000_hw *hw = &adapter->hw;
406874a7 1966 u32 rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1967
630b25cd
BJ		 1968 rdlen = adapter->rx_ring[0].count *
1969 sizeof(struct e1000_rx_desc);
1970 adapter->clean_rx = e1000_clean_rx_irq;
1971 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1da177e4
LT		 1972
1973 /* disable receives while setting up the descriptors */
1dc32918
JP		 1974 rctl = er32(RCTL);
1975 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1976
1977 /* set the Receive Delay Timer Register */
1dc32918 1978 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1979
581d708e 1980 if (hw->mac_type >= e1000_82540) {
1dc32918 1981 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1982 if (adapter->itr_setting != 0)
1dc32918 1983 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1984 }
1985
2ae76d98 1986 if (hw->mac_type >= e1000_82571) {
1dc32918 1987 ctrl_ext = er32(CTRL_EXT);
1e613fd9 1988 /* Reset delay timers after every interrupt */
6fc7a7ec 1989 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
835bb129 1990 /* Auto-Mask interrupts upon ICR access */
1e613fd9 1991 ctrl_ext |= E1000_CTRL_EXT_IAME;
1dc32918 1992 ew32(IAM, 0xffffffff);
1dc32918
JP		 1993 ew32(CTRL_EXT, ctrl_ext);
1994 E1000_WRITE_FLUSH();
2ae76d98
MC		 1995 }
1996
581d708e
MC		 1997 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1998 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1999 switch (adapter->num_rx_queues) {
24025e4e
MC		 2000 case 1:
2001 default:
581d708e 2002 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 2003 ew32(RDLEN, rdlen);
2004 ew32(RDBAH, (rdba >> 32));
2005 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
2006 ew32(RDT, 0);
2007 ew32(RDH, 0);
6a951698
AK		 2008 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2009 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2010 break;
24025e4e
MC		 2011 }
2012
1da177e4 2013 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 2014 if (hw->mac_type >= e1000_82543) {
1dc32918 2015 rxcsum = er32(RXCSUM);
630b25cd 2016 if (adapter->rx_csum)
2d7edb92 2017 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 2018 else
2d7edb92 2019 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 2020 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 2021 ew32(RXCSUM, rxcsum);
1da177e4
LT		 2022 }
2023
2024 /* Enable Receives */
1dc32918 2025 ew32(RCTL, rctl);
1da177e4
LT		 2026}
2027
2028/**
581d708e 2029 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2030 * @adapter: board private structure
581d708e 2031 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2032 *
2033 * Free all transmit software resources
2034 **/
2035
64798845
JP		 2036static void e1000_free_tx_resources(struct e1000_adapter *adapter,
2037 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2038{
2039 struct pci_dev *pdev = adapter->pdev;
2040
581d708e 2041 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2042
581d708e
MC		 2043 vfree(tx_ring->buffer_info);
2044 tx_ring->buffer_info = NULL;
1da177e4 2045
581d708e 2046 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2047
581d708e
MC		 2048 tx_ring->desc = NULL;
2049}
2050
2051/**
2052 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2053 * @adapter: board private structure
2054 *
2055 * Free all transmit software resources
2056 **/
2057
64798845 2058void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2059{
2060 int i;
2061
f56799ea 2062 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2063 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2064}
2065
64798845
JP		 2066static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2067 struct e1000_buffer *buffer_info)
1da177e4 2068{
d20b606c 2069 buffer_info->dma = 0;
a9ebadd6 2070 if (buffer_info->skb) {
d20b606c
JB		 2071 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
2072 DMA_TO_DEVICE);
1da177e4 2073 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2074 buffer_info->skb = NULL;
2075 }
37e73df8 2076 buffer_info->time_stamp = 0;
a9ebadd6 2077 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2078}
2079
2080/**
2081 * e1000_clean_tx_ring - Free Tx Buffers
2082 * @adapter: board private structure
581d708e 2083 * @tx_ring: ring to be cleaned
1da177e4
LT		 2084 **/
2085
64798845
JP		 2086static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2087 struct e1000_tx_ring *tx_ring)
1da177e4 2088{
1dc32918 2089 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2090 struct e1000_buffer *buffer_info;
2091 unsigned long size;
2092 unsigned int i;
2093
2094 /* Free all the Tx ring sk_buffs */
2095
96838a40 2096 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2097 buffer_info = &tx_ring->buffer_info[i];
2098 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2099 }
2100
2101 size = sizeof(struct e1000_buffer) * tx_ring->count;
2102 memset(tx_ring->buffer_info, 0, size);
2103
2104 /* Zero out the descriptor ring */
2105
2106 memset(tx_ring->desc, 0, tx_ring->size);
2107
2108 tx_ring->next_to_use = 0;
2109 tx_ring->next_to_clean = 0;
fd803241 2110 tx_ring->last_tx_tso = 0;
1da177e4 2111
1dc32918
JP		 2112 writel(0, hw->hw_addr + tx_ring->tdh);
2113 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2114}
2115
2116/**
2117 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2118 * @adapter: board private structure
2119 **/
2120
64798845 2121static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2122{
2123 int i;
2124
f56799ea 2125 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2126 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2127}
2128
2129/**
2130 * e1000_free_rx_resources - Free Rx Resources
2131 * @adapter: board private structure
581d708e 2132 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2133 *
2134 * Free all receive software resources
2135 **/
2136
64798845
JP		 2137static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2138 struct e1000_rx_ring *rx_ring)
1da177e4 2139{
1da177e4
LT		 2140 struct pci_dev *pdev = adapter->pdev;
2141
581d708e 2142 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2143
2144 vfree(rx_ring->buffer_info);
2145 rx_ring->buffer_info = NULL;
2146
2147 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2148
2149 rx_ring->desc = NULL;
2150}
2151
2152/**
581d708e 2153 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2154 * @adapter: board private structure
581d708e
MC		 2155 *
2156 * Free all receive software resources
2157 **/
2158
64798845 2159void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2160{
2161 int i;
2162
f56799ea 2163 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2164 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2165}
2166
2167/**
2168 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2169 * @adapter: board private structure
2170 * @rx_ring: ring to free buffers from
1da177e4
LT		 2171 **/
2172
64798845
JP		 2173static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2174 struct e1000_rx_ring *rx_ring)
1da177e4 2175{
1dc32918 2176 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2177 struct e1000_buffer *buffer_info;
2178 struct pci_dev *pdev = adapter->pdev;
2179 unsigned long size;
630b25cd 2180 unsigned int i;
1da177e4
LT		 2181
2182 /* Free all the Rx ring sk_buffs */
96838a40 2183 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2184 buffer_info = &rx_ring->buffer_info[i];
96838a40 2185 if (buffer_info->skb) {
1da177e4
LT		 2186 pci_unmap_single(pdev,
2187 buffer_info->dma,
2188 buffer_info->length,
2189 PCI_DMA_FROMDEVICE);
2190
2191 dev_kfree_skb(buffer_info->skb);
2192 buffer_info->skb = NULL;
997f5cbd 2193 }
1da177e4
LT		 2194 }
2195
2196 size = sizeof(struct e1000_buffer) * rx_ring->count;
2197 memset(rx_ring->buffer_info, 0, size);
2198
2199 /* Zero out the descriptor ring */
2200
2201 memset(rx_ring->desc, 0, rx_ring->size);
2202
2203 rx_ring->next_to_clean = 0;
2204 rx_ring->next_to_use = 0;
2205
1dc32918
JP		 2206 writel(0, hw->hw_addr + rx_ring->rdh);
2207 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2208}
2209
2210/**
2211 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2212 * @adapter: board private structure
2213 **/
2214
64798845 2215static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2216{
2217 int i;
2218
f56799ea 2219 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2220 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2221}
2222
2223/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2224 * and memory write and invalidate disabled for certain operations
2225 */
64798845 2226static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2227{
1dc32918 2228 struct e1000_hw *hw = &adapter->hw;
1da177e4 2229 struct net_device *netdev = adapter->netdev;
406874a7 2230 u32 rctl;
1da177e4 2231
1dc32918 2232 e1000_pci_clear_mwi(hw);
1da177e4 2233
1dc32918 2234 rctl = er32(RCTL);
1da177e4 2235 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2236 ew32(RCTL, rctl);
2237 E1000_WRITE_FLUSH();
1da177e4
LT		 2238 mdelay(5);
2239
96838a40 2240 if (netif_running(netdev))
581d708e 2241 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2242}
2243
64798845 2244static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2245{
1dc32918 2246 struct e1000_hw *hw = &adapter->hw;
1da177e4 2247 struct net_device *netdev = adapter->netdev;
406874a7 2248 u32 rctl;
1da177e4 2249
1dc32918 2250 rctl = er32(RCTL);
1da177e4 2251 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2252 ew32(RCTL, rctl);
2253 E1000_WRITE_FLUSH();
1da177e4
LT		 2254 mdelay(5);
2255
1dc32918
JP		 2256 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2257 e1000_pci_set_mwi(hw);
1da177e4 2258
96838a40 2259 if (netif_running(netdev)) {
72d64a43
JK		 2260 /* No need to loop, because 82542 supports only 1 queue */
2261 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2262 e1000_configure_rx(adapter);
72d64a43 2263 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2264 }
2265}
2266
2267/**
2268 * e1000_set_mac - Change the Ethernet Address of the NIC
2269 * @netdev: network interface device structure
2270 * @p: pointer to an address structure
2271 *
2272 * Returns 0 on success, negative on failure
2273 **/
2274
64798845 2275static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2276{
60490fe0 2277 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2278 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2279 struct sockaddr *addr = p;
2280
96838a40 2281 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2282 return -EADDRNOTAVAIL;
2283
2284 /* 82542 2.0 needs to be in reset to write receive address registers */
2285
1dc32918 2286 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2287 e1000_enter_82542_rst(adapter);
2288
2289 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2290 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2291
1dc32918 2292 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2293
868d5309
MC		 2294 /* With 82571 controllers, LAA may be overwritten (with the default)
2295 * due to controller reset from the other port. */
1dc32918 2296 if (hw->mac_type == e1000_82571) {
868d5309 2297 /* activate the work around */
1dc32918 2298 hw->laa_is_present = 1;
868d5309 2299
96838a40
JB		 2300 /* Hold a copy of the LAA in RAR[14] This is done so that
2301 * between the time RAR[0] gets clobbered and the time it
2302 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2303 * of the RARs and no incoming packets directed to this port
96838a40 2304 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2305 * RAR[14] */
1dc32918 2306 e1000_rar_set(hw, hw->mac_addr,
868d5309
MC		 2307 E1000_RAR_ENTRIES - 1);
2308 }
2309
1dc32918 2310 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2311 e1000_leave_82542_rst(adapter);
2312
2313 return 0;
2314}
2315
2316/**
db0ce50d 2317 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2318 * @netdev: network interface device structure
2319 *
db0ce50d
PM		 2320 * The set_rx_mode entry point is called whenever the unicast or multicast
2321 * address lists or the network interface flags are updated. This routine is
2322 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2323 * promiscuous mode, and all-multi behavior.
2324 **/
2325
64798845 2326static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2327{
60490fe0 2328 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2329 struct e1000_hw *hw = &adapter->hw;
db0ce50d
PM		 2330 struct dev_addr_list *uc_ptr;
2331 struct dev_addr_list *mc_ptr;
406874a7
JP		 2332 u32 rctl;
2333 u32 hash_value;
868d5309 2334 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2335 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2336 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2337 E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2338 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2339
2340 if (!mcarray) {
2341 DPRINTK(PROBE, ERR, "memory allocation failed\n");
2342 return;
2343 }
cd94dd0b 2344
1dc32918 2345 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 2346 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2347
868d5309 2348 /* reserve RAR[14] for LAA over-write work-around */
1dc32918 2349 if (hw->mac_type == e1000_82571)
868d5309 2350 rar_entries--;
1da177e4 2351
2648345f
MC		 2352 /* Check for Promiscuous and All Multicast modes */
2353
1dc32918 2354 rctl = er32(RCTL);
1da177e4 2355
96838a40 2356 if (netdev->flags & IFF_PROMISC) {
1da177e4 2357 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2358 rctl &= ~E1000_RCTL_VFE;
1da177e4 2359 } else {
746b9f02
PM		 2360 if (netdev->flags & IFF_ALLMULTI) {
2361 rctl |= E1000_RCTL_MPE;
2362 } else {
2363 rctl &= ~E1000_RCTL_MPE;
2364 }
78ed11a5 2365 if (adapter->hw.mac_type != e1000_ich8lan)
746b9f02 2366 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2367 }
2368
2369 uc_ptr = NULL;
2370 if (netdev->uc_count > rar_entries - 1) {
2371 rctl |= E1000_RCTL_UPE;
2372 } else if (!(netdev->flags & IFF_PROMISC)) {
2373 rctl &= ~E1000_RCTL_UPE;
2374 uc_ptr = netdev->uc_list;
1da177e4
LT		 2375 }
2376
1dc32918 2377 ew32(RCTL, rctl);
1da177e4
LT		 2378
2379 /* 82542 2.0 needs to be in reset to write receive address registers */
2380
96838a40 2381 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2382 e1000_enter_82542_rst(adapter);
2383
db0ce50d
PM		 2384 /* load the first 14 addresses into the exact filters 1-14. Unicast
2385 * addresses take precedence to avoid disabling unicast filtering
2386 * when possible.
2387 *
1da177e4
LT		 2388 * RAR 0 is used for the station MAC adddress
2389 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2390 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2391 */
2392 mc_ptr = netdev->mc_list;
2393
96838a40 2394 for (i = 1; i < rar_entries; i++) {
db0ce50d
PM		 2395 if (uc_ptr) {
2396 e1000_rar_set(hw, uc_ptr->da_addr, i);
2397 uc_ptr = uc_ptr->next;
2398 } else if (mc_ptr) {
2399 e1000_rar_set(hw, mc_ptr->da_addr, i);
1da177e4
LT		 2400 mc_ptr = mc_ptr->next;
2401 } else {
2402 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
1dc32918 2403 E1000_WRITE_FLUSH();
1da177e4 2404 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
1dc32918 2405 E1000_WRITE_FLUSH();
1da177e4
LT		 2406 }
2407 }
db0ce50d 2408 WARN_ON(uc_ptr != NULL);
1da177e4 2409
1da177e4
LT		 2410 /* load any remaining addresses into the hash table */
2411
96838a40 2412 for (; mc_ptr; mc_ptr = mc_ptr->next) {
81c52285 2413 u32 hash_reg, hash_bit, mta;
db0ce50d 2414 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
81c52285
JB		 2415 hash_reg = (hash_value >> 5) & 0x7F;
2416 hash_bit = hash_value & 0x1F;
2417 mta = (1 << hash_bit);
2418 mcarray[hash_reg] |= mta;
1da177e4
LT		 2419 }
2420
81c52285
JB		 2421 /* write the hash table completely, write from bottom to avoid
2422 * both stupid write combining chipsets, and flushing each write */
2423 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2424 /*
2425 * If we are on an 82544 has an errata where writing odd
2426 * offsets overwrites the previous even offset, but writing
2427 * backwards over the range solves the issue by always
2428 * writing the odd offset first
2429 */
2430 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2431 }
2432 E1000_WRITE_FLUSH();
2433
96838a40 2434 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2435 e1000_leave_82542_rst(adapter);
81c52285
JB		 2436
2437 kfree(mcarray);
1da177e4
LT		 2438}
2439
2440/* Need to wait a few seconds after link up to get diagnostic information from
2441 * the phy */
2442
64798845 2443static void e1000_update_phy_info(unsigned long data)
1da177e4 2444{
e982f17c 2445 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2446 struct e1000_hw *hw = &adapter->hw;
2447 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2448}
2449
2450/**
2451 * e1000_82547_tx_fifo_stall - Timer Call-back
2452 * @data: pointer to adapter cast into an unsigned long
2453 **/
2454
64798845 2455static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2456{
e982f17c 2457 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2458 struct e1000_hw *hw = &adapter->hw;
1da177e4 2459 struct net_device *netdev = adapter->netdev;
406874a7 2460 u32 tctl;
1da177e4 2461
96838a40 2462 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2463 if ((er32(TDT) == er32(TDH)) &&
2464 (er32(TDFT) == er32(TDFH)) &&
2465 (er32(TDFTS) == er32(TDFHS))) {
2466 tctl = er32(TCTL);
2467 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2468 ew32(TDFT, adapter->tx_head_addr);
2469 ew32(TDFH, adapter->tx_head_addr);
2470 ew32(TDFTS, adapter->tx_head_addr);
2471 ew32(TDFHS, adapter->tx_head_addr);
2472 ew32(TCTL, tctl);
2473 E1000_WRITE_FLUSH();
1da177e4
LT		 2474
2475 adapter->tx_fifo_head = 0;
2476 atomic_set(&adapter->tx_fifo_stall, 0);
2477 netif_wake_queue(netdev);
2478 } else {
2479 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2480 }
2481 }
2482}
2483
2484/**
2485 * e1000_watchdog - Timer Call-back
2486 * @data: pointer to adapter cast into an unsigned long
2487 **/
64798845 2488static void e1000_watchdog(unsigned long data)
1da177e4 2489{
e982f17c 2490 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2491 struct e1000_hw *hw = &adapter->hw;
1da177e4 2492 struct net_device *netdev = adapter->netdev;
545c67c0 2493 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7
JP		 2494 u32 link, tctl;
2495 s32 ret_val;
cd94dd0b 2496
1dc32918 2497 ret_val = e1000_check_for_link(hw);
cd94dd0b 2498 if ((ret_val == E1000_ERR_PHY) &&
1dc32918
JP		 2499 (hw->phy_type == e1000_phy_igp_3) &&
2500 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
cd94dd0b
AK		 2501 /* See e1000_kumeran_lock_loss_workaround() */
2502 DPRINTK(LINK, INFO,
2503 "Gigabit has been disabled, downgrading speed\n");
2504 }
90fb5135 2505
1dc32918
JP		 2506 if (hw->mac_type == e1000_82573) {
2507 e1000_enable_tx_pkt_filtering(hw);
2508 if (adapter->mng_vlan_id != hw->mng_cookie.vlan_id)
2d7edb92 2509 e1000_update_mng_vlan(adapter);
96838a40 2510 }
1da177e4 2511
1dc32918
JP		 2512 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2513 !(er32(TXCW) & E1000_TXCW_ANE))
2514 link = !hw->serdes_link_down;
1da177e4 2515 else
1dc32918 2516 link = er32(STATUS) & E1000_STATUS_LU;
1da177e4 2517
96838a40
JB		 2518 if (link) {
2519 if (!netif_carrier_ok(netdev)) {
406874a7 2520 u32 ctrl;
c3033b01 2521 bool txb2b = true;
1dc32918 2522 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2523 &adapter->link_speed,
2524 &adapter->link_duplex);
2525
1dc32918 2526 ctrl = er32(CTRL);
b30c4d8f
JK		 2527 printk(KERN_INFO "e1000: %s NIC Link is Up %d Mbps %s, "
2528 "Flow Control: %s\n",
2529 netdev->name,
2530 adapter->link_speed,
2531 adapter->link_duplex == FULL_DUPLEX ?
9669f53b
AK		 2532 "Full Duplex" : "Half Duplex",
2533 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2534 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2535 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2536 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2537
7e6c9861
JK		 2538 /* tweak tx_queue_len according to speed/duplex
2539 * and adjust the timeout factor */
66a2b0a3
JK		 2540 netdev->tx_queue_len = adapter->tx_queue_len;
2541 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2542 switch (adapter->link_speed) {
2543 case SPEED_10:
c3033b01 2544 txb2b = false;
7e6c9861
JK		 2545 netdev->tx_queue_len = 10;
2546 adapter->tx_timeout_factor = 8;
2547 break;
2548 case SPEED_100:
c3033b01 2549 txb2b = false;
7e6c9861
JK		 2550 netdev->tx_queue_len = 100;
2551 /* maybe add some timeout factor ? */
2552 break;
2553 }
2554
1dc32918
JP		 2555 if ((hw->mac_type == e1000_82571 ||
2556 hw->mac_type == e1000_82572) &&
c3033b01 2557 !txb2b) {
406874a7 2558 u32 tarc0;
1dc32918 2559 tarc0 = er32(TARC0);
90fb5135 2560 tarc0 &= ~(1 << 21);
1dc32918 2561 ew32(TARC0, tarc0);
7e6c9861 2562 }
90fb5135 2563
7e6c9861
JK		 2564 /* disable TSO for pcie and 10/100 speeds, to avoid
2565 * some hardware issues */
2566 if (!adapter->tso_force &&
1dc32918 2567 hw->bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2568 switch (adapter->link_speed) {
2569 case SPEED_10:
66a2b0a3 2570 case SPEED_100:
7e6c9861
JK		 2571 DPRINTK(PROBE,INFO,
2572 "10/100 speed: disabling TSO\n");
2573 netdev->features &= ~NETIF_F_TSO;
87ca4e5b 2574 netdev->features &= ~NETIF_F_TSO6;
7e6c9861
JK		 2575 break;
2576 case SPEED_1000:
2577 netdev->features |= NETIF_F_TSO;
87ca4e5b 2578 netdev->features |= NETIF_F_TSO6;
7e6c9861
JK		 2579 break;
2580 default:
2581 /* oops */
66a2b0a3
JK		 2582 break;
2583 }
2584 }
7e6c9861
JK		 2585
2586 /* enable transmits in the hardware, need to do this
2587 * after setting TARC0 */
1dc32918 2588 tctl = er32(TCTL);
7e6c9861 2589 tctl |= E1000_TCTL_EN;
1dc32918 2590 ew32(TCTL, tctl);
66a2b0a3 2591
1da177e4
LT		 2592 netif_carrier_on(netdev);
2593 netif_wake_queue(netdev);
56e1393f 2594 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4 2595 adapter->smartspeed = 0;
bb8e3311
JG		 2596 } else {
2597 /* make sure the receive unit is started */
1dc32918
JP		 2598 if (hw->rx_needs_kicking) {
2599 u32 rctl = er32(RCTL);
2600 ew32(RCTL, rctl | E1000_RCTL_EN);
bb8e3311 2601 }
1da177e4
LT		 2602 }
2603 } else {
96838a40 2604 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2605 adapter->link_speed = 0;
2606 adapter->link_duplex = 0;
b30c4d8f
JK		 2607 printk(KERN_INFO "e1000: %s NIC Link is Down\n",
2608 netdev->name);
1da177e4
LT		 2609 netif_carrier_off(netdev);
2610 netif_stop_queue(netdev);
56e1393f 2611 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
87041639
JK		 2612
2613 /* 80003ES2LAN workaround--
2614 * For packet buffer work-around on link down event;
2615 * disable receives in the ISR and
2616 * reset device here in the watchdog
2617 */
1dc32918 2618 if (hw->mac_type == e1000_80003es2lan)
87041639
JK		 2619 /* reset device */
2620 schedule_work(&adapter->reset_task);
1da177e4
LT		 2621 }
2622
2623 e1000_smartspeed(adapter);
2624 }
2625
2626 e1000_update_stats(adapter);
2627
1dc32918 2628 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2629 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2630 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2631 adapter->colc_old = adapter->stats.colc;
2632
2633 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2634 adapter->gorcl_old = adapter->stats.gorcl;
2635 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2636 adapter->gotcl_old = adapter->stats.gotcl;
2637
1dc32918 2638 e1000_update_adaptive(hw);
1da177e4 2639
f56799ea 2640 if (!netif_carrier_ok(netdev)) {
581d708e 2641 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2642 /* We've lost link, so the controller stops DMA,
2643 * but we've got queued Tx work that's never going
2644 * to get done, so reset controller to flush Tx.
2645 * (Do the reset outside of interrupt context). */
87041639
JK		 2646 adapter->tx_timeout_count++;
2647 schedule_work(&adapter->reset_task);
1da177e4
LT		 2648 }
2649 }
2650
1da177e4 2651 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2652 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2653
2648345f 2654 /* Force detection of hung controller every watchdog period */
c3033b01 2655 adapter->detect_tx_hung = true;
1da177e4 2656
96838a40 2657 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309 2658 * reset from the other port. Set the appropriate LAA in RAR[0] */
1dc32918
JP		 2659 if (hw->mac_type == e1000_82571 && hw->laa_is_present)
2660 e1000_rar_set(hw, hw->mac_addr, 0);
868d5309 2661
1da177e4 2662 /* Reset the timer */
56e1393f 2663 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2664}
2665
835bb129
JB		 2666enum latency_range {
2667 lowest_latency = 0,
2668 low_latency = 1,
2669 bulk_latency = 2,
2670 latency_invalid = 255
2671};
2672
2673/**
2674 * e1000_update_itr - update the dynamic ITR value based on statistics
2675 * Stores a new ITR value based on packets and byte
2676 * counts during the last interrupt. The advantage of per interrupt
2677 * computation is faster updates and more accurate ITR for the current
2678 * traffic pattern. Constants in this function were computed
2679 * based on theoretical maximum wire speed and thresholds were set based
2680 * on testing data as well as attempting to minimize response time
2681 * while increasing bulk throughput.
2682 * this functionality is controlled by the InterruptThrottleRate module
2683 * parameter (see e1000_param.c)
2684 * @adapter: pointer to adapter
2685 * @itr_setting: current adapter->itr
2686 * @packets: the number of packets during this measurement interval
2687 * @bytes: the number of bytes during this measurement interval
2688 **/
2689static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2690 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2691{
2692 unsigned int retval = itr_setting;
2693 struct e1000_hw *hw = &adapter->hw;
2694
2695 if (unlikely(hw->mac_type < e1000_82540))
2696 goto update_itr_done;
2697
2698 if (packets == 0)
2699 goto update_itr_done;
2700
835bb129
JB		 2701 switch (itr_setting) {
2702 case lowest_latency:
2b65326e
JB		 2703 /* jumbo frames get bulk treatment*/
2704 if (bytes/packets > 8000)
2705 retval = bulk_latency;
2706 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2707 retval = low_latency;
2708 break;
2709 case low_latency: /* 50 usec aka 20000 ints/s */
2710 if (bytes > 10000) {
2b65326e
JB		 2711 /* jumbo frames need bulk latency setting */
2712 if (bytes/packets > 8000)
2713 retval = bulk_latency;
2714 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2715 retval = bulk_latency;
2716 else if ((packets > 35))
2717 retval = lowest_latency;
2b65326e
JB		 2718 } else if (bytes/packets > 2000)
2719 retval = bulk_latency;
2720 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2721 retval = lowest_latency;
2722 break;
2723 case bulk_latency: /* 250 usec aka 4000 ints/s */
2724 if (bytes > 25000) {
2725 if (packets > 35)
2726 retval = low_latency;
2b65326e
JB		 2727 } else if (bytes < 6000) {
2728 retval = low_latency;
835bb129
JB		 2729 }
2730 break;
2731 }
2732
2733update_itr_done:
2734 return retval;
2735}
2736
2737static void e1000_set_itr(struct e1000_adapter *adapter)
2738{
2739 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2740 u16 current_itr;
2741 u32 new_itr = adapter->itr;
835bb129
JB		 2742
2743 if (unlikely(hw->mac_type < e1000_82540))
2744 return;
2745
2746 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2747 if (unlikely(adapter->link_speed != SPEED_1000)) {
2748 current_itr = 0;
2749 new_itr = 4000;
2750 goto set_itr_now;
2751 }
2752
2753 adapter->tx_itr = e1000_update_itr(adapter,
2754 adapter->tx_itr,
2755 adapter->total_tx_packets,
2756 adapter->total_tx_bytes);
2b65326e
JB		 2757 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2758 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2759 adapter->tx_itr = low_latency;
2760
835bb129
JB		 2761 adapter->rx_itr = e1000_update_itr(adapter,
2762 adapter->rx_itr,
2763 adapter->total_rx_packets,
2764 adapter->total_rx_bytes);
2b65326e
JB		 2765 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2766 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2767 adapter->rx_itr = low_latency;
835bb129
JB		 2768
2769 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2770
835bb129
JB		 2771 switch (current_itr) {
2772 /* counts and packets in update_itr are dependent on these numbers */
2773 case lowest_latency:
2774 new_itr = 70000;
2775 break;
2776 case low_latency:
2777 new_itr = 20000; /* aka hwitr = ~200 */
2778 break;
2779 case bulk_latency:
2780 new_itr = 4000;
2781 break;
2782 default:
2783 break;
2784 }
2785
2786set_itr_now:
2787 if (new_itr != adapter->itr) {
2788 /* this attempts to bias the interrupt rate towards Bulk
2789 * by adding intermediate steps when interrupt rate is
2790 * increasing */
2791 new_itr = new_itr > adapter->itr ?
2792 min(adapter->itr + (new_itr >> 2), new_itr) :
2793 new_itr;
2794 adapter->itr = new_itr;
1dc32918 2795 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2796 }
2797
2798 return;
2799}
2800
1da177e4
LT		 2801#define E1000_TX_FLAGS_CSUM 0x00000001
2802#define E1000_TX_FLAGS_VLAN 0x00000002
2803#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2804#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2805#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2806#define E1000_TX_FLAGS_VLAN_SHIFT 16
2807
64798845
JP		 2808static int e1000_tso(struct e1000_adapter *adapter,
2809 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2810{
1da177e4 2811 struct e1000_context_desc *context_desc;
545c67c0 2812 struct e1000_buffer *buffer_info;
1da177e4 2813 unsigned int i;
406874a7
JP		 2814 u32 cmd_length = 0;
2815 u16 ipcse = 0, tucse, mss;
2816 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2817 int err;
2818
89114afd 2819 if (skb_is_gso(skb)) {
1da177e4
LT		 2820 if (skb_header_cloned(skb)) {
2821 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2822 if (err)
2823 return err;
2824 }
2825
ab6a5bb6 2826 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2827 mss = skb_shinfo(skb)->gso_size;
60828236 2828 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2829 struct iphdr *iph = ip_hdr(skb);
2830 iph->tot_len = 0;
2831 iph->check = 0;
aa8223c7
ACM		 2832 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2833 iph->daddr, 0,
2834 IPPROTO_TCP,
2835 0);
2d7edb92 2836 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2837 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2838 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2839 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2840 tcp_hdr(skb)->check =
0660e03f
ACM		 2841 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2842 &ipv6_hdr(skb)->daddr,
2843 0, IPPROTO_TCP, 0);
2d7edb92 2844 ipcse = 0;
2d7edb92 2845 }
bbe735e4 2846 ipcss = skb_network_offset(skb);
eddc9ec5 2847 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2848 tucss = skb_transport_offset(skb);
aa8223c7 2849 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2850 tucse = 0;
2851
2852 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2853 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2854
581d708e
MC		 2855 i = tx_ring->next_to_use;
2856 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2857 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2858
2859 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2860 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2861 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2862 context_desc->upper_setup.tcp_fields.tucss = tucss;
2863 context_desc->upper_setup.tcp_fields.tucso = tucso;
2864 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2865 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2866 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2867 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2868
545c67c0 2869 buffer_info->time_stamp = jiffies;
a9ebadd6 2870 buffer_info->next_to_watch = i;
545c67c0 2871
581d708e
MC		 2872 if (++i == tx_ring->count) i = 0;
2873 tx_ring->next_to_use = i;
1da177e4 2874
c3033b01 2875 return true;
1da177e4 2876 }
c3033b01 2877 return false;
1da177e4
LT		 2878}
2879
64798845
JP		 2880static bool e1000_tx_csum(struct e1000_adapter *adapter,
2881 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2882{
2883 struct e1000_context_desc *context_desc;
545c67c0 2884 struct e1000_buffer *buffer_info;
1da177e4 2885 unsigned int i;
406874a7 2886 u8 css;
3ed30676 2887 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2888
3ed30676
DG		 2889 if (skb->ip_summed != CHECKSUM_PARTIAL)
2890 return false;
1da177e4 2891
3ed30676 2892 switch (skb->protocol) {
09640e63 2893 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2894 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2895 cmd_len |= E1000_TXD_CMD_TCP;
2896 break;
09640e63 2897 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2898 /* XXX not handling all IPV6 headers */
2899 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2900 cmd_len |= E1000_TXD_CMD_TCP;
2901 break;
2902 default:
2903 if (unlikely(net_ratelimit()))
2904 DPRINTK(DRV, WARNING,
2905 "checksum_partial proto=%x!\n", skb->protocol);
2906 break;
2907 }
1da177e4 2908
3ed30676 2909 css = skb_transport_offset(skb);
1da177e4 2910
3ed30676
DG		 2911 i = tx_ring->next_to_use;
2912 buffer_info = &tx_ring->buffer_info[i];
2913 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2914
3ed30676
DG		 2915 context_desc->lower_setup.ip_config = 0;
2916 context_desc->upper_setup.tcp_fields.tucss = css;
2917 context_desc->upper_setup.tcp_fields.tucso =
2918 css + skb->csum_offset;
2919 context_desc->upper_setup.tcp_fields.tucse = 0;
2920 context_desc->tcp_seg_setup.data = 0;
2921 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2922
3ed30676
DG		 2923 buffer_info->time_stamp = jiffies;
2924 buffer_info->next_to_watch = i;
1da177e4 2925
3ed30676
DG		 2926 if (unlikely(++i == tx_ring->count)) i = 0;
2927 tx_ring->next_to_use = i;
2928
2929 return true;
1da177e4
LT		 2930}
2931
2932#define E1000_MAX_TXD_PWR 12
2933#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2934
64798845
JP		 2935static int e1000_tx_map(struct e1000_adapter *adapter,
2936 struct e1000_tx_ring *tx_ring,
2937 struct sk_buff *skb, unsigned int first,
2938 unsigned int max_per_txd, unsigned int nr_frags,
2939 unsigned int mss)
1da177e4 2940{
1dc32918 2941 struct e1000_hw *hw = &adapter->hw;
37e73df8 2942 struct e1000_buffer *buffer_info;
d20b606c
JB		 2943 unsigned int len = skb_headlen(skb);
2944 unsigned int offset, size, count = 0, i;
1da177e4 2945 unsigned int f;
37e73df8 2946 dma_addr_t *map;
1da177e4
LT		 2947
2948 i = tx_ring->next_to_use;
2949
d20b606c
JB		 2950 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
2951 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
37e73df8 2952 return 0;
d20b606c
JB		 2953 }
2954
37e73df8 2955 map = skb_shinfo(skb)->dma_maps;
d20b606c
JB		 2956 offset = 0;
2957
96838a40 2958 while (len) {
37e73df8 2959 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2960 size = min(len, max_per_txd);
fd803241
JK		 2961 /* Workaround for Controller erratum --
2962 * descriptor for non-tso packet in a linear SKB that follows a
2963 * tso gets written back prematurely before the data is fully
0f15a8fa 2964 * DMA'd to the controller */
fd803241 2965 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2966 !skb_is_gso(skb)) {
fd803241
JK		 2967 tx_ring->last_tx_tso = 0;
2968 size -= 4;
2969 }
2970
1da177e4
LT		 2971 /* Workaround for premature desc write-backs
2972 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2973 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2974 size -= 4;
97338bde
MC		 2975 /* work-around for errata 10 and it applies
2976 * to all controllers in PCI-X mode
2977 * The fix is to make sure that the first descriptor of a
2978 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2979 */
1dc32918 2980 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2981 (size > 2015) && count == 0))
2982 size = 2015;
96838a40 2983
1da177e4
LT		 2984 /* Workaround for potential 82544 hang in PCI-X. Avoid
2985 * terminating buffers within evenly-aligned dwords. */
96838a40 2986 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2987 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2988 size > 4))
2989 size -= 4;
2990
2991 buffer_info->length = size;
37e73df8 2992 buffer_info->dma = map[0] + offset;
1da177e4 2993 buffer_info->time_stamp = jiffies;
a9ebadd6 2994 buffer_info->next_to_watch = i;
1da177e4
LT		 2995
2996 len -= size;
2997 offset += size;
2998 count++;
37e73df8
AD		 2999 if (len) {
3000 i++;
3001 if (unlikely(i == tx_ring->count))
3002 i = 0;
3003 }
1da177e4
LT		 3004 }
3005
96838a40 3006 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 3007 struct skb_frag_struct *frag;
3008
3009 frag = &skb_shinfo(skb)->frags[f];
3010 len = frag->size;
d20b606c 3011 offset = 0;
1da177e4 3012
96838a40 3013 while (len) {
37e73df8
AD		 3014 i++;
3015 if (unlikely(i == tx_ring->count))
3016 i = 0;
3017
1da177e4
LT		 3018 buffer_info = &tx_ring->buffer_info[i];
3019 size = min(len, max_per_txd);
1da177e4
LT		 3020 /* Workaround for premature desc write-backs
3021 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3022 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 3023 size -= 4;
1da177e4
LT		 3024 /* Workaround for potential 82544 hang in PCI-X.
3025 * Avoid terminating buffers within evenly-aligned
3026 * dwords. */
96838a40 3027 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3028 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3029 size > 4))
3030 size -= 4;
3031
3032 buffer_info->length = size;
37e73df8 3033 buffer_info->dma = map[f + 1] + offset;
1da177e4 3034 buffer_info->time_stamp = jiffies;
a9ebadd6 3035 buffer_info->next_to_watch = i;
1da177e4
LT		 3036
3037 len -= size;
3038 offset += size;
3039 count++;
1da177e4
LT		 3040 }
3041 }
3042
1da177e4
LT		 3043 tx_ring->buffer_info[i].skb = skb;
3044 tx_ring->buffer_info[first].next_to_watch = i;
3045
3046 return count;
3047}
3048
64798845
JP		 3049static void e1000_tx_queue(struct e1000_adapter *adapter,
3050 struct e1000_tx_ring *tx_ring, int tx_flags,
3051 int count)
1da177e4 3052{
1dc32918 3053 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3054 struct e1000_tx_desc *tx_desc = NULL;
3055 struct e1000_buffer *buffer_info;
406874a7 3056 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 3057 unsigned int i;
3058
96838a40 3059 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3060 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3061 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3062 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3063
96838a40 3064 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3065 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3066 }
3067
96838a40 3068 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3069 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3070 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3071 }
3072
96838a40 3073 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3074 txd_lower |= E1000_TXD_CMD_VLE;
3075 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3076 }
3077
3078 i = tx_ring->next_to_use;
3079
96838a40 3080 while (count--) {
1da177e4
LT		 3081 buffer_info = &tx_ring->buffer_info[i];
3082 tx_desc = E1000_TX_DESC(*tx_ring, i);
3083 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3084 tx_desc->lower.data =
3085 cpu_to_le32(txd_lower | buffer_info->length);
3086 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3087 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3088 }
3089
3090 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3091
3092 /* Force memory writes to complete before letting h/w
3093 * know there are new descriptors to fetch. (Only
3094 * applicable for weak-ordered memory model archs,
3095 * such as IA-64). */
3096 wmb();
3097
3098 tx_ring->next_to_use = i;
1dc32918 3099 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 3100 /* we need this if more than one processor can write to our tail
3101 * at a time, it syncronizes IO on IA64/Altix systems */
3102 mmiowb();
1da177e4
LT		 3103}
3104
3105/**
3106 * 82547 workaround to avoid controller hang in half-duplex environment.
3107 * The workaround is to avoid queuing a large packet that would span
3108 * the internal Tx FIFO ring boundary by notifying the stack to resend
3109 * the packet at a later time. This gives the Tx FIFO an opportunity to
3110 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3111 * to the beginning of the Tx FIFO.
3112 **/
3113
3114#define E1000_FIFO_HDR 0x10
3115#define E1000_82547_PAD_LEN 0x3E0
3116
64798845
JP		 3117static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3118 struct sk_buff *skb)
1da177e4 3119{
406874a7
JP		 3120 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3121 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3122
9099cfb9 3123 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3124
96838a40 3125 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3126 goto no_fifo_stall_required;
3127
96838a40 3128 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3129 return 1;
3130
96838a40 3131 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3132 atomic_set(&adapter->tx_fifo_stall, 1);
3133 return 1;
3134 }
3135
3136no_fifo_stall_required:
3137 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3138 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3139 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3140 return 0;
3141}
3142
2d7edb92 3143#define MINIMUM_DHCP_PACKET_SIZE 282
64798845
JP		 3144static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3145 struct sk_buff *skb)
2d7edb92
MC		 3146{
3147 struct e1000_hw *hw = &adapter->hw;
406874a7 3148 u16 length, offset;
96838a40 3149 if (vlan_tx_tag_present(skb)) {
1dc32918
JP		 3150 if (!((vlan_tx_tag_get(skb) == hw->mng_cookie.vlan_id) &&
3151 ( hw->mng_cookie.status &
2d7edb92
MC		 3152 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3153 return 0;
3154 }
20a44028 3155 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
e982f17c 3156 struct ethhdr *eth = (struct ethhdr *)skb->data;
96838a40
JB		 3157 if ((htons(ETH_P_IP) == eth->h_proto)) {
3158 const struct iphdr *ip =
406874a7 3159 (struct iphdr *)((u8 *)skb->data+14);
96838a40
JB		 3160 if (IPPROTO_UDP == ip->protocol) {
3161 struct udphdr *udp =
406874a7 3162 (struct udphdr *)((u8 *)ip +
2d7edb92 3163 (ip->ihl << 2));
96838a40 3164 if (ntohs(udp->dest) == 67) {
406874a7 3165 offset = (u8 *)udp + 8 - skb->data;
2d7edb92
MC		 3166 length = skb->len - offset;
3167
3168 return e1000_mng_write_dhcp_info(hw,
406874a7 3169 (u8 *)udp + 8,
2d7edb92
MC		 3170 length);
3171 }
3172 }
3173 }
3174 }
3175 return 0;
3176}
3177
65c7973f
JB		 3178static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3179{
3180 struct e1000_adapter *adapter = netdev_priv(netdev);
3181 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3182
3183 netif_stop_queue(netdev);
3184 /* Herbert's original patch had:
3185 * smp_mb__after_netif_stop_queue();
3186 * but since that doesn't exist yet, just open code it. */
3187 smp_mb();
3188
3189 /* We need to check again in a case another CPU has just
3190 * made room available. */
3191 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3192 return -EBUSY;
3193
3194 /* A reprieve! */
3195 netif_start_queue(netdev);
fcfb1224 3196 ++adapter->restart_queue;
65c7973f
JB		 3197 return 0;
3198}
3199
3200static int e1000_maybe_stop_tx(struct net_device *netdev,
3201 struct e1000_tx_ring *tx_ring, int size)
3202{
3203 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3204 return 0;
3205 return __e1000_maybe_stop_tx(netdev, size);
3206}
3207
1da177e4 3208#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
64798845 3209static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1da177e4 3210{
60490fe0 3211 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3212 struct e1000_hw *hw = &adapter->hw;
581d708e 3213 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3214 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3215 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3216 unsigned int tx_flags = 0;
6d1e3aa7 3217 unsigned int len = skb->len - skb->data_len;
6d1e3aa7
KK		 3218 unsigned int nr_frags;
3219 unsigned int mss;
1da177e4 3220 int count = 0;
76c224bc 3221 int tso;
1da177e4 3222 unsigned int f;
1da177e4 3223
65c7973f
JB		 3224 /* This goes back to the question of how to logically map a tx queue
3225 * to a flow. Right now, performance is impacted slightly negatively
3226 * if using multiple tx queues. If the stack breaks away from a
3227 * single qdisc implementation, we can look at this again. */
581d708e 3228 tx_ring = adapter->tx_ring;
24025e4e 3229
581d708e 3230 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3231 dev_kfree_skb_any(skb);
3232 return NETDEV_TX_OK;
3233 }
3234
032fe6e9
JB		 3235 /* 82571 and newer doesn't need the workaround that limited descriptor
3236 * length to 4kB */
1dc32918 3237 if (hw->mac_type >= e1000_82571)
032fe6e9
JB		 3238 max_per_txd = 8192;
3239
7967168c 3240 mss = skb_shinfo(skb)->gso_size;
76c224bc 3241 /* The controller does a simple calculation to
1da177e4
LT		 3242 * make sure there is enough room in the FIFO before
3243 * initiating the DMA for each buffer. The calc is:
3244 * 4 = ceil(buffer len/mss). To make sure we don't
3245 * overrun the FIFO, adjust the max buffer len if mss
3246 * drops. */
96838a40 3247 if (mss) {
406874a7 3248 u8 hdr_len;
1da177e4
LT		 3249 max_per_txd = min(mss << 2, max_per_txd);
3250 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3251
90fb5135
AK		 3252 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3253 * points to just header, pull a few bytes of payload from
3254 * frags into skb->data */
ab6a5bb6 3255 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3256 if (skb->data_len && hdr_len == len) {
1dc32918 3257 switch (hw->mac_type) {
9f687888 3258 unsigned int pull_size;
683a2aa3
HX		 3259 case e1000_82544:
3260 /* Make sure we have room to chop off 4 bytes,
3261 * and that the end alignment will work out to
3262 * this hardware's requirements
3263 * NOTE: this is a TSO only workaround
3264 * if end byte alignment not correct move us
3265 * into the next dword */
27a884dc 3266 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3267 break;
3268 /* fall through */
9f687888
JK		 3269 case e1000_82571:
3270 case e1000_82572:
3271 case e1000_82573:
cd94dd0b 3272 case e1000_ich8lan:
9f687888
JK		 3273 pull_size = min((unsigned int)4, skb->data_len);
3274 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3275 DPRINTK(DRV, ERR,
9f687888
JK		 3276 "__pskb_pull_tail failed.\n");
3277 dev_kfree_skb_any(skb);
749dfc70 3278 return NETDEV_TX_OK;
9f687888
JK		 3279 }
3280 len = skb->len - skb->data_len;
3281 break;
3282 default:
3283 /* do nothing */
3284 break;
d74bbd3b 3285 }
9a3056da 3286 }
1da177e4
LT		 3287 }
3288
9a3056da 3289 /* reserve a descriptor for the offload context */
84fa7933 3290 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3291 count++;
2648345f 3292 count++;
fd803241 3293
fd803241 3294 /* Controller Erratum workaround */
89114afd 3295 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3296 count++;
fd803241 3297
1da177e4
LT		 3298 count += TXD_USE_COUNT(len, max_txd_pwr);
3299
96838a40 3300 if (adapter->pcix_82544)
1da177e4
LT		 3301 count++;
3302
96838a40 3303 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3304 * in PCI-X mode, so add one more descriptor to the count
3305 */
1dc32918 3306 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3307 (len > 2015)))
3308 count++;
3309
1da177e4 3310 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3311 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3312 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3313 max_txd_pwr);
96838a40 3314 if (adapter->pcix_82544)
1da177e4
LT		 3315 count += nr_frags;
3316
0f15a8fa 3317
1dc32918
JP		 3318 if (hw->tx_pkt_filtering &&
3319 (hw->mac_type == e1000_82573))
2d7edb92
MC		 3320 e1000_transfer_dhcp_info(adapter, skb);
3321
1da177e4
LT		 3322 /* need: count + 2 desc gap to keep tail from touching
3323 * head, otherwise try next time */
8017943e 3324 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3325 return NETDEV_TX_BUSY;
1da177e4 3326
1dc32918 3327 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3328 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3329 netif_stop_queue(netdev);
1314bbf3 3330 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
1da177e4
LT		 3331 return NETDEV_TX_BUSY;
3332 }
3333 }
3334
96838a40 3335 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3336 tx_flags |= E1000_TX_FLAGS_VLAN;
3337 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3338 }
3339
581d708e 3340 first = tx_ring->next_to_use;
96838a40 3341
581d708e 3342 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3343 if (tso < 0) {
3344 dev_kfree_skb_any(skb);
3345 return NETDEV_TX_OK;
3346 }
3347
fd803241
JK		 3348 if (likely(tso)) {
3349 tx_ring->last_tx_tso = 1;
1da177e4 3350 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3351 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3352 tx_flags |= E1000_TX_FLAGS_CSUM;
3353
2d7edb92 3354 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3355 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3356 * no longer assume, we must. */
60828236 3357 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3358 tx_flags |= E1000_TX_FLAGS_IPV4;
3359
37e73df8
AD		 3360 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3361 nr_frags, mss);
1da177e4 3362
37e73df8
AD		 3363 if (count) {
3364 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
3365 netdev->trans_start = jiffies;
3366 /* Make sure there is space in the ring for the next send. */
3367 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3368
37e73df8
AD		 3369 } else {
3370 dev_kfree_skb_any(skb);
3371 tx_ring->buffer_info[first].time_stamp = 0;
3372 tx_ring->next_to_use = first;
3373 }
1da177e4 3374
1da177e4
LT		 3375 return NETDEV_TX_OK;
3376}
3377
3378/**
3379 * e1000_tx_timeout - Respond to a Tx Hang
3380 * @netdev: network interface device structure
3381 **/
3382
64798845 3383static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3384{
60490fe0 3385 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3386
3387 /* Do the reset outside of interrupt context */
87041639
JK		 3388 adapter->tx_timeout_count++;
3389 schedule_work(&adapter->reset_task);
1da177e4
LT		 3390}
3391
64798845 3392static void e1000_reset_task(struct work_struct *work)
1da177e4 3393{
65f27f38
DH		 3394 struct e1000_adapter *adapter =
3395 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3396
2db10a08 3397 e1000_reinit_locked(adapter);
1da177e4
LT		 3398}
3399
3400/**
3401 * e1000_get_stats - Get System Network Statistics
3402 * @netdev: network interface device structure
3403 *
3404 * Returns the address of the device statistics structure.
3405 * The statistics are actually updated from the timer callback.
3406 **/
3407
64798845 3408static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3409{
60490fe0 3410 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3411
6b7660cd 3412 /* only return the current stats */
1da177e4
LT		 3413 return &adapter->net_stats;
3414}
3415
3416/**
3417 * e1000_change_mtu - Change the Maximum Transfer Unit
3418 * @netdev: network interface device structure
3419 * @new_mtu: new value for maximum frame size
3420 *
3421 * Returns 0 on success, negative on failure
3422 **/
3423
64798845 3424static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3425{
60490fe0 3426 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3427 struct e1000_hw *hw = &adapter->hw;
1da177e4 3428 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
406874a7 3429 u16 eeprom_data = 0;
1da177e4 3430
96838a40
JB		 3431 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3432 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3433 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3434 return -EINVAL;
2d7edb92 3435 }
1da177e4 3436
997f5cbd 3437 /* Adapter-specific max frame size limits. */
1dc32918 3438 switch (hw->mac_type) {
9e2feace 3439 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3440 case e1000_ich8lan:
997f5cbd
JK		 3441 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3442 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3443 return -EINVAL;
2d7edb92 3444 }
997f5cbd 3445 break;
85b22eb6 3446 case e1000_82573:
249d71d6
BA		 3447 /* Jumbo Frames not supported if:
3448 * - this is not an 82573L device
3449 * - ASPM is enabled in any way (0x1A bits 3:2) */
1dc32918 3450 e1000_read_eeprom(hw, EEPROM_INIT_3GIO_3, 1,
85b22eb6 3451 &eeprom_data);
1dc32918 3452 if ((hw->device_id != E1000_DEV_ID_82573L) ||
249d71d6 3453 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3454 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3455 DPRINTK(PROBE, ERR,
3456 "Jumbo Frames not supported.\n");
3457 return -EINVAL;
3458 }
3459 break;
3460 }
249d71d6
BA		 3461 /* ERT will be enabled later to enable wire speed receives */
3462
85b22eb6 3463 /* fall through to get support */
997f5cbd
JK		 3464 case e1000_82571:
3465 case e1000_82572:
87041639 3466 case e1000_80003es2lan:
997f5cbd
JK		 3467#define MAX_STD_JUMBO_FRAME_SIZE 9234
3468 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3469 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3470 return -EINVAL;
3471 }
3472 break;
3473 default:
3474 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3475 break;
1da177e4
LT		 3476 }
3477
87f5032e 3478 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3479 * means we reserve 2 more, this pushes us to allocate from the next
3480 * larger slab size
3481 * i.e. RXBUFFER_2048 --> size-4096 slab */
3482
3483 if (max_frame <= E1000_RXBUFFER_256)
3484 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3485 else if (max_frame <= E1000_RXBUFFER_512)
3486 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3487 else if (max_frame <= E1000_RXBUFFER_1024)
3488 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3489 else if (max_frame <= E1000_RXBUFFER_2048)
3490 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3491 else if (max_frame <= E1000_RXBUFFER_4096)
3492 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3493 else if (max_frame <= E1000_RXBUFFER_8192)
3494 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3495 else if (max_frame <= E1000_RXBUFFER_16384)
3496 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3497
3498 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3499 if (!hw->tbi_compatibility_on &&
9e2feace
AK		 3500 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3501 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3502 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3503
2d7edb92 3504 netdev->mtu = new_mtu;
1dc32918 3505 hw->max_frame_size = max_frame;
2d7edb92 3506
2db10a08
AK		 3507 if (netif_running(netdev))
3508 e1000_reinit_locked(adapter);
1da177e4 3509
1da177e4
LT		 3510 return 0;
3511}
3512
3513/**
3514 * e1000_update_stats - Update the board statistics counters
3515 * @adapter: board private structure
3516 **/
3517
64798845 3518void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4
LT		 3519{
3520 struct e1000_hw *hw = &adapter->hw;
282f33c9 3521 struct pci_dev *pdev = adapter->pdev;
1da177e4 3522 unsigned long flags;
406874a7 3523 u16 phy_tmp;
1da177e4
LT		 3524
3525#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3526
282f33c9
LV		 3527 /*
3528 * Prevent stats update while adapter is being reset, or if the pci
3529 * connection is down.
3530 */
9026729b 3531 if (adapter->link_speed == 0)
282f33c9 3532 return;
81b1955e 3533 if (pci_channel_offline(pdev))
9026729b
AK		 3534 return;
3535
1da177e4
LT		 3536 spin_lock_irqsave(&adapter->stats_lock, flags);
3537
828d055f 3538 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3539 * called from the interrupt context, so they must only
3540 * be written while holding adapter->stats_lock
3541 */
3542
1dc32918
JP		 3543 adapter->stats.crcerrs += er32(CRCERRS);
3544 adapter->stats.gprc += er32(GPRC);
3545 adapter->stats.gorcl += er32(GORCL);
3546 adapter->stats.gorch += er32(GORCH);
3547 adapter->stats.bprc += er32(BPRC);
3548 adapter->stats.mprc += er32(MPRC);
3549 adapter->stats.roc += er32(ROC);
3550
3551 if (hw->mac_type != e1000_ich8lan) {
3552 adapter->stats.prc64 += er32(PRC64);
3553 adapter->stats.prc127 += er32(PRC127);
3554 adapter->stats.prc255 += er32(PRC255);
3555 adapter->stats.prc511 += er32(PRC511);
3556 adapter->stats.prc1023 += er32(PRC1023);
3557 adapter->stats.prc1522 += er32(PRC1522);
3558 }
3559
3560 adapter->stats.symerrs += er32(SYMERRS);
3561 adapter->stats.mpc += er32(MPC);
3562 adapter->stats.scc += er32(SCC);
3563 adapter->stats.ecol += er32(ECOL);
3564 adapter->stats.mcc += er32(MCC);
3565 adapter->stats.latecol += er32(LATECOL);
3566 adapter->stats.dc += er32(DC);
3567 adapter->stats.sec += er32(SEC);
3568 adapter->stats.rlec += er32(RLEC);
3569 adapter->stats.xonrxc += er32(XONRXC);
3570 adapter->stats.xontxc += er32(XONTXC);
3571 adapter->stats.xoffrxc += er32(XOFFRXC);
3572 adapter->stats.xofftxc += er32(XOFFTXC);
3573 adapter->stats.fcruc += er32(FCRUC);
3574 adapter->stats.gptc += er32(GPTC);
3575 adapter->stats.gotcl += er32(GOTCL);
3576 adapter->stats.gotch += er32(GOTCH);
3577 adapter->stats.rnbc += er32(RNBC);
3578 adapter->stats.ruc += er32(RUC);
3579 adapter->stats.rfc += er32(RFC);
3580 adapter->stats.rjc += er32(RJC);
3581 adapter->stats.torl += er32(TORL);
3582 adapter->stats.torh += er32(TORH);
3583 adapter->stats.totl += er32(TOTL);
3584 adapter->stats.toth += er32(TOTH);
3585 adapter->stats.tpr += er32(TPR);
3586
3587 if (hw->mac_type != e1000_ich8lan) {
3588 adapter->stats.ptc64 += er32(PTC64);
3589 adapter->stats.ptc127 += er32(PTC127);
3590 adapter->stats.ptc255 += er32(PTC255);
3591 adapter->stats.ptc511 += er32(PTC511);
3592 adapter->stats.ptc1023 += er32(PTC1023);
3593 adapter->stats.ptc1522 += er32(PTC1522);
3594 }
3595
3596 adapter->stats.mptc += er32(MPTC);
3597 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3598
3599 /* used for adaptive IFS */
3600
1dc32918 3601 hw->tx_packet_delta = er32(TPT);
1da177e4 3602 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3603 hw->collision_delta = er32(COLC);
1da177e4
LT		 3604 adapter->stats.colc += hw->collision_delta;
3605
96838a40 3606 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3607 adapter->stats.algnerrc += er32(ALGNERRC);
3608 adapter->stats.rxerrc += er32(RXERRC);
3609 adapter->stats.tncrs += er32(TNCRS);
3610 adapter->stats.cexterr += er32(CEXTERR);
3611 adapter->stats.tsctc += er32(TSCTC);
3612 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4 3613 }
96838a40 3614 if (hw->mac_type > e1000_82547_rev_2) {
1dc32918
JP		 3615 adapter->stats.iac += er32(IAC);
3616 adapter->stats.icrxoc += er32(ICRXOC);
3617
3618 if (hw->mac_type != e1000_ich8lan) {
3619 adapter->stats.icrxptc += er32(ICRXPTC);
3620 adapter->stats.icrxatc += er32(ICRXATC);
3621 adapter->stats.ictxptc += er32(ICTXPTC);
3622 adapter->stats.ictxatc += er32(ICTXATC);
3623 adapter->stats.ictxqec += er32(ICTXQEC);
3624 adapter->stats.ictxqmtc += er32(ICTXQMTC);
3625 adapter->stats.icrxdmtc += er32(ICRXDMTC);
cd94dd0b 3626 }
2d7edb92 3627 }
1da177e4
LT		 3628
3629 /* Fill out the OS statistics structure */
1da177e4
LT		 3630 adapter->net_stats.multicast = adapter->stats.mprc;
3631 adapter->net_stats.collisions = adapter->stats.colc;
3632
3633 /* Rx Errors */
3634
87041639
JK		 3635 /* RLEC on some newer hardware can be incorrect so build
3636 * our own version based on RUC and ROC */
1da177e4
LT		 3637 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3638 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3639 adapter->stats.ruc + adapter->stats.roc +
3640 adapter->stats.cexterr;
49559854
MW		 3641 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3642 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3643 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3644 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3645 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3646
3647 /* Tx Errors */
49559854
MW		 3648 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3649 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3650 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3651 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3652 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3653 if (hw->bad_tx_carr_stats_fd &&
167fb284
JG		 3654 adapter->link_duplex == FULL_DUPLEX) {
3655 adapter->net_stats.tx_carrier_errors = 0;
3656 adapter->stats.tncrs = 0;
3657 }
1da177e4
LT		 3658
3659 /* Tx Dropped needs to be maintained elsewhere */
3660
3661 /* Phy Stats */
96838a40
JB		 3662 if (hw->media_type == e1000_media_type_copper) {
3663 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3664 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3665 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3666 adapter->phy_stats.idle_errors += phy_tmp;
3667 }
3668
96838a40 3669 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3670 (hw->phy_type == e1000_phy_m88) &&
3671 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3672 adapter->phy_stats.receive_errors += phy_tmp;
3673 }
3674
15e376b4 3675 /* Management Stats */
1dc32918
JP		 3676 if (hw->has_smbus) {
3677 adapter->stats.mgptc += er32(MGTPTC);
3678 adapter->stats.mgprc += er32(MGTPRC);
3679 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3680 }
3681
1da177e4
LT		 3682 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3683}
9ac98284
JB		 3684
3685/**
3686 * e1000_intr_msi - Interrupt Handler
3687 * @irq: interrupt number
3688 * @data: pointer to a network interface device structure
3689 **/
3690
64798845 3691static irqreturn_t e1000_intr_msi(int irq, void *data)
9ac98284
JB		 3692{
3693 struct net_device *netdev = data;
3694 struct e1000_adapter *adapter = netdev_priv(netdev);
3695 struct e1000_hw *hw = &adapter->hw;
1dc32918 3696 u32 icr = er32(ICR);
9ac98284 3697
9150b76a
JB		 3698 /* in NAPI mode read ICR disables interrupts using IAM */
3699
b5fc8f0c
JB		 3700 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3701 hw->get_link_status = 1;
3702 /* 80003ES2LAN workaround-- For packet buffer work-around on
3703 * link down event; disable receives here in the ISR and reset
3704 * adapter in watchdog */
3705 if (netif_carrier_ok(netdev) &&
1dc32918 3706 (hw->mac_type == e1000_80003es2lan)) {
b5fc8f0c 3707 /* disable receives */
1dc32918
JP		 3708 u32 rctl = er32(RCTL);
3709 ew32(RCTL, rctl & ~E1000_RCTL_EN);
9ac98284 3710 }
b5fc8f0c
JB		 3711 /* guard against interrupt when we're going down */
3712 if (!test_bit(__E1000_DOWN, &adapter->flags))
3713 mod_timer(&adapter->watchdog_timer, jiffies + 1);
9ac98284
JB		 3714 }
3715
288379f0 3716 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3717 adapter->total_tx_bytes = 0;
3718 adapter->total_tx_packets = 0;
3719 adapter->total_rx_bytes = 0;
3720 adapter->total_rx_packets = 0;
288379f0 3721 __napi_schedule(&adapter->napi);
835bb129 3722 } else
9ac98284 3723 e1000_irq_enable(adapter);
9ac98284
JB		 3724
3725 return IRQ_HANDLED;
3726}
1da177e4
LT		 3727
3728/**
3729 * e1000_intr - Interrupt Handler
3730 * @irq: interrupt number
3731 * @data: pointer to a network interface device structure
1da177e4
LT		 3732 **/
3733
64798845 3734static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3735{
3736 struct net_device *netdev = data;
60490fe0 3737 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3738 struct e1000_hw *hw = &adapter->hw;
1dc32918 3739 u32 rctl, icr = er32(ICR);
c3570acb 3740
15b2bee2 3741 if (unlikely((!icr) || test_bit(__E1000_RESETTING, &adapter->flags)))
835bb129
JB		 3742 return IRQ_NONE; /* Not our interrupt */
3743
835bb129
JB		 3744 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3745 * not set, then the adapter didn't send an interrupt */
3746 if (unlikely(hw->mac_type >= e1000_82571 &&
3747 !(icr & E1000_ICR_INT_ASSERTED)))
3748 return IRQ_NONE;
3749
9150b76a
JB		 3750 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3751 * need for the IMC write */
1da177e4 3752
96838a40 3753 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3754 hw->get_link_status = 1;
87041639
JK		 3755 /* 80003ES2LAN workaround--
3756 * For packet buffer work-around on link down event;
3757 * disable receives here in the ISR and
3758 * reset adapter in watchdog
3759 */
3760 if (netif_carrier_ok(netdev) &&
1dc32918 3761 (hw->mac_type == e1000_80003es2lan)) {
87041639 3762 /* disable receives */
1dc32918
JP		 3763 rctl = er32(RCTL);
3764 ew32(RCTL, rctl & ~E1000_RCTL_EN);
87041639 3765 }
1314bbf3
AK		 3766 /* guard against interrupt when we're going down */
3767 if (!test_bit(__E1000_DOWN, &adapter->flags))
3768 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3769 }
3770
1e613fd9 3771 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3772 /* disable interrupts, without the synchronize_irq bit */
1dc32918
JP		 3773 ew32(IMC, ~0);
3774 E1000_WRITE_FLUSH();
1e613fd9 3775 }
288379f0 3776 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3777 adapter->total_tx_bytes = 0;
3778 adapter->total_tx_packets = 0;
3779 adapter->total_rx_bytes = 0;
3780 adapter->total_rx_packets = 0;
288379f0 3781 __napi_schedule(&adapter->napi);
a6c42322 3782 } else {
90fb5135
AK		 3783 /* this really should not happen! if it does it is basically a
3784 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB		 3785 if (!test_bit(__E1000_DOWN, &adapter->flags))
3786 e1000_irq_enable(adapter);
3787 }
1da177e4 3788
1da177e4
LT		 3789 return IRQ_HANDLED;
3790}
3791
1da177e4
LT		 3792/**
3793 * e1000_clean - NAPI Rx polling callback
3794 * @adapter: board private structure
3795 **/
64798845 3796static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3797{
bea3348e
SH		 3798 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3799 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 3800 int tx_cleaned = 0, work_done = 0;
581d708e 3801
4cf1653a 3802 adapter = netdev_priv(poll_dev);
581d708e 3803
8017943e 3804 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3805
d3d9e484 3806 adapter->clean_rx(adapter, &adapter->rx_ring[0],
bea3348e 3807 &work_done, budget);
96838a40 3808
ccfb342c 3809 if (!tx_cleaned)
d2c7ddd6
DM		 3810 work_done = budget;
3811
53e52c72
DM		 3812 /* If budget not fully consumed, exit the polling mode */
3813 if (work_done < budget) {
835bb129
JB		 3814 if (likely(adapter->itr_setting & 3))
3815 e1000_set_itr(adapter);
288379f0 3816 napi_complete(napi);
a6c42322
JB		 3817 if (!test_bit(__E1000_DOWN, &adapter->flags))
3818 e1000_irq_enable(adapter);
1da177e4
LT		 3819 }
3820
bea3348e 3821 return work_done;
1da177e4
LT		 3822}
3823
1da177e4
LT		 3824/**
3825 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3826 * @adapter: board private structure
3827 **/
64798845
JP		 3828static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3829 struct e1000_tx_ring *tx_ring)
1da177e4 3830{
1dc32918 3831 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3832 struct net_device *netdev = adapter->netdev;
3833 struct e1000_tx_desc *tx_desc, *eop_desc;
3834 struct e1000_buffer *buffer_info;
3835 unsigned int i, eop;
2a1af5d7 3836 unsigned int count = 0;
df26fd2c 3837 bool cleaned = false;
835bb129 3838 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3839
3840 i = tx_ring->next_to_clean;
3841 eop = tx_ring->buffer_info[i].next_to_watch;
3842 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3843
ccfb342c
AD		 3844 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3845 (count < tx_ring->count)) {
3846 for (cleaned = false; !cleaned; count++) {
1da177e4
LT		 3847 tx_desc = E1000_TX_DESC(*tx_ring, i);
3848 buffer_info = &tx_ring->buffer_info[i];
3849 cleaned = (i == eop);
3850
835bb129 3851 if (cleaned) {
2b65326e 3852 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3853 unsigned int segs, bytecount;
3854 segs = skb_shinfo(skb)->gso_segs ?: 1;
3855 /* multiply data chunks by size of headers */
3856 bytecount = ((segs - 1) * skb_headlen(skb)) +
3857 skb->len;
2b65326e 3858 total_tx_packets += segs;
7753b171 3859 total_tx_bytes += bytecount;
835bb129 3860 }
fd803241 3861 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3862 tx_desc->upper.data = 0;
1da177e4 3863
96838a40 3864 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3865 }
581d708e 3866
1da177e4
LT		 3867 eop = tx_ring->buffer_info[i].next_to_watch;
3868 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3869 }
3870
3871 tx_ring->next_to_clean = i;
3872
77b2aad5 3873#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 3874 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3875 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3876 /* Make sure that anybody stopping the queue after this
3877 * sees the new next_to_clean.
3878 */
3879 smp_mb();
fcfb1224 3880 if (netif_queue_stopped(netdev)) {
77b2aad5 3881 netif_wake_queue(netdev);
fcfb1224
JB		 3882 ++adapter->restart_queue;
3883 }
77b2aad5 3884 }
2648345f 3885
581d708e 3886 if (adapter->detect_tx_hung) {
2648345f 3887 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3888 * check with the clearing of time_stamp and movement of i */
c3033b01 3889 adapter->detect_tx_hung = false;
ccfb342c
AD		 3890 if (tx_ring->buffer_info[i].time_stamp &&
3891 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
7e6c9861 3892 (adapter->tx_timeout_factor * HZ))
1dc32918 3893 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3894
3895 /* detected Tx unit hang */
c6963ef5 3896 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3897 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3898 " TDH <%x>\n"
3899 " TDT <%x>\n"
3900 " next_to_use <%x>\n"
3901 " next_to_clean <%x>\n"
3902 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3903 " time_stamp <%lx>\n"
3904 " next_to_watch <%x>\n"
3905 " jiffies <%lx>\n"
3906 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3907 (unsigned long)((tx_ring - adapter->tx_ring) /
3908 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3909 readl(hw->hw_addr + tx_ring->tdh),
3910 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3911 tx_ring->next_to_use,
392137fa 3912 tx_ring->next_to_clean,
ccfb342c 3913 tx_ring->buffer_info[i].time_stamp,
70b8f1e1
MC		 3914 eop,
3915 jiffies,
3916 eop_desc->upper.fields.status);
1da177e4 3917 netif_stop_queue(netdev);
70b8f1e1 3918 }
1da177e4 3919 }
835bb129
JB		 3920 adapter->total_tx_bytes += total_tx_bytes;
3921 adapter->total_tx_packets += total_tx_packets;
ef90e4ec
AK		 3922 adapter->net_stats.tx_bytes += total_tx_bytes;
3923 adapter->net_stats.tx_packets += total_tx_packets;
ccfb342c 3924 return (count < tx_ring->count);
1da177e4
LT		 3925}
3926
3927/**
3928 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3929 * @adapter: board private structure
3930 * @status_err: receive descriptor status and error fields
3931 * @csum: receive descriptor csum field
3932 * @sk_buff: socket buffer with received data
1da177e4
LT		 3933 **/
3934
64798845
JP		 3935static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3936 u32 csum, struct sk_buff *skb)
1da177e4 3937{
1dc32918 3938 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3939 u16 status = (u16)status_err;
3940 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3941 skb->ip_summed = CHECKSUM_NONE;
3942
1da177e4 3943 /* 82543 or newer only */
1dc32918 3944 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3945 /* Ignore Checksum bit is set */
96838a40 3946 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3947 /* TCP/UDP checksum error bit is set */
96838a40 3948 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3949 /* let the stack verify checksum errors */
1da177e4 3950 adapter->hw_csum_err++;
2d7edb92
MC		 3951 return;
3952 }
3953 /* TCP/UDP Checksum has not been calculated */
1dc32918 3954 if (hw->mac_type <= e1000_82547_rev_2) {
96838a40 3955 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3956 return;
1da177e4 3957 } else {
96838a40 3958 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3959 return;
3960 }
3961 /* It must be a TCP or UDP packet with a valid checksum */
3962 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3963 /* TCP checksum is good */
3964 skb->ip_summed = CHECKSUM_UNNECESSARY;
1dc32918 3965 } else if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3966 /* IP fragment with UDP payload */
3967 /* Hardware complements the payload checksum, so we undo it
3968 * and then put the value in host order for further stack use.
3969 */
3e18826c
AV		 3970 __sum16 sum = (__force __sum16)htons(csum);
3971 skb->csum = csum_unfold(~sum);
84fa7933 3972 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3973 }
2d7edb92 3974 adapter->hw_csum_good++;
1da177e4
LT		 3975}
3976
3977/**
2d7edb92 3978 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3979 * @adapter: board private structure
3980 **/
64798845
JP		 3981static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3982 struct e1000_rx_ring *rx_ring,
3983 int *work_done, int work_to_do)
1da177e4 3984{
1dc32918 3985 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3986 struct net_device *netdev = adapter->netdev;
3987 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3988 struct e1000_rx_desc *rx_desc, *next_rxd;
3989 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3990 unsigned long flags;
406874a7
JP		 3991 u32 length;
3992 u8 last_byte;
1da177e4 3993 unsigned int i;
72d64a43 3994 int cleaned_count = 0;
c3033b01 3995 bool cleaned = false;
835bb129 3996 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3997
3998 i = rx_ring->next_to_clean;
3999 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4000 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4001
b92ff8ee 4002 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4003 struct sk_buff *skb;
a292ca6e 4004 u8 status;
90fb5135 4005
96838a40 4006 if (*work_done >= work_to_do)
1da177e4
LT		 4007 break;
4008 (*work_done)++;
c3570acb 4009
a292ca6e 4010 status = rx_desc->status;
b92ff8ee 4011 skb = buffer_info->skb;
86c3d59f
JB		 4012 buffer_info->skb = NULL;
4013
30320be8
JK		 4014 prefetch(skb->data - NET_IP_ALIGN);
4015
86c3d59f
JB		 4016 if (++i == rx_ring->count) i = 0;
4017 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4018 prefetch(next_rxd);
4019
86c3d59f 4020 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4021
c3033b01 4022 cleaned = true;
72d64a43 4023 cleaned_count++;
a292ca6e
JK		 4024 pci_unmap_single(pdev,
4025 buffer_info->dma,
4026 buffer_info->length,
1da177e4
LT		 4027 PCI_DMA_FROMDEVICE);
4028
1da177e4
LT		 4029 length = le16_to_cpu(rx_desc->length);
4030
a1415ee6
JK		 4031 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4032 /* All receives must fit into a single buffer */
4033 E1000_DBG("%s: Receive packet consumed multiple"
4034 " buffers\n", netdev->name);
864c4e45 4035 /* recycle */
8fc897b0 4036 buffer_info->skb = skb;
1da177e4
LT		 4037 goto next_desc;
4038 }
4039
96838a40 4040 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4041 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4042 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4043 last_byte)) {
1da177e4 4044 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4045 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 4046 length, skb->data);
4047 spin_unlock_irqrestore(&adapter->stats_lock,
4048 flags);
4049 length--;
4050 } else {
9e2feace
AK		 4051 /* recycle */
4052 buffer_info->skb = skb;
1da177e4
LT		 4053 goto next_desc;
4054 }
1cb5821f 4055 }
1da177e4 4056
d2a1e213
JB		 4057 /* adjust length to remove Ethernet CRC, this must be
4058 * done after the TBI_ACCEPT workaround above */
4059 length -= 4;
4060
835bb129
JB		 4061 /* probably a little skewed due to removing CRC */
4062 total_rx_bytes += length;
4063 total_rx_packets++;
4064
a292ca6e
JK		 4065 /* code added for copybreak, this should improve
4066 * performance for small packets with large amounts
4067 * of reassembly being done in the stack */
1f753861 4068 if (length < copybreak) {
a292ca6e 4069 struct sk_buff *new_skb =
87f5032e 4070 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4071 if (new_skb) {
4072 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 4073 skb_copy_to_linear_data_offset(new_skb,
4074 -NET_IP_ALIGN,
4075 (skb->data -
4076 NET_IP_ALIGN),
4077 (length +
4078 NET_IP_ALIGN));
a292ca6e
JK		 4079 /* save the skb in buffer_info as good */
4080 buffer_info->skb = skb;
4081 skb = new_skb;
a292ca6e 4082 }
996695de
AK		 4083 /* else just continue with the old one */
4084 }
a292ca6e 4085 /* end copybreak code */
996695de 4086 skb_put(skb, length);
1da177e4
LT		 4087
4088 /* Receive Checksum Offload */
a292ca6e 4089 e1000_rx_checksum(adapter,
406874a7
JP		 4090 (u32)(status) |
4091 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4092 le16_to_cpu(rx_desc->csum), skb);
96838a40 4093
1da177e4 4094 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 4095
96838a40 4096 if (unlikely(adapter->vlgrp &&
a292ca6e 4097 (status & E1000_RXD_STAT_VP))) {
1da177e4 4098 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
38b22195 4099 le16_to_cpu(rx_desc->special));
1da177e4
LT		 4100 } else {
4101 netif_receive_skb(skb);
4102 }
c3570acb 4103
1da177e4
LT		 4104next_desc:
4105 rx_desc->status = 0;
1da177e4 4106
72d64a43
JK		 4107 /* return some buffers to hardware, one at a time is too slow */
4108 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4109 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4110 cleaned_count = 0;
4111 }
4112
30320be8 4113 /* use prefetched values */
86c3d59f
JB		 4114 rx_desc = next_rxd;
4115 buffer_info = next_buffer;
1da177e4 4116 }
1da177e4 4117 rx_ring->next_to_clean = i;
72d64a43
JK		 4118
4119 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4120 if (cleaned_count)
4121 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4122
835bb129
JB		 4123 adapter->total_rx_packets += total_rx_packets;
4124 adapter->total_rx_bytes += total_rx_bytes;
ef90e4ec
AK		 4125 adapter->net_stats.rx_bytes += total_rx_bytes;
4126 adapter->net_stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4127 return cleaned;
4128}
4129
1da177e4 4130/**
2d7edb92 4131 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4132 * @adapter: address of board private structure
4133 **/
4134
64798845
JP		 4135static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4136 struct e1000_rx_ring *rx_ring,
4137 int cleaned_count)
1da177e4 4138{
1dc32918 4139 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4140 struct net_device *netdev = adapter->netdev;
4141 struct pci_dev *pdev = adapter->pdev;
4142 struct e1000_rx_desc *rx_desc;
4143 struct e1000_buffer *buffer_info;
4144 struct sk_buff *skb;
2648345f
MC		 4145 unsigned int i;
4146 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4147
4148 i = rx_ring->next_to_use;
4149 buffer_info = &rx_ring->buffer_info[i];
4150
a292ca6e 4151 while (cleaned_count--) {
ca6f7224
CH		 4152 skb = buffer_info->skb;
4153 if (skb) {
a292ca6e
JK		 4154 skb_trim(skb, 0);
4155 goto map_skb;
4156 }
4157
ca6f7224 4158 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4159 if (unlikely(!skb)) {
1da177e4 4160 /* Better luck next round */
72d64a43 4161 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4162 break;
4163 }
4164
2648345f 4165 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4166 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4167 struct sk_buff *oldskb = skb;
2648345f
MC		 4168 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4169 "at %p\n", bufsz, skb->data);
4170 /* Try again, without freeing the previous */
87f5032e 4171 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4172 /* Failed allocation, critical failure */
1da177e4
LT		 4173 if (!skb) {
4174 dev_kfree_skb(oldskb);
4175 break;
4176 }
2648345f 4177
1da177e4
LT		 4178 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4179 /* give up */
4180 dev_kfree_skb(skb);
4181 dev_kfree_skb(oldskb);
4182 break; /* while !buffer_info->skb */
1da177e4 4183 }
ca6f7224
CH		 4184
4185 /* Use new allocation */
4186 dev_kfree_skb(oldskb);
1da177e4 4187 }
1da177e4
LT		 4188 /* Make buffer alignment 2 beyond a 16 byte boundary
4189 * this will result in a 16 byte aligned IP header after
4190 * the 14 byte MAC header is removed
4191 */
4192 skb_reserve(skb, NET_IP_ALIGN);
4193
1da177e4
LT		 4194 buffer_info->skb = skb;
4195 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4196map_skb:
1da177e4
LT		 4197 buffer_info->dma = pci_map_single(pdev,
4198 skb->data,
4199 adapter->rx_buffer_len,
4200 PCI_DMA_FROMDEVICE);
4201
2648345f
MC		 4202 /* Fix for errata 23, can't cross 64kB boundary */
4203 if (!e1000_check_64k_bound(adapter,
4204 (void *)(unsigned long)buffer_info->dma,
4205 adapter->rx_buffer_len)) {
4206 DPRINTK(RX_ERR, ERR,
4207 "dma align check failed: %u bytes at %p\n",
4208 adapter->rx_buffer_len,
4209 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4210 dev_kfree_skb(skb);
4211 buffer_info->skb = NULL;
4212
2648345f 4213 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4214 adapter->rx_buffer_len,
4215 PCI_DMA_FROMDEVICE);
4216
4217 break; /* while !buffer_info->skb */
4218 }
1da177e4
LT		 4219 rx_desc = E1000_RX_DESC(*rx_ring, i);
4220 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4221
96838a40
JB		 4222 if (unlikely(++i == rx_ring->count))
4223 i = 0;
1da177e4
LT		 4224 buffer_info = &rx_ring->buffer_info[i];
4225 }
4226
b92ff8ee
JB		 4227 if (likely(rx_ring->next_to_use != i)) {
4228 rx_ring->next_to_use = i;
4229 if (unlikely(i-- == 0))
4230 i = (rx_ring->count - 1);
4231
4232 /* Force memory writes to complete before letting h/w
4233 * know there are new descriptors to fetch. (Only
4234 * applicable for weak-ordered memory model archs,
4235 * such as IA-64). */
4236 wmb();
1dc32918 4237 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4238 }
1da177e4
LT		 4239}
4240
4241/**
4242 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4243 * @adapter:
4244 **/
4245
64798845 4246static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4247{
1dc32918 4248 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4249 u16 phy_status;
4250 u16 phy_ctrl;
1da177e4 4251
1dc32918
JP		 4252 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4253 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4254 return;
4255
96838a40 4256 if (adapter->smartspeed == 0) {
1da177e4
LT		 4257 /* If Master/Slave config fault is asserted twice,
4258 * we assume back-to-back */
1dc32918 4259 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4260 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4261 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4262 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4263 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4264 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4265 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4266 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4267 phy_ctrl);
4268 adapter->smartspeed++;
1dc32918
JP		 4269 if (!e1000_phy_setup_autoneg(hw) &&
4270 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4271 &phy_ctrl)) {
4272 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4273 MII_CR_RESTART_AUTO_NEG);
1dc32918 4274 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4275 phy_ctrl);
4276 }
4277 }
4278 return;
96838a40 4279 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4280 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4281 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4282 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4283 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4284 if (!e1000_phy_setup_autoneg(hw) &&
4285 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4286 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4287 MII_CR_RESTART_AUTO_NEG);
1dc32918 4288 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4289 }
4290 }
4291 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4292 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4293 adapter->smartspeed = 0;
4294}
4295
4296/**
4297 * e1000_ioctl -
4298 * @netdev:
4299 * @ifreq:
4300 * @cmd:
4301 **/
4302
64798845 4303static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4304{
4305 switch (cmd) {
4306 case SIOCGMIIPHY:
4307 case SIOCGMIIREG:
4308 case SIOCSMIIREG:
4309 return e1000_mii_ioctl(netdev, ifr, cmd);
4310 default:
4311 return -EOPNOTSUPP;
4312 }
4313}
4314
4315/**
4316 * e1000_mii_ioctl -
4317 * @netdev:
4318 * @ifreq:
4319 * @cmd:
4320 **/
4321
64798845
JP		 4322static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4323 int cmd)
1da177e4 4324{
60490fe0 4325 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4326 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4327 struct mii_ioctl_data *data = if_mii(ifr);
4328 int retval;
406874a7
JP		 4329 u16 mii_reg;
4330 u16 spddplx;
97876fc6 4331 unsigned long flags;
1da177e4 4332
1dc32918 4333 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4334 return -EOPNOTSUPP;
4335
4336 switch (cmd) {
4337 case SIOCGMIIPHY:
1dc32918 4338 data->phy_id = hw->phy_addr;
1da177e4
LT		 4339 break;
4340 case SIOCGMIIREG:
96838a40 4341 if (!capable(CAP_NET_ADMIN))
1da177e4 4342 return -EPERM;
97876fc6 4343 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4344 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4345 &data->val_out)) {
4346 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4347 return -EIO;
97876fc6
MC		 4348 }
4349 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4350 break;
4351 case SIOCSMIIREG:
96838a40 4352 if (!capable(CAP_NET_ADMIN))
1da177e4 4353 return -EPERM;
96838a40 4354 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4355 return -EFAULT;
4356 mii_reg = data->val_in;
97876fc6 4357 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4358 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4359 mii_reg)) {
4360 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4361 return -EIO;
97876fc6 4362 }
f0163ac4 4363 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4364 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4365 switch (data->reg_num) {
4366 case PHY_CTRL:
96838a40 4367 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4368 break;
96838a40 4369 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4370 hw->autoneg = 1;
4371 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4372 } else {
4373 if (mii_reg & 0x40)
4374 spddplx = SPEED_1000;
4375 else if (mii_reg & 0x2000)
4376 spddplx = SPEED_100;
4377 else
4378 spddplx = SPEED_10;
4379 spddplx += (mii_reg & 0x100)
cb764326
JK		 4380 ? DUPLEX_FULL :
4381 DUPLEX_HALF;
1da177e4
LT		 4382 retval = e1000_set_spd_dplx(adapter,
4383 spddplx);
f0163ac4 4384 if (retval)
1da177e4
LT		 4385 return retval;
4386 }
2db10a08
AK		 4387 if (netif_running(adapter->netdev))
4388 e1000_reinit_locked(adapter);
4389 else
1da177e4
LT		 4390 e1000_reset(adapter);
4391 break;
4392 case M88E1000_PHY_SPEC_CTRL:
4393 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4394 if (e1000_phy_reset(hw))
1da177e4
LT		 4395 return -EIO;
4396 break;
4397 }
4398 } else {
4399 switch (data->reg_num) {
4400 case PHY_CTRL:
96838a40 4401 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4402 break;
2db10a08
AK		 4403 if (netif_running(adapter->netdev))
4404 e1000_reinit_locked(adapter);
4405 else
1da177e4
LT		 4406 e1000_reset(adapter);
4407 break;
4408 }
4409 }
4410 break;
4411 default:
4412 return -EOPNOTSUPP;
4413 }
4414 return E1000_SUCCESS;
4415}
4416
64798845 4417void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4418{
4419 struct e1000_adapter *adapter = hw->back;
2648345f 4420 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4421
96838a40 4422 if (ret_val)
2648345f 4423 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4424}
4425
64798845 4426void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4427{
4428 struct e1000_adapter *adapter = hw->back;
4429
4430 pci_clear_mwi(adapter->pdev);
4431}
4432
64798845 4433int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4434{
4435 struct e1000_adapter *adapter = hw->back;
4436 return pcix_get_mmrbc(adapter->pdev);
4437}
4438
64798845 4439void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4440{
4441 struct e1000_adapter *adapter = hw->back;
4442 pcix_set_mmrbc(adapter->pdev, mmrbc);
4443}
4444
64798845 4445s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
caeccb68
JK		 4446{
4447 struct e1000_adapter *adapter = hw->back;
406874a7 4448 u16 cap_offset;
caeccb68
JK		 4449
4450 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4451 if (!cap_offset)
4452 return -E1000_ERR_CONFIG;
4453
4454 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4455
4456 return E1000_SUCCESS;
4457}
4458
64798845 4459void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4460{
4461 outl(value, port);
4462}
4463
64798845
JP		 4464static void e1000_vlan_rx_register(struct net_device *netdev,
4465 struct vlan_group *grp)
1da177e4 4466{
60490fe0 4467 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4468 struct e1000_hw *hw = &adapter->hw;
406874a7 4469 u32 ctrl, rctl;
1da177e4 4470
9150b76a
JB		 4471 if (!test_bit(__E1000_DOWN, &adapter->flags))
4472 e1000_irq_disable(adapter);
1da177e4
LT		 4473 adapter->vlgrp = grp;
4474
96838a40 4475 if (grp) {
1da177e4 4476 /* enable VLAN tag insert/strip */
1dc32918 4477 ctrl = er32(CTRL);
1da177e4 4478 ctrl |= E1000_CTRL_VME;
1dc32918 4479 ew32(CTRL, ctrl);
1da177e4 4480
cd94dd0b 4481 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4482 /* enable VLAN receive filtering */
1dc32918 4483 rctl = er32(RCTL);
90fb5135 4484 rctl &= ~E1000_RCTL_CFIEN;
1dc32918 4485 ew32(RCTL, rctl);
90fb5135 4486 e1000_update_mng_vlan(adapter);
cd94dd0b 4487 }
1da177e4
LT		 4488 } else {
4489 /* disable VLAN tag insert/strip */
1dc32918 4490 ctrl = er32(CTRL);
1da177e4 4491 ctrl &= ~E1000_CTRL_VME;
1dc32918 4492 ew32(CTRL, ctrl);
1da177e4 4493
cd94dd0b 4494 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4495 if (adapter->mng_vlan_id !=
406874a7 4496 (u16)E1000_MNG_VLAN_NONE) {
90fb5135
AK		 4497 e1000_vlan_rx_kill_vid(netdev,
4498 adapter->mng_vlan_id);
4499 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4500 }
cd94dd0b 4501 }
1da177e4
LT		 4502 }
4503
9150b76a
JB		 4504 if (!test_bit(__E1000_DOWN, &adapter->flags))
4505 e1000_irq_enable(adapter);
1da177e4
LT		 4506}
4507
64798845 4508static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4509{
60490fe0 4510 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4511 struct e1000_hw *hw = &adapter->hw;
406874a7 4512 u32 vfta, index;
96838a40 4513
1dc32918 4514 if ((hw->mng_cookie.status &
96838a40
JB		 4515 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4516 (vid == adapter->mng_vlan_id))
2d7edb92 4517 return;
1da177e4
LT		 4518 /* add VID to filter table */
4519 index = (vid >> 5) & 0x7F;
1dc32918 4520 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4521 vfta |= (1 << (vid & 0x1F));
1dc32918 4522 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4523}
4524
64798845 4525static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4526{
60490fe0 4527 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4528 struct e1000_hw *hw = &adapter->hw;
406874a7 4529 u32 vfta, index;
1da177e4 4530
9150b76a
JB		 4531 if (!test_bit(__E1000_DOWN, &adapter->flags))
4532 e1000_irq_disable(adapter);
5c15bdec 4533 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4534 if (!test_bit(__E1000_DOWN, &adapter->flags))
4535 e1000_irq_enable(adapter);
1da177e4 4536
1dc32918 4537 if ((hw->mng_cookie.status &
96838a40 4538 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4539 (vid == adapter->mng_vlan_id)) {
4540 /* release control to f/w */
4541 e1000_release_hw_control(adapter);
2d7edb92 4542 return;
ff147013
JK		 4543 }
4544
1da177e4
LT		 4545 /* remove VID from filter table */
4546 index = (vid >> 5) & 0x7F;
1dc32918 4547 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4548 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4549 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4550}
4551
64798845 4552static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4553{
4554 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4555
96838a40 4556 if (adapter->vlgrp) {
406874a7 4557 u16 vid;
96838a40 4558 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4559 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4560 continue;
4561 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4562 }
4563 }
4564}
4565
64798845 4566int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4567{
1dc32918
JP		 4568 struct e1000_hw *hw = &adapter->hw;
4569
4570 hw->autoneg = 0;
1da177e4 4571
6921368f 4572 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4573 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4574 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4575 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4576 return -EINVAL;
4577 }
4578
96838a40 4579 switch (spddplx) {
1da177e4 4580 case SPEED_10 + DUPLEX_HALF:
1dc32918 4581 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4582 break;
4583 case SPEED_10 + DUPLEX_FULL:
1dc32918 4584 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4585 break;
4586 case SPEED_100 + DUPLEX_HALF:
1dc32918 4587 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4588 break;
4589 case SPEED_100 + DUPLEX_FULL:
1dc32918 4590 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4591 break;
4592 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4593 hw->autoneg = 1;
4594 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4595 break;
4596 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4597 default:
2648345f 4598 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4599 return -EINVAL;
4600 }
4601 return 0;
4602}
4603
b43fcd7d 4604static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4605{
4606 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4607 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4608 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4609 u32 ctrl, ctrl_ext, rctl, status;
4610 u32 wufc = adapter->wol;
6fdfef16 4611#ifdef CONFIG_PM
240b1710 4612 int retval = 0;
6fdfef16 4613#endif
1da177e4
LT		 4614
4615 netif_device_detach(netdev);
4616
2db10a08
AK		 4617 if (netif_running(netdev)) {
4618 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4619 e1000_down(adapter);
2db10a08 4620 }
1da177e4 4621
2f82665f 4622#ifdef CONFIG_PM
1d33e9c6 4623 retval = pci_save_state(pdev);
2f82665f
JB		 4624 if (retval)
4625 return retval;
4626#endif
4627
1dc32918 4628 status = er32(STATUS);
96838a40 4629 if (status & E1000_STATUS_LU)
1da177e4
LT		 4630 wufc &= ~E1000_WUFC_LNKC;
4631
96838a40 4632 if (wufc) {
1da177e4 4633 e1000_setup_rctl(adapter);
db0ce50d 4634 e1000_set_rx_mode(netdev);
1da177e4
LT		 4635
4636 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4637 if (wufc & E1000_WUFC_MC) {
1dc32918 4638 rctl = er32(RCTL);
1da177e4 4639 rctl |= E1000_RCTL_MPE;
1dc32918 4640 ew32(RCTL, rctl);
1da177e4
LT		 4641 }
4642
1dc32918
JP		 4643 if (hw->mac_type >= e1000_82540) {
4644 ctrl = er32(CTRL);
1da177e4
LT		 4645 /* advertise wake from D3Cold */
4646 #define E1000_CTRL_ADVD3WUC 0x00100000
4647 /* phy power management enable */
4648 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4649 ctrl |= E1000_CTRL_ADVD3WUC |
4650 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4651 ew32(CTRL, ctrl);
1da177e4
LT		 4652 }
4653
1dc32918
JP		 4654 if (hw->media_type == e1000_media_type_fiber ||
4655 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4656 /* keep the laser running in D3 */
1dc32918 4657 ctrl_ext = er32(CTRL_EXT);
1da177e4 4658 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4659 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4660 }
4661
2d7edb92 4662 /* Allow time for pending master requests to run */
1dc32918 4663 e1000_disable_pciex_master(hw);
2d7edb92 4664
1dc32918
JP		 4665 ew32(WUC, E1000_WUC_PME_EN);
4666 ew32(WUFC, wufc);
1da177e4 4667 } else {
1dc32918
JP		 4668 ew32(WUC, 0);
4669 ew32(WUFC, 0);
1da177e4
LT		 4670 }
4671
0fccd0e9
JG		 4672 e1000_release_manageability(adapter);
4673
b43fcd7d
RW		 4674 *enable_wake = !!wufc;
4675
0fccd0e9 4676 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 4677 if (adapter->en_mng_pt)
4678 *enable_wake = true;
1da177e4 4679
1dc32918
JP		 4680 if (hw->phy_type == e1000_phy_igp_3)
4681 e1000_phy_powerdown_workaround(hw);
cd94dd0b 4682
edd106fc
AK		 4683 if (netif_running(netdev))
4684 e1000_free_irq(adapter);
4685
b55ccb35
JK		 4686 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4687 * would have already happened in close and is redundant. */
4688 e1000_release_hw_control(adapter);
2d7edb92 4689
1da177e4 4690 pci_disable_device(pdev);
240b1710 4691
1da177e4
LT		 4692 return 0;
4693}
4694
2f82665f 4695#ifdef CONFIG_PM
b43fcd7d
RW		 4696static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4697{
4698 int retval;
4699 bool wake;
4700
4701 retval = __e1000_shutdown(pdev, &wake);
4702 if (retval)
4703 return retval;
4704
4705 if (wake) {
4706 pci_prepare_to_sleep(pdev);
4707 } else {
4708 pci_wake_from_d3(pdev, false);
4709 pci_set_power_state(pdev, PCI_D3hot);
4710 }
4711
4712 return 0;
4713}
4714
64798845 4715static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4716{
4717 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4718 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4719 struct e1000_hw *hw = &adapter->hw;
406874a7 4720 u32 err;
1da177e4 4721
d0e027db 4722 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4723 pci_restore_state(pdev);
81250297
TI		 4724
4725 if (adapter->need_ioport)
4726 err = pci_enable_device(pdev);
4727 else
4728 err = pci_enable_device_mem(pdev);
c7be73bc 4729 if (err) {
3d1dd8cb
AK		 4730 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4731 return err;
4732 }
a4cb847d 4733 pci_set_master(pdev);
1da177e4 4734
d0e027db
AK		 4735 pci_enable_wake(pdev, PCI_D3hot, 0);
4736 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4737
c7be73bc
JP		 4738 if (netif_running(netdev)) {
4739 err = e1000_request_irq(adapter);
4740 if (err)
4741 return err;
4742 }
edd106fc
AK		 4743
4744 e1000_power_up_phy(adapter);
1da177e4 4745 e1000_reset(adapter);
1dc32918 4746 ew32(WUS, ~0);
1da177e4 4747
0fccd0e9
JG		 4748 e1000_init_manageability(adapter);
4749
96838a40 4750 if (netif_running(netdev))
1da177e4
LT		 4751 e1000_up(adapter);
4752
4753 netif_device_attach(netdev);
4754
b55ccb35
JK		 4755 /* If the controller is 82573 and f/w is AMT, do not set
4756 * DRV_LOAD until the interface is up. For all other cases,
4757 * let the f/w know that the h/w is now under the control
4758 * of the driver. */
1dc32918
JP		 4759 if (hw->mac_type != e1000_82573 ||
4760 !e1000_check_mng_mode(hw))
b55ccb35 4761 e1000_get_hw_control(adapter);
2d7edb92 4762
1da177e4
LT		 4763 return 0;
4764}
4765#endif
c653e635
AK		 4766
4767static void e1000_shutdown(struct pci_dev *pdev)
4768{
b43fcd7d
RW		 4769 bool wake;
4770
4771 __e1000_shutdown(pdev, &wake);
4772
4773 if (system_state == SYSTEM_POWER_OFF) {
4774 pci_wake_from_d3(pdev, wake);
4775 pci_set_power_state(pdev, PCI_D3hot);
4776 }
c653e635
AK		 4777}
4778
1da177e4
LT		 4779#ifdef CONFIG_NET_POLL_CONTROLLER
4780/*
4781 * Polling 'interrupt' - used by things like netconsole to send skbs
4782 * without having to re-enable interrupts. It's not called while
4783 * the interrupt routine is executing.
4784 */
64798845 4785static void e1000_netpoll(struct net_device *netdev)
1da177e4 4786{
60490fe0 4787 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4788
1da177e4 4789 disable_irq(adapter->pdev->irq);
7d12e780 4790 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4791 enable_irq(adapter->pdev->irq);
4792}
4793#endif
4794
9026729b
AK		 4795/**
4796 * e1000_io_error_detected - called when PCI error is detected
4797 * @pdev: Pointer to PCI device
4798 * @state: The current pci conneection state
4799 *
4800 * This function is called after a PCI bus error affecting
4801 * this device has been detected.
4802 */
64798845
JP		 4803static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4804 pci_channel_state_t state)
9026729b
AK		 4805{
4806 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4807 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4808
4809 netif_device_detach(netdev);
4810
4811 if (netif_running(netdev))
4812 e1000_down(adapter);
72e8d6bb 4813 pci_disable_device(pdev);
9026729b
AK		 4814
4815 /* Request a slot slot reset. */
4816 return PCI_ERS_RESULT_NEED_RESET;
4817}
4818
4819/**
4820 * e1000_io_slot_reset - called after the pci bus has been reset.
4821 * @pdev: Pointer to PCI device
4822 *
4823 * Restart the card from scratch, as if from a cold-boot. Implementation
4824 * resembles the first-half of the e1000_resume routine.
4825 */
4826static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4827{
4828 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4829 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4830 struct e1000_hw *hw = &adapter->hw;
81250297 4831 int err;
9026729b 4832
81250297
TI		 4833 if (adapter->need_ioport)
4834 err = pci_enable_device(pdev);
4835 else
4836 err = pci_enable_device_mem(pdev);
4837 if (err) {
9026729b
AK		 4838 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4839 return PCI_ERS_RESULT_DISCONNECT;
4840 }
4841 pci_set_master(pdev);
4842
dbf38c94
LV		 4843 pci_enable_wake(pdev, PCI_D3hot, 0);
4844 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4845
9026729b 4846 e1000_reset(adapter);
1dc32918 4847 ew32(WUS, ~0);
9026729b
AK		 4848
4849 return PCI_ERS_RESULT_RECOVERED;
4850}
4851
4852/**
4853 * e1000_io_resume - called when traffic can start flowing again.
4854 * @pdev: Pointer to PCI device
4855 *
4856 * This callback is called when the error recovery driver tells us that
4857 * its OK to resume normal operation. Implementation resembles the
4858 * second-half of the e1000_resume routine.
4859 */
4860static void e1000_io_resume(struct pci_dev *pdev)
4861{
4862 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4863 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4864 struct e1000_hw *hw = &adapter->hw;
0fccd0e9
JG		 4865
4866 e1000_init_manageability(adapter);
9026729b
AK		 4867
4868 if (netif_running(netdev)) {
4869 if (e1000_up(adapter)) {
4870 printk("e1000: can't bring device back up after reset\n");
4871 return;
4872 }
4873 }
4874
4875 netif_device_attach(netdev);
4876
0fccd0e9
JG		 4877 /* If the controller is 82573 and f/w is AMT, do not set
4878 * DRV_LOAD until the interface is up. For all other cases,
4879 * let the f/w know that the h/w is now under the control
4880 * of the driver. */
1dc32918
JP		 4881 if (hw->mac_type != e1000_82573 ||
4882 !e1000_check_mng_mode(hw))
0fccd0e9 4883 e1000_get_hw_control(adapter);
9026729b 4884
9026729b
AK		 4885}
4886
1da177e4 4887/* e1000_main.c */
Linux kernel - Deliverables
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