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Merge branch 'upstream-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/linvil...
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
31/* Change Log
73629bbc
JB		 32 * 6.3.9 12/16/2005
33 * o incorporate fix for recycled skbs from IBM LTC
34 * 6.3.7 11/18/2005
35 * o Honor eeprom setting for enabling/disabling Wake On Lan
36 * 6.3.5 11/17/2005
37 * o Fix memory leak in rx ring handling for PCI Express adapters
38 * 6.3.4 11/8/05
39 * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
40 * 6.3.2 9/20/05
41 * o Render logic that sets/resets DRV_LOAD as inline functions to
42 * avoid code replication. If f/w is AMT then set DRV_LOAD only when
43 * network interface is open.
44 * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
45 * o Adjust PBA partioning for Jumbo frames using MTU size and not
46 * rx_buffer_len
47 * 6.3.1 9/19/05
48 * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
49 (e1000_clean_tx_irq)
50 * o Support for 8086:10B5 device (Quad Port)
51 * 6.2.14 9/15/05
52 * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
53 * open/close
54 * 6.2.13 9/14/05
55 * o Invoke e1000_check_mng_mode only for 8257x controllers since it
56 * accesses the FWSM that is not supported in other controllers
57 * 6.2.12 9/9/05
58 * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
59 * o set RCTL:SECRC only for controllers newer than 82543.
60 * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
61 * This code was moved from e1000_remove to e1000_close
62 * 6.2.10 9/6/05
63 * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
64 * o Enable fc by default on 82573 controllers (do not read eeprom)
65 * o Fix rx_errors statistic not to include missed_packet_count
66 * o Fix rx_dropped statistic not to include missed_packet_count
67 (Padraig Brady)
68 * 6.2.9 8/30/05
69 * o Remove call to update statistics from the controller ib e1000_get_stats
70 * 6.2.8 8/30/05
71 * o Improved algorithm for rx buffer allocation/rdt update
72 * o Flow control watermarks relative to rx PBA size
73 * o Simplified 'Tx Hung' detect logic
74 * 6.2.7 8/17/05
75 * o Report rx buffer allocation failures and tx timeout counts in stats
76 * 6.2.6 8/16/05
77 * o Implement workaround for controller erratum -- linear non-tso packet
78 * following a TSO gets written back prematurely
79 * 6.2.5 8/15/05
80 * o Set netdev->tx_queue_len based on link speed/duplex settings.
81 * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
82 * o Do not power off PHY if SoL/IDER session is active
83 * 6.2.4 8/10/05
84 * o Fix loopback test setup/cleanup for 82571/3 controllers
85 * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
86 * all packets as raw
87 * o Prevent operations that will cause the PHY to be reset if SoL/IDER
88 * sessions are active and log a message
89 * 6.2.2 7/21/05
90 * o used fixed size descriptors for all MTU sizes, reduces memory load
73629bbc
JB		 91 * 6.1.2 4/13/05
92 * o Fixed ethtool diagnostics
93 * o Enabled flow control to take default eeprom settings
94 * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
95 * calls, one from mii_ioctl and other from within update_stats while
96 * processing MIIREG ioctl.
1da177e4
LT		 97 */
98
99char e1000_driver_name[] = "e1000";
3ad2cc67 100static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 101#ifndef CONFIG_E1000_NAPI
102#define DRIVERNAPI
103#else
104#define DRIVERNAPI "-NAPI"
105#endif
a1415ee6 106#define DRV_VERSION "6.3.9-k4"DRIVERNAPI
1da177e4 107char e1000_driver_version[] = DRV_VERSION;
3ad2cc67 108static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 109
110/* e1000_pci_tbl - PCI Device ID Table
111 *
112 * Last entry must be all 0s
113 *
114 * Macro expands to...
115 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
116 */
117static struct pci_device_id e1000_pci_tbl[] = {
118 INTEL_E1000_ETHERNET_DEVICE(0x1000),
119 INTEL_E1000_ETHERNET_DEVICE(0x1001),
120 INTEL_E1000_ETHERNET_DEVICE(0x1004),
121 INTEL_E1000_ETHERNET_DEVICE(0x1008),
122 INTEL_E1000_ETHERNET_DEVICE(0x1009),
123 INTEL_E1000_ETHERNET_DEVICE(0x100C),
124 INTEL_E1000_ETHERNET_DEVICE(0x100D),
125 INTEL_E1000_ETHERNET_DEVICE(0x100E),
126 INTEL_E1000_ETHERNET_DEVICE(0x100F),
127 INTEL_E1000_ETHERNET_DEVICE(0x1010),
128 INTEL_E1000_ETHERNET_DEVICE(0x1011),
129 INTEL_E1000_ETHERNET_DEVICE(0x1012),
130 INTEL_E1000_ETHERNET_DEVICE(0x1013),
131 INTEL_E1000_ETHERNET_DEVICE(0x1014),
132 INTEL_E1000_ETHERNET_DEVICE(0x1015),
133 INTEL_E1000_ETHERNET_DEVICE(0x1016),
134 INTEL_E1000_ETHERNET_DEVICE(0x1017),
135 INTEL_E1000_ETHERNET_DEVICE(0x1018),
136 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 137 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 138 INTEL_E1000_ETHERNET_DEVICE(0x101D),
139 INTEL_E1000_ETHERNET_DEVICE(0x101E),
140 INTEL_E1000_ETHERNET_DEVICE(0x1026),
141 INTEL_E1000_ETHERNET_DEVICE(0x1027),
142 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 143 INTEL_E1000_ETHERNET_DEVICE(0x105E),
144 INTEL_E1000_ETHERNET_DEVICE(0x105F),
145 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 146 INTEL_E1000_ETHERNET_DEVICE(0x1075),
147 INTEL_E1000_ETHERNET_DEVICE(0x1076),
148 INTEL_E1000_ETHERNET_DEVICE(0x1077),
149 INTEL_E1000_ETHERNET_DEVICE(0x1078),
150 INTEL_E1000_ETHERNET_DEVICE(0x1079),
151 INTEL_E1000_ETHERNET_DEVICE(0x107A),
152 INTEL_E1000_ETHERNET_DEVICE(0x107B),
153 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 154 INTEL_E1000_ETHERNET_DEVICE(0x107D),
155 INTEL_E1000_ETHERNET_DEVICE(0x107E),
156 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 157 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 158 INTEL_E1000_ETHERNET_DEVICE(0x108B),
159 INTEL_E1000_ETHERNET_DEVICE(0x108C),
b7ee49db 160 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 161 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 162 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 163 /* required last entry */
164 {0,}
165};
166
167MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
168
169int e1000_up(struct e1000_adapter *adapter);
170void e1000_down(struct e1000_adapter *adapter);
171void e1000_reset(struct e1000_adapter *adapter);
172int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
581d708e
MC		 173int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
174int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
175void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
176void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67
AB		 177static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
178 struct e1000_tx_ring *txdr);
179static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
180 struct e1000_rx_ring *rxdr);
181static void e1000_free_tx_resources(struct e1000_adapter *adapter,
182 struct e1000_tx_ring *tx_ring);
183static void e1000_free_rx_resources(struct e1000_adapter *adapter,
184 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 185void e1000_update_stats(struct e1000_adapter *adapter);
186
187/* Local Function Prototypes */
188
189static int e1000_init_module(void);
190static void e1000_exit_module(void);
191static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
192static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e
MC		 193static int e1000_alloc_queues(struct e1000_adapter *adapter);
194#ifdef CONFIG_E1000_MQ
195static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
196#endif
1da177e4
LT		 197static int e1000_sw_init(struct e1000_adapter *adapter);
198static int e1000_open(struct net_device *netdev);
199static int e1000_close(struct net_device *netdev);
200static void e1000_configure_tx(struct e1000_adapter *adapter);
201static void e1000_configure_rx(struct e1000_adapter *adapter);
202static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 203static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
204static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
205static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
206 struct e1000_tx_ring *tx_ring);
207static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
208 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 209static void e1000_set_multi(struct net_device *netdev);
210static void e1000_update_phy_info(unsigned long data);
211static void e1000_watchdog(unsigned long data);
212static void e1000_watchdog_task(struct e1000_adapter *adapter);
213static void e1000_82547_tx_fifo_stall(unsigned long data);
214static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
215static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
216static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
217static int e1000_set_mac(struct net_device *netdev, void *p);
218static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 219static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
220 struct e1000_tx_ring *tx_ring);
1da177e4 221#ifdef CONFIG_E1000_NAPI
581d708e 222static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 223static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 224 struct e1000_rx_ring *rx_ring,
1da177e4 225 int *work_done, int work_to_do);
2d7edb92 226static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 227 struct e1000_rx_ring *rx_ring,
2d7edb92 228 int *work_done, int work_to_do);
1da177e4 229#else
581d708e
MC		 230static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
231 struct e1000_rx_ring *rx_ring);
232static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
233 struct e1000_rx_ring *rx_ring);
1da177e4 234#endif
581d708e 235static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 236 struct e1000_rx_ring *rx_ring,
237 int cleaned_count);
581d708e 238static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 239 struct e1000_rx_ring *rx_ring,
240 int cleaned_count);
1da177e4
LT		 241static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
242static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
243 int cmd);
244void e1000_set_ethtool_ops(struct net_device *netdev);
245static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
246static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
247static void e1000_tx_timeout(struct net_device *dev);
248static void e1000_tx_timeout_task(struct net_device *dev);
249static void e1000_smartspeed(struct e1000_adapter *adapter);
250static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
251 struct sk_buff *skb);
252
253static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
254static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
255static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
256static void e1000_restore_vlan(struct e1000_adapter *adapter);
257
1da177e4 258#ifdef CONFIG_PM
977e74b5 259static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 260static int e1000_resume(struct pci_dev *pdev);
261#endif
262
263#ifdef CONFIG_NET_POLL_CONTROLLER
264/* for netdump / net console */
265static void e1000_netpoll (struct net_device *netdev);
266#endif
267
24025e4e
MC		 268#ifdef CONFIG_E1000_MQ
269/* for multiple Rx queues */
270void e1000_rx_schedule(void *data);
271#endif
272
1da177e4
LT		 273/* Exported from other modules */
274
275extern void e1000_check_options(struct e1000_adapter *adapter);
276
277static struct pci_driver e1000_driver = {
278 .name = e1000_driver_name,
279 .id_table = e1000_pci_tbl,
280 .probe = e1000_probe,
281 .remove = __devexit_p(e1000_remove),
282 /* Power Managment Hooks */
283#ifdef CONFIG_PM
284 .suspend = e1000_suspend,
285 .resume = e1000_resume
286#endif
287};
288
289MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
290MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
291MODULE_LICENSE("GPL");
292MODULE_VERSION(DRV_VERSION);
293
294static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
295module_param(debug, int, 0);
296MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
297
298/**
299 * e1000_init_module - Driver Registration Routine
300 *
301 * e1000_init_module is the first routine called when the driver is
302 * loaded. All it does is register with the PCI subsystem.
303 **/
304
305static int __init
306e1000_init_module(void)
307{
308 int ret;
309 printk(KERN_INFO "%s - version %s\n",
310 e1000_driver_string, e1000_driver_version);
311
312 printk(KERN_INFO "%s\n", e1000_copyright);
313
314 ret = pci_module_init(&e1000_driver);
8b378def 315
1da177e4
LT		 316 return ret;
317}
318
319module_init(e1000_init_module);
320
321/**
322 * e1000_exit_module - Driver Exit Cleanup Routine
323 *
324 * e1000_exit_module is called just before the driver is removed
325 * from memory.
326 **/
327
328static void __exit
329e1000_exit_module(void)
330{
1da177e4
LT		 331 pci_unregister_driver(&e1000_driver);
332}
333
334module_exit(e1000_exit_module);
335
336/**
337 * e1000_irq_disable - Mask off interrupt generation on the NIC
338 * @adapter: board private structure
339 **/
340
341static inline void
342e1000_irq_disable(struct e1000_adapter *adapter)
343{
344 atomic_inc(&adapter->irq_sem);
345 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
346 E1000_WRITE_FLUSH(&adapter->hw);
347 synchronize_irq(adapter->pdev->irq);
348}
349
350/**
351 * e1000_irq_enable - Enable default interrupt generation settings
352 * @adapter: board private structure
353 **/
354
355static inline void
356e1000_irq_enable(struct e1000_adapter *adapter)
357{
96838a40 358 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 359 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
360 E1000_WRITE_FLUSH(&adapter->hw);
361 }
362}
3ad2cc67
AB		 363
364static void
2d7edb92
MC		 365e1000_update_mng_vlan(struct e1000_adapter *adapter)
366{
367 struct net_device *netdev = adapter->netdev;
368 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
369 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 370 if (adapter->vlgrp) {
371 if (!adapter->vlgrp->vlan_devices[vid]) {
372 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 373 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
374 e1000_vlan_rx_add_vid(netdev, vid);
375 adapter->mng_vlan_id = vid;
376 } else
377 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 378
379 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
380 (vid != old_vid) &&
2d7edb92
MC		 381 !adapter->vlgrp->vlan_devices[old_vid])
382 e1000_vlan_rx_kill_vid(netdev, old_vid);
383 }
384 }
385}
b55ccb35
JK		 386
387/**
388 * e1000_release_hw_control - release control of the h/w to f/w
389 * @adapter: address of board private structure
390 *
391 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
392 * For ASF and Pass Through versions of f/w this means that the
393 * driver is no longer loaded. For AMT version (only with 82573) i
394 * of the f/w this means that the netowrk i/f is closed.
395 *
396 **/
397
398static inline void
399e1000_release_hw_control(struct e1000_adapter *adapter)
400{
401 uint32_t ctrl_ext;
402 uint32_t swsm;
403
404 /* Let firmware taken over control of h/w */
405 switch (adapter->hw.mac_type) {
406 case e1000_82571:
407 case e1000_82572:
408 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
409 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
410 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
411 break;
412 case e1000_82573:
413 swsm = E1000_READ_REG(&adapter->hw, SWSM);
414 E1000_WRITE_REG(&adapter->hw, SWSM,
415 swsm & ~E1000_SWSM_DRV_LOAD);
416 default:
417 break;
418 }
419}
420
421/**
422 * e1000_get_hw_control - get control of the h/w from f/w
423 * @adapter: address of board private structure
424 *
425 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
426 * For ASF and Pass Through versions of f/w this means that
427 * the driver is loaded. For AMT version (only with 82573)
428 * of the f/w this means that the netowrk i/f is open.
429 *
430 **/
431
432static inline void
433e1000_get_hw_control(struct e1000_adapter *adapter)
434{
435 uint32_t ctrl_ext;
436 uint32_t swsm;
437 /* Let firmware know the driver has taken over */
438 switch (adapter->hw.mac_type) {
439 case e1000_82571:
440 case e1000_82572:
441 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
442 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
443 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
444 break;
445 case e1000_82573:
446 swsm = E1000_READ_REG(&adapter->hw, SWSM);
447 E1000_WRITE_REG(&adapter->hw, SWSM,
448 swsm | E1000_SWSM_DRV_LOAD);
449 break;
450 default:
451 break;
452 }
453}
454
1da177e4
LT		 455int
456e1000_up(struct e1000_adapter *adapter)
457{
458 struct net_device *netdev = adapter->netdev;
581d708e 459 int i, err;
1da177e4
LT		 460
461 /* hardware has been reset, we need to reload some things */
462
463 /* Reset the PHY if it was previously powered down */
96838a40 464 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 465 uint16_t mii_reg;
466 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
96838a40 467 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4
LT		 468 e1000_phy_reset(&adapter->hw);
469 }
470
471 e1000_set_multi(netdev);
472
473 e1000_restore_vlan(adapter);
474
475 e1000_configure_tx(adapter);
476 e1000_setup_rctl(adapter);
477 e1000_configure_rx(adapter);
72d64a43
JK		 478 /* call E1000_DESC_UNUSED which always leaves
479 * at least 1 descriptor unused to make sure
480 * next_to_use != next_to_clean */
f56799ea 481 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 482 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 483 adapter->alloc_rx_buf(adapter, ring,
484 E1000_DESC_UNUSED(ring));
f56799ea 485 }
1da177e4 486
fa4f7ef3 487#ifdef CONFIG_PCI_MSI
96838a40 488 if (adapter->hw.mac_type > e1000_82547_rev_2) {
fa4f7ef3 489 adapter->have_msi = TRUE;
96838a40 490 if ((err = pci_enable_msi(adapter->pdev))) {
fa4f7ef3
MC		 491 DPRINTK(PROBE, ERR,
492 "Unable to allocate MSI interrupt Error: %d\n", err);
493 adapter->have_msi = FALSE;
494 }
495 }
496#endif
96838a40 497 if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
1da177e4 498 SA_SHIRQ | SA_SAMPLE_RANDOM,
2648345f
MC		 499 netdev->name, netdev))) {
500 DPRINTK(PROBE, ERR,
501 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 502 return err;
2648345f 503 }
1da177e4 504
7bfa4816
JK		 505#ifdef CONFIG_E1000_MQ
506 e1000_setup_queue_mapping(adapter);
507#endif
508
509 adapter->tx_queue_len = netdev->tx_queue_len;
510
1da177e4 511 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 512
513#ifdef CONFIG_E1000_NAPI
514 netif_poll_enable(netdev);
515#endif
5de55624
MC		 516 e1000_irq_enable(adapter);
517
1da177e4
LT		 518 return 0;
519}
520
521void
522e1000_down(struct e1000_adapter *adapter)
523{
524 struct net_device *netdev = adapter->netdev;
57128197
JK		 525 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
526 e1000_check_mng_mode(&adapter->hw);
1da177e4
LT		 527
528 e1000_irq_disable(adapter);
24025e4e
MC		 529#ifdef CONFIG_E1000_MQ
530 while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
531#endif
1da177e4 532 free_irq(adapter->pdev->irq, netdev);
fa4f7ef3 533#ifdef CONFIG_PCI_MSI
96838a40 534 if (adapter->hw.mac_type > e1000_82547_rev_2 &&
fa4f7ef3
MC		 535 adapter->have_msi == TRUE)
536 pci_disable_msi(adapter->pdev);
537#endif
1da177e4
LT		 538 del_timer_sync(&adapter->tx_fifo_stall_timer);
539 del_timer_sync(&adapter->watchdog_timer);
540 del_timer_sync(&adapter->phy_info_timer);
541
542#ifdef CONFIG_E1000_NAPI
543 netif_poll_disable(netdev);
544#endif
7bfa4816 545 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 546 adapter->link_speed = 0;
547 adapter->link_duplex = 0;
548 netif_carrier_off(netdev);
549 netif_stop_queue(netdev);
550
551 e1000_reset(adapter);
581d708e
MC		 552 e1000_clean_all_tx_rings(adapter);
553 e1000_clean_all_rx_rings(adapter);
1da177e4 554
57128197
JK		 555 /* Power down the PHY so no link is implied when interface is down *
556 * The PHY cannot be powered down if any of the following is TRUE *
557 * (a) WoL is enabled
558 * (b) AMT is active
559 * (c) SoL/IDER session is active */
560 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
2d7edb92 561 adapter->hw.media_type == e1000_media_type_copper &&
57128197
JK		 562 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
563 !mng_mode_enabled &&
564 !e1000_check_phy_reset_block(&adapter->hw)) {
1da177e4
LT		 565 uint16_t mii_reg;
566 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
567 mii_reg |= MII_CR_POWER_DOWN;
568 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
4e48a2b9 569 mdelay(1);
1da177e4
LT		 570 }
571}
572
573void
574e1000_reset(struct e1000_adapter *adapter)
575{
2d7edb92 576 uint32_t pba, manc;
1125ecbc 577 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 578
579 /* Repartition Pba for greater than 9k mtu
580 * To take effect CTRL.RST is required.
581 */
582
2d7edb92
MC		 583 switch (adapter->hw.mac_type) {
584 case e1000_82547:
0e6ef3e0 585 case e1000_82547_rev_2:
2d7edb92
MC		 586 pba = E1000_PBA_30K;
587 break;
868d5309
MC		 588 case e1000_82571:
589 case e1000_82572:
590 pba = E1000_PBA_38K;
591 break;
2d7edb92
MC		 592 case e1000_82573:
593 pba = E1000_PBA_12K;
594 break;
595 default:
596 pba = E1000_PBA_48K;
597 break;
598 }
599
96838a40 600 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 601 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 602 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 603
604
96838a40 605 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 606 adapter->tx_fifo_head = 0;
607 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
608 adapter->tx_fifo_size =
609 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
610 atomic_set(&adapter->tx_fifo_stall, 0);
611 }
2d7edb92 612
1da177e4
LT		 613 E1000_WRITE_REG(&adapter->hw, PBA, pba);
614
615 /* flow control settings */
f11b7f85
JK		 616 /* Set the FC high water mark to 90% of the FIFO size.
617 * Required to clear last 3 LSB */
618 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
619
620 adapter->hw.fc_high_water = fc_high_water_mark;
621 adapter->hw.fc_low_water = fc_high_water_mark - 8;
1da177e4
LT		 622 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
623 adapter->hw.fc_send_xon = 1;
624 adapter->hw.fc = adapter->hw.original_fc;
625
2d7edb92 626 /* Allow time for pending master requests to run */
1da177e4 627 e1000_reset_hw(&adapter->hw);
96838a40 628 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 629 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 630 if (e1000_init_hw(&adapter->hw))
1da177e4 631 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 632 e1000_update_mng_vlan(adapter);
1da177e4
LT		 633 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
634 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
635
636 e1000_reset_adaptive(&adapter->hw);
637 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2d7edb92
MC		 638 if (adapter->en_mng_pt) {
639 manc = E1000_READ_REG(&adapter->hw, MANC);
640 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
641 E1000_WRITE_REG(&adapter->hw, MANC, manc);
642 }
1da177e4
LT		 643}
644
645/**
646 * e1000_probe - Device Initialization Routine
647 * @pdev: PCI device information struct
648 * @ent: entry in e1000_pci_tbl
649 *
650 * Returns 0 on success, negative on failure
651 *
652 * e1000_probe initializes an adapter identified by a pci_dev structure.
653 * The OS initialization, configuring of the adapter private structure,
654 * and a hardware reset occur.
655 **/
656
657static int __devinit
658e1000_probe(struct pci_dev *pdev,
659 const struct pci_device_id *ent)
660{
661 struct net_device *netdev;
662 struct e1000_adapter *adapter;
2d7edb92 663 unsigned long mmio_start, mmio_len;
2d7edb92 664
1da177e4 665 static int cards_found = 0;
2d7edb92 666 int i, err, pci_using_dac;
1da177e4
LT		 667 uint16_t eeprom_data;
668 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 669 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 670 return err;
671
96838a40 672 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 673 pci_using_dac = 1;
674 } else {
96838a40 675 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4
LT		 676 E1000_ERR("No usable DMA configuration, aborting\n");
677 return err;
678 }
679 pci_using_dac = 0;
680 }
681
96838a40 682 if ((err = pci_request_regions(pdev, e1000_driver_name)))
1da177e4
LT		 683 return err;
684
685 pci_set_master(pdev);
686
687 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
96838a40 688 if (!netdev) {
1da177e4
LT		 689 err = -ENOMEM;
690 goto err_alloc_etherdev;
691 }
692
693 SET_MODULE_OWNER(netdev);
694 SET_NETDEV_DEV(netdev, &pdev->dev);
695
696 pci_set_drvdata(pdev, netdev);
60490fe0 697 adapter = netdev_priv(netdev);
1da177e4
LT		 698 adapter->netdev = netdev;
699 adapter->pdev = pdev;
700 adapter->hw.back = adapter;
701 adapter->msg_enable = (1 << debug) - 1;
702
703 mmio_start = pci_resource_start(pdev, BAR_0);
704 mmio_len = pci_resource_len(pdev, BAR_0);
705
706 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
96838a40 707 if (!adapter->hw.hw_addr) {
1da177e4
LT		 708 err = -EIO;
709 goto err_ioremap;
710 }
711
96838a40
JB		 712 for (i = BAR_1; i <= BAR_5; i++) {
713 if (pci_resource_len(pdev, i) == 0)
1da177e4 714 continue;
96838a40 715 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 716 adapter->hw.io_base = pci_resource_start(pdev, i);
717 break;
718 }
719 }
720
721 netdev->open = &e1000_open;
722 netdev->stop = &e1000_close;
723 netdev->hard_start_xmit = &e1000_xmit_frame;
724 netdev->get_stats = &e1000_get_stats;
725 netdev->set_multicast_list = &e1000_set_multi;
726 netdev->set_mac_address = &e1000_set_mac;
727 netdev->change_mtu = &e1000_change_mtu;
728 netdev->do_ioctl = &e1000_ioctl;
729 e1000_set_ethtool_ops(netdev);
730 netdev->tx_timeout = &e1000_tx_timeout;
731 netdev->watchdog_timeo = 5 * HZ;
732#ifdef CONFIG_E1000_NAPI
733 netdev->poll = &e1000_clean;
734 netdev->weight = 64;
735#endif
736 netdev->vlan_rx_register = e1000_vlan_rx_register;
737 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
738 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
739#ifdef CONFIG_NET_POLL_CONTROLLER
740 netdev->poll_controller = e1000_netpoll;
741#endif
742 strcpy(netdev->name, pci_name(pdev));
743
744 netdev->mem_start = mmio_start;
745 netdev->mem_end = mmio_start + mmio_len;
746 netdev->base_addr = adapter->hw.io_base;
747
748 adapter->bd_number = cards_found;
749
750 /* setup the private structure */
751
96838a40 752 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 753 goto err_sw_init;
754
96838a40 755 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
2d7edb92
MC		 756 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
757
96838a40 758 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 759 netdev->features = NETIF_F_SG |
760 NETIF_F_HW_CSUM |
761 NETIF_F_HW_VLAN_TX |
762 NETIF_F_HW_VLAN_RX |
763 NETIF_F_HW_VLAN_FILTER;
764 }
765
766#ifdef NETIF_F_TSO
96838a40 767 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 768 (adapter->hw.mac_type != e1000_82547))
769 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 770
771#ifdef NETIF_F_TSO_IPV6
96838a40 772 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 773 netdev->features |= NETIF_F_TSO_IPV6;
774#endif
1da177e4 775#endif
96838a40 776 if (pci_using_dac)
1da177e4
LT		 777 netdev->features |= NETIF_F_HIGHDMA;
778
779 /* hard_start_xmit is safe against parallel locking */
780 netdev->features |= NETIF_F_LLTX;
781
2d7edb92
MC		 782 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
783
96838a40 784 /* before reading the EEPROM, reset the controller to
1da177e4 785 * put the device in a known good starting state */
96838a40 786
1da177e4
LT		 787 e1000_reset_hw(&adapter->hw);
788
789 /* make sure the EEPROM is good */
790
96838a40 791 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4
LT		 792 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
793 err = -EIO;
794 goto err_eeprom;
795 }
796
797 /* copy the MAC address out of the EEPROM */
798
96838a40 799 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 800 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
801 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 802 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 803
96838a40 804 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 805 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
806 err = -EIO;
807 goto err_eeprom;
808 }
809
810 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
811
812 e1000_get_bus_info(&adapter->hw);
813
814 init_timer(&adapter->tx_fifo_stall_timer);
815 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
816 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
817
818 init_timer(&adapter->watchdog_timer);
819 adapter->watchdog_timer.function = &e1000_watchdog;
820 adapter->watchdog_timer.data = (unsigned long) adapter;
821
822 INIT_WORK(&adapter->watchdog_task,
823 (void (*)(void *))e1000_watchdog_task, adapter);
824
825 init_timer(&adapter->phy_info_timer);
826 adapter->phy_info_timer.function = &e1000_update_phy_info;
827 adapter->phy_info_timer.data = (unsigned long) adapter;
828
829 INIT_WORK(&adapter->tx_timeout_task,
830 (void (*)(void *))e1000_tx_timeout_task, netdev);
831
832 /* we're going to reset, so assume we have no link for now */
833
834 netif_carrier_off(netdev);
835 netif_stop_queue(netdev);
836
837 e1000_check_options(adapter);
838
839 /* Initial Wake on LAN setting
840 * If APM wake is enabled in the EEPROM,
841 * enable the ACPI Magic Packet filter
842 */
843
96838a40 844 switch (adapter->hw.mac_type) {
1da177e4
LT		 845 case e1000_82542_rev2_0:
846 case e1000_82542_rev2_1:
847 case e1000_82543:
848 break;
849 case e1000_82544:
850 e1000_read_eeprom(&adapter->hw,
851 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
852 eeprom_apme_mask = E1000_EEPROM_82544_APM;
853 break;
854 case e1000_82546:
855 case e1000_82546_rev_3:
fd803241 856 case e1000_82571:
96838a40 857 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 858 e1000_read_eeprom(&adapter->hw,
859 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
860 break;
861 }
862 /* Fall Through */
863 default:
864 e1000_read_eeprom(&adapter->hw,
865 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
866 break;
867 }
96838a40 868 if (eeprom_data & eeprom_apme_mask)
1da177e4
LT		 869 adapter->wol |= E1000_WUFC_MAG;
870
fb3d47d4
JK		 871 /* print bus type/speed/width info */
872 {
873 struct e1000_hw *hw = &adapter->hw;
874 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
875 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
876 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
877 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
878 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
879 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
880 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
881 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
882 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
883 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
884 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
885 "32-bit"));
886 }
887
888 for (i = 0; i < 6; i++)
889 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
890
1da177e4
LT		 891 /* reset the hardware with the new settings */
892 e1000_reset(adapter);
893
b55ccb35
JK		 894 /* If the controller is 82573 and f/w is AMT, do not set
895 * DRV_LOAD until the interface is up. For all other cases,
896 * let the f/w know that the h/w is now under the control
897 * of the driver. */
898 if (adapter->hw.mac_type != e1000_82573 ||
899 !e1000_check_mng_mode(&adapter->hw))
900 e1000_get_hw_control(adapter);
2d7edb92 901
1da177e4 902 strcpy(netdev->name, "eth%d");
96838a40 903 if ((err = register_netdev(netdev)))
1da177e4
LT		 904 goto err_register;
905
906 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
907
908 cards_found++;
909 return 0;
910
911err_register:
912err_sw_init:
913err_eeprom:
914 iounmap(adapter->hw.hw_addr);
915err_ioremap:
916 free_netdev(netdev);
917err_alloc_etherdev:
918 pci_release_regions(pdev);
919 return err;
920}
921
922/**
923 * e1000_remove - Device Removal Routine
924 * @pdev: PCI device information struct
925 *
926 * e1000_remove is called by the PCI subsystem to alert the driver
927 * that it should release a PCI device. The could be caused by a
928 * Hot-Plug event, or because the driver is going to be removed from
929 * memory.
930 **/
931
932static void __devexit
933e1000_remove(struct pci_dev *pdev)
934{
935 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 936 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 937 uint32_t manc;
581d708e
MC		 938#ifdef CONFIG_E1000_NAPI
939 int i;
940#endif
1da177e4 941
be2b28ed
JG		 942 flush_scheduled_work();
943
96838a40 944 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 945 adapter->hw.media_type == e1000_media_type_copper) {
946 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 947 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 948 manc |= E1000_MANC_ARP_EN;
949 E1000_WRITE_REG(&adapter->hw, MANC, manc);
950 }
951 }
952
b55ccb35
JK		 953 /* Release control of h/w to f/w. If f/w is AMT enabled, this
954 * would have already happened in close and is redundant. */
955 e1000_release_hw_control(adapter);
2d7edb92 956
1da177e4 957 unregister_netdev(netdev);
581d708e 958#ifdef CONFIG_E1000_NAPI
f56799ea 959 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 960 __dev_put(&adapter->polling_netdev[i]);
961#endif
1da177e4 962
96838a40 963 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 964 e1000_phy_hw_reset(&adapter->hw);
1da177e4 965
24025e4e
MC		 966 kfree(adapter->tx_ring);
967 kfree(adapter->rx_ring);
968#ifdef CONFIG_E1000_NAPI
969 kfree(adapter->polling_netdev);
970#endif
971
1da177e4
LT		 972 iounmap(adapter->hw.hw_addr);
973 pci_release_regions(pdev);
974
24025e4e
MC		 975#ifdef CONFIG_E1000_MQ
976 free_percpu(adapter->cpu_netdev);
977 free_percpu(adapter->cpu_tx_ring);
978#endif
1da177e4
LT		 979 free_netdev(netdev);
980
981 pci_disable_device(pdev);
982}
983
984/**
985 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
986 * @adapter: board private structure to initialize
987 *
988 * e1000_sw_init initializes the Adapter private data structure.
989 * Fields are initialized based on PCI device information and
990 * OS network device settings (MTU size).
991 **/
992
993static int __devinit
994e1000_sw_init(struct e1000_adapter *adapter)
995{
996 struct e1000_hw *hw = &adapter->hw;
997 struct net_device *netdev = adapter->netdev;
998 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 999#ifdef CONFIG_E1000_NAPI
1000 int i;
1001#endif
1da177e4
LT		 1002
1003 /* PCI config space info */
1004
1005 hw->vendor_id = pdev->vendor;
1006 hw->device_id = pdev->device;
1007 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1008 hw->subsystem_id = pdev->subsystem_device;
1009
1010 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1011
1012 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1013
1014 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2d7edb92 1015 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
1da177e4
LT		 1016 hw->max_frame_size = netdev->mtu +
1017 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1018 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1019
1020 /* identify the MAC */
1021
96838a40 1022 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1023 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1024 return -EIO;
1025 }
1026
1027 /* initialize eeprom parameters */
1028
96838a40 1029 if (e1000_init_eeprom_params(hw)) {
2d7edb92
MC		 1030 E1000_ERR("EEPROM initialization failed\n");
1031 return -EIO;
1032 }
1da177e4 1033
96838a40 1034 switch (hw->mac_type) {
1da177e4
LT		 1035 default:
1036 break;
1037 case e1000_82541:
1038 case e1000_82547:
1039 case e1000_82541_rev_2:
1040 case e1000_82547_rev_2:
1041 hw->phy_init_script = 1;
1042 break;
1043 }
1044
1045 e1000_set_media_type(hw);
1046
1047 hw->wait_autoneg_complete = FALSE;
1048 hw->tbi_compatibility_en = TRUE;
1049 hw->adaptive_ifs = TRUE;
1050
1051 /* Copper options */
1052
96838a40 1053 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1054 hw->mdix = AUTO_ALL_MODES;
1055 hw->disable_polarity_correction = FALSE;
1056 hw->master_slave = E1000_MASTER_SLAVE;
1057 }
1058
24025e4e
MC		 1059#ifdef CONFIG_E1000_MQ
1060 /* Number of supported queues */
1061 switch (hw->mac_type) {
1062 case e1000_82571:
1063 case e1000_82572:
f56799ea
JK		 1064 /* These controllers support 2 tx queues, but with a single
1065 * qdisc implementation, multiple tx queues aren't quite as
1066 * interesting. If we can find a logical way of mapping
1067 * flows to a queue, then perhaps we can up the num_tx_queue
1068 * count back to its default. Until then, we run the risk of
1069 * terrible performance due to SACK overload. */
1070 adapter->num_tx_queues = 1;
1071 adapter->num_rx_queues = 2;
24025e4e
MC		 1072 break;
1073 default:
f56799ea
JK		 1074 adapter->num_tx_queues = 1;
1075 adapter->num_rx_queues = 1;
24025e4e
MC		 1076 break;
1077 }
f56799ea
JK		 1078 adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
1079 adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
7bfa4816
JK		 1080 DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
1081 adapter->num_rx_queues,
1082 ((adapter->num_rx_queues == 1)
1083 ? ((num_online_cpus() > 1)
1084 ? "(due to unsupported feature in current adapter)"
1085 : "(due to unsupported system configuration)")
1086 : ""));
1087 DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
1088 adapter->num_tx_queues);
24025e4e 1089#else
f56799ea
JK		 1090 adapter->num_tx_queues = 1;
1091 adapter->num_rx_queues = 1;
24025e4e 1092#endif
581d708e
MC		 1093
1094 if (e1000_alloc_queues(adapter)) {
1095 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1096 return -ENOMEM;
1097 }
1098
1099#ifdef CONFIG_E1000_NAPI
f56799ea 1100 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1101 adapter->polling_netdev[i].priv = adapter;
1102 adapter->polling_netdev[i].poll = &e1000_clean;
1103 adapter->polling_netdev[i].weight = 64;
1104 dev_hold(&adapter->polling_netdev[i]);
1105 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1106 }
7bfa4816 1107 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1108#endif
1109
1da177e4
LT		 1110 atomic_set(&adapter->irq_sem, 1);
1111 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1112
1113 return 0;
1114}
1115
581d708e
MC		 1116/**
1117 * e1000_alloc_queues - Allocate memory for all rings
1118 * @adapter: board private structure to initialize
1119 *
1120 * We allocate one ring per queue at run-time since we don't know the
1121 * number of queues at compile-time. The polling_netdev array is
1122 * intended for Multiqueue, but should work fine with a single queue.
1123 **/
1124
1125static int __devinit
1126e1000_alloc_queues(struct e1000_adapter *adapter)
1127{
1128 int size;
1129
f56799ea 1130 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1131 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1132 if (!adapter->tx_ring)
1133 return -ENOMEM;
1134 memset(adapter->tx_ring, 0, size);
1135
f56799ea 1136 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1137 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1138 if (!adapter->rx_ring) {
1139 kfree(adapter->tx_ring);
1140 return -ENOMEM;
1141 }
1142 memset(adapter->rx_ring, 0, size);
1143
1144#ifdef CONFIG_E1000_NAPI
f56799ea 1145 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1146 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1147 if (!adapter->polling_netdev) {
1148 kfree(adapter->tx_ring);
1149 kfree(adapter->rx_ring);
1150 return -ENOMEM;
1151 }
1152 memset(adapter->polling_netdev, 0, size);
1153#endif
1154
7bfa4816
JK		 1155#ifdef CONFIG_E1000_MQ
1156 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1157 adapter->rx_sched_call_data.info = adapter->netdev;
1158
1159 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1160 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1161#endif
1162
581d708e
MC		 1163 return E1000_SUCCESS;
1164}
1165
24025e4e
MC		 1166#ifdef CONFIG_E1000_MQ
1167static void __devinit
1168e1000_setup_queue_mapping(struct e1000_adapter *adapter)
1169{
1170 int i, cpu;
1171
1172 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1173 adapter->rx_sched_call_data.info = adapter->netdev;
1174 cpus_clear(adapter->rx_sched_call_data.cpumask);
1175
1176 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1177 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1178
1179 lock_cpu_hotplug();
1180 i = 0;
1181 for_each_online_cpu(cpu) {
f56799ea 1182 *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
24025e4e
MC		 1183 /* This is incomplete because we'd like to assign separate
1184 * physical cpus to these netdev polling structures and
1185 * avoid saturating a subset of cpus.
1186 */
f56799ea 1187 if (i < adapter->num_rx_queues) {
24025e4e 1188 *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
7bfa4816
JK		 1189 adapter->rx_ring[i].cpu = cpu;
1190 cpu_set(cpu, adapter->cpumask);
24025e4e
MC		 1191 } else
1192 *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
1193
1194 i++;
1195 }
1196 unlock_cpu_hotplug();
1197}
1198#endif
1199
1da177e4
LT		 1200/**
1201 * e1000_open - Called when a network interface is made active
1202 * @netdev: network interface device structure
1203 *
1204 * Returns 0 on success, negative value on failure
1205 *
1206 * The open entry point is called when a network interface is made
1207 * active by the system (IFF_UP). At this point all resources needed
1208 * for transmit and receive operations are allocated, the interrupt
1209 * handler is registered with the OS, the watchdog timer is started,
1210 * and the stack is notified that the interface is ready.
1211 **/
1212
1213static int
1214e1000_open(struct net_device *netdev)
1215{
60490fe0 1216 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1217 int err;
1218
1219 /* allocate transmit descriptors */
1220
581d708e 1221 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1222 goto err_setup_tx;
1223
1224 /* allocate receive descriptors */
1225
581d708e 1226 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1227 goto err_setup_rx;
1228
96838a40 1229 if ((err = e1000_up(adapter)))
1da177e4 1230 goto err_up;
2d7edb92 1231 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1232 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1233 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1234 e1000_update_mng_vlan(adapter);
1235 }
1da177e4 1236
b55ccb35
JK		 1237 /* If AMT is enabled, let the firmware know that the network
1238 * interface is now open */
1239 if (adapter->hw.mac_type == e1000_82573 &&
1240 e1000_check_mng_mode(&adapter->hw))
1241 e1000_get_hw_control(adapter);
1242
1da177e4
LT		 1243 return E1000_SUCCESS;
1244
1245err_up:
581d708e 1246 e1000_free_all_rx_resources(adapter);
1da177e4 1247err_setup_rx:
581d708e 1248 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1249err_setup_tx:
1250 e1000_reset(adapter);
1251
1252 return err;
1253}
1254
1255/**
1256 * e1000_close - Disables a network interface
1257 * @netdev: network interface device structure
1258 *
1259 * Returns 0, this is not allowed to fail
1260 *
1261 * The close entry point is called when an interface is de-activated
1262 * by the OS. The hardware is still under the drivers control, but
1263 * needs to be disabled. A global MAC reset is issued to stop the
1264 * hardware, and all transmit and receive resources are freed.
1265 **/
1266
1267static int
1268e1000_close(struct net_device *netdev)
1269{
60490fe0 1270 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1271
1272 e1000_down(adapter);
1273
581d708e
MC		 1274 e1000_free_all_tx_resources(adapter);
1275 e1000_free_all_rx_resources(adapter);
1da177e4 1276
96838a40 1277 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1278 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1279 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1280 }
b55ccb35
JK		 1281
1282 /* If AMT is enabled, let the firmware know that the network
1283 * interface is now closed */
1284 if (adapter->hw.mac_type == e1000_82573 &&
1285 e1000_check_mng_mode(&adapter->hw))
1286 e1000_release_hw_control(adapter);
1287
1da177e4
LT		 1288 return 0;
1289}
1290
1291/**
1292 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1293 * @adapter: address of board private structure
2d7edb92
MC		 1294 * @start: address of beginning of memory
1295 * @len: length of memory
1da177e4
LT		 1296 **/
1297static inline boolean_t
1298e1000_check_64k_bound(struct e1000_adapter *adapter,
1299 void *start, unsigned long len)
1300{
1301 unsigned long begin = (unsigned long) start;
1302 unsigned long end = begin + len;
1303
2648345f
MC		 1304 /* First rev 82545 and 82546 need to not allow any memory
1305 * write location to cross 64k boundary due to errata 23 */
1da177e4 1306 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1307 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1308 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1309 }
1310
1311 return TRUE;
1312}
1313
1314/**
1315 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1316 * @adapter: board private structure
581d708e 1317 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1318 *
1319 * Return 0 on success, negative on failure
1320 **/
1321
3ad2cc67 1322static int
581d708e
MC		 1323e1000_setup_tx_resources(struct e1000_adapter *adapter,
1324 struct e1000_tx_ring *txdr)
1da177e4 1325{
1da177e4
LT		 1326 struct pci_dev *pdev = adapter->pdev;
1327 int size;
1328
1329 size = sizeof(struct e1000_buffer) * txdr->count;
a7ec15da
RT		 1330
1331 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
96838a40 1332 if (!txdr->buffer_info) {
2648345f
MC		 1333 DPRINTK(PROBE, ERR,
1334 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1335 return -ENOMEM;
1336 }
1337 memset(txdr->buffer_info, 0, size);
1338
1339 /* round up to nearest 4K */
1340
1341 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1342 E1000_ROUNDUP(txdr->size, 4096);
1343
1344 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1345 if (!txdr->desc) {
1da177e4 1346setup_tx_desc_die:
1da177e4 1347 vfree(txdr->buffer_info);
2648345f
MC		 1348 DPRINTK(PROBE, ERR,
1349 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1350 return -ENOMEM;
1351 }
1352
2648345f 1353 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1354 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1355 void *olddesc = txdr->desc;
1356 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1357 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1358 "at %p\n", txdr->size, txdr->desc);
1359 /* Try again, without freeing the previous */
1da177e4 1360 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1361 /* Failed allocation, critical failure */
96838a40 1362 if (!txdr->desc) {
1da177e4
LT		 1363 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1364 goto setup_tx_desc_die;
1365 }
1366
1367 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1368 /* give up */
2648345f
MC		 1369 pci_free_consistent(pdev, txdr->size, txdr->desc,
1370 txdr->dma);
1da177e4
LT		 1371 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1372 DPRINTK(PROBE, ERR,
2648345f
MC		 1373 "Unable to allocate aligned memory "
1374 "for the transmit descriptor ring\n");
1da177e4
LT		 1375 vfree(txdr->buffer_info);
1376 return -ENOMEM;
1377 } else {
2648345f 1378 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1379 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1380 }
1381 }
1382 memset(txdr->desc, 0, txdr->size);
1383
1384 txdr->next_to_use = 0;
1385 txdr->next_to_clean = 0;
2ae76d98 1386 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1387
1388 return 0;
1389}
1390
581d708e
MC		 1391/**
1392 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1393 * (Descriptors) for all queues
1394 * @adapter: board private structure
1395 *
1396 * If this function returns with an error, then it's possible one or
1397 * more of the rings is populated (while the rest are not). It is the
1398 * callers duty to clean those orphaned rings.
1399 *
1400 * Return 0 on success, negative on failure
1401 **/
1402
1403int
1404e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1405{
1406 int i, err = 0;
1407
f56799ea 1408 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1409 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1410 if (err) {
1411 DPRINTK(PROBE, ERR,
1412 "Allocation for Tx Queue %u failed\n", i);
1413 break;
1414 }
1415 }
1416
1417 return err;
1418}
1419
1da177e4
LT		 1420/**
1421 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1422 * @adapter: board private structure
1423 *
1424 * Configure the Tx unit of the MAC after a reset.
1425 **/
1426
1427static void
1428e1000_configure_tx(struct e1000_adapter *adapter)
1429{
581d708e
MC		 1430 uint64_t tdba;
1431 struct e1000_hw *hw = &adapter->hw;
1432 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1433 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1434
1435 /* Setup the HW Tx Head and Tail descriptor pointers */
1436
f56799ea 1437 switch (adapter->num_tx_queues) {
24025e4e
MC		 1438 case 2:
1439 tdba = adapter->tx_ring[1].dma;
1440 tdlen = adapter->tx_ring[1].count *
1441 sizeof(struct e1000_tx_desc);
1442 E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
1443 E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
1444 E1000_WRITE_REG(hw, TDLEN1, tdlen);
1445 E1000_WRITE_REG(hw, TDH1, 0);
1446 E1000_WRITE_REG(hw, TDT1, 0);
1447 adapter->tx_ring[1].tdh = E1000_TDH1;
1448 adapter->tx_ring[1].tdt = E1000_TDT1;
1449 /* Fall Through */
1450 case 1:
1451 default:
581d708e
MC		 1452 tdba = adapter->tx_ring[0].dma;
1453 tdlen = adapter->tx_ring[0].count *
1454 sizeof(struct e1000_tx_desc);
1455 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1456 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1457 E1000_WRITE_REG(hw, TDLEN, tdlen);
1458 E1000_WRITE_REG(hw, TDH, 0);
1459 E1000_WRITE_REG(hw, TDT, 0);
1460 adapter->tx_ring[0].tdh = E1000_TDH;
1461 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1462 break;
1463 }
1da177e4
LT		 1464
1465 /* Set the default values for the Tx Inter Packet Gap timer */
1466
0fadb059
JK		 1467 if (hw->media_type == e1000_media_type_fiber ||
1468 hw->media_type == e1000_media_type_internal_serdes)
1469 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1470 else
1471 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1472
581d708e 1473 switch (hw->mac_type) {
1da177e4
LT		 1474 case e1000_82542_rev2_0:
1475 case e1000_82542_rev2_1:
1476 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1477 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1478 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1479 break;
1480 default:
0fadb059
JK		 1481 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1482 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1483 break;
1da177e4 1484 }
0fadb059
JK		 1485 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1486 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1487 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1488
1489 /* Set the Tx Interrupt Delay register */
1490
581d708e
MC		 1491 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1492 if (hw->mac_type >= e1000_82540)
1493 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1494
1495 /* Program the Transmit Control Register */
1496
581d708e 1497 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1498
1499 tctl &= ~E1000_TCTL_CT;
24025e4e 1500 tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1501 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1502
581d708e 1503 E1000_WRITE_REG(hw, TCTL, tctl);
1da177e4 1504
2ae76d98
MC		 1505 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1506 tarc = E1000_READ_REG(hw, TARC0);
1507 tarc |= ((1 << 25) | (1 << 21));
1508 E1000_WRITE_REG(hw, TARC0, tarc);
1509 tarc = E1000_READ_REG(hw, TARC1);
1510 tarc |= (1 << 25);
1511 if (tctl & E1000_TCTL_MULR)
1512 tarc &= ~(1 << 28);
1513 else
1514 tarc |= (1 << 28);
1515 E1000_WRITE_REG(hw, TARC1, tarc);
1516 }
1517
581d708e 1518 e1000_config_collision_dist(hw);
1da177e4
LT		 1519
1520 /* Setup Transmit Descriptor Settings for eop descriptor */
1521 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1522 E1000_TXD_CMD_IFCS;
1523
581d708e 1524 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1525 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1526 else
1527 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1528
1529 /* Cache if we're 82544 running in PCI-X because we'll
1530 * need this to apply a workaround later in the send path. */
581d708e
MC		 1531 if (hw->mac_type == e1000_82544 &&
1532 hw->bus_type == e1000_bus_type_pcix)
1da177e4
LT		 1533 adapter->pcix_82544 = 1;
1534}
1535
1536/**
1537 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1538 * @adapter: board private structure
581d708e 1539 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1540 *
1541 * Returns 0 on success, negative on failure
1542 **/
1543
3ad2cc67 1544static int
581d708e
MC		 1545e1000_setup_rx_resources(struct e1000_adapter *adapter,
1546 struct e1000_rx_ring *rxdr)
1da177e4 1547{
1da177e4 1548 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1549 int size, desc_len;
1da177e4
LT		 1550
1551 size = sizeof(struct e1000_buffer) * rxdr->count;
a7ec15da 1552 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
581d708e 1553 if (!rxdr->buffer_info) {
2648345f
MC		 1554 DPRINTK(PROBE, ERR,
1555 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1556 return -ENOMEM;
1557 }
1558 memset(rxdr->buffer_info, 0, size);
1559
2d7edb92
MC		 1560 size = sizeof(struct e1000_ps_page) * rxdr->count;
1561 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1562 if (!rxdr->ps_page) {
2d7edb92
MC		 1563 vfree(rxdr->buffer_info);
1564 DPRINTK(PROBE, ERR,
1565 "Unable to allocate memory for the receive descriptor ring\n");
1566 return -ENOMEM;
1567 }
1568 memset(rxdr->ps_page, 0, size);
1569
1570 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1571 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1572 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1573 vfree(rxdr->buffer_info);
1574 kfree(rxdr->ps_page);
1575 DPRINTK(PROBE, ERR,
1576 "Unable to allocate memory for the receive descriptor ring\n");
1577 return -ENOMEM;
1578 }
1579 memset(rxdr->ps_page_dma, 0, size);
1580
96838a40 1581 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1582 desc_len = sizeof(struct e1000_rx_desc);
1583 else
1584 desc_len = sizeof(union e1000_rx_desc_packet_split);
1585
1da177e4
LT		 1586 /* Round up to nearest 4K */
1587
2d7edb92 1588 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1589 E1000_ROUNDUP(rxdr->size, 4096);
1590
1591 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1592
581d708e
MC		 1593 if (!rxdr->desc) {
1594 DPRINTK(PROBE, ERR,
1595 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1596setup_rx_desc_die:
1da177e4 1597 vfree(rxdr->buffer_info);
2d7edb92
MC		 1598 kfree(rxdr->ps_page);
1599 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1600 return -ENOMEM;
1601 }
1602
2648345f 1603 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1604 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1605 void *olddesc = rxdr->desc;
1606 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1607 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1608 "at %p\n", rxdr->size, rxdr->desc);
1609 /* Try again, without freeing the previous */
1da177e4 1610 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1611 /* Failed allocation, critical failure */
581d708e 1612 if (!rxdr->desc) {
1da177e4 1613 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1614 DPRINTK(PROBE, ERR,
1615 "Unable to allocate memory "
1616 "for the receive descriptor ring\n");
1da177e4
LT		 1617 goto setup_rx_desc_die;
1618 }
1619
1620 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1621 /* give up */
2648345f
MC		 1622 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1623 rxdr->dma);
1da177e4 1624 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1625 DPRINTK(PROBE, ERR,
1626 "Unable to allocate aligned memory "
1627 "for the receive descriptor ring\n");
581d708e 1628 goto setup_rx_desc_die;
1da177e4 1629 } else {
2648345f 1630 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1631 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1632 }
1633 }
1634 memset(rxdr->desc, 0, rxdr->size);
1635
1636 rxdr->next_to_clean = 0;
1637 rxdr->next_to_use = 0;
1638
1639 return 0;
1640}
1641
581d708e
MC		 1642/**
1643 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1644 * (Descriptors) for all queues
1645 * @adapter: board private structure
1646 *
1647 * If this function returns with an error, then it's possible one or
1648 * more of the rings is populated (while the rest are not). It is the
1649 * callers duty to clean those orphaned rings.
1650 *
1651 * Return 0 on success, negative on failure
1652 **/
1653
1654int
1655e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1656{
1657 int i, err = 0;
1658
f56799ea 1659 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1660 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1661 if (err) {
1662 DPRINTK(PROBE, ERR,
1663 "Allocation for Rx Queue %u failed\n", i);
1664 break;
1665 }
1666 }
1667
1668 return err;
1669}
1670
1da177e4 1671/**
2648345f 1672 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1673 * @adapter: Board private structure
1674 **/
e4c811c9
MC		 1675#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1676 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1677static void
1678e1000_setup_rctl(struct e1000_adapter *adapter)
1679{
2d7edb92
MC		 1680 uint32_t rctl, rfctl;
1681 uint32_t psrctl = 0;
35ec56bb 1682#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1683 uint32_t pages = 0;
1684#endif
1da177e4
LT		 1685
1686 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1687
1688 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1689
1690 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1691 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1692 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1693
0fadb059
JK		 1694 if (adapter->hw.mac_type > e1000_82543)
1695 rctl |= E1000_RCTL_SECRC;
1696
1697 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1698 rctl |= E1000_RCTL_SBP;
1699 else
1700 rctl &= ~E1000_RCTL_SBP;
1701
2d7edb92
MC		 1702 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1703 rctl &= ~E1000_RCTL_LPE;
1704 else
1705 rctl |= E1000_RCTL_LPE;
1706
1da177e4 1707 /* Setup buffer sizes */
96838a40 1708 if (adapter->hw.mac_type >= e1000_82571) {
2d7edb92
MC		 1709 /* We can now specify buffers in 1K increments.
1710 * BSIZE and BSEX are ignored in this case. */
1711 rctl |= adapter->rx_buffer_len << 0x11;
1712 } else {
1713 rctl &= ~E1000_RCTL_SZ_4096;
a1415ee6
JK		 1714 rctl |= E1000_RCTL_BSEX;
1715 switch (adapter->rx_buffer_len) {
1716 case E1000_RXBUFFER_2048:
1717 default:
1718 rctl |= E1000_RCTL_SZ_2048;
1719 rctl &= ~E1000_RCTL_BSEX;
1720 break;
1721 case E1000_RXBUFFER_4096:
1722 rctl |= E1000_RCTL_SZ_4096;
1723 break;
1724 case E1000_RXBUFFER_8192:
1725 rctl |= E1000_RCTL_SZ_8192;
1726 break;
1727 case E1000_RXBUFFER_16384:
1728 rctl |= E1000_RCTL_SZ_16384;
1729 break;
1730 }
2d7edb92
MC		 1731 }
1732
35ec56bb 1733#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1734 /* 82571 and greater support packet-split where the protocol
1735 * header is placed in skb->data and the packet data is
1736 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1737 * In the case of a non-split, skb->data is linearly filled,
1738 * followed by the page buffers. Therefore, skb->data is
1739 * sized to hold the largest protocol header.
1740 */
e4c811c9
MC		 1741 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1742 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1743 PAGE_SIZE <= 16384)
1744 adapter->rx_ps_pages = pages;
1745 else
1746 adapter->rx_ps_pages = 0;
2d7edb92 1747#endif
e4c811c9 1748 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1749 /* Configure extra packet-split registers */
1750 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1751 rfctl |= E1000_RFCTL_EXTEN;
1752 /* disable IPv6 packet split support */
1753 rfctl |= E1000_RFCTL_IPV6_DIS;
1754 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1755
1756 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
96838a40 1757
2d7edb92
MC		 1758 psrctl |= adapter->rx_ps_bsize0 >>
1759 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1760
1761 switch (adapter->rx_ps_pages) {
1762 case 3:
1763 psrctl |= PAGE_SIZE <<
1764 E1000_PSRCTL_BSIZE3_SHIFT;
1765 case 2:
1766 psrctl |= PAGE_SIZE <<
1767 E1000_PSRCTL_BSIZE2_SHIFT;
1768 case 1:
1769 psrctl |= PAGE_SIZE >>
1770 E1000_PSRCTL_BSIZE1_SHIFT;
1771 break;
1772 }
2d7edb92
MC		 1773
1774 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1775 }
1776
1777 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1778}
1779
1780/**
1781 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1782 * @adapter: board private structure
1783 *
1784 * Configure the Rx unit of the MAC after a reset.
1785 **/
1786
1787static void
1788e1000_configure_rx(struct e1000_adapter *adapter)
1789{
581d708e
MC		 1790 uint64_t rdba;
1791 struct e1000_hw *hw = &adapter->hw;
1792 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1793#ifdef CONFIG_E1000_MQ
1794 uint32_t reta, mrqc;
1795 int i;
1796#endif
2d7edb92 1797
e4c811c9 1798 if (adapter->rx_ps_pages) {
581d708e 1799 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1800 sizeof(union e1000_rx_desc_packet_split);
1801 adapter->clean_rx = e1000_clean_rx_irq_ps;
1802 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1803 } else {
581d708e
MC		 1804 rdlen = adapter->rx_ring[0].count *
1805 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1806 adapter->clean_rx = e1000_clean_rx_irq;
1807 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1808 }
1da177e4
LT		 1809
1810 /* disable receives while setting up the descriptors */
581d708e
MC		 1811 rctl = E1000_READ_REG(hw, RCTL);
1812 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1813
1814 /* set the Receive Delay Timer Register */
581d708e 1815 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1816
581d708e
MC		 1817 if (hw->mac_type >= e1000_82540) {
1818 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1819 if (adapter->itr > 1)
581d708e 1820 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1821 1000000000 / (adapter->itr * 256));
1822 }
1823
2ae76d98 1824 if (hw->mac_type >= e1000_82571) {
2ae76d98 1825 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1826 /* Reset delay timers after every interrupt */
2ae76d98 1827 ctrl_ext |= E1000_CTRL_EXT_CANC;
1e613fd9
JK		 1828#ifdef CONFIG_E1000_NAPI
1829 /* Auto-Mask interrupts upon ICR read. */
1830 ctrl_ext |= E1000_CTRL_EXT_IAME;
1831#endif
2ae76d98 1832 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1833 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1834 E1000_WRITE_FLUSH(hw);
1835 }
1836
581d708e
MC		 1837 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1838 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1839 switch (adapter->num_rx_queues) {
24025e4e
MC		 1840#ifdef CONFIG_E1000_MQ
1841 case 2:
1842 rdba = adapter->rx_ring[1].dma;
1843 E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
1844 E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
1845 E1000_WRITE_REG(hw, RDLEN1, rdlen);
1846 E1000_WRITE_REG(hw, RDH1, 0);
1847 E1000_WRITE_REG(hw, RDT1, 0);
1848 adapter->rx_ring[1].rdh = E1000_RDH1;
1849 adapter->rx_ring[1].rdt = E1000_RDT1;
1850 /* Fall Through */
1851#endif
1852 case 1:
1853 default:
581d708e
MC		 1854 rdba = adapter->rx_ring[0].dma;
1855 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1856 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1857 E1000_WRITE_REG(hw, RDLEN, rdlen);
1858 E1000_WRITE_REG(hw, RDH, 0);
1859 E1000_WRITE_REG(hw, RDT, 0);
1860 adapter->rx_ring[0].rdh = E1000_RDH;
1861 adapter->rx_ring[0].rdt = E1000_RDT;
1862 break;
24025e4e
MC		 1863 }
1864
1865#ifdef CONFIG_E1000_MQ
f56799ea 1866 if (adapter->num_rx_queues > 1) {
24025e4e
MC		 1867 uint32_t random[10];
1868
1869 get_random_bytes(&random[0], 40);
1870
1871 if (hw->mac_type <= e1000_82572) {
1872 E1000_WRITE_REG(hw, RSSIR, 0);
1873 E1000_WRITE_REG(hw, RSSIM, 0);
1874 }
1875
f56799ea 1876 switch (adapter->num_rx_queues) {
24025e4e
MC		 1877 case 2:
1878 default:
1879 reta = 0x00800080;
1880 mrqc = E1000_MRQC_ENABLE_RSS_2Q;
1881 break;
1882 }
1883
1884 /* Fill out redirection table */
1885 for (i = 0; i < 32; i++)
1886 E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
1887 /* Fill out hash function seeds */
1888 for (i = 0; i < 10; i++)
1889 E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
1890
1891 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1892 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1893 E1000_WRITE_REG(hw, MRQC, mrqc);
1894 }
1895
1896 /* Multiqueue and packet checksumming are mutually exclusive. */
1897 if (hw->mac_type >= e1000_82571) {
1898 rxcsum = E1000_READ_REG(hw, RXCSUM);
1899 rxcsum |= E1000_RXCSUM_PCSD;
1900 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1901 }
1902
1903#else
1da177e4
LT		 1904
1905 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1906 if (hw->mac_type >= e1000_82543) {
1907 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1908 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1909 rxcsum |= E1000_RXCSUM_TUOFL;
1910
868d5309 1911 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1912 * Must be used in conjunction with packet-split. */
96838a40
JB		 1913 if ((hw->mac_type >= e1000_82571) &&
1914 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1915 rxcsum |= E1000_RXCSUM_IPPCSE;
1916 }
1917 } else {
1918 rxcsum &= ~E1000_RXCSUM_TUOFL;
1919 /* don't need to clear IPPCSE as it defaults to 0 */
1920 }
581d708e 1921 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4 1922 }
24025e4e 1923#endif /* CONFIG_E1000_MQ */
1da177e4 1924
581d708e
MC		 1925 if (hw->mac_type == e1000_82573)
1926 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1927
1da177e4 1928 /* Enable Receives */
581d708e 1929 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1930}
1931
1932/**
581d708e 1933 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1934 * @adapter: board private structure
581d708e 1935 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1936 *
1937 * Free all transmit software resources
1938 **/
1939
3ad2cc67 1940static void
581d708e
MC		 1941e1000_free_tx_resources(struct e1000_adapter *adapter,
1942 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1943{
1944 struct pci_dev *pdev = adapter->pdev;
1945
581d708e 1946 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1947
581d708e
MC		 1948 vfree(tx_ring->buffer_info);
1949 tx_ring->buffer_info = NULL;
1da177e4 1950
581d708e 1951 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1952
581d708e
MC		 1953 tx_ring->desc = NULL;
1954}
1955
1956/**
1957 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1958 * @adapter: board private structure
1959 *
1960 * Free all transmit software resources
1961 **/
1962
1963void
1964e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1965{
1966 int i;
1967
f56799ea 1968 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1969 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1970}
1971
1972static inline void
1973e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1974 struct e1000_buffer *buffer_info)
1975{
96838a40 1976 if (buffer_info->dma) {
2648345f
MC		 1977 pci_unmap_page(adapter->pdev,
1978 buffer_info->dma,
1979 buffer_info->length,
1980 PCI_DMA_TODEVICE);
1da177e4 1981 }
8241e35e 1982 if (buffer_info->skb)
1da177e4 1983 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1984 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1985}
1986
1987/**
1988 * e1000_clean_tx_ring - Free Tx Buffers
1989 * @adapter: board private structure
581d708e 1990 * @tx_ring: ring to be cleaned
1da177e4
LT		 1991 **/
1992
1993static void
581d708e
MC		 1994e1000_clean_tx_ring(struct e1000_adapter *adapter,
1995 struct e1000_tx_ring *tx_ring)
1da177e4 1996{
1da177e4
LT		 1997 struct e1000_buffer *buffer_info;
1998 unsigned long size;
1999 unsigned int i;
2000
2001 /* Free all the Tx ring sk_buffs */
2002
96838a40 2003 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2004 buffer_info = &tx_ring->buffer_info[i];
2005 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2006 }
2007
2008 size = sizeof(struct e1000_buffer) * tx_ring->count;
2009 memset(tx_ring->buffer_info, 0, size);
2010
2011 /* Zero out the descriptor ring */
2012
2013 memset(tx_ring->desc, 0, tx_ring->size);
2014
2015 tx_ring->next_to_use = 0;
2016 tx_ring->next_to_clean = 0;
fd803241 2017 tx_ring->last_tx_tso = 0;
1da177e4 2018
581d708e
MC		 2019 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2020 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2021}
2022
2023/**
2024 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2025 * @adapter: board private structure
2026 **/
2027
2028static void
2029e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2030{
2031 int i;
2032
f56799ea 2033 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2034 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2035}
2036
2037/**
2038 * e1000_free_rx_resources - Free Rx Resources
2039 * @adapter: board private structure
581d708e 2040 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2041 *
2042 * Free all receive software resources
2043 **/
2044
3ad2cc67 2045static void
581d708e
MC		 2046e1000_free_rx_resources(struct e1000_adapter *adapter,
2047 struct e1000_rx_ring *rx_ring)
1da177e4 2048{
1da177e4
LT		 2049 struct pci_dev *pdev = adapter->pdev;
2050
581d708e 2051 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2052
2053 vfree(rx_ring->buffer_info);
2054 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2055 kfree(rx_ring->ps_page);
2056 rx_ring->ps_page = NULL;
2057 kfree(rx_ring->ps_page_dma);
2058 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2059
2060 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2061
2062 rx_ring->desc = NULL;
2063}
2064
2065/**
581d708e 2066 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2067 * @adapter: board private structure
581d708e
MC		 2068 *
2069 * Free all receive software resources
2070 **/
2071
2072void
2073e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2074{
2075 int i;
2076
f56799ea 2077 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2078 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2079}
2080
2081/**
2082 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2083 * @adapter: board private structure
2084 * @rx_ring: ring to free buffers from
1da177e4
LT		 2085 **/
2086
2087static void
581d708e
MC		 2088e1000_clean_rx_ring(struct e1000_adapter *adapter,
2089 struct e1000_rx_ring *rx_ring)
1da177e4 2090{
1da177e4 2091 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2092 struct e1000_ps_page *ps_page;
2093 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2094 struct pci_dev *pdev = adapter->pdev;
2095 unsigned long size;
2d7edb92 2096 unsigned int i, j;
1da177e4
LT		 2097
2098 /* Free all the Rx ring sk_buffs */
96838a40 2099 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2100 buffer_info = &rx_ring->buffer_info[i];
96838a40 2101 if (buffer_info->skb) {
1da177e4
LT		 2102 pci_unmap_single(pdev,
2103 buffer_info->dma,
2104 buffer_info->length,
2105 PCI_DMA_FROMDEVICE);
2106
2107 dev_kfree_skb(buffer_info->skb);
2108 buffer_info->skb = NULL;
997f5cbd
JK		 2109 }
2110 ps_page = &rx_ring->ps_page[i];
2111 ps_page_dma = &rx_ring->ps_page_dma[i];
2112 for (j = 0; j < adapter->rx_ps_pages; j++) {
2113 if (!ps_page->ps_page[j]) break;
2114 pci_unmap_page(pdev,
2115 ps_page_dma->ps_page_dma[j],
2116 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2117 ps_page_dma->ps_page_dma[j] = 0;
2118 put_page(ps_page->ps_page[j]);
2119 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2120 }
2121 }
2122
2123 size = sizeof(struct e1000_buffer) * rx_ring->count;
2124 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2125 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2126 memset(rx_ring->ps_page, 0, size);
2127 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2128 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2129
2130 /* Zero out the descriptor ring */
2131
2132 memset(rx_ring->desc, 0, rx_ring->size);
2133
2134 rx_ring->next_to_clean = 0;
2135 rx_ring->next_to_use = 0;
2136
581d708e
MC		 2137 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2138 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2139}
2140
2141/**
2142 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2143 * @adapter: board private structure
2144 **/
2145
2146static void
2147e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2148{
2149 int i;
2150
f56799ea 2151 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2152 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2153}
2154
2155/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2156 * and memory write and invalidate disabled for certain operations
2157 */
2158static void
2159e1000_enter_82542_rst(struct e1000_adapter *adapter)
2160{
2161 struct net_device *netdev = adapter->netdev;
2162 uint32_t rctl;
2163
2164 e1000_pci_clear_mwi(&adapter->hw);
2165
2166 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2167 rctl |= E1000_RCTL_RST;
2168 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2169 E1000_WRITE_FLUSH(&adapter->hw);
2170 mdelay(5);
2171
96838a40 2172 if (netif_running(netdev))
581d708e 2173 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2174}
2175
2176static void
2177e1000_leave_82542_rst(struct e1000_adapter *adapter)
2178{
2179 struct net_device *netdev = adapter->netdev;
2180 uint32_t rctl;
2181
2182 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2183 rctl &= ~E1000_RCTL_RST;
2184 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2185 E1000_WRITE_FLUSH(&adapter->hw);
2186 mdelay(5);
2187
96838a40 2188 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2189 e1000_pci_set_mwi(&adapter->hw);
2190
96838a40 2191 if (netif_running(netdev)) {
72d64a43
JK		 2192 /* No need to loop, because 82542 supports only 1 queue */
2193 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2194 e1000_configure_rx(adapter);
72d64a43 2195 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2196 }
2197}
2198
2199/**
2200 * e1000_set_mac - Change the Ethernet Address of the NIC
2201 * @netdev: network interface device structure
2202 * @p: pointer to an address structure
2203 *
2204 * Returns 0 on success, negative on failure
2205 **/
2206
2207static int
2208e1000_set_mac(struct net_device *netdev, void *p)
2209{
60490fe0 2210 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2211 struct sockaddr *addr = p;
2212
96838a40 2213 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2214 return -EADDRNOTAVAIL;
2215
2216 /* 82542 2.0 needs to be in reset to write receive address registers */
2217
96838a40 2218 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2219 e1000_enter_82542_rst(adapter);
2220
2221 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2222 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2223
2224 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2225
868d5309
MC		 2226 /* With 82571 controllers, LAA may be overwritten (with the default)
2227 * due to controller reset from the other port. */
2228 if (adapter->hw.mac_type == e1000_82571) {
2229 /* activate the work around */
2230 adapter->hw.laa_is_present = 1;
2231
96838a40
JB		 2232 /* Hold a copy of the LAA in RAR[14] This is done so that
2233 * between the time RAR[0] gets clobbered and the time it
2234 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2235 * of the RARs and no incoming packets directed to this port
96838a40 2236 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2237 * RAR[14] */
96838a40 2238 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2239 E1000_RAR_ENTRIES - 1);
2240 }
2241
96838a40 2242 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2243 e1000_leave_82542_rst(adapter);
2244
2245 return 0;
2246}
2247
2248/**
2249 * e1000_set_multi - Multicast and Promiscuous mode set
2250 * @netdev: network interface device structure
2251 *
2252 * The set_multi entry point is called whenever the multicast address
2253 * list or the network interface flags are updated. This routine is
2254 * responsible for configuring the hardware for proper multicast,
2255 * promiscuous mode, and all-multi behavior.
2256 **/
2257
2258static void
2259e1000_set_multi(struct net_device *netdev)
2260{
60490fe0 2261 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2262 struct e1000_hw *hw = &adapter->hw;
2263 struct dev_mc_list *mc_ptr;
2264 uint32_t rctl;
2265 uint32_t hash_value;
868d5309 2266 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2267
868d5309
MC		 2268 /* reserve RAR[14] for LAA over-write work-around */
2269 if (adapter->hw.mac_type == e1000_82571)
2270 rar_entries--;
1da177e4 2271
2648345f
MC		 2272 /* Check for Promiscuous and All Multicast modes */
2273
1da177e4
LT		 2274 rctl = E1000_READ_REG(hw, RCTL);
2275
96838a40 2276 if (netdev->flags & IFF_PROMISC) {
1da177e4 2277 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2278 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2279 rctl |= E1000_RCTL_MPE;
2280 rctl &= ~E1000_RCTL_UPE;
2281 } else {
2282 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2283 }
2284
2285 E1000_WRITE_REG(hw, RCTL, rctl);
2286
2287 /* 82542 2.0 needs to be in reset to write receive address registers */
2288
96838a40 2289 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2290 e1000_enter_82542_rst(adapter);
2291
2292 /* load the first 14 multicast address into the exact filters 1-14
2293 * RAR 0 is used for the station MAC adddress
2294 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2295 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2296 */
2297 mc_ptr = netdev->mc_list;
2298
96838a40 2299 for (i = 1; i < rar_entries; i++) {
868d5309 2300 if (mc_ptr) {
1da177e4
LT		 2301 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2302 mc_ptr = mc_ptr->next;
2303 } else {
2304 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2305 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2306 }
2307 }
2308
2309 /* clear the old settings from the multicast hash table */
2310
96838a40 2311 for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
1da177e4
LT		 2312 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2313
2314 /* load any remaining addresses into the hash table */
2315
96838a40 2316 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2317 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2318 e1000_mta_set(hw, hash_value);
2319 }
2320
96838a40 2321 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2322 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2323}
2324
2325/* Need to wait a few seconds after link up to get diagnostic information from
2326 * the phy */
2327
2328static void
2329e1000_update_phy_info(unsigned long data)
2330{
2331 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2332 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2333}
2334
2335/**
2336 * e1000_82547_tx_fifo_stall - Timer Call-back
2337 * @data: pointer to adapter cast into an unsigned long
2338 **/
2339
2340static void
2341e1000_82547_tx_fifo_stall(unsigned long data)
2342{
2343 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2344 struct net_device *netdev = adapter->netdev;
2345 uint32_t tctl;
2346
96838a40
JB		 2347 if (atomic_read(&adapter->tx_fifo_stall)) {
2348 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2349 E1000_READ_REG(&adapter->hw, TDH)) &&
2350 (E1000_READ_REG(&adapter->hw, TDFT) ==
2351 E1000_READ_REG(&adapter->hw, TDFH)) &&
2352 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2353 E1000_READ_REG(&adapter->hw, TDFHS))) {
2354 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2355 E1000_WRITE_REG(&adapter->hw, TCTL,
2356 tctl & ~E1000_TCTL_EN);
2357 E1000_WRITE_REG(&adapter->hw, TDFT,
2358 adapter->tx_head_addr);
2359 E1000_WRITE_REG(&adapter->hw, TDFH,
2360 adapter->tx_head_addr);
2361 E1000_WRITE_REG(&adapter->hw, TDFTS,
2362 adapter->tx_head_addr);
2363 E1000_WRITE_REG(&adapter->hw, TDFHS,
2364 adapter->tx_head_addr);
2365 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2366 E1000_WRITE_FLUSH(&adapter->hw);
2367
2368 adapter->tx_fifo_head = 0;
2369 atomic_set(&adapter->tx_fifo_stall, 0);
2370 netif_wake_queue(netdev);
2371 } else {
2372 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2373 }
2374 }
2375}
2376
2377/**
2378 * e1000_watchdog - Timer Call-back
2379 * @data: pointer to adapter cast into an unsigned long
2380 **/
2381static void
2382e1000_watchdog(unsigned long data)
2383{
2384 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2385
2386 /* Do the rest outside of interrupt context */
2387 schedule_work(&adapter->watchdog_task);
2388}
2389
2390static void
2391e1000_watchdog_task(struct e1000_adapter *adapter)
2392{
2393 struct net_device *netdev = adapter->netdev;
545c67c0 2394 struct e1000_tx_ring *txdr = adapter->tx_ring;
1da177e4
LT		 2395 uint32_t link;
2396
2397 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2398 if (adapter->hw.mac_type == e1000_82573) {
2399 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2400 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2401 e1000_update_mng_vlan(adapter);
96838a40 2402 }
1da177e4 2403
96838a40 2404 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2405 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2406 link = !adapter->hw.serdes_link_down;
2407 else
2408 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2409
96838a40
JB		 2410 if (link) {
2411 if (!netif_carrier_ok(netdev)) {
1da177e4
LT		 2412 e1000_get_speed_and_duplex(&adapter->hw,
2413 &adapter->link_speed,
2414 &adapter->link_duplex);
2415
2416 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2417 adapter->link_speed,
2418 adapter->link_duplex == FULL_DUPLEX ?
2419 "Full Duplex" : "Half Duplex");
2420
66a2b0a3
JK		 2421 /* tweak tx_queue_len according to speed/duplex */
2422 netdev->tx_queue_len = adapter->tx_queue_len;
2423 adapter->tx_timeout_factor = 1;
2424 if (adapter->link_duplex == HALF_DUPLEX) {
2425 switch (adapter->link_speed) {
2426 case SPEED_10:
2427 netdev->tx_queue_len = 10;
2428 adapter->tx_timeout_factor = 8;
2429 break;
2430 case SPEED_100:
2431 netdev->tx_queue_len = 100;
2432 break;
2433 }
2434 }
2435
1da177e4
LT		 2436 netif_carrier_on(netdev);
2437 netif_wake_queue(netdev);
2438 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2439 adapter->smartspeed = 0;
2440 }
2441 } else {
96838a40 2442 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2443 adapter->link_speed = 0;
2444 adapter->link_duplex = 0;
2445 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2446 netif_carrier_off(netdev);
2447 netif_stop_queue(netdev);
2448 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2449 }
2450
2451 e1000_smartspeed(adapter);
2452 }
2453
2454 e1000_update_stats(adapter);
2455
2456 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2457 adapter->tpt_old = adapter->stats.tpt;
2458 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2459 adapter->colc_old = adapter->stats.colc;
2460
2461 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2462 adapter->gorcl_old = adapter->stats.gorcl;
2463 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2464 adapter->gotcl_old = adapter->stats.gotcl;
2465
2466 e1000_update_adaptive(&adapter->hw);
2467
f56799ea
JK		 2468#ifdef CONFIG_E1000_MQ
2469 txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2470#endif
2471 if (!netif_carrier_ok(netdev)) {
581d708e 2472 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2473 /* We've lost link, so the controller stops DMA,
2474 * but we've got queued Tx work that's never going
2475 * to get done, so reset controller to flush Tx.
2476 * (Do the reset outside of interrupt context). */
2477 schedule_work(&adapter->tx_timeout_task);
2478 }
2479 }
2480
2481 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2482 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2483 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2484 * asymmetrical Tx or Rx gets ITR=8000; everyone
2485 * else is between 2000-8000. */
2486 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2487 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2488 adapter->gotcl - adapter->gorcl :
2489 adapter->gorcl - adapter->gotcl) / 10000;
2490 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2491 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2492 }
2493
2494 /* Cause software interrupt to ensure rx ring is cleaned */
2495 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2496
2648345f 2497 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2498 adapter->detect_tx_hung = TRUE;
2499
96838a40 2500 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2501 * reset from the other port. Set the appropriate LAA in RAR[0] */
2502 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2503 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2504
1da177e4
LT		 2505 /* Reset the timer */
2506 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2507}
2508
2509#define E1000_TX_FLAGS_CSUM 0x00000001
2510#define E1000_TX_FLAGS_VLAN 0x00000002
2511#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2512#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2513#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2514#define E1000_TX_FLAGS_VLAN_SHIFT 16
2515
2516static inline int
581d708e
MC		 2517e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2518 struct sk_buff *skb)
1da177e4
LT		 2519{
2520#ifdef NETIF_F_TSO
2521 struct e1000_context_desc *context_desc;
545c67c0 2522 struct e1000_buffer *buffer_info;
1da177e4
LT		 2523 unsigned int i;
2524 uint32_t cmd_length = 0;
2d7edb92 2525 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2526 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2527 int err;
2528
96838a40 2529 if (skb_shinfo(skb)->tso_size) {
1da177e4
LT		 2530 if (skb_header_cloned(skb)) {
2531 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2532 if (err)
2533 return err;
2534 }
2535
2536 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2537 mss = skb_shinfo(skb)->tso_size;
96838a40 2538 if (skb->protocol == ntohs(ETH_P_IP)) {
2d7edb92
MC		 2539 skb->nh.iph->tot_len = 0;
2540 skb->nh.iph->check = 0;
2541 skb->h.th->check =
2542 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2543 skb->nh.iph->daddr,
2544 0,
2545 IPPROTO_TCP,
2546 0);
2547 cmd_length = E1000_TXD_CMD_IP;
2548 ipcse = skb->h.raw - skb->data - 1;
2549#ifdef NETIF_F_TSO_IPV6
96838a40 2550 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2d7edb92
MC		 2551 skb->nh.ipv6h->payload_len = 0;
2552 skb->h.th->check =
2553 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2554 &skb->nh.ipv6h->daddr,
2555 0,
2556 IPPROTO_TCP,
2557 0);
2558 ipcse = 0;
2559#endif
2560 }
1da177e4
LT		 2561 ipcss = skb->nh.raw - skb->data;
2562 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2563 tucss = skb->h.raw - skb->data;
2564 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2565 tucse = 0;
2566
2567 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2568 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2569
581d708e
MC		 2570 i = tx_ring->next_to_use;
2571 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2572 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2573
2574 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2575 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2576 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2577 context_desc->upper_setup.tcp_fields.tucss = tucss;
2578 context_desc->upper_setup.tcp_fields.tucso = tucso;
2579 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2580 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2581 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2582 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2583
545c67c0
JK		 2584 buffer_info->time_stamp = jiffies;
2585
581d708e
MC		 2586 if (++i == tx_ring->count) i = 0;
2587 tx_ring->next_to_use = i;
1da177e4 2588
8241e35e 2589 return TRUE;
1da177e4
LT		 2590 }
2591#endif
2592
8241e35e 2593 return FALSE;
1da177e4
LT		 2594}
2595
2596static inline boolean_t
581d708e
MC		 2597e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2598 struct sk_buff *skb)
1da177e4
LT		 2599{
2600 struct e1000_context_desc *context_desc;
545c67c0 2601 struct e1000_buffer *buffer_info;
1da177e4
LT		 2602 unsigned int i;
2603 uint8_t css;
2604
96838a40 2605 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2606 css = skb->h.raw - skb->data;
2607
581d708e 2608 i = tx_ring->next_to_use;
545c67c0 2609 buffer_info = &tx_ring->buffer_info[i];
581d708e 2610 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2611
2612 context_desc->upper_setup.tcp_fields.tucss = css;
2613 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2614 context_desc->upper_setup.tcp_fields.tucse = 0;
2615 context_desc->tcp_seg_setup.data = 0;
2616 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2617
545c67c0
JK		 2618 buffer_info->time_stamp = jiffies;
2619
581d708e
MC		 2620 if (unlikely(++i == tx_ring->count)) i = 0;
2621 tx_ring->next_to_use = i;
1da177e4
LT		 2622
2623 return TRUE;
2624 }
2625
2626 return FALSE;
2627}
2628
2629#define E1000_MAX_TXD_PWR 12
2630#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2631
2632static inline int
581d708e
MC		 2633e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2634 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2635 unsigned int nr_frags, unsigned int mss)
1da177e4 2636{
1da177e4
LT		 2637 struct e1000_buffer *buffer_info;
2638 unsigned int len = skb->len;
2639 unsigned int offset = 0, size, count = 0, i;
2640 unsigned int f;
2641 len -= skb->data_len;
2642
2643 i = tx_ring->next_to_use;
2644
96838a40 2645 while (len) {
1da177e4
LT		 2646 buffer_info = &tx_ring->buffer_info[i];
2647 size = min(len, max_per_txd);
2648#ifdef NETIF_F_TSO
fd803241
JK		 2649 /* Workaround for Controller erratum --
2650 * descriptor for non-tso packet in a linear SKB that follows a
2651 * tso gets written back prematurely before the data is fully
2652 * DMAd to the controller */
2653 if (!skb->data_len && tx_ring->last_tx_tso &&
2654 !skb_shinfo(skb)->tso_size) {
2655 tx_ring->last_tx_tso = 0;
2656 size -= 4;
2657 }
2658
1da177e4
LT		 2659 /* Workaround for premature desc write-backs
2660 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2661 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2662 size -= 4;
2663#endif
97338bde
MC		 2664 /* work-around for errata 10 and it applies
2665 * to all controllers in PCI-X mode
2666 * The fix is to make sure that the first descriptor of a
2667 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2668 */
96838a40 2669 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2670 (size > 2015) && count == 0))
2671 size = 2015;
96838a40 2672
1da177e4
LT		 2673 /* Workaround for potential 82544 hang in PCI-X. Avoid
2674 * terminating buffers within evenly-aligned dwords. */
96838a40 2675 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2676 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2677 size > 4))
2678 size -= 4;
2679
2680 buffer_info->length = size;
2681 buffer_info->dma =
2682 pci_map_single(adapter->pdev,
2683 skb->data + offset,
2684 size,
2685 PCI_DMA_TODEVICE);
2686 buffer_info->time_stamp = jiffies;
2687
2688 len -= size;
2689 offset += size;
2690 count++;
96838a40 2691 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2692 }
2693
96838a40 2694 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2695 struct skb_frag_struct *frag;
2696
2697 frag = &skb_shinfo(skb)->frags[f];
2698 len = frag->size;
2699 offset = frag->page_offset;
2700
96838a40 2701 while (len) {
1da177e4
LT		 2702 buffer_info = &tx_ring->buffer_info[i];
2703 size = min(len, max_per_txd);
2704#ifdef NETIF_F_TSO
2705 /* Workaround for premature desc write-backs
2706 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2707 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2708 size -= 4;
2709#endif
2710 /* Workaround for potential 82544 hang in PCI-X.
2711 * Avoid terminating buffers within evenly-aligned
2712 * dwords. */
96838a40 2713 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2714 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2715 size > 4))
2716 size -= 4;
2717
2718 buffer_info->length = size;
2719 buffer_info->dma =
2720 pci_map_page(adapter->pdev,
2721 frag->page,
2722 offset,
2723 size,
2724 PCI_DMA_TODEVICE);
2725 buffer_info->time_stamp = jiffies;
2726
2727 len -= size;
2728 offset += size;
2729 count++;
96838a40 2730 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2731 }
2732 }
2733
2734 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2735 tx_ring->buffer_info[i].skb = skb;
2736 tx_ring->buffer_info[first].next_to_watch = i;
2737
2738 return count;
2739}
2740
2741static inline void
581d708e
MC		 2742e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2743 int tx_flags, int count)
1da177e4 2744{
1da177e4
LT		 2745 struct e1000_tx_desc *tx_desc = NULL;
2746 struct e1000_buffer *buffer_info;
2747 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2748 unsigned int i;
2749
96838a40 2750 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2751 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2752 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2753 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2754
96838a40 2755 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2756 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2757 }
2758
96838a40 2759 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2760 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2761 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2762 }
2763
96838a40 2764 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2765 txd_lower |= E1000_TXD_CMD_VLE;
2766 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2767 }
2768
2769 i = tx_ring->next_to_use;
2770
96838a40 2771 while (count--) {
1da177e4
LT		 2772 buffer_info = &tx_ring->buffer_info[i];
2773 tx_desc = E1000_TX_DESC(*tx_ring, i);
2774 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2775 tx_desc->lower.data =
2776 cpu_to_le32(txd_lower | buffer_info->length);
2777 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2778 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2779 }
2780
2781 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2782
2783 /* Force memory writes to complete before letting h/w
2784 * know there are new descriptors to fetch. (Only
2785 * applicable for weak-ordered memory model archs,
2786 * such as IA-64). */
2787 wmb();
2788
2789 tx_ring->next_to_use = i;
581d708e 2790 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2791}
2792
2793/**
2794 * 82547 workaround to avoid controller hang in half-duplex environment.
2795 * The workaround is to avoid queuing a large packet that would span
2796 * the internal Tx FIFO ring boundary by notifying the stack to resend
2797 * the packet at a later time. This gives the Tx FIFO an opportunity to
2798 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2799 * to the beginning of the Tx FIFO.
2800 **/
2801
2802#define E1000_FIFO_HDR 0x10
2803#define E1000_82547_PAD_LEN 0x3E0
2804
2805static inline int
2806e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2807{
2808 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2809 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2810
2811 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2812
96838a40 2813 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2814 goto no_fifo_stall_required;
2815
96838a40 2816 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2817 return 1;
2818
96838a40 2819 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2820 atomic_set(&adapter->tx_fifo_stall, 1);
2821 return 1;
2822 }
2823
2824no_fifo_stall_required:
2825 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2826 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2827 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2828 return 0;
2829}
2830
2d7edb92
MC		 2831#define MINIMUM_DHCP_PACKET_SIZE 282
2832static inline int
2833e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2834{
2835 struct e1000_hw *hw = &adapter->hw;
2836 uint16_t length, offset;
96838a40
JB		 2837 if (vlan_tx_tag_present(skb)) {
2838 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2839 ( adapter->hw.mng_cookie.status &
2840 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2841 return 0;
2842 }
96838a40 2843 if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
2d7edb92 2844 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2845 if ((htons(ETH_P_IP) == eth->h_proto)) {
2846 const struct iphdr *ip =
2d7edb92 2847 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2848 if (IPPROTO_UDP == ip->protocol) {
2849 struct udphdr *udp =
2850 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2851 (ip->ihl << 2));
96838a40 2852 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2853 offset = (uint8_t *)udp + 8 - skb->data;
2854 length = skb->len - offset;
2855
2856 return e1000_mng_write_dhcp_info(hw,
96838a40 2857 (uint8_t *)udp + 8,
2d7edb92
MC		 2858 length);
2859 }
2860 }
2861 }
2862 }
2863 return 0;
2864}
2865
1da177e4
LT		 2866#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2867static int
2868e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2869{
60490fe0 2870 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2871 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2872 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2873 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2874 unsigned int tx_flags = 0;
2875 unsigned int len = skb->len;
2876 unsigned long flags;
2877 unsigned int nr_frags = 0;
2878 unsigned int mss = 0;
2879 int count = 0;
96838a40 2880 int tso;
1da177e4
LT		 2881 unsigned int f;
2882 len -= skb->data_len;
2883
24025e4e
MC		 2884#ifdef CONFIG_E1000_MQ
2885 tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2886#else
581d708e 2887 tx_ring = adapter->tx_ring;
24025e4e
MC		 2888#endif
2889
581d708e 2890 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2891 dev_kfree_skb_any(skb);
2892 return NETDEV_TX_OK;
2893 }
2894
2895#ifdef NETIF_F_TSO
2896 mss = skb_shinfo(skb)->tso_size;
2648345f 2897 /* The controller does a simple calculation to
1da177e4
LT		 2898 * make sure there is enough room in the FIFO before
2899 * initiating the DMA for each buffer. The calc is:
2900 * 4 = ceil(buffer len/mss). To make sure we don't
2901 * overrun the FIFO, adjust the max buffer len if mss
2902 * drops. */
96838a40 2903 if (mss) {
9a3056da 2904 uint8_t hdr_len;
1da177e4
LT		 2905 max_per_txd = min(mss << 2, max_per_txd);
2906 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da
JK		 2907
2908 /* TSO Workaround for 82571/2 Controllers -- if skb->data
2909 * points to just header, pull a few bytes of payload from
2910 * frags into skb->data */
2911 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2912 if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
2913 (adapter->hw.mac_type == e1000_82571 ||
2914 adapter->hw.mac_type == e1000_82572)) {
d74bbd3b
JK		 2915 unsigned int pull_size;
2916 pull_size = min((unsigned int)4, skb->data_len);
2917 if (!__pskb_pull_tail(skb, pull_size)) {
2918 printk(KERN_ERR "__pskb_pull_tail failed.\n");
2919 dev_kfree_skb_any(skb);
9e927fb6 2920 return NETDEV_TX_OK;
d74bbd3b 2921 }
9a3056da
JK		 2922 len = skb->len - skb->data_len;
2923 }
1da177e4
LT		 2924 }
2925
9a3056da 2926 /* reserve a descriptor for the offload context */
96838a40 2927 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2928 count++;
2648345f 2929 count++;
1da177e4 2930#else
96838a40 2931 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2932 count++;
2933#endif
fd803241
JK		 2934
2935#ifdef NETIF_F_TSO
2936 /* Controller Erratum workaround */
2937 if (!skb->data_len && tx_ring->last_tx_tso &&
2938 !skb_shinfo(skb)->tso_size)
2939 count++;
2940#endif
2941
1da177e4
LT		 2942 count += TXD_USE_COUNT(len, max_txd_pwr);
2943
96838a40 2944 if (adapter->pcix_82544)
1da177e4
LT		 2945 count++;
2946
96838a40 2947 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2948 * in PCI-X mode, so add one more descriptor to the count
2949 */
96838a40 2950 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2951 (len > 2015)))
2952 count++;
2953
1da177e4 2954 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2955 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2956 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2957 max_txd_pwr);
96838a40 2958 if (adapter->pcix_82544)
1da177e4
LT		 2959 count += nr_frags;
2960
96838a40 2961 if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2d7edb92
MC		 2962 e1000_transfer_dhcp_info(adapter, skb);
2963
581d708e
MC		 2964 local_irq_save(flags);
2965 if (!spin_trylock(&tx_ring->tx_lock)) {
2966 /* Collision - tell upper layer to requeue */
2967 local_irq_restore(flags);
2968 return NETDEV_TX_LOCKED;
2969 }
1da177e4
LT		 2970
2971 /* need: count + 2 desc gap to keep tail from touching
2972 * head, otherwise try next time */
581d708e 2973 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2974 netif_stop_queue(netdev);
581d708e 2975 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2976 return NETDEV_TX_BUSY;
2977 }
2978
96838a40
JB		 2979 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2980 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 2981 netif_stop_queue(netdev);
2982 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2983 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2984 return NETDEV_TX_BUSY;
2985 }
2986 }
2987
96838a40 2988 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 2989 tx_flags |= E1000_TX_FLAGS_VLAN;
2990 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2991 }
2992
581d708e 2993 first = tx_ring->next_to_use;
96838a40 2994
581d708e 2995 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2996 if (tso < 0) {
2997 dev_kfree_skb_any(skb);
581d708e 2998 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2999 return NETDEV_TX_OK;
3000 }
3001
fd803241
JK		 3002 if (likely(tso)) {
3003 tx_ring->last_tx_tso = 1;
1da177e4 3004 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3005 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3006 tx_flags |= E1000_TX_FLAGS_CSUM;
3007
2d7edb92 3008 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3009 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3010 * no longer assume, we must. */
581d708e 3011 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2d7edb92
MC		 3012 tx_flags |= E1000_TX_FLAGS_IPV4;
3013
581d708e
MC		 3014 e1000_tx_queue(adapter, tx_ring, tx_flags,
3015 e1000_tx_map(adapter, tx_ring, skb, first,
3016 max_per_txd, nr_frags, mss));
1da177e4
LT		 3017
3018 netdev->trans_start = jiffies;
3019
3020 /* Make sure there is space in the ring for the next send. */
581d708e 3021 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 3022 netif_stop_queue(netdev);
3023
581d708e 3024 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3025 return NETDEV_TX_OK;
3026}
3027
3028/**
3029 * e1000_tx_timeout - Respond to a Tx Hang
3030 * @netdev: network interface device structure
3031 **/
3032
3033static void
3034e1000_tx_timeout(struct net_device *netdev)
3035{
60490fe0 3036 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3037
3038 /* Do the reset outside of interrupt context */
3039 schedule_work(&adapter->tx_timeout_task);
3040}
3041
3042static void
3043e1000_tx_timeout_task(struct net_device *netdev)
3044{
60490fe0 3045 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3046
6b7660cd 3047 adapter->tx_timeout_count++;
1da177e4
LT		 3048 e1000_down(adapter);
3049 e1000_up(adapter);
3050}
3051
3052/**
3053 * e1000_get_stats - Get System Network Statistics
3054 * @netdev: network interface device structure
3055 *
3056 * Returns the address of the device statistics structure.
3057 * The statistics are actually updated from the timer callback.
3058 **/
3059
3060static struct net_device_stats *
3061e1000_get_stats(struct net_device *netdev)
3062{
60490fe0 3063 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3064
6b7660cd 3065 /* only return the current stats */
1da177e4
LT		 3066 return &adapter->net_stats;
3067}
3068
3069/**
3070 * e1000_change_mtu - Change the Maximum Transfer Unit
3071 * @netdev: network interface device structure
3072 * @new_mtu: new value for maximum frame size
3073 *
3074 * Returns 0 on success, negative on failure
3075 **/
3076
3077static int
3078e1000_change_mtu(struct net_device *netdev, int new_mtu)
3079{
60490fe0 3080 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3081 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3082
96838a40
JB		 3083 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3084 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3085 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3086 return -EINVAL;
2d7edb92 3087 }
1da177e4 3088
997f5cbd
JK		 3089 /* Adapter-specific max frame size limits. */
3090 switch (adapter->hw.mac_type) {
3091 case e1000_82542_rev2_0:
3092 case e1000_82542_rev2_1:
3093 case e1000_82573:
3094 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3095 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3096 return -EINVAL;
2d7edb92 3097 }
997f5cbd
JK		 3098 break;
3099 case e1000_82571:
3100 case e1000_82572:
3101#define MAX_STD_JUMBO_FRAME_SIZE 9234
3102 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3103 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3104 return -EINVAL;
3105 }
3106 break;
3107 default:
3108 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3109 break;
1da177e4
LT		 3110 }
3111
997f5cbd 3112
997f5cbd 3113 if (adapter->hw.mac_type > e1000_82547_rev_2) {
a1415ee6 3114 adapter->rx_buffer_len = max_frame;
997f5cbd 3115 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
a1415ee6
JK		 3116 } else {
3117 if(unlikely((adapter->hw.mac_type < e1000_82543) &&
3118 (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
3119 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
3120 "on 82542\n");
3121 return -EINVAL;
3122 } else {
3123 if(max_frame <= E1000_RXBUFFER_2048)
3124 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3125 else if(max_frame <= E1000_RXBUFFER_4096)
3126 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3127 else if(max_frame <= E1000_RXBUFFER_8192)
3128 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3129 else if(max_frame <= E1000_RXBUFFER_16384)
3130 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3131 }
3132 }
997f5cbd 3133
2d7edb92
MC		 3134 netdev->mtu = new_mtu;
3135
96838a40 3136 if (netif_running(netdev)) {
1da177e4
LT		 3137 e1000_down(adapter);
3138 e1000_up(adapter);
3139 }
3140
1da177e4
LT		 3141 adapter->hw.max_frame_size = max_frame;
3142
3143 return 0;
3144}
3145
3146/**
3147 * e1000_update_stats - Update the board statistics counters
3148 * @adapter: board private structure
3149 **/
3150
3151void
3152e1000_update_stats(struct e1000_adapter *adapter)
3153{
3154 struct e1000_hw *hw = &adapter->hw;
3155 unsigned long flags;
3156 uint16_t phy_tmp;
3157
3158#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3159
3160 spin_lock_irqsave(&adapter->stats_lock, flags);
3161
3162 /* these counters are modified from e1000_adjust_tbi_stats,
3163 * called from the interrupt context, so they must only
3164 * be written while holding adapter->stats_lock
3165 */
3166
3167 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3168 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3169 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3170 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3171 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3172 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3173 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3174 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3175 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3176 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3177 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3178 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3179 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3180
3181 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3182 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3183 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3184 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3185 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3186 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3187 adapter->stats.dc += E1000_READ_REG(hw, DC);
3188 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3189 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3190 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3191 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3192 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3193 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3194 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3195 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3196 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3197 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3198 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3199 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3200 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3201 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3202 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3203 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3204 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3205 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3206 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3207 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3208 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3209 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3210 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3211 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3212 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3213 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3214 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3215
3216 /* used for adaptive IFS */
3217
3218 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3219 adapter->stats.tpt += hw->tx_packet_delta;
3220 hw->collision_delta = E1000_READ_REG(hw, COLC);
3221 adapter->stats.colc += hw->collision_delta;
3222
96838a40 3223 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3224 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3225 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3226 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3227 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3228 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3229 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3230 }
96838a40 3231 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3232 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3233 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3234 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3235 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3236 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3237 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3238 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3239 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3240 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3241 }
1da177e4
LT		 3242
3243 /* Fill out the OS statistics structure */
3244
3245 adapter->net_stats.rx_packets = adapter->stats.gprc;
3246 adapter->net_stats.tx_packets = adapter->stats.gptc;
3247 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3248 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3249 adapter->net_stats.multicast = adapter->stats.mprc;
3250 adapter->net_stats.collisions = adapter->stats.colc;
3251
3252 /* Rx Errors */
3253
3254 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3255 adapter->stats.crcerrs + adapter->stats.algnerrc +
6b7660cd
JK		 3256 adapter->stats.rlec + adapter->stats.cexterr;
3257 adapter->net_stats.rx_dropped = 0;
1da177e4
LT		 3258 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3259 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3260 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3261 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3262
3263 /* Tx Errors */
3264
3265 adapter->net_stats.tx_errors = adapter->stats.ecol +
3266 adapter->stats.latecol;
3267 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3268 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3269 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3270
3271 /* Tx Dropped needs to be maintained elsewhere */
3272
3273 /* Phy Stats */
3274
96838a40
JB		 3275 if (hw->media_type == e1000_media_type_copper) {
3276 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3277 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3278 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3279 adapter->phy_stats.idle_errors += phy_tmp;
3280 }
3281
96838a40 3282 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3283 (hw->phy_type == e1000_phy_m88) &&
3284 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3285 adapter->phy_stats.receive_errors += phy_tmp;
3286 }
3287
3288 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3289}
3290
24025e4e
MC		 3291#ifdef CONFIG_E1000_MQ
3292void
3293e1000_rx_schedule(void *data)
3294{
3295 struct net_device *poll_dev, *netdev = data;
3296 struct e1000_adapter *adapter = netdev->priv;
3297 int this_cpu = get_cpu();
3298
3299 poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
3300 if (poll_dev == NULL) {
3301 put_cpu();
3302 return;
3303 }
3304
3305 if (likely(netif_rx_schedule_prep(poll_dev)))
3306 __netif_rx_schedule(poll_dev);
3307 else
3308 e1000_irq_enable(adapter);
3309
3310 put_cpu();
3311}
3312#endif
3313
1da177e4
LT		 3314/**
3315 * e1000_intr - Interrupt Handler
3316 * @irq: interrupt number
3317 * @data: pointer to a network interface device structure
3318 * @pt_regs: CPU registers structure
3319 **/
3320
3321static irqreturn_t
3322e1000_intr(int irq, void *data, struct pt_regs *regs)
3323{
3324 struct net_device *netdev = data;
60490fe0 3325 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3326 struct e1000_hw *hw = &adapter->hw;
3327 uint32_t icr = E1000_READ_REG(hw, ICR);
1e613fd9 3328#ifndef CONFIG_E1000_NAPI
581d708e 3329 int i;
1e613fd9
JK		 3330#else
3331 /* Interrupt Auto-Mask...upon reading ICR,
3332 * interrupts are masked. No need for the
3333 * IMC write, but it does mean we should
3334 * account for it ASAP. */
3335 if (likely(hw->mac_type >= e1000_82571))
3336 atomic_inc(&adapter->irq_sem);
be2b28ed 3337#endif
1da177e4 3338
1e613fd9
JK		 3339 if (unlikely(!icr)) {
3340#ifdef CONFIG_E1000_NAPI
3341 if (hw->mac_type >= e1000_82571)
3342 e1000_irq_enable(adapter);
3343#endif
1da177e4 3344 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3345 }
1da177e4 3346
96838a40 3347 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4
LT		 3348 hw->get_link_status = 1;
3349 mod_timer(&adapter->watchdog_timer, jiffies);
3350 }
3351
3352#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3353 if (unlikely(hw->mac_type < e1000_82571)) {
3354 atomic_inc(&adapter->irq_sem);
3355 E1000_WRITE_REG(hw, IMC, ~0);
3356 E1000_WRITE_FLUSH(hw);
3357 }
24025e4e
MC		 3358#ifdef CONFIG_E1000_MQ
3359 if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
f56799ea
JK		 3360 /* We must setup the cpumask once count == 0 since
3361 * each cpu bit is cleared when the work is done. */
3362 adapter->rx_sched_call_data.cpumask = adapter->cpumask;
3363 atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
3364 atomic_set(&adapter->rx_sched_call_data.count,
3365 adapter->num_rx_queues);
24025e4e
MC		 3366 smp_call_async_mask(&adapter->rx_sched_call_data);
3367 } else {
3368 printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
1da177e4 3369 }
be2b28ed 3370#else /* if !CONFIG_E1000_MQ */
581d708e
MC		 3371 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3372 __netif_rx_schedule(&adapter->polling_netdev[0]);
3373 else
3374 e1000_irq_enable(adapter);
be2b28ed
JG		 3375#endif /* CONFIG_E1000_MQ */
3376
3377#else /* if !CONFIG_E1000_NAPI */
1da177e4 3378 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3379 * Due to Hub Link bus being occupied, an interrupt
3380 * de-assertion message is not able to be sent.
3381 * When an interrupt assertion message is generated later,
3382 * two messages are re-ordered and sent out.
3383 * That causes APIC to think 82547 is in de-assertion
3384 * state, while 82547 is in assertion state, resulting
3385 * in dead lock. Writing IMC forces 82547 into
3386 * de-assertion state.
3387 */
3388 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3389 atomic_inc(&adapter->irq_sem);
2648345f 3390 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3391 }
3392
96838a40
JB		 3393 for (i = 0; i < E1000_MAX_INTR; i++)
3394 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3395 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3396 break;
3397
96838a40 3398 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3399 e1000_irq_enable(adapter);
581d708e 3400
be2b28ed 3401#endif /* CONFIG_E1000_NAPI */
1da177e4
LT		 3402
3403 return IRQ_HANDLED;
3404}
3405
3406#ifdef CONFIG_E1000_NAPI
3407/**
3408 * e1000_clean - NAPI Rx polling callback
3409 * @adapter: board private structure
3410 **/
3411
3412static int
581d708e 3413e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3414{
581d708e
MC		 3415 struct e1000_adapter *adapter;
3416 int work_to_do = min(*budget, poll_dev->quota);
38bd3b26 3417 int tx_cleaned = 0, i = 0, work_done = 0;
581d708e
MC		 3418
3419 /* Must NOT use netdev_priv macro here. */
3420 adapter = poll_dev->priv;
3421
3422 /* Keep link state information with original netdev */
3423 if (!netif_carrier_ok(adapter->netdev))
3424 goto quit_polling;
2648345f 3425
581d708e
MC		 3426 while (poll_dev != &adapter->polling_netdev[i]) {
3427 i++;
f56799ea 3428 if (unlikely(i == adapter->num_rx_queues))
581d708e
MC		 3429 BUG();
3430 }
3431
8241e35e
JK		 3432 if (likely(adapter->num_tx_queues == 1)) {
3433 /* e1000_clean is called per-cpu. This lock protects
3434 * tx_ring[0] from being cleaned by multiple cpus
3435 * simultaneously. A failure obtaining the lock means
3436 * tx_ring[0] is currently being cleaned anyway. */
3437 if (spin_trylock(&adapter->tx_queue_lock)) {
3438 tx_cleaned = e1000_clean_tx_irq(adapter,
3439 &adapter->tx_ring[0]);
3440 spin_unlock(&adapter->tx_queue_lock);
3441 }
3442 } else
3443 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3444
581d708e
MC		 3445 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3446 &work_done, work_to_do);
1da177e4
LT		 3447
3448 *budget -= work_done;
581d708e 3449 poll_dev->quota -= work_done;
96838a40 3450
2b02893e 3451 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3452 if ((!tx_cleaned && (work_done == 0)) ||
581d708e
MC		 3453 !netif_running(adapter->netdev)) {
3454quit_polling:
3455 netif_rx_complete(poll_dev);
1da177e4
LT		 3456 e1000_irq_enable(adapter);
3457 return 0;
3458 }
3459
3460 return 1;
3461}
3462
3463#endif
3464/**
3465 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3466 * @adapter: board private structure
3467 **/
3468
3469static boolean_t
581d708e
MC		 3470e1000_clean_tx_irq(struct e1000_adapter *adapter,
3471 struct e1000_tx_ring *tx_ring)
1da177e4 3472{
1da177e4
LT		 3473 struct net_device *netdev = adapter->netdev;
3474 struct e1000_tx_desc *tx_desc, *eop_desc;
3475 struct e1000_buffer *buffer_info;
3476 unsigned int i, eop;
3477 boolean_t cleaned = FALSE;
3478
3479 i = tx_ring->next_to_clean;
3480 eop = tx_ring->buffer_info[i].next_to_watch;
3481 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3482
581d708e 3483 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3484 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3485 tx_desc = E1000_TX_DESC(*tx_ring, i);
3486 buffer_info = &tx_ring->buffer_info[i];
3487 cleaned = (i == eop);
3488
8241e35e
JK		 3489#ifdef CONFIG_E1000_MQ
3490 tx_ring->tx_stats.bytes += buffer_info->length;
3491#endif
fd803241 3492 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3493 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3494
96838a40 3495 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3496 }
581d708e 3497
7bfa4816
JK		 3498#ifdef CONFIG_E1000_MQ
3499 tx_ring->tx_stats.packets++;
3500#endif
3501
1da177e4
LT		 3502 eop = tx_ring->buffer_info[i].next_to_watch;
3503 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3504 }
3505
3506 tx_ring->next_to_clean = i;
3507
581d708e 3508 spin_lock(&tx_ring->tx_lock);
1da177e4 3509
96838a40 3510 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
1da177e4
LT		 3511 netif_carrier_ok(netdev)))
3512 netif_wake_queue(netdev);
3513
581d708e 3514 spin_unlock(&tx_ring->tx_lock);
2648345f 3515
581d708e 3516 if (adapter->detect_tx_hung) {
2648345f 3517 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3518 * check with the clearing of time_stamp and movement of i */
3519 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3520 if (tx_ring->buffer_info[eop].dma &&
3521 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3522 adapter->tx_timeout_factor * HZ)
70b8f1e1 3523 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3524 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3525
3526 /* detected Tx unit hang */
c6963ef5 3527 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3528 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3529 " TDH <%x>\n"
3530 " TDT <%x>\n"
3531 " next_to_use <%x>\n"
3532 " next_to_clean <%x>\n"
3533 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3534 " time_stamp <%lx>\n"
3535 " next_to_watch <%x>\n"
3536 " jiffies <%lx>\n"
3537 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3538 (unsigned long)((tx_ring - adapter->tx_ring) /
3539 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3540 readl(adapter->hw.hw_addr + tx_ring->tdh),
3541 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3542 tx_ring->next_to_use,
392137fa
JK		 3543 tx_ring->next_to_clean,
3544 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3545 eop,
3546 jiffies,
3547 eop_desc->upper.fields.status);
1da177e4 3548 netif_stop_queue(netdev);
70b8f1e1 3549 }
1da177e4 3550 }
1da177e4
LT		 3551 return cleaned;
3552}
3553
3554/**
3555 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3556 * @adapter: board private structure
3557 * @status_err: receive descriptor status and error fields
3558 * @csum: receive descriptor csum field
3559 * @sk_buff: socket buffer with received data
1da177e4
LT		 3560 **/
3561
3562static inline void
3563e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3564 uint32_t status_err, uint32_t csum,
3565 struct sk_buff *skb)
1da177e4 3566{
2d7edb92
MC		 3567 uint16_t status = (uint16_t)status_err;
3568 uint8_t errors = (uint8_t)(status_err >> 24);
3569 skb->ip_summed = CHECKSUM_NONE;
3570
1da177e4 3571 /* 82543 or newer only */
96838a40 3572 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3573 /* Ignore Checksum bit is set */
96838a40 3574 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3575 /* TCP/UDP checksum error bit is set */
96838a40 3576 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3577 /* let the stack verify checksum errors */
1da177e4 3578 adapter->hw_csum_err++;
2d7edb92
MC		 3579 return;
3580 }
3581 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3582 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3583 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3584 return;
1da177e4 3585 } else {
96838a40 3586 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3587 return;
3588 }
3589 /* It must be a TCP or UDP packet with a valid checksum */
3590 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3591 /* TCP checksum is good */
3592 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3593 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3594 /* IP fragment with UDP payload */
3595 /* Hardware complements the payload checksum, so we undo it
3596 * and then put the value in host order for further stack use.
3597 */
3598 csum = ntohl(csum ^ 0xFFFF);
3599 skb->csum = csum;
3600 skb->ip_summed = CHECKSUM_HW;
1da177e4 3601 }
2d7edb92 3602 adapter->hw_csum_good++;
1da177e4
LT		 3603}
3604
3605/**
2d7edb92 3606 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3607 * @adapter: board private structure
3608 **/
3609
3610static boolean_t
3611#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3612e1000_clean_rx_irq(struct e1000_adapter *adapter,
3613 struct e1000_rx_ring *rx_ring,
3614 int *work_done, int work_to_do)
1da177e4 3615#else
581d708e
MC		 3616e1000_clean_rx_irq(struct e1000_adapter *adapter,
3617 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3618#endif
3619{
1da177e4
LT		 3620 struct net_device *netdev = adapter->netdev;
3621 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3622 struct e1000_rx_desc *rx_desc, *next_rxd;
3623 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3624 unsigned long flags;
3625 uint32_t length;
3626 uint8_t last_byte;
3627 unsigned int i;
72d64a43 3628 int cleaned_count = 0;
a1415ee6 3629 boolean_t cleaned = FALSE;
1da177e4
LT		 3630
3631 i = rx_ring->next_to_clean;
3632 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3633 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3634
b92ff8ee 3635 while (rx_desc->status & E1000_RXD_STAT_DD) {
86c3d59f 3636 struct sk_buff *skb, *next_skb;
a292ca6e 3637 u8 status;
1da177e4 3638#ifdef CONFIG_E1000_NAPI
96838a40 3639 if (*work_done >= work_to_do)
1da177e4
LT		 3640 break;
3641 (*work_done)++;
3642#endif
a292ca6e 3643 status = rx_desc->status;
b92ff8ee 3644 skb = buffer_info->skb;
86c3d59f
JB		 3645 buffer_info->skb = NULL;
3646
3647 if (++i == rx_ring->count) i = 0;
3648 next_rxd = E1000_RX_DESC(*rx_ring, i);
3649 next_buffer = &rx_ring->buffer_info[i];
3650 next_skb = next_buffer->skb;
3651
72d64a43
JK		 3652 cleaned = TRUE;
3653 cleaned_count++;
a292ca6e
JK		 3654 pci_unmap_single(pdev,
3655 buffer_info->dma,
3656 buffer_info->length,
1da177e4
LT		 3657 PCI_DMA_FROMDEVICE);
3658
1da177e4
LT		 3659 length = le16_to_cpu(rx_desc->length);
3660
a1415ee6
JK		 3661 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3662 /* All receives must fit into a single buffer */
3663 E1000_DBG("%s: Receive packet consumed multiple"
3664 " buffers\n", netdev->name);
3665 dev_kfree_skb_irq(skb);
1da177e4
LT		 3666 goto next_desc;
3667 }
3668
96838a40 3669 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3670 last_byte = *(skb->data + length - 1);
b92ff8ee 3671 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3672 rx_desc->errors, length, last_byte)) {
3673 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3674 e1000_tbi_adjust_stats(&adapter->hw,
3675 &adapter->stats,
1da177e4
LT		 3676 length, skb->data);
3677 spin_unlock_irqrestore(&adapter->stats_lock,
3678 flags);
3679 length--;
3680 } else {
3681 dev_kfree_skb_irq(skb);
3682 goto next_desc;
3683 }
3684 }
3685
a292ca6e
JK		 3686 /* code added for copybreak, this should improve
3687 * performance for small packets with large amounts
3688 * of reassembly being done in the stack */
3689#define E1000_CB_LENGTH 256
a1415ee6 3690 if (length < E1000_CB_LENGTH) {
a292ca6e
JK		 3691 struct sk_buff *new_skb =
3692 dev_alloc_skb(length + NET_IP_ALIGN);
3693 if (new_skb) {
3694 skb_reserve(new_skb, NET_IP_ALIGN);
3695 new_skb->dev = netdev;
3696 memcpy(new_skb->data - NET_IP_ALIGN,
3697 skb->data - NET_IP_ALIGN,
3698 length + NET_IP_ALIGN);
3699 /* save the skb in buffer_info as good */
3700 buffer_info->skb = skb;
3701 skb = new_skb;
3702 skb_put(skb, length);
3703 }
a1415ee6
JK		 3704 } else
3705 skb_put(skb, length);
a292ca6e
JK		 3706
3707 /* end copybreak code */
1da177e4
LT		 3708
3709 /* Receive Checksum Offload */
a292ca6e
JK		 3710 e1000_rx_checksum(adapter,
3711 (uint32_t)(status) |
2d7edb92
MC		 3712 ((uint32_t)(rx_desc->errors) << 24),
3713 rx_desc->csum, skb);
96838a40 3714
1da177e4
LT		 3715 skb->protocol = eth_type_trans(skb, netdev);
3716#ifdef CONFIG_E1000_NAPI
96838a40 3717 if (unlikely(adapter->vlgrp &&
a292ca6e 3718 (status & E1000_RXD_STAT_VP))) {
1da177e4 3719 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3720 le16_to_cpu(rx_desc->special) &
3721 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3722 } else {
3723 netif_receive_skb(skb);
3724 }
3725#else /* CONFIG_E1000_NAPI */
96838a40 3726 if (unlikely(adapter->vlgrp &&
b92ff8ee 3727 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3728 vlan_hwaccel_rx(skb, adapter->vlgrp,
3729 le16_to_cpu(rx_desc->special) &
3730 E1000_RXD_SPC_VLAN_MASK);
3731 } else {
3732 netif_rx(skb);
3733 }
3734#endif /* CONFIG_E1000_NAPI */
3735 netdev->last_rx = jiffies;
7bfa4816
JK		 3736#ifdef CONFIG_E1000_MQ
3737 rx_ring->rx_stats.packets++;
3738 rx_ring->rx_stats.bytes += length;
3739#endif
1da177e4
LT		 3740
3741next_desc:
3742 rx_desc->status = 0;
1da177e4 3743
72d64a43
JK		 3744 /* return some buffers to hardware, one at a time is too slow */
3745 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3746 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3747 cleaned_count = 0;
3748 }
3749
86c3d59f
JB		 3750 rx_desc = next_rxd;
3751 buffer_info = next_buffer;
1da177e4 3752 }
1da177e4 3753 rx_ring->next_to_clean = i;
72d64a43
JK		 3754
3755 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3756 if (cleaned_count)
3757 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3758
3759 return cleaned;
3760}
3761
3762/**
3763 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3764 * @adapter: board private structure
3765 **/
3766
3767static boolean_t
3768#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3769e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3770 struct e1000_rx_ring *rx_ring,
3771 int *work_done, int work_to_do)
2d7edb92 3772#else
581d708e
MC		 3773e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3774 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3775#endif
3776{
86c3d59f 3777 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3778 struct net_device *netdev = adapter->netdev;
3779 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3780 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3781 struct e1000_ps_page *ps_page;
3782 struct e1000_ps_page_dma *ps_page_dma;
86c3d59f 3783 struct sk_buff *skb, *next_skb;
2d7edb92
MC		 3784 unsigned int i, j;
3785 uint32_t length, staterr;
72d64a43 3786 int cleaned_count = 0;
2d7edb92
MC		 3787 boolean_t cleaned = FALSE;
3788
3789 i = rx_ring->next_to_clean;
3790 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3791 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
86c3d59f 3792 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3793
96838a40 3794 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3795 ps_page = &rx_ring->ps_page[i];
3796 ps_page_dma = &rx_ring->ps_page_dma[i];
3797#ifdef CONFIG_E1000_NAPI
96838a40 3798 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3799 break;
3800 (*work_done)++;
3801#endif
86c3d59f
JB		 3802 skb = buffer_info->skb;
3803
3804 if (++i == rx_ring->count) i = 0;
3805 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
3806 next_buffer = &rx_ring->buffer_info[i];
3807 next_skb = next_buffer->skb;
3808
2d7edb92 3809 cleaned = TRUE;
72d64a43 3810 cleaned_count++;
2d7edb92
MC		 3811 pci_unmap_single(pdev, buffer_info->dma,
3812 buffer_info->length,
3813 PCI_DMA_FROMDEVICE);
3814
96838a40 3815 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3816 E1000_DBG("%s: Packet Split buffers didn't pick up"
3817 " the full packet\n", netdev->name);
3818 dev_kfree_skb_irq(skb);
3819 goto next_desc;
3820 }
1da177e4 3821
96838a40 3822 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3823 dev_kfree_skb_irq(skb);
3824 goto next_desc;
3825 }
3826
3827 length = le16_to_cpu(rx_desc->wb.middle.length0);
3828
96838a40 3829 if (unlikely(!length)) {
2d7edb92
MC		 3830 E1000_DBG("%s: Last part of the packet spanning"
3831 " multiple descriptors\n", netdev->name);
3832 dev_kfree_skb_irq(skb);
3833 goto next_desc;
3834 }
3835
3836 /* Good Receive */
3837 skb_put(skb, length);
3838
96838a40
JB		 3839 for (j = 0; j < adapter->rx_ps_pages; j++) {
3840 if (!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92
MC		 3841 break;
3842
3843 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3844 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3845 ps_page_dma->ps_page_dma[j] = 0;
3846 skb_shinfo(skb)->frags[j].page =
3847 ps_page->ps_page[j];
3848 ps_page->ps_page[j] = NULL;
3849 skb_shinfo(skb)->frags[j].page_offset = 0;
3850 skb_shinfo(skb)->frags[j].size = length;
3851 skb_shinfo(skb)->nr_frags++;
3852 skb->len += length;
3853 skb->data_len += length;
3854 }
3855
3856 e1000_rx_checksum(adapter, staterr,
3857 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3858 skb->protocol = eth_type_trans(skb, netdev);
3859
96838a40 3860 if (likely(rx_desc->wb.upper.header_status &
b92ff8ee 3861 E1000_RXDPS_HDRSTAT_HDRSP))
e4c811c9 3862 adapter->rx_hdr_split++;
2d7edb92 3863#ifdef CONFIG_E1000_NAPI
96838a40 3864 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3865 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3866 le16_to_cpu(rx_desc->wb.middle.vlan) &
3867 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3868 } else {
3869 netif_receive_skb(skb);
3870 }
3871#else /* CONFIG_E1000_NAPI */
96838a40 3872 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3873 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3874 le16_to_cpu(rx_desc->wb.middle.vlan) &
3875 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3876 } else {
3877 netif_rx(skb);
3878 }
3879#endif /* CONFIG_E1000_NAPI */
3880 netdev->last_rx = jiffies;
7bfa4816
JK		 3881#ifdef CONFIG_E1000_MQ
3882 rx_ring->rx_stats.packets++;
3883 rx_ring->rx_stats.bytes += length;
3884#endif
2d7edb92
MC		 3885
3886next_desc:
3887 rx_desc->wb.middle.status_error &= ~0xFF;
3888 buffer_info->skb = NULL;
2d7edb92 3889
72d64a43
JK		 3890 /* return some buffers to hardware, one at a time is too slow */
3891 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3892 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3893 cleaned_count = 0;
3894 }
3895
86c3d59f
JB		 3896 rx_desc = next_rxd;
3897 buffer_info = next_buffer;
3898
683a38f3 3899 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3900 }
3901 rx_ring->next_to_clean = i;
72d64a43
JK		 3902
3903 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3904 if (cleaned_count)
3905 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3906
3907 return cleaned;
3908}
3909
3910/**
2d7edb92 3911 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3912 * @adapter: address of board private structure
3913 **/
3914
3915static void
581d708e 3916e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3917 struct e1000_rx_ring *rx_ring,
a292ca6e 3918 int cleaned_count)
1da177e4 3919{
1da177e4
LT		 3920 struct net_device *netdev = adapter->netdev;
3921 struct pci_dev *pdev = adapter->pdev;
3922 struct e1000_rx_desc *rx_desc;
3923 struct e1000_buffer *buffer_info;
3924 struct sk_buff *skb;
2648345f
MC		 3925 unsigned int i;
3926 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3927
3928 i = rx_ring->next_to_use;
3929 buffer_info = &rx_ring->buffer_info[i];
3930
a292ca6e
JK		 3931 while (cleaned_count--) {
3932 if (!(skb = buffer_info->skb))
3933 skb = dev_alloc_skb(bufsz);
3934 else {
3935 skb_trim(skb, 0);
3936 goto map_skb;
3937 }
3938
2648345f 3939
96838a40 3940 if (unlikely(!skb)) {
1da177e4 3941 /* Better luck next round */
72d64a43 3942 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3943 break;
3944 }
3945
2648345f 3946 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3947 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3948 struct sk_buff *oldskb = skb;
2648345f
MC		 3949 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3950 "at %p\n", bufsz, skb->data);
3951 /* Try again, without freeing the previous */
1da177e4 3952 skb = dev_alloc_skb(bufsz);
2648345f 3953 /* Failed allocation, critical failure */
1da177e4
LT		 3954 if (!skb) {
3955 dev_kfree_skb(oldskb);
3956 break;
3957 }
2648345f 3958
1da177e4
LT		 3959 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3960 /* give up */
3961 dev_kfree_skb(skb);
3962 dev_kfree_skb(oldskb);
3963 break; /* while !buffer_info->skb */
3964 } else {
2648345f 3965 /* Use new allocation */
1da177e4
LT		 3966 dev_kfree_skb(oldskb);
3967 }
3968 }
1da177e4
LT		 3969 /* Make buffer alignment 2 beyond a 16 byte boundary
3970 * this will result in a 16 byte aligned IP header after
3971 * the 14 byte MAC header is removed
3972 */
3973 skb_reserve(skb, NET_IP_ALIGN);
3974
3975 skb->dev = netdev;
3976
3977 buffer_info->skb = skb;
3978 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 3979map_skb:
1da177e4
LT		 3980 buffer_info->dma = pci_map_single(pdev,
3981 skb->data,
3982 adapter->rx_buffer_len,
3983 PCI_DMA_FROMDEVICE);
3984
2648345f
MC		 3985 /* Fix for errata 23, can't cross 64kB boundary */
3986 if (!e1000_check_64k_bound(adapter,
3987 (void *)(unsigned long)buffer_info->dma,
3988 adapter->rx_buffer_len)) {
3989 DPRINTK(RX_ERR, ERR,
3990 "dma align check failed: %u bytes at %p\n",
3991 adapter->rx_buffer_len,
3992 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3993 dev_kfree_skb(skb);
3994 buffer_info->skb = NULL;
3995
2648345f 3996 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3997 adapter->rx_buffer_len,
3998 PCI_DMA_FROMDEVICE);
3999
4000 break; /* while !buffer_info->skb */
4001 }
1da177e4
LT		 4002 rx_desc = E1000_RX_DESC(*rx_ring, i);
4003 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4004
96838a40
JB		 4005 if (unlikely(++i == rx_ring->count))
4006 i = 0;
1da177e4
LT		 4007 buffer_info = &rx_ring->buffer_info[i];
4008 }
4009
b92ff8ee
JB		 4010 if (likely(rx_ring->next_to_use != i)) {
4011 rx_ring->next_to_use = i;
4012 if (unlikely(i-- == 0))
4013 i = (rx_ring->count - 1);
4014
4015 /* Force memory writes to complete before letting h/w
4016 * know there are new descriptors to fetch. (Only
4017 * applicable for weak-ordered memory model archs,
4018 * such as IA-64). */
4019 wmb();
4020 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4021 }
1da177e4
LT		 4022}
4023
2d7edb92
MC		 4024/**
4025 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4026 * @adapter: address of board private structure
4027 **/
4028
4029static void
581d708e 4030e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4031 struct e1000_rx_ring *rx_ring,
4032 int cleaned_count)
2d7edb92 4033{
2d7edb92
MC		 4034 struct net_device *netdev = adapter->netdev;
4035 struct pci_dev *pdev = adapter->pdev;
4036 union e1000_rx_desc_packet_split *rx_desc;
4037 struct e1000_buffer *buffer_info;
4038 struct e1000_ps_page *ps_page;
4039 struct e1000_ps_page_dma *ps_page_dma;
4040 struct sk_buff *skb;
4041 unsigned int i, j;
4042
4043 i = rx_ring->next_to_use;
4044 buffer_info = &rx_ring->buffer_info[i];
4045 ps_page = &rx_ring->ps_page[i];
4046 ps_page_dma = &rx_ring->ps_page_dma[i];
4047
72d64a43 4048 while (cleaned_count--) {
2d7edb92
MC		 4049 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4050
96838a40 4051 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4052 if (j < adapter->rx_ps_pages) {
4053 if (likely(!ps_page->ps_page[j])) {
4054 ps_page->ps_page[j] =
4055 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4056 if (unlikely(!ps_page->ps_page[j])) {
4057 adapter->alloc_rx_buff_failed++;
e4c811c9 4058 goto no_buffers;
b92ff8ee 4059 }
e4c811c9
MC		 4060 ps_page_dma->ps_page_dma[j] =
4061 pci_map_page(pdev,
4062 ps_page->ps_page[j],
4063 0, PAGE_SIZE,
4064 PCI_DMA_FROMDEVICE);
4065 }
4066 /* Refresh the desc even if buffer_addrs didn't
96838a40 4067 * change because each write-back erases
e4c811c9
MC		 4068 * this info.
4069 */
4070 rx_desc->read.buffer_addr[j+1] =
4071 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4072 } else
4073 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4074 }
4075
4076 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4077
b92ff8ee
JB		 4078 if (unlikely(!skb)) {
4079 adapter->alloc_rx_buff_failed++;
2d7edb92 4080 break;
b92ff8ee 4081 }
2d7edb92
MC		 4082
4083 /* Make buffer alignment 2 beyond a 16 byte boundary
4084 * this will result in a 16 byte aligned IP header after
4085 * the 14 byte MAC header is removed
4086 */
4087 skb_reserve(skb, NET_IP_ALIGN);
4088
4089 skb->dev = netdev;
4090
4091 buffer_info->skb = skb;
4092 buffer_info->length = adapter->rx_ps_bsize0;
4093 buffer_info->dma = pci_map_single(pdev, skb->data,
4094 adapter->rx_ps_bsize0,
4095 PCI_DMA_FROMDEVICE);
4096
4097 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4098
96838a40 4099 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4100 buffer_info = &rx_ring->buffer_info[i];
4101 ps_page = &rx_ring->ps_page[i];
4102 ps_page_dma = &rx_ring->ps_page_dma[i];
4103 }
4104
4105no_buffers:
b92ff8ee
JB		 4106 if (likely(rx_ring->next_to_use != i)) {
4107 rx_ring->next_to_use = i;
4108 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4109
4110 /* Force memory writes to complete before letting h/w
4111 * know there are new descriptors to fetch. (Only
4112 * applicable for weak-ordered memory model archs,
4113 * such as IA-64). */
4114 wmb();
4115 /* Hardware increments by 16 bytes, but packet split
4116 * descriptors are 32 bytes...so we increment tail
4117 * twice as much.
4118 */
4119 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4120 }
2d7edb92
MC		 4121}
4122
1da177e4
LT		 4123/**
4124 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4125 * @adapter:
4126 **/
4127
4128static void
4129e1000_smartspeed(struct e1000_adapter *adapter)
4130{
4131 uint16_t phy_status;
4132 uint16_t phy_ctrl;
4133
96838a40 4134 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4135 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4136 return;
4137
96838a40 4138 if (adapter->smartspeed == 0) {
1da177e4
LT		 4139 /* If Master/Slave config fault is asserted twice,
4140 * we assume back-to-back */
4141 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4142 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4143 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4144 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4145 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4146 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4147 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4148 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4149 phy_ctrl);
4150 adapter->smartspeed++;
96838a40 4151 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4152 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4153 &phy_ctrl)) {
4154 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4155 MII_CR_RESTART_AUTO_NEG);
4156 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4157 phy_ctrl);
4158 }
4159 }
4160 return;
96838a40 4161 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4162 /* If still no link, perhaps using 2/3 pair cable */
4163 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4164 phy_ctrl |= CR_1000T_MS_ENABLE;
4165 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4166 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4167 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4168 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4169 MII_CR_RESTART_AUTO_NEG);
4170 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4171 }
4172 }
4173 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4174 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4175 adapter->smartspeed = 0;
4176}
4177
4178/**
4179 * e1000_ioctl -
4180 * @netdev:
4181 * @ifreq:
4182 * @cmd:
4183 **/
4184
4185static int
4186e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4187{
4188 switch (cmd) {
4189 case SIOCGMIIPHY:
4190 case SIOCGMIIREG:
4191 case SIOCSMIIREG:
4192 return e1000_mii_ioctl(netdev, ifr, cmd);
4193 default:
4194 return -EOPNOTSUPP;
4195 }
4196}
4197
4198/**
4199 * e1000_mii_ioctl -
4200 * @netdev:
4201 * @ifreq:
4202 * @cmd:
4203 **/
4204
4205static int
4206e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4207{
60490fe0 4208 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4209 struct mii_ioctl_data *data = if_mii(ifr);
4210 int retval;
4211 uint16_t mii_reg;
4212 uint16_t spddplx;
97876fc6 4213 unsigned long flags;
1da177e4 4214
96838a40 4215 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4216 return -EOPNOTSUPP;
4217
4218 switch (cmd) {
4219 case SIOCGMIIPHY:
4220 data->phy_id = adapter->hw.phy_addr;
4221 break;
4222 case SIOCGMIIREG:
96838a40 4223 if (!capable(CAP_NET_ADMIN))
1da177e4 4224 return -EPERM;
97876fc6 4225 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4226 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4227 &data->val_out)) {
4228 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4229 return -EIO;
97876fc6
MC		 4230 }
4231 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4232 break;
4233 case SIOCSMIIREG:
96838a40 4234 if (!capable(CAP_NET_ADMIN))
1da177e4 4235 return -EPERM;
96838a40 4236 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4237 return -EFAULT;
4238 mii_reg = data->val_in;
97876fc6 4239 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4240 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4241 mii_reg)) {
4242 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4243 return -EIO;
97876fc6 4244 }
96838a40 4245 if (adapter->hw.phy_type == e1000_phy_m88) {
1da177e4
LT		 4246 switch (data->reg_num) {
4247 case PHY_CTRL:
96838a40 4248 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4249 break;
96838a40 4250 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4251 adapter->hw.autoneg = 1;
4252 adapter->hw.autoneg_advertised = 0x2F;
4253 } else {
4254 if (mii_reg & 0x40)
4255 spddplx = SPEED_1000;
4256 else if (mii_reg & 0x2000)
4257 spddplx = SPEED_100;
4258 else
4259 spddplx = SPEED_10;
4260 spddplx += (mii_reg & 0x100)
4261 ? FULL_DUPLEX :
4262 HALF_DUPLEX;
4263 retval = e1000_set_spd_dplx(adapter,
4264 spddplx);
96838a40 4265 if (retval) {
97876fc6 4266 spin_unlock_irqrestore(
96838a40 4267 &adapter->stats_lock,
97876fc6 4268 flags);
1da177e4 4269 return retval;
97876fc6 4270 }
1da177e4 4271 }
96838a40 4272 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4273 e1000_down(adapter);
4274 e1000_up(adapter);
4275 } else
4276 e1000_reset(adapter);
4277 break;
4278 case M88E1000_PHY_SPEC_CTRL:
4279 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4280 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4281 spin_unlock_irqrestore(
4282 &adapter->stats_lock, flags);
1da177e4 4283 return -EIO;
97876fc6 4284 }
1da177e4
LT		 4285 break;
4286 }
4287 } else {
4288 switch (data->reg_num) {
4289 case PHY_CTRL:
96838a40 4290 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4291 break;
96838a40 4292 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4293 e1000_down(adapter);
4294 e1000_up(adapter);
4295 } else
4296 e1000_reset(adapter);
4297 break;
4298 }
4299 }
97876fc6 4300 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4301 break;
4302 default:
4303 return -EOPNOTSUPP;
4304 }
4305 return E1000_SUCCESS;
4306}
4307
4308void
4309e1000_pci_set_mwi(struct e1000_hw *hw)
4310{
4311 struct e1000_adapter *adapter = hw->back;
2648345f 4312 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4313
96838a40 4314 if (ret_val)
2648345f 4315 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4316}
4317
4318void
4319e1000_pci_clear_mwi(struct e1000_hw *hw)
4320{
4321 struct e1000_adapter *adapter = hw->back;
4322
4323 pci_clear_mwi(adapter->pdev);
4324}
4325
4326void
4327e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4328{
4329 struct e1000_adapter *adapter = hw->back;
4330
4331 pci_read_config_word(adapter->pdev, reg, value);
4332}
4333
4334void
4335e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4336{
4337 struct e1000_adapter *adapter = hw->back;
4338
4339 pci_write_config_word(adapter->pdev, reg, *value);
4340}
4341
4342uint32_t
4343e1000_io_read(struct e1000_hw *hw, unsigned long port)
4344{
4345 return inl(port);
4346}
4347
4348void
4349e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4350{
4351 outl(value, port);
4352}
4353
4354static void
4355e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4356{
60490fe0 4357 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4358 uint32_t ctrl, rctl;
4359
4360 e1000_irq_disable(adapter);
4361 adapter->vlgrp = grp;
4362
96838a40 4363 if (grp) {
1da177e4
LT		 4364 /* enable VLAN tag insert/strip */
4365 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4366 ctrl |= E1000_CTRL_VME;
4367 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4368
4369 /* enable VLAN receive filtering */
4370 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4371 rctl |= E1000_RCTL_VFE;
4372 rctl &= ~E1000_RCTL_CFIEN;
4373 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4374 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4375 } else {
4376 /* disable VLAN tag insert/strip */
4377 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4378 ctrl &= ~E1000_CTRL_VME;
4379 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4380
4381 /* disable VLAN filtering */
4382 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4383 rctl &= ~E1000_RCTL_VFE;
4384 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4385 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4386 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4387 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4388 }
1da177e4
LT		 4389 }
4390
4391 e1000_irq_enable(adapter);
4392}
4393
4394static void
4395e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4396{
60490fe0 4397 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4398 uint32_t vfta, index;
96838a40
JB		 4399
4400 if ((adapter->hw.mng_cookie.status &
4401 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4402 (vid == adapter->mng_vlan_id))
2d7edb92 4403 return;
1da177e4
LT		 4404 /* add VID to filter table */
4405 index = (vid >> 5) & 0x7F;
4406 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4407 vfta |= (1 << (vid & 0x1F));
4408 e1000_write_vfta(&adapter->hw, index, vfta);
4409}
4410
4411static void
4412e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4413{
60490fe0 4414 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4415 uint32_t vfta, index;
4416
4417 e1000_irq_disable(adapter);
4418
96838a40 4419 if (adapter->vlgrp)
1da177e4
LT		 4420 adapter->vlgrp->vlan_devices[vid] = NULL;
4421
4422 e1000_irq_enable(adapter);
4423
96838a40
JB		 4424 if ((adapter->hw.mng_cookie.status &
4425 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4426 (vid == adapter->mng_vlan_id)) {
4427 /* release control to f/w */
4428 e1000_release_hw_control(adapter);
2d7edb92 4429 return;
ff147013
JK		 4430 }
4431
1da177e4
LT		 4432 /* remove VID from filter table */
4433 index = (vid >> 5) & 0x7F;
4434 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4435 vfta &= ~(1 << (vid & 0x1F));
4436 e1000_write_vfta(&adapter->hw, index, vfta);
4437}
4438
4439static void
4440e1000_restore_vlan(struct e1000_adapter *adapter)
4441{
4442 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4443
96838a40 4444 if (adapter->vlgrp) {
1da177e4 4445 uint16_t vid;
96838a40
JB		 4446 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4447 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4448 continue;
4449 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4450 }
4451 }
4452}
4453
4454int
4455e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4456{
4457 adapter->hw.autoneg = 0;
4458
6921368f 4459 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4460 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4461 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4462 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4463 return -EINVAL;
4464 }
4465
96838a40 4466 switch (spddplx) {
1da177e4
LT		 4467 case SPEED_10 + DUPLEX_HALF:
4468 adapter->hw.forced_speed_duplex = e1000_10_half;
4469 break;
4470 case SPEED_10 + DUPLEX_FULL:
4471 adapter->hw.forced_speed_duplex = e1000_10_full;
4472 break;
4473 case SPEED_100 + DUPLEX_HALF:
4474 adapter->hw.forced_speed_duplex = e1000_100_half;
4475 break;
4476 case SPEED_100 + DUPLEX_FULL:
4477 adapter->hw.forced_speed_duplex = e1000_100_full;
4478 break;
4479 case SPEED_1000 + DUPLEX_FULL:
4480 adapter->hw.autoneg = 1;
4481 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4482 break;
4483 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4484 default:
2648345f 4485 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4486 return -EINVAL;
4487 }
4488 return 0;
4489}
4490
b6a1d5f8 4491#ifdef CONFIG_PM
2f82665f
JB		 4492/* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
4493 * space versus the 64 bytes that pci_[save|restore]_state handle
4494 */
4495#define PCIE_CONFIG_SPACE_LEN 256
4496#define PCI_CONFIG_SPACE_LEN 64
4497static int
4498e1000_pci_save_state(struct e1000_adapter *adapter)
4499{
4500 struct pci_dev *dev = adapter->pdev;
4501 int size;
4502 int i;
4503 if (adapter->hw.mac_type >= e1000_82571)
4504 size = PCIE_CONFIG_SPACE_LEN;
4505 else
4506 size = PCI_CONFIG_SPACE_LEN;
4507
4508 WARN_ON(adapter->config_space != NULL);
4509
4510 adapter->config_space = kmalloc(size, GFP_KERNEL);
4511 if (!adapter->config_space) {
4512 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4513 return -ENOMEM;
4514 }
4515 for (i = 0; i < (size / 4); i++)
4516 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4517 return 0;
4518}
4519
4520static void
4521e1000_pci_restore_state(struct e1000_adapter *adapter)
4522{
4523 struct pci_dev *dev = adapter->pdev;
4524 int size;
4525 int i;
4526 if (adapter->config_space == NULL)
4527 return;
4528 if (adapter->hw.mac_type >= e1000_82571)
4529 size = PCIE_CONFIG_SPACE_LEN;
4530 else
4531 size = PCI_CONFIG_SPACE_LEN;
4532 for (i = 0; i < (size / 4); i++)
4533 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4534 kfree(adapter->config_space);
4535 adapter->config_space = NULL;
4536 return;
4537}
4538#endif /* CONFIG_PM */
4539
1da177e4 4540static int
829ca9a3 4541e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4542{
4543 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4544 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4545 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4546 uint32_t wufc = adapter->wol;
240b1710 4547 int retval = 0;
1da177e4
LT		 4548
4549 netif_device_detach(netdev);
4550
96838a40 4551 if (netif_running(netdev))
1da177e4
LT		 4552 e1000_down(adapter);
4553
2f82665f
JB		 4554#ifdef CONFIG_PM
4555 /* implement our own version of pci_save_state(pdev) because pci
4556 * express adapters have larger 256 byte config spaces */
4557 retval = e1000_pci_save_state(adapter);
4558 if (retval)
4559 return retval;
4560#endif
4561
1da177e4 4562 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4563 if (status & E1000_STATUS_LU)
1da177e4
LT		 4564 wufc &= ~E1000_WUFC_LNKC;
4565
96838a40 4566 if (wufc) {
1da177e4
LT		 4567 e1000_setup_rctl(adapter);
4568 e1000_set_multi(netdev);
4569
4570 /* turn on all-multi mode if wake on multicast is enabled */
96838a40 4571 if (adapter->wol & E1000_WUFC_MC) {
1da177e4
LT		 4572 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4573 rctl |= E1000_RCTL_MPE;
4574 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4575 }
4576
96838a40 4577 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4578 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4579 /* advertise wake from D3Cold */
4580 #define E1000_CTRL_ADVD3WUC 0x00100000
4581 /* phy power management enable */
4582 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4583 ctrl |= E1000_CTRL_ADVD3WUC |
4584 E1000_CTRL_EN_PHY_PWR_MGMT;
4585 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4586 }
4587
96838a40 4588 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4589 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4590 /* keep the laser running in D3 */
4591 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4592 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4593 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4594 }
4595
2d7edb92
MC		 4596 /* Allow time for pending master requests to run */
4597 e1000_disable_pciex_master(&adapter->hw);
4598
1da177e4
LT		 4599 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4600 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
240b1710
JK		 4601 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4602 if (retval)
4603 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4604 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4605 if (retval)
4606 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4607 } else {
4608 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4609 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
240b1710
JK		 4610 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4611 if (retval)
4612 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4613 retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
4614 if (retval)
4615 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4616 }
4617
96838a40 4618 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4619 adapter->hw.media_type == e1000_media_type_copper) {
4620 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4621 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4622 manc |= E1000_MANC_ARP_EN;
4623 E1000_WRITE_REG(&adapter->hw, MANC, manc);
240b1710
JK		 4624 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4625 if (retval)
4626 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4627 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4628 if (retval)
4629 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4630 }
4631 }
4632
b55ccb35
JK		 4633 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4634 * would have already happened in close and is redundant. */
4635 e1000_release_hw_control(adapter);
2d7edb92 4636
1da177e4 4637 pci_disable_device(pdev);
240b1710
JK		 4638
4639 retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
4640 if (retval)
4641 DPRINTK(PROBE, ERR, "Error in setting power state\n");
1da177e4
LT		 4642
4643 return 0;
4644}
4645
2f82665f 4646#ifdef CONFIG_PM
1da177e4
LT		 4647static int
4648e1000_resume(struct pci_dev *pdev)
4649{
4650 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4651 struct e1000_adapter *adapter = netdev_priv(netdev);
240b1710 4652 int retval;
b55ccb35 4653 uint32_t manc, ret_val;
1da177e4 4654
240b1710
JK		 4655 retval = pci_set_power_state(pdev, PCI_D0);
4656 if (retval)
4657 DPRINTK(PROBE, ERR, "Error in setting power state\n");
2f82665f 4658 e1000_pci_restore_state(adapter);
2b02893e 4659 ret_val = pci_enable_device(pdev);
a4cb847d 4660 pci_set_master(pdev);
1da177e4 4661
240b1710
JK		 4662 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4663 if (retval)
4664 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4665 retval = pci_enable_wake(pdev, PCI_D3cold, 0);
4666 if (retval)
4667 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4668
4669 e1000_reset(adapter);
4670 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4671
96838a40 4672 if (netif_running(netdev))
1da177e4
LT		 4673 e1000_up(adapter);
4674
4675 netif_device_attach(netdev);
4676
96838a40 4677 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4678 adapter->hw.media_type == e1000_media_type_copper) {
4679 manc = E1000_READ_REG(&adapter->hw, MANC);
4680 manc &= ~(E1000_MANC_ARP_EN);
4681 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4682 }
4683
b55ccb35
JK		 4684 /* If the controller is 82573 and f/w is AMT, do not set
4685 * DRV_LOAD until the interface is up. For all other cases,
4686 * let the f/w know that the h/w is now under the control
4687 * of the driver. */
4688 if (adapter->hw.mac_type != e1000_82573 ||
4689 !e1000_check_mng_mode(&adapter->hw))
4690 e1000_get_hw_control(adapter);
2d7edb92 4691
1da177e4
LT		 4692 return 0;
4693}
4694#endif
1da177e4
LT		 4695#ifdef CONFIG_NET_POLL_CONTROLLER
4696/*
4697 * Polling 'interrupt' - used by things like netconsole to send skbs
4698 * without having to re-enable interrupts. It's not called while
4699 * the interrupt routine is executing.
4700 */
4701static void
2648345f 4702e1000_netpoll(struct net_device *netdev)
1da177e4 4703{
60490fe0 4704 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4705 disable_irq(adapter->pdev->irq);
4706 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4707 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4708#ifndef CONFIG_E1000_NAPI
4709 adapter->clean_rx(adapter, adapter->rx_ring);
4710#endif
1da177e4
LT		 4711 enable_irq(adapter->pdev->irq);
4712}
4713#endif
4714
4715/* e1000_main.c */
Linux kernel - Deliverables
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