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e1000: add ich8lan core functions
[deliverable/linux.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
3
3d41e30a 4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
3d41e30a 25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27
28*******************************************************************************/
29
30#include "e1000.h"
31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 34#ifndef CONFIG_E1000_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
440c052d 39#define DRV_VERSION "7.0.38-k4"DRIVERNAPI
1da177e4 40char e1000_driver_version[] = DRV_VERSION;
3d41e30a 41static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 76 INTEL_E1000_ETHERNET_DEVICE(0x105E),
77 INTEL_E1000_ETHERNET_DEVICE(0x105F),
78 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 79 INTEL_E1000_ETHERNET_DEVICE(0x1075),
80 INTEL_E1000_ETHERNET_DEVICE(0x1076),
81 INTEL_E1000_ETHERNET_DEVICE(0x1077),
82 INTEL_E1000_ETHERNET_DEVICE(0x1078),
83 INTEL_E1000_ETHERNET_DEVICE(0x1079),
84 INTEL_E1000_ETHERNET_DEVICE(0x107A),
85 INTEL_E1000_ETHERNET_DEVICE(0x107B),
86 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 87 INTEL_E1000_ETHERNET_DEVICE(0x107D),
88 INTEL_E1000_ETHERNET_DEVICE(0x107E),
89 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 90 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 91 INTEL_E1000_ETHERNET_DEVICE(0x108B),
92 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 93 INTEL_E1000_ETHERNET_DEVICE(0x1096),
94 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 95 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 96 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 97 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 98 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
1da177e4
LT		 99 /* required last entry */
100 {0,}
101};
102
103MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
104
3ad2cc67 105static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 106 struct e1000_tx_ring *txdr);
3ad2cc67 107static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 108 struct e1000_rx_ring *rxdr);
3ad2cc67 109static void e1000_free_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 110 struct e1000_tx_ring *tx_ring);
3ad2cc67 111static void e1000_free_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 112 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 113
114/* Local Function Prototypes */
115
116static int e1000_init_module(void);
117static void e1000_exit_module(void);
118static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
119static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 120static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 121static int e1000_sw_init(struct e1000_adapter *adapter);
122static int e1000_open(struct net_device *netdev);
123static int e1000_close(struct net_device *netdev);
124static void e1000_configure_tx(struct e1000_adapter *adapter);
125static void e1000_configure_rx(struct e1000_adapter *adapter);
126static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 127static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
128static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
129static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 133static void e1000_set_multi(struct net_device *netdev);
134static void e1000_update_phy_info(unsigned long data);
135static void e1000_watchdog(unsigned long data);
1da177e4
LT		 136static void e1000_82547_tx_fifo_stall(unsigned long data);
137static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
138static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
139static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
140static int e1000_set_mac(struct net_device *netdev, void *p);
141static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 142static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
143 struct e1000_tx_ring *tx_ring);
1da177e4 144#ifdef CONFIG_E1000_NAPI
581d708e 145static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 146static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 147 struct e1000_rx_ring *rx_ring,
1da177e4 148 int *work_done, int work_to_do);
2d7edb92 149static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 150 struct e1000_rx_ring *rx_ring,
2d7edb92 151 int *work_done, int work_to_do);
1da177e4 152#else
581d708e
MC		 153static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
154 struct e1000_rx_ring *rx_ring);
155static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
156 struct e1000_rx_ring *rx_ring);
1da177e4 157#endif
581d708e 158static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 159 struct e1000_rx_ring *rx_ring,
160 int cleaned_count);
581d708e 161static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 162 struct e1000_rx_ring *rx_ring,
163 int cleaned_count);
1da177e4
LT		 164static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
165static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
166 int cmd);
1da177e4
LT		 167static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
168static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
169static void e1000_tx_timeout(struct net_device *dev);
87041639 170static void e1000_reset_task(struct net_device *dev);
1da177e4 171static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 172static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
173 struct sk_buff *skb);
1da177e4
LT		 174
175static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
176static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
177static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
178static void e1000_restore_vlan(struct e1000_adapter *adapter);
179
977e74b5 180static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 181#ifdef CONFIG_PM
1da177e4
LT		 182static int e1000_resume(struct pci_dev *pdev);
183#endif
c653e635 184static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 185
186#ifdef CONFIG_NET_POLL_CONTROLLER
187/* for netdump / net console */
188static void e1000_netpoll (struct net_device *netdev);
189#endif
190
9026729b
AK		 191static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
192 pci_channel_state_t state);
193static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
194static void e1000_io_resume(struct pci_dev *pdev);
195
196static struct pci_error_handlers e1000_err_handler = {
197 .error_detected = e1000_io_error_detected,
198 .slot_reset = e1000_io_slot_reset,
199 .resume = e1000_io_resume,
200};
24025e4e 201
1da177e4
LT		 202static struct pci_driver e1000_driver = {
203 .name = e1000_driver_name,
204 .id_table = e1000_pci_tbl,
205 .probe = e1000_probe,
206 .remove = __devexit_p(e1000_remove),
207 /* Power Managment Hooks */
1da177e4 208 .suspend = e1000_suspend,
6fdfef16 209#ifdef CONFIG_PM
c653e635 210 .resume = e1000_resume,
1da177e4 211#endif
9026729b
AK		 212 .shutdown = e1000_shutdown,
213 .err_handler = &e1000_err_handler
1da177e4
LT		 214};
215
216MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
217MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
218MODULE_LICENSE("GPL");
219MODULE_VERSION(DRV_VERSION);
220
221static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
222module_param(debug, int, 0);
223MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
224
225/**
226 * e1000_init_module - Driver Registration Routine
227 *
228 * e1000_init_module is the first routine called when the driver is
229 * loaded. All it does is register with the PCI subsystem.
230 **/
231
232static int __init
233e1000_init_module(void)
234{
235 int ret;
236 printk(KERN_INFO "%s - version %s\n",
237 e1000_driver_string, e1000_driver_version);
238
239 printk(KERN_INFO "%s\n", e1000_copyright);
240
241 ret = pci_module_init(&e1000_driver);
8b378def 242
1da177e4
LT		 243 return ret;
244}
245
246module_init(e1000_init_module);
247
248/**
249 * e1000_exit_module - Driver Exit Cleanup Routine
250 *
251 * e1000_exit_module is called just before the driver is removed
252 * from memory.
253 **/
254
255static void __exit
256e1000_exit_module(void)
257{
1da177e4
LT		 258 pci_unregister_driver(&e1000_driver);
259}
260
261module_exit(e1000_exit_module);
262
2db10a08
AK		 263static int e1000_request_irq(struct e1000_adapter *adapter)
264{
265 struct net_device *netdev = adapter->netdev;
266 int flags, err = 0;
267
268 flags = SA_SHIRQ | SA_SAMPLE_RANDOM;
269#ifdef CONFIG_PCI_MSI
270 if (adapter->hw.mac_type > e1000_82547_rev_2) {
271 adapter->have_msi = TRUE;
272 if ((err = pci_enable_msi(adapter->pdev))) {
273 DPRINTK(PROBE, ERR,
274 "Unable to allocate MSI interrupt Error: %d\n", err);
275 adapter->have_msi = FALSE;
276 }
277 }
278 if (adapter->have_msi)
279 flags &= ~SA_SHIRQ;
280#endif
281 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
282 netdev->name, netdev)))
283 DPRINTK(PROBE, ERR,
284 "Unable to allocate interrupt Error: %d\n", err);
285
286 return err;
287}
288
289static void e1000_free_irq(struct e1000_adapter *adapter)
290{
291 struct net_device *netdev = adapter->netdev;
292
293 free_irq(adapter->pdev->irq, netdev);
294
295#ifdef CONFIG_PCI_MSI
296 if (adapter->have_msi)
297 pci_disable_msi(adapter->pdev);
298#endif
299}
300
1da177e4
LT		 301/**
302 * e1000_irq_disable - Mask off interrupt generation on the NIC
303 * @adapter: board private structure
304 **/
305
e619d523 306static void
1da177e4
LT		 307e1000_irq_disable(struct e1000_adapter *adapter)
308{
309 atomic_inc(&adapter->irq_sem);
310 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
311 E1000_WRITE_FLUSH(&adapter->hw);
312 synchronize_irq(adapter->pdev->irq);
313}
314
315/**
316 * e1000_irq_enable - Enable default interrupt generation settings
317 * @adapter: board private structure
318 **/
319
e619d523 320static void
1da177e4
LT		 321e1000_irq_enable(struct e1000_adapter *adapter)
322{
96838a40 323 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 324 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
325 E1000_WRITE_FLUSH(&adapter->hw);
326 }
327}
3ad2cc67
AB		 328
329static void
2d7edb92
MC		 330e1000_update_mng_vlan(struct e1000_adapter *adapter)
331{
332 struct net_device *netdev = adapter->netdev;
333 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
334 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 335 if (adapter->vlgrp) {
336 if (!adapter->vlgrp->vlan_devices[vid]) {
337 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 338 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
339 e1000_vlan_rx_add_vid(netdev, vid);
340 adapter->mng_vlan_id = vid;
341 } else
342 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 343
344 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
345 (vid != old_vid) &&
2d7edb92
MC		 346 !adapter->vlgrp->vlan_devices[old_vid])
347 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 348 } else
349 adapter->mng_vlan_id = vid;
2d7edb92
MC		 350 }
351}
b55ccb35
JK		 352
353/**
354 * e1000_release_hw_control - release control of the h/w to f/w
355 * @adapter: address of board private structure
356 *
357 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
358 * For ASF and Pass Through versions of f/w this means that the
359 * driver is no longer loaded. For AMT version (only with 82573) i
360 * of the f/w this means that the netowrk i/f is closed.
76c224bc 361 *
b55ccb35
JK		 362 **/
363
e619d523 364static void
b55ccb35
JK		 365e1000_release_hw_control(struct e1000_adapter *adapter)
366{
367 uint32_t ctrl_ext;
368 uint32_t swsm;
369
370 /* Let firmware taken over control of h/w */
371 switch (adapter->hw.mac_type) {
372 case e1000_82571:
373 case e1000_82572:
4cc15f54 374 case e1000_80003es2lan:
b55ccb35
JK		 375 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
376 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
377 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
378 break;
379 case e1000_82573:
380 swsm = E1000_READ_REG(&adapter->hw, SWSM);
381 E1000_WRITE_REG(&adapter->hw, SWSM,
382 swsm & ~E1000_SWSM_DRV_LOAD);
383 default:
384 break;
385 }
386}
387
388/**
389 * e1000_get_hw_control - get control of the h/w from f/w
390 * @adapter: address of board private structure
391 *
392 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 393 * For ASF and Pass Through versions of f/w this means that
394 * the driver is loaded. For AMT version (only with 82573)
b55ccb35 395 * of the f/w this means that the netowrk i/f is open.
76c224bc 396 *
b55ccb35
JK		 397 **/
398
e619d523 399static void
b55ccb35
JK		 400e1000_get_hw_control(struct e1000_adapter *adapter)
401{
402 uint32_t ctrl_ext;
403 uint32_t swsm;
404 /* Let firmware know the driver has taken over */
405 switch (adapter->hw.mac_type) {
406 case e1000_82571:
407 case e1000_82572:
4cc15f54 408 case e1000_80003es2lan:
b55ccb35
JK		 409 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
410 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
411 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
412 break;
413 case e1000_82573:
414 swsm = E1000_READ_REG(&adapter->hw, SWSM);
415 E1000_WRITE_REG(&adapter->hw, SWSM,
416 swsm | E1000_SWSM_DRV_LOAD);
417 break;
418 default:
419 break;
420 }
421}
422
1da177e4
LT		 423int
424e1000_up(struct e1000_adapter *adapter)
425{
426 struct net_device *netdev = adapter->netdev;
2db10a08 427 int i;
1da177e4
LT		 428
429 /* hardware has been reset, we need to reload some things */
430
1da177e4
LT		 431 e1000_set_multi(netdev);
432
433 e1000_restore_vlan(adapter);
434
435 e1000_configure_tx(adapter);
436 e1000_setup_rctl(adapter);
437 e1000_configure_rx(adapter);
72d64a43
JK		 438 /* call E1000_DESC_UNUSED which always leaves
439 * at least 1 descriptor unused to make sure
440 * next_to_use != next_to_clean */
f56799ea 441 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 442 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 443 adapter->alloc_rx_buf(adapter, ring,
444 E1000_DESC_UNUSED(ring));
f56799ea 445 }
1da177e4 446
7bfa4816
JK		 447 adapter->tx_queue_len = netdev->tx_queue_len;
448
1da177e4 449 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 450
451#ifdef CONFIG_E1000_NAPI
452 netif_poll_enable(netdev);
453#endif
5de55624
MC		 454 e1000_irq_enable(adapter);
455
1da177e4
LT		 456 return 0;
457}
458
79f05bf0
AK		 459/**
460 * e1000_power_up_phy - restore link in case the phy was powered down
461 * @adapter: address of board private structure
462 *
463 * The phy may be powered down to save power and turn off link when the
464 * driver is unloaded and wake on lan is not enabled (among others)
465 * *** this routine MUST be followed by a call to e1000_reset ***
466 *
467 **/
468
469static void e1000_power_up_phy(struct e1000_adapter *adapter)
470{
471 uint16_t mii_reg = 0;
472
473 /* Just clear the power down bit to wake the phy back up */
474 if (adapter->hw.media_type == e1000_media_type_copper) {
475 /* according to the manual, the phy will retain its
476 * settings across a power-down/up cycle */
477 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
478 mii_reg &= ~MII_CR_POWER_DOWN;
479 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
480 }
481}
482
483static void e1000_power_down_phy(struct e1000_adapter *adapter)
484{
485 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
486 e1000_check_mng_mode(&adapter->hw);
487 /* Power down the PHY so no link is implied when interface is down
488 * The PHY cannot be powered down if any of the following is TRUE
489 * (a) WoL is enabled
490 * (b) AMT is active
491 * (c) SoL/IDER session is active */
492 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
493 adapter->hw.media_type == e1000_media_type_copper &&
494 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
495 !mng_mode_enabled &&
496 !e1000_check_phy_reset_block(&adapter->hw)) {
497 uint16_t mii_reg = 0;
498 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
499 mii_reg |= MII_CR_POWER_DOWN;
500 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
501 mdelay(1);
502 }
503}
504
1da177e4
LT		 505void
506e1000_down(struct e1000_adapter *adapter)
507{
508 struct net_device *netdev = adapter->netdev;
509
510 e1000_irq_disable(adapter);
c1605eb3 511
1da177e4
LT		 512 del_timer_sync(&adapter->tx_fifo_stall_timer);
513 del_timer_sync(&adapter->watchdog_timer);
514 del_timer_sync(&adapter->phy_info_timer);
515
516#ifdef CONFIG_E1000_NAPI
517 netif_poll_disable(netdev);
518#endif
7bfa4816 519 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 520 adapter->link_speed = 0;
521 adapter->link_duplex = 0;
522 netif_carrier_off(netdev);
523 netif_stop_queue(netdev);
524
525 e1000_reset(adapter);
581d708e
MC		 526 e1000_clean_all_tx_rings(adapter);
527 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 528}
529
2db10a08
AK		 530void
531e1000_reinit_locked(struct e1000_adapter *adapter)
532{
533 WARN_ON(in_interrupt());
534 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
535 msleep(1);
536 e1000_down(adapter);
537 e1000_up(adapter);
538 clear_bit(__E1000_RESETTING, &adapter->flags);
539}
540
1da177e4
LT		 541void
542e1000_reset(struct e1000_adapter *adapter)
543{
2d7edb92 544 uint32_t pba, manc;
1125ecbc 545 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 546
547 /* Repartition Pba for greater than 9k mtu
548 * To take effect CTRL.RST is required.
549 */
550
2d7edb92
MC		 551 switch (adapter->hw.mac_type) {
552 case e1000_82547:
0e6ef3e0 553 case e1000_82547_rev_2:
2d7edb92
MC		 554 pba = E1000_PBA_30K;
555 break;
868d5309
MC		 556 case e1000_82571:
557 case e1000_82572:
6418ecc6 558 case e1000_80003es2lan:
868d5309
MC		 559 pba = E1000_PBA_38K;
560 break;
2d7edb92
MC		 561 case e1000_82573:
562 pba = E1000_PBA_12K;
563 break;
564 default:
565 pba = E1000_PBA_48K;
566 break;
567 }
568
96838a40 569 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 570 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 571 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 572
573
96838a40 574 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 575 adapter->tx_fifo_head = 0;
576 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
577 adapter->tx_fifo_size =
578 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
579 atomic_set(&adapter->tx_fifo_stall, 0);
580 }
2d7edb92 581
1da177e4
LT		 582 E1000_WRITE_REG(&adapter->hw, PBA, pba);
583
584 /* flow control settings */
f11b7f85
JK		 585 /* Set the FC high water mark to 90% of the FIFO size.
586 * Required to clear last 3 LSB */
587 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
588
589 adapter->hw.fc_high_water = fc_high_water_mark;
590 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 591 if (adapter->hw.mac_type == e1000_80003es2lan)
592 adapter->hw.fc_pause_time = 0xFFFF;
593 else
594 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 595 adapter->hw.fc_send_xon = 1;
596 adapter->hw.fc = adapter->hw.original_fc;
597
2d7edb92 598 /* Allow time for pending master requests to run */
1da177e4 599 e1000_reset_hw(&adapter->hw);
96838a40 600 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 601 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 602 if (e1000_init_hw(&adapter->hw))
1da177e4 603 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 604 e1000_update_mng_vlan(adapter);
1da177e4
LT		 605 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
606 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
607
608 e1000_reset_adaptive(&adapter->hw);
609 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 610
611 if (!adapter->smart_power_down &&
612 (adapter->hw.mac_type == e1000_82571 ||
613 adapter->hw.mac_type == e1000_82572)) {
614 uint16_t phy_data = 0;
615 /* speed up time to link by disabling smart power down, ignore
616 * the return value of this function because there is nothing
617 * different we would do if it failed */
618 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
619 &phy_data);
620 phy_data &= ~IGP02E1000_PM_SPD;
621 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
622 phy_data);
623 }
624
2d7edb92
MC		 625 if (adapter->en_mng_pt) {
626 manc = E1000_READ_REG(&adapter->hw, MANC);
627 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
628 E1000_WRITE_REG(&adapter->hw, MANC, manc);
629 }
1da177e4
LT		 630}
631
632/**
633 * e1000_probe - Device Initialization Routine
634 * @pdev: PCI device information struct
635 * @ent: entry in e1000_pci_tbl
636 *
637 * Returns 0 on success, negative on failure
638 *
639 * e1000_probe initializes an adapter identified by a pci_dev structure.
640 * The OS initialization, configuring of the adapter private structure,
641 * and a hardware reset occur.
642 **/
643
644static int __devinit
645e1000_probe(struct pci_dev *pdev,
646 const struct pci_device_id *ent)
647{
648 struct net_device *netdev;
649 struct e1000_adapter *adapter;
2d7edb92 650 unsigned long mmio_start, mmio_len;
2d7edb92 651
1da177e4 652 static int cards_found = 0;
84916829 653 static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
2d7edb92 654 int i, err, pci_using_dac;
1da177e4
LT		 655 uint16_t eeprom_data;
656 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 657 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 658 return err;
659
96838a40 660 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 661 pci_using_dac = 1;
662 } else {
96838a40 663 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4
LT		 664 E1000_ERR("No usable DMA configuration, aborting\n");
665 return err;
666 }
667 pci_using_dac = 0;
668 }
669
96838a40 670 if ((err = pci_request_regions(pdev, e1000_driver_name)))
1da177e4
LT		 671 return err;
672
673 pci_set_master(pdev);
674
675 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
96838a40 676 if (!netdev) {
1da177e4
LT		 677 err = -ENOMEM;
678 goto err_alloc_etherdev;
679 }
680
681 SET_MODULE_OWNER(netdev);
682 SET_NETDEV_DEV(netdev, &pdev->dev);
683
684 pci_set_drvdata(pdev, netdev);
60490fe0 685 adapter = netdev_priv(netdev);
1da177e4
LT		 686 adapter->netdev = netdev;
687 adapter->pdev = pdev;
688 adapter->hw.back = adapter;
689 adapter->msg_enable = (1 << debug) - 1;
690
691 mmio_start = pci_resource_start(pdev, BAR_0);
692 mmio_len = pci_resource_len(pdev, BAR_0);
693
694 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
96838a40 695 if (!adapter->hw.hw_addr) {
1da177e4
LT		 696 err = -EIO;
697 goto err_ioremap;
698 }
699
96838a40
JB		 700 for (i = BAR_1; i <= BAR_5; i++) {
701 if (pci_resource_len(pdev, i) == 0)
1da177e4 702 continue;
96838a40 703 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 704 adapter->hw.io_base = pci_resource_start(pdev, i);
705 break;
706 }
707 }
708
709 netdev->open = &e1000_open;
710 netdev->stop = &e1000_close;
711 netdev->hard_start_xmit = &e1000_xmit_frame;
712 netdev->get_stats = &e1000_get_stats;
713 netdev->set_multicast_list = &e1000_set_multi;
714 netdev->set_mac_address = &e1000_set_mac;
715 netdev->change_mtu = &e1000_change_mtu;
716 netdev->do_ioctl = &e1000_ioctl;
717 e1000_set_ethtool_ops(netdev);
718 netdev->tx_timeout = &e1000_tx_timeout;
719 netdev->watchdog_timeo = 5 * HZ;
720#ifdef CONFIG_E1000_NAPI
721 netdev->poll = &e1000_clean;
722 netdev->weight = 64;
723#endif
724 netdev->vlan_rx_register = e1000_vlan_rx_register;
725 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
726 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
727#ifdef CONFIG_NET_POLL_CONTROLLER
728 netdev->poll_controller = e1000_netpoll;
729#endif
730 strcpy(netdev->name, pci_name(pdev));
731
732 netdev->mem_start = mmio_start;
733 netdev->mem_end = mmio_start + mmio_len;
734 netdev->base_addr = adapter->hw.io_base;
735
736 adapter->bd_number = cards_found;
737
738 /* setup the private structure */
739
96838a40 740 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 741 goto err_sw_init;
742
96838a40 743 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
2d7edb92
MC		 744 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
745
84916829 746 /* if ksp3, indicate if it's port a being setup */
76c224bc
AK		 747 if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
748 e1000_ksp3_port_a == 0)
84916829
JK		 749 adapter->ksp3_port_a = 1;
750 e1000_ksp3_port_a++;
751 /* Reset for multiple KP3 adapters */
752 if (e1000_ksp3_port_a == 4)
753 e1000_ksp3_port_a = 0;
754
96838a40 755 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 756 netdev->features = NETIF_F_SG |
757 NETIF_F_HW_CSUM |
758 NETIF_F_HW_VLAN_TX |
759 NETIF_F_HW_VLAN_RX |
760 NETIF_F_HW_VLAN_FILTER;
761 }
762
763#ifdef NETIF_F_TSO
96838a40 764 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 765 (adapter->hw.mac_type != e1000_82547))
766 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 767
768#ifdef NETIF_F_TSO_IPV6
96838a40 769 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 770 netdev->features |= NETIF_F_TSO_IPV6;
771#endif
1da177e4 772#endif
96838a40 773 if (pci_using_dac)
1da177e4
LT		 774 netdev->features |= NETIF_F_HIGHDMA;
775
76c224bc
AK		 776 /* hard_start_xmit is safe against parallel locking */
777 netdev->features |= NETIF_F_LLTX;
778
2d7edb92
MC		 779 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
780
96838a40 781 /* before reading the EEPROM, reset the controller to
1da177e4 782 * put the device in a known good starting state */
96838a40 783
1da177e4
LT		 784 e1000_reset_hw(&adapter->hw);
785
786 /* make sure the EEPROM is good */
787
96838a40 788 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4
LT		 789 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
790 err = -EIO;
791 goto err_eeprom;
792 }
793
794 /* copy the MAC address out of the EEPROM */
795
96838a40 796 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 797 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
798 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 799 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 800
96838a40 801 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 802 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
803 err = -EIO;
804 goto err_eeprom;
805 }
806
807 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
808
809 e1000_get_bus_info(&adapter->hw);
810
811 init_timer(&adapter->tx_fifo_stall_timer);
812 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
813 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
814
815 init_timer(&adapter->watchdog_timer);
816 adapter->watchdog_timer.function = &e1000_watchdog;
817 adapter->watchdog_timer.data = (unsigned long) adapter;
818
1da177e4
LT		 819 init_timer(&adapter->phy_info_timer);
820 adapter->phy_info_timer.function = &e1000_update_phy_info;
821 adapter->phy_info_timer.data = (unsigned long) adapter;
822
87041639
JK		 823 INIT_WORK(&adapter->reset_task,
824 (void (*)(void *))e1000_reset_task, netdev);
1da177e4
LT		 825
826 /* we're going to reset, so assume we have no link for now */
827
828 netif_carrier_off(netdev);
829 netif_stop_queue(netdev);
830
831 e1000_check_options(adapter);
832
833 /* Initial Wake on LAN setting
834 * If APM wake is enabled in the EEPROM,
835 * enable the ACPI Magic Packet filter
836 */
837
96838a40 838 switch (adapter->hw.mac_type) {
1da177e4
LT		 839 case e1000_82542_rev2_0:
840 case e1000_82542_rev2_1:
841 case e1000_82543:
842 break;
843 case e1000_82544:
844 e1000_read_eeprom(&adapter->hw,
845 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
846 eeprom_apme_mask = E1000_EEPROM_82544_APM;
847 break;
848 case e1000_82546:
849 case e1000_82546_rev_3:
fd803241 850 case e1000_82571:
6418ecc6 851 case e1000_80003es2lan:
96838a40 852 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 853 e1000_read_eeprom(&adapter->hw,
854 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
855 break;
856 }
857 /* Fall Through */
858 default:
859 e1000_read_eeprom(&adapter->hw,
860 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
861 break;
862 }
96838a40 863 if (eeprom_data & eeprom_apme_mask)
1da177e4
LT		 864 adapter->wol |= E1000_WUFC_MAG;
865
fb3d47d4
JK		 866 /* print bus type/speed/width info */
867 {
868 struct e1000_hw *hw = &adapter->hw;
869 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
870 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
871 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
872 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
873 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
874 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
875 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
876 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
877 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
878 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
879 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
880 "32-bit"));
881 }
882
883 for (i = 0; i < 6; i++)
884 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
885
1da177e4
LT		 886 /* reset the hardware with the new settings */
887 e1000_reset(adapter);
888
b55ccb35
JK		 889 /* If the controller is 82573 and f/w is AMT, do not set
890 * DRV_LOAD until the interface is up. For all other cases,
891 * let the f/w know that the h/w is now under the control
892 * of the driver. */
893 if (adapter->hw.mac_type != e1000_82573 ||
894 !e1000_check_mng_mode(&adapter->hw))
895 e1000_get_hw_control(adapter);
2d7edb92 896
1da177e4 897 strcpy(netdev->name, "eth%d");
96838a40 898 if ((err = register_netdev(netdev)))
1da177e4
LT		 899 goto err_register;
900
901 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
902
903 cards_found++;
904 return 0;
905
906err_register:
907err_sw_init:
908err_eeprom:
909 iounmap(adapter->hw.hw_addr);
910err_ioremap:
911 free_netdev(netdev);
912err_alloc_etherdev:
913 pci_release_regions(pdev);
914 return err;
915}
916
917/**
918 * e1000_remove - Device Removal Routine
919 * @pdev: PCI device information struct
920 *
921 * e1000_remove is called by the PCI subsystem to alert the driver
922 * that it should release a PCI device. The could be caused by a
923 * Hot-Plug event, or because the driver is going to be removed from
924 * memory.
925 **/
926
927static void __devexit
928e1000_remove(struct pci_dev *pdev)
929{
930 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 931 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 932 uint32_t manc;
581d708e
MC		 933#ifdef CONFIG_E1000_NAPI
934 int i;
935#endif
1da177e4 936
be2b28ed
JG		 937 flush_scheduled_work();
938
96838a40 939 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 940 adapter->hw.media_type == e1000_media_type_copper) {
941 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 942 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 943 manc |= E1000_MANC_ARP_EN;
944 E1000_WRITE_REG(&adapter->hw, MANC, manc);
945 }
946 }
947
b55ccb35
JK		 948 /* Release control of h/w to f/w. If f/w is AMT enabled, this
949 * would have already happened in close and is redundant. */
950 e1000_release_hw_control(adapter);
2d7edb92 951
1da177e4 952 unregister_netdev(netdev);
581d708e 953#ifdef CONFIG_E1000_NAPI
f56799ea 954 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 955 dev_put(&adapter->polling_netdev[i]);
581d708e 956#endif
1da177e4 957
96838a40 958 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 959 e1000_phy_hw_reset(&adapter->hw);
1da177e4 960
24025e4e
MC		 961 kfree(adapter->tx_ring);
962 kfree(adapter->rx_ring);
963#ifdef CONFIG_E1000_NAPI
964 kfree(adapter->polling_netdev);
965#endif
966
1da177e4
LT		 967 iounmap(adapter->hw.hw_addr);
968 pci_release_regions(pdev);
969
970 free_netdev(netdev);
971
972 pci_disable_device(pdev);
973}
974
975/**
976 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
977 * @adapter: board private structure to initialize
978 *
979 * e1000_sw_init initializes the Adapter private data structure.
980 * Fields are initialized based on PCI device information and
981 * OS network device settings (MTU size).
982 **/
983
984static int __devinit
985e1000_sw_init(struct e1000_adapter *adapter)
986{
987 struct e1000_hw *hw = &adapter->hw;
988 struct net_device *netdev = adapter->netdev;
989 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 990#ifdef CONFIG_E1000_NAPI
991 int i;
992#endif
1da177e4
LT		 993
994 /* PCI config space info */
995
996 hw->vendor_id = pdev->vendor;
997 hw->device_id = pdev->device;
998 hw->subsystem_vendor_id = pdev->subsystem_vendor;
999 hw->subsystem_id = pdev->subsystem_device;
1000
1001 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1002
1003 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1004
9e2feace
AK		 1005 adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE;
1006 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1007 hw->max_frame_size = netdev->mtu +
1008 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1009 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1010
1011 /* identify the MAC */
1012
96838a40 1013 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1014 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1015 return -EIO;
1016 }
1017
1018 /* initialize eeprom parameters */
1019
96838a40 1020 if (e1000_init_eeprom_params(hw)) {
2d7edb92
MC		 1021 E1000_ERR("EEPROM initialization failed\n");
1022 return -EIO;
1023 }
1da177e4 1024
96838a40 1025 switch (hw->mac_type) {
1da177e4
LT		 1026 default:
1027 break;
1028 case e1000_82541:
1029 case e1000_82547:
1030 case e1000_82541_rev_2:
1031 case e1000_82547_rev_2:
1032 hw->phy_init_script = 1;
1033 break;
1034 }
1035
1036 e1000_set_media_type(hw);
1037
1038 hw->wait_autoneg_complete = FALSE;
1039 hw->tbi_compatibility_en = TRUE;
1040 hw->adaptive_ifs = TRUE;
1041
1042 /* Copper options */
1043
96838a40 1044 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1045 hw->mdix = AUTO_ALL_MODES;
1046 hw->disable_polarity_correction = FALSE;
1047 hw->master_slave = E1000_MASTER_SLAVE;
1048 }
1049
f56799ea
JK		 1050 adapter->num_tx_queues = 1;
1051 adapter->num_rx_queues = 1;
581d708e
MC		 1052
1053 if (e1000_alloc_queues(adapter)) {
1054 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1055 return -ENOMEM;
1056 }
1057
1058#ifdef CONFIG_E1000_NAPI
f56799ea 1059 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1060 adapter->polling_netdev[i].priv = adapter;
1061 adapter->polling_netdev[i].poll = &e1000_clean;
1062 adapter->polling_netdev[i].weight = 64;
1063 dev_hold(&adapter->polling_netdev[i]);
1064 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1065 }
7bfa4816 1066 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1067#endif
1068
1da177e4
LT		 1069 atomic_set(&adapter->irq_sem, 1);
1070 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1071
1072 return 0;
1073}
1074
581d708e
MC		 1075/**
1076 * e1000_alloc_queues - Allocate memory for all rings
1077 * @adapter: board private structure to initialize
1078 *
1079 * We allocate one ring per queue at run-time since we don't know the
1080 * number of queues at compile-time. The polling_netdev array is
1081 * intended for Multiqueue, but should work fine with a single queue.
1082 **/
1083
1084static int __devinit
1085e1000_alloc_queues(struct e1000_adapter *adapter)
1086{
1087 int size;
1088
f56799ea 1089 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1090 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1091 if (!adapter->tx_ring)
1092 return -ENOMEM;
1093 memset(adapter->tx_ring, 0, size);
1094
f56799ea 1095 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1096 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1097 if (!adapter->rx_ring) {
1098 kfree(adapter->tx_ring);
1099 return -ENOMEM;
1100 }
1101 memset(adapter->rx_ring, 0, size);
1102
1103#ifdef CONFIG_E1000_NAPI
f56799ea 1104 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1105 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1106 if (!adapter->polling_netdev) {
1107 kfree(adapter->tx_ring);
1108 kfree(adapter->rx_ring);
1109 return -ENOMEM;
1110 }
1111 memset(adapter->polling_netdev, 0, size);
1112#endif
1113
1114 return E1000_SUCCESS;
1115}
1116
1da177e4
LT		 1117/**
1118 * e1000_open - Called when a network interface is made active
1119 * @netdev: network interface device structure
1120 *
1121 * Returns 0 on success, negative value on failure
1122 *
1123 * The open entry point is called when a network interface is made
1124 * active by the system (IFF_UP). At this point all resources needed
1125 * for transmit and receive operations are allocated, the interrupt
1126 * handler is registered with the OS, the watchdog timer is started,
1127 * and the stack is notified that the interface is ready.
1128 **/
1129
1130static int
1131e1000_open(struct net_device *netdev)
1132{
60490fe0 1133 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1134 int err;
1135
2db10a08
AK		 1136 /* disallow open during test */
1137 if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
1138 return -EBUSY;
1139
1da177e4
LT		 1140 /* allocate transmit descriptors */
1141
581d708e 1142 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1143 goto err_setup_tx;
1144
1145 /* allocate receive descriptors */
1146
581d708e 1147 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1148 goto err_setup_rx;
1149
2db10a08
AK		 1150 err = e1000_request_irq(adapter);
1151 if (err)
1152 goto err_up;
1153
79f05bf0
AK		 1154 e1000_power_up_phy(adapter);
1155
96838a40 1156 if ((err = e1000_up(adapter)))
1da177e4 1157 goto err_up;
2d7edb92 1158 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1159 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1160 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1161 e1000_update_mng_vlan(adapter);
1162 }
1da177e4 1163
b55ccb35
JK		 1164 /* If AMT is enabled, let the firmware know that the network
1165 * interface is now open */
1166 if (adapter->hw.mac_type == e1000_82573 &&
1167 e1000_check_mng_mode(&adapter->hw))
1168 e1000_get_hw_control(adapter);
1169
1da177e4
LT		 1170 return E1000_SUCCESS;
1171
1172err_up:
581d708e 1173 e1000_free_all_rx_resources(adapter);
1da177e4 1174err_setup_rx:
581d708e 1175 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1176err_setup_tx:
1177 e1000_reset(adapter);
1178
1179 return err;
1180}
1181
1182/**
1183 * e1000_close - Disables a network interface
1184 * @netdev: network interface device structure
1185 *
1186 * Returns 0, this is not allowed to fail
1187 *
1188 * The close entry point is called when an interface is de-activated
1189 * by the OS. The hardware is still under the drivers control, but
1190 * needs to be disabled. A global MAC reset is issued to stop the
1191 * hardware, and all transmit and receive resources are freed.
1192 **/
1193
1194static int
1195e1000_close(struct net_device *netdev)
1196{
60490fe0 1197 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1198
2db10a08 1199 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1200 e1000_down(adapter);
79f05bf0 1201 e1000_power_down_phy(adapter);
2db10a08 1202 e1000_free_irq(adapter);
1da177e4 1203
581d708e
MC		 1204 e1000_free_all_tx_resources(adapter);
1205 e1000_free_all_rx_resources(adapter);
1da177e4 1206
96838a40 1207 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1208 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1209 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1210 }
b55ccb35
JK		 1211
1212 /* If AMT is enabled, let the firmware know that the network
1213 * interface is now closed */
1214 if (adapter->hw.mac_type == e1000_82573 &&
1215 e1000_check_mng_mode(&adapter->hw))
1216 e1000_release_hw_control(adapter);
1217
1da177e4
LT		 1218 return 0;
1219}
1220
1221/**
1222 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1223 * @adapter: address of board private structure
2d7edb92
MC		 1224 * @start: address of beginning of memory
1225 * @len: length of memory
1da177e4 1226 **/
e619d523 1227static boolean_t
1da177e4
LT		 1228e1000_check_64k_bound(struct e1000_adapter *adapter,
1229 void *start, unsigned long len)
1230{
1231 unsigned long begin = (unsigned long) start;
1232 unsigned long end = begin + len;
1233
2648345f
MC		 1234 /* First rev 82545 and 82546 need to not allow any memory
1235 * write location to cross 64k boundary due to errata 23 */
1da177e4 1236 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1237 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1238 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1239 }
1240
1241 return TRUE;
1242}
1243
1244/**
1245 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1246 * @adapter: board private structure
581d708e 1247 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1248 *
1249 * Return 0 on success, negative on failure
1250 **/
1251
3ad2cc67 1252static int
581d708e
MC		 1253e1000_setup_tx_resources(struct e1000_adapter *adapter,
1254 struct e1000_tx_ring *txdr)
1da177e4 1255{
1da177e4
LT		 1256 struct pci_dev *pdev = adapter->pdev;
1257 int size;
1258
1259 size = sizeof(struct e1000_buffer) * txdr->count;
a7ec15da
RT		 1260
1261 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
96838a40 1262 if (!txdr->buffer_info) {
2648345f
MC		 1263 DPRINTK(PROBE, ERR,
1264 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1265 return -ENOMEM;
1266 }
1267 memset(txdr->buffer_info, 0, size);
1268
1269 /* round up to nearest 4K */
1270
1271 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1272 E1000_ROUNDUP(txdr->size, 4096);
1273
1274 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1275 if (!txdr->desc) {
1da177e4 1276setup_tx_desc_die:
1da177e4 1277 vfree(txdr->buffer_info);
2648345f
MC		 1278 DPRINTK(PROBE, ERR,
1279 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1280 return -ENOMEM;
1281 }
1282
2648345f 1283 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1284 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1285 void *olddesc = txdr->desc;
1286 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1287 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1288 "at %p\n", txdr->size, txdr->desc);
1289 /* Try again, without freeing the previous */
1da177e4 1290 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1291 /* Failed allocation, critical failure */
96838a40 1292 if (!txdr->desc) {
1da177e4
LT		 1293 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1294 goto setup_tx_desc_die;
1295 }
1296
1297 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1298 /* give up */
2648345f
MC		 1299 pci_free_consistent(pdev, txdr->size, txdr->desc,
1300 txdr->dma);
1da177e4
LT		 1301 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1302 DPRINTK(PROBE, ERR,
2648345f
MC		 1303 "Unable to allocate aligned memory "
1304 "for the transmit descriptor ring\n");
1da177e4
LT		 1305 vfree(txdr->buffer_info);
1306 return -ENOMEM;
1307 } else {
2648345f 1308 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1309 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1310 }
1311 }
1312 memset(txdr->desc, 0, txdr->size);
1313
1314 txdr->next_to_use = 0;
1315 txdr->next_to_clean = 0;
2ae76d98 1316 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1317
1318 return 0;
1319}
1320
581d708e
MC		 1321/**
1322 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1323 * (Descriptors) for all queues
1324 * @adapter: board private structure
1325 *
1326 * If this function returns with an error, then it's possible one or
1327 * more of the rings is populated (while the rest are not). It is the
1328 * callers duty to clean those orphaned rings.
1329 *
1330 * Return 0 on success, negative on failure
1331 **/
1332
1333int
1334e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1335{
1336 int i, err = 0;
1337
f56799ea 1338 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1339 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1340 if (err) {
1341 DPRINTK(PROBE, ERR,
1342 "Allocation for Tx Queue %u failed\n", i);
1343 break;
1344 }
1345 }
1346
1347 return err;
1348}
1349
1da177e4
LT		 1350/**
1351 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1352 * @adapter: board private structure
1353 *
1354 * Configure the Tx unit of the MAC after a reset.
1355 **/
1356
1357static void
1358e1000_configure_tx(struct e1000_adapter *adapter)
1359{
581d708e
MC		 1360 uint64_t tdba;
1361 struct e1000_hw *hw = &adapter->hw;
1362 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1363 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1364
1365 /* Setup the HW Tx Head and Tail descriptor pointers */
1366
f56799ea 1367 switch (adapter->num_tx_queues) {
24025e4e
MC		 1368 case 1:
1369 default:
581d708e
MC		 1370 tdba = adapter->tx_ring[0].dma;
1371 tdlen = adapter->tx_ring[0].count *
1372 sizeof(struct e1000_tx_desc);
581d708e 1373 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1374 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1375 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1376 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1377 E1000_WRITE_REG(hw, TDH, 0);
581d708e
MC		 1378 adapter->tx_ring[0].tdh = E1000_TDH;
1379 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1380 break;
1381 }
1da177e4
LT		 1382
1383 /* Set the default values for the Tx Inter Packet Gap timer */
1384
0fadb059
JK		 1385 if (hw->media_type == e1000_media_type_fiber ||
1386 hw->media_type == e1000_media_type_internal_serdes)
1387 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1388 else
1389 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1390
581d708e 1391 switch (hw->mac_type) {
1da177e4
LT		 1392 case e1000_82542_rev2_0:
1393 case e1000_82542_rev2_1:
1394 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1395 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1396 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1397 break;
87041639
JK		 1398 case e1000_80003es2lan:
1399 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1400 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1401 break;
1da177e4 1402 default:
0fadb059
JK		 1403 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1404 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1405 break;
1da177e4 1406 }
0fadb059
JK		 1407 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1408 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1409 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1410
1411 /* Set the Tx Interrupt Delay register */
1412
581d708e
MC		 1413 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1414 if (hw->mac_type >= e1000_82540)
1415 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1416
1417 /* Program the Transmit Control Register */
1418
581d708e 1419 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1420
1421 tctl &= ~E1000_TCTL_CT;
7e6c9861 1422 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1423 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1424
7e6c9861
JK		 1425#ifdef DISABLE_MULR
1426 /* disable Multiple Reads for debugging */
1427 tctl &= ~E1000_TCTL_MULR;
1428#endif
1da177e4 1429
2ae76d98
MC		 1430 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1431 tarc = E1000_READ_REG(hw, TARC0);
1432 tarc |= ((1 << 25) | (1 << 21));
1433 E1000_WRITE_REG(hw, TARC0, tarc);
1434 tarc = E1000_READ_REG(hw, TARC1);
1435 tarc |= (1 << 25);
1436 if (tctl & E1000_TCTL_MULR)
1437 tarc &= ~(1 << 28);
1438 else
1439 tarc |= (1 << 28);
1440 E1000_WRITE_REG(hw, TARC1, tarc);
87041639
JK		 1441 } else if (hw->mac_type == e1000_80003es2lan) {
1442 tarc = E1000_READ_REG(hw, TARC0);
1443 tarc |= 1;
1444 if (hw->media_type == e1000_media_type_internal_serdes)
1445 tarc |= (1 << 20);
1446 E1000_WRITE_REG(hw, TARC0, tarc);
1447 tarc = E1000_READ_REG(hw, TARC1);
1448 tarc |= 1;
1449 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1450 }
1451
581d708e 1452 e1000_config_collision_dist(hw);
1da177e4
LT		 1453
1454 /* Setup Transmit Descriptor Settings for eop descriptor */
1455 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1456 E1000_TXD_CMD_IFCS;
1457
581d708e 1458 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1459 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1460 else
1461 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1462
1463 /* Cache if we're 82544 running in PCI-X because we'll
1464 * need this to apply a workaround later in the send path. */
581d708e
MC		 1465 if (hw->mac_type == e1000_82544 &&
1466 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1467 adapter->pcix_82544 = 1;
7e6c9861
JK		 1468
1469 E1000_WRITE_REG(hw, TCTL, tctl);
1470
1da177e4
LT		 1471}
1472
1473/**
1474 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1475 * @adapter: board private structure
581d708e 1476 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1477 *
1478 * Returns 0 on success, negative on failure
1479 **/
1480
3ad2cc67 1481static int
581d708e
MC		 1482e1000_setup_rx_resources(struct e1000_adapter *adapter,
1483 struct e1000_rx_ring *rxdr)
1da177e4 1484{
1da177e4 1485 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1486 int size, desc_len;
1da177e4
LT		 1487
1488 size = sizeof(struct e1000_buffer) * rxdr->count;
a7ec15da 1489 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
581d708e 1490 if (!rxdr->buffer_info) {
2648345f
MC		 1491 DPRINTK(PROBE, ERR,
1492 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1493 return -ENOMEM;
1494 }
1495 memset(rxdr->buffer_info, 0, size);
1496
2d7edb92
MC		 1497 size = sizeof(struct e1000_ps_page) * rxdr->count;
1498 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1499 if (!rxdr->ps_page) {
2d7edb92
MC		 1500 vfree(rxdr->buffer_info);
1501 DPRINTK(PROBE, ERR,
1502 "Unable to allocate memory for the receive descriptor ring\n");
1503 return -ENOMEM;
1504 }
1505 memset(rxdr->ps_page, 0, size);
1506
1507 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1508 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1509 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1510 vfree(rxdr->buffer_info);
1511 kfree(rxdr->ps_page);
1512 DPRINTK(PROBE, ERR,
1513 "Unable to allocate memory for the receive descriptor ring\n");
1514 return -ENOMEM;
1515 }
1516 memset(rxdr->ps_page_dma, 0, size);
1517
96838a40 1518 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1519 desc_len = sizeof(struct e1000_rx_desc);
1520 else
1521 desc_len = sizeof(union e1000_rx_desc_packet_split);
1522
1da177e4
LT		 1523 /* Round up to nearest 4K */
1524
2d7edb92 1525 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1526 E1000_ROUNDUP(rxdr->size, 4096);
1527
1528 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1529
581d708e
MC		 1530 if (!rxdr->desc) {
1531 DPRINTK(PROBE, ERR,
1532 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1533setup_rx_desc_die:
1da177e4 1534 vfree(rxdr->buffer_info);
2d7edb92
MC		 1535 kfree(rxdr->ps_page);
1536 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1537 return -ENOMEM;
1538 }
1539
2648345f 1540 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1541 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1542 void *olddesc = rxdr->desc;
1543 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1544 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1545 "at %p\n", rxdr->size, rxdr->desc);
1546 /* Try again, without freeing the previous */
1da177e4 1547 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1548 /* Failed allocation, critical failure */
581d708e 1549 if (!rxdr->desc) {
1da177e4 1550 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1551 DPRINTK(PROBE, ERR,
1552 "Unable to allocate memory "
1553 "for the receive descriptor ring\n");
1da177e4
LT		 1554 goto setup_rx_desc_die;
1555 }
1556
1557 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1558 /* give up */
2648345f
MC		 1559 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1560 rxdr->dma);
1da177e4 1561 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1562 DPRINTK(PROBE, ERR,
1563 "Unable to allocate aligned memory "
1564 "for the receive descriptor ring\n");
581d708e 1565 goto setup_rx_desc_die;
1da177e4 1566 } else {
2648345f 1567 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1568 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1569 }
1570 }
1571 memset(rxdr->desc, 0, rxdr->size);
1572
1573 rxdr->next_to_clean = 0;
1574 rxdr->next_to_use = 0;
1575
1576 return 0;
1577}
1578
581d708e
MC		 1579/**
1580 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1581 * (Descriptors) for all queues
1582 * @adapter: board private structure
1583 *
1584 * If this function returns with an error, then it's possible one or
1585 * more of the rings is populated (while the rest are not). It is the
1586 * callers duty to clean those orphaned rings.
1587 *
1588 * Return 0 on success, negative on failure
1589 **/
1590
1591int
1592e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1593{
1594 int i, err = 0;
1595
f56799ea 1596 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1597 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1598 if (err) {
1599 DPRINTK(PROBE, ERR,
1600 "Allocation for Rx Queue %u failed\n", i);
1601 break;
1602 }
1603 }
1604
1605 return err;
1606}
1607
1da177e4 1608/**
2648345f 1609 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1610 * @adapter: Board private structure
1611 **/
e4c811c9
MC		 1612#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1613 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1614static void
1615e1000_setup_rctl(struct e1000_adapter *adapter)
1616{
2d7edb92
MC		 1617 uint32_t rctl, rfctl;
1618 uint32_t psrctl = 0;
35ec56bb 1619#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1620 uint32_t pages = 0;
1621#endif
1da177e4
LT		 1622
1623 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1624
1625 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1626
1627 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1628 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1629 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1630
0fadb059 1631 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1632 rctl |= E1000_RCTL_SBP;
1633 else
1634 rctl &= ~E1000_RCTL_SBP;
1635
2d7edb92
MC		 1636 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1637 rctl &= ~E1000_RCTL_LPE;
1638 else
1639 rctl |= E1000_RCTL_LPE;
1640
1da177e4 1641 /* Setup buffer sizes */
9e2feace
AK		 1642 rctl &= ~E1000_RCTL_SZ_4096;
1643 rctl |= E1000_RCTL_BSEX;
1644 switch (adapter->rx_buffer_len) {
1645 case E1000_RXBUFFER_256:
1646 rctl |= E1000_RCTL_SZ_256;
1647 rctl &= ~E1000_RCTL_BSEX;
1648 break;
1649 case E1000_RXBUFFER_512:
1650 rctl |= E1000_RCTL_SZ_512;
1651 rctl &= ~E1000_RCTL_BSEX;
1652 break;
1653 case E1000_RXBUFFER_1024:
1654 rctl |= E1000_RCTL_SZ_1024;
1655 rctl &= ~E1000_RCTL_BSEX;
1656 break;
a1415ee6
JK		 1657 case E1000_RXBUFFER_2048:
1658 default:
1659 rctl |= E1000_RCTL_SZ_2048;
1660 rctl &= ~E1000_RCTL_BSEX;
1661 break;
1662 case E1000_RXBUFFER_4096:
1663 rctl |= E1000_RCTL_SZ_4096;
1664 break;
1665 case E1000_RXBUFFER_8192:
1666 rctl |= E1000_RCTL_SZ_8192;
1667 break;
1668 case E1000_RXBUFFER_16384:
1669 rctl |= E1000_RCTL_SZ_16384;
1670 break;
2d7edb92
MC		 1671 }
1672
35ec56bb 1673#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1674 /* 82571 and greater support packet-split where the protocol
1675 * header is placed in skb->data and the packet data is
1676 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1677 * In the case of a non-split, skb->data is linearly filled,
1678 * followed by the page buffers. Therefore, skb->data is
1679 * sized to hold the largest protocol header.
1680 */
e4c811c9
MC		 1681 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1682 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1683 PAGE_SIZE <= 16384)
1684 adapter->rx_ps_pages = pages;
1685 else
1686 adapter->rx_ps_pages = 0;
2d7edb92 1687#endif
e4c811c9 1688 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1689 /* Configure extra packet-split registers */
1690 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1691 rfctl |= E1000_RFCTL_EXTEN;
1692 /* disable IPv6 packet split support */
1693 rfctl |= E1000_RFCTL_IPV6_DIS;
1694 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1695
7dfee0cb 1696 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1697
2d7edb92
MC		 1698 psrctl |= adapter->rx_ps_bsize0 >>
1699 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1700
1701 switch (adapter->rx_ps_pages) {
1702 case 3:
1703 psrctl |= PAGE_SIZE <<
1704 E1000_PSRCTL_BSIZE3_SHIFT;
1705 case 2:
1706 psrctl |= PAGE_SIZE <<
1707 E1000_PSRCTL_BSIZE2_SHIFT;
1708 case 1:
1709 psrctl |= PAGE_SIZE >>
1710 E1000_PSRCTL_BSIZE1_SHIFT;
1711 break;
1712 }
2d7edb92
MC		 1713
1714 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1715 }
1716
1717 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1718}
1719
1720/**
1721 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1722 * @adapter: board private structure
1723 *
1724 * Configure the Rx unit of the MAC after a reset.
1725 **/
1726
1727static void
1728e1000_configure_rx(struct e1000_adapter *adapter)
1729{
581d708e
MC		 1730 uint64_t rdba;
1731 struct e1000_hw *hw = &adapter->hw;
1732 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1733
e4c811c9 1734 if (adapter->rx_ps_pages) {
0f15a8fa 1735 /* this is a 32 byte descriptor */
581d708e 1736 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1737 sizeof(union e1000_rx_desc_packet_split);
1738 adapter->clean_rx = e1000_clean_rx_irq_ps;
1739 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1740 } else {
581d708e
MC		 1741 rdlen = adapter->rx_ring[0].count *
1742 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1743 adapter->clean_rx = e1000_clean_rx_irq;
1744 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1745 }
1da177e4
LT		 1746
1747 /* disable receives while setting up the descriptors */
581d708e
MC		 1748 rctl = E1000_READ_REG(hw, RCTL);
1749 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1750
1751 /* set the Receive Delay Timer Register */
581d708e 1752 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1753
581d708e
MC		 1754 if (hw->mac_type >= e1000_82540) {
1755 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1756 if (adapter->itr > 1)
581d708e 1757 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1758 1000000000 / (adapter->itr * 256));
1759 }
1760
2ae76d98 1761 if (hw->mac_type >= e1000_82571) {
2ae76d98 1762 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1763 /* Reset delay timers after every interrupt */
6fc7a7ec 1764 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9
JK		 1765#ifdef CONFIG_E1000_NAPI
1766 /* Auto-Mask interrupts upon ICR read. */
1767 ctrl_ext |= E1000_CTRL_EXT_IAME;
1768#endif
2ae76d98 1769 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1770 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1771 E1000_WRITE_FLUSH(hw);
1772 }
1773
581d708e
MC		 1774 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1775 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1776 switch (adapter->num_rx_queues) {
24025e4e
MC		 1777 case 1:
1778 default:
581d708e 1779 rdba = adapter->rx_ring[0].dma;
581d708e 1780 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 1781 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1782 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 1783 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 1784 E1000_WRITE_REG(hw, RDH, 0);
581d708e
MC		 1785 adapter->rx_ring[0].rdh = E1000_RDH;
1786 adapter->rx_ring[0].rdt = E1000_RDT;
1787 break;
24025e4e
MC		 1788 }
1789
1da177e4 1790 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1791 if (hw->mac_type >= e1000_82543) {
1792 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1793 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1794 rxcsum |= E1000_RXCSUM_TUOFL;
1795
868d5309 1796 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1797 * Must be used in conjunction with packet-split. */
96838a40
JB		 1798 if ((hw->mac_type >= e1000_82571) &&
1799 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1800 rxcsum |= E1000_RXCSUM_IPPCSE;
1801 }
1802 } else {
1803 rxcsum &= ~E1000_RXCSUM_TUOFL;
1804 /* don't need to clear IPPCSE as it defaults to 0 */
1805 }
581d708e 1806 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1807 }
1808
1809 /* Enable Receives */
581d708e 1810 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1811}
1812
1813/**
581d708e 1814 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1815 * @adapter: board private structure
581d708e 1816 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1817 *
1818 * Free all transmit software resources
1819 **/
1820
3ad2cc67 1821static void
581d708e
MC		 1822e1000_free_tx_resources(struct e1000_adapter *adapter,
1823 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1824{
1825 struct pci_dev *pdev = adapter->pdev;
1826
581d708e 1827 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1828
581d708e
MC		 1829 vfree(tx_ring->buffer_info);
1830 tx_ring->buffer_info = NULL;
1da177e4 1831
581d708e 1832 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1833
581d708e
MC		 1834 tx_ring->desc = NULL;
1835}
1836
1837/**
1838 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1839 * @adapter: board private structure
1840 *
1841 * Free all transmit software resources
1842 **/
1843
1844void
1845e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1846{
1847 int i;
1848
f56799ea 1849 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1850 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1851}
1852
e619d523 1853static void
1da177e4
LT		 1854e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1855 struct e1000_buffer *buffer_info)
1856{
96838a40 1857 if (buffer_info->dma) {
2648345f
MC		 1858 pci_unmap_page(adapter->pdev,
1859 buffer_info->dma,
1860 buffer_info->length,
1861 PCI_DMA_TODEVICE);
1da177e4 1862 }
8241e35e 1863 if (buffer_info->skb)
1da177e4 1864 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1865 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1866}
1867
1868/**
1869 * e1000_clean_tx_ring - Free Tx Buffers
1870 * @adapter: board private structure
581d708e 1871 * @tx_ring: ring to be cleaned
1da177e4
LT		 1872 **/
1873
1874static void
581d708e
MC		 1875e1000_clean_tx_ring(struct e1000_adapter *adapter,
1876 struct e1000_tx_ring *tx_ring)
1da177e4 1877{
1da177e4
LT		 1878 struct e1000_buffer *buffer_info;
1879 unsigned long size;
1880 unsigned int i;
1881
1882 /* Free all the Tx ring sk_buffs */
1883
96838a40 1884 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1885 buffer_info = &tx_ring->buffer_info[i];
1886 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1887 }
1888
1889 size = sizeof(struct e1000_buffer) * tx_ring->count;
1890 memset(tx_ring->buffer_info, 0, size);
1891
1892 /* Zero out the descriptor ring */
1893
1894 memset(tx_ring->desc, 0, tx_ring->size);
1895
1896 tx_ring->next_to_use = 0;
1897 tx_ring->next_to_clean = 0;
fd803241 1898 tx_ring->last_tx_tso = 0;
1da177e4 1899
581d708e
MC		 1900 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1901 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1902}
1903
1904/**
1905 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1906 * @adapter: board private structure
1907 **/
1908
1909static void
1910e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1911{
1912 int i;
1913
f56799ea 1914 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1915 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1916}
1917
1918/**
1919 * e1000_free_rx_resources - Free Rx Resources
1920 * @adapter: board private structure
581d708e 1921 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1922 *
1923 * Free all receive software resources
1924 **/
1925
3ad2cc67 1926static void
581d708e
MC		 1927e1000_free_rx_resources(struct e1000_adapter *adapter,
1928 struct e1000_rx_ring *rx_ring)
1da177e4 1929{
1da177e4
LT		 1930 struct pci_dev *pdev = adapter->pdev;
1931
581d708e 1932 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1933
1934 vfree(rx_ring->buffer_info);
1935 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1936 kfree(rx_ring->ps_page);
1937 rx_ring->ps_page = NULL;
1938 kfree(rx_ring->ps_page_dma);
1939 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1940
1941 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1942
1943 rx_ring->desc = NULL;
1944}
1945
1946/**
581d708e 1947 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1948 * @adapter: board private structure
581d708e
MC		 1949 *
1950 * Free all receive software resources
1951 **/
1952
1953void
1954e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1955{
1956 int i;
1957
f56799ea 1958 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1959 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1960}
1961
1962/**
1963 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1964 * @adapter: board private structure
1965 * @rx_ring: ring to free buffers from
1da177e4
LT		 1966 **/
1967
1968static void
581d708e
MC		 1969e1000_clean_rx_ring(struct e1000_adapter *adapter,
1970 struct e1000_rx_ring *rx_ring)
1da177e4 1971{
1da177e4 1972 struct e1000_buffer *buffer_info;
2d7edb92
MC		 1973 struct e1000_ps_page *ps_page;
1974 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 1975 struct pci_dev *pdev = adapter->pdev;
1976 unsigned long size;
2d7edb92 1977 unsigned int i, j;
1da177e4
LT		 1978
1979 /* Free all the Rx ring sk_buffs */
96838a40 1980 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1981 buffer_info = &rx_ring->buffer_info[i];
96838a40 1982 if (buffer_info->skb) {
1da177e4
LT		 1983 pci_unmap_single(pdev,
1984 buffer_info->dma,
1985 buffer_info->length,
1986 PCI_DMA_FROMDEVICE);
1987
1988 dev_kfree_skb(buffer_info->skb);
1989 buffer_info->skb = NULL;
997f5cbd
JK		 1990 }
1991 ps_page = &rx_ring->ps_page[i];
1992 ps_page_dma = &rx_ring->ps_page_dma[i];
1993 for (j = 0; j < adapter->rx_ps_pages; j++) {
1994 if (!ps_page->ps_page[j]) break;
1995 pci_unmap_page(pdev,
1996 ps_page_dma->ps_page_dma[j],
1997 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1998 ps_page_dma->ps_page_dma[j] = 0;
1999 put_page(ps_page->ps_page[j]);
2000 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2001 }
2002 }
2003
2004 size = sizeof(struct e1000_buffer) * rx_ring->count;
2005 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2006 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2007 memset(rx_ring->ps_page, 0, size);
2008 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2009 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2010
2011 /* Zero out the descriptor ring */
2012
2013 memset(rx_ring->desc, 0, rx_ring->size);
2014
2015 rx_ring->next_to_clean = 0;
2016 rx_ring->next_to_use = 0;
2017
581d708e
MC		 2018 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2019 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2020}
2021
2022/**
2023 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2024 * @adapter: board private structure
2025 **/
2026
2027static void
2028e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2029{
2030 int i;
2031
f56799ea 2032 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2033 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2034}
2035
2036/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2037 * and memory write and invalidate disabled for certain operations
2038 */
2039static void
2040e1000_enter_82542_rst(struct e1000_adapter *adapter)
2041{
2042 struct net_device *netdev = adapter->netdev;
2043 uint32_t rctl;
2044
2045 e1000_pci_clear_mwi(&adapter->hw);
2046
2047 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2048 rctl |= E1000_RCTL_RST;
2049 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2050 E1000_WRITE_FLUSH(&adapter->hw);
2051 mdelay(5);
2052
96838a40 2053 if (netif_running(netdev))
581d708e 2054 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2055}
2056
2057static void
2058e1000_leave_82542_rst(struct e1000_adapter *adapter)
2059{
2060 struct net_device *netdev = adapter->netdev;
2061 uint32_t rctl;
2062
2063 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2064 rctl &= ~E1000_RCTL_RST;
2065 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2066 E1000_WRITE_FLUSH(&adapter->hw);
2067 mdelay(5);
2068
96838a40 2069 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2070 e1000_pci_set_mwi(&adapter->hw);
2071
96838a40 2072 if (netif_running(netdev)) {
72d64a43
JK		 2073 /* No need to loop, because 82542 supports only 1 queue */
2074 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2075 e1000_configure_rx(adapter);
72d64a43 2076 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2077 }
2078}
2079
2080/**
2081 * e1000_set_mac - Change the Ethernet Address of the NIC
2082 * @netdev: network interface device structure
2083 * @p: pointer to an address structure
2084 *
2085 * Returns 0 on success, negative on failure
2086 **/
2087
2088static int
2089e1000_set_mac(struct net_device *netdev, void *p)
2090{
60490fe0 2091 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2092 struct sockaddr *addr = p;
2093
96838a40 2094 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2095 return -EADDRNOTAVAIL;
2096
2097 /* 82542 2.0 needs to be in reset to write receive address registers */
2098
96838a40 2099 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2100 e1000_enter_82542_rst(adapter);
2101
2102 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2103 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2104
2105 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2106
868d5309
MC		 2107 /* With 82571 controllers, LAA may be overwritten (with the default)
2108 * due to controller reset from the other port. */
2109 if (adapter->hw.mac_type == e1000_82571) {
2110 /* activate the work around */
2111 adapter->hw.laa_is_present = 1;
2112
96838a40
JB		 2113 /* Hold a copy of the LAA in RAR[14] This is done so that
2114 * between the time RAR[0] gets clobbered and the time it
2115 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2116 * of the RARs and no incoming packets directed to this port
96838a40 2117 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2118 * RAR[14] */
96838a40 2119 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2120 E1000_RAR_ENTRIES - 1);
2121 }
2122
96838a40 2123 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2124 e1000_leave_82542_rst(adapter);
2125
2126 return 0;
2127}
2128
2129/**
2130 * e1000_set_multi - Multicast and Promiscuous mode set
2131 * @netdev: network interface device structure
2132 *
2133 * The set_multi entry point is called whenever the multicast address
2134 * list or the network interface flags are updated. This routine is
2135 * responsible for configuring the hardware for proper multicast,
2136 * promiscuous mode, and all-multi behavior.
2137 **/
2138
2139static void
2140e1000_set_multi(struct net_device *netdev)
2141{
60490fe0 2142 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2143 struct e1000_hw *hw = &adapter->hw;
2144 struct dev_mc_list *mc_ptr;
2145 uint32_t rctl;
2146 uint32_t hash_value;
868d5309 2147 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2148
868d5309
MC		 2149 /* reserve RAR[14] for LAA over-write work-around */
2150 if (adapter->hw.mac_type == e1000_82571)
2151 rar_entries--;
1da177e4 2152
2648345f
MC		 2153 /* Check for Promiscuous and All Multicast modes */
2154
1da177e4
LT		 2155 rctl = E1000_READ_REG(hw, RCTL);
2156
96838a40 2157 if (netdev->flags & IFF_PROMISC) {
1da177e4 2158 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2159 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2160 rctl |= E1000_RCTL_MPE;
2161 rctl &= ~E1000_RCTL_UPE;
2162 } else {
2163 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2164 }
2165
2166 E1000_WRITE_REG(hw, RCTL, rctl);
2167
2168 /* 82542 2.0 needs to be in reset to write receive address registers */
2169
96838a40 2170 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2171 e1000_enter_82542_rst(adapter);
2172
2173 /* load the first 14 multicast address into the exact filters 1-14
2174 * RAR 0 is used for the station MAC adddress
2175 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2176 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2177 */
2178 mc_ptr = netdev->mc_list;
2179
96838a40 2180 for (i = 1; i < rar_entries; i++) {
868d5309 2181 if (mc_ptr) {
1da177e4
LT		 2182 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2183 mc_ptr = mc_ptr->next;
2184 } else {
2185 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2186 E1000_WRITE_FLUSH(hw);
1da177e4 2187 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2188 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2189 }
2190 }
2191
2192 /* clear the old settings from the multicast hash table */
2193
4ca213a6 2194 for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++) {
1da177e4 2195 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2196 E1000_WRITE_FLUSH(hw);
2197 }
1da177e4
LT		 2198
2199 /* load any remaining addresses into the hash table */
2200
96838a40 2201 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2202 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2203 e1000_mta_set(hw, hash_value);
2204 }
2205
96838a40 2206 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2207 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2208}
2209
2210/* Need to wait a few seconds after link up to get diagnostic information from
2211 * the phy */
2212
2213static void
2214e1000_update_phy_info(unsigned long data)
2215{
2216 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2217 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2218}
2219
2220/**
2221 * e1000_82547_tx_fifo_stall - Timer Call-back
2222 * @data: pointer to adapter cast into an unsigned long
2223 **/
2224
2225static void
2226e1000_82547_tx_fifo_stall(unsigned long data)
2227{
2228 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2229 struct net_device *netdev = adapter->netdev;
2230 uint32_t tctl;
2231
96838a40
JB		 2232 if (atomic_read(&adapter->tx_fifo_stall)) {
2233 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2234 E1000_READ_REG(&adapter->hw, TDH)) &&
2235 (E1000_READ_REG(&adapter->hw, TDFT) ==
2236 E1000_READ_REG(&adapter->hw, TDFH)) &&
2237 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2238 E1000_READ_REG(&adapter->hw, TDFHS))) {
2239 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2240 E1000_WRITE_REG(&adapter->hw, TCTL,
2241 tctl & ~E1000_TCTL_EN);
2242 E1000_WRITE_REG(&adapter->hw, TDFT,
2243 adapter->tx_head_addr);
2244 E1000_WRITE_REG(&adapter->hw, TDFH,
2245 adapter->tx_head_addr);
2246 E1000_WRITE_REG(&adapter->hw, TDFTS,
2247 adapter->tx_head_addr);
2248 E1000_WRITE_REG(&adapter->hw, TDFHS,
2249 adapter->tx_head_addr);
2250 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2251 E1000_WRITE_FLUSH(&adapter->hw);
2252
2253 adapter->tx_fifo_head = 0;
2254 atomic_set(&adapter->tx_fifo_stall, 0);
2255 netif_wake_queue(netdev);
2256 } else {
2257 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2258 }
2259 }
2260}
2261
2262/**
2263 * e1000_watchdog - Timer Call-back
2264 * @data: pointer to adapter cast into an unsigned long
2265 **/
2266static void
2267e1000_watchdog(unsigned long data)
2268{
2269 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2270 struct net_device *netdev = adapter->netdev;
545c67c0 2271 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2272 uint32_t link, tctl;
1da177e4
LT		 2273
2274 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2275 if (adapter->hw.mac_type == e1000_82573) {
2276 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2277 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2278 e1000_update_mng_vlan(adapter);
96838a40 2279 }
1da177e4 2280
96838a40 2281 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2282 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2283 link = !adapter->hw.serdes_link_down;
2284 else
2285 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2286
96838a40
JB		 2287 if (link) {
2288 if (!netif_carrier_ok(netdev)) {
fe7fe28e 2289 boolean_t txb2b = 1;
1da177e4
LT		 2290 e1000_get_speed_and_duplex(&adapter->hw,
2291 &adapter->link_speed,
2292 &adapter->link_duplex);
2293
2294 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2295 adapter->link_speed,
2296 adapter->link_duplex == FULL_DUPLEX ?
2297 "Full Duplex" : "Half Duplex");
2298
7e6c9861
JK		 2299 /* tweak tx_queue_len according to speed/duplex
2300 * and adjust the timeout factor */
66a2b0a3
JK		 2301 netdev->tx_queue_len = adapter->tx_queue_len;
2302 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2303 switch (adapter->link_speed) {
2304 case SPEED_10:
fe7fe28e 2305 txb2b = 0;
7e6c9861
JK		 2306 netdev->tx_queue_len = 10;
2307 adapter->tx_timeout_factor = 8;
2308 break;
2309 case SPEED_100:
fe7fe28e 2310 txb2b = 0;
7e6c9861
JK		 2311 netdev->tx_queue_len = 100;
2312 /* maybe add some timeout factor ? */
2313 break;
2314 }
2315
fe7fe28e 2316 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2317 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2318 txb2b == 0) {
7e6c9861
JK		 2319#define SPEED_MODE_BIT (1 << 21)
2320 uint32_t tarc0;
2321 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2322 tarc0 &= ~SPEED_MODE_BIT;
2323 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2324 }
2325
2326#ifdef NETIF_F_TSO
2327 /* disable TSO for pcie and 10/100 speeds, to avoid
2328 * some hardware issues */
2329 if (!adapter->tso_force &&
2330 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2331 switch (adapter->link_speed) {
2332 case SPEED_10:
66a2b0a3 2333 case SPEED_100:
7e6c9861
JK		 2334 DPRINTK(PROBE,INFO,
2335 "10/100 speed: disabling TSO\n");
2336 netdev->features &= ~NETIF_F_TSO;
2337 break;
2338 case SPEED_1000:
2339 netdev->features |= NETIF_F_TSO;
2340 break;
2341 default:
2342 /* oops */
66a2b0a3
JK		 2343 break;
2344 }
2345 }
7e6c9861
JK		 2346#endif
2347
2348 /* enable transmits in the hardware, need to do this
2349 * after setting TARC0 */
2350 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2351 tctl |= E1000_TCTL_EN;
2352 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2353
1da177e4
LT		 2354 netif_carrier_on(netdev);
2355 netif_wake_queue(netdev);
2356 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2357 adapter->smartspeed = 0;
2358 }
2359 } else {
96838a40 2360 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2361 adapter->link_speed = 0;
2362 adapter->link_duplex = 0;
2363 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2364 netif_carrier_off(netdev);
2365 netif_stop_queue(netdev);
2366 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2367
2368 /* 80003ES2LAN workaround--
2369 * For packet buffer work-around on link down event;
2370 * disable receives in the ISR and
2371 * reset device here in the watchdog
2372 */
2373 if (adapter->hw.mac_type == e1000_80003es2lan) {
2374 /* reset device */
2375 schedule_work(&adapter->reset_task);
2376 }
1da177e4
LT		 2377 }
2378
2379 e1000_smartspeed(adapter);
2380 }
2381
2382 e1000_update_stats(adapter);
2383
2384 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2385 adapter->tpt_old = adapter->stats.tpt;
2386 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2387 adapter->colc_old = adapter->stats.colc;
2388
2389 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2390 adapter->gorcl_old = adapter->stats.gorcl;
2391 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2392 adapter->gotcl_old = adapter->stats.gotcl;
2393
2394 e1000_update_adaptive(&adapter->hw);
2395
f56799ea 2396 if (!netif_carrier_ok(netdev)) {
581d708e 2397 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2398 /* We've lost link, so the controller stops DMA,
2399 * but we've got queued Tx work that's never going
2400 * to get done, so reset controller to flush Tx.
2401 * (Do the reset outside of interrupt context). */
87041639
JK		 2402 adapter->tx_timeout_count++;
2403 schedule_work(&adapter->reset_task);
1da177e4
LT		 2404 }
2405 }
2406
2407 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2408 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2409 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2410 * asymmetrical Tx or Rx gets ITR=8000; everyone
2411 * else is between 2000-8000. */
2412 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2413 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2414 adapter->gotcl - adapter->gorcl :
2415 adapter->gorcl - adapter->gotcl) / 10000;
2416 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2417 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2418 }
2419
2420 /* Cause software interrupt to ensure rx ring is cleaned */
2421 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2422
2648345f 2423 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2424 adapter->detect_tx_hung = TRUE;
2425
96838a40 2426 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2427 * reset from the other port. Set the appropriate LAA in RAR[0] */
2428 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2429 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2430
1da177e4
LT		 2431 /* Reset the timer */
2432 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2433}
2434
2435#define E1000_TX_FLAGS_CSUM 0x00000001
2436#define E1000_TX_FLAGS_VLAN 0x00000002
2437#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2438#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2439#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2440#define E1000_TX_FLAGS_VLAN_SHIFT 16
2441
e619d523 2442static int
581d708e
MC		 2443e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2444 struct sk_buff *skb)
1da177e4
LT		 2445{
2446#ifdef NETIF_F_TSO
2447 struct e1000_context_desc *context_desc;
545c67c0 2448 struct e1000_buffer *buffer_info;
1da177e4
LT		 2449 unsigned int i;
2450 uint32_t cmd_length = 0;
2d7edb92 2451 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2452 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2453 int err;
2454
96838a40 2455 if (skb_shinfo(skb)->tso_size) {
1da177e4
LT		 2456 if (skb_header_cloned(skb)) {
2457 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2458 if (err)
2459 return err;
2460 }
2461
2462 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2463 mss = skb_shinfo(skb)->tso_size;
60828236 2464 if (skb->protocol == htons(ETH_P_IP)) {
2d7edb92
MC		 2465 skb->nh.iph->tot_len = 0;
2466 skb->nh.iph->check = 0;
2467 skb->h.th->check =
2468 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2469 skb->nh.iph->daddr,
2470 0,
2471 IPPROTO_TCP,
2472 0);
2473 cmd_length = E1000_TXD_CMD_IP;
2474 ipcse = skb->h.raw - skb->data - 1;
2475#ifdef NETIF_F_TSO_IPV6
96838a40 2476 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2d7edb92
MC		 2477 skb->nh.ipv6h->payload_len = 0;
2478 skb->h.th->check =
2479 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2480 &skb->nh.ipv6h->daddr,
2481 0,
2482 IPPROTO_TCP,
2483 0);
2484 ipcse = 0;
2485#endif
2486 }
1da177e4
LT		 2487 ipcss = skb->nh.raw - skb->data;
2488 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2489 tucss = skb->h.raw - skb->data;
2490 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2491 tucse = 0;
2492
2493 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2494 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2495
581d708e
MC		 2496 i = tx_ring->next_to_use;
2497 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2498 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2499
2500 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2501 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2502 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2503 context_desc->upper_setup.tcp_fields.tucss = tucss;
2504 context_desc->upper_setup.tcp_fields.tucso = tucso;
2505 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2506 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2507 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2508 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2509
545c67c0
JK		 2510 buffer_info->time_stamp = jiffies;
2511
581d708e
MC		 2512 if (++i == tx_ring->count) i = 0;
2513 tx_ring->next_to_use = i;
1da177e4 2514
8241e35e 2515 return TRUE;
1da177e4
LT		 2516 }
2517#endif
2518
8241e35e 2519 return FALSE;
1da177e4
LT		 2520}
2521
e619d523 2522static boolean_t
581d708e
MC		 2523e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2524 struct sk_buff *skb)
1da177e4
LT		 2525{
2526 struct e1000_context_desc *context_desc;
545c67c0 2527 struct e1000_buffer *buffer_info;
1da177e4
LT		 2528 unsigned int i;
2529 uint8_t css;
2530
96838a40 2531 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2532 css = skb->h.raw - skb->data;
2533
581d708e 2534 i = tx_ring->next_to_use;
545c67c0 2535 buffer_info = &tx_ring->buffer_info[i];
581d708e 2536 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2537
2538 context_desc->upper_setup.tcp_fields.tucss = css;
2539 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2540 context_desc->upper_setup.tcp_fields.tucse = 0;
2541 context_desc->tcp_seg_setup.data = 0;
2542 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2543
545c67c0
JK		 2544 buffer_info->time_stamp = jiffies;
2545
581d708e
MC		 2546 if (unlikely(++i == tx_ring->count)) i = 0;
2547 tx_ring->next_to_use = i;
1da177e4
LT		 2548
2549 return TRUE;
2550 }
2551
2552 return FALSE;
2553}
2554
2555#define E1000_MAX_TXD_PWR 12
2556#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2557
e619d523 2558static int
581d708e
MC		 2559e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2560 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2561 unsigned int nr_frags, unsigned int mss)
1da177e4 2562{
1da177e4
LT		 2563 struct e1000_buffer *buffer_info;
2564 unsigned int len = skb->len;
2565 unsigned int offset = 0, size, count = 0, i;
2566 unsigned int f;
2567 len -= skb->data_len;
2568
2569 i = tx_ring->next_to_use;
2570
96838a40 2571 while (len) {
1da177e4
LT		 2572 buffer_info = &tx_ring->buffer_info[i];
2573 size = min(len, max_per_txd);
2574#ifdef NETIF_F_TSO
fd803241
JK		 2575 /* Workaround for Controller erratum --
2576 * descriptor for non-tso packet in a linear SKB that follows a
2577 * tso gets written back prematurely before the data is fully
0f15a8fa 2578 * DMA'd to the controller */
fd803241 2579 if (!skb->data_len && tx_ring->last_tx_tso &&
0f15a8fa 2580 !skb_shinfo(skb)->tso_size) {
fd803241
JK		 2581 tx_ring->last_tx_tso = 0;
2582 size -= 4;
2583 }
2584
1da177e4
LT		 2585 /* Workaround for premature desc write-backs
2586 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2587 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2588 size -= 4;
2589#endif
97338bde
MC		 2590 /* work-around for errata 10 and it applies
2591 * to all controllers in PCI-X mode
2592 * The fix is to make sure that the first descriptor of a
2593 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2594 */
96838a40 2595 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2596 (size > 2015) && count == 0))
2597 size = 2015;
96838a40 2598
1da177e4
LT		 2599 /* Workaround for potential 82544 hang in PCI-X. Avoid
2600 * terminating buffers within evenly-aligned dwords. */
96838a40 2601 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2602 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2603 size > 4))
2604 size -= 4;
2605
2606 buffer_info->length = size;
2607 buffer_info->dma =
2608 pci_map_single(adapter->pdev,
2609 skb->data + offset,
2610 size,
2611 PCI_DMA_TODEVICE);
2612 buffer_info->time_stamp = jiffies;
2613
2614 len -= size;
2615 offset += size;
2616 count++;
96838a40 2617 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2618 }
2619
96838a40 2620 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2621 struct skb_frag_struct *frag;
2622
2623 frag = &skb_shinfo(skb)->frags[f];
2624 len = frag->size;
2625 offset = frag->page_offset;
2626
96838a40 2627 while (len) {
1da177e4
LT		 2628 buffer_info = &tx_ring->buffer_info[i];
2629 size = min(len, max_per_txd);
2630#ifdef NETIF_F_TSO
2631 /* Workaround for premature desc write-backs
2632 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2633 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2634 size -= 4;
2635#endif
2636 /* Workaround for potential 82544 hang in PCI-X.
2637 * Avoid terminating buffers within evenly-aligned
2638 * dwords. */
96838a40 2639 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2640 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2641 size > 4))
2642 size -= 4;
2643
2644 buffer_info->length = size;
2645 buffer_info->dma =
2646 pci_map_page(adapter->pdev,
2647 frag->page,
2648 offset,
2649 size,
2650 PCI_DMA_TODEVICE);
2651 buffer_info->time_stamp = jiffies;
2652
2653 len -= size;
2654 offset += size;
2655 count++;
96838a40 2656 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2657 }
2658 }
2659
2660 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2661 tx_ring->buffer_info[i].skb = skb;
2662 tx_ring->buffer_info[first].next_to_watch = i;
2663
2664 return count;
2665}
2666
e619d523 2667static void
581d708e
MC		 2668e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2669 int tx_flags, int count)
1da177e4 2670{
1da177e4
LT		 2671 struct e1000_tx_desc *tx_desc = NULL;
2672 struct e1000_buffer *buffer_info;
2673 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2674 unsigned int i;
2675
96838a40 2676 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2677 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2678 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2679 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2680
96838a40 2681 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2682 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2683 }
2684
96838a40 2685 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2686 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2687 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2688 }
2689
96838a40 2690 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2691 txd_lower |= E1000_TXD_CMD_VLE;
2692 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2693 }
2694
2695 i = tx_ring->next_to_use;
2696
96838a40 2697 while (count--) {
1da177e4
LT		 2698 buffer_info = &tx_ring->buffer_info[i];
2699 tx_desc = E1000_TX_DESC(*tx_ring, i);
2700 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2701 tx_desc->lower.data =
2702 cpu_to_le32(txd_lower | buffer_info->length);
2703 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2704 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2705 }
2706
2707 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2708
2709 /* Force memory writes to complete before letting h/w
2710 * know there are new descriptors to fetch. (Only
2711 * applicable for weak-ordered memory model archs,
2712 * such as IA-64). */
2713 wmb();
2714
2715 tx_ring->next_to_use = i;
581d708e 2716 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2717}
2718
2719/**
2720 * 82547 workaround to avoid controller hang in half-duplex environment.
2721 * The workaround is to avoid queuing a large packet that would span
2722 * the internal Tx FIFO ring boundary by notifying the stack to resend
2723 * the packet at a later time. This gives the Tx FIFO an opportunity to
2724 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2725 * to the beginning of the Tx FIFO.
2726 **/
2727
2728#define E1000_FIFO_HDR 0x10
2729#define E1000_82547_PAD_LEN 0x3E0
2730
e619d523 2731static int
1da177e4
LT		 2732e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2733{
2734 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2735 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2736
2737 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2738
96838a40 2739 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2740 goto no_fifo_stall_required;
2741
96838a40 2742 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2743 return 1;
2744
96838a40 2745 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2746 atomic_set(&adapter->tx_fifo_stall, 1);
2747 return 1;
2748 }
2749
2750no_fifo_stall_required:
2751 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2752 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2753 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2754 return 0;
2755}
2756
2d7edb92 2757#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 2758static int
2d7edb92
MC		 2759e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2760{
2761 struct e1000_hw *hw = &adapter->hw;
2762 uint16_t length, offset;
96838a40
JB		 2763 if (vlan_tx_tag_present(skb)) {
2764 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2765 ( adapter->hw.mng_cookie.status &
2766 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2767 return 0;
2768 }
20a44028 2769 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2770 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2771 if ((htons(ETH_P_IP) == eth->h_proto)) {
2772 const struct iphdr *ip =
2d7edb92 2773 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2774 if (IPPROTO_UDP == ip->protocol) {
2775 struct udphdr *udp =
2776 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2777 (ip->ihl << 2));
96838a40 2778 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2779 offset = (uint8_t *)udp + 8 - skb->data;
2780 length = skb->len - offset;
2781
2782 return e1000_mng_write_dhcp_info(hw,
96838a40 2783 (uint8_t *)udp + 8,
2d7edb92
MC		 2784 length);
2785 }
2786 }
2787 }
2788 }
2789 return 0;
2790}
2791
1da177e4
LT		 2792#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2793static int
2794e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2795{
60490fe0 2796 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2797 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2798 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2799 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2800 unsigned int tx_flags = 0;
2801 unsigned int len = skb->len;
2802 unsigned long flags;
2803 unsigned int nr_frags = 0;
2804 unsigned int mss = 0;
2805 int count = 0;
76c224bc 2806 int tso;
1da177e4
LT		 2807 unsigned int f;
2808 len -= skb->data_len;
2809
581d708e 2810 tx_ring = adapter->tx_ring;
24025e4e 2811
581d708e 2812 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2813 dev_kfree_skb_any(skb);
2814 return NETDEV_TX_OK;
2815 }
2816
2817#ifdef NETIF_F_TSO
2818 mss = skb_shinfo(skb)->tso_size;
76c224bc 2819 /* The controller does a simple calculation to
1da177e4
LT		 2820 * make sure there is enough room in the FIFO before
2821 * initiating the DMA for each buffer. The calc is:
2822 * 4 = ceil(buffer len/mss). To make sure we don't
2823 * overrun the FIFO, adjust the max buffer len if mss
2824 * drops. */
96838a40 2825 if (mss) {
9a3056da 2826 uint8_t hdr_len;
1da177e4
LT		 2827 max_per_txd = min(mss << 2, max_per_txd);
2828 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2829
9f687888 2830 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2831 * points to just header, pull a few bytes of payload from
2832 * frags into skb->data */
2833 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2834 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2835 switch (adapter->hw.mac_type) {
2836 unsigned int pull_size;
2837 case e1000_82571:
2838 case e1000_82572:
2839 case e1000_82573:
2840 pull_size = min((unsigned int)4, skb->data_len);
2841 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 2842 DPRINTK(DRV, ERR,
9f687888
JK		 2843 "__pskb_pull_tail failed.\n");
2844 dev_kfree_skb_any(skb);
749dfc70 2845 return NETDEV_TX_OK;
9f687888
JK		 2846 }
2847 len = skb->len - skb->data_len;
2848 break;
2849 default:
2850 /* do nothing */
2851 break;
d74bbd3b 2852 }
9a3056da 2853 }
1da177e4
LT		 2854 }
2855
9a3056da 2856 /* reserve a descriptor for the offload context */
96838a40 2857 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2858 count++;
2648345f 2859 count++;
1da177e4 2860#else
96838a40 2861 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2862 count++;
2863#endif
fd803241
JK		 2864
2865#ifdef NETIF_F_TSO
2866 /* Controller Erratum workaround */
2867 if (!skb->data_len && tx_ring->last_tx_tso &&
0f15a8fa 2868 !skb_shinfo(skb)->tso_size)
fd803241
JK		 2869 count++;
2870#endif
2871
1da177e4
LT		 2872 count += TXD_USE_COUNT(len, max_txd_pwr);
2873
96838a40 2874 if (adapter->pcix_82544)
1da177e4
LT		 2875 count++;
2876
96838a40 2877 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2878 * in PCI-X mode, so add one more descriptor to the count
2879 */
96838a40 2880 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2881 (len > 2015)))
2882 count++;
2883
1da177e4 2884 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2885 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2886 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2887 max_txd_pwr);
96838a40 2888 if (adapter->pcix_82544)
1da177e4
LT		 2889 count += nr_frags;
2890
0f15a8fa
JK		 2891
2892 if (adapter->hw.tx_pkt_filtering &&
2893 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 2894 e1000_transfer_dhcp_info(adapter, skb);
2895
581d708e
MC		 2896 local_irq_save(flags);
2897 if (!spin_trylock(&tx_ring->tx_lock)) {
2898 /* Collision - tell upper layer to requeue */
2899 local_irq_restore(flags);
2900 return NETDEV_TX_LOCKED;
2901 }
1da177e4
LT		 2902
2903 /* need: count + 2 desc gap to keep tail from touching
2904 * head, otherwise try next time */
581d708e 2905 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2906 netif_stop_queue(netdev);
581d708e 2907 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2908 return NETDEV_TX_BUSY;
2909 }
2910
96838a40
JB		 2911 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2912 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 2913 netif_stop_queue(netdev);
2914 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2915 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2916 return NETDEV_TX_BUSY;
2917 }
2918 }
2919
96838a40 2920 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 2921 tx_flags |= E1000_TX_FLAGS_VLAN;
2922 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2923 }
2924
581d708e 2925 first = tx_ring->next_to_use;
96838a40 2926
581d708e 2927 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2928 if (tso < 0) {
2929 dev_kfree_skb_any(skb);
581d708e 2930 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2931 return NETDEV_TX_OK;
2932 }
2933
fd803241
JK		 2934 if (likely(tso)) {
2935 tx_ring->last_tx_tso = 1;
1da177e4 2936 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 2937 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 2938 tx_flags |= E1000_TX_FLAGS_CSUM;
2939
2d7edb92 2940 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 2941 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 2942 * no longer assume, we must. */
60828236 2943 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 2944 tx_flags |= E1000_TX_FLAGS_IPV4;
2945
581d708e
MC		 2946 e1000_tx_queue(adapter, tx_ring, tx_flags,
2947 e1000_tx_map(adapter, tx_ring, skb, first,
2948 max_per_txd, nr_frags, mss));
1da177e4
LT		 2949
2950 netdev->trans_start = jiffies;
2951
2952 /* Make sure there is space in the ring for the next send. */
581d708e 2953 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 2954 netif_stop_queue(netdev);
2955
581d708e 2956 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2957 return NETDEV_TX_OK;
2958}
2959
2960/**
2961 * e1000_tx_timeout - Respond to a Tx Hang
2962 * @netdev: network interface device structure
2963 **/
2964
2965static void
2966e1000_tx_timeout(struct net_device *netdev)
2967{
60490fe0 2968 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2969
2970 /* Do the reset outside of interrupt context */
87041639
JK		 2971 adapter->tx_timeout_count++;
2972 schedule_work(&adapter->reset_task);
1da177e4
LT		 2973}
2974
2975static void
87041639 2976e1000_reset_task(struct net_device *netdev)
1da177e4 2977{
60490fe0 2978 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2979
2db10a08 2980 e1000_reinit_locked(adapter);
1da177e4
LT		 2981}
2982
2983/**
2984 * e1000_get_stats - Get System Network Statistics
2985 * @netdev: network interface device structure
2986 *
2987 * Returns the address of the device statistics structure.
2988 * The statistics are actually updated from the timer callback.
2989 **/
2990
2991static struct net_device_stats *
2992e1000_get_stats(struct net_device *netdev)
2993{
60490fe0 2994 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2995
6b7660cd 2996 /* only return the current stats */
1da177e4
LT		 2997 return &adapter->net_stats;
2998}
2999
3000/**
3001 * e1000_change_mtu - Change the Maximum Transfer Unit
3002 * @netdev: network interface device structure
3003 * @new_mtu: new value for maximum frame size
3004 *
3005 * Returns 0 on success, negative on failure
3006 **/
3007
3008static int
3009e1000_change_mtu(struct net_device *netdev, int new_mtu)
3010{
60490fe0 3011 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3012 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3013 uint16_t eeprom_data = 0;
1da177e4 3014
96838a40
JB		 3015 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3016 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3017 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3018 return -EINVAL;
2d7edb92 3019 }
1da177e4 3020
997f5cbd
JK		 3021 /* Adapter-specific max frame size limits. */
3022 switch (adapter->hw.mac_type) {
9e2feace 3023 case e1000_undefined ... e1000_82542_rev2_1:
997f5cbd
JK		 3024 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3025 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3026 return -EINVAL;
2d7edb92 3027 }
997f5cbd 3028 break;
85b22eb6
JK		 3029 case e1000_82573:
3030 /* only enable jumbo frames if ASPM is disabled completely
3031 * this means both bits must be zero in 0x1A bits 3:2 */
3032 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3033 &eeprom_data);
3034 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3035 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3036 DPRINTK(PROBE, ERR,
3037 "Jumbo Frames not supported.\n");
3038 return -EINVAL;
3039 }
3040 break;
3041 }
3042 /* fall through to get support */
997f5cbd
JK		 3043 case e1000_82571:
3044 case e1000_82572:
87041639 3045 case e1000_80003es2lan:
997f5cbd
JK		 3046#define MAX_STD_JUMBO_FRAME_SIZE 9234
3047 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3048 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3049 return -EINVAL;
3050 }
3051 break;
3052 default:
3053 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3054 break;
1da177e4
LT		 3055 }
3056
9e2feace
AK		 3057 /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3058 * means we reserve 2 more, this pushes us to allocate from the next
3059 * larger slab size
3060 * i.e. RXBUFFER_2048 --> size-4096 slab */
3061
3062 if (max_frame <= E1000_RXBUFFER_256)
3063 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3064 else if (max_frame <= E1000_RXBUFFER_512)
3065 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3066 else if (max_frame <= E1000_RXBUFFER_1024)
3067 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3068 else if (max_frame <= E1000_RXBUFFER_2048)
3069 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3070 else if (max_frame <= E1000_RXBUFFER_4096)
3071 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3072 else if (max_frame <= E1000_RXBUFFER_8192)
3073 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3074 else if (max_frame <= E1000_RXBUFFER_16384)
3075 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3076
3077 /* adjust allocation if LPE protects us, and we aren't using SBP */
3078#define MAXIMUM_ETHERNET_VLAN_SIZE 1522
3079 if (!adapter->hw.tbi_compatibility_on &&
3080 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3081 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3082 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3083
2d7edb92
MC		 3084 netdev->mtu = new_mtu;
3085
2db10a08
AK		 3086 if (netif_running(netdev))
3087 e1000_reinit_locked(adapter);
1da177e4 3088
1da177e4
LT		 3089 adapter->hw.max_frame_size = max_frame;
3090
3091 return 0;
3092}
3093
3094/**
3095 * e1000_update_stats - Update the board statistics counters
3096 * @adapter: board private structure
3097 **/
3098
3099void
3100e1000_update_stats(struct e1000_adapter *adapter)
3101{
3102 struct e1000_hw *hw = &adapter->hw;
a487a8f7 3103 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3104 unsigned long flags;
3105 uint16_t phy_tmp;
3106
3107#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3108
a487a8f7
AK		 3109 /*
3110 * Prevent stats update while adapter is being reset, or if the pci
3111 * connection is down.
3112 */
9026729b 3113 if (adapter->link_speed == 0)
a487a8f7
AK		 3114 return;
3115 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
9026729b
AK		 3116 return;
3117
1da177e4
LT		 3118 spin_lock_irqsave(&adapter->stats_lock, flags);
3119
3120 /* these counters are modified from e1000_adjust_tbi_stats,
3121 * called from the interrupt context, so they must only
3122 * be written while holding adapter->stats_lock
3123 */
3124
3125 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3126 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3127 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3128 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3129 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3130 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3131 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3132 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3133 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3134 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3135 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3136 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3137 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3138
3139 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3140 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3141 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3142 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3143 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3144 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3145 adapter->stats.dc += E1000_READ_REG(hw, DC);
3146 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3147 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3148 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3149 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3150 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3151 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3152 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3153 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3154 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3155 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3156 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3157 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3158 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3159 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3160 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3161 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3162 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3163 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3164 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3165 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3166 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3167 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3168 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3169 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3170 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3171 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3172 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3173
3174 /* used for adaptive IFS */
3175
3176 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3177 adapter->stats.tpt += hw->tx_packet_delta;
3178 hw->collision_delta = E1000_READ_REG(hw, COLC);
3179 adapter->stats.colc += hw->collision_delta;
3180
96838a40 3181 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3182 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3183 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3184 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3185 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3186 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3187 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3188 }
96838a40 3189 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3190 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3191 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3192 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3193 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3194 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3195 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3196 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3197 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3198 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3199 }
1da177e4
LT		 3200
3201 /* Fill out the OS statistics structure */
3202
3203 adapter->net_stats.rx_packets = adapter->stats.gprc;
3204 adapter->net_stats.tx_packets = adapter->stats.gptc;
3205 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3206 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3207 adapter->net_stats.multicast = adapter->stats.mprc;
3208 adapter->net_stats.collisions = adapter->stats.colc;
3209
3210 /* Rx Errors */
3211
87041639
JK		 3212 /* RLEC on some newer hardware can be incorrect so build
3213 * our own version based on RUC and ROC */
1da177e4
LT		 3214 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3215 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3216 adapter->stats.ruc + adapter->stats.roc +
3217 adapter->stats.cexterr;
87041639
JK		 3218 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3219 adapter->stats.roc;
1da177e4
LT		 3220 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3221 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3222 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3223
3224 /* Tx Errors */
3225
3226 adapter->net_stats.tx_errors = adapter->stats.ecol +
3227 adapter->stats.latecol;
3228 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3229 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3230 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3231
3232 /* Tx Dropped needs to be maintained elsewhere */
3233
3234 /* Phy Stats */
3235
96838a40
JB		 3236 if (hw->media_type == e1000_media_type_copper) {
3237 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3238 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3239 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3240 adapter->phy_stats.idle_errors += phy_tmp;
3241 }
3242
96838a40 3243 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3244 (hw->phy_type == e1000_phy_m88) &&
3245 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3246 adapter->phy_stats.receive_errors += phy_tmp;
3247 }
3248
3249 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3250}
3251
3252/**
3253 * e1000_intr - Interrupt Handler
3254 * @irq: interrupt number
3255 * @data: pointer to a network interface device structure
3256 * @pt_regs: CPU registers structure
3257 **/
3258
3259static irqreturn_t
3260e1000_intr(int irq, void *data, struct pt_regs *regs)
3261{
3262 struct net_device *netdev = data;
60490fe0 3263 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3264 struct e1000_hw *hw = &adapter->hw;
87041639 3265 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3266#ifndef CONFIG_E1000_NAPI
581d708e 3267 int i;
1e613fd9
JK		 3268#else
3269 /* Interrupt Auto-Mask...upon reading ICR,
3270 * interrupts are masked. No need for the
3271 * IMC write, but it does mean we should
3272 * account for it ASAP. */
3273 if (likely(hw->mac_type >= e1000_82571))
3274 atomic_inc(&adapter->irq_sem);
be2b28ed 3275#endif
1da177e4 3276
1e613fd9
JK		 3277 if (unlikely(!icr)) {
3278#ifdef CONFIG_E1000_NAPI
3279 if (hw->mac_type >= e1000_82571)
3280 e1000_irq_enable(adapter);
3281#endif
1da177e4 3282 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3283 }
1da177e4 3284
96838a40 3285 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3286 hw->get_link_status = 1;
87041639
JK		 3287 /* 80003ES2LAN workaround--
3288 * For packet buffer work-around on link down event;
3289 * disable receives here in the ISR and
3290 * reset adapter in watchdog
3291 */
3292 if (netif_carrier_ok(netdev) &&
3293 (adapter->hw.mac_type == e1000_80003es2lan)) {
3294 /* disable receives */
3295 rctl = E1000_READ_REG(hw, RCTL);
3296 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3297 }
1da177e4
LT		 3298 mod_timer(&adapter->watchdog_timer, jiffies);
3299 }
3300
3301#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3302 if (unlikely(hw->mac_type < e1000_82571)) {
3303 atomic_inc(&adapter->irq_sem);
3304 E1000_WRITE_REG(hw, IMC, ~0);
3305 E1000_WRITE_FLUSH(hw);
3306 }
581d708e
MC		 3307 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3308 __netif_rx_schedule(&adapter->polling_netdev[0]);
3309 else
3310 e1000_irq_enable(adapter);
c1605eb3 3311#else
1da177e4 3312 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3313 * Due to Hub Link bus being occupied, an interrupt
3314 * de-assertion message is not able to be sent.
3315 * When an interrupt assertion message is generated later,
3316 * two messages are re-ordered and sent out.
3317 * That causes APIC to think 82547 is in de-assertion
3318 * state, while 82547 is in assertion state, resulting
3319 * in dead lock. Writing IMC forces 82547 into
3320 * de-assertion state.
3321 */
3322 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3323 atomic_inc(&adapter->irq_sem);
2648345f 3324 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3325 }
3326
96838a40
JB		 3327 for (i = 0; i < E1000_MAX_INTR; i++)
3328 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3329 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3330 break;
3331
96838a40 3332 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3333 e1000_irq_enable(adapter);
581d708e 3334
c1605eb3 3335#endif
1da177e4
LT		 3336
3337 return IRQ_HANDLED;
3338}
3339
3340#ifdef CONFIG_E1000_NAPI
3341/**
3342 * e1000_clean - NAPI Rx polling callback
3343 * @adapter: board private structure
3344 **/
3345
3346static int
581d708e 3347e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3348{
581d708e
MC		 3349 struct e1000_adapter *adapter;
3350 int work_to_do = min(*budget, poll_dev->quota);
38bd3b26 3351 int tx_cleaned = 0, i = 0, work_done = 0;
581d708e
MC		 3352
3353 /* Must NOT use netdev_priv macro here. */
3354 adapter = poll_dev->priv;
3355
3356 /* Keep link state information with original netdev */
3357 if (!netif_carrier_ok(adapter->netdev))
3358 goto quit_polling;
2648345f 3359
581d708e
MC		 3360 while (poll_dev != &adapter->polling_netdev[i]) {
3361 i++;
5d9428de 3362 BUG_ON(i == adapter->num_rx_queues);
581d708e
MC		 3363 }
3364
8241e35e
JK		 3365 if (likely(adapter->num_tx_queues == 1)) {
3366 /* e1000_clean is called per-cpu. This lock protects
3367 * tx_ring[0] from being cleaned by multiple cpus
3368 * simultaneously. A failure obtaining the lock means
3369 * tx_ring[0] is currently being cleaned anyway. */
3370 if (spin_trylock(&adapter->tx_queue_lock)) {
3371 tx_cleaned = e1000_clean_tx_irq(adapter,
3372 &adapter->tx_ring[0]);
3373 spin_unlock(&adapter->tx_queue_lock);
3374 }
3375 } else
3376 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3377
581d708e
MC		 3378 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3379 &work_done, work_to_do);
1da177e4
LT		 3380
3381 *budget -= work_done;
581d708e 3382 poll_dev->quota -= work_done;
96838a40 3383
2b02893e 3384 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3385 if ((!tx_cleaned && (work_done == 0)) ||
581d708e
MC		 3386 !netif_running(adapter->netdev)) {
3387quit_polling:
3388 netif_rx_complete(poll_dev);
1da177e4
LT		 3389 e1000_irq_enable(adapter);
3390 return 0;
3391 }
3392
3393 return 1;
3394}
3395
3396#endif
3397/**
3398 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3399 * @adapter: board private structure
3400 **/
3401
3402static boolean_t
581d708e
MC		 3403e1000_clean_tx_irq(struct e1000_adapter *adapter,
3404 struct e1000_tx_ring *tx_ring)
1da177e4 3405{
1da177e4
LT		 3406 struct net_device *netdev = adapter->netdev;
3407 struct e1000_tx_desc *tx_desc, *eop_desc;
3408 struct e1000_buffer *buffer_info;
3409 unsigned int i, eop;
2a1af5d7
JK		 3410#ifdef CONFIG_E1000_NAPI
3411 unsigned int count = 0;
3412#endif
1da177e4
LT		 3413 boolean_t cleaned = FALSE;
3414
3415 i = tx_ring->next_to_clean;
3416 eop = tx_ring->buffer_info[i].next_to_watch;
3417 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3418
581d708e 3419 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3420 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3421 tx_desc = E1000_TX_DESC(*tx_ring, i);
3422 buffer_info = &tx_ring->buffer_info[i];
3423 cleaned = (i == eop);
3424
fd803241 3425 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3426 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3427
96838a40 3428 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3429 }
581d708e 3430
7bfa4816 3431
1da177e4
LT		 3432 eop = tx_ring->buffer_info[i].next_to_watch;
3433 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3434#ifdef CONFIG_E1000_NAPI
3435#define E1000_TX_WEIGHT 64
3436 /* weight of a sort for tx, to avoid endless transmit cleanup */
3437 if (count++ == E1000_TX_WEIGHT) break;
3438#endif
1da177e4
LT		 3439 }
3440
3441 tx_ring->next_to_clean = i;
3442
77b2aad5 3443#define TX_WAKE_THRESHOLD 32
96838a40 3444 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
77b2aad5
AK		 3445 netif_carrier_ok(netdev))) {
3446 spin_lock(&tx_ring->tx_lock);
3447 if (netif_queue_stopped(netdev) &&
3448 (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
3449 netif_wake_queue(netdev);
3450 spin_unlock(&tx_ring->tx_lock);
3451 }
2648345f 3452
581d708e 3453 if (adapter->detect_tx_hung) {
2648345f 3454 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3455 * check with the clearing of time_stamp and movement of i */
3456 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3457 if (tx_ring->buffer_info[eop].dma &&
3458 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3459 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3460 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3461 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3462
3463 /* detected Tx unit hang */
c6963ef5 3464 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3465 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3466 " TDH <%x>\n"
3467 " TDT <%x>\n"
3468 " next_to_use <%x>\n"
3469 " next_to_clean <%x>\n"
3470 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3471 " time_stamp <%lx>\n"
3472 " next_to_watch <%x>\n"
3473 " jiffies <%lx>\n"
3474 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3475 (unsigned long)((tx_ring - adapter->tx_ring) /
3476 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3477 readl(adapter->hw.hw_addr + tx_ring->tdh),
3478 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3479 tx_ring->next_to_use,
392137fa
JK		 3480 tx_ring->next_to_clean,
3481 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3482 eop,
3483 jiffies,
3484 eop_desc->upper.fields.status);
1da177e4 3485 netif_stop_queue(netdev);
70b8f1e1 3486 }
1da177e4 3487 }
1da177e4
LT		 3488 return cleaned;
3489}
3490
3491/**
3492 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3493 * @adapter: board private structure
3494 * @status_err: receive descriptor status and error fields
3495 * @csum: receive descriptor csum field
3496 * @sk_buff: socket buffer with received data
1da177e4
LT		 3497 **/
3498
e619d523 3499static void
1da177e4 3500e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3501 uint32_t status_err, uint32_t csum,
3502 struct sk_buff *skb)
1da177e4 3503{
2d7edb92
MC		 3504 uint16_t status = (uint16_t)status_err;
3505 uint8_t errors = (uint8_t)(status_err >> 24);
3506 skb->ip_summed = CHECKSUM_NONE;
3507
1da177e4 3508 /* 82543 or newer only */
96838a40 3509 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3510 /* Ignore Checksum bit is set */
96838a40 3511 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3512 /* TCP/UDP checksum error bit is set */
96838a40 3513 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3514 /* let the stack verify checksum errors */
1da177e4 3515 adapter->hw_csum_err++;
2d7edb92
MC		 3516 return;
3517 }
3518 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3519 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3520 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3521 return;
1da177e4 3522 } else {
96838a40 3523 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3524 return;
3525 }
3526 /* It must be a TCP or UDP packet with a valid checksum */
3527 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3528 /* TCP checksum is good */
3529 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3530 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3531 /* IP fragment with UDP payload */
3532 /* Hardware complements the payload checksum, so we undo it
3533 * and then put the value in host order for further stack use.
3534 */
3535 csum = ntohl(csum ^ 0xFFFF);
3536 skb->csum = csum;
3537 skb->ip_summed = CHECKSUM_HW;
1da177e4 3538 }
2d7edb92 3539 adapter->hw_csum_good++;
1da177e4
LT		 3540}
3541
3542/**
2d7edb92 3543 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3544 * @adapter: board private structure
3545 **/
3546
3547static boolean_t
3548#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3549e1000_clean_rx_irq(struct e1000_adapter *adapter,
3550 struct e1000_rx_ring *rx_ring,
3551 int *work_done, int work_to_do)
1da177e4 3552#else
581d708e
MC		 3553e1000_clean_rx_irq(struct e1000_adapter *adapter,
3554 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3555#endif
3556{
1da177e4
LT		 3557 struct net_device *netdev = adapter->netdev;
3558 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3559 struct e1000_rx_desc *rx_desc, *next_rxd;
3560 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3561 unsigned long flags;
3562 uint32_t length;
3563 uint8_t last_byte;
3564 unsigned int i;
72d64a43 3565 int cleaned_count = 0;
a1415ee6 3566 boolean_t cleaned = FALSE;
1da177e4
LT		 3567
3568 i = rx_ring->next_to_clean;
3569 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3570 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3571
b92ff8ee 3572 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 3573 struct sk_buff *skb;
a292ca6e 3574 u8 status;
1da177e4 3575#ifdef CONFIG_E1000_NAPI
96838a40 3576 if (*work_done >= work_to_do)
1da177e4
LT		 3577 break;
3578 (*work_done)++;
3579#endif
a292ca6e 3580 status = rx_desc->status;
b92ff8ee 3581 skb = buffer_info->skb;
86c3d59f
JB		 3582 buffer_info->skb = NULL;
3583
30320be8
JK		 3584 prefetch(skb->data - NET_IP_ALIGN);
3585
86c3d59f
JB		 3586 if (++i == rx_ring->count) i = 0;
3587 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3588 prefetch(next_rxd);
3589
86c3d59f 3590 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3591
72d64a43
JK		 3592 cleaned = TRUE;
3593 cleaned_count++;
a292ca6e
JK		 3594 pci_unmap_single(pdev,
3595 buffer_info->dma,
3596 buffer_info->length,
1da177e4
LT		 3597 PCI_DMA_FROMDEVICE);
3598
1da177e4
LT		 3599 length = le16_to_cpu(rx_desc->length);
3600
a1415ee6
JK		 3601 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3602 /* All receives must fit into a single buffer */
3603 E1000_DBG("%s: Receive packet consumed multiple"
3604 " buffers\n", netdev->name);
864c4e45
AK		 3605 /* recycle */
3606 buffer_info-> skb = skb;
1da177e4
LT		 3607 goto next_desc;
3608 }
3609
96838a40 3610 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3611 last_byte = *(skb->data + length - 1);
b92ff8ee 3612 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3613 rx_desc->errors, length, last_byte)) {
3614 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3615 e1000_tbi_adjust_stats(&adapter->hw,
3616 &adapter->stats,
1da177e4
LT		 3617 length, skb->data);
3618 spin_unlock_irqrestore(&adapter->stats_lock,
3619 flags);
3620 length--;
3621 } else {
9e2feace
AK		 3622 /* recycle */
3623 buffer_info->skb = skb;
1da177e4
LT		 3624 goto next_desc;
3625 }
1cb5821f 3626 }
1da177e4 3627
a292ca6e
JK		 3628 /* code added for copybreak, this should improve
3629 * performance for small packets with large amounts
3630 * of reassembly being done in the stack */
3631#define E1000_CB_LENGTH 256
a1415ee6 3632 if (length < E1000_CB_LENGTH) {
a292ca6e
JK		 3633 struct sk_buff *new_skb =
3634 dev_alloc_skb(length + NET_IP_ALIGN);
3635 if (new_skb) {
3636 skb_reserve(new_skb, NET_IP_ALIGN);
3637 new_skb->dev = netdev;
3638 memcpy(new_skb->data - NET_IP_ALIGN,
3639 skb->data - NET_IP_ALIGN,
3640 length + NET_IP_ALIGN);
3641 /* save the skb in buffer_info as good */
3642 buffer_info->skb = skb;
3643 skb = new_skb;
3644 skb_put(skb, length);
3645 }
a1415ee6
JK		 3646 } else
3647 skb_put(skb, length);
a292ca6e
JK		 3648
3649 /* end copybreak code */
1da177e4
LT		 3650
3651 /* Receive Checksum Offload */
a292ca6e
JK		 3652 e1000_rx_checksum(adapter,
3653 (uint32_t)(status) |
2d7edb92 3654 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3655 le16_to_cpu(rx_desc->csum), skb);
96838a40 3656
1da177e4
LT		 3657 skb->protocol = eth_type_trans(skb, netdev);
3658#ifdef CONFIG_E1000_NAPI
96838a40 3659 if (unlikely(adapter->vlgrp &&
a292ca6e 3660 (status & E1000_RXD_STAT_VP))) {
1da177e4 3661 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3662 le16_to_cpu(rx_desc->special) &
3663 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3664 } else {
3665 netif_receive_skb(skb);
3666 }
3667#else /* CONFIG_E1000_NAPI */
96838a40 3668 if (unlikely(adapter->vlgrp &&
b92ff8ee 3669 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3670 vlan_hwaccel_rx(skb, adapter->vlgrp,
3671 le16_to_cpu(rx_desc->special) &
3672 E1000_RXD_SPC_VLAN_MASK);
3673 } else {
3674 netif_rx(skb);
3675 }
3676#endif /* CONFIG_E1000_NAPI */
3677 netdev->last_rx = jiffies;
3678
3679next_desc:
3680 rx_desc->status = 0;
1da177e4 3681
72d64a43
JK		 3682 /* return some buffers to hardware, one at a time is too slow */
3683 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3684 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3685 cleaned_count = 0;
3686 }
3687
30320be8 3688 /* use prefetched values */
86c3d59f
JB		 3689 rx_desc = next_rxd;
3690 buffer_info = next_buffer;
1da177e4 3691 }
1da177e4 3692 rx_ring->next_to_clean = i;
72d64a43
JK		 3693
3694 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3695 if (cleaned_count)
3696 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3697
3698 return cleaned;
3699}
3700
3701/**
3702 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3703 * @adapter: board private structure
3704 **/
3705
3706static boolean_t
3707#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3708e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3709 struct e1000_rx_ring *rx_ring,
3710 int *work_done, int work_to_do)
2d7edb92 3711#else
581d708e
MC		 3712e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3713 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3714#endif
3715{
86c3d59f 3716 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3717 struct net_device *netdev = adapter->netdev;
3718 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3719 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3720 struct e1000_ps_page *ps_page;
3721 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 3722 struct sk_buff *skb;
2d7edb92
MC		 3723 unsigned int i, j;
3724 uint32_t length, staterr;
72d64a43 3725 int cleaned_count = 0;
2d7edb92
MC		 3726 boolean_t cleaned = FALSE;
3727
3728 i = rx_ring->next_to_clean;
3729 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3730 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 3731 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 3732
96838a40 3733 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 3734 ps_page = &rx_ring->ps_page[i];
3735 ps_page_dma = &rx_ring->ps_page_dma[i];
3736#ifdef CONFIG_E1000_NAPI
96838a40 3737 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3738 break;
3739 (*work_done)++;
3740#endif
86c3d59f
JB		 3741 skb = buffer_info->skb;
3742
30320be8
JK		 3743 /* in the packet split case this is header only */
3744 prefetch(skb->data - NET_IP_ALIGN);
3745
86c3d59f
JB		 3746 if (++i == rx_ring->count) i = 0;
3747 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3748 prefetch(next_rxd);
3749
86c3d59f 3750 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 3751
2d7edb92 3752 cleaned = TRUE;
72d64a43 3753 cleaned_count++;
2d7edb92
MC		 3754 pci_unmap_single(pdev, buffer_info->dma,
3755 buffer_info->length,
3756 PCI_DMA_FROMDEVICE);
3757
96838a40 3758 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3759 E1000_DBG("%s: Packet Split buffers didn't pick up"
3760 " the full packet\n", netdev->name);
3761 dev_kfree_skb_irq(skb);
3762 goto next_desc;
3763 }
1da177e4 3764
96838a40 3765 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3766 dev_kfree_skb_irq(skb);
3767 goto next_desc;
3768 }
3769
3770 length = le16_to_cpu(rx_desc->wb.middle.length0);
3771
96838a40 3772 if (unlikely(!length)) {
2d7edb92
MC		 3773 E1000_DBG("%s: Last part of the packet spanning"
3774 " multiple descriptors\n", netdev->name);
3775 dev_kfree_skb_irq(skb);
3776 goto next_desc;
3777 }
3778
3779 /* Good Receive */
3780 skb_put(skb, length);
3781
dc7c6add
JK		 3782 {
3783 /* this looks ugly, but it seems compiler issues make it
3784 more efficient than reusing j */
3785 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3786
3787 /* page alloc/put takes too long and effects small packet
3788 * throughput, so unsplit small packets and save the alloc/put*/
9e2feace 3789 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 3790 u8 *vaddr;
76c224bc 3791 /* there is no documentation about how to call
dc7c6add
JK		 3792 * kmap_atomic, so we can't hold the mapping
3793 * very long */
3794 pci_dma_sync_single_for_cpu(pdev,
3795 ps_page_dma->ps_page_dma[0],
3796 PAGE_SIZE,
3797 PCI_DMA_FROMDEVICE);
3798 vaddr = kmap_atomic(ps_page->ps_page[0],
3799 KM_SKB_DATA_SOFTIRQ);
3800 memcpy(skb->tail, vaddr, l1);
3801 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3802 pci_dma_sync_single_for_device(pdev,
3803 ps_page_dma->ps_page_dma[0],
3804 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3805 skb_put(skb, l1);
3806 length += l1;
3807 goto copydone;
3808 } /* if */
3809 }
3810
96838a40 3811 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3812 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3813 break;
2d7edb92
MC		 3814 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3815 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3816 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3817 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3818 length);
2d7edb92 3819 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3820 skb->len += length;
3821 skb->data_len += length;
5d51b80f 3822 skb->truesize += length;
2d7edb92
MC		 3823 }
3824
dc7c6add 3825copydone:
2d7edb92 3826 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 3827 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 3828 skb->protocol = eth_type_trans(skb, netdev);
3829
96838a40 3830 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 3831 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 3832 adapter->rx_hdr_split++;
2d7edb92 3833#ifdef CONFIG_E1000_NAPI
96838a40 3834 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3835 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3836 le16_to_cpu(rx_desc->wb.middle.vlan) &
3837 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3838 } else {
3839 netif_receive_skb(skb);
3840 }
3841#else /* CONFIG_E1000_NAPI */
96838a40 3842 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3843 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3844 le16_to_cpu(rx_desc->wb.middle.vlan) &
3845 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3846 } else {
3847 netif_rx(skb);
3848 }
3849#endif /* CONFIG_E1000_NAPI */
3850 netdev->last_rx = jiffies;
3851
3852next_desc:
c3d7a3a4 3853 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 3854 buffer_info->skb = NULL;
2d7edb92 3855
72d64a43
JK		 3856 /* return some buffers to hardware, one at a time is too slow */
3857 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3858 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3859 cleaned_count = 0;
3860 }
3861
30320be8 3862 /* use prefetched values */
86c3d59f
JB		 3863 rx_desc = next_rxd;
3864 buffer_info = next_buffer;
3865
683a38f3 3866 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3867 }
3868 rx_ring->next_to_clean = i;
72d64a43
JK		 3869
3870 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3871 if (cleaned_count)
3872 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3873
3874 return cleaned;
3875}
3876
3877/**
2d7edb92 3878 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3879 * @adapter: address of board private structure
3880 **/
3881
3882static void
581d708e 3883e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3884 struct e1000_rx_ring *rx_ring,
a292ca6e 3885 int cleaned_count)
1da177e4 3886{
1da177e4
LT		 3887 struct net_device *netdev = adapter->netdev;
3888 struct pci_dev *pdev = adapter->pdev;
3889 struct e1000_rx_desc *rx_desc;
3890 struct e1000_buffer *buffer_info;
3891 struct sk_buff *skb;
2648345f
MC		 3892 unsigned int i;
3893 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3894
3895 i = rx_ring->next_to_use;
3896 buffer_info = &rx_ring->buffer_info[i];
3897
a292ca6e
JK		 3898 while (cleaned_count--) {
3899 if (!(skb = buffer_info->skb))
3900 skb = dev_alloc_skb(bufsz);
3901 else {
3902 skb_trim(skb, 0);
3903 goto map_skb;
3904 }
3905
96838a40 3906 if (unlikely(!skb)) {
1da177e4 3907 /* Better luck next round */
72d64a43 3908 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3909 break;
3910 }
3911
2648345f 3912 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3913 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3914 struct sk_buff *oldskb = skb;
2648345f
MC		 3915 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3916 "at %p\n", bufsz, skb->data);
3917 /* Try again, without freeing the previous */
1da177e4 3918 skb = dev_alloc_skb(bufsz);
2648345f 3919 /* Failed allocation, critical failure */
1da177e4
LT		 3920 if (!skb) {
3921 dev_kfree_skb(oldskb);
3922 break;
3923 }
2648345f 3924
1da177e4
LT		 3925 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3926 /* give up */
3927 dev_kfree_skb(skb);
3928 dev_kfree_skb(oldskb);
3929 break; /* while !buffer_info->skb */
3930 } else {
2648345f 3931 /* Use new allocation */
1da177e4
LT		 3932 dev_kfree_skb(oldskb);
3933 }
3934 }
1da177e4
LT		 3935 /* Make buffer alignment 2 beyond a 16 byte boundary
3936 * this will result in a 16 byte aligned IP header after
3937 * the 14 byte MAC header is removed
3938 */
3939 skb_reserve(skb, NET_IP_ALIGN);
3940
3941 skb->dev = netdev;
3942
3943 buffer_info->skb = skb;
3944 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 3945map_skb:
1da177e4
LT		 3946 buffer_info->dma = pci_map_single(pdev,
3947 skb->data,
3948 adapter->rx_buffer_len,
3949 PCI_DMA_FROMDEVICE);
3950
2648345f
MC		 3951 /* Fix for errata 23, can't cross 64kB boundary */
3952 if (!e1000_check_64k_bound(adapter,
3953 (void *)(unsigned long)buffer_info->dma,
3954 adapter->rx_buffer_len)) {
3955 DPRINTK(RX_ERR, ERR,
3956 "dma align check failed: %u bytes at %p\n",
3957 adapter->rx_buffer_len,
3958 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3959 dev_kfree_skb(skb);
3960 buffer_info->skb = NULL;
3961
2648345f 3962 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3963 adapter->rx_buffer_len,
3964 PCI_DMA_FROMDEVICE);
3965
3966 break; /* while !buffer_info->skb */
3967 }
1da177e4
LT		 3968 rx_desc = E1000_RX_DESC(*rx_ring, i);
3969 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3970
96838a40
JB		 3971 if (unlikely(++i == rx_ring->count))
3972 i = 0;
1da177e4
LT		 3973 buffer_info = &rx_ring->buffer_info[i];
3974 }
3975
b92ff8ee
JB		 3976 if (likely(rx_ring->next_to_use != i)) {
3977 rx_ring->next_to_use = i;
3978 if (unlikely(i-- == 0))
3979 i = (rx_ring->count - 1);
3980
3981 /* Force memory writes to complete before letting h/w
3982 * know there are new descriptors to fetch. (Only
3983 * applicable for weak-ordered memory model archs,
3984 * such as IA-64). */
3985 wmb();
3986 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3987 }
1da177e4
LT		 3988}
3989
2d7edb92
MC		 3990/**
3991 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3992 * @adapter: address of board private structure
3993 **/
3994
3995static void
581d708e 3996e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 3997 struct e1000_rx_ring *rx_ring,
3998 int cleaned_count)
2d7edb92 3999{
2d7edb92
MC		 4000 struct net_device *netdev = adapter->netdev;
4001 struct pci_dev *pdev = adapter->pdev;
4002 union e1000_rx_desc_packet_split *rx_desc;
4003 struct e1000_buffer *buffer_info;
4004 struct e1000_ps_page *ps_page;
4005 struct e1000_ps_page_dma *ps_page_dma;
4006 struct sk_buff *skb;
4007 unsigned int i, j;
4008
4009 i = rx_ring->next_to_use;
4010 buffer_info = &rx_ring->buffer_info[i];
4011 ps_page = &rx_ring->ps_page[i];
4012 ps_page_dma = &rx_ring->ps_page_dma[i];
4013
72d64a43 4014 while (cleaned_count--) {
2d7edb92
MC		 4015 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4016
96838a40 4017 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4018 if (j < adapter->rx_ps_pages) {
4019 if (likely(!ps_page->ps_page[j])) {
4020 ps_page->ps_page[j] =
4021 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4022 if (unlikely(!ps_page->ps_page[j])) {
4023 adapter->alloc_rx_buff_failed++;
e4c811c9 4024 goto no_buffers;
b92ff8ee 4025 }
e4c811c9
MC		 4026 ps_page_dma->ps_page_dma[j] =
4027 pci_map_page(pdev,
4028 ps_page->ps_page[j],
4029 0, PAGE_SIZE,
4030 PCI_DMA_FROMDEVICE);
4031 }
4032 /* Refresh the desc even if buffer_addrs didn't
96838a40 4033 * change because each write-back erases
e4c811c9
MC		 4034 * this info.
4035 */
4036 rx_desc->read.buffer_addr[j+1] =
4037 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4038 } else
4039 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4040 }
4041
4042 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4043
b92ff8ee
JB		 4044 if (unlikely(!skb)) {
4045 adapter->alloc_rx_buff_failed++;
2d7edb92 4046 break;
b92ff8ee 4047 }
2d7edb92
MC		 4048
4049 /* Make buffer alignment 2 beyond a 16 byte boundary
4050 * this will result in a 16 byte aligned IP header after
4051 * the 14 byte MAC header is removed
4052 */
4053 skb_reserve(skb, NET_IP_ALIGN);
4054
4055 skb->dev = netdev;
4056
4057 buffer_info->skb = skb;
4058 buffer_info->length = adapter->rx_ps_bsize0;
4059 buffer_info->dma = pci_map_single(pdev, skb->data,
4060 adapter->rx_ps_bsize0,
4061 PCI_DMA_FROMDEVICE);
4062
4063 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4064
96838a40 4065 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4066 buffer_info = &rx_ring->buffer_info[i];
4067 ps_page = &rx_ring->ps_page[i];
4068 ps_page_dma = &rx_ring->ps_page_dma[i];
4069 }
4070
4071no_buffers:
b92ff8ee
JB		 4072 if (likely(rx_ring->next_to_use != i)) {
4073 rx_ring->next_to_use = i;
4074 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4075
4076 /* Force memory writes to complete before letting h/w
4077 * know there are new descriptors to fetch. (Only
4078 * applicable for weak-ordered memory model archs,
4079 * such as IA-64). */
4080 wmb();
4081 /* Hardware increments by 16 bytes, but packet split
4082 * descriptors are 32 bytes...so we increment tail
4083 * twice as much.
4084 */
4085 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4086 }
2d7edb92
MC		 4087}
4088
1da177e4
LT		 4089/**
4090 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4091 * @adapter:
4092 **/
4093
4094static void
4095e1000_smartspeed(struct e1000_adapter *adapter)
4096{
4097 uint16_t phy_status;
4098 uint16_t phy_ctrl;
4099
96838a40 4100 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4101 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4102 return;
4103
96838a40 4104 if (adapter->smartspeed == 0) {
1da177e4
LT		 4105 /* If Master/Slave config fault is asserted twice,
4106 * we assume back-to-back */
4107 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4108 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4109 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4110 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4111 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4112 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4113 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4114 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4115 phy_ctrl);
4116 adapter->smartspeed++;
96838a40 4117 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4118 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4119 &phy_ctrl)) {
4120 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4121 MII_CR_RESTART_AUTO_NEG);
4122 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4123 phy_ctrl);
4124 }
4125 }
4126 return;
96838a40 4127 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4128 /* If still no link, perhaps using 2/3 pair cable */
4129 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4130 phy_ctrl |= CR_1000T_MS_ENABLE;
4131 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4132 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4133 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4134 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4135 MII_CR_RESTART_AUTO_NEG);
4136 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4137 }
4138 }
4139 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4140 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4141 adapter->smartspeed = 0;
4142}
4143
4144/**
4145 * e1000_ioctl -
4146 * @netdev:
4147 * @ifreq:
4148 * @cmd:
4149 **/
4150
4151static int
4152e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4153{
4154 switch (cmd) {
4155 case SIOCGMIIPHY:
4156 case SIOCGMIIREG:
4157 case SIOCSMIIREG:
4158 return e1000_mii_ioctl(netdev, ifr, cmd);
4159 default:
4160 return -EOPNOTSUPP;
4161 }
4162}
4163
4164/**
4165 * e1000_mii_ioctl -
4166 * @netdev:
4167 * @ifreq:
4168 * @cmd:
4169 **/
4170
4171static int
4172e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4173{
60490fe0 4174 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4175 struct mii_ioctl_data *data = if_mii(ifr);
4176 int retval;
4177 uint16_t mii_reg;
4178 uint16_t spddplx;
97876fc6 4179 unsigned long flags;
1da177e4 4180
96838a40 4181 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4182 return -EOPNOTSUPP;
4183
4184 switch (cmd) {
4185 case SIOCGMIIPHY:
4186 data->phy_id = adapter->hw.phy_addr;
4187 break;
4188 case SIOCGMIIREG:
96838a40 4189 if (!capable(CAP_NET_ADMIN))
1da177e4 4190 return -EPERM;
97876fc6 4191 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4192 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4193 &data->val_out)) {
4194 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4195 return -EIO;
97876fc6
MC		 4196 }
4197 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4198 break;
4199 case SIOCSMIIREG:
96838a40 4200 if (!capable(CAP_NET_ADMIN))
1da177e4 4201 return -EPERM;
96838a40 4202 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4203 return -EFAULT;
4204 mii_reg = data->val_in;
97876fc6 4205 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4206 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4207 mii_reg)) {
4208 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4209 return -EIO;
97876fc6 4210 }
dc86d32a 4211 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4212 switch (data->reg_num) {
4213 case PHY_CTRL:
96838a40 4214 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4215 break;
96838a40 4216 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4217 adapter->hw.autoneg = 1;
4218 adapter->hw.autoneg_advertised = 0x2F;
4219 } else {
4220 if (mii_reg & 0x40)
4221 spddplx = SPEED_1000;
4222 else if (mii_reg & 0x2000)
4223 spddplx = SPEED_100;
4224 else
4225 spddplx = SPEED_10;
4226 spddplx += (mii_reg & 0x100)
cb764326
JK		 4227 ? DUPLEX_FULL :
4228 DUPLEX_HALF;
1da177e4
LT		 4229 retval = e1000_set_spd_dplx(adapter,
4230 spddplx);
96838a40 4231 if (retval) {
97876fc6 4232 spin_unlock_irqrestore(
96838a40 4233 &adapter->stats_lock,
97876fc6 4234 flags);
1da177e4 4235 return retval;
97876fc6 4236 }
1da177e4 4237 }
2db10a08
AK		 4238 if (netif_running(adapter->netdev))
4239 e1000_reinit_locked(adapter);
4240 else
1da177e4
LT		 4241 e1000_reset(adapter);
4242 break;
4243 case M88E1000_PHY_SPEC_CTRL:
4244 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4245 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4246 spin_unlock_irqrestore(
4247 &adapter->stats_lock, flags);
1da177e4 4248 return -EIO;
97876fc6 4249 }
1da177e4
LT		 4250 break;
4251 }
4252 } else {
4253 switch (data->reg_num) {
4254 case PHY_CTRL:
96838a40 4255 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4256 break;
2db10a08
AK		 4257 if (netif_running(adapter->netdev))
4258 e1000_reinit_locked(adapter);
4259 else
1da177e4
LT		 4260 e1000_reset(adapter);
4261 break;
4262 }
4263 }
97876fc6 4264 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4265 break;
4266 default:
4267 return -EOPNOTSUPP;
4268 }
4269 return E1000_SUCCESS;
4270}
4271
4272void
4273e1000_pci_set_mwi(struct e1000_hw *hw)
4274{
4275 struct e1000_adapter *adapter = hw->back;
2648345f 4276 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4277
96838a40 4278 if (ret_val)
2648345f 4279 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4280}
4281
4282void
4283e1000_pci_clear_mwi(struct e1000_hw *hw)
4284{
4285 struct e1000_adapter *adapter = hw->back;
4286
4287 pci_clear_mwi(adapter->pdev);
4288}
4289
4290void
4291e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4292{
4293 struct e1000_adapter *adapter = hw->back;
4294
4295 pci_read_config_word(adapter->pdev, reg, value);
4296}
4297
4298void
4299e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4300{
4301 struct e1000_adapter *adapter = hw->back;
4302
4303 pci_write_config_word(adapter->pdev, reg, *value);
4304}
4305
4306uint32_t
4307e1000_io_read(struct e1000_hw *hw, unsigned long port)
4308{
4309 return inl(port);
4310}
4311
4312void
4313e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4314{
4315 outl(value, port);
4316}
4317
4318static void
4319e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4320{
60490fe0 4321 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4322 uint32_t ctrl, rctl;
4323
4324 e1000_irq_disable(adapter);
4325 adapter->vlgrp = grp;
4326
96838a40 4327 if (grp) {
1da177e4
LT		 4328 /* enable VLAN tag insert/strip */
4329 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4330 ctrl |= E1000_CTRL_VME;
4331 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4332
4333 /* enable VLAN receive filtering */
4334 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4335 rctl |= E1000_RCTL_VFE;
4336 rctl &= ~E1000_RCTL_CFIEN;
4337 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4338 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4339 } else {
4340 /* disable VLAN tag insert/strip */
4341 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4342 ctrl &= ~E1000_CTRL_VME;
4343 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4344
4345 /* disable VLAN filtering */
4346 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4347 rctl &= ~E1000_RCTL_VFE;
4348 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4349 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4350 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4351 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4352 }
1da177e4
LT		 4353 }
4354
4355 e1000_irq_enable(adapter);
4356}
4357
4358static void
4359e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4360{
60490fe0 4361 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4362 uint32_t vfta, index;
96838a40
JB		 4363
4364 if ((adapter->hw.mng_cookie.status &
4365 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4366 (vid == adapter->mng_vlan_id))
2d7edb92 4367 return;
1da177e4
LT		 4368 /* add VID to filter table */
4369 index = (vid >> 5) & 0x7F;
4370 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4371 vfta |= (1 << (vid & 0x1F));
4372 e1000_write_vfta(&adapter->hw, index, vfta);
4373}
4374
4375static void
4376e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4377{
60490fe0 4378 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4379 uint32_t vfta, index;
4380
4381 e1000_irq_disable(adapter);
4382
96838a40 4383 if (adapter->vlgrp)
1da177e4
LT		 4384 adapter->vlgrp->vlan_devices[vid] = NULL;
4385
4386 e1000_irq_enable(adapter);
4387
96838a40
JB		 4388 if ((adapter->hw.mng_cookie.status &
4389 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4390 (vid == adapter->mng_vlan_id)) {
4391 /* release control to f/w */
4392 e1000_release_hw_control(adapter);
2d7edb92 4393 return;
ff147013
JK		 4394 }
4395
1da177e4
LT		 4396 /* remove VID from filter table */
4397 index = (vid >> 5) & 0x7F;
4398 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4399 vfta &= ~(1 << (vid & 0x1F));
4400 e1000_write_vfta(&adapter->hw, index, vfta);
4401}
4402
4403static void
4404e1000_restore_vlan(struct e1000_adapter *adapter)
4405{
4406 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4407
96838a40 4408 if (adapter->vlgrp) {
1da177e4 4409 uint16_t vid;
96838a40
JB		 4410 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4411 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4412 continue;
4413 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4414 }
4415 }
4416}
4417
4418int
4419e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4420{
4421 adapter->hw.autoneg = 0;
4422
6921368f 4423 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4424 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4425 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4426 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4427 return -EINVAL;
4428 }
4429
96838a40 4430 switch (spddplx) {
1da177e4
LT		 4431 case SPEED_10 + DUPLEX_HALF:
4432 adapter->hw.forced_speed_duplex = e1000_10_half;
4433 break;
4434 case SPEED_10 + DUPLEX_FULL:
4435 adapter->hw.forced_speed_duplex = e1000_10_full;
4436 break;
4437 case SPEED_100 + DUPLEX_HALF:
4438 adapter->hw.forced_speed_duplex = e1000_100_half;
4439 break;
4440 case SPEED_100 + DUPLEX_FULL:
4441 adapter->hw.forced_speed_duplex = e1000_100_full;
4442 break;
4443 case SPEED_1000 + DUPLEX_FULL:
4444 adapter->hw.autoneg = 1;
4445 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4446 break;
4447 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4448 default:
2648345f 4449 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4450 return -EINVAL;
4451 }
4452 return 0;
4453}
4454
b6a1d5f8 4455#ifdef CONFIG_PM
0f15a8fa
JK		 4456/* Save/restore 16 or 64 dwords of PCI config space depending on which
4457 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4458 */
4459#define PCIE_CONFIG_SPACE_LEN 256
4460#define PCI_CONFIG_SPACE_LEN 64
4461static int
4462e1000_pci_save_state(struct e1000_adapter *adapter)
4463{
4464 struct pci_dev *dev = adapter->pdev;
4465 int size;
4466 int i;
0f15a8fa 4467
2f82665f
JB		 4468 if (adapter->hw.mac_type >= e1000_82571)
4469 size = PCIE_CONFIG_SPACE_LEN;
4470 else
4471 size = PCI_CONFIG_SPACE_LEN;
4472
4473 WARN_ON(adapter->config_space != NULL);
4474
4475 adapter->config_space = kmalloc(size, GFP_KERNEL);
4476 if (!adapter->config_space) {
4477 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4478 return -ENOMEM;
4479 }
4480 for (i = 0; i < (size / 4); i++)
4481 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4482 return 0;
4483}
4484
4485static void
4486e1000_pci_restore_state(struct e1000_adapter *adapter)
4487{
4488 struct pci_dev *dev = adapter->pdev;
4489 int size;
4490 int i;
0f15a8fa 4491
2f82665f
JB		 4492 if (adapter->config_space == NULL)
4493 return;
0f15a8fa 4494
2f82665f
JB		 4495 if (adapter->hw.mac_type >= e1000_82571)
4496 size = PCIE_CONFIG_SPACE_LEN;
4497 else
4498 size = PCI_CONFIG_SPACE_LEN;
4499 for (i = 0; i < (size / 4); i++)
4500 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4501 kfree(adapter->config_space);
4502 adapter->config_space = NULL;
4503 return;
4504}
4505#endif /* CONFIG_PM */
4506
1da177e4 4507static int
829ca9a3 4508e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4509{
4510 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4511 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4512 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4513 uint32_t wufc = adapter->wol;
6fdfef16 4514#ifdef CONFIG_PM
240b1710 4515 int retval = 0;
6fdfef16 4516#endif
1da177e4
LT		 4517
4518 netif_device_detach(netdev);
4519
2db10a08
AK		 4520 if (netif_running(netdev)) {
4521 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4522 e1000_down(adapter);
2db10a08 4523 }
1da177e4 4524
2f82665f 4525#ifdef CONFIG_PM
0f15a8fa
JK		 4526 /* Implement our own version of pci_save_state(pdev) because pci-
4527 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4528 retval = e1000_pci_save_state(adapter);
4529 if (retval)
4530 return retval;
4531#endif
4532
1da177e4 4533 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4534 if (status & E1000_STATUS_LU)
1da177e4
LT		 4535 wufc &= ~E1000_WUFC_LNKC;
4536
96838a40 4537 if (wufc) {
1da177e4
LT		 4538 e1000_setup_rctl(adapter);
4539 e1000_set_multi(netdev);
4540
4541 /* turn on all-multi mode if wake on multicast is enabled */
96838a40 4542 if (adapter->wol & E1000_WUFC_MC) {
1da177e4
LT		 4543 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4544 rctl |= E1000_RCTL_MPE;
4545 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4546 }
4547
96838a40 4548 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4549 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4550 /* advertise wake from D3Cold */
4551 #define E1000_CTRL_ADVD3WUC 0x00100000
4552 /* phy power management enable */
4553 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4554 ctrl |= E1000_CTRL_ADVD3WUC |
4555 E1000_CTRL_EN_PHY_PWR_MGMT;
4556 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4557 }
4558
96838a40 4559 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4560 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4561 /* keep the laser running in D3 */
4562 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4563 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4564 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4565 }
4566
2d7edb92
MC		 4567 /* Allow time for pending master requests to run */
4568 e1000_disable_pciex_master(&adapter->hw);
4569
1da177e4
LT		 4570 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4571 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 4572 pci_enable_wake(pdev, PCI_D3hot, 1);
4573 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4574 } else {
4575 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4576 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 4577 pci_enable_wake(pdev, PCI_D3hot, 0);
4578 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4579 }
4580
96838a40 4581 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4582 adapter->hw.media_type == e1000_media_type_copper) {
4583 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4584 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4585 manc |= E1000_MANC_ARP_EN;
4586 E1000_WRITE_REG(&adapter->hw, MANC, manc);
d0e027db
AK		 4587 pci_enable_wake(pdev, PCI_D3hot, 1);
4588 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 4589 }
4590 }
4591
b55ccb35
JK		 4592 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4593 * would have already happened in close and is redundant. */
4594 e1000_release_hw_control(adapter);
2d7edb92 4595
1da177e4 4596 pci_disable_device(pdev);
240b1710 4597
d0e027db 4598 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 4599
4600 return 0;
4601}
4602
2f82665f 4603#ifdef CONFIG_PM
1da177e4
LT		 4604static int
4605e1000_resume(struct pci_dev *pdev)
4606{
4607 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4608 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4609 uint32_t manc, ret_val;
1da177e4 4610
d0e027db 4611 pci_set_power_state(pdev, PCI_D0);
2f82665f 4612 e1000_pci_restore_state(adapter);
2b02893e 4613 ret_val = pci_enable_device(pdev);
a4cb847d 4614 pci_set_master(pdev);
1da177e4 4615
d0e027db
AK		 4616 pci_enable_wake(pdev, PCI_D3hot, 0);
4617 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 4618
4619 e1000_reset(adapter);
4620 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4621
96838a40 4622 if (netif_running(netdev))
1da177e4
LT		 4623 e1000_up(adapter);
4624
4625 netif_device_attach(netdev);
4626
96838a40 4627 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4628 adapter->hw.media_type == e1000_media_type_copper) {
4629 manc = E1000_READ_REG(&adapter->hw, MANC);
4630 manc &= ~(E1000_MANC_ARP_EN);
4631 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4632 }
4633
b55ccb35
JK		 4634 /* If the controller is 82573 and f/w is AMT, do not set
4635 * DRV_LOAD until the interface is up. For all other cases,
4636 * let the f/w know that the h/w is now under the control
4637 * of the driver. */
4638 if (adapter->hw.mac_type != e1000_82573 ||
4639 !e1000_check_mng_mode(&adapter->hw))
4640 e1000_get_hw_control(adapter);
2d7edb92 4641
1da177e4
LT		 4642 return 0;
4643}
4644#endif
c653e635
AK		 4645
4646static void e1000_shutdown(struct pci_dev *pdev)
4647{
4648 e1000_suspend(pdev, PMSG_SUSPEND);
4649}
4650
1da177e4
LT		 4651#ifdef CONFIG_NET_POLL_CONTROLLER
4652/*
4653 * Polling 'interrupt' - used by things like netconsole to send skbs
4654 * without having to re-enable interrupts. It's not called while
4655 * the interrupt routine is executing.
4656 */
4657static void
2648345f 4658e1000_netpoll(struct net_device *netdev)
1da177e4 4659{
60490fe0 4660 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4661 disable_irq(adapter->pdev->irq);
4662 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4663 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4664#ifndef CONFIG_E1000_NAPI
4665 adapter->clean_rx(adapter, adapter->rx_ring);
4666#endif
1da177e4
LT		 4667 enable_irq(adapter->pdev->irq);
4668}
4669#endif
4670
9026729b
AK		 4671/**
4672 * e1000_io_error_detected - called when PCI error is detected
4673 * @pdev: Pointer to PCI device
4674 * @state: The current pci conneection state
4675 *
4676 * This function is called after a PCI bus error affecting
4677 * this device has been detected.
4678 */
4679static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4680{
4681 struct net_device *netdev = pci_get_drvdata(pdev);
4682 struct e1000_adapter *adapter = netdev->priv;
4683
4684 netif_device_detach(netdev);
4685
4686 if (netif_running(netdev))
4687 e1000_down(adapter);
4688
4689 /* Request a slot slot reset. */
4690 return PCI_ERS_RESULT_NEED_RESET;
4691}
4692
4693/**
4694 * e1000_io_slot_reset - called after the pci bus has been reset.
4695 * @pdev: Pointer to PCI device
4696 *
4697 * Restart the card from scratch, as if from a cold-boot. Implementation
4698 * resembles the first-half of the e1000_resume routine.
4699 */
4700static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4701{
4702 struct net_device *netdev = pci_get_drvdata(pdev);
4703 struct e1000_adapter *adapter = netdev->priv;
4704
4705 if (pci_enable_device(pdev)) {
4706 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4707 return PCI_ERS_RESULT_DISCONNECT;
4708 }
4709 pci_set_master(pdev);
4710
4711 pci_enable_wake(pdev, 3, 0);
4712 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4713
4714 /* Perform card reset only on one instance of the card */
4715 if (PCI_FUNC (pdev->devfn) != 0)
4716 return PCI_ERS_RESULT_RECOVERED;
4717
4718 e1000_reset(adapter);
4719 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4720
4721 return PCI_ERS_RESULT_RECOVERED;
4722}
4723
4724/**
4725 * e1000_io_resume - called when traffic can start flowing again.
4726 * @pdev: Pointer to PCI device
4727 *
4728 * This callback is called when the error recovery driver tells us that
4729 * its OK to resume normal operation. Implementation resembles the
4730 * second-half of the e1000_resume routine.
4731 */
4732static void e1000_io_resume(struct pci_dev *pdev)
4733{
4734 struct net_device *netdev = pci_get_drvdata(pdev);
4735 struct e1000_adapter *adapter = netdev->priv;
4736 uint32_t manc, swsm;
4737
4738 if (netif_running(netdev)) {
4739 if (e1000_up(adapter)) {
4740 printk("e1000: can't bring device back up after reset\n");
4741 return;
4742 }
4743 }
4744
4745 netif_device_attach(netdev);
4746
4747 if (adapter->hw.mac_type >= e1000_82540 &&
4748 adapter->hw.media_type == e1000_media_type_copper) {
4749 manc = E1000_READ_REG(&adapter->hw, MANC);
4750 manc &= ~(E1000_MANC_ARP_EN);
4751 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4752 }
4753
4754 switch (adapter->hw.mac_type) {
4755 case e1000_82573:
4756 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4757 E1000_WRITE_REG(&adapter->hw, SWSM,
4758 swsm | E1000_SWSM_DRV_LOAD);
4759 break;
4760 default:
4761 break;
4762 }
4763
4764 if (netif_running(netdev))
4765 mod_timer(&adapter->watchdog_timer, jiffies);
4766}
4767
1da177e4 4768/* e1000_main.c */
Linux kernel - Deliverables
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