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01f2e4ea | 1 | /* |
29046f9b | 2 | * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. |
01f2e4ea SF |
3 | * Copyright 2007 Nuova Systems, Inc. All rights reserved. |
4 | * | |
5 | * This program is free software; you may redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; version 2 of the License. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
10 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
11 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
12 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
13 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
15 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
16 | * SOFTWARE. | |
17 | * | |
18 | */ | |
19 | ||
20 | #ifndef _ENIC_H_ | |
21 | #define _ENIC_H_ | |
22 | ||
01f2e4ea SF |
23 | #include "vnic_enet.h" |
24 | #include "vnic_dev.h" | |
25 | #include "vnic_wq.h" | |
26 | #include "vnic_rq.h" | |
27 | #include "vnic_cq.h" | |
28 | #include "vnic_intr.h" | |
29 | #include "vnic_stats.h" | |
6ba9cdc0 | 30 | #include "vnic_nic.h" |
717258ba | 31 | #include "vnic_rss.h" |
fef1f07c | 32 | #include <linux/irq.h> |
01f2e4ea SF |
33 | |
34 | #define DRV_NAME "enic" | |
641cb85e | 35 | #define DRV_DESCRIPTION "Cisco VIC Ethernet NIC Driver" |
001e1c1d | 36 | #define DRV_VERSION "2.1.1.50" |
92e2b469 | 37 | #define DRV_COPYRIGHT "Copyright 2008-2013 Cisco Systems, Inc" |
01f2e4ea | 38 | |
27e6c7d3 SF |
39 | #define ENIC_BARS_MAX 6 |
40 | ||
822473b6 | 41 | #define ENIC_WQ_MAX 8 |
63da93d9 | 42 | #define ENIC_RQ_MAX 8 |
6ba9cdc0 SF |
43 | #define ENIC_CQ_MAX (ENIC_WQ_MAX + ENIC_RQ_MAX) |
44 | #define ENIC_INTR_MAX (ENIC_CQ_MAX + 2) | |
45 | ||
01f2e4ea SF |
46 | struct enic_msix_entry { |
47 | int requested; | |
48 | char devname[IFNAMSIZ]; | |
49 | irqreturn_t (*isr)(int, void *); | |
50 | void *devid; | |
51 | }; | |
52 | ||
8749b427 RP |
53 | /* priv_flags */ |
54 | #define ENIC_SRIOV_ENABLED (1 << 0) | |
55 | ||
56 | /* enic port profile set flags */ | |
4dce2396 | 57 | #define ENIC_PORT_REQUEST_APPLIED (1 << 0) |
08f382eb SF |
58 | #define ENIC_SET_REQUEST (1 << 1) |
59 | #define ENIC_SET_NAME (1 << 2) | |
60 | #define ENIC_SET_INSTANCE (1 << 3) | |
61 | #define ENIC_SET_HOST (1 << 4) | |
62 | ||
f8bd9091 | 63 | struct enic_port_profile { |
08f382eb | 64 | u32 set; |
f8bd9091 SF |
65 | u8 request; |
66 | char name[PORT_PROFILE_MAX]; | |
67 | u8 instance_uuid[PORT_UUID_MAX]; | |
68 | u8 host_uuid[PORT_UUID_MAX]; | |
0b1c00fc | 69 | u8 vf_mac[ETH_ALEN]; |
29639059 | 70 | u8 mac_addr[ETH_ALEN]; |
f8bd9091 SF |
71 | }; |
72 | ||
01f2e4ea SF |
73 | /* Per-instance private data structure */ |
74 | struct enic { | |
75 | struct net_device *netdev; | |
76 | struct pci_dev *pdev; | |
77 | struct vnic_enet_config config; | |
27e6c7d3 | 78 | struct vnic_dev_bar bar[ENIC_BARS_MAX]; |
01f2e4ea | 79 | struct vnic_dev *vdev; |
01f2e4ea SF |
80 | struct timer_list notify_timer; |
81 | struct work_struct reset; | |
c97c894d | 82 | struct work_struct change_mtu_work; |
717258ba VK |
83 | struct msix_entry msix_entry[ENIC_INTR_MAX]; |
84 | struct enic_msix_entry msix[ENIC_INTR_MAX]; | |
01f2e4ea SF |
85 | u32 msg_enable; |
86 | spinlock_t devcmd_lock; | |
87 | u8 mac_addr[ETH_ALEN]; | |
88 | u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN]; | |
319d7e84 | 89 | u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN]; |
9959a185 | 90 | unsigned int flags; |
8749b427 | 91 | unsigned int priv_flags; |
01f2e4ea | 92 | unsigned int mc_count; |
319d7e84 | 93 | unsigned int uc_count; |
01f2e4ea | 94 | u32 port_mtu; |
7c844599 SF |
95 | u32 rx_coalesce_usecs; |
96 | u32 tx_coalesce_usecs; | |
8749b427 | 97 | #ifdef CONFIG_PCI_IOV |
413708bb | 98 | u16 num_vfs; |
8749b427 | 99 | #endif |
0b038566 | 100 | spinlock_t enic_api_lock; |
3f192795 | 101 | struct enic_port_profile *pp; |
01f2e4ea SF |
102 | |
103 | /* work queue cache line section */ | |
6ba9cdc0 SF |
104 | ____cacheline_aligned struct vnic_wq wq[ENIC_WQ_MAX]; |
105 | spinlock_t wq_lock[ENIC_WQ_MAX]; | |
01f2e4ea | 106 | unsigned int wq_count; |
1825aca6 VK |
107 | u16 loop_enable; |
108 | u16 loop_tag; | |
01f2e4ea SF |
109 | |
110 | /* receive queue cache line section */ | |
6ba9cdc0 | 111 | ____cacheline_aligned struct vnic_rq rq[ENIC_RQ_MAX]; |
01f2e4ea | 112 | unsigned int rq_count; |
350991e1 | 113 | u64 rq_truncated_pkts; |
bd9fb1a4 | 114 | u64 rq_bad_fcs; |
717258ba | 115 | struct napi_struct napi[ENIC_RQ_MAX]; |
01f2e4ea SF |
116 | |
117 | /* interrupt resource cache line section */ | |
6ba9cdc0 | 118 | ____cacheline_aligned struct vnic_intr intr[ENIC_INTR_MAX]; |
01f2e4ea SF |
119 | unsigned int intr_count; |
120 | u32 __iomem *legacy_pba; /* memory-mapped */ | |
121 | ||
122 | /* completion queue cache line section */ | |
123 | ____cacheline_aligned struct vnic_cq cq[ENIC_CQ_MAX]; | |
124 | unsigned int cq_count; | |
125 | }; | |
126 | ||
a7a79deb VK |
127 | static inline struct device *enic_get_dev(struct enic *enic) |
128 | { | |
129 | return &(enic->pdev->dev); | |
130 | } | |
131 | ||
f13bbc2f NP |
132 | static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq) |
133 | { | |
134 | return rq; | |
135 | } | |
136 | ||
137 | static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq) | |
138 | { | |
139 | return enic->rq_count + wq; | |
140 | } | |
141 | ||
142 | static inline unsigned int enic_legacy_io_intr(void) | |
143 | { | |
144 | return 0; | |
145 | } | |
146 | ||
147 | static inline unsigned int enic_legacy_err_intr(void) | |
148 | { | |
149 | return 1; | |
150 | } | |
151 | ||
152 | static inline unsigned int enic_legacy_notify_intr(void) | |
153 | { | |
154 | return 2; | |
155 | } | |
156 | ||
157 | static inline unsigned int enic_msix_rq_intr(struct enic *enic, | |
158 | unsigned int rq) | |
159 | { | |
160 | return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset; | |
161 | } | |
162 | ||
163 | static inline unsigned int enic_msix_wq_intr(struct enic *enic, | |
164 | unsigned int wq) | |
165 | { | |
166 | return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset; | |
167 | } | |
168 | ||
169 | static inline unsigned int enic_msix_err_intr(struct enic *enic) | |
170 | { | |
171 | return enic->rq_count + enic->wq_count; | |
172 | } | |
173 | ||
174 | static inline unsigned int enic_msix_notify_intr(struct enic *enic) | |
175 | { | |
176 | return enic->rq_count + enic->wq_count + 1; | |
177 | } | |
178 | ||
b3abfbd2 | 179 | void enic_reset_addr_lists(struct enic *enic); |
8749b427 | 180 | int enic_sriov_enabled(struct enic *enic); |
889d13f5 | 181 | int enic_is_valid_vf(struct enic *enic, int vf); |
3f192795 | 182 | int enic_is_dynamic(struct enic *enic); |
f13bbc2f | 183 | void enic_set_ethtool_ops(struct net_device *netdev); |
b3abfbd2 | 184 | |
01f2e4ea | 185 | #endif /* _ENIC_H_ */ |