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igb: Fixed Wake On LAN support
[deliverable/linux.git] / drivers / net / ethernet / intel / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
5377a416 31#include <linux/io.h>
70c71606 32#include <linux/prefetch.h>
5622e404
JP		 33#include <linux/bitops.h>
34#include <linux/if_vlan.h>
5377a416 35
1da177e4 36char e1000_driver_name[] = "e1000";
3ad2cc67 37static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
ab08853f 38#define DRV_VERSION "7.3.21-k8-NAPI"
abec42a4
SH		 39const char e1000_driver_version[] = DRV_VERSION;
40static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
a3aa1884 49static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
1da177e4
LT		 50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
75 INTEL_E1000_ETHERNET_DEVICE(0x1075),
76 INTEL_E1000_ETHERNET_DEVICE(0x1076),
77 INTEL_E1000_ETHERNET_DEVICE(0x1077),
78 INTEL_E1000_ETHERNET_DEVICE(0x1078),
79 INTEL_E1000_ETHERNET_DEVICE(0x1079),
80 INTEL_E1000_ETHERNET_DEVICE(0x107A),
81 INTEL_E1000_ETHERNET_DEVICE(0x107B),
82 INTEL_E1000_ETHERNET_DEVICE(0x107C),
83 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 84 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 85 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
5377a416 86 INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
1da177e4
LT		 87 /* required last entry */
88 {0,}
89};
90
91MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
92
35574764
NN		 93int e1000_up(struct e1000_adapter *adapter);
94void e1000_down(struct e1000_adapter *adapter);
95void e1000_reinit_locked(struct e1000_adapter *adapter);
96void e1000_reset(struct e1000_adapter *adapter);
35574764
NN		 97int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
98int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
99void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
100void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 101static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *txdr);
3ad2cc67 103static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 104 struct e1000_rx_ring *rxdr);
3ad2cc67 105static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 106 struct e1000_tx_ring *tx_ring);
3ad2cc67 107static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 108 struct e1000_rx_ring *rx_ring);
109void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 110
111static int e1000_init_module(void);
112static void e1000_exit_module(void);
113static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
9f9a12f8 114static void e1000_remove(struct pci_dev *pdev);
581d708e 115static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 116static int e1000_sw_init(struct e1000_adapter *adapter);
117static int e1000_open(struct net_device *netdev);
118static int e1000_close(struct net_device *netdev);
119static void e1000_configure_tx(struct e1000_adapter *adapter);
120static void e1000_configure_rx(struct e1000_adapter *adapter);
121static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 122static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
123static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
124static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
125 struct e1000_tx_ring *tx_ring);
126static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
127 struct e1000_rx_ring *rx_ring);
db0ce50d 128static void e1000_set_rx_mode(struct net_device *netdev);
5cf42fcd 129static void e1000_update_phy_info_task(struct work_struct *work);
a4010afe 130static void e1000_watchdog(struct work_struct *work);
5cf42fcd 131static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
3b29a56d
SH		 132static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
133 struct net_device *netdev);
1da177e4
LT		 134static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
135static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
136static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 137static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 138static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
139 struct e1000_tx_ring *tx_ring);
bea3348e 140static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 141static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
142 struct e1000_rx_ring *rx_ring,
143 int *work_done, int work_to_do);
edbbb3ca
JB		 144static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
145 struct e1000_rx_ring *rx_ring,
146 int *work_done, int work_to_do);
581d708e 147static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 148 struct e1000_rx_ring *rx_ring,
72d64a43 149 int cleaned_count);
edbbb3ca
JB		 150static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring,
152 int cleaned_count);
1da177e4
LT		 153static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
154static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
155 int cmd);
1da177e4
LT		 156static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
157static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
158static void e1000_tx_timeout(struct net_device *dev);
65f27f38 159static void e1000_reset_task(struct work_struct *work);
1da177e4 160static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 161static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
162 struct sk_buff *skb);
1da177e4 163
5622e404 164static bool e1000_vlan_used(struct e1000_adapter *adapter);
c8f44aff
MM		 165static void e1000_vlan_mode(struct net_device *netdev,
166 netdev_features_t features);
52f5509f
JP		 167static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
168 bool filter_on);
80d5c368
PM		 169static int e1000_vlan_rx_add_vid(struct net_device *netdev,
170 __be16 proto, u16 vid);
171static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
172 __be16 proto, u16 vid);
1da177e4
LT		 173static void e1000_restore_vlan(struct e1000_adapter *adapter);
174
6fdfef16 175#ifdef CONFIG_PM
b43fcd7d 176static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 177static int e1000_resume(struct pci_dev *pdev);
178#endif
c653e635 179static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 180
181#ifdef CONFIG_NET_POLL_CONTROLLER
182/* for netdump / net console */
183static void e1000_netpoll (struct net_device *netdev);
184#endif
185
1f753861
JB		 186#define COPYBREAK_DEFAULT 256
187static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
188module_param(copybreak, uint, 0644);
189MODULE_PARM_DESC(copybreak,
190 "Maximum size of packet that is copied to a new buffer on receive");
191
9026729b
AK		 192static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
193 pci_channel_state_t state);
194static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
195static void e1000_io_resume(struct pci_dev *pdev);
196
3646f0e5 197static const struct pci_error_handlers e1000_err_handler = {
9026729b
AK		 198 .error_detected = e1000_io_error_detected,
199 .slot_reset = e1000_io_slot_reset,
200 .resume = e1000_io_resume,
201};
24025e4e 202
1da177e4
LT		 203static struct pci_driver e1000_driver = {
204 .name = e1000_driver_name,
205 .id_table = e1000_pci_tbl,
206 .probe = e1000_probe,
9f9a12f8 207 .remove = e1000_remove,
c4e24f01 208#ifdef CONFIG_PM
25985edc 209 /* Power Management Hooks */
1da177e4 210 .suspend = e1000_suspend,
c653e635 211 .resume = e1000_resume,
1da177e4 212#endif
9026729b
AK		 213 .shutdown = e1000_shutdown,
214 .err_handler = &e1000_err_handler
1da177e4
LT		 215};
216
217MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
218MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
219MODULE_LICENSE("GPL");
220MODULE_VERSION(DRV_VERSION);
221
b3f4d599 222#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
223static int debug = -1;
1da177e4
LT		 224module_param(debug, int, 0);
225MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
226
675ad473
ET		 227/**
228 * e1000_get_hw_dev - return device
229 * used by hardware layer to print debugging information
230 *
231 **/
232struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
233{
234 struct e1000_adapter *adapter = hw->back;
235 return adapter->netdev;
236}
237
1da177e4
LT		 238/**
239 * e1000_init_module - Driver Registration Routine
240 *
241 * e1000_init_module is the first routine called when the driver is
242 * loaded. All it does is register with the PCI subsystem.
243 **/
64798845 244static int __init e1000_init_module(void)
1da177e4
LT		 245{
246 int ret;
675ad473 247 pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
1da177e4 248
675ad473 249 pr_info("%s\n", e1000_copyright);
1da177e4 250
29917620 251 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 252 if (copybreak != COPYBREAK_DEFAULT) {
253 if (copybreak == 0)
675ad473 254 pr_info("copybreak disabled\n");
1f753861 255 else
675ad473
ET		 256 pr_info("copybreak enabled for "
257 "packets <= %u bytes\n", copybreak);
1f753861 258 }
1da177e4
LT		 259 return ret;
260}
261
262module_init(e1000_init_module);
263
264/**
265 * e1000_exit_module - Driver Exit Cleanup Routine
266 *
267 * e1000_exit_module is called just before the driver is removed
268 * from memory.
269 **/
64798845 270static void __exit e1000_exit_module(void)
1da177e4 271{
1da177e4
LT		 272 pci_unregister_driver(&e1000_driver);
273}
274
275module_exit(e1000_exit_module);
276
2db10a08
AK		 277static int e1000_request_irq(struct e1000_adapter *adapter)
278{
279 struct net_device *netdev = adapter->netdev;
3e18826c 280 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 281 int irq_flags = IRQF_SHARED;
282 int err;
2db10a08 283
e94bd23f
AK		 284 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
285 netdev);
286 if (err) {
feb8f478 287 e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 288 }
2db10a08
AK		 289
290 return err;
291}
292
293static void e1000_free_irq(struct e1000_adapter *adapter)
294{
295 struct net_device *netdev = adapter->netdev;
296
297 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 298}
299
1da177e4
LT		 300/**
301 * e1000_irq_disable - Mask off interrupt generation on the NIC
302 * @adapter: board private structure
303 **/
64798845 304static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 305{
1dc32918
JP		 306 struct e1000_hw *hw = &adapter->hw;
307
308 ew32(IMC, ~0);
309 E1000_WRITE_FLUSH();
1da177e4
LT		 310 synchronize_irq(adapter->pdev->irq);
311}
312
313/**
314 * e1000_irq_enable - Enable default interrupt generation settings
315 * @adapter: board private structure
316 **/
64798845 317static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 318{
1dc32918
JP		 319 struct e1000_hw *hw = &adapter->hw;
320
321 ew32(IMS, IMS_ENABLE_MASK);
322 E1000_WRITE_FLUSH();
1da177e4 323}
3ad2cc67 324
64798845 325static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 326{
1dc32918 327 struct e1000_hw *hw = &adapter->hw;
2d7edb92 328 struct net_device *netdev = adapter->netdev;
1dc32918 329 u16 vid = hw->mng_cookie.vlan_id;
406874a7 330 u16 old_vid = adapter->mng_vlan_id;
96838a40 331
5622e404
JP		 332 if (!e1000_vlan_used(adapter))
333 return;
334
335 if (!test_bit(vid, adapter->active_vlans)) {
336 if (hw->mng_cookie.status &
337 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
80d5c368 338 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
c5f226fe 339 adapter->mng_vlan_id = vid;
5622e404
JP		 340 } else {
341 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
342 }
343 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
344 (vid != old_vid) &&
345 !test_bit(old_vid, adapter->active_vlans))
80d5c368
PM		 346 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
347 old_vid);
5622e404
JP		 348 } else {
349 adapter->mng_vlan_id = vid;
2d7edb92
MC		 350 }
351}
b55ccb35 352
64798845 353static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 354{
1dc32918
JP		 355 struct e1000_hw *hw = &adapter->hw;
356
0fccd0e9 357 if (adapter->en_mng_pt) {
1dc32918 358 u32 manc = er32(MANC);
0fccd0e9
JG		 359
360 /* disable hardware interception of ARP */
361 manc &= ~(E1000_MANC_ARP_EN);
362
1dc32918 363 ew32(MANC, manc);
0fccd0e9
JG		 364 }
365}
366
64798845 367static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 368{
1dc32918
JP		 369 struct e1000_hw *hw = &adapter->hw;
370
0fccd0e9 371 if (adapter->en_mng_pt) {
1dc32918 372 u32 manc = er32(MANC);
0fccd0e9
JG		 373
374 /* re-enable hardware interception of ARP */
375 manc |= E1000_MANC_ARP_EN;
376
1dc32918 377 ew32(MANC, manc);
0fccd0e9
JG		 378 }
379}
380
e0aac5a2
AK		 381/**
382 * e1000_configure - configure the hardware for RX and TX
383 * @adapter = private board structure
384 **/
385static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 386{
387 struct net_device *netdev = adapter->netdev;
2db10a08 388 int i;
1da177e4 389
db0ce50d 390 e1000_set_rx_mode(netdev);
1da177e4
LT		 391
392 e1000_restore_vlan(adapter);
0fccd0e9 393 e1000_init_manageability(adapter);
1da177e4
LT		 394
395 e1000_configure_tx(adapter);
396 e1000_setup_rctl(adapter);
397 e1000_configure_rx(adapter);
72d64a43
JK		 398 /* call E1000_DESC_UNUSED which always leaves
399 * at least 1 descriptor unused to make sure
6cfbd97b
JK		 400 * next_to_use != next_to_clean
401 */
f56799ea 402 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 403 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e 404 adapter->alloc_rx_buf(adapter, ring,
6cfbd97b 405 E1000_DESC_UNUSED(ring));
f56799ea 406 }
e0aac5a2
AK		 407}
408
409int e1000_up(struct e1000_adapter *adapter)
410{
1dc32918
JP		 411 struct e1000_hw *hw = &adapter->hw;
412
e0aac5a2
AK		 413 /* hardware has been reset, we need to reload some things */
414 e1000_configure(adapter);
415
416 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 417
bea3348e 418 napi_enable(&adapter->napi);
c3570acb 419
5de55624
MC		 420 e1000_irq_enable(adapter);
421
4cb9be7a
JB		 422 netif_wake_queue(adapter->netdev);
423
79f3d399 424 /* fire a link change interrupt to start the watchdog */
1dc32918 425 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 426 return 0;
427}
428
79f05bf0
AK		 429/**
430 * e1000_power_up_phy - restore link in case the phy was powered down
431 * @adapter: address of board private structure
432 *
433 * The phy may be powered down to save power and turn off link when the
434 * driver is unloaded and wake on lan is not enabled (among others)
435 * *** this routine MUST be followed by a call to e1000_reset ***
79f05bf0 436 **/
d658266e 437void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 438{
1dc32918 439 struct e1000_hw *hw = &adapter->hw;
406874a7 440 u16 mii_reg = 0;
79f05bf0
AK		 441
442 /* Just clear the power down bit to wake the phy back up */
1dc32918 443 if (hw->media_type == e1000_media_type_copper) {
79f05bf0 444 /* according to the manual, the phy will retain its
6cfbd97b
JK		 445 * settings across a power-down/up cycle
446 */
1dc32918 447 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 448 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 449 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 450 }
451}
452
453static void e1000_power_down_phy(struct e1000_adapter *adapter)
454{
1dc32918
JP		 455 struct e1000_hw *hw = &adapter->hw;
456
61c2505f 457 /* Power down the PHY so no link is implied when interface is down *
c3033b01 458 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 459 * (a) WoL is enabled
460 * (b) AMT is active
6cfbd97b
JK		 461 * (c) SoL/IDER session is active
462 */
1dc32918
JP		 463 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
464 hw->media_type == e1000_media_type_copper) {
406874a7 465 u16 mii_reg = 0;
61c2505f 466
1dc32918 467 switch (hw->mac_type) {
61c2505f
BA		 468 case e1000_82540:
469 case e1000_82545:
470 case e1000_82545_rev_3:
471 case e1000_82546:
5377a416 472 case e1000_ce4100:
61c2505f
BA		 473 case e1000_82546_rev_3:
474 case e1000_82541:
475 case e1000_82541_rev_2:
476 case e1000_82547:
477 case e1000_82547_rev_2:
1dc32918 478 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 479 goto out;
480 break;
61c2505f
BA		 481 default:
482 goto out;
483 }
1dc32918 484 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 485 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 486 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
4e0d8f7d 487 msleep(1);
79f05bf0 488 }
61c2505f
BA		 489out:
490 return;
79f05bf0
AK		 491}
492
a4010afe
JB		 493static void e1000_down_and_stop(struct e1000_adapter *adapter)
494{
495 set_bit(__E1000_DOWN, &adapter->flags);
8ce6909f
TD		 496
497 /* Only kill reset task if adapter is not resetting */
498 if (!test_bit(__E1000_RESETTING, &adapter->flags))
499 cancel_work_sync(&adapter->reset_task);
500
a4010afe
JB		 501 cancel_delayed_work_sync(&adapter->watchdog_task);
502 cancel_delayed_work_sync(&adapter->phy_info_task);
503 cancel_delayed_work_sync(&adapter->fifo_stall_task);
504}
505
64798845 506void e1000_down(struct e1000_adapter *adapter)
1da177e4 507{
a6c42322 508 struct e1000_hw *hw = &adapter->hw;
1da177e4 509 struct net_device *netdev = adapter->netdev;
a6c42322 510 u32 rctl, tctl;
1da177e4 511
1314bbf3 512
a6c42322
JB		 513 /* disable receives in the hardware */
514 rctl = er32(RCTL);
515 ew32(RCTL, rctl & ~E1000_RCTL_EN);
516 /* flush and sleep below */
517
51851073 518 netif_tx_disable(netdev);
a6c42322
JB		 519
520 /* disable transmits in the hardware */
521 tctl = er32(TCTL);
522 tctl &= ~E1000_TCTL_EN;
523 ew32(TCTL, tctl);
524 /* flush both disables and wait for them to finish */
525 E1000_WRITE_FLUSH();
526 msleep(10);
527
bea3348e 528 napi_disable(&adapter->napi);
c3570acb 529
1da177e4 530 e1000_irq_disable(adapter);
c1605eb3 531
6cfbd97b 532 /* Setting DOWN must be after irq_disable to prevent
ab08853f 533 * a screaming interrupt. Setting DOWN also prevents
a4010afe 534 * tasks from rescheduling.
ab08853f 535 */
a4010afe 536 e1000_down_and_stop(adapter);
1da177e4 537
1da177e4
LT		 538 adapter->link_speed = 0;
539 adapter->link_duplex = 0;
540 netif_carrier_off(netdev);
1da177e4
LT		 541
542 e1000_reset(adapter);
581d708e
MC		 543 e1000_clean_all_tx_rings(adapter);
544 e1000_clean_all_rx_rings(adapter);
1da177e4 545}
1da177e4 546
38df7a39 547static void e1000_reinit_safe(struct e1000_adapter *adapter)
338c15e4
JB		 548{
549 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
550 msleep(1);
0ef4eedc 551 mutex_lock(&adapter->mutex);
338c15e4
JB		 552 e1000_down(adapter);
553 e1000_up(adapter);
0ef4eedc 554 mutex_unlock(&adapter->mutex);
338c15e4
JB		 555 clear_bit(__E1000_RESETTING, &adapter->flags);
556}
557
64798845 558void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08 559{
338c15e4
JB		 560 /* if rtnl_lock is not held the call path is bogus */
561 ASSERT_RTNL();
2db10a08
AK		 562 WARN_ON(in_interrupt());
563 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
564 msleep(1);
565 e1000_down(adapter);
566 e1000_up(adapter);
567 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 568}
569
64798845 570void e1000_reset(struct e1000_adapter *adapter)
1da177e4 571{
1dc32918 572 struct e1000_hw *hw = &adapter->hw;
406874a7 573 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 574 bool legacy_pba_adjust = false;
b7cb8c2c 575 u16 hwm;
1da177e4
LT		 576
577 /* Repartition Pba for greater than 9k mtu
578 * To take effect CTRL.RST is required.
579 */
580
1dc32918 581 switch (hw->mac_type) {
018ea44e
BA		 582 case e1000_82542_rev2_0:
583 case e1000_82542_rev2_1:
584 case e1000_82543:
585 case e1000_82544:
586 case e1000_82540:
587 case e1000_82541:
588 case e1000_82541_rev_2:
c3033b01 589 legacy_pba_adjust = true;
018ea44e
BA		 590 pba = E1000_PBA_48K;
591 break;
592 case e1000_82545:
593 case e1000_82545_rev_3:
594 case e1000_82546:
5377a416 595 case e1000_ce4100:
018ea44e
BA		 596 case e1000_82546_rev_3:
597 pba = E1000_PBA_48K;
598 break;
2d7edb92 599 case e1000_82547:
0e6ef3e0 600 case e1000_82547_rev_2:
c3033b01 601 legacy_pba_adjust = true;
2d7edb92
MC		 602 pba = E1000_PBA_30K;
603 break;
018ea44e
BA		 604 case e1000_undefined:
605 case e1000_num_macs:
2d7edb92
MC		 606 break;
607 }
608
c3033b01 609 if (legacy_pba_adjust) {
b7cb8c2c 610 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 611 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 612
1dc32918 613 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 614 adapter->tx_fifo_head = 0;
615 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
616 adapter->tx_fifo_size =
617 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
618 atomic_set(&adapter->tx_fifo_stall, 0);
619 }
b7cb8c2c 620 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 621 /* adjust PBA for jumbo frames */
1dc32918 622 ew32(PBA, pba);
018ea44e
BA		 623
624 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 625 * large enough to accommodate two full transmit packets,
018ea44e 626 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 627 * the Rx FIFO should be large enough to accommodate at least
018ea44e 628 * one full receive packet and is similarly rounded up and
6cfbd97b
JK		 629 * expressed in KB.
630 */
1dc32918 631 pba = er32(PBA);
018ea44e
BA		 632 /* upper 16 bits has Tx packet buffer allocation size in KB */
633 tx_space = pba >> 16;
634 /* lower 16 bits has Rx packet buffer allocation size in KB */
635 pba &= 0xffff;
6cfbd97b 636 /* the Tx fifo also stores 16 bytes of information about the Tx
b7cb8c2c
JB		 637 * but don't include ethernet FCS because hardware appends it
638 */
639 min_tx_space = (hw->max_frame_size +
640 sizeof(struct e1000_tx_desc) -
641 ETH_FCS_LEN) * 2;
9099cfb9 642 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 643 min_tx_space >>= 10;
b7cb8c2c
JB		 644 /* software strips receive CRC, so leave room for it */
645 min_rx_space = hw->max_frame_size;
9099cfb9 646 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 647 min_rx_space >>= 10;
648
649 /* If current Tx allocation is less than the min Tx FIFO size,
650 * and the min Tx FIFO size is less than the current Rx FIFO
6cfbd97b
JK		 651 * allocation, take space away from current Rx allocation
652 */
018ea44e
BA		 653 if (tx_space < min_tx_space &&
654 ((min_tx_space - tx_space) < pba)) {
655 pba = pba - (min_tx_space - tx_space);
656
657 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 658 switch (hw->mac_type) {
018ea44e
BA		 659 case e1000_82545 ... e1000_82546_rev_3:
660 pba &= ~(E1000_PBA_8K - 1);
661 break;
662 default:
663 break;
664 }
665
6cfbd97b
JK		 666 /* if short on Rx space, Rx wins and must trump Tx
667 * adjustment or use Early Receive if available
668 */
1532ecea
JB		 669 if (pba < min_rx_space)
670 pba = min_rx_space;
018ea44e 671 }
1da177e4 672 }
2d7edb92 673
1dc32918 674 ew32(PBA, pba);
1da177e4 675
6cfbd97b 676 /* flow control settings:
b7cb8c2c
JB		 677 * The high water mark must be low enough to fit one full frame
678 * (or the size used for early receive) above it in the Rx FIFO.
679 * Set it to the lower of:
680 * - 90% of the Rx FIFO size, and
681 * - the full Rx FIFO size minus the early receive size (for parts
682 * with ERT support assuming ERT set to E1000_ERT_2048), or
683 * - the full Rx FIFO size minus one full frame
684 */
685 hwm = min(((pba << 10) * 9 / 10),
686 ((pba << 10) - hw->max_frame_size));
687
688 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
689 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 690 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 691 hw->fc_send_xon = 1;
692 hw->fc = hw->original_fc;
1da177e4 693
2d7edb92 694 /* Allow time for pending master requests to run */
1dc32918
JP		 695 e1000_reset_hw(hw);
696 if (hw->mac_type >= e1000_82544)
697 ew32(WUC, 0);
09ae3e88 698
1dc32918 699 if (e1000_init_hw(hw))
feb8f478 700 e_dev_err("Hardware Error\n");
2d7edb92 701 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 702
703 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 704 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 705 hw->autoneg == 1 &&
706 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
707 u32 ctrl = er32(CTRL);
3d5460a0
JB		 708 /* clear phy power management bit if we are in gig only mode,
709 * which if enabled will attempt negotiation to 100Mb, which
6cfbd97b
JK		 710 * can cause a loss of link at power off or driver unload
711 */
3d5460a0 712 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 713 ew32(CTRL, ctrl);
3d5460a0
JB		 714 }
715
1da177e4 716 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 717 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 718
1dc32918
JP		 719 e1000_reset_adaptive(hw);
720 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 721
0fccd0e9 722 e1000_release_manageability(adapter);
1da177e4
LT		 723}
724
1aa8b471 725/* Dump the eeprom for users having checksum issues */
b4ea895d 726static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 727{
728 struct net_device *netdev = adapter->netdev;
729 struct ethtool_eeprom eeprom;
730 const struct ethtool_ops *ops = netdev->ethtool_ops;
731 u8 *data;
732 int i;
733 u16 csum_old, csum_new = 0;
734
735 eeprom.len = ops->get_eeprom_len(netdev);
736 eeprom.offset = 0;
737
738 data = kmalloc(eeprom.len, GFP_KERNEL);
e404decb 739 if (!data)
67b3c27c 740 return;
67b3c27c
AK		 741
742 ops->get_eeprom(netdev, &eeprom, data);
743
744 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
745 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
746 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
747 csum_new += data[i] + (data[i + 1] << 8);
748 csum_new = EEPROM_SUM - csum_new;
749
675ad473
ET		 750 pr_err("/*********************/\n");
751 pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
752 pr_err("Calculated : 0x%04x\n", csum_new);
67b3c27c 753
675ad473
ET		 754 pr_err("Offset Values\n");
755 pr_err("======== ======\n");
67b3c27c
AK		 756 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
757
675ad473
ET		 758 pr_err("Include this output when contacting your support provider.\n");
759 pr_err("This is not a software error! Something bad happened to\n");
760 pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
761 pr_err("result in further problems, possibly loss of data,\n");
762 pr_err("corruption or system hangs!\n");
763 pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
764 pr_err("which is invalid and requires you to set the proper MAC\n");
765 pr_err("address manually before continuing to enable this network\n");
766 pr_err("device. Please inspect the EEPROM dump and report the\n");
767 pr_err("issue to your hardware vendor or Intel Customer Support.\n");
768 pr_err("/*********************/\n");
67b3c27c
AK		 769
770 kfree(data);
771}
772
81250297
TI		 773/**
774 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
775 * @pdev: PCI device information struct
776 *
777 * Return true if an adapter needs ioport resources
778 **/
779static int e1000_is_need_ioport(struct pci_dev *pdev)
780{
781 switch (pdev->device) {
782 case E1000_DEV_ID_82540EM:
783 case E1000_DEV_ID_82540EM_LOM:
784 case E1000_DEV_ID_82540EP:
785 case E1000_DEV_ID_82540EP_LOM:
786 case E1000_DEV_ID_82540EP_LP:
787 case E1000_DEV_ID_82541EI:
788 case E1000_DEV_ID_82541EI_MOBILE:
789 case E1000_DEV_ID_82541ER:
790 case E1000_DEV_ID_82541ER_LOM:
791 case E1000_DEV_ID_82541GI:
792 case E1000_DEV_ID_82541GI_LF:
793 case E1000_DEV_ID_82541GI_MOBILE:
794 case E1000_DEV_ID_82544EI_COPPER:
795 case E1000_DEV_ID_82544EI_FIBER:
796 case E1000_DEV_ID_82544GC_COPPER:
797 case E1000_DEV_ID_82544GC_LOM:
798 case E1000_DEV_ID_82545EM_COPPER:
799 case E1000_DEV_ID_82545EM_FIBER:
800 case E1000_DEV_ID_82546EB_COPPER:
801 case E1000_DEV_ID_82546EB_FIBER:
802 case E1000_DEV_ID_82546EB_QUAD_COPPER:
803 return true;
804 default:
805 return false;
806 }
807}
808
c8f44aff
MM		 809static netdev_features_t e1000_fix_features(struct net_device *netdev,
810 netdev_features_t features)
5622e404 811{
6cfbd97b
JK		 812 /* Since there is no support for separate Rx/Tx vlan accel
813 * enable/disable make sure Tx flag is always in same state as Rx.
5622e404 814 */
f646968f
PM		 815 if (features & NETIF_F_HW_VLAN_CTAG_RX)
816 features |= NETIF_F_HW_VLAN_CTAG_TX;
5622e404 817 else
f646968f 818 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
5622e404
JP		 819
820 return features;
821}
822
c8f44aff
MM		 823static int e1000_set_features(struct net_device *netdev,
824 netdev_features_t features)
e97d3207
MM		 825{
826 struct e1000_adapter *adapter = netdev_priv(netdev);
c8f44aff 827 netdev_features_t changed = features ^ netdev->features;
e97d3207 828
f646968f 829 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
5622e404
JP		 830 e1000_vlan_mode(netdev, features);
831
e825b731 832 if (!(changed & (NETIF_F_RXCSUM | NETIF_F_RXALL)))
e97d3207
MM		 833 return 0;
834
e825b731 835 netdev->features = features;
e97d3207
MM		 836 adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
837
838 if (netif_running(netdev))
839 e1000_reinit_locked(adapter);
840 else
841 e1000_reset(adapter);
842
843 return 0;
844}
845
0e7614bc
SH		 846static const struct net_device_ops e1000_netdev_ops = {
847 .ndo_open = e1000_open,
848 .ndo_stop = e1000_close,
00829823 849 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 850 .ndo_get_stats = e1000_get_stats,
851 .ndo_set_rx_mode = e1000_set_rx_mode,
852 .ndo_set_mac_address = e1000_set_mac,
5622e404 853 .ndo_tx_timeout = e1000_tx_timeout,
0e7614bc
SH		 854 .ndo_change_mtu = e1000_change_mtu,
855 .ndo_do_ioctl = e1000_ioctl,
856 .ndo_validate_addr = eth_validate_addr,
0e7614bc
SH		 857 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
858 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
859#ifdef CONFIG_NET_POLL_CONTROLLER
860 .ndo_poll_controller = e1000_netpoll,
861#endif
5622e404
JP		 862 .ndo_fix_features = e1000_fix_features,
863 .ndo_set_features = e1000_set_features,
0e7614bc
SH		 864};
865
e508be17
JB		 866/**
867 * e1000_init_hw_struct - initialize members of hw struct
868 * @adapter: board private struct
869 * @hw: structure used by e1000_hw.c
870 *
871 * Factors out initialization of the e1000_hw struct to its own function
872 * that can be called very early at init (just after struct allocation).
873 * Fields are initialized based on PCI device information and
874 * OS network device settings (MTU size).
875 * Returns negative error codes if MAC type setup fails.
876 */
877static int e1000_init_hw_struct(struct e1000_adapter *adapter,
878 struct e1000_hw *hw)
879{
880 struct pci_dev *pdev = adapter->pdev;
881
882 /* PCI config space info */
883 hw->vendor_id = pdev->vendor;
884 hw->device_id = pdev->device;
885 hw->subsystem_vendor_id = pdev->subsystem_vendor;
886 hw->subsystem_id = pdev->subsystem_device;
887 hw->revision_id = pdev->revision;
888
889 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
890
891 hw->max_frame_size = adapter->netdev->mtu +
892 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
893 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
894
895 /* identify the MAC */
896 if (e1000_set_mac_type(hw)) {
897 e_err(probe, "Unknown MAC Type\n");
898 return -EIO;
899 }
900
901 switch (hw->mac_type) {
902 default:
903 break;
904 case e1000_82541:
905 case e1000_82547:
906 case e1000_82541_rev_2:
907 case e1000_82547_rev_2:
908 hw->phy_init_script = 1;
909 break;
910 }
911
912 e1000_set_media_type(hw);
913 e1000_get_bus_info(hw);
914
915 hw->wait_autoneg_complete = false;
916 hw->tbi_compatibility_en = true;
917 hw->adaptive_ifs = true;
918
919 /* Copper options */
920
921 if (hw->media_type == e1000_media_type_copper) {
922 hw->mdix = AUTO_ALL_MODES;
923 hw->disable_polarity_correction = false;
924 hw->master_slave = E1000_MASTER_SLAVE;
925 }
926
927 return 0;
928}
929
1da177e4
LT		 930/**
931 * e1000_probe - Device Initialization Routine
932 * @pdev: PCI device information struct
933 * @ent: entry in e1000_pci_tbl
934 *
935 * Returns 0 on success, negative on failure
936 *
937 * e1000_probe initializes an adapter identified by a pci_dev structure.
938 * The OS initialization, configuring of the adapter private structure,
939 * and a hardware reset occur.
940 **/
1dd06ae8 941static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4
LT		 942{
943 struct net_device *netdev;
944 struct e1000_adapter *adapter;
1dc32918 945 struct e1000_hw *hw;
2d7edb92 946
1da177e4 947 static int cards_found = 0;
120cd576 948 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 949 int i, err, pci_using_dac;
406874a7 950 u16 eeprom_data = 0;
5377a416 951 u16 tmp = 0;
406874a7 952 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 953 int bars, need_ioport;
0795af57 954
81250297
TI		 955 /* do not allocate ioport bars when not needed */
956 need_ioport = e1000_is_need_ioport(pdev);
957 if (need_ioport) {
958 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
959 err = pci_enable_device(pdev);
960 } else {
961 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 962 err = pci_enable_device_mem(pdev);
81250297 963 }
c7be73bc 964 if (err)
1da177e4
LT		 965 return err;
966
81250297 967 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 968 if (err)
6dd62ab0 969 goto err_pci_reg;
1da177e4
LT		 970
971 pci_set_master(pdev);
dbb5aaeb
NN		 972 err = pci_save_state(pdev);
973 if (err)
974 goto err_alloc_etherdev;
1da177e4 975
6dd62ab0 976 err = -ENOMEM;
1da177e4 977 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 978 if (!netdev)
1da177e4 979 goto err_alloc_etherdev;
1da177e4 980
1da177e4
LT		 981 SET_NETDEV_DEV(netdev, &pdev->dev);
982
983 pci_set_drvdata(pdev, netdev);
60490fe0 984 adapter = netdev_priv(netdev);
1da177e4
LT		 985 adapter->netdev = netdev;
986 adapter->pdev = pdev;
b3f4d599 987 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
81250297
TI		 988 adapter->bars = bars;
989 adapter->need_ioport = need_ioport;
1da177e4 990
1dc32918
JP		 991 hw = &adapter->hw;
992 hw->back = adapter;
993
6dd62ab0 994 err = -EIO;
275f165f 995 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 996 if (!hw->hw_addr)
1da177e4 997 goto err_ioremap;
1da177e4 998
81250297
TI		 999 if (adapter->need_ioport) {
1000 for (i = BAR_1; i <= BAR_5; i++) {
1001 if (pci_resource_len(pdev, i) == 0)
1002 continue;
1003 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1004 hw->io_base = pci_resource_start(pdev, i);
1005 break;
1006 }
1da177e4
LT		 1007 }
1008 }
1009
e508be17
JB		 1010 /* make ready for any if (hw->...) below */
1011 err = e1000_init_hw_struct(adapter, hw);
1012 if (err)
1013 goto err_sw_init;
1014
6cfbd97b 1015 /* there is a workaround being applied below that limits
e508be17
JB		 1016 * 64-bit DMA addresses to 64-bit hardware. There are some
1017 * 32-bit adapters that Tx hang when given 64-bit DMA addresses
1018 */
1019 pci_using_dac = 0;
1020 if ((hw->bus_type == e1000_bus_type_pcix) &&
9931a26e 1021 !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
e508be17 1022 pci_using_dac = 1;
e508be17 1023 } else {
9931a26e 1024 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
19a0b67a
DN		 1025 if (err) {
1026 pr_err("No usable DMA config, aborting\n");
1027 goto err_dma;
1028 }
e508be17
JB		 1029 }
1030
0e7614bc 1031 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1032 e1000_set_ethtool_ops(netdev);
1da177e4 1033 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1034 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1035
0eb5a34c 1036 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1037
1da177e4
LT		 1038 adapter->bd_number = cards_found;
1039
1040 /* setup the private structure */
1041
c7be73bc
JP		 1042 err = e1000_sw_init(adapter);
1043 if (err)
1da177e4
LT		 1044 goto err_sw_init;
1045
6dd62ab0 1046 err = -EIO;
5377a416 1047 if (hw->mac_type == e1000_ce4100) {
13acde8f
FF		 1048 hw->ce4100_gbe_mdio_base_virt =
1049 ioremap(pci_resource_start(pdev, BAR_1),
5377a416
DB		 1050 pci_resource_len(pdev, BAR_1));
1051
13acde8f 1052 if (!hw->ce4100_gbe_mdio_base_virt)
5377a416
DB		 1053 goto err_mdio_ioremap;
1054 }
2d7edb92 1055
1dc32918 1056 if (hw->mac_type >= e1000_82543) {
e97d3207 1057 netdev->hw_features = NETIF_F_SG |
5622e404 1058 NETIF_F_HW_CSUM |
f646968f
PM		 1059 NETIF_F_HW_VLAN_CTAG_RX;
1060 netdev->features = NETIF_F_HW_VLAN_CTAG_TX |
1061 NETIF_F_HW_VLAN_CTAG_FILTER;
1da177e4
LT		 1062 }
1063
1dc32918
JP		 1064 if ((hw->mac_type >= e1000_82544) &&
1065 (hw->mac_type != e1000_82547))
e97d3207
MM		 1066 netdev->hw_features |= NETIF_F_TSO;
1067
11a78dcf
BG		 1068 netdev->priv_flags |= IFF_SUPP_NOFCS;
1069
e97d3207 1070 netdev->features |= netdev->hw_features;
7500673b
TD		 1071 netdev->hw_features |= (NETIF_F_RXCSUM |
1072 NETIF_F_RXALL |
1073 NETIF_F_RXFCS);
2d7edb92 1074
7b872a55 1075 if (pci_using_dac) {
1da177e4 1076 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 1077 netdev->vlan_features |= NETIF_F_HIGHDMA;
1078 }
1da177e4 1079
7500673b
TD		 1080 netdev->vlan_features |= (NETIF_F_TSO |
1081 NETIF_F_HW_CSUM |
1082 NETIF_F_SG);
20501a69 1083
01789349
JP		 1084 netdev->priv_flags |= IFF_UNICAST_FLT;
1085
1dc32918 1086 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1087
cd94dd0b 1088 /* initialize eeprom parameters */
1dc32918 1089 if (e1000_init_eeprom_params(hw)) {
feb8f478 1090 e_err(probe, "EEPROM initialization failed\n");
6dd62ab0 1091 goto err_eeprom;
cd94dd0b
AK		 1092 }
1093
96838a40 1094 /* before reading the EEPROM, reset the controller to
6cfbd97b
JK		 1095 * put the device in a known good starting state
1096 */
96838a40 1097
1dc32918 1098 e1000_reset_hw(hw);
1da177e4
LT		 1099
1100 /* make sure the EEPROM is good */
1dc32918 1101 if (e1000_validate_eeprom_checksum(hw) < 0) {
feb8f478 1102 e_err(probe, "The EEPROM Checksum Is Not Valid\n");
67b3c27c 1103 e1000_dump_eeprom(adapter);
6cfbd97b 1104 /* set MAC address to all zeroes to invalidate and temporary
67b3c27c
AK		 1105 * disable this device for the user. This blocks regular
1106 * traffic while still permitting ethtool ioctls from reaching
1107 * the hardware as well as allowing the user to run the
1108 * interface after manually setting a hw addr using
1109 * `ip set address`
1110 */
1dc32918 1111 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1112 } else {
1113 /* copy the MAC address out of the EEPROM */
1dc32918 1114 if (e1000_read_mac_addr(hw))
feb8f478 1115 e_err(probe, "EEPROM Read Error\n");
1da177e4 1116 }
67b3c27c 1117 /* don't block initalization here due to bad MAC address */
1dc32918 1118 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1119
aaeb6cdf 1120 if (!is_valid_ether_addr(netdev->dev_addr))
feb8f478 1121 e_err(probe, "Invalid MAC Address\n");
1da177e4 1122
1da177e4 1123
a4010afe
JB		 1124 INIT_DELAYED_WORK(&adapter->watchdog_task, e1000_watchdog);
1125 INIT_DELAYED_WORK(&adapter->fifo_stall_task,
1126 e1000_82547_tx_fifo_stall_task);
1127 INIT_DELAYED_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
65f27f38 1128 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1129
1da177e4
LT		 1130 e1000_check_options(adapter);
1131
1132 /* Initial Wake on LAN setting
1133 * If APM wake is enabled in the EEPROM,
1134 * enable the ACPI Magic Packet filter
1135 */
1136
1dc32918 1137 switch (hw->mac_type) {
1da177e4
LT		 1138 case e1000_82542_rev2_0:
1139 case e1000_82542_rev2_1:
1140 case e1000_82543:
1141 break;
1142 case e1000_82544:
1dc32918 1143 e1000_read_eeprom(hw,
1da177e4
LT		 1144 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1145 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1146 break;
1147 case e1000_82546:
1148 case e1000_82546_rev_3:
1dc32918
JP		 1149 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1150 e1000_read_eeprom(hw,
1da177e4
LT		 1151 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1152 break;
1153 }
1154 /* Fall Through */
1155 default:
1dc32918 1156 e1000_read_eeprom(hw,
1da177e4
LT		 1157 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1158 break;
1159 }
96838a40 1160 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1161 adapter->eeprom_wol |= E1000_WUFC_MAG;
1162
1163 /* now that we have the eeprom settings, apply the special cases
1164 * where the eeprom may be wrong or the board simply won't support
6cfbd97b
JK		 1165 * wake on lan on a particular port
1166 */
120cd576
JB		 1167 switch (pdev->device) {
1168 case E1000_DEV_ID_82546GB_PCIE:
1169 adapter->eeprom_wol = 0;
1170 break;
1171 case E1000_DEV_ID_82546EB_FIBER:
1172 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1173 /* Wake events only supported on port A for dual fiber
6cfbd97b
JK		 1174 * regardless of eeprom setting
1175 */
1dc32918 1176 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1177 adapter->eeprom_wol = 0;
1178 break;
1179 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1180 /* if quad port adapter, disable WoL on all but port A */
1181 if (global_quad_port_a != 0)
1182 adapter->eeprom_wol = 0;
1183 else
3db1cd5c 1184 adapter->quad_port_a = true;
120cd576
JB		 1185 /* Reset for multiple quad port adapters */
1186 if (++global_quad_port_a == 4)
1187 global_quad_port_a = 0;
1188 break;
1189 }
1190
1191 /* initialize the wol settings based on the eeprom settings */
1192 adapter->wol = adapter->eeprom_wol;
de126489 1193 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1194
5377a416
DB		 1195 /* Auto detect PHY address */
1196 if (hw->mac_type == e1000_ce4100) {
1197 for (i = 0; i < 32; i++) {
1198 hw->phy_addr = i;
1199 e1000_read_phy_reg(hw, PHY_ID2, &tmp);
1200 if (tmp == 0 || tmp == 0xFF) {
1201 if (i == 31)
1202 goto err_eeprom;
1203 continue;
1204 } else
1205 break;
1206 }
1207 }
1208
675ad473
ET		 1209 /* reset the hardware with the new settings */
1210 e1000_reset(adapter);
1211
1212 strcpy(netdev->name, "eth%d");
1213 err = register_netdev(netdev);
1214 if (err)
1215 goto err_register;
1216
52f5509f 1217 e1000_vlan_filter_on_off(adapter, false);
5622e404 1218
fb3d47d4 1219 /* print bus type/speed/width info */
feb8f478 1220 e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
7837e58c
JP		 1221 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1222 ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
1223 (hw->bus_speed == e1000_bus_speed_120) ? 120 :
1224 (hw->bus_speed == e1000_bus_speed_100) ? 100 :
1225 (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
1226 ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
1227 netdev->dev_addr);
1314bbf3 1228
eb62efd2
JB		 1229 /* carrier off reporting is important to ethtool even BEFORE open */
1230 netif_carrier_off(netdev);
1231
feb8f478 1232 e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
1da177e4
LT		 1233
1234 cards_found++;
1235 return 0;
1236
1237err_register:
6dd62ab0 1238err_eeprom:
1532ecea 1239 e1000_phy_hw_reset(hw);
6dd62ab0 1240
1dc32918
JP		 1241 if (hw->flash_address)
1242 iounmap(hw->flash_address);
6dd62ab0
VA		 1243 kfree(adapter->tx_ring);
1244 kfree(adapter->rx_ring);
e508be17 1245err_dma:
1da177e4 1246err_sw_init:
5377a416 1247err_mdio_ioremap:
13acde8f 1248 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918 1249 iounmap(hw->hw_addr);
1da177e4
LT		 1250err_ioremap:
1251 free_netdev(netdev);
1252err_alloc_etherdev:
81250297 1253 pci_release_selected_regions(pdev, bars);
6dd62ab0 1254err_pci_reg:
6dd62ab0 1255 pci_disable_device(pdev);
1da177e4
LT		 1256 return err;
1257}
1258
1259/**
1260 * e1000_remove - Device Removal Routine
1261 * @pdev: PCI device information struct
1262 *
1263 * e1000_remove is called by the PCI subsystem to alert the driver
1264 * that it should release a PCI device. The could be caused by a
1265 * Hot-Plug event, or because the driver is going to be removed from
1266 * memory.
1267 **/
9f9a12f8 1268static void e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1269{
1270 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1271 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1272 struct e1000_hw *hw = &adapter->hw;
1da177e4 1273
a4010afe 1274 e1000_down_and_stop(adapter);
0fccd0e9 1275 e1000_release_manageability(adapter);
1da177e4 1276
bea3348e
SH		 1277 unregister_netdev(netdev);
1278
1532ecea 1279 e1000_phy_hw_reset(hw);
1da177e4 1280
24025e4e
MC		 1281 kfree(adapter->tx_ring);
1282 kfree(adapter->rx_ring);
24025e4e 1283
1c26750c 1284 if (hw->mac_type == e1000_ce4100)
13acde8f 1285 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918
JP		 1286 iounmap(hw->hw_addr);
1287 if (hw->flash_address)
1288 iounmap(hw->flash_address);
81250297 1289 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1290
1291 free_netdev(netdev);
1292
1293 pci_disable_device(pdev);
1294}
1295
1296/**
1297 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1298 * @adapter: board private structure to initialize
1299 *
1300 * e1000_sw_init initializes the Adapter private data structure.
e508be17 1301 * e1000_init_hw_struct MUST be called before this function
1da177e4 1302 **/
9f9a12f8 1303static int e1000_sw_init(struct e1000_adapter *adapter)
1da177e4 1304{
eb0f8054 1305 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4 1306
f56799ea
JK		 1307 adapter->num_tx_queues = 1;
1308 adapter->num_rx_queues = 1;
581d708e
MC		 1309
1310 if (e1000_alloc_queues(adapter)) {
feb8f478 1311 e_err(probe, "Unable to allocate memory for queues\n");
581d708e
MC		 1312 return -ENOMEM;
1313 }
1314
47313054 1315 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1316 e1000_irq_disable(adapter);
1317
1da177e4 1318 spin_lock_init(&adapter->stats_lock);
0ef4eedc 1319 mutex_init(&adapter->mutex);
1da177e4 1320
1314bbf3
AK		 1321 set_bit(__E1000_DOWN, &adapter->flags);
1322
1da177e4
LT		 1323 return 0;
1324}
1325
581d708e
MC		 1326/**
1327 * e1000_alloc_queues - Allocate memory for all rings
1328 * @adapter: board private structure to initialize
1329 *
1330 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1331 * number of queues at compile-time.
581d708e 1332 **/
9f9a12f8 1333static int e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1334{
1c7e5b12
YB		 1335 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1336 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1337 if (!adapter->tx_ring)
1338 return -ENOMEM;
581d708e 1339
1c7e5b12
YB		 1340 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1341 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1342 if (!adapter->rx_ring) {
1343 kfree(adapter->tx_ring);
1344 return -ENOMEM;
1345 }
581d708e 1346
581d708e
MC		 1347 return E1000_SUCCESS;
1348}
1349
1da177e4
LT		 1350/**
1351 * e1000_open - Called when a network interface is made active
1352 * @netdev: network interface device structure
1353 *
1354 * Returns 0 on success, negative value on failure
1355 *
1356 * The open entry point is called when a network interface is made
1357 * active by the system (IFF_UP). At this point all resources needed
1358 * for transmit and receive operations are allocated, the interrupt
a4010afe 1359 * handler is registered with the OS, the watchdog task is started,
1da177e4
LT		 1360 * and the stack is notified that the interface is ready.
1361 **/
64798845 1362static int e1000_open(struct net_device *netdev)
1da177e4 1363{
60490fe0 1364 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1365 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1366 int err;
1367
2db10a08 1368 /* disallow open during test */
1314bbf3 1369 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1370 return -EBUSY;
1371
eb62efd2
JB		 1372 netif_carrier_off(netdev);
1373
1da177e4 1374 /* allocate transmit descriptors */
e0aac5a2
AK		 1375 err = e1000_setup_all_tx_resources(adapter);
1376 if (err)
1da177e4
LT		 1377 goto err_setup_tx;
1378
1379 /* allocate receive descriptors */
e0aac5a2 1380 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1381 if (err)
e0aac5a2 1382 goto err_setup_rx;
b5bf28cd 1383
79f05bf0
AK		 1384 e1000_power_up_phy(adapter);
1385
2d7edb92 1386 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1387 if ((hw->mng_cookie.status &
2d7edb92
MC		 1388 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1389 e1000_update_mng_vlan(adapter);
1390 }
1da177e4 1391
e0aac5a2
AK		 1392 /* before we allocate an interrupt, we must be ready to handle it.
1393 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1394 * as soon as we call pci_request_irq, so we have to setup our
6cfbd97b
JK		 1395 * clean_rx handler before we do so.
1396 */
e0aac5a2
AK		 1397 e1000_configure(adapter);
1398
1399 err = e1000_request_irq(adapter);
1400 if (err)
1401 goto err_req_irq;
1402
1403 /* From here on the code is the same as e1000_up() */
1404 clear_bit(__E1000_DOWN, &adapter->flags);
1405
bea3348e 1406 napi_enable(&adapter->napi);
47313054 1407
e0aac5a2
AK		 1408 e1000_irq_enable(adapter);
1409
076152d5
BH		 1410 netif_start_queue(netdev);
1411
e0aac5a2 1412 /* fire a link status change interrupt to start the watchdog */
1dc32918 1413 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1414
1da177e4
LT		 1415 return E1000_SUCCESS;
1416
b5bf28cd 1417err_req_irq:
e0aac5a2 1418 e1000_power_down_phy(adapter);
581d708e 1419 e1000_free_all_rx_resources(adapter);
1da177e4 1420err_setup_rx:
581d708e 1421 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1422err_setup_tx:
1423 e1000_reset(adapter);
1424
1425 return err;
1426}
1427
1428/**
1429 * e1000_close - Disables a network interface
1430 * @netdev: network interface device structure
1431 *
1432 * Returns 0, this is not allowed to fail
1433 *
1434 * The close entry point is called when an interface is de-activated
1435 * by the OS. The hardware is still under the drivers control, but
1436 * needs to be disabled. A global MAC reset is issued to stop the
1437 * hardware, and all transmit and receive resources are freed.
1438 **/
64798845 1439static int e1000_close(struct net_device *netdev)
1da177e4 1440{
60490fe0 1441 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1442 struct e1000_hw *hw = &adapter->hw;
1da177e4 1443
2db10a08 1444 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1445 e1000_down(adapter);
79f05bf0 1446 e1000_power_down_phy(adapter);
2db10a08 1447 e1000_free_irq(adapter);
1da177e4 1448
581d708e
MC		 1449 e1000_free_all_tx_resources(adapter);
1450 e1000_free_all_rx_resources(adapter);
1da177e4 1451
4666560a 1452 /* kill manageability vlan ID if supported, but not if a vlan with
6cfbd97b
JK		 1453 * the same ID is registered on the host OS (let 8021q kill it)
1454 */
1dc32918 1455 if ((hw->mng_cookie.status &
6cfbd97b
JK		 1456 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1457 !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
80d5c368
PM		 1458 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
1459 adapter->mng_vlan_id);
2d7edb92 1460 }
b55ccb35 1461
1da177e4
LT		 1462 return 0;
1463}
1464
1465/**
1466 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1467 * @adapter: address of board private structure
2d7edb92
MC		 1468 * @start: address of beginning of memory
1469 * @len: length of memory
1da177e4 1470 **/
64798845
JP		 1471static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1472 unsigned long len)
1da177e4 1473{
1dc32918 1474 struct e1000_hw *hw = &adapter->hw;
e982f17c 1475 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1476 unsigned long end = begin + len;
1477
2648345f 1478 /* First rev 82545 and 82546 need to not allow any memory
6cfbd97b
JK		 1479 * write location to cross 64k boundary due to errata 23
1480 */
1dc32918 1481 if (hw->mac_type == e1000_82545 ||
5377a416 1482 hw->mac_type == e1000_ce4100 ||
1dc32918 1483 hw->mac_type == e1000_82546) {
c3033b01 1484 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1485 }
1486
c3033b01 1487 return true;
1da177e4
LT		 1488}
1489
1490/**
1491 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1492 * @adapter: board private structure
581d708e 1493 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1494 *
1495 * Return 0 on success, negative on failure
1496 **/
64798845
JP		 1497static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1498 struct e1000_tx_ring *txdr)
1da177e4 1499{
1da177e4
LT		 1500 struct pci_dev *pdev = adapter->pdev;
1501 int size;
1502
1503 size = sizeof(struct e1000_buffer) * txdr->count;
89bf67f1 1504 txdr->buffer_info = vzalloc(size);
14f8dc49 1505 if (!txdr->buffer_info)
1da177e4 1506 return -ENOMEM;
1da177e4
LT		 1507
1508 /* round up to nearest 4K */
1509
1510 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1511 txdr->size = ALIGN(txdr->size, 4096);
1da177e4 1512
b16f53be
NN		 1513 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1514 GFP_KERNEL);
96838a40 1515 if (!txdr->desc) {
1da177e4 1516setup_tx_desc_die:
1da177e4
LT		 1517 vfree(txdr->buffer_info);
1518 return -ENOMEM;
1519 }
1520
2648345f 1521 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1522 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1523 void *olddesc = txdr->desc;
1524 dma_addr_t olddma = txdr->dma;
feb8f478 1525 e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
675ad473 1526 txdr->size, txdr->desc);
2648345f 1527 /* Try again, without freeing the previous */
b16f53be
NN		 1528 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
1529 &txdr->dma, GFP_KERNEL);
2648345f 1530 /* Failed allocation, critical failure */
96838a40 1531 if (!txdr->desc) {
b16f53be
NN		 1532 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1533 olddma);
1da177e4
LT		 1534 goto setup_tx_desc_die;
1535 }
1536
1537 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1538 /* give up */
b16f53be
NN		 1539 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1540 txdr->dma);
1541 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1542 olddma);
feb8f478 1543 e_err(probe, "Unable to allocate aligned memory "
675ad473 1544 "for the transmit descriptor ring\n");
1da177e4
LT		 1545 vfree(txdr->buffer_info);
1546 return -ENOMEM;
1547 } else {
2648345f 1548 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1549 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1550 olddma);
1da177e4
LT		 1551 }
1552 }
1553 memset(txdr->desc, 0, txdr->size);
1554
1555 txdr->next_to_use = 0;
1556 txdr->next_to_clean = 0;
1557
1558 return 0;
1559}
1560
581d708e
MC		 1561/**
1562 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1563 * (Descriptors) for all queues
1564 * @adapter: board private structure
1565 *
581d708e
MC		 1566 * Return 0 on success, negative on failure
1567 **/
64798845 1568int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1569{
1570 int i, err = 0;
1571
f56799ea 1572 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1573 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1574 if (err) {
feb8f478 1575 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1576 for (i-- ; i >= 0; i--)
1577 e1000_free_tx_resources(adapter,
1578 &adapter->tx_ring[i]);
581d708e
MC		 1579 break;
1580 }
1581 }
1582
1583 return err;
1584}
1585
1da177e4
LT		 1586/**
1587 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1588 * @adapter: board private structure
1589 *
1590 * Configure the Tx unit of the MAC after a reset.
1591 **/
64798845 1592static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1593{
406874a7 1594 u64 tdba;
581d708e 1595 struct e1000_hw *hw = &adapter->hw;
1532ecea 1596 u32 tdlen, tctl, tipg;
406874a7 1597 u32 ipgr1, ipgr2;
1da177e4
LT		 1598
1599 /* Setup the HW Tx Head and Tail descriptor pointers */
1600
f56799ea 1601 switch (adapter->num_tx_queues) {
24025e4e
MC		 1602 case 1:
1603 default:
581d708e
MC		 1604 tdba = adapter->tx_ring[0].dma;
1605 tdlen = adapter->tx_ring[0].count *
1606 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1607 ew32(TDLEN, tdlen);
1608 ew32(TDBAH, (tdba >> 32));
1609 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1610 ew32(TDT, 0);
1611 ew32(TDH, 0);
6cfbd97b
JK		 1612 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ?
1613 E1000_TDH : E1000_82542_TDH);
1614 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ?
1615 E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1616 break;
1617 }
1da177e4
LT		 1618
1619 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1620 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1621 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1622 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1623 else
1624 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1625
581d708e 1626 switch (hw->mac_type) {
1da177e4
LT		 1627 case e1000_82542_rev2_0:
1628 case e1000_82542_rev2_1:
1629 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1630 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1631 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1632 break;
1633 default:
0fadb059
JK		 1634 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1635 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1636 break;
1da177e4 1637 }
0fadb059
JK		 1638 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1639 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1640 ew32(TIPG, tipg);
1da177e4
LT		 1641
1642 /* Set the Tx Interrupt Delay register */
1643
1dc32918 1644 ew32(TIDV, adapter->tx_int_delay);
581d708e 1645 if (hw->mac_type >= e1000_82540)
1dc32918 1646 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1647
1648 /* Program the Transmit Control Register */
1649
1dc32918 1650 tctl = er32(TCTL);
1da177e4 1651 tctl &= ~E1000_TCTL_CT;
7e6c9861 1652 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1653 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1654
581d708e 1655 e1000_config_collision_dist(hw);
1da177e4
LT		 1656
1657 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1658 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1659
1660 /* only set IDE if we are delaying interrupts using the timers */
1661 if (adapter->tx_int_delay)
1662 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1663
581d708e 1664 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1665 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1666 else
1667 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1668
1669 /* Cache if we're 82544 running in PCI-X because we'll
6cfbd97b
JK		 1670 * need this to apply a workaround later in the send path.
1671 */
581d708e
MC		 1672 if (hw->mac_type == e1000_82544 &&
1673 hw->bus_type == e1000_bus_type_pcix)
3db1cd5c 1674 adapter->pcix_82544 = true;
7e6c9861 1675
1dc32918 1676 ew32(TCTL, tctl);
7e6c9861 1677
1da177e4
LT		 1678}
1679
1680/**
1681 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1682 * @adapter: board private structure
581d708e 1683 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1684 *
1685 * Returns 0 on success, negative on failure
1686 **/
64798845
JP		 1687static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1688 struct e1000_rx_ring *rxdr)
1da177e4 1689{
1da177e4 1690 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1691 int size, desc_len;
1da177e4
LT		 1692
1693 size = sizeof(struct e1000_buffer) * rxdr->count;
89bf67f1 1694 rxdr->buffer_info = vzalloc(size);
14f8dc49 1695 if (!rxdr->buffer_info)
1da177e4 1696 return -ENOMEM;
1da177e4 1697
1532ecea 1698 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1699
1da177e4
LT		 1700 /* Round up to nearest 4K */
1701
2d7edb92 1702 rxdr->size = rxdr->count * desc_len;
9099cfb9 1703 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4 1704
b16f53be
NN		 1705 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1706 GFP_KERNEL);
581d708e 1707 if (!rxdr->desc) {
1da177e4 1708setup_rx_desc_die:
1da177e4
LT		 1709 vfree(rxdr->buffer_info);
1710 return -ENOMEM;
1711 }
1712
2648345f 1713 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1714 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1715 void *olddesc = rxdr->desc;
1716 dma_addr_t olddma = rxdr->dma;
feb8f478 1717 e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
675ad473 1718 rxdr->size, rxdr->desc);
2648345f 1719 /* Try again, without freeing the previous */
b16f53be
NN		 1720 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
1721 &rxdr->dma, GFP_KERNEL);
2648345f 1722 /* Failed allocation, critical failure */
581d708e 1723 if (!rxdr->desc) {
b16f53be
NN		 1724 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1725 olddma);
1da177e4
LT		 1726 goto setup_rx_desc_die;
1727 }
1728
1729 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1730 /* give up */
b16f53be
NN		 1731 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1732 rxdr->dma);
1733 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1734 olddma);
feb8f478
ET		 1735 e_err(probe, "Unable to allocate aligned memory for "
1736 "the Rx descriptor ring\n");
581d708e 1737 goto setup_rx_desc_die;
1da177e4 1738 } else {
2648345f 1739 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1740 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1741 olddma);
1da177e4
LT		 1742 }
1743 }
1744 memset(rxdr->desc, 0, rxdr->size);
1745
1746 rxdr->next_to_clean = 0;
1747 rxdr->next_to_use = 0;
edbbb3ca 1748 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1749
1750 return 0;
1751}
1752
581d708e
MC		 1753/**
1754 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1755 * (Descriptors) for all queues
1756 * @adapter: board private structure
1757 *
581d708e
MC		 1758 * Return 0 on success, negative on failure
1759 **/
64798845 1760int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1761{
1762 int i, err = 0;
1763
f56799ea 1764 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1765 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1766 if (err) {
feb8f478 1767 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1768 for (i-- ; i >= 0; i--)
1769 e1000_free_rx_resources(adapter,
1770 &adapter->rx_ring[i]);
581d708e
MC		 1771 break;
1772 }
1773 }
1774
1775 return err;
1776}
1777
1da177e4 1778/**
2648345f 1779 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1780 * @adapter: Board private structure
1781 **/
64798845 1782static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1783{
1dc32918 1784 struct e1000_hw *hw = &adapter->hw;
630b25cd 1785 u32 rctl;
1da177e4 1786
1dc32918 1787 rctl = er32(RCTL);
1da177e4
LT		 1788
1789 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1790
d5bc77a2
DN		 1791 rctl |= E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
1792 E1000_RCTL_RDMTS_HALF |
1dc32918 1793 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1794
1dc32918 1795 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1796 rctl |= E1000_RCTL_SBP;
1797 else
1798 rctl &= ~E1000_RCTL_SBP;
1799
2d7edb92
MC		 1800 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1801 rctl &= ~E1000_RCTL_LPE;
1802 else
1803 rctl |= E1000_RCTL_LPE;
1804
1da177e4 1805 /* Setup buffer sizes */
9e2feace
AK		 1806 rctl &= ~E1000_RCTL_SZ_4096;
1807 rctl |= E1000_RCTL_BSEX;
1808 switch (adapter->rx_buffer_len) {
a1415ee6
JK		 1809 case E1000_RXBUFFER_2048:
1810 default:
1811 rctl |= E1000_RCTL_SZ_2048;
1812 rctl &= ~E1000_RCTL_BSEX;
1813 break;
1814 case E1000_RXBUFFER_4096:
1815 rctl |= E1000_RCTL_SZ_4096;
1816 break;
1817 case E1000_RXBUFFER_8192:
1818 rctl |= E1000_RCTL_SZ_8192;
1819 break;
1820 case E1000_RXBUFFER_16384:
1821 rctl |= E1000_RCTL_SZ_16384;
1822 break;
2d7edb92
MC		 1823 }
1824
e825b731
BG		 1825 /* This is useful for sniffing bad packets. */
1826 if (adapter->netdev->features & NETIF_F_RXALL) {
1827 /* UPE and MPE will be handled by normal PROMISC logic
6cfbd97b
JK		 1828 * in e1000e_set_rx_mode
1829 */
e825b731
BG		 1830 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
1831 E1000_RCTL_BAM | /* RX All Bcast Pkts */
1832 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
1833
1834 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
1835 E1000_RCTL_DPF | /* Allow filtered pause */
1836 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
1837 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
1838 * and that breaks VLANs.
1839 */
1840 }
1841
1dc32918 1842 ew32(RCTL, rctl);
1da177e4
LT		 1843}
1844
1845/**
1846 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1847 * @adapter: board private structure
1848 *
1849 * Configure the Rx unit of the MAC after a reset.
1850 **/
64798845 1851static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1852{
406874a7 1853 u64 rdba;
581d708e 1854 struct e1000_hw *hw = &adapter->hw;
1532ecea 1855 u32 rdlen, rctl, rxcsum;
2d7edb92 1856
edbbb3ca
JB		 1857 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1858 rdlen = adapter->rx_ring[0].count *
1859 sizeof(struct e1000_rx_desc);
1860 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1861 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1862 } else {
1863 rdlen = adapter->rx_ring[0].count *
1864 sizeof(struct e1000_rx_desc);
1865 adapter->clean_rx = e1000_clean_rx_irq;
1866 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1867 }
1da177e4
LT		 1868
1869 /* disable receives while setting up the descriptors */
1dc32918
JP		 1870 rctl = er32(RCTL);
1871 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1872
1873 /* set the Receive Delay Timer Register */
1dc32918 1874 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1875
581d708e 1876 if (hw->mac_type >= e1000_82540) {
1dc32918 1877 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1878 if (adapter->itr_setting != 0)
1dc32918 1879 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1880 }
1881
581d708e 1882 /* Setup the HW Rx Head and Tail Descriptor Pointers and
6cfbd97b
JK		 1883 * the Base and Length of the Rx Descriptor Ring
1884 */
f56799ea 1885 switch (adapter->num_rx_queues) {
24025e4e
MC		 1886 case 1:
1887 default:
581d708e 1888 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1889 ew32(RDLEN, rdlen);
1890 ew32(RDBAH, (rdba >> 32));
1891 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1892 ew32(RDT, 0);
1893 ew32(RDH, 0);
6cfbd97b
JK		 1894 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ?
1895 E1000_RDH : E1000_82542_RDH);
1896 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ?
1897 E1000_RDT : E1000_82542_RDT);
581d708e 1898 break;
24025e4e
MC		 1899 }
1900
1da177e4 1901 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1902 if (hw->mac_type >= e1000_82543) {
1dc32918 1903 rxcsum = er32(RXCSUM);
630b25cd 1904 if (adapter->rx_csum)
2d7edb92 1905 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1906 else
2d7edb92 1907 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1908 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1909 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1910 }
1911
1912 /* Enable Receives */
d5bc77a2 1913 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4
LT		 1914}
1915
1916/**
581d708e 1917 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1918 * @adapter: board private structure
581d708e 1919 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1920 *
1921 * Free all transmit software resources
1922 **/
64798845
JP		 1923static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1924 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1925{
1926 struct pci_dev *pdev = adapter->pdev;
1927
581d708e 1928 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1929
581d708e
MC		 1930 vfree(tx_ring->buffer_info);
1931 tx_ring->buffer_info = NULL;
1da177e4 1932
b16f53be
NN		 1933 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1934 tx_ring->dma);
1da177e4 1935
581d708e
MC		 1936 tx_ring->desc = NULL;
1937}
1938
1939/**
1940 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1941 * @adapter: board private structure
1942 *
1943 * Free all transmit software resources
1944 **/
64798845 1945void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1946{
1947 int i;
1948
f56799ea 1949 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1950 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1951}
1952
64798845
JP		 1953static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1954 struct e1000_buffer *buffer_info)
1da177e4 1955{
602c0554
AD		 1956 if (buffer_info->dma) {
1957 if (buffer_info->mapped_as_page)
b16f53be
NN		 1958 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1959 buffer_info->length, DMA_TO_DEVICE);
602c0554 1960 else
b16f53be 1961 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
602c0554 1962 buffer_info->length,
b16f53be 1963 DMA_TO_DEVICE);
602c0554
AD		 1964 buffer_info->dma = 0;
1965 }
a9ebadd6 1966 if (buffer_info->skb) {
1da177e4 1967 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1968 buffer_info->skb = NULL;
1969 }
37e73df8 1970 buffer_info->time_stamp = 0;
a9ebadd6 1971 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1972}
1973
1974/**
1975 * e1000_clean_tx_ring - Free Tx Buffers
1976 * @adapter: board private structure
581d708e 1977 * @tx_ring: ring to be cleaned
1da177e4 1978 **/
64798845
JP		 1979static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1980 struct e1000_tx_ring *tx_ring)
1da177e4 1981{
1dc32918 1982 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1983 struct e1000_buffer *buffer_info;
1984 unsigned long size;
1985 unsigned int i;
1986
1987 /* Free all the Tx ring sk_buffs */
1988
96838a40 1989 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1990 buffer_info = &tx_ring->buffer_info[i];
1991 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1992 }
1993
2f66fd36 1994 netdev_reset_queue(adapter->netdev);
1da177e4
LT		 1995 size = sizeof(struct e1000_buffer) * tx_ring->count;
1996 memset(tx_ring->buffer_info, 0, size);
1997
1998 /* Zero out the descriptor ring */
1999
2000 memset(tx_ring->desc, 0, tx_ring->size);
2001
2002 tx_ring->next_to_use = 0;
2003 tx_ring->next_to_clean = 0;
3db1cd5c 2004 tx_ring->last_tx_tso = false;
1da177e4 2005
1dc32918
JP		 2006 writel(0, hw->hw_addr + tx_ring->tdh);
2007 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2008}
2009
2010/**
2011 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2012 * @adapter: board private structure
2013 **/
64798845 2014static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2015{
2016 int i;
2017
f56799ea 2018 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2019 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2020}
2021
2022/**
2023 * e1000_free_rx_resources - Free Rx Resources
2024 * @adapter: board private structure
581d708e 2025 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2026 *
2027 * Free all receive software resources
2028 **/
64798845
JP		 2029static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2030 struct e1000_rx_ring *rx_ring)
1da177e4 2031{
1da177e4
LT		 2032 struct pci_dev *pdev = adapter->pdev;
2033
581d708e 2034 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2035
2036 vfree(rx_ring->buffer_info);
2037 rx_ring->buffer_info = NULL;
2038
b16f53be
NN		 2039 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2040 rx_ring->dma);
1da177e4
LT		 2041
2042 rx_ring->desc = NULL;
2043}
2044
2045/**
581d708e 2046 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2047 * @adapter: board private structure
581d708e
MC		 2048 *
2049 * Free all receive software resources
2050 **/
64798845 2051void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2052{
2053 int i;
2054
f56799ea 2055 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2056 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2057}
2058
2059/**
2060 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2061 * @adapter: board private structure
2062 * @rx_ring: ring to free buffers from
1da177e4 2063 **/
64798845
JP		 2064static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2065 struct e1000_rx_ring *rx_ring)
1da177e4 2066{
1dc32918 2067 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2068 struct e1000_buffer *buffer_info;
2069 struct pci_dev *pdev = adapter->pdev;
2070 unsigned long size;
630b25cd 2071 unsigned int i;
1da177e4
LT		 2072
2073 /* Free all the Rx ring sk_buffs */
96838a40 2074 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2075 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB		 2076 if (buffer_info->dma &&
2077 adapter->clean_rx == e1000_clean_rx_irq) {
b16f53be 2078 dma_unmap_single(&pdev->dev, buffer_info->dma,
edbbb3ca 2079 buffer_info->length,
b16f53be 2080 DMA_FROM_DEVICE);
edbbb3ca
JB		 2081 } else if (buffer_info->dma &&
2082 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
b16f53be
NN		 2083 dma_unmap_page(&pdev->dev, buffer_info->dma,
2084 buffer_info->length,
2085 DMA_FROM_DEVICE);
679be3ba 2086 }
1da177e4 2087
679be3ba 2088 buffer_info->dma = 0;
edbbb3ca
JB		 2089 if (buffer_info->page) {
2090 put_page(buffer_info->page);
2091 buffer_info->page = NULL;
2092 }
679be3ba 2093 if (buffer_info->skb) {
1da177e4
LT		 2094 dev_kfree_skb(buffer_info->skb);
2095 buffer_info->skb = NULL;
997f5cbd 2096 }
1da177e4
LT		 2097 }
2098
edbbb3ca
JB		 2099 /* there also may be some cached data from a chained receive */
2100 if (rx_ring->rx_skb_top) {
2101 dev_kfree_skb(rx_ring->rx_skb_top);
2102 rx_ring->rx_skb_top = NULL;
2103 }
2104
1da177e4
LT		 2105 size = sizeof(struct e1000_buffer) * rx_ring->count;
2106 memset(rx_ring->buffer_info, 0, size);
2107
2108 /* Zero out the descriptor ring */
1da177e4
LT		 2109 memset(rx_ring->desc, 0, rx_ring->size);
2110
2111 rx_ring->next_to_clean = 0;
2112 rx_ring->next_to_use = 0;
2113
1dc32918
JP		 2114 writel(0, hw->hw_addr + rx_ring->rdh);
2115 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2116}
2117
2118/**
2119 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2120 * @adapter: board private structure
2121 **/
64798845 2122static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2123{
2124 int i;
2125
f56799ea 2126 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2127 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2128}
2129
2130/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2131 * and memory write and invalidate disabled for certain operations
2132 */
64798845 2133static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2134{
1dc32918 2135 struct e1000_hw *hw = &adapter->hw;
1da177e4 2136 struct net_device *netdev = adapter->netdev;
406874a7 2137 u32 rctl;
1da177e4 2138
1dc32918 2139 e1000_pci_clear_mwi(hw);
1da177e4 2140
1dc32918 2141 rctl = er32(RCTL);
1da177e4 2142 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2143 ew32(RCTL, rctl);
2144 E1000_WRITE_FLUSH();
1da177e4
LT		 2145 mdelay(5);
2146
96838a40 2147 if (netif_running(netdev))
581d708e 2148 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2149}
2150
64798845 2151static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2152{
1dc32918 2153 struct e1000_hw *hw = &adapter->hw;
1da177e4 2154 struct net_device *netdev = adapter->netdev;
406874a7 2155 u32 rctl;
1da177e4 2156
1dc32918 2157 rctl = er32(RCTL);
1da177e4 2158 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2159 ew32(RCTL, rctl);
2160 E1000_WRITE_FLUSH();
1da177e4
LT		 2161 mdelay(5);
2162
1dc32918
JP		 2163 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2164 e1000_pci_set_mwi(hw);
1da177e4 2165
96838a40 2166 if (netif_running(netdev)) {
72d64a43
JK		 2167 /* No need to loop, because 82542 supports only 1 queue */
2168 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2169 e1000_configure_rx(adapter);
72d64a43 2170 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2171 }
2172}
2173
2174/**
2175 * e1000_set_mac - Change the Ethernet Address of the NIC
2176 * @netdev: network interface device structure
2177 * @p: pointer to an address structure
2178 *
2179 * Returns 0 on success, negative on failure
2180 **/
64798845 2181static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2182{
60490fe0 2183 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2184 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2185 struct sockaddr *addr = p;
2186
96838a40 2187 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2188 return -EADDRNOTAVAIL;
2189
2190 /* 82542 2.0 needs to be in reset to write receive address registers */
2191
1dc32918 2192 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2193 e1000_enter_82542_rst(adapter);
2194
2195 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2196 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2197
1dc32918 2198 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2199
1dc32918 2200 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2201 e1000_leave_82542_rst(adapter);
2202
2203 return 0;
2204}
2205
2206/**
db0ce50d 2207 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2208 * @netdev: network interface device structure
2209 *
db0ce50d
PM		 2210 * The set_rx_mode entry point is called whenever the unicast or multicast
2211 * address lists or the network interface flags are updated. This routine is
2212 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2213 * promiscuous mode, and all-multi behavior.
2214 **/
64798845 2215static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2216{
60490fe0 2217 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2218 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2219 struct netdev_hw_addr *ha;
2220 bool use_uc = false;
406874a7
JP		 2221 u32 rctl;
2222 u32 hash_value;
868d5309 2223 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2224 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2225 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2226
14f8dc49 2227 if (!mcarray)
81c52285 2228 return;
cd94dd0b 2229
2648345f
MC		 2230 /* Check for Promiscuous and All Multicast modes */
2231
1dc32918 2232 rctl = er32(RCTL);
1da177e4 2233
96838a40 2234 if (netdev->flags & IFF_PROMISC) {
1da177e4 2235 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2236 rctl &= ~E1000_RCTL_VFE;
1da177e4 2237 } else {
1532ecea 2238 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2239 rctl |= E1000_RCTL_MPE;
1532ecea 2240 else
746b9f02 2241 rctl &= ~E1000_RCTL_MPE;
1532ecea 2242 /* Enable VLAN filter if there is a VLAN */
5622e404 2243 if (e1000_vlan_used(adapter))
1532ecea 2244 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2245 }
2246
32e7bfc4 2247 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2248 rctl |= E1000_RCTL_UPE;
2249 } else if (!(netdev->flags & IFF_PROMISC)) {
2250 rctl &= ~E1000_RCTL_UPE;
ccffad25 2251 use_uc = true;
1da177e4
LT		 2252 }
2253
1dc32918 2254 ew32(RCTL, rctl);
1da177e4
LT		 2255
2256 /* 82542 2.0 needs to be in reset to write receive address registers */
2257
96838a40 2258 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2259 e1000_enter_82542_rst(adapter);
2260
db0ce50d
PM		 2261 /* load the first 14 addresses into the exact filters 1-14. Unicast
2262 * addresses take precedence to avoid disabling unicast filtering
2263 * when possible.
2264 *
b595076a 2265 * RAR 0 is used for the station MAC address
1da177e4
LT		 2266 * if there are not 14 addresses, go ahead and clear the filters
2267 */
ccffad25
JP		 2268 i = 1;
2269 if (use_uc)
32e7bfc4 2270 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2271 if (i == rar_entries)
2272 break;
2273 e1000_rar_set(hw, ha->addr, i++);
2274 }
2275
22bedad3 2276 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP		 2277 if (i == rar_entries) {
2278 /* load any remaining addresses into the hash table */
2279 u32 hash_reg, hash_bit, mta;
22bedad3 2280 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP		 2281 hash_reg = (hash_value >> 5) & 0x7F;
2282 hash_bit = hash_value & 0x1F;
2283 mta = (1 << hash_bit);
2284 mcarray[hash_reg] |= mta;
10886af5 2285 } else {
22bedad3 2286 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT		 2287 }
2288 }
2289
7a81e9f3
JP		 2290 for (; i < rar_entries; i++) {
2291 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2292 E1000_WRITE_FLUSH();
2293 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2294 E1000_WRITE_FLUSH();
1da177e4
LT		 2295 }
2296
81c52285 2297 /* write the hash table completely, write from bottom to avoid
6cfbd97b
JK		 2298 * both stupid write combining chipsets, and flushing each write
2299 */
81c52285 2300 for (i = mta_reg_count - 1; i >= 0 ; i--) {
6cfbd97b 2301 /* If we are on an 82544 has an errata where writing odd
81c52285
JB		 2302 * offsets overwrites the previous even offset, but writing
2303 * backwards over the range solves the issue by always
2304 * writing the odd offset first
2305 */
2306 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2307 }
2308 E1000_WRITE_FLUSH();
2309
96838a40 2310 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2311 e1000_leave_82542_rst(adapter);
81c52285
JB		 2312
2313 kfree(mcarray);
1da177e4
LT		 2314}
2315
a4010afe
JB		 2316/**
2317 * e1000_update_phy_info_task - get phy info
2318 * @work: work struct contained inside adapter struct
2319 *
2320 * Need to wait a few seconds after link up to get diagnostic information from
2321 * the phy
2322 */
5cf42fcd
JB		 2323static void e1000_update_phy_info_task(struct work_struct *work)
2324{
2325 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2326 struct e1000_adapter,
2327 phy_info_task.work);
0ef4eedc
JB		 2328 if (test_bit(__E1000_DOWN, &adapter->flags))
2329 return;
2330 mutex_lock(&adapter->mutex);
a4010afe 2331 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
0ef4eedc 2332 mutex_unlock(&adapter->mutex);
1da177e4
LT		 2333}
2334
5cf42fcd
JB		 2335/**
2336 * e1000_82547_tx_fifo_stall_task - task to complete work
2337 * @work: work struct contained inside adapter struct
2338 **/
2339static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
2340{
2341 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2342 struct e1000_adapter,
2343 fifo_stall_task.work);
1dc32918 2344 struct e1000_hw *hw = &adapter->hw;
1da177e4 2345 struct net_device *netdev = adapter->netdev;
406874a7 2346 u32 tctl;
1da177e4 2347
0ef4eedc
JB		 2348 if (test_bit(__E1000_DOWN, &adapter->flags))
2349 return;
2350 mutex_lock(&adapter->mutex);
96838a40 2351 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2352 if ((er32(TDT) == er32(TDH)) &&
2353 (er32(TDFT) == er32(TDFH)) &&
2354 (er32(TDFTS) == er32(TDFHS))) {
2355 tctl = er32(TCTL);
2356 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2357 ew32(TDFT, adapter->tx_head_addr);
2358 ew32(TDFH, adapter->tx_head_addr);
2359 ew32(TDFTS, adapter->tx_head_addr);
2360 ew32(TDFHS, adapter->tx_head_addr);
2361 ew32(TCTL, tctl);
2362 E1000_WRITE_FLUSH();
1da177e4
LT		 2363
2364 adapter->tx_fifo_head = 0;
2365 atomic_set(&adapter->tx_fifo_stall, 0);
2366 netif_wake_queue(netdev);
baa34745 2367 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
a4010afe 2368 schedule_delayed_work(&adapter->fifo_stall_task, 1);
1da177e4
LT		 2369 }
2370 }
0ef4eedc 2371 mutex_unlock(&adapter->mutex);
1da177e4
LT		 2372}
2373
b548192a 2374bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2375{
2376 struct e1000_hw *hw = &adapter->hw;
2377 bool link_active = false;
be0f0719 2378
6d9e5130
NS		 2379 /* get_link_status is set on LSC (link status) interrupt or rx
2380 * sequence error interrupt (except on intel ce4100).
2381 * get_link_status will stay false until the
2382 * e1000_check_for_link establishes link for copper adapters
2383 * ONLY
be0f0719
JB		 2384 */
2385 switch (hw->media_type) {
2386 case e1000_media_type_copper:
6d9e5130
NS		 2387 if (hw->mac_type == e1000_ce4100)
2388 hw->get_link_status = 1;
be0f0719 2389 if (hw->get_link_status) {
120a5d0d 2390 e1000_check_for_link(hw);
be0f0719
JB		 2391 link_active = !hw->get_link_status;
2392 } else {
2393 link_active = true;
2394 }
2395 break;
2396 case e1000_media_type_fiber:
120a5d0d 2397 e1000_check_for_link(hw);
be0f0719
JB		 2398 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2399 break;
2400 case e1000_media_type_internal_serdes:
120a5d0d 2401 e1000_check_for_link(hw);
be0f0719
JB		 2402 link_active = hw->serdes_has_link;
2403 break;
2404 default:
2405 break;
2406 }
2407
2408 return link_active;
2409}
2410
1da177e4 2411/**
a4010afe
JB		 2412 * e1000_watchdog - work function
2413 * @work: work struct contained inside adapter struct
1da177e4 2414 **/
a4010afe 2415static void e1000_watchdog(struct work_struct *work)
1da177e4 2416{
a4010afe
JB		 2417 struct e1000_adapter *adapter = container_of(work,
2418 struct e1000_adapter,
2419 watchdog_task.work);
1dc32918 2420 struct e1000_hw *hw = &adapter->hw;
1da177e4 2421 struct net_device *netdev = adapter->netdev;
545c67c0 2422 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2423 u32 link, tctl;
90fb5135 2424
0ef4eedc
JB		 2425 if (test_bit(__E1000_DOWN, &adapter->flags))
2426 return;
2427
2428 mutex_lock(&adapter->mutex);
be0f0719
JB		 2429 link = e1000_has_link(adapter);
2430 if ((netif_carrier_ok(netdev)) && link)
2431 goto link_up;
1da177e4 2432
96838a40
JB		 2433 if (link) {
2434 if (!netif_carrier_ok(netdev)) {
406874a7 2435 u32 ctrl;
c3033b01 2436 bool txb2b = true;
be0f0719 2437 /* update snapshot of PHY registers on LSC */
1dc32918 2438 e1000_get_speed_and_duplex(hw,
6cfbd97b
JK		 2439 &adapter->link_speed,
2440 &adapter->link_duplex);
1da177e4 2441
1dc32918 2442 ctrl = er32(CTRL);
675ad473
ET		 2443 pr_info("%s NIC Link is Up %d Mbps %s, "
2444 "Flow Control: %s\n",
2445 netdev->name,
2446 adapter->link_speed,
2447 adapter->link_duplex == FULL_DUPLEX ?
2448 "Full Duplex" : "Half Duplex",
2449 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2450 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2451 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2452 E1000_CTRL_TFCE) ? "TX" : "None")));
1da177e4 2453
39ca5f03 2454 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2455 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2456 switch (adapter->link_speed) {
2457 case SPEED_10:
c3033b01 2458 txb2b = false;
be0f0719 2459 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2460 break;
2461 case SPEED_100:
c3033b01 2462 txb2b = false;
7e6c9861
JK		 2463 /* maybe add some timeout factor ? */
2464 break;
2465 }
2466
1532ecea 2467 /* enable transmits in the hardware */
1dc32918 2468 tctl = er32(TCTL);
7e6c9861 2469 tctl |= E1000_TCTL_EN;
1dc32918 2470 ew32(TCTL, tctl);
66a2b0a3 2471
1da177e4 2472 netif_carrier_on(netdev);
baa34745 2473 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2474 schedule_delayed_work(&adapter->phy_info_task,
2475 2 * HZ);
1da177e4
LT		 2476 adapter->smartspeed = 0;
2477 }
2478 } else {
96838a40 2479 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2480 adapter->link_speed = 0;
2481 adapter->link_duplex = 0;
675ad473
ET		 2482 pr_info("%s NIC Link is Down\n",
2483 netdev->name);
1da177e4 2484 netif_carrier_off(netdev);
baa34745
JB		 2485
2486 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2487 schedule_delayed_work(&adapter->phy_info_task,
2488 2 * HZ);
1da177e4
LT		 2489 }
2490
2491 e1000_smartspeed(adapter);
2492 }
2493
be0f0719 2494link_up:
1da177e4
LT		 2495 e1000_update_stats(adapter);
2496
1dc32918 2497 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2498 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2499 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2500 adapter->colc_old = adapter->stats.colc;
2501
2502 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2503 adapter->gorcl_old = adapter->stats.gorcl;
2504 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2505 adapter->gotcl_old = adapter->stats.gotcl;
2506
1dc32918 2507 e1000_update_adaptive(hw);
1da177e4 2508
f56799ea 2509 if (!netif_carrier_ok(netdev)) {
581d708e 2510 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2511 /* We've lost link, so the controller stops DMA,
2512 * but we've got queued Tx work that's never going
2513 * to get done, so reset controller to flush Tx.
6cfbd97b
JK		 2514 * (Do the reset outside of interrupt context).
2515 */
87041639
JK		 2516 adapter->tx_timeout_count++;
2517 schedule_work(&adapter->reset_task);
0ef4eedc
JB		 2518 /* exit immediately since reset is imminent */
2519 goto unlock;
1da177e4
LT		 2520 }
2521 }
2522
eab2abf5
JB		 2523 /* Simple mode for Interrupt Throttle Rate (ITR) */
2524 if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
6cfbd97b 2525 /* Symmetric Tx/Rx gets a reduced ITR=2000;
eab2abf5
JB		 2526 * Total asymmetrical Tx or Rx gets ITR=8000;
2527 * everyone else is between 2000-8000.
2528 */
2529 u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
2530 u32 dif = (adapter->gotcl > adapter->gorcl ?
2531 adapter->gotcl - adapter->gorcl :
2532 adapter->gorcl - adapter->gotcl) / 10000;
2533 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2534
2535 ew32(ITR, 1000000000 / (itr * 256));
2536 }
2537
1da177e4 2538 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2539 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2540
2648345f 2541 /* Force detection of hung controller every watchdog period */
c3033b01 2542 adapter->detect_tx_hung = true;
1da177e4 2543
a4010afe 2544 /* Reschedule the task */
baa34745 2545 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 2546 schedule_delayed_work(&adapter->watchdog_task, 2 * HZ);
0ef4eedc
JB		 2547
2548unlock:
2549 mutex_unlock(&adapter->mutex);
1da177e4
LT		 2550}
2551
835bb129
JB		 2552enum latency_range {
2553 lowest_latency = 0,
2554 low_latency = 1,
2555 bulk_latency = 2,
2556 latency_invalid = 255
2557};
2558
2559/**
2560 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2561 * @adapter: pointer to adapter
2562 * @itr_setting: current adapter->itr
2563 * @packets: the number of packets during this measurement interval
2564 * @bytes: the number of bytes during this measurement interval
2565 *
835bb129
JB		 2566 * Stores a new ITR value based on packets and byte
2567 * counts during the last interrupt. The advantage of per interrupt
2568 * computation is faster updates and more accurate ITR for the current
2569 * traffic pattern. Constants in this function were computed
2570 * based on theoretical maximum wire speed and thresholds were set based
2571 * on testing data as well as attempting to minimize response time
2572 * while increasing bulk throughput.
2573 * this functionality is controlled by the InterruptThrottleRate module
2574 * parameter (see e1000_param.c)
835bb129
JB		 2575 **/
2576static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2577 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2578{
2579 unsigned int retval = itr_setting;
2580 struct e1000_hw *hw = &adapter->hw;
2581
2582 if (unlikely(hw->mac_type < e1000_82540))
2583 goto update_itr_done;
2584
2585 if (packets == 0)
2586 goto update_itr_done;
2587
835bb129
JB		 2588 switch (itr_setting) {
2589 case lowest_latency:
2b65326e
JB		 2590 /* jumbo frames get bulk treatment*/
2591 if (bytes/packets > 8000)
2592 retval = bulk_latency;
2593 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2594 retval = low_latency;
2595 break;
2596 case low_latency: /* 50 usec aka 20000 ints/s */
2597 if (bytes > 10000) {
2b65326e
JB		 2598 /* jumbo frames need bulk latency setting */
2599 if (bytes/packets > 8000)
2600 retval = bulk_latency;
2601 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2602 retval = bulk_latency;
2603 else if ((packets > 35))
2604 retval = lowest_latency;
2b65326e
JB		 2605 } else if (bytes/packets > 2000)
2606 retval = bulk_latency;
2607 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2608 retval = lowest_latency;
2609 break;
2610 case bulk_latency: /* 250 usec aka 4000 ints/s */
2611 if (bytes > 25000) {
2612 if (packets > 35)
2613 retval = low_latency;
2b65326e
JB		 2614 } else if (bytes < 6000) {
2615 retval = low_latency;
835bb129
JB		 2616 }
2617 break;
2618 }
2619
2620update_itr_done:
2621 return retval;
2622}
2623
2624static void e1000_set_itr(struct e1000_adapter *adapter)
2625{
2626 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2627 u16 current_itr;
2628 u32 new_itr = adapter->itr;
835bb129
JB		 2629
2630 if (unlikely(hw->mac_type < e1000_82540))
2631 return;
2632
2633 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2634 if (unlikely(adapter->link_speed != SPEED_1000)) {
2635 current_itr = 0;
2636 new_itr = 4000;
2637 goto set_itr_now;
2638 }
2639
6cfbd97b
JK		 2640 adapter->tx_itr = e1000_update_itr(adapter, adapter->tx_itr,
2641 adapter->total_tx_packets,
2642 adapter->total_tx_bytes);
2b65326e
JB		 2643 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2644 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2645 adapter->tx_itr = low_latency;
2646
6cfbd97b
JK		 2647 adapter->rx_itr = e1000_update_itr(adapter, adapter->rx_itr,
2648 adapter->total_rx_packets,
2649 adapter->total_rx_bytes);
2b65326e
JB		 2650 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2651 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2652 adapter->rx_itr = low_latency;
835bb129
JB		 2653
2654 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2655
835bb129
JB		 2656 switch (current_itr) {
2657 /* counts and packets in update_itr are dependent on these numbers */
2658 case lowest_latency:
2659 new_itr = 70000;
2660 break;
2661 case low_latency:
2662 new_itr = 20000; /* aka hwitr = ~200 */
2663 break;
2664 case bulk_latency:
2665 new_itr = 4000;
2666 break;
2667 default:
2668 break;
2669 }
2670
2671set_itr_now:
2672 if (new_itr != adapter->itr) {
2673 /* this attempts to bias the interrupt rate towards Bulk
2674 * by adding intermediate steps when interrupt rate is
6cfbd97b
JK		 2675 * increasing
2676 */
835bb129 2677 new_itr = new_itr > adapter->itr ?
6cfbd97b
JK		 2678 min(adapter->itr + (new_itr >> 2), new_itr) :
2679 new_itr;
835bb129 2680 adapter->itr = new_itr;
1dc32918 2681 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129 2682 }
835bb129
JB		 2683}
2684
1da177e4
LT		 2685#define E1000_TX_FLAGS_CSUM 0x00000001
2686#define E1000_TX_FLAGS_VLAN 0x00000002
2687#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2688#define E1000_TX_FLAGS_IPV4 0x00000008
11a78dcf 2689#define E1000_TX_FLAGS_NO_FCS 0x00000010
1da177e4
LT		 2690#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2691#define E1000_TX_FLAGS_VLAN_SHIFT 16
2692
64798845
JP		 2693static int e1000_tso(struct e1000_adapter *adapter,
2694 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2695{
1da177e4 2696 struct e1000_context_desc *context_desc;
545c67c0 2697 struct e1000_buffer *buffer_info;
1da177e4 2698 unsigned int i;
406874a7
JP		 2699 u32 cmd_length = 0;
2700 u16 ipcse = 0, tucse, mss;
2701 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2702 int err;
2703
89114afd 2704 if (skb_is_gso(skb)) {
1da177e4
LT		 2705 if (skb_header_cloned(skb)) {
2706 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2707 if (err)
2708 return err;
2709 }
2710
ab6a5bb6 2711 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2712 mss = skb_shinfo(skb)->gso_size;
60828236 2713 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2714 struct iphdr *iph = ip_hdr(skb);
2715 iph->tot_len = 0;
2716 iph->check = 0;
aa8223c7
ACM		 2717 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2718 iph->daddr, 0,
2719 IPPROTO_TCP,
2720 0);
2d7edb92 2721 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2722 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2723 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2724 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2725 tcp_hdr(skb)->check =
0660e03f
ACM		 2726 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2727 &ipv6_hdr(skb)->daddr,
2728 0, IPPROTO_TCP, 0);
2d7edb92 2729 ipcse = 0;
2d7edb92 2730 }
bbe735e4 2731 ipcss = skb_network_offset(skb);
eddc9ec5 2732 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2733 tucss = skb_transport_offset(skb);
aa8223c7 2734 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2735 tucse = 0;
2736
2737 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2738 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2739
581d708e
MC		 2740 i = tx_ring->next_to_use;
2741 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2742 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2743
2744 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2745 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2746 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2747 context_desc->upper_setup.tcp_fields.tucss = tucss;
2748 context_desc->upper_setup.tcp_fields.tucso = tucso;
2749 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2750 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2751 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2752 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2753
545c67c0 2754 buffer_info->time_stamp = jiffies;
a9ebadd6 2755 buffer_info->next_to_watch = i;
545c67c0 2756
581d708e
MC		 2757 if (++i == tx_ring->count) i = 0;
2758 tx_ring->next_to_use = i;
1da177e4 2759
c3033b01 2760 return true;
1da177e4 2761 }
c3033b01 2762 return false;
1da177e4
LT		 2763}
2764
64798845
JP		 2765static bool e1000_tx_csum(struct e1000_adapter *adapter,
2766 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2767{
2768 struct e1000_context_desc *context_desc;
545c67c0 2769 struct e1000_buffer *buffer_info;
1da177e4 2770 unsigned int i;
406874a7 2771 u8 css;
3ed30676 2772 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2773
3ed30676
DG		 2774 if (skb->ip_summed != CHECKSUM_PARTIAL)
2775 return false;
1da177e4 2776
3ed30676 2777 switch (skb->protocol) {
09640e63 2778 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2779 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2780 cmd_len |= E1000_TXD_CMD_TCP;
2781 break;
09640e63 2782 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2783 /* XXX not handling all IPV6 headers */
2784 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2785 cmd_len |= E1000_TXD_CMD_TCP;
2786 break;
2787 default:
2788 if (unlikely(net_ratelimit()))
feb8f478
ET		 2789 e_warn(drv, "checksum_partial proto=%x!\n",
2790 skb->protocol);
3ed30676
DG		 2791 break;
2792 }
1da177e4 2793
0d0b1672 2794 css = skb_checksum_start_offset(skb);
1da177e4 2795
3ed30676
DG		 2796 i = tx_ring->next_to_use;
2797 buffer_info = &tx_ring->buffer_info[i];
2798 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2799
3ed30676
DG		 2800 context_desc->lower_setup.ip_config = 0;
2801 context_desc->upper_setup.tcp_fields.tucss = css;
2802 context_desc->upper_setup.tcp_fields.tucso =
2803 css + skb->csum_offset;
2804 context_desc->upper_setup.tcp_fields.tucse = 0;
2805 context_desc->tcp_seg_setup.data = 0;
2806 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2807
3ed30676
DG		 2808 buffer_info->time_stamp = jiffies;
2809 buffer_info->next_to_watch = i;
1da177e4 2810
3ed30676
DG		 2811 if (unlikely(++i == tx_ring->count)) i = 0;
2812 tx_ring->next_to_use = i;
2813
2814 return true;
1da177e4
LT		 2815}
2816
2817#define E1000_MAX_TXD_PWR 12
2818#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2819
64798845
JP		 2820static int e1000_tx_map(struct e1000_adapter *adapter,
2821 struct e1000_tx_ring *tx_ring,
2822 struct sk_buff *skb, unsigned int first,
2823 unsigned int max_per_txd, unsigned int nr_frags,
2824 unsigned int mss)
1da177e4 2825{
1dc32918 2826 struct e1000_hw *hw = &adapter->hw;
602c0554 2827 struct pci_dev *pdev = adapter->pdev;
37e73df8 2828 struct e1000_buffer *buffer_info;
d20b606c 2829 unsigned int len = skb_headlen(skb);
602c0554 2830 unsigned int offset = 0, size, count = 0, i;
31c15a2f 2831 unsigned int f, bytecount, segs;
1da177e4
LT		 2832
2833 i = tx_ring->next_to_use;
2834
96838a40 2835 while (len) {
37e73df8 2836 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2837 size = min(len, max_per_txd);
fd803241
JK		 2838 /* Workaround for Controller erratum --
2839 * descriptor for non-tso packet in a linear SKB that follows a
2840 * tso gets written back prematurely before the data is fully
6cfbd97b
JK		 2841 * DMA'd to the controller
2842 */
fd803241 2843 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2844 !skb_is_gso(skb)) {
3db1cd5c 2845 tx_ring->last_tx_tso = false;
fd803241
JK		 2846 size -= 4;
2847 }
2848
1da177e4 2849 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2850 * in TSO mode. Append 4-byte sentinel desc
2851 */
96838a40 2852 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2853 size -= 4;
97338bde
MC		 2854 /* work-around for errata 10 and it applies
2855 * to all controllers in PCI-X mode
2856 * The fix is to make sure that the first descriptor of a
2857 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2858 */
1dc32918 2859 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2860 (size > 2015) && count == 0))
2861 size = 2015;
96838a40 2862
1da177e4 2863 /* Workaround for potential 82544 hang in PCI-X. Avoid
6cfbd97b
JK		 2864 * terminating buffers within evenly-aligned dwords.
2865 */
96838a40 2866 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2867 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2868 size > 4))
2869 size -= 4;
2870
2871 buffer_info->length = size;
cdd7549e 2872 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2873 buffer_info->time_stamp = jiffies;
602c0554 2874 buffer_info->mapped_as_page = false;
b16f53be
NN		 2875 buffer_info->dma = dma_map_single(&pdev->dev,
2876 skb->data + offset,
6cfbd97b 2877 size, DMA_TO_DEVICE);
b16f53be 2878 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2879 goto dma_error;
a9ebadd6 2880 buffer_info->next_to_watch = i;
1da177e4
LT		 2881
2882 len -= size;
2883 offset += size;
2884 count++;
37e73df8
AD		 2885 if (len) {
2886 i++;
2887 if (unlikely(i == tx_ring->count))
2888 i = 0;
2889 }
1da177e4
LT		 2890 }
2891
96838a40 2892 for (f = 0; f < nr_frags; f++) {
9e903e08 2893 const struct skb_frag_struct *frag;
1da177e4
LT		 2894
2895 frag = &skb_shinfo(skb)->frags[f];
9e903e08 2896 len = skb_frag_size(frag);
877749bf 2897 offset = 0;
1da177e4 2898
96838a40 2899 while (len) {
877749bf 2900 unsigned long bufend;
37e73df8
AD		 2901 i++;
2902 if (unlikely(i == tx_ring->count))
2903 i = 0;
2904
1da177e4
LT		 2905 buffer_info = &tx_ring->buffer_info[i];
2906 size = min(len, max_per_txd);
1da177e4 2907 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2908 * in TSO mode. Append 4-byte sentinel desc
2909 */
2910 if (unlikely(mss && f == (nr_frags-1) &&
2911 size == len && size > 8))
1da177e4 2912 size -= 4;
1da177e4
LT		 2913 /* Workaround for potential 82544 hang in PCI-X.
2914 * Avoid terminating buffers within evenly-aligned
6cfbd97b
JK		 2915 * dwords.
2916 */
877749bf
IC		 2917 bufend = (unsigned long)
2918 page_to_phys(skb_frag_page(frag));
2919 bufend += offset + size - 1;
96838a40 2920 if (unlikely(adapter->pcix_82544 &&
877749bf
IC		 2921 !(bufend & 4) &&
2922 size > 4))
1da177e4
LT		 2923 size -= 4;
2924
2925 buffer_info->length = size;
1da177e4 2926 buffer_info->time_stamp = jiffies;
602c0554 2927 buffer_info->mapped_as_page = true;
877749bf
IC		 2928 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
2929 offset, size, DMA_TO_DEVICE);
b16f53be 2930 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2931 goto dma_error;
a9ebadd6 2932 buffer_info->next_to_watch = i;
1da177e4
LT		 2933
2934 len -= size;
2935 offset += size;
2936 count++;
1da177e4
LT		 2937 }
2938 }
2939
31c15a2f
DN		 2940 segs = skb_shinfo(skb)->gso_segs ?: 1;
2941 /* multiply data chunks by size of headers */
2942 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
2943
1da177e4 2944 tx_ring->buffer_info[i].skb = skb;
31c15a2f
DN		 2945 tx_ring->buffer_info[i].segs = segs;
2946 tx_ring->buffer_info[i].bytecount = bytecount;
1da177e4
LT		 2947 tx_ring->buffer_info[first].next_to_watch = i;
2948
2949 return count;
602c0554
AD		 2950
2951dma_error:
2952 dev_err(&pdev->dev, "TX DMA map failed\n");
2953 buffer_info->dma = 0;
c1fa347f 2954 if (count)
602c0554 2955 count--;
c1fa347f
RK		 2956
2957 while (count--) {
2958 if (i==0)
602c0554 2959 i += tx_ring->count;
c1fa347f 2960 i--;
602c0554
AD		 2961 buffer_info = &tx_ring->buffer_info[i];
2962 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2963 }
2964
2965 return 0;
1da177e4
LT		 2966}
2967
64798845
JP		 2968static void e1000_tx_queue(struct e1000_adapter *adapter,
2969 struct e1000_tx_ring *tx_ring, int tx_flags,
2970 int count)
1da177e4 2971{
1dc32918 2972 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2973 struct e1000_tx_desc *tx_desc = NULL;
2974 struct e1000_buffer *buffer_info;
406874a7 2975 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2976 unsigned int i;
2977
96838a40 2978 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4 2979 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
6cfbd97b 2980 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2981 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2982
96838a40 2983 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2984 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2985 }
2986
96838a40 2987 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2988 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2989 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2990 }
2991
96838a40 2992 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2993 txd_lower |= E1000_TXD_CMD_VLE;
2994 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2995 }
2996
11a78dcf
BG		 2997 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
2998 txd_lower &= ~(E1000_TXD_CMD_IFCS);
2999
1da177e4
LT		 3000 i = tx_ring->next_to_use;
3001
96838a40 3002 while (count--) {
1da177e4
LT		 3003 buffer_info = &tx_ring->buffer_info[i];
3004 tx_desc = E1000_TX_DESC(*tx_ring, i);
3005 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3006 tx_desc->lower.data =
3007 cpu_to_le32(txd_lower | buffer_info->length);
3008 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3009 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3010 }
3011
3012 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3013
11a78dcf
BG		 3014 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
3015 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
3016 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
3017
1da177e4
LT		 3018 /* Force memory writes to complete before letting h/w
3019 * know there are new descriptors to fetch. (Only
3020 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 3021 * such as IA-64).
3022 */
1da177e4
LT		 3023 wmb();
3024
3025 tx_ring->next_to_use = i;
1dc32918 3026 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f 3027 /* we need this if more than one processor can write to our tail
6cfbd97b
JK		 3028 * at a time, it synchronizes IO on IA64/Altix systems
3029 */
2ce9047f 3030 mmiowb();
1da177e4
LT		 3031}
3032
1aa8b471 3033/* 82547 workaround to avoid controller hang in half-duplex environment.
1da177e4
LT		 3034 * The workaround is to avoid queuing a large packet that would span
3035 * the internal Tx FIFO ring boundary by notifying the stack to resend
3036 * the packet at a later time. This gives the Tx FIFO an opportunity to
3037 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3038 * to the beginning of the Tx FIFO.
1aa8b471 3039 */
1da177e4
LT		 3040
3041#define E1000_FIFO_HDR 0x10
3042#define E1000_82547_PAD_LEN 0x3E0
3043
64798845
JP		 3044static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3045 struct sk_buff *skb)
1da177e4 3046{
406874a7
JP		 3047 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3048 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3049
9099cfb9 3050 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3051
96838a40 3052 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3053 goto no_fifo_stall_required;
3054
96838a40 3055 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3056 return 1;
3057
96838a40 3058 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3059 atomic_set(&adapter->tx_fifo_stall, 1);
3060 return 1;
3061 }
3062
3063no_fifo_stall_required:
3064 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3065 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3066 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3067 return 0;
3068}
3069
65c7973f
JB		 3070static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3071{
3072 struct e1000_adapter *adapter = netdev_priv(netdev);
3073 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3074
3075 netif_stop_queue(netdev);
3076 /* Herbert's original patch had:
3077 * smp_mb__after_netif_stop_queue();
6cfbd97b
JK		 3078 * but since that doesn't exist yet, just open code it.
3079 */
65c7973f
JB		 3080 smp_mb();
3081
3082 /* We need to check again in a case another CPU has just
6cfbd97b
JK		 3083 * made room available.
3084 */
65c7973f
JB		 3085 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3086 return -EBUSY;
3087
3088 /* A reprieve! */
3089 netif_start_queue(netdev);
fcfb1224 3090 ++adapter->restart_queue;
65c7973f
JB		 3091 return 0;
3092}
3093
3094static int e1000_maybe_stop_tx(struct net_device *netdev,
6cfbd97b 3095 struct e1000_tx_ring *tx_ring, int size)
65c7973f
JB		 3096{
3097 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3098 return 0;
3099 return __e1000_maybe_stop_tx(netdev, size);
3100}
3101
1da177e4 3102#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 3103static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
3104 struct net_device *netdev)
1da177e4 3105{
60490fe0 3106 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3107 struct e1000_hw *hw = &adapter->hw;
581d708e 3108 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3109 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3110 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3111 unsigned int tx_flags = 0;
e743d313 3112 unsigned int len = skb_headlen(skb);
6d1e3aa7
KK		 3113 unsigned int nr_frags;
3114 unsigned int mss;
1da177e4 3115 int count = 0;
76c224bc 3116 int tso;
1da177e4 3117 unsigned int f;
1da177e4 3118
6cfbd97b 3119 /* This goes back to the question of how to logically map a Tx queue
65c7973f 3120 * to a flow. Right now, performance is impacted slightly negatively
6cfbd97b
JK		 3121 * if using multiple Tx queues. If the stack breaks away from a
3122 * single qdisc implementation, we can look at this again.
3123 */
581d708e 3124 tx_ring = adapter->tx_ring;
24025e4e 3125
581d708e 3126 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3127 dev_kfree_skb_any(skb);
3128 return NETDEV_TX_OK;
3129 }
3130
59d86c76
TD		 3131 /* On PCI/PCI-X HW, if packet size is less than ETH_ZLEN,
3132 * packets may get corrupted during padding by HW.
3133 * To WA this issue, pad all small packets manually.
3134 */
3135 if (skb->len < ETH_ZLEN) {
3136 if (skb_pad(skb, ETH_ZLEN - skb->len))
3137 return NETDEV_TX_OK;
3138 skb->len = ETH_ZLEN;
3139 skb_set_tail_pointer(skb, ETH_ZLEN);
3140 }
3141
7967168c 3142 mss = skb_shinfo(skb)->gso_size;
76c224bc 3143 /* The controller does a simple calculation to
1da177e4
LT		 3144 * make sure there is enough room in the FIFO before
3145 * initiating the DMA for each buffer. The calc is:
3146 * 4 = ceil(buffer len/mss). To make sure we don't
3147 * overrun the FIFO, adjust the max buffer len if mss
6cfbd97b
JK		 3148 * drops.
3149 */
96838a40 3150 if (mss) {
406874a7 3151 u8 hdr_len;
1da177e4
LT		 3152 max_per_txd = min(mss << 2, max_per_txd);
3153 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3154
ab6a5bb6 3155 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3156 if (skb->data_len && hdr_len == len) {
1dc32918 3157 switch (hw->mac_type) {
9f687888 3158 unsigned int pull_size;
683a2aa3
HX		 3159 case e1000_82544:
3160 /* Make sure we have room to chop off 4 bytes,
3161 * and that the end alignment will work out to
3162 * this hardware's requirements
3163 * NOTE: this is a TSO only workaround
3164 * if end byte alignment not correct move us
6cfbd97b
JK		 3165 * into the next dword
3166 */
3167 if ((unsigned long)(skb_tail_pointer(skb) - 1)
3168 & 4)
683a2aa3
HX		 3169 break;
3170 /* fall through */
9f687888
JK		 3171 pull_size = min((unsigned int)4, skb->data_len);
3172 if (!__pskb_pull_tail(skb, pull_size)) {
feb8f478
ET		 3173 e_err(drv, "__pskb_pull_tail "
3174 "failed.\n");
9f687888 3175 dev_kfree_skb_any(skb);
749dfc70 3176 return NETDEV_TX_OK;
9f687888 3177 }
e743d313 3178 len = skb_headlen(skb);
9f687888
JK		 3179 break;
3180 default:
3181 /* do nothing */
3182 break;
d74bbd3b 3183 }
9a3056da 3184 }
1da177e4
LT		 3185 }
3186
9a3056da 3187 /* reserve a descriptor for the offload context */
84fa7933 3188 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3189 count++;
2648345f 3190 count++;
fd803241 3191
fd803241 3192 /* Controller Erratum workaround */
89114afd 3193 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3194 count++;
fd803241 3195
1da177e4
LT		 3196 count += TXD_USE_COUNT(len, max_txd_pwr);
3197
96838a40 3198 if (adapter->pcix_82544)
1da177e4
LT		 3199 count++;
3200
96838a40 3201 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3202 * in PCI-X mode, so add one more descriptor to the count
3203 */
1dc32918 3204 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3205 (len > 2015)))
3206 count++;
3207
1da177e4 3208 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3209 for (f = 0; f < nr_frags; f++)
9e903e08 3210 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
1da177e4 3211 max_txd_pwr);
96838a40 3212 if (adapter->pcix_82544)
1da177e4
LT		 3213 count += nr_frags;
3214
1da177e4 3215 /* need: count + 2 desc gap to keep tail from touching
6cfbd97b
JK		 3216 * head, otherwise try next time
3217 */
8017943e 3218 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3219 return NETDEV_TX_BUSY;
1da177e4 3220
a4010afe
JB		 3221 if (unlikely((hw->mac_type == e1000_82547) &&
3222 (e1000_82547_fifo_workaround(adapter, skb)))) {
3223 netif_stop_queue(netdev);
3224 if (!test_bit(__E1000_DOWN, &adapter->flags))
3225 schedule_delayed_work(&adapter->fifo_stall_task, 1);
3226 return NETDEV_TX_BUSY;
1da177e4
LT		 3227 }
3228
5622e404 3229 if (vlan_tx_tag_present(skb)) {
1da177e4
LT		 3230 tx_flags |= E1000_TX_FLAGS_VLAN;
3231 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3232 }
3233
581d708e 3234 first = tx_ring->next_to_use;
96838a40 3235
581d708e 3236 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3237 if (tso < 0) {
3238 dev_kfree_skb_any(skb);
3239 return NETDEV_TX_OK;
3240 }
3241
fd803241 3242 if (likely(tso)) {
8fce4731 3243 if (likely(hw->mac_type != e1000_82544))
3db1cd5c 3244 tx_ring->last_tx_tso = true;
1da177e4 3245 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3246 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3247 tx_flags |= E1000_TX_FLAGS_CSUM;
3248
60828236 3249 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3250 tx_flags |= E1000_TX_FLAGS_IPV4;
3251
11a78dcf
BG		 3252 if (unlikely(skb->no_fcs))
3253 tx_flags |= E1000_TX_FLAGS_NO_FCS;
3254
37e73df8 3255 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
6cfbd97b 3256 nr_frags, mss);
1da177e4 3257
37e73df8 3258 if (count) {
2f66fd36 3259 netdev_sent_queue(netdev, skb->len);
eab467f5
WB		 3260 skb_tx_timestamp(skb);
3261
37e73df8 3262 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3263 /* Make sure there is space in the ring for the next send. */
3264 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3265
37e73df8
AD		 3266 } else {
3267 dev_kfree_skb_any(skb);
3268 tx_ring->buffer_info[first].time_stamp = 0;
3269 tx_ring->next_to_use = first;
3270 }
1da177e4 3271
1da177e4
LT		 3272 return NETDEV_TX_OK;
3273}
3274
b04e36ba
TD		 3275#define NUM_REGS 38 /* 1 based count */
3276static void e1000_regdump(struct e1000_adapter *adapter)
3277{
3278 struct e1000_hw *hw = &adapter->hw;
3279 u32 regs[NUM_REGS];
3280 u32 *regs_buff = regs;
3281 int i = 0;
3282
e29b5d8f
TD		 3283 static const char * const reg_name[] = {
3284 "CTRL", "STATUS",
3285 "RCTL", "RDLEN", "RDH", "RDT", "RDTR",
3286 "TCTL", "TDBAL", "TDBAH", "TDLEN", "TDH", "TDT",
3287 "TIDV", "TXDCTL", "TADV", "TARC0",
3288 "TDBAL1", "TDBAH1", "TDLEN1", "TDH1", "TDT1",
3289 "TXDCTL1", "TARC1",
3290 "CTRL_EXT", "ERT", "RDBAL", "RDBAH",
3291 "TDFH", "TDFT", "TDFHS", "TDFTS", "TDFPC",
3292 "RDFH", "RDFT", "RDFHS", "RDFTS", "RDFPC"
b04e36ba
TD		 3293 };
3294
3295 regs_buff[0] = er32(CTRL);
3296 regs_buff[1] = er32(STATUS);
3297
3298 regs_buff[2] = er32(RCTL);
3299 regs_buff[3] = er32(RDLEN);
3300 regs_buff[4] = er32(RDH);
3301 regs_buff[5] = er32(RDT);
3302 regs_buff[6] = er32(RDTR);
3303
3304 regs_buff[7] = er32(TCTL);
3305 regs_buff[8] = er32(TDBAL);
3306 regs_buff[9] = er32(TDBAH);
3307 regs_buff[10] = er32(TDLEN);
3308 regs_buff[11] = er32(TDH);
3309 regs_buff[12] = er32(TDT);
3310 regs_buff[13] = er32(TIDV);
3311 regs_buff[14] = er32(TXDCTL);
3312 regs_buff[15] = er32(TADV);
3313 regs_buff[16] = er32(TARC0);
3314
3315 regs_buff[17] = er32(TDBAL1);
3316 regs_buff[18] = er32(TDBAH1);
3317 regs_buff[19] = er32(TDLEN1);
3318 regs_buff[20] = er32(TDH1);
3319 regs_buff[21] = er32(TDT1);
3320 regs_buff[22] = er32(TXDCTL1);
3321 regs_buff[23] = er32(TARC1);
3322 regs_buff[24] = er32(CTRL_EXT);
3323 regs_buff[25] = er32(ERT);
3324 regs_buff[26] = er32(RDBAL0);
3325 regs_buff[27] = er32(RDBAH0);
3326 regs_buff[28] = er32(TDFH);
3327 regs_buff[29] = er32(TDFT);
3328 regs_buff[30] = er32(TDFHS);
3329 regs_buff[31] = er32(TDFTS);
3330 regs_buff[32] = er32(TDFPC);
3331 regs_buff[33] = er32(RDFH);
3332 regs_buff[34] = er32(RDFT);
3333 regs_buff[35] = er32(RDFHS);
3334 regs_buff[36] = er32(RDFTS);
3335 regs_buff[37] = er32(RDFPC);
3336
3337 pr_info("Register dump\n");
e29b5d8f
TD		 3338 for (i = 0; i < NUM_REGS; i++)
3339 pr_info("%-15s %08x\n", reg_name[i], regs_buff[i]);
b04e36ba
TD		 3340}
3341
3342/*
3343 * e1000_dump: Print registers, tx ring and rx ring
3344 */
3345static void e1000_dump(struct e1000_adapter *adapter)
3346{
3347 /* this code doesn't handle multiple rings */
3348 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3349 struct e1000_rx_ring *rx_ring = adapter->rx_ring;
3350 int i;
3351
3352 if (!netif_msg_hw(adapter))
3353 return;
3354
3355 /* Print Registers */
3356 e1000_regdump(adapter);
3357
6cfbd97b 3358 /* transmit dump */
b04e36ba
TD		 3359 pr_info("TX Desc ring0 dump\n");
3360
3361 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
3362 *
3363 * Legacy Transmit Descriptor
3364 * +--------------------------------------------------------------+
3365 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
3366 * +--------------------------------------------------------------+
3367 * 8 | Special | CSS | Status | CMD | CSO | Length |
3368 * +--------------------------------------------------------------+
3369 * 63 48 47 36 35 32 31 24 23 16 15 0
3370 *
3371 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
3372 * 63 48 47 40 39 32 31 16 15 8 7 0
3373 * +----------------------------------------------------------------+
3374 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
3375 * +----------------------------------------------------------------+
3376 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
3377 * +----------------------------------------------------------------+
3378 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3379 *
3380 * Extended Data Descriptor (DTYP=0x1)
3381 * +----------------------------------------------------------------+
3382 * 0 | Buffer Address [63:0] |
3383 * +----------------------------------------------------------------+
3384 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
3385 * +----------------------------------------------------------------+
3386 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3387 */
e29b5d8f
TD		 3388 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestmp bi->skb\n");
3389 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestmp bi->skb\n");
b04e36ba
TD		 3390
3391 if (!netif_msg_tx_done(adapter))
3392 goto rx_ring_summary;
3393
3394 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
3395 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
3396 struct e1000_buffer *buffer_info = &tx_ring->buffer_info[i];
dd7f5c9e 3397 struct my_u { __le64 a; __le64 b; };
b04e36ba 3398 struct my_u *u = (struct my_u *)tx_desc;
e29b5d8f
TD		 3399 const char *type;
3400
b04e36ba 3401 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
e29b5d8f 3402 type = "NTC/U";
b04e36ba 3403 else if (i == tx_ring->next_to_use)
e29b5d8f 3404 type = "NTU";
b04e36ba 3405 else if (i == tx_ring->next_to_clean)
e29b5d8f 3406 type = "NTC";
b04e36ba 3407 else
e29b5d8f 3408 type = "";
b04e36ba 3409
e29b5d8f
TD		 3410 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p %s\n",
3411 ((le64_to_cpu(u->b) & (1<<20)) ? 'd' : 'c'), i,
3412 le64_to_cpu(u->a), le64_to_cpu(u->b),
3413 (u64)buffer_info->dma, buffer_info->length,
3414 buffer_info->next_to_watch,
3415 (u64)buffer_info->time_stamp, buffer_info->skb, type);
b04e36ba
TD		 3416 }
3417
3418rx_ring_summary:
6cfbd97b 3419 /* receive dump */
b04e36ba
TD		 3420 pr_info("\nRX Desc ring dump\n");
3421
3422 /* Legacy Receive Descriptor Format
3423 *
3424 * +-----------------------------------------------------+
3425 * | Buffer Address [63:0] |
3426 * +-----------------------------------------------------+
3427 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
3428 * +-----------------------------------------------------+
3429 * 63 48 47 40 39 32 31 16 15 0
3430 */
e29b5d8f 3431 pr_info("R[desc] [address 63:0 ] [vl er S cks ln] [bi->dma ] [bi->skb]\n");
b04e36ba
TD		 3432
3433 if (!netif_msg_rx_status(adapter))
3434 goto exit;
3435
3436 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
3437 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i);
3438 struct e1000_buffer *buffer_info = &rx_ring->buffer_info[i];
dd7f5c9e 3439 struct my_u { __le64 a; __le64 b; };
b04e36ba 3440 struct my_u *u = (struct my_u *)rx_desc;
e29b5d8f
TD		 3441 const char *type;
3442
b04e36ba 3443 if (i == rx_ring->next_to_use)
e29b5d8f 3444 type = "NTU";
b04e36ba 3445 else if (i == rx_ring->next_to_clean)
e29b5d8f 3446 type = "NTC";
b04e36ba 3447 else
e29b5d8f 3448 type = "";
b04e36ba 3449
e29b5d8f
TD		 3450 pr_info("R[0x%03X] %016llX %016llX %016llX %p %s\n",
3451 i, le64_to_cpu(u->a), le64_to_cpu(u->b),
3452 (u64)buffer_info->dma, buffer_info->skb, type);
b04e36ba
TD		 3453 } /* for */
3454
3455 /* dump the descriptor caches */
3456 /* rx */
e29b5d8f 3457 pr_info("Rx descriptor cache in 64bit format\n");
b04e36ba 3458 for (i = 0x6000; i <= 0x63FF ; i += 0x10) {
e29b5d8f
TD		 3459 pr_info("R%04X: %08X|%08X %08X|%08X\n",
3460 i,
3461 readl(adapter->hw.hw_addr + i+4),
3462 readl(adapter->hw.hw_addr + i),
3463 readl(adapter->hw.hw_addr + i+12),
3464 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3465 }
3466 /* tx */
e29b5d8f 3467 pr_info("Tx descriptor cache in 64bit format\n");
b04e36ba 3468 for (i = 0x7000; i <= 0x73FF ; i += 0x10) {
e29b5d8f
TD		 3469 pr_info("T%04X: %08X|%08X %08X|%08X\n",
3470 i,
3471 readl(adapter->hw.hw_addr + i+4),
3472 readl(adapter->hw.hw_addr + i),
3473 readl(adapter->hw.hw_addr + i+12),
3474 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3475 }
3476exit:
3477 return;
3478}
3479
1da177e4
LT		 3480/**
3481 * e1000_tx_timeout - Respond to a Tx Hang
3482 * @netdev: network interface device structure
3483 **/
64798845 3484static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3485{
60490fe0 3486 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3487
3488 /* Do the reset outside of interrupt context */
87041639
JK		 3489 adapter->tx_timeout_count++;
3490 schedule_work(&adapter->reset_task);
1da177e4
LT		 3491}
3492
64798845 3493static void e1000_reset_task(struct work_struct *work)
1da177e4 3494{
65f27f38
DH		 3495 struct e1000_adapter *adapter =
3496 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3497
0ef4eedc
JB		 3498 if (test_bit(__E1000_DOWN, &adapter->flags))
3499 return;
b04e36ba 3500 e_err(drv, "Reset adapter\n");
338c15e4 3501 e1000_reinit_safe(adapter);
1da177e4
LT		 3502}
3503
3504/**
3505 * e1000_get_stats - Get System Network Statistics
3506 * @netdev: network interface device structure
3507 *
3508 * Returns the address of the device statistics structure.
a4010afe 3509 * The statistics are actually updated from the watchdog.
1da177e4 3510 **/
64798845 3511static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3512{
6b7660cd 3513 /* only return the current stats */
5fe31def 3514 return &netdev->stats;
1da177e4
LT		 3515}
3516
3517/**
3518 * e1000_change_mtu - Change the Maximum Transfer Unit
3519 * @netdev: network interface device structure
3520 * @new_mtu: new value for maximum frame size
3521 *
3522 * Returns 0 on success, negative on failure
3523 **/
64798845 3524static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3525{
60490fe0 3526 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3527 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3528 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3529
96838a40
JB		 3530 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3531 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
feb8f478 3532 e_err(probe, "Invalid MTU setting\n");
1da177e4 3533 return -EINVAL;
2d7edb92 3534 }
1da177e4 3535
997f5cbd 3536 /* Adapter-specific max frame size limits. */
1dc32918 3537 switch (hw->mac_type) {
9e2feace 3538 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3539 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
feb8f478 3540 e_err(probe, "Jumbo Frames not supported.\n");
2d7edb92 3541 return -EINVAL;
2d7edb92 3542 }
997f5cbd 3543 break;
997f5cbd
JK		 3544 default:
3545 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3546 break;
1da177e4
LT		 3547 }
3548
3d6114e7
JB		 3549 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3550 msleep(1);
3551 /* e1000_down has a dependency on max_frame_size */
3552 hw->max_frame_size = max_frame;
3553 if (netif_running(netdev))
3554 e1000_down(adapter);
3555
87f5032e 3556 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3557 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3558 * larger slab size.
3559 * i.e. RXBUFFER_2048 --> size-4096 slab
6cfbd97b
JK		 3560 * however with the new *_jumbo_rx* routines, jumbo receives will use
3561 * fragmented skbs
3562 */
9e2feace 3563
9926146b 3564 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3565 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3566 else
3567#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3568 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3569#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3570 adapter->rx_buffer_len = PAGE_SIZE;
3571#endif
9e2feace
AK		 3572
3573 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3574 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3575 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3576 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3577 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3578
675ad473
ET		 3579 pr_info("%s changing MTU from %d to %d\n",
3580 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3581 netdev->mtu = new_mtu;
3582
2db10a08 3583 if (netif_running(netdev))
3d6114e7
JB		 3584 e1000_up(adapter);
3585 else
3586 e1000_reset(adapter);
3587
3588 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3589
1da177e4
LT		 3590 return 0;
3591}
3592
3593/**
3594 * e1000_update_stats - Update the board statistics counters
3595 * @adapter: board private structure
3596 **/
64798845 3597void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3598{
5fe31def 3599 struct net_device *netdev = adapter->netdev;
1da177e4 3600 struct e1000_hw *hw = &adapter->hw;
282f33c9 3601 struct pci_dev *pdev = adapter->pdev;
1da177e4 3602 unsigned long flags;
406874a7 3603 u16 phy_tmp;
1da177e4
LT		 3604
3605#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3606
6cfbd97b 3607 /* Prevent stats update while adapter is being reset, or if the pci
282f33c9
LV		 3608 * connection is down.
3609 */
9026729b 3610 if (adapter->link_speed == 0)
282f33c9 3611 return;
81b1955e 3612 if (pci_channel_offline(pdev))
9026729b
AK		 3613 return;
3614
1da177e4
LT		 3615 spin_lock_irqsave(&adapter->stats_lock, flags);
3616
828d055f 3617 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3618 * called from the interrupt context, so they must only
3619 * be written while holding adapter->stats_lock
3620 */
3621
1dc32918
JP		 3622 adapter->stats.crcerrs += er32(CRCERRS);
3623 adapter->stats.gprc += er32(GPRC);
3624 adapter->stats.gorcl += er32(GORCL);
3625 adapter->stats.gorch += er32(GORCH);
3626 adapter->stats.bprc += er32(BPRC);
3627 adapter->stats.mprc += er32(MPRC);
3628 adapter->stats.roc += er32(ROC);
3629
1532ecea
JB		 3630 adapter->stats.prc64 += er32(PRC64);
3631 adapter->stats.prc127 += er32(PRC127);
3632 adapter->stats.prc255 += er32(PRC255);
3633 adapter->stats.prc511 += er32(PRC511);
3634 adapter->stats.prc1023 += er32(PRC1023);
3635 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3636
3637 adapter->stats.symerrs += er32(SYMERRS);
3638 adapter->stats.mpc += er32(MPC);
3639 adapter->stats.scc += er32(SCC);
3640 adapter->stats.ecol += er32(ECOL);
3641 adapter->stats.mcc += er32(MCC);
3642 adapter->stats.latecol += er32(LATECOL);
3643 adapter->stats.dc += er32(DC);
3644 adapter->stats.sec += er32(SEC);
3645 adapter->stats.rlec += er32(RLEC);
3646 adapter->stats.xonrxc += er32(XONRXC);
3647 adapter->stats.xontxc += er32(XONTXC);
3648 adapter->stats.xoffrxc += er32(XOFFRXC);
3649 adapter->stats.xofftxc += er32(XOFFTXC);
3650 adapter->stats.fcruc += er32(FCRUC);
3651 adapter->stats.gptc += er32(GPTC);
3652 adapter->stats.gotcl += er32(GOTCL);
3653 adapter->stats.gotch += er32(GOTCH);
3654 adapter->stats.rnbc += er32(RNBC);
3655 adapter->stats.ruc += er32(RUC);
3656 adapter->stats.rfc += er32(RFC);
3657 adapter->stats.rjc += er32(RJC);
3658 adapter->stats.torl += er32(TORL);
3659 adapter->stats.torh += er32(TORH);
3660 adapter->stats.totl += er32(TOTL);
3661 adapter->stats.toth += er32(TOTH);
3662 adapter->stats.tpr += er32(TPR);
3663
1532ecea
JB		 3664 adapter->stats.ptc64 += er32(PTC64);
3665 adapter->stats.ptc127 += er32(PTC127);
3666 adapter->stats.ptc255 += er32(PTC255);
3667 adapter->stats.ptc511 += er32(PTC511);
3668 adapter->stats.ptc1023 += er32(PTC1023);
3669 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3670
3671 adapter->stats.mptc += er32(MPTC);
3672 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3673
3674 /* used for adaptive IFS */
3675
1dc32918 3676 hw->tx_packet_delta = er32(TPT);
1da177e4 3677 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3678 hw->collision_delta = er32(COLC);
1da177e4
LT		 3679 adapter->stats.colc += hw->collision_delta;
3680
96838a40 3681 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3682 adapter->stats.algnerrc += er32(ALGNERRC);
3683 adapter->stats.rxerrc += er32(RXERRC);
3684 adapter->stats.tncrs += er32(TNCRS);
3685 adapter->stats.cexterr += er32(CEXTERR);
3686 adapter->stats.tsctc += er32(TSCTC);
3687 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3688 }
3689
3690 /* Fill out the OS statistics structure */
5fe31def
AK		 3691 netdev->stats.multicast = adapter->stats.mprc;
3692 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3693
3694 /* Rx Errors */
3695
87041639 3696 /* RLEC on some newer hardware can be incorrect so build
6cfbd97b
JK		 3697 * our own version based on RUC and ROC
3698 */
5fe31def 3699 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3700 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3701 adapter->stats.ruc + adapter->stats.roc +
3702 adapter->stats.cexterr;
49559854 3703 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3704 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3705 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3706 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3707 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3708
3709 /* Tx Errors */
49559854 3710 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3711 netdev->stats.tx_errors = adapter->stats.txerrc;
3712 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3713 netdev->stats.tx_window_errors = adapter->stats.latecol;
3714 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3715 if (hw->bad_tx_carr_stats_fd &&
167fb284 3716 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3717 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3718 adapter->stats.tncrs = 0;
3719 }
1da177e4
LT		 3720
3721 /* Tx Dropped needs to be maintained elsewhere */
3722
3723 /* Phy Stats */
96838a40
JB		 3724 if (hw->media_type == e1000_media_type_copper) {
3725 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3726 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3727 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3728 adapter->phy_stats.idle_errors += phy_tmp;
3729 }
3730
96838a40 3731 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3732 (hw->phy_type == e1000_phy_m88) &&
3733 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3734 adapter->phy_stats.receive_errors += phy_tmp;
3735 }
3736
15e376b4 3737 /* Management Stats */
1dc32918
JP		 3738 if (hw->has_smbus) {
3739 adapter->stats.mgptc += er32(MGTPTC);
3740 adapter->stats.mgprc += er32(MGTPRC);
3741 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3742 }
3743
1da177e4
LT		 3744 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3745}
9ac98284 3746
1da177e4
LT		 3747/**
3748 * e1000_intr - Interrupt Handler
3749 * @irq: interrupt number
3750 * @data: pointer to a network interface device structure
1da177e4 3751 **/
64798845 3752static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3753{
3754 struct net_device *netdev = data;
60490fe0 3755 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3756 struct e1000_hw *hw = &adapter->hw;
1532ecea 3757 u32 icr = er32(ICR);
c3570acb 3758
4c11b8ad 3759 if (unlikely((!icr)))
835bb129
JB		 3760 return IRQ_NONE; /* Not our interrupt */
3761
6cfbd97b 3762 /* we might have caused the interrupt, but the above
4c11b8ad
JB		 3763 * read cleared it, and just in case the driver is
3764 * down there is nothing to do so return handled
3765 */
3766 if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
3767 return IRQ_HANDLED;
3768
96838a40 3769 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3770 hw->get_link_status = 1;
1314bbf3
AK		 3771 /* guard against interrupt when we're going down */
3772 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 3773 schedule_delayed_work(&adapter->watchdog_task, 1);
1da177e4
LT		 3774 }
3775
1532ecea
JB		 3776 /* disable interrupts, without the synchronize_irq bit */
3777 ew32(IMC, ~0);
3778 E1000_WRITE_FLUSH();
3779
288379f0 3780 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3781 adapter->total_tx_bytes = 0;
3782 adapter->total_tx_packets = 0;
3783 adapter->total_rx_bytes = 0;
3784 adapter->total_rx_packets = 0;
288379f0 3785 __napi_schedule(&adapter->napi);
a6c42322 3786 } else {
90fb5135 3787 /* this really should not happen! if it does it is basically a
6cfbd97b
JK		 3788 * bug, but not a hard error, so enable ints and continue
3789 */
a6c42322
JB		 3790 if (!test_bit(__E1000_DOWN, &adapter->flags))
3791 e1000_irq_enable(adapter);
3792 }
1da177e4 3793
1da177e4
LT		 3794 return IRQ_HANDLED;
3795}
3796
1da177e4
LT		 3797/**
3798 * e1000_clean - NAPI Rx polling callback
3799 * @adapter: board private structure
3800 **/
64798845 3801static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3802{
6cfbd97b
JK		 3803 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
3804 napi);
650b5a5c 3805 int tx_clean_complete = 0, work_done = 0;
581d708e 3806
650b5a5c 3807 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3808
650b5a5c 3809 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3810
650b5a5c 3811 if (!tx_clean_complete)
d2c7ddd6
DM		 3812 work_done = budget;
3813
53e52c72
DM		 3814 /* If budget not fully consumed, exit the polling mode */
3815 if (work_done < budget) {
835bb129
JB		 3816 if (likely(adapter->itr_setting & 3))
3817 e1000_set_itr(adapter);
288379f0 3818 napi_complete(napi);
a6c42322
JB		 3819 if (!test_bit(__E1000_DOWN, &adapter->flags))
3820 e1000_irq_enable(adapter);
1da177e4
LT		 3821 }
3822
bea3348e 3823 return work_done;
1da177e4
LT		 3824}
3825
1da177e4
LT		 3826/**
3827 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3828 * @adapter: board private structure
3829 **/
64798845
JP		 3830static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3831 struct e1000_tx_ring *tx_ring)
1da177e4 3832{
1dc32918 3833 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3834 struct net_device *netdev = adapter->netdev;
3835 struct e1000_tx_desc *tx_desc, *eop_desc;
3836 struct e1000_buffer *buffer_info;
3837 unsigned int i, eop;
2a1af5d7 3838 unsigned int count = 0;
835bb129 3839 unsigned int total_tx_bytes=0, total_tx_packets=0;
2f66fd36 3840 unsigned int bytes_compl = 0, pkts_compl = 0;
1da177e4
LT		 3841
3842 i = tx_ring->next_to_clean;
3843 eop = tx_ring->buffer_info[i].next_to_watch;
3844 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3845
ccfb342c
AD		 3846 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3847 (count < tx_ring->count)) {
843f4267 3848 bool cleaned = false;
2d0bb1c1 3849 rmb(); /* read buffer_info after eop_desc */
843f4267 3850 for ( ; !cleaned; count++) {
1da177e4
LT		 3851 tx_desc = E1000_TX_DESC(*tx_ring, i);
3852 buffer_info = &tx_ring->buffer_info[i];
3853 cleaned = (i == eop);
3854
835bb129 3855 if (cleaned) {
31c15a2f
DN		 3856 total_tx_packets += buffer_info->segs;
3857 total_tx_bytes += buffer_info->bytecount;
2f66fd36
OESC		 3858 if (buffer_info->skb) {
3859 bytes_compl += buffer_info->skb->len;
3860 pkts_compl++;
3861 }
3862
835bb129 3863 }
fd803241 3864 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3865 tx_desc->upper.data = 0;
1da177e4 3866
96838a40 3867 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3868 }
581d708e 3869
1da177e4
LT		 3870 eop = tx_ring->buffer_info[i].next_to_watch;
3871 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3872 }
3873
3874 tx_ring->next_to_clean = i;
3875
2f66fd36
OESC		 3876 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
3877
77b2aad5 3878#define TX_WAKE_THRESHOLD 32
843f4267 3879 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3880 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3881 /* Make sure that anybody stopping the queue after this
3882 * sees the new next_to_clean.
3883 */
3884 smp_mb();
cdd7549e
JB		 3885
3886 if (netif_queue_stopped(netdev) &&
3887 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3888 netif_wake_queue(netdev);
fcfb1224
JB		 3889 ++adapter->restart_queue;
3890 }
77b2aad5 3891 }
2648345f 3892
581d708e 3893 if (adapter->detect_tx_hung) {
2648345f 3894 /* Detect a transmit hang in hardware, this serializes the
6cfbd97b
JK		 3895 * check with the clearing of time_stamp and movement of i
3896 */
c3033b01 3897 adapter->detect_tx_hung = false;
cdd7549e
JB		 3898 if (tx_ring->buffer_info[eop].time_stamp &&
3899 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
6cfbd97b 3900 (adapter->tx_timeout_factor * HZ)) &&
8e95a202 3901 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3902
3903 /* detected Tx unit hang */
feb8f478 3904 e_err(drv, "Detected Tx Unit Hang\n"
675ad473
ET		 3905 " Tx Queue <%lu>\n"
3906 " TDH <%x>\n"
3907 " TDT <%x>\n"
3908 " next_to_use <%x>\n"
3909 " next_to_clean <%x>\n"
3910 "buffer_info[next_to_clean]\n"
3911 " time_stamp <%lx>\n"
3912 " next_to_watch <%x>\n"
3913 " jiffies <%lx>\n"
3914 " next_to_watch.status <%x>\n",
49a45a06 3915 (unsigned long)(tx_ring - adapter->tx_ring),
1dc32918
JP		 3916 readl(hw->hw_addr + tx_ring->tdh),
3917 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3918 tx_ring->next_to_use,
392137fa 3919 tx_ring->next_to_clean,
cdd7549e 3920 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3921 eop,
3922 jiffies,
3923 eop_desc->upper.fields.status);
b04e36ba 3924 e1000_dump(adapter);
1da177e4 3925 netif_stop_queue(netdev);
70b8f1e1 3926 }
1da177e4 3927 }
835bb129
JB		 3928 adapter->total_tx_bytes += total_tx_bytes;
3929 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3930 netdev->stats.tx_bytes += total_tx_bytes;
3931 netdev->stats.tx_packets += total_tx_packets;
807540ba 3932 return count < tx_ring->count;
1da177e4
LT		 3933}
3934
3935/**
3936 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3937 * @adapter: board private structure
3938 * @status_err: receive descriptor status and error fields
3939 * @csum: receive descriptor csum field
3940 * @sk_buff: socket buffer with received data
1da177e4 3941 **/
64798845
JP		 3942static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3943 u32 csum, struct sk_buff *skb)
1da177e4 3944{
1dc32918 3945 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3946 u16 status = (u16)status_err;
3947 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 3948
3949 skb_checksum_none_assert(skb);
2d7edb92 3950
1da177e4 3951 /* 82543 or newer only */
1dc32918 3952 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3953 /* Ignore Checksum bit is set */
96838a40 3954 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3955 /* TCP/UDP checksum error bit is set */
96838a40 3956 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3957 /* let the stack verify checksum errors */
1da177e4 3958 adapter->hw_csum_err++;
2d7edb92
MC		 3959 return;
3960 }
3961 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3962 if (!(status & E1000_RXD_STAT_TCPCS))
3963 return;
3964
2d7edb92
MC		 3965 /* It must be a TCP or UDP packet with a valid checksum */
3966 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3967 /* TCP checksum is good */
3968 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3969 }
2d7edb92 3970 adapter->hw_csum_good++;
1da177e4
LT		 3971}
3972
edbbb3ca
JB		 3973/**
3974 * e1000_consume_page - helper function
3975 **/
3976static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
6cfbd97b 3977 u16 length)
edbbb3ca
JB		 3978{
3979 bi->page = NULL;
3980 skb->len += length;
3981 skb->data_len += length;
ed64b3cc 3982 skb->truesize += PAGE_SIZE;
edbbb3ca
JB		 3983}
3984
3985/**
3986 * e1000_receive_skb - helper function to handle rx indications
3987 * @adapter: board private structure
3988 * @status: descriptor status field as written by hardware
3989 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3990 * @skb: pointer to sk_buff to be indicated to stack
3991 */
3992static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3993 __le16 vlan, struct sk_buff *skb)
3994{
6a08d194
JB		 3995 skb->protocol = eth_type_trans(skb, adapter->netdev);
3996
5622e404
JP		 3997 if (status & E1000_RXD_STAT_VP) {
3998 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
3999
86a9bad3 4000 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
5622e404
JP		 4001 }
4002 napi_gro_receive(&adapter->napi, skb);
edbbb3ca
JB		 4003}
4004
4005/**
4006 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
4007 * @adapter: board private structure
4008 * @rx_ring: ring to clean
4009 * @work_done: amount of napi work completed this call
4010 * @work_to_do: max amount of work allowed for this call to do
4011 *
4012 * the return value indicates whether actual cleaning was done, there
4013 * is no guarantee that everything was cleaned
4014 */
4015static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
4016 struct e1000_rx_ring *rx_ring,
4017 int *work_done, int work_to_do)
4018{
4019 struct e1000_hw *hw = &adapter->hw;
4020 struct net_device *netdev = adapter->netdev;
4021 struct pci_dev *pdev = adapter->pdev;
4022 struct e1000_rx_desc *rx_desc, *next_rxd;
4023 struct e1000_buffer *buffer_info, *next_buffer;
4024 unsigned long irq_flags;
4025 u32 length;
4026 unsigned int i;
4027 int cleaned_count = 0;
4028 bool cleaned = false;
4029 unsigned int total_rx_bytes=0, total_rx_packets=0;
4030
4031 i = rx_ring->next_to_clean;
4032 rx_desc = E1000_RX_DESC(*rx_ring, i);
4033 buffer_info = &rx_ring->buffer_info[i];
4034
4035 while (rx_desc->status & E1000_RXD_STAT_DD) {
4036 struct sk_buff *skb;
4037 u8 status;
4038
4039 if (*work_done >= work_to_do)
4040 break;
4041 (*work_done)++;
2d0bb1c1 4042 rmb(); /* read descriptor and rx_buffer_info after status DD */
edbbb3ca
JB		 4043
4044 status = rx_desc->status;
4045 skb = buffer_info->skb;
4046 buffer_info->skb = NULL;
4047
4048 if (++i == rx_ring->count) i = 0;
4049 next_rxd = E1000_RX_DESC(*rx_ring, i);
4050 prefetch(next_rxd);
4051
4052 next_buffer = &rx_ring->buffer_info[i];
4053
4054 cleaned = true;
4055 cleaned_count++;
b16f53be
NN		 4056 dma_unmap_page(&pdev->dev, buffer_info->dma,
4057 buffer_info->length, DMA_FROM_DEVICE);
edbbb3ca
JB		 4058 buffer_info->dma = 0;
4059
4060 length = le16_to_cpu(rx_desc->length);
4061
4062 /* errors is only valid for DD + EOP descriptors */
4063 if (unlikely((status & E1000_RXD_STAT_EOP) &&
4064 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
a3060858
SAS		 4065 u8 *mapped;
4066 u8 last_byte;
4067
4068 mapped = page_address(buffer_info->page);
4069 last_byte = *(mapped + length - 1);
edbbb3ca
JB		 4070 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4071 last_byte)) {
4072 spin_lock_irqsave(&adapter->stats_lock,
6cfbd97b 4073 irq_flags);
edbbb3ca 4074 e1000_tbi_adjust_stats(hw, &adapter->stats,
281a8f24 4075 length, mapped);
edbbb3ca 4076 spin_unlock_irqrestore(&adapter->stats_lock,
6cfbd97b 4077 irq_flags);
edbbb3ca
JB		 4078 length--;
4079 } else {
e825b731
BG		 4080 if (netdev->features & NETIF_F_RXALL)
4081 goto process_skb;
edbbb3ca
JB		 4082 /* recycle both page and skb */
4083 buffer_info->skb = skb;
4084 /* an error means any chain goes out the window
6cfbd97b
JK		 4085 * too
4086 */
edbbb3ca
JB		 4087 if (rx_ring->rx_skb_top)
4088 dev_kfree_skb(rx_ring->rx_skb_top);
4089 rx_ring->rx_skb_top = NULL;
4090 goto next_desc;
4091 }
4092 }
4093
4094#define rxtop rx_ring->rx_skb_top
e825b731 4095process_skb:
edbbb3ca
JB		 4096 if (!(status & E1000_RXD_STAT_EOP)) {
4097 /* this descriptor is only the beginning (or middle) */
4098 if (!rxtop) {
4099 /* this is the beginning of a chain */
4100 rxtop = skb;
4101 skb_fill_page_desc(rxtop, 0, buffer_info->page,
6cfbd97b 4102 0, length);
edbbb3ca
JB		 4103 } else {
4104 /* this is the middle of a chain */
4105 skb_fill_page_desc(rxtop,
4106 skb_shinfo(rxtop)->nr_frags,
4107 buffer_info->page, 0, length);
4108 /* re-use the skb, only consumed the page */
4109 buffer_info->skb = skb;
4110 }
4111 e1000_consume_page(buffer_info, rxtop, length);
4112 goto next_desc;
4113 } else {
4114 if (rxtop) {
4115 /* end of the chain */
4116 skb_fill_page_desc(rxtop,
4117 skb_shinfo(rxtop)->nr_frags,
4118 buffer_info->page, 0, length);
4119 /* re-use the current skb, we only consumed the
6cfbd97b
JK		 4120 * page
4121 */
edbbb3ca
JB		 4122 buffer_info->skb = skb;
4123 skb = rxtop;
4124 rxtop = NULL;
4125 e1000_consume_page(buffer_info, skb, length);
4126 } else {
4127 /* no chain, got EOP, this buf is the packet
6cfbd97b
JK		 4128 * copybreak to save the put_page/alloc_page
4129 */
edbbb3ca
JB		 4130 if (length <= copybreak &&
4131 skb_tailroom(skb) >= length) {
4132 u8 *vaddr;
4679026d 4133 vaddr = kmap_atomic(buffer_info->page);
6cfbd97b
JK		 4134 memcpy(skb_tail_pointer(skb), vaddr,
4135 length);
4679026d 4136 kunmap_atomic(vaddr);
edbbb3ca 4137 /* re-use the page, so don't erase
6cfbd97b
JK		 4138 * buffer_info->page
4139 */
edbbb3ca
JB		 4140 skb_put(skb, length);
4141 } else {
4142 skb_fill_page_desc(skb, 0,
6cfbd97b
JK		 4143 buffer_info->page, 0,
4144 length);
edbbb3ca 4145 e1000_consume_page(buffer_info, skb,
6cfbd97b 4146 length);
edbbb3ca
JB		 4147 }
4148 }
4149 }
4150
4151 /* Receive Checksum Offload XXX recompute due to CRC strip? */
4152 e1000_rx_checksum(adapter,
6cfbd97b
JK		 4153 (u32)(status) |
4154 ((u32)(rx_desc->errors) << 24),
4155 le16_to_cpu(rx_desc->csum), skb);
edbbb3ca 4156
b0d1562c
BG		 4157 total_rx_bytes += (skb->len - 4); /* don't count FCS */
4158 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4159 pskb_trim(skb, skb->len - 4);
edbbb3ca
JB		 4160 total_rx_packets++;
4161
4162 /* eth type trans needs skb->data to point to something */
4163 if (!pskb_may_pull(skb, ETH_HLEN)) {
feb8f478 4164 e_err(drv, "pskb_may_pull failed.\n");
edbbb3ca
JB		 4165 dev_kfree_skb(skb);
4166 goto next_desc;
4167 }
4168
edbbb3ca
JB		 4169 e1000_receive_skb(adapter, status, rx_desc->special, skb);
4170
4171next_desc:
4172 rx_desc->status = 0;
4173
4174 /* return some buffers to hardware, one at a time is too slow */
4175 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4176 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4177 cleaned_count = 0;
4178 }
4179
4180 /* use prefetched values */
4181 rx_desc = next_rxd;
4182 buffer_info = next_buffer;
4183 }
4184 rx_ring->next_to_clean = i;
4185
4186 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4187 if (cleaned_count)
4188 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4189
4190 adapter->total_rx_packets += total_rx_packets;
4191 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4192 netdev->stats.rx_bytes += total_rx_bytes;
4193 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 4194 return cleaned;
4195}
4196
6cfbd97b 4197/* this should improve performance for small packets with large amounts
57bf6eef
JP		 4198 * of reassembly being done in the stack
4199 */
4200static void e1000_check_copybreak(struct net_device *netdev,
4201 struct e1000_buffer *buffer_info,
4202 u32 length, struct sk_buff **skb)
4203{
4204 struct sk_buff *new_skb;
4205
4206 if (length > copybreak)
4207 return;
4208
4209 new_skb = netdev_alloc_skb_ip_align(netdev, length);
4210 if (!new_skb)
4211 return;
4212
4213 skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN,
4214 (*skb)->data - NET_IP_ALIGN,
4215 length + NET_IP_ALIGN);
4216 /* save the skb in buffer_info as good */
4217 buffer_info->skb = *skb;
4218 *skb = new_skb;
4219}
4220
1da177e4 4221/**
2d7edb92 4222 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 4223 * @adapter: board private structure
edbbb3ca
JB		 4224 * @rx_ring: ring to clean
4225 * @work_done: amount of napi work completed this call
4226 * @work_to_do: max amount of work allowed for this call to do
4227 */
64798845
JP		 4228static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
4229 struct e1000_rx_ring *rx_ring,
4230 int *work_done, int work_to_do)
1da177e4 4231{
1dc32918 4232 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4233 struct net_device *netdev = adapter->netdev;
4234 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 4235 struct e1000_rx_desc *rx_desc, *next_rxd;
4236 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 4237 unsigned long flags;
406874a7 4238 u32 length;
1da177e4 4239 unsigned int i;
72d64a43 4240 int cleaned_count = 0;
c3033b01 4241 bool cleaned = false;
835bb129 4242 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4243
4244 i = rx_ring->next_to_clean;
4245 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4246 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4247
b92ff8ee 4248 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4249 struct sk_buff *skb;
a292ca6e 4250 u8 status;
90fb5135 4251
96838a40 4252 if (*work_done >= work_to_do)
1da177e4
LT		 4253 break;
4254 (*work_done)++;
2d0bb1c1 4255 rmb(); /* read descriptor and rx_buffer_info after status DD */
c3570acb 4256
a292ca6e 4257 status = rx_desc->status;
b92ff8ee 4258 skb = buffer_info->skb;
86c3d59f
JB		 4259 buffer_info->skb = NULL;
4260
30320be8
JK		 4261 prefetch(skb->data - NET_IP_ALIGN);
4262
86c3d59f
JB		 4263 if (++i == rx_ring->count) i = 0;
4264 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4265 prefetch(next_rxd);
4266
86c3d59f 4267 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4268
c3033b01 4269 cleaned = true;
72d64a43 4270 cleaned_count++;
b16f53be
NN		 4271 dma_unmap_single(&pdev->dev, buffer_info->dma,
4272 buffer_info->length, DMA_FROM_DEVICE);
679be3ba 4273 buffer_info->dma = 0;
1da177e4 4274
1da177e4 4275 length = le16_to_cpu(rx_desc->length);
ea30e119 4276 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 4277 * packet, if thats the case we need to toss it. In fact, we
4278 * to toss every packet with the EOP bit clear and the next
4279 * frame that _does_ have the EOP bit set, as it is by
4280 * definition only a frame fragment
4281 */
4282 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
4283 adapter->discarding = true;
4284
4285 if (adapter->discarding) {
a1415ee6 4286 /* All receives must fit into a single buffer */
feb8f478 4287 e_dbg("Receive packet consumed multiple buffers\n");
864c4e45 4288 /* recycle */
8fc897b0 4289 buffer_info->skb = skb;
40a14dea
JB		 4290 if (status & E1000_RXD_STAT_EOP)
4291 adapter->discarding = false;
1da177e4
LT		 4292 goto next_desc;
4293 }
4294
96838a40 4295 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 4296 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4297 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4298 last_byte)) {
1da177e4 4299 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4300 e1000_tbi_adjust_stats(hw, &adapter->stats,
6cfbd97b 4301 length, skb->data);
1da177e4 4302 spin_unlock_irqrestore(&adapter->stats_lock,
6cfbd97b 4303 flags);
1da177e4
LT		 4304 length--;
4305 } else {
e825b731
BG		 4306 if (netdev->features & NETIF_F_RXALL)
4307 goto process_skb;
9e2feace
AK		 4308 /* recycle */
4309 buffer_info->skb = skb;
1da177e4
LT		 4310 goto next_desc;
4311 }
1cb5821f 4312 }
1da177e4 4313
e825b731 4314process_skb:
b0d1562c 4315 total_rx_bytes += (length - 4); /* don't count FCS */
835bb129
JB		 4316 total_rx_packets++;
4317
b0d1562c
BG		 4318 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4319 /* adjust length to remove Ethernet CRC, this must be
4320 * done after the TBI_ACCEPT workaround above
4321 */
4322 length -= 4;
4323
57bf6eef
JP		 4324 e1000_check_copybreak(netdev, buffer_info, length, &skb);
4325
996695de 4326 skb_put(skb, length);
1da177e4
LT		 4327
4328 /* Receive Checksum Offload */
a292ca6e 4329 e1000_rx_checksum(adapter,
406874a7
JP		 4330 (u32)(status) |
4331 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4332 le16_to_cpu(rx_desc->csum), skb);
96838a40 4333
edbbb3ca 4334 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 4335
1da177e4
LT		 4336next_desc:
4337 rx_desc->status = 0;
1da177e4 4338
72d64a43
JK		 4339 /* return some buffers to hardware, one at a time is too slow */
4340 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4341 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4342 cleaned_count = 0;
4343 }
4344
30320be8 4345 /* use prefetched values */
86c3d59f
JB		 4346 rx_desc = next_rxd;
4347 buffer_info = next_buffer;
1da177e4 4348 }
1da177e4 4349 rx_ring->next_to_clean = i;
72d64a43
JK		 4350
4351 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4352 if (cleaned_count)
4353 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4354
835bb129
JB		 4355 adapter->total_rx_packets += total_rx_packets;
4356 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4357 netdev->stats.rx_bytes += total_rx_bytes;
4358 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4359 return cleaned;
4360}
4361
edbbb3ca
JB		 4362/**
4363 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
4364 * @adapter: address of board private structure
4365 * @rx_ring: pointer to receive ring structure
4366 * @cleaned_count: number of buffers to allocate this pass
4367 **/
edbbb3ca
JB		 4368static void
4369e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
6cfbd97b 4370 struct e1000_rx_ring *rx_ring, int cleaned_count)
edbbb3ca
JB		 4371{
4372 struct net_device *netdev = adapter->netdev;
4373 struct pci_dev *pdev = adapter->pdev;
4374 struct e1000_rx_desc *rx_desc;
4375 struct e1000_buffer *buffer_info;
4376 struct sk_buff *skb;
4377 unsigned int i;
89d71a66 4378 unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
edbbb3ca
JB		 4379
4380 i = rx_ring->next_to_use;
4381 buffer_info = &rx_ring->buffer_info[i];
4382
4383 while (cleaned_count--) {
4384 skb = buffer_info->skb;
4385 if (skb) {
4386 skb_trim(skb, 0);
4387 goto check_page;
4388 }
4389
89d71a66 4390 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 4391 if (unlikely(!skb)) {
4392 /* Better luck next round */
4393 adapter->alloc_rx_buff_failed++;
4394 break;
4395 }
4396
edbbb3ca
JB		 4397 buffer_info->skb = skb;
4398 buffer_info->length = adapter->rx_buffer_len;
4399check_page:
4400 /* allocate a new page if necessary */
4401 if (!buffer_info->page) {
4402 buffer_info->page = alloc_page(GFP_ATOMIC);
4403 if (unlikely(!buffer_info->page)) {
4404 adapter->alloc_rx_buff_failed++;
4405 break;
4406 }
4407 }
4408
b5abb028 4409 if (!buffer_info->dma) {
b16f53be 4410 buffer_info->dma = dma_map_page(&pdev->dev,
6cfbd97b 4411 buffer_info->page, 0,
b16f53be
NN		 4412 buffer_info->length,
4413 DMA_FROM_DEVICE);
4414 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB		 4415 put_page(buffer_info->page);
4416 dev_kfree_skb(skb);
4417 buffer_info->page = NULL;
4418 buffer_info->skb = NULL;
4419 buffer_info->dma = 0;
4420 adapter->alloc_rx_buff_failed++;
4421 break; /* while !buffer_info->skb */
4422 }
4423 }
edbbb3ca
JB		 4424
4425 rx_desc = E1000_RX_DESC(*rx_ring, i);
4426 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4427
4428 if (unlikely(++i == rx_ring->count))
4429 i = 0;
4430 buffer_info = &rx_ring->buffer_info[i];
4431 }
4432
4433 if (likely(rx_ring->next_to_use != i)) {
4434 rx_ring->next_to_use = i;
4435 if (unlikely(i-- == 0))
4436 i = (rx_ring->count - 1);
4437
4438 /* Force memory writes to complete before letting h/w
4439 * know there are new descriptors to fetch. (Only
4440 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4441 * such as IA-64).
4442 */
edbbb3ca
JB		 4443 wmb();
4444 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4445 }
4446}
4447
1da177e4 4448/**
2d7edb92 4449 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4450 * @adapter: address of board private structure
4451 **/
64798845
JP		 4452static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4453 struct e1000_rx_ring *rx_ring,
4454 int cleaned_count)
1da177e4 4455{
1dc32918 4456 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4457 struct net_device *netdev = adapter->netdev;
4458 struct pci_dev *pdev = adapter->pdev;
4459 struct e1000_rx_desc *rx_desc;
4460 struct e1000_buffer *buffer_info;
4461 struct sk_buff *skb;
2648345f 4462 unsigned int i;
89d71a66 4463 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4464
4465 i = rx_ring->next_to_use;
4466 buffer_info = &rx_ring->buffer_info[i];
4467
a292ca6e 4468 while (cleaned_count--) {
ca6f7224
CH		 4469 skb = buffer_info->skb;
4470 if (skb) {
a292ca6e
JK		 4471 skb_trim(skb, 0);
4472 goto map_skb;
4473 }
4474
89d71a66 4475 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
96838a40 4476 if (unlikely(!skb)) {
1da177e4 4477 /* Better luck next round */
72d64a43 4478 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4479 break;
4480 }
4481
2648345f 4482 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4483 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4484 struct sk_buff *oldskb = skb;
feb8f478
ET		 4485 e_err(rx_err, "skb align check failed: %u bytes at "
4486 "%p\n", bufsz, skb->data);
2648345f 4487 /* Try again, without freeing the previous */
89d71a66 4488 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
2648345f 4489 /* Failed allocation, critical failure */
1da177e4
LT		 4490 if (!skb) {
4491 dev_kfree_skb(oldskb);
edbbb3ca 4492 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4493 break;
4494 }
2648345f 4495
1da177e4
LT		 4496 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4497 /* give up */
4498 dev_kfree_skb(skb);
4499 dev_kfree_skb(oldskb);
edbbb3ca 4500 adapter->alloc_rx_buff_failed++;
1da177e4 4501 break; /* while !buffer_info->skb */
1da177e4 4502 }
ca6f7224
CH		 4503
4504 /* Use new allocation */
4505 dev_kfree_skb(oldskb);
1da177e4 4506 }
1da177e4
LT		 4507 buffer_info->skb = skb;
4508 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4509map_skb:
b16f53be 4510 buffer_info->dma = dma_map_single(&pdev->dev,
1da177e4 4511 skb->data,
edbbb3ca 4512 buffer_info->length,
b16f53be
NN		 4513 DMA_FROM_DEVICE);
4514 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB		 4515 dev_kfree_skb(skb);
4516 buffer_info->skb = NULL;
4517 buffer_info->dma = 0;
4518 adapter->alloc_rx_buff_failed++;
4519 break; /* while !buffer_info->skb */
4520 }
1da177e4 4521
6cfbd97b 4522 /* XXX if it was allocated cleanly it will never map to a
edbbb3ca
JB		 4523 * boundary crossing
4524 */
4525
2648345f
MC		 4526 /* Fix for errata 23, can't cross 64kB boundary */
4527 if (!e1000_check_64k_bound(adapter,
4528 (void *)(unsigned long)buffer_info->dma,
4529 adapter->rx_buffer_len)) {
feb8f478
ET		 4530 e_err(rx_err, "dma align check failed: %u bytes at "
4531 "%p\n", adapter->rx_buffer_len,
675ad473 4532 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4533 dev_kfree_skb(skb);
4534 buffer_info->skb = NULL;
4535
b16f53be 4536 dma_unmap_single(&pdev->dev, buffer_info->dma,
1da177e4 4537 adapter->rx_buffer_len,
b16f53be 4538 DMA_FROM_DEVICE);
679be3ba 4539 buffer_info->dma = 0;
1da177e4 4540
edbbb3ca 4541 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4542 break; /* while !buffer_info->skb */
4543 }
1da177e4
LT		 4544 rx_desc = E1000_RX_DESC(*rx_ring, i);
4545 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4546
96838a40
JB		 4547 if (unlikely(++i == rx_ring->count))
4548 i = 0;
1da177e4
LT		 4549 buffer_info = &rx_ring->buffer_info[i];
4550 }
4551
b92ff8ee
JB		 4552 if (likely(rx_ring->next_to_use != i)) {
4553 rx_ring->next_to_use = i;
4554 if (unlikely(i-- == 0))
4555 i = (rx_ring->count - 1);
4556
4557 /* Force memory writes to complete before letting h/w
4558 * know there are new descriptors to fetch. (Only
4559 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4560 * such as IA-64).
4561 */
b92ff8ee 4562 wmb();
1dc32918 4563 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4564 }
1da177e4
LT		 4565}
4566
4567/**
4568 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4569 * @adapter:
4570 **/
64798845 4571static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4572{
1dc32918 4573 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4574 u16 phy_status;
4575 u16 phy_ctrl;
1da177e4 4576
1dc32918
JP		 4577 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4578 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4579 return;
4580
96838a40 4581 if (adapter->smartspeed == 0) {
1da177e4 4582 /* If Master/Slave config fault is asserted twice,
6cfbd97b
JK		 4583 * we assume back-to-back
4584 */
1dc32918 4585 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4586 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4587 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4588 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4589 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4590 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4591 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4592 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4593 phy_ctrl);
4594 adapter->smartspeed++;
1dc32918
JP		 4595 if (!e1000_phy_setup_autoneg(hw) &&
4596 !e1000_read_phy_reg(hw, PHY_CTRL,
6cfbd97b 4597 &phy_ctrl)) {
1da177e4
LT		 4598 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4599 MII_CR_RESTART_AUTO_NEG);
1dc32918 4600 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4601 phy_ctrl);
4602 }
4603 }
4604 return;
96838a40 4605 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4606 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4607 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4608 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4609 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4610 if (!e1000_phy_setup_autoneg(hw) &&
4611 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4612 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4613 MII_CR_RESTART_AUTO_NEG);
1dc32918 4614 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4615 }
4616 }
4617 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4618 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4619 adapter->smartspeed = 0;
4620}
4621
4622/**
4623 * e1000_ioctl -
4624 * @netdev:
4625 * @ifreq:
4626 * @cmd:
4627 **/
64798845 4628static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4629{
4630 switch (cmd) {
4631 case SIOCGMIIPHY:
4632 case SIOCGMIIREG:
4633 case SIOCSMIIREG:
4634 return e1000_mii_ioctl(netdev, ifr, cmd);
4635 default:
4636 return -EOPNOTSUPP;
4637 }
4638}
4639
4640/**
4641 * e1000_mii_ioctl -
4642 * @netdev:
4643 * @ifreq:
4644 * @cmd:
4645 **/
64798845
JP		 4646static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4647 int cmd)
1da177e4 4648{
60490fe0 4649 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4650 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4651 struct mii_ioctl_data *data = if_mii(ifr);
4652 int retval;
406874a7 4653 u16 mii_reg;
97876fc6 4654 unsigned long flags;
1da177e4 4655
1dc32918 4656 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4657 return -EOPNOTSUPP;
4658
4659 switch (cmd) {
4660 case SIOCGMIIPHY:
1dc32918 4661 data->phy_id = hw->phy_addr;
1da177e4
LT		 4662 break;
4663 case SIOCGMIIREG:
97876fc6 4664 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4665 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4666 &data->val_out)) {
4667 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4668 return -EIO;
97876fc6
MC		 4669 }
4670 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4671 break;
4672 case SIOCSMIIREG:
96838a40 4673 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4674 return -EFAULT;
4675 mii_reg = data->val_in;
97876fc6 4676 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4677 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4678 mii_reg)) {
4679 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4680 return -EIO;
97876fc6 4681 }
f0163ac4 4682 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4683 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4684 switch (data->reg_num) {
4685 case PHY_CTRL:
96838a40 4686 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4687 break;
96838a40 4688 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4689 hw->autoneg = 1;
4690 hw->autoneg_advertised = 0x2F;
1da177e4 4691 } else {
14ad2513 4692 u32 speed;
1da177e4 4693 if (mii_reg & 0x40)
14ad2513 4694 speed = SPEED_1000;
1da177e4 4695 else if (mii_reg & 0x2000)
14ad2513 4696 speed = SPEED_100;
1da177e4 4697 else
14ad2513
DD		 4698 speed = SPEED_10;
4699 retval = e1000_set_spd_dplx(
4700 adapter, speed,
4701 ((mii_reg & 0x100)
4702 ? DUPLEX_FULL :
4703 DUPLEX_HALF));
f0163ac4 4704 if (retval)
1da177e4
LT		 4705 return retval;
4706 }
2db10a08
AK		 4707 if (netif_running(adapter->netdev))
4708 e1000_reinit_locked(adapter);
4709 else
1da177e4
LT		 4710 e1000_reset(adapter);
4711 break;
4712 case M88E1000_PHY_SPEC_CTRL:
4713 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4714 if (e1000_phy_reset(hw))
1da177e4
LT		 4715 return -EIO;
4716 break;
4717 }
4718 } else {
4719 switch (data->reg_num) {
4720 case PHY_CTRL:
96838a40 4721 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4722 break;
2db10a08
AK		 4723 if (netif_running(adapter->netdev))
4724 e1000_reinit_locked(adapter);
4725 else
1da177e4
LT		 4726 e1000_reset(adapter);
4727 break;
4728 }
4729 }
4730 break;
4731 default:
4732 return -EOPNOTSUPP;
4733 }
4734 return E1000_SUCCESS;
4735}
4736
64798845 4737void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4738{
4739 struct e1000_adapter *adapter = hw->back;
2648345f 4740 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4741
96838a40 4742 if (ret_val)
feb8f478 4743 e_err(probe, "Error in setting MWI\n");
1da177e4
LT		 4744}
4745
64798845 4746void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4747{
4748 struct e1000_adapter *adapter = hw->back;
4749
4750 pci_clear_mwi(adapter->pdev);
4751}
4752
64798845 4753int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4754{
4755 struct e1000_adapter *adapter = hw->back;
4756 return pcix_get_mmrbc(adapter->pdev);
4757}
4758
64798845 4759void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4760{
4761 struct e1000_adapter *adapter = hw->back;
4762 pcix_set_mmrbc(adapter->pdev, mmrbc);
4763}
4764
64798845 4765void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4766{
4767 outl(value, port);
4768}
4769
5622e404
JP		 4770static bool e1000_vlan_used(struct e1000_adapter *adapter)
4771{
4772 u16 vid;
4773
4774 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4775 return true;
4776 return false;
4777}
4778
52f5509f
JP		 4779static void __e1000_vlan_mode(struct e1000_adapter *adapter,
4780 netdev_features_t features)
4781{
4782 struct e1000_hw *hw = &adapter->hw;
4783 u32 ctrl;
4784
4785 ctrl = er32(CTRL);
f646968f 4786 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
52f5509f
JP		 4787 /* enable VLAN tag insert/strip */
4788 ctrl |= E1000_CTRL_VME;
4789 } else {
4790 /* disable VLAN tag insert/strip */
4791 ctrl &= ~E1000_CTRL_VME;
4792 }
4793 ew32(CTRL, ctrl);
4794}
5622e404
JP		 4795static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
4796 bool filter_on)
1da177e4 4797{
1dc32918 4798 struct e1000_hw *hw = &adapter->hw;
5622e404 4799 u32 rctl;
1da177e4 4800
9150b76a
JB		 4801 if (!test_bit(__E1000_DOWN, &adapter->flags))
4802 e1000_irq_disable(adapter);
1da177e4 4803
52f5509f 4804 __e1000_vlan_mode(adapter, adapter->netdev->features);
5622e404 4805 if (filter_on) {
1532ecea
JB		 4806 /* enable VLAN receive filtering */
4807 rctl = er32(RCTL);
4808 rctl &= ~E1000_RCTL_CFIEN;
5622e404 4809 if (!(adapter->netdev->flags & IFF_PROMISC))
1532ecea
JB		 4810 rctl |= E1000_RCTL_VFE;
4811 ew32(RCTL, rctl);
4812 e1000_update_mng_vlan(adapter);
1da177e4 4813 } else {
1532ecea
JB		 4814 /* disable VLAN receive filtering */
4815 rctl = er32(RCTL);
4816 rctl &= ~E1000_RCTL_VFE;
4817 ew32(RCTL, rctl);
5622e404 4818 }
fd38d7a0 4819
5622e404
JP		 4820 if (!test_bit(__E1000_DOWN, &adapter->flags))
4821 e1000_irq_enable(adapter);
4822}
4823
c8f44aff 4824static void e1000_vlan_mode(struct net_device *netdev,
52f5509f 4825 netdev_features_t features)
5622e404
JP		 4826{
4827 struct e1000_adapter *adapter = netdev_priv(netdev);
5622e404
JP		 4828
4829 if (!test_bit(__E1000_DOWN, &adapter->flags))
4830 e1000_irq_disable(adapter);
4831
52f5509f 4832 __e1000_vlan_mode(adapter, features);
1da177e4 4833
9150b76a
JB		 4834 if (!test_bit(__E1000_DOWN, &adapter->flags))
4835 e1000_irq_enable(adapter);
1da177e4
LT		 4836}
4837
80d5c368
PM		 4838static int e1000_vlan_rx_add_vid(struct net_device *netdev,
4839 __be16 proto, u16 vid)
1da177e4 4840{
60490fe0 4841 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4842 struct e1000_hw *hw = &adapter->hw;
406874a7 4843 u32 vfta, index;
96838a40 4844
1dc32918 4845 if ((hw->mng_cookie.status &
96838a40
JB		 4846 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4847 (vid == adapter->mng_vlan_id))
8e586137 4848 return 0;
5622e404
JP		 4849
4850 if (!e1000_vlan_used(adapter))
4851 e1000_vlan_filter_on_off(adapter, true);
4852
1da177e4
LT		 4853 /* add VID to filter table */
4854 index = (vid >> 5) & 0x7F;
1dc32918 4855 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4856 vfta |= (1 << (vid & 0x1F));
1dc32918 4857 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4858
4859 set_bit(vid, adapter->active_vlans);
8e586137
JP		 4860
4861 return 0;
1da177e4
LT		 4862}
4863
80d5c368
PM		 4864static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
4865 __be16 proto, u16 vid)
1da177e4 4866{
60490fe0 4867 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4868 struct e1000_hw *hw = &adapter->hw;
406874a7 4869 u32 vfta, index;
1da177e4 4870
9150b76a
JB		 4871 if (!test_bit(__E1000_DOWN, &adapter->flags))
4872 e1000_irq_disable(adapter);
9150b76a
JB		 4873 if (!test_bit(__E1000_DOWN, &adapter->flags))
4874 e1000_irq_enable(adapter);
1da177e4
LT		 4875
4876 /* remove VID from filter table */
4877 index = (vid >> 5) & 0x7F;
1dc32918 4878 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4879 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4880 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4881
4882 clear_bit(vid, adapter->active_vlans);
4883
4884 if (!e1000_vlan_used(adapter))
4885 e1000_vlan_filter_on_off(adapter, false);
8e586137
JP		 4886
4887 return 0;
1da177e4
LT		 4888}
4889
64798845 4890static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4 4891{
5622e404 4892 u16 vid;
1da177e4 4893
5622e404
JP		 4894 if (!e1000_vlan_used(adapter))
4895 return;
4896
4897 e1000_vlan_filter_on_off(adapter, true);
4898 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368 4899 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
1da177e4
LT		 4900}
4901
14ad2513 4902int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
1da177e4 4903{
1dc32918
JP		 4904 struct e1000_hw *hw = &adapter->hw;
4905
4906 hw->autoneg = 0;
1da177e4 4907
14ad2513 4908 /* Make sure dplx is at most 1 bit and lsb of speed is not set
6cfbd97b
JK		 4909 * for the switch() below to work
4910 */
14ad2513
DD		 4911 if ((spd & 1) || (dplx & ~1))
4912 goto err_inval;
4913
6921368f 4914 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4915 if ((hw->media_type == e1000_media_type_fiber) &&
14ad2513
DD		 4916 spd != SPEED_1000 &&
4917 dplx != DUPLEX_FULL)
4918 goto err_inval;
6921368f 4919
14ad2513 4920 switch (spd + dplx) {
1da177e4 4921 case SPEED_10 + DUPLEX_HALF:
1dc32918 4922 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4923 break;
4924 case SPEED_10 + DUPLEX_FULL:
1dc32918 4925 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4926 break;
4927 case SPEED_100 + DUPLEX_HALF:
1dc32918 4928 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4929 break;
4930 case SPEED_100 + DUPLEX_FULL:
1dc32918 4931 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4932 break;
4933 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4934 hw->autoneg = 1;
4935 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4936 break;
4937 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4938 default:
14ad2513 4939 goto err_inval;
1da177e4 4940 }
c819bbd5
JB		 4941
4942 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
4943 hw->mdix = AUTO_ALL_MODES;
4944
1da177e4 4945 return 0;
14ad2513
DD		 4946
4947err_inval:
4948 e_err(probe, "Unsupported Speed/Duplex configuration\n");
4949 return -EINVAL;
1da177e4
LT		 4950}
4951
b43fcd7d 4952static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4953{
4954 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4955 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4956 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4957 u32 ctrl, ctrl_ext, rctl, status;
4958 u32 wufc = adapter->wol;
6fdfef16 4959#ifdef CONFIG_PM
240b1710 4960 int retval = 0;
6fdfef16 4961#endif
1da177e4
LT		 4962
4963 netif_device_detach(netdev);
4964
2db10a08
AK		 4965 if (netif_running(netdev)) {
4966 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4967 e1000_down(adapter);
2db10a08 4968 }
1da177e4 4969
2f82665f 4970#ifdef CONFIG_PM
1d33e9c6 4971 retval = pci_save_state(pdev);
3a3847e0 4972 if (retval)
2f82665f
JB		 4973 return retval;
4974#endif
4975
1dc32918 4976 status = er32(STATUS);
96838a40 4977 if (status & E1000_STATUS_LU)
1da177e4
LT		 4978 wufc &= ~E1000_WUFC_LNKC;
4979
96838a40 4980 if (wufc) {
1da177e4 4981 e1000_setup_rctl(adapter);
db0ce50d 4982 e1000_set_rx_mode(netdev);
1da177e4 4983
b868179c
DN		 4984 rctl = er32(RCTL);
4985
1da177e4 4986 /* turn on all-multi mode if wake on multicast is enabled */
b868179c 4987 if (wufc & E1000_WUFC_MC)
1da177e4 4988 rctl |= E1000_RCTL_MPE;
b868179c
DN		 4989
4990 /* enable receives in the hardware */
4991 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4 4992
1dc32918
JP		 4993 if (hw->mac_type >= e1000_82540) {
4994 ctrl = er32(CTRL);
1da177e4
LT		 4995 /* advertise wake from D3Cold */
4996 #define E1000_CTRL_ADVD3WUC 0x00100000
4997 /* phy power management enable */
4998 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4999 ctrl |= E1000_CTRL_ADVD3WUC |
5000 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 5001 ew32(CTRL, ctrl);
1da177e4
LT		 5002 }
5003
1dc32918 5004 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 5005 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 5006 /* keep the laser running in D3 */
1dc32918 5007 ctrl_ext = er32(CTRL_EXT);
1da177e4 5008 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 5009 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 5010 }
5011
1dc32918
JP		 5012 ew32(WUC, E1000_WUC_PME_EN);
5013 ew32(WUFC, wufc);
1da177e4 5014 } else {
1dc32918
JP		 5015 ew32(WUC, 0);
5016 ew32(WUFC, 0);
1da177e4
LT		 5017 }
5018
0fccd0e9
JG		 5019 e1000_release_manageability(adapter);
5020
b43fcd7d
RW		 5021 *enable_wake = !!wufc;
5022
0fccd0e9 5023 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 5024 if (adapter->en_mng_pt)
5025 *enable_wake = true;
1da177e4 5026
edd106fc
AK		 5027 if (netif_running(netdev))
5028 e1000_free_irq(adapter);
5029
1da177e4 5030 pci_disable_device(pdev);
240b1710 5031
1da177e4
LT		 5032 return 0;
5033}
5034
2f82665f 5035#ifdef CONFIG_PM
b43fcd7d
RW		 5036static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5037{
5038 int retval;
5039 bool wake;
5040
5041 retval = __e1000_shutdown(pdev, &wake);
5042 if (retval)
5043 return retval;
5044
5045 if (wake) {
5046 pci_prepare_to_sleep(pdev);
5047 } else {
5048 pci_wake_from_d3(pdev, false);
5049 pci_set_power_state(pdev, PCI_D3hot);
5050 }
5051
5052 return 0;
5053}
5054
64798845 5055static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 5056{
5057 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5058 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5059 struct e1000_hw *hw = &adapter->hw;
406874a7 5060 u32 err;
1da177e4 5061
d0e027db 5062 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 5063 pci_restore_state(pdev);
dbb5aaeb 5064 pci_save_state(pdev);
81250297
TI		 5065
5066 if (adapter->need_ioport)
5067 err = pci_enable_device(pdev);
5068 else
5069 err = pci_enable_device_mem(pdev);
c7be73bc 5070 if (err) {
675ad473 5071 pr_err("Cannot enable PCI device from suspend\n");
3d1dd8cb
AK		 5072 return err;
5073 }
a4cb847d 5074 pci_set_master(pdev);
1da177e4 5075
d0e027db
AK		 5076 pci_enable_wake(pdev, PCI_D3hot, 0);
5077 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5078
c7be73bc
JP		 5079 if (netif_running(netdev)) {
5080 err = e1000_request_irq(adapter);
5081 if (err)
5082 return err;
5083 }
edd106fc
AK		 5084
5085 e1000_power_up_phy(adapter);
1da177e4 5086 e1000_reset(adapter);
1dc32918 5087 ew32(WUS, ~0);
1da177e4 5088
0fccd0e9
JG		 5089 e1000_init_manageability(adapter);
5090
96838a40 5091 if (netif_running(netdev))
1da177e4
LT		 5092 e1000_up(adapter);
5093
5094 netif_device_attach(netdev);
5095
1da177e4
LT		 5096 return 0;
5097}
5098#endif
c653e635
AK		 5099
5100static void e1000_shutdown(struct pci_dev *pdev)
5101{
b43fcd7d
RW		 5102 bool wake;
5103
5104 __e1000_shutdown(pdev, &wake);
5105
5106 if (system_state == SYSTEM_POWER_OFF) {
5107 pci_wake_from_d3(pdev, wake);
5108 pci_set_power_state(pdev, PCI_D3hot);
5109 }
c653e635
AK		 5110}
5111
1da177e4 5112#ifdef CONFIG_NET_POLL_CONTROLLER
6cfbd97b 5113/* Polling 'interrupt' - used by things like netconsole to send skbs
1da177e4
LT		 5114 * without having to re-enable interrupts. It's not called while
5115 * the interrupt routine is executing.
5116 */
64798845 5117static void e1000_netpoll(struct net_device *netdev)
1da177e4 5118{
60490fe0 5119 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5120
1da177e4 5121 disable_irq(adapter->pdev->irq);
7d12e780 5122 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 5123 enable_irq(adapter->pdev->irq);
5124}
5125#endif
5126
9026729b
AK		 5127/**
5128 * e1000_io_error_detected - called when PCI error is detected
5129 * @pdev: Pointer to PCI device
120a5d0d 5130 * @state: The current pci connection state
9026729b
AK		 5131 *
5132 * This function is called after a PCI bus error affecting
5133 * this device has been detected.
5134 */
64798845
JP		 5135static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5136 pci_channel_state_t state)
9026729b
AK		 5137{
5138 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5139 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 5140
5141 netif_device_detach(netdev);
5142
eab63302
AD		 5143 if (state == pci_channel_io_perm_failure)
5144 return PCI_ERS_RESULT_DISCONNECT;
5145
9026729b
AK		 5146 if (netif_running(netdev))
5147 e1000_down(adapter);
72e8d6bb 5148 pci_disable_device(pdev);
9026729b
AK		 5149
5150 /* Request a slot slot reset. */
5151 return PCI_ERS_RESULT_NEED_RESET;
5152}
5153
5154/**
5155 * e1000_io_slot_reset - called after the pci bus has been reset.
5156 * @pdev: Pointer to PCI device
5157 *
5158 * Restart the card from scratch, as if from a cold-boot. Implementation
5159 * resembles the first-half of the e1000_resume routine.
5160 */
5161static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5162{
5163 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5164 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5165 struct e1000_hw *hw = &adapter->hw;
81250297 5166 int err;
9026729b 5167
81250297
TI		 5168 if (adapter->need_ioport)
5169 err = pci_enable_device(pdev);
5170 else
5171 err = pci_enable_device_mem(pdev);
5172 if (err) {
675ad473 5173 pr_err("Cannot re-enable PCI device after reset.\n");
9026729b
AK		 5174 return PCI_ERS_RESULT_DISCONNECT;
5175 }
5176 pci_set_master(pdev);
5177
dbf38c94
LV		 5178 pci_enable_wake(pdev, PCI_D3hot, 0);
5179 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5180
9026729b 5181 e1000_reset(adapter);
1dc32918 5182 ew32(WUS, ~0);
9026729b
AK		 5183
5184 return PCI_ERS_RESULT_RECOVERED;
5185}
5186
5187/**
5188 * e1000_io_resume - called when traffic can start flowing again.
5189 * @pdev: Pointer to PCI device
5190 *
5191 * This callback is called when the error recovery driver tells us that
5192 * its OK to resume normal operation. Implementation resembles the
5193 * second-half of the e1000_resume routine.
5194 */
5195static void e1000_io_resume(struct pci_dev *pdev)
5196{
5197 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5198 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 5199
5200 e1000_init_manageability(adapter);
9026729b
AK		 5201
5202 if (netif_running(netdev)) {
5203 if (e1000_up(adapter)) {
675ad473 5204 pr_info("can't bring device back up after reset\n");
9026729b
AK		 5205 return;
5206 }
5207 }
5208
5209 netif_device_attach(netdev);
9026729b
AK		 5210}
5211
1da177e4 5212/* e1000_main.c */
Linux kernel - Deliverables
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