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e1000e: Fix TSO with non-accelerated vlans
[deliverable/linux.git] / drivers / net / ethernet / intel / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
5377a416 31#include <linux/io.h>
70c71606 32#include <linux/prefetch.h>
5622e404
JP		 33#include <linux/bitops.h>
34#include <linux/if_vlan.h>
5377a416 35
1da177e4 36char e1000_driver_name[] = "e1000";
3ad2cc67 37static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
ab08853f 38#define DRV_VERSION "7.3.21-k8-NAPI"
abec42a4
SH		 39const char e1000_driver_version[] = DRV_VERSION;
40static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
9baa3c34 49static const struct pci_device_id e1000_pci_tbl[] = {
1da177e4
LT		 50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
75 INTEL_E1000_ETHERNET_DEVICE(0x1075),
76 INTEL_E1000_ETHERNET_DEVICE(0x1076),
77 INTEL_E1000_ETHERNET_DEVICE(0x1077),
78 INTEL_E1000_ETHERNET_DEVICE(0x1078),
79 INTEL_E1000_ETHERNET_DEVICE(0x1079),
80 INTEL_E1000_ETHERNET_DEVICE(0x107A),
81 INTEL_E1000_ETHERNET_DEVICE(0x107B),
82 INTEL_E1000_ETHERNET_DEVICE(0x107C),
83 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 84 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 85 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
5377a416 86 INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
1da177e4
LT		 87 /* required last entry */
88 {0,}
89};
90
91MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
92
35574764
NN		 93int e1000_up(struct e1000_adapter *adapter);
94void e1000_down(struct e1000_adapter *adapter);
95void e1000_reinit_locked(struct e1000_adapter *adapter);
96void e1000_reset(struct e1000_adapter *adapter);
35574764
NN		 97int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
98int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
99void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
100void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 101static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *txdr);
3ad2cc67 103static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 104 struct e1000_rx_ring *rxdr);
3ad2cc67 105static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 106 struct e1000_tx_ring *tx_ring);
3ad2cc67 107static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 108 struct e1000_rx_ring *rx_ring);
109void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 110
111static int e1000_init_module(void);
112static void e1000_exit_module(void);
113static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
9f9a12f8 114static void e1000_remove(struct pci_dev *pdev);
581d708e 115static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 116static int e1000_sw_init(struct e1000_adapter *adapter);
117static int e1000_open(struct net_device *netdev);
118static int e1000_close(struct net_device *netdev);
119static void e1000_configure_tx(struct e1000_adapter *adapter);
120static void e1000_configure_rx(struct e1000_adapter *adapter);
121static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 122static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
123static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
124static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
125 struct e1000_tx_ring *tx_ring);
126static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
127 struct e1000_rx_ring *rx_ring);
db0ce50d 128static void e1000_set_rx_mode(struct net_device *netdev);
5cf42fcd 129static void e1000_update_phy_info_task(struct work_struct *work);
a4010afe 130static void e1000_watchdog(struct work_struct *work);
5cf42fcd 131static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
3b29a56d
SH		 132static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
133 struct net_device *netdev);
1da177e4
LT		 134static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
135static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
136static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 137static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 138static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
139 struct e1000_tx_ring *tx_ring);
bea3348e 140static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 141static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
142 struct e1000_rx_ring *rx_ring,
143 int *work_done, int work_to_do);
edbbb3ca
JB		 144static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
145 struct e1000_rx_ring *rx_ring,
146 int *work_done, int work_to_do);
581d708e 147static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 148 struct e1000_rx_ring *rx_ring,
72d64a43 149 int cleaned_count);
edbbb3ca
JB		 150static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring,
152 int cleaned_count);
1da177e4
LT		 153static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
154static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
155 int cmd);
1da177e4
LT		 156static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
157static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
158static void e1000_tx_timeout(struct net_device *dev);
65f27f38 159static void e1000_reset_task(struct work_struct *work);
1da177e4 160static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 161static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
162 struct sk_buff *skb);
1da177e4 163
5622e404 164static bool e1000_vlan_used(struct e1000_adapter *adapter);
c8f44aff
MM		 165static void e1000_vlan_mode(struct net_device *netdev,
166 netdev_features_t features);
52f5509f
JP		 167static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
168 bool filter_on);
80d5c368
PM		 169static int e1000_vlan_rx_add_vid(struct net_device *netdev,
170 __be16 proto, u16 vid);
171static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
172 __be16 proto, u16 vid);
1da177e4
LT		 173static void e1000_restore_vlan(struct e1000_adapter *adapter);
174
6fdfef16 175#ifdef CONFIG_PM
b43fcd7d 176static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 177static int e1000_resume(struct pci_dev *pdev);
178#endif
c653e635 179static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 180
181#ifdef CONFIG_NET_POLL_CONTROLLER
182/* for netdump / net console */
183static void e1000_netpoll (struct net_device *netdev);
184#endif
185
1f753861
JB		 186#define COPYBREAK_DEFAULT 256
187static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
188module_param(copybreak, uint, 0644);
189MODULE_PARM_DESC(copybreak,
190 "Maximum size of packet that is copied to a new buffer on receive");
191
9026729b
AK		 192static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
193 pci_channel_state_t state);
194static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
195static void e1000_io_resume(struct pci_dev *pdev);
196
3646f0e5 197static const struct pci_error_handlers e1000_err_handler = {
9026729b
AK		 198 .error_detected = e1000_io_error_detected,
199 .slot_reset = e1000_io_slot_reset,
200 .resume = e1000_io_resume,
201};
24025e4e 202
1da177e4
LT		 203static struct pci_driver e1000_driver = {
204 .name = e1000_driver_name,
205 .id_table = e1000_pci_tbl,
206 .probe = e1000_probe,
9f9a12f8 207 .remove = e1000_remove,
c4e24f01 208#ifdef CONFIG_PM
25985edc 209 /* Power Management Hooks */
1da177e4 210 .suspend = e1000_suspend,
c653e635 211 .resume = e1000_resume,
1da177e4 212#endif
9026729b
AK		 213 .shutdown = e1000_shutdown,
214 .err_handler = &e1000_err_handler
1da177e4
LT		 215};
216
217MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
218MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
219MODULE_LICENSE("GPL");
220MODULE_VERSION(DRV_VERSION);
221
b3f4d599 222#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
223static int debug = -1;
1da177e4
LT		 224module_param(debug, int, 0);
225MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
226
675ad473
ET		 227/**
228 * e1000_get_hw_dev - return device
229 * used by hardware layer to print debugging information
230 *
231 **/
232struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
233{
234 struct e1000_adapter *adapter = hw->back;
235 return adapter->netdev;
236}
237
1da177e4
LT		 238/**
239 * e1000_init_module - Driver Registration Routine
240 *
241 * e1000_init_module is the first routine called when the driver is
242 * loaded. All it does is register with the PCI subsystem.
243 **/
64798845 244static int __init e1000_init_module(void)
1da177e4
LT		 245{
246 int ret;
675ad473 247 pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
1da177e4 248
675ad473 249 pr_info("%s\n", e1000_copyright);
1da177e4 250
29917620 251 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 252 if (copybreak != COPYBREAK_DEFAULT) {
253 if (copybreak == 0)
675ad473 254 pr_info("copybreak disabled\n");
1f753861 255 else
675ad473
ET		 256 pr_info("copybreak enabled for "
257 "packets <= %u bytes\n", copybreak);
1f753861 258 }
1da177e4
LT		 259 return ret;
260}
261
262module_init(e1000_init_module);
263
264/**
265 * e1000_exit_module - Driver Exit Cleanup Routine
266 *
267 * e1000_exit_module is called just before the driver is removed
268 * from memory.
269 **/
64798845 270static void __exit e1000_exit_module(void)
1da177e4 271{
1da177e4
LT		 272 pci_unregister_driver(&e1000_driver);
273}
274
275module_exit(e1000_exit_module);
276
2db10a08
AK		 277static int e1000_request_irq(struct e1000_adapter *adapter)
278{
279 struct net_device *netdev = adapter->netdev;
3e18826c 280 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 281 int irq_flags = IRQF_SHARED;
282 int err;
2db10a08 283
e94bd23f
AK		 284 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
285 netdev);
286 if (err) {
feb8f478 287 e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 288 }
2db10a08
AK		 289
290 return err;
291}
292
293static void e1000_free_irq(struct e1000_adapter *adapter)
294{
295 struct net_device *netdev = adapter->netdev;
296
297 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 298}
299
1da177e4
LT		 300/**
301 * e1000_irq_disable - Mask off interrupt generation on the NIC
302 * @adapter: board private structure
303 **/
64798845 304static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 305{
1dc32918
JP		 306 struct e1000_hw *hw = &adapter->hw;
307
308 ew32(IMC, ~0);
309 E1000_WRITE_FLUSH();
1da177e4
LT		 310 synchronize_irq(adapter->pdev->irq);
311}
312
313/**
314 * e1000_irq_enable - Enable default interrupt generation settings
315 * @adapter: board private structure
316 **/
64798845 317static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 318{
1dc32918
JP		 319 struct e1000_hw *hw = &adapter->hw;
320
321 ew32(IMS, IMS_ENABLE_MASK);
322 E1000_WRITE_FLUSH();
1da177e4 323}
3ad2cc67 324
64798845 325static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 326{
1dc32918 327 struct e1000_hw *hw = &adapter->hw;
2d7edb92 328 struct net_device *netdev = adapter->netdev;
1dc32918 329 u16 vid = hw->mng_cookie.vlan_id;
406874a7 330 u16 old_vid = adapter->mng_vlan_id;
96838a40 331
5622e404
JP		 332 if (!e1000_vlan_used(adapter))
333 return;
334
335 if (!test_bit(vid, adapter->active_vlans)) {
336 if (hw->mng_cookie.status &
337 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
80d5c368 338 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
c5f226fe 339 adapter->mng_vlan_id = vid;
5622e404
JP		 340 } else {
341 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
342 }
343 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
344 (vid != old_vid) &&
345 !test_bit(old_vid, adapter->active_vlans))
80d5c368
PM		 346 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
347 old_vid);
5622e404
JP		 348 } else {
349 adapter->mng_vlan_id = vid;
2d7edb92
MC		 350 }
351}
b55ccb35 352
64798845 353static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 354{
1dc32918
JP		 355 struct e1000_hw *hw = &adapter->hw;
356
0fccd0e9 357 if (adapter->en_mng_pt) {
1dc32918 358 u32 manc = er32(MANC);
0fccd0e9
JG		 359
360 /* disable hardware interception of ARP */
361 manc &= ~(E1000_MANC_ARP_EN);
362
1dc32918 363 ew32(MANC, manc);
0fccd0e9
JG		 364 }
365}
366
64798845 367static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 368{
1dc32918
JP		 369 struct e1000_hw *hw = &adapter->hw;
370
0fccd0e9 371 if (adapter->en_mng_pt) {
1dc32918 372 u32 manc = er32(MANC);
0fccd0e9
JG		 373
374 /* re-enable hardware interception of ARP */
375 manc |= E1000_MANC_ARP_EN;
376
1dc32918 377 ew32(MANC, manc);
0fccd0e9
JG		 378 }
379}
380
e0aac5a2
AK		 381/**
382 * e1000_configure - configure the hardware for RX and TX
383 * @adapter = private board structure
384 **/
385static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 386{
387 struct net_device *netdev = adapter->netdev;
2db10a08 388 int i;
1da177e4 389
db0ce50d 390 e1000_set_rx_mode(netdev);
1da177e4
LT		 391
392 e1000_restore_vlan(adapter);
0fccd0e9 393 e1000_init_manageability(adapter);
1da177e4
LT		 394
395 e1000_configure_tx(adapter);
396 e1000_setup_rctl(adapter);
397 e1000_configure_rx(adapter);
72d64a43
JK		 398 /* call E1000_DESC_UNUSED which always leaves
399 * at least 1 descriptor unused to make sure
6cfbd97b
JK		 400 * next_to_use != next_to_clean
401 */
f56799ea 402 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 403 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e 404 adapter->alloc_rx_buf(adapter, ring,
6cfbd97b 405 E1000_DESC_UNUSED(ring));
f56799ea 406 }
e0aac5a2
AK		 407}
408
409int e1000_up(struct e1000_adapter *adapter)
410{
1dc32918
JP		 411 struct e1000_hw *hw = &adapter->hw;
412
e0aac5a2
AK		 413 /* hardware has been reset, we need to reload some things */
414 e1000_configure(adapter);
415
416 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 417
bea3348e 418 napi_enable(&adapter->napi);
c3570acb 419
5de55624
MC		 420 e1000_irq_enable(adapter);
421
4cb9be7a
JB		 422 netif_wake_queue(adapter->netdev);
423
79f3d399 424 /* fire a link change interrupt to start the watchdog */
1dc32918 425 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 426 return 0;
427}
428
79f05bf0
AK		 429/**
430 * e1000_power_up_phy - restore link in case the phy was powered down
431 * @adapter: address of board private structure
432 *
433 * The phy may be powered down to save power and turn off link when the
434 * driver is unloaded and wake on lan is not enabled (among others)
435 * *** this routine MUST be followed by a call to e1000_reset ***
79f05bf0 436 **/
d658266e 437void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 438{
1dc32918 439 struct e1000_hw *hw = &adapter->hw;
406874a7 440 u16 mii_reg = 0;
79f05bf0
AK		 441
442 /* Just clear the power down bit to wake the phy back up */
1dc32918 443 if (hw->media_type == e1000_media_type_copper) {
79f05bf0 444 /* according to the manual, the phy will retain its
6cfbd97b
JK		 445 * settings across a power-down/up cycle
446 */
1dc32918 447 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 448 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 449 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 450 }
451}
452
453static void e1000_power_down_phy(struct e1000_adapter *adapter)
454{
1dc32918
JP		 455 struct e1000_hw *hw = &adapter->hw;
456
61c2505f 457 /* Power down the PHY so no link is implied when interface is down *
c3033b01 458 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 459 * (a) WoL is enabled
460 * (b) AMT is active
6cfbd97b
JK		 461 * (c) SoL/IDER session is active
462 */
1dc32918
JP		 463 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
464 hw->media_type == e1000_media_type_copper) {
406874a7 465 u16 mii_reg = 0;
61c2505f 466
1dc32918 467 switch (hw->mac_type) {
61c2505f
BA		 468 case e1000_82540:
469 case e1000_82545:
470 case e1000_82545_rev_3:
471 case e1000_82546:
5377a416 472 case e1000_ce4100:
61c2505f
BA		 473 case e1000_82546_rev_3:
474 case e1000_82541:
475 case e1000_82541_rev_2:
476 case e1000_82547:
477 case e1000_82547_rev_2:
1dc32918 478 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 479 goto out;
480 break;
61c2505f
BA		 481 default:
482 goto out;
483 }
1dc32918 484 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 485 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 486 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
4e0d8f7d 487 msleep(1);
79f05bf0 488 }
61c2505f
BA		 489out:
490 return;
79f05bf0
AK		 491}
492
a4010afe
JB		 493static void e1000_down_and_stop(struct e1000_adapter *adapter)
494{
495 set_bit(__E1000_DOWN, &adapter->flags);
8ce6909f 496
a4010afe 497 cancel_delayed_work_sync(&adapter->watchdog_task);
74a1b1ea
VD		 498
499 /*
500 * Since the watchdog task can reschedule other tasks, we should cancel
501 * it first, otherwise we can run into the situation when a work is
502 * still running after the adapter has been turned down.
503 */
504
a4010afe
JB		 505 cancel_delayed_work_sync(&adapter->phy_info_task);
506 cancel_delayed_work_sync(&adapter->fifo_stall_task);
74a1b1ea
VD		 507
508 /* Only kill reset task if adapter is not resetting */
509 if (!test_bit(__E1000_RESETTING, &adapter->flags))
510 cancel_work_sync(&adapter->reset_task);
a4010afe
JB		 511}
512
64798845 513void e1000_down(struct e1000_adapter *adapter)
1da177e4 514{
a6c42322 515 struct e1000_hw *hw = &adapter->hw;
1da177e4 516 struct net_device *netdev = adapter->netdev;
a6c42322 517 u32 rctl, tctl;
1da177e4 518
1314bbf3 519
a6c42322
JB		 520 /* disable receives in the hardware */
521 rctl = er32(RCTL);
522 ew32(RCTL, rctl & ~E1000_RCTL_EN);
523 /* flush and sleep below */
524
51851073 525 netif_tx_disable(netdev);
a6c42322
JB		 526
527 /* disable transmits in the hardware */
528 tctl = er32(TCTL);
529 tctl &= ~E1000_TCTL_EN;
530 ew32(TCTL, tctl);
531 /* flush both disables and wait for them to finish */
532 E1000_WRITE_FLUSH();
533 msleep(10);
534
bea3348e 535 napi_disable(&adapter->napi);
c3570acb 536
1da177e4 537 e1000_irq_disable(adapter);
c1605eb3 538
6cfbd97b 539 /* Setting DOWN must be after irq_disable to prevent
ab08853f 540 * a screaming interrupt. Setting DOWN also prevents
a4010afe 541 * tasks from rescheduling.
ab08853f 542 */
a4010afe 543 e1000_down_and_stop(adapter);
1da177e4 544
1da177e4
LT		 545 adapter->link_speed = 0;
546 adapter->link_duplex = 0;
547 netif_carrier_off(netdev);
1da177e4
LT		 548
549 e1000_reset(adapter);
581d708e
MC		 550 e1000_clean_all_tx_rings(adapter);
551 e1000_clean_all_rx_rings(adapter);
1da177e4 552}
1da177e4 553
64798845 554void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 555{
556 WARN_ON(in_interrupt());
557 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
558 msleep(1);
559 e1000_down(adapter);
560 e1000_up(adapter);
561 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 562}
563
64798845 564void e1000_reset(struct e1000_adapter *adapter)
1da177e4 565{
1dc32918 566 struct e1000_hw *hw = &adapter->hw;
406874a7 567 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 568 bool legacy_pba_adjust = false;
b7cb8c2c 569 u16 hwm;
1da177e4
LT		 570
571 /* Repartition Pba for greater than 9k mtu
572 * To take effect CTRL.RST is required.
573 */
574
1dc32918 575 switch (hw->mac_type) {
018ea44e
BA		 576 case e1000_82542_rev2_0:
577 case e1000_82542_rev2_1:
578 case e1000_82543:
579 case e1000_82544:
580 case e1000_82540:
581 case e1000_82541:
582 case e1000_82541_rev_2:
c3033b01 583 legacy_pba_adjust = true;
018ea44e
BA		 584 pba = E1000_PBA_48K;
585 break;
586 case e1000_82545:
587 case e1000_82545_rev_3:
588 case e1000_82546:
5377a416 589 case e1000_ce4100:
018ea44e
BA		 590 case e1000_82546_rev_3:
591 pba = E1000_PBA_48K;
592 break;
2d7edb92 593 case e1000_82547:
0e6ef3e0 594 case e1000_82547_rev_2:
c3033b01 595 legacy_pba_adjust = true;
2d7edb92
MC		 596 pba = E1000_PBA_30K;
597 break;
018ea44e
BA		 598 case e1000_undefined:
599 case e1000_num_macs:
2d7edb92
MC		 600 break;
601 }
602
c3033b01 603 if (legacy_pba_adjust) {
b7cb8c2c 604 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 605 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 606
1dc32918 607 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 608 adapter->tx_fifo_head = 0;
609 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
610 adapter->tx_fifo_size =
611 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
612 atomic_set(&adapter->tx_fifo_stall, 0);
613 }
b7cb8c2c 614 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 615 /* adjust PBA for jumbo frames */
1dc32918 616 ew32(PBA, pba);
018ea44e
BA		 617
618 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 619 * large enough to accommodate two full transmit packets,
018ea44e 620 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 621 * the Rx FIFO should be large enough to accommodate at least
018ea44e 622 * one full receive packet and is similarly rounded up and
6cfbd97b
JK		 623 * expressed in KB.
624 */
1dc32918 625 pba = er32(PBA);
018ea44e
BA		 626 /* upper 16 bits has Tx packet buffer allocation size in KB */
627 tx_space = pba >> 16;
628 /* lower 16 bits has Rx packet buffer allocation size in KB */
629 pba &= 0xffff;
6cfbd97b 630 /* the Tx fifo also stores 16 bytes of information about the Tx
b7cb8c2c
JB		 631 * but don't include ethernet FCS because hardware appends it
632 */
633 min_tx_space = (hw->max_frame_size +
634 sizeof(struct e1000_tx_desc) -
635 ETH_FCS_LEN) * 2;
9099cfb9 636 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 637 min_tx_space >>= 10;
b7cb8c2c
JB		 638 /* software strips receive CRC, so leave room for it */
639 min_rx_space = hw->max_frame_size;
9099cfb9 640 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 641 min_rx_space >>= 10;
642
643 /* If current Tx allocation is less than the min Tx FIFO size,
644 * and the min Tx FIFO size is less than the current Rx FIFO
6cfbd97b
JK		 645 * allocation, take space away from current Rx allocation
646 */
018ea44e
BA		 647 if (tx_space < min_tx_space &&
648 ((min_tx_space - tx_space) < pba)) {
649 pba = pba - (min_tx_space - tx_space);
650
651 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 652 switch (hw->mac_type) {
018ea44e
BA		 653 case e1000_82545 ... e1000_82546_rev_3:
654 pba &= ~(E1000_PBA_8K - 1);
655 break;
656 default:
657 break;
658 }
659
6cfbd97b
JK		 660 /* if short on Rx space, Rx wins and must trump Tx
661 * adjustment or use Early Receive if available
662 */
1532ecea
JB		 663 if (pba < min_rx_space)
664 pba = min_rx_space;
018ea44e 665 }
1da177e4 666 }
2d7edb92 667
1dc32918 668 ew32(PBA, pba);
1da177e4 669
6cfbd97b 670 /* flow control settings:
b7cb8c2c
JB		 671 * The high water mark must be low enough to fit one full frame
672 * (or the size used for early receive) above it in the Rx FIFO.
673 * Set it to the lower of:
674 * - 90% of the Rx FIFO size, and
675 * - the full Rx FIFO size minus the early receive size (for parts
676 * with ERT support assuming ERT set to E1000_ERT_2048), or
677 * - the full Rx FIFO size minus one full frame
678 */
679 hwm = min(((pba << 10) * 9 / 10),
680 ((pba << 10) - hw->max_frame_size));
681
682 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
683 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 684 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 685 hw->fc_send_xon = 1;
686 hw->fc = hw->original_fc;
1da177e4 687
2d7edb92 688 /* Allow time for pending master requests to run */
1dc32918
JP		 689 e1000_reset_hw(hw);
690 if (hw->mac_type >= e1000_82544)
691 ew32(WUC, 0);
09ae3e88 692
1dc32918 693 if (e1000_init_hw(hw))
feb8f478 694 e_dev_err("Hardware Error\n");
2d7edb92 695 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 696
697 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 698 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 699 hw->autoneg == 1 &&
700 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
701 u32 ctrl = er32(CTRL);
3d5460a0
JB		 702 /* clear phy power management bit if we are in gig only mode,
703 * which if enabled will attempt negotiation to 100Mb, which
6cfbd97b
JK		 704 * can cause a loss of link at power off or driver unload
705 */
3d5460a0 706 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 707 ew32(CTRL, ctrl);
3d5460a0
JB		 708 }
709
1da177e4 710 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 711 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 712
1dc32918
JP		 713 e1000_reset_adaptive(hw);
714 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 715
0fccd0e9 716 e1000_release_manageability(adapter);
1da177e4
LT		 717}
718
1aa8b471 719/* Dump the eeprom for users having checksum issues */
b4ea895d 720static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 721{
722 struct net_device *netdev = adapter->netdev;
723 struct ethtool_eeprom eeprom;
724 const struct ethtool_ops *ops = netdev->ethtool_ops;
725 u8 *data;
726 int i;
727 u16 csum_old, csum_new = 0;
728
729 eeprom.len = ops->get_eeprom_len(netdev);
730 eeprom.offset = 0;
731
732 data = kmalloc(eeprom.len, GFP_KERNEL);
e404decb 733 if (!data)
67b3c27c 734 return;
67b3c27c
AK		 735
736 ops->get_eeprom(netdev, &eeprom, data);
737
738 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
739 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
740 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
741 csum_new += data[i] + (data[i + 1] << 8);
742 csum_new = EEPROM_SUM - csum_new;
743
675ad473
ET		 744 pr_err("/*********************/\n");
745 pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
746 pr_err("Calculated : 0x%04x\n", csum_new);
67b3c27c 747
675ad473
ET		 748 pr_err("Offset Values\n");
749 pr_err("======== ======\n");
67b3c27c
AK		 750 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
751
675ad473
ET		 752 pr_err("Include this output when contacting your support provider.\n");
753 pr_err("This is not a software error! Something bad happened to\n");
754 pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
755 pr_err("result in further problems, possibly loss of data,\n");
756 pr_err("corruption or system hangs!\n");
757 pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
758 pr_err("which is invalid and requires you to set the proper MAC\n");
759 pr_err("address manually before continuing to enable this network\n");
760 pr_err("device. Please inspect the EEPROM dump and report the\n");
761 pr_err("issue to your hardware vendor or Intel Customer Support.\n");
762 pr_err("/*********************/\n");
67b3c27c
AK		 763
764 kfree(data);
765}
766
81250297
TI		 767/**
768 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
769 * @pdev: PCI device information struct
770 *
771 * Return true if an adapter needs ioport resources
772 **/
773static int e1000_is_need_ioport(struct pci_dev *pdev)
774{
775 switch (pdev->device) {
776 case E1000_DEV_ID_82540EM:
777 case E1000_DEV_ID_82540EM_LOM:
778 case E1000_DEV_ID_82540EP:
779 case E1000_DEV_ID_82540EP_LOM:
780 case E1000_DEV_ID_82540EP_LP:
781 case E1000_DEV_ID_82541EI:
782 case E1000_DEV_ID_82541EI_MOBILE:
783 case E1000_DEV_ID_82541ER:
784 case E1000_DEV_ID_82541ER_LOM:
785 case E1000_DEV_ID_82541GI:
786 case E1000_DEV_ID_82541GI_LF:
787 case E1000_DEV_ID_82541GI_MOBILE:
788 case E1000_DEV_ID_82544EI_COPPER:
789 case E1000_DEV_ID_82544EI_FIBER:
790 case E1000_DEV_ID_82544GC_COPPER:
791 case E1000_DEV_ID_82544GC_LOM:
792 case E1000_DEV_ID_82545EM_COPPER:
793 case E1000_DEV_ID_82545EM_FIBER:
794 case E1000_DEV_ID_82546EB_COPPER:
795 case E1000_DEV_ID_82546EB_FIBER:
796 case E1000_DEV_ID_82546EB_QUAD_COPPER:
797 return true;
798 default:
799 return false;
800 }
801}
802
c8f44aff
MM		 803static netdev_features_t e1000_fix_features(struct net_device *netdev,
804 netdev_features_t features)
5622e404 805{
6cfbd97b
JK		 806 /* Since there is no support for separate Rx/Tx vlan accel
807 * enable/disable make sure Tx flag is always in same state as Rx.
5622e404 808 */
f646968f
PM		 809 if (features & NETIF_F_HW_VLAN_CTAG_RX)
810 features |= NETIF_F_HW_VLAN_CTAG_TX;
5622e404 811 else
f646968f 812 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
5622e404
JP		 813
814 return features;
815}
816
c8f44aff
MM		 817static int e1000_set_features(struct net_device *netdev,
818 netdev_features_t features)
e97d3207
MM		 819{
820 struct e1000_adapter *adapter = netdev_priv(netdev);
c8f44aff 821 netdev_features_t changed = features ^ netdev->features;
e97d3207 822
f646968f 823 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
5622e404
JP		 824 e1000_vlan_mode(netdev, features);
825
e825b731 826 if (!(changed & (NETIF_F_RXCSUM | NETIF_F_RXALL)))
e97d3207
MM		 827 return 0;
828
e825b731 829 netdev->features = features;
e97d3207
MM		 830 adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
831
832 if (netif_running(netdev))
833 e1000_reinit_locked(adapter);
834 else
835 e1000_reset(adapter);
836
837 return 0;
838}
839
0e7614bc
SH		 840static const struct net_device_ops e1000_netdev_ops = {
841 .ndo_open = e1000_open,
842 .ndo_stop = e1000_close,
00829823 843 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 844 .ndo_get_stats = e1000_get_stats,
845 .ndo_set_rx_mode = e1000_set_rx_mode,
846 .ndo_set_mac_address = e1000_set_mac,
5622e404 847 .ndo_tx_timeout = e1000_tx_timeout,
0e7614bc
SH		 848 .ndo_change_mtu = e1000_change_mtu,
849 .ndo_do_ioctl = e1000_ioctl,
850 .ndo_validate_addr = eth_validate_addr,
0e7614bc
SH		 851 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
852 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
853#ifdef CONFIG_NET_POLL_CONTROLLER
854 .ndo_poll_controller = e1000_netpoll,
855#endif
5622e404
JP		 856 .ndo_fix_features = e1000_fix_features,
857 .ndo_set_features = e1000_set_features,
0e7614bc
SH		 858};
859
e508be17
JB		 860/**
861 * e1000_init_hw_struct - initialize members of hw struct
862 * @adapter: board private struct
863 * @hw: structure used by e1000_hw.c
864 *
865 * Factors out initialization of the e1000_hw struct to its own function
866 * that can be called very early at init (just after struct allocation).
867 * Fields are initialized based on PCI device information and
868 * OS network device settings (MTU size).
869 * Returns negative error codes if MAC type setup fails.
870 */
871static int e1000_init_hw_struct(struct e1000_adapter *adapter,
872 struct e1000_hw *hw)
873{
874 struct pci_dev *pdev = adapter->pdev;
875
876 /* PCI config space info */
877 hw->vendor_id = pdev->vendor;
878 hw->device_id = pdev->device;
879 hw->subsystem_vendor_id = pdev->subsystem_vendor;
880 hw->subsystem_id = pdev->subsystem_device;
881 hw->revision_id = pdev->revision;
882
883 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
884
885 hw->max_frame_size = adapter->netdev->mtu +
886 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
887 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
888
889 /* identify the MAC */
890 if (e1000_set_mac_type(hw)) {
891 e_err(probe, "Unknown MAC Type\n");
892 return -EIO;
893 }
894
895 switch (hw->mac_type) {
896 default:
897 break;
898 case e1000_82541:
899 case e1000_82547:
900 case e1000_82541_rev_2:
901 case e1000_82547_rev_2:
902 hw->phy_init_script = 1;
903 break;
904 }
905
906 e1000_set_media_type(hw);
907 e1000_get_bus_info(hw);
908
909 hw->wait_autoneg_complete = false;
910 hw->tbi_compatibility_en = true;
911 hw->adaptive_ifs = true;
912
913 /* Copper options */
914
915 if (hw->media_type == e1000_media_type_copper) {
916 hw->mdix = AUTO_ALL_MODES;
917 hw->disable_polarity_correction = false;
918 hw->master_slave = E1000_MASTER_SLAVE;
919 }
920
921 return 0;
922}
923
1da177e4
LT		 924/**
925 * e1000_probe - Device Initialization Routine
926 * @pdev: PCI device information struct
927 * @ent: entry in e1000_pci_tbl
928 *
929 * Returns 0 on success, negative on failure
930 *
931 * e1000_probe initializes an adapter identified by a pci_dev structure.
932 * The OS initialization, configuring of the adapter private structure,
933 * and a hardware reset occur.
934 **/
1dd06ae8 935static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4
LT		 936{
937 struct net_device *netdev;
938 struct e1000_adapter *adapter;
1dc32918 939 struct e1000_hw *hw;
2d7edb92 940
1da177e4 941 static int cards_found = 0;
120cd576 942 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 943 int i, err, pci_using_dac;
406874a7 944 u16 eeprom_data = 0;
5377a416 945 u16 tmp = 0;
406874a7 946 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 947 int bars, need_ioport;
0795af57 948
81250297
TI		 949 /* do not allocate ioport bars when not needed */
950 need_ioport = e1000_is_need_ioport(pdev);
951 if (need_ioport) {
952 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
953 err = pci_enable_device(pdev);
954 } else {
955 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 956 err = pci_enable_device_mem(pdev);
81250297 957 }
c7be73bc 958 if (err)
1da177e4
LT		 959 return err;
960
81250297 961 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 962 if (err)
6dd62ab0 963 goto err_pci_reg;
1da177e4
LT		 964
965 pci_set_master(pdev);
dbb5aaeb
NN		 966 err = pci_save_state(pdev);
967 if (err)
968 goto err_alloc_etherdev;
1da177e4 969
6dd62ab0 970 err = -ENOMEM;
1da177e4 971 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 972 if (!netdev)
1da177e4 973 goto err_alloc_etherdev;
1da177e4 974
1da177e4
LT		 975 SET_NETDEV_DEV(netdev, &pdev->dev);
976
977 pci_set_drvdata(pdev, netdev);
60490fe0 978 adapter = netdev_priv(netdev);
1da177e4
LT		 979 adapter->netdev = netdev;
980 adapter->pdev = pdev;
b3f4d599 981 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
81250297
TI		 982 adapter->bars = bars;
983 adapter->need_ioport = need_ioport;
1da177e4 984
1dc32918
JP		 985 hw = &adapter->hw;
986 hw->back = adapter;
987
6dd62ab0 988 err = -EIO;
275f165f 989 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 990 if (!hw->hw_addr)
1da177e4 991 goto err_ioremap;
1da177e4 992
81250297
TI		 993 if (adapter->need_ioport) {
994 for (i = BAR_1; i <= BAR_5; i++) {
995 if (pci_resource_len(pdev, i) == 0)
996 continue;
997 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
998 hw->io_base = pci_resource_start(pdev, i);
999 break;
1000 }
1da177e4
LT		 1001 }
1002 }
1003
e508be17
JB		 1004 /* make ready for any if (hw->...) below */
1005 err = e1000_init_hw_struct(adapter, hw);
1006 if (err)
1007 goto err_sw_init;
1008
6cfbd97b 1009 /* there is a workaround being applied below that limits
e508be17
JB		 1010 * 64-bit DMA addresses to 64-bit hardware. There are some
1011 * 32-bit adapters that Tx hang when given 64-bit DMA addresses
1012 */
1013 pci_using_dac = 0;
1014 if ((hw->bus_type == e1000_bus_type_pcix) &&
9931a26e 1015 !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
e508be17 1016 pci_using_dac = 1;
e508be17 1017 } else {
9931a26e 1018 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
19a0b67a
DN		 1019 if (err) {
1020 pr_err("No usable DMA config, aborting\n");
1021 goto err_dma;
1022 }
e508be17
JB		 1023 }
1024
0e7614bc 1025 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1026 e1000_set_ethtool_ops(netdev);
1da177e4 1027 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1028 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1029
0eb5a34c 1030 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1031
1da177e4
LT		 1032 adapter->bd_number = cards_found;
1033
1034 /* setup the private structure */
1035
c7be73bc
JP		 1036 err = e1000_sw_init(adapter);
1037 if (err)
1da177e4
LT		 1038 goto err_sw_init;
1039
6dd62ab0 1040 err = -EIO;
5377a416 1041 if (hw->mac_type == e1000_ce4100) {
13acde8f
FF		 1042 hw->ce4100_gbe_mdio_base_virt =
1043 ioremap(pci_resource_start(pdev, BAR_1),
5377a416
DB		 1044 pci_resource_len(pdev, BAR_1));
1045
13acde8f 1046 if (!hw->ce4100_gbe_mdio_base_virt)
5377a416
DB		 1047 goto err_mdio_ioremap;
1048 }
2d7edb92 1049
1dc32918 1050 if (hw->mac_type >= e1000_82543) {
e97d3207 1051 netdev->hw_features = NETIF_F_SG |
5622e404 1052 NETIF_F_HW_CSUM |
f646968f
PM		 1053 NETIF_F_HW_VLAN_CTAG_RX;
1054 netdev->features = NETIF_F_HW_VLAN_CTAG_TX |
1055 NETIF_F_HW_VLAN_CTAG_FILTER;
1da177e4
LT		 1056 }
1057
1dc32918
JP		 1058 if ((hw->mac_type >= e1000_82544) &&
1059 (hw->mac_type != e1000_82547))
e97d3207
MM		 1060 netdev->hw_features |= NETIF_F_TSO;
1061
11a78dcf
BG		 1062 netdev->priv_flags |= IFF_SUPP_NOFCS;
1063
e97d3207 1064 netdev->features |= netdev->hw_features;
7500673b
TD		 1065 netdev->hw_features |= (NETIF_F_RXCSUM |
1066 NETIF_F_RXALL |
1067 NETIF_F_RXFCS);
2d7edb92 1068
7b872a55 1069 if (pci_using_dac) {
1da177e4 1070 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 1071 netdev->vlan_features |= NETIF_F_HIGHDMA;
1072 }
1da177e4 1073
7500673b
TD		 1074 netdev->vlan_features |= (NETIF_F_TSO |
1075 NETIF_F_HW_CSUM |
1076 NETIF_F_SG);
20501a69 1077
01789349
JP		 1078 netdev->priv_flags |= IFF_UNICAST_FLT;
1079
1dc32918 1080 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1081
cd94dd0b 1082 /* initialize eeprom parameters */
1dc32918 1083 if (e1000_init_eeprom_params(hw)) {
feb8f478 1084 e_err(probe, "EEPROM initialization failed\n");
6dd62ab0 1085 goto err_eeprom;
cd94dd0b
AK		 1086 }
1087
96838a40 1088 /* before reading the EEPROM, reset the controller to
6cfbd97b
JK		 1089 * put the device in a known good starting state
1090 */
96838a40 1091
1dc32918 1092 e1000_reset_hw(hw);
1da177e4
LT		 1093
1094 /* make sure the EEPROM is good */
1dc32918 1095 if (e1000_validate_eeprom_checksum(hw) < 0) {
feb8f478 1096 e_err(probe, "The EEPROM Checksum Is Not Valid\n");
67b3c27c 1097 e1000_dump_eeprom(adapter);
6cfbd97b 1098 /* set MAC address to all zeroes to invalidate and temporary
67b3c27c
AK		 1099 * disable this device for the user. This blocks regular
1100 * traffic while still permitting ethtool ioctls from reaching
1101 * the hardware as well as allowing the user to run the
1102 * interface after manually setting a hw addr using
1103 * `ip set address`
1104 */
1dc32918 1105 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1106 } else {
1107 /* copy the MAC address out of the EEPROM */
1dc32918 1108 if (e1000_read_mac_addr(hw))
feb8f478 1109 e_err(probe, "EEPROM Read Error\n");
1da177e4 1110 }
67b3c27c 1111 /* don't block initalization here due to bad MAC address */
1dc32918 1112 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1113
aaeb6cdf 1114 if (!is_valid_ether_addr(netdev->dev_addr))
feb8f478 1115 e_err(probe, "Invalid MAC Address\n");
1da177e4 1116
1da177e4 1117
a4010afe
JB		 1118 INIT_DELAYED_WORK(&adapter->watchdog_task, e1000_watchdog);
1119 INIT_DELAYED_WORK(&adapter->fifo_stall_task,
1120 e1000_82547_tx_fifo_stall_task);
1121 INIT_DELAYED_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
65f27f38 1122 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1123
1da177e4
LT		 1124 e1000_check_options(adapter);
1125
1126 /* Initial Wake on LAN setting
1127 * If APM wake is enabled in the EEPROM,
1128 * enable the ACPI Magic Packet filter
1129 */
1130
1dc32918 1131 switch (hw->mac_type) {
1da177e4
LT		 1132 case e1000_82542_rev2_0:
1133 case e1000_82542_rev2_1:
1134 case e1000_82543:
1135 break;
1136 case e1000_82544:
1dc32918 1137 e1000_read_eeprom(hw,
1da177e4
LT		 1138 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1139 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1140 break;
1141 case e1000_82546:
1142 case e1000_82546_rev_3:
1dc32918
JP		 1143 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1144 e1000_read_eeprom(hw,
1da177e4
LT		 1145 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1146 break;
1147 }
1148 /* Fall Through */
1149 default:
1dc32918 1150 e1000_read_eeprom(hw,
1da177e4
LT		 1151 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1152 break;
1153 }
96838a40 1154 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1155 adapter->eeprom_wol |= E1000_WUFC_MAG;
1156
1157 /* now that we have the eeprom settings, apply the special cases
1158 * where the eeprom may be wrong or the board simply won't support
6cfbd97b
JK		 1159 * wake on lan on a particular port
1160 */
120cd576
JB		 1161 switch (pdev->device) {
1162 case E1000_DEV_ID_82546GB_PCIE:
1163 adapter->eeprom_wol = 0;
1164 break;
1165 case E1000_DEV_ID_82546EB_FIBER:
1166 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1167 /* Wake events only supported on port A for dual fiber
6cfbd97b
JK		 1168 * regardless of eeprom setting
1169 */
1dc32918 1170 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1171 adapter->eeprom_wol = 0;
1172 break;
1173 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1174 /* if quad port adapter, disable WoL on all but port A */
1175 if (global_quad_port_a != 0)
1176 adapter->eeprom_wol = 0;
1177 else
3db1cd5c 1178 adapter->quad_port_a = true;
120cd576
JB		 1179 /* Reset for multiple quad port adapters */
1180 if (++global_quad_port_a == 4)
1181 global_quad_port_a = 0;
1182 break;
1183 }
1184
1185 /* initialize the wol settings based on the eeprom settings */
1186 adapter->wol = adapter->eeprom_wol;
de126489 1187 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1188
5377a416
DB		 1189 /* Auto detect PHY address */
1190 if (hw->mac_type == e1000_ce4100) {
1191 for (i = 0; i < 32; i++) {
1192 hw->phy_addr = i;
1193 e1000_read_phy_reg(hw, PHY_ID2, &tmp);
1194 if (tmp == 0 || tmp == 0xFF) {
1195 if (i == 31)
1196 goto err_eeprom;
1197 continue;
1198 } else
1199 break;
1200 }
1201 }
1202
675ad473
ET		 1203 /* reset the hardware with the new settings */
1204 e1000_reset(adapter);
1205
1206 strcpy(netdev->name, "eth%d");
1207 err = register_netdev(netdev);
1208 if (err)
1209 goto err_register;
1210
52f5509f 1211 e1000_vlan_filter_on_off(adapter, false);
5622e404 1212
fb3d47d4 1213 /* print bus type/speed/width info */
feb8f478 1214 e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
7837e58c
JP		 1215 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1216 ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
1217 (hw->bus_speed == e1000_bus_speed_120) ? 120 :
1218 (hw->bus_speed == e1000_bus_speed_100) ? 100 :
1219 (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
1220 ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
1221 netdev->dev_addr);
1314bbf3 1222
eb62efd2
JB		 1223 /* carrier off reporting is important to ethtool even BEFORE open */
1224 netif_carrier_off(netdev);
1225
feb8f478 1226 e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
1da177e4
LT		 1227
1228 cards_found++;
1229 return 0;
1230
1231err_register:
6dd62ab0 1232err_eeprom:
1532ecea 1233 e1000_phy_hw_reset(hw);
6dd62ab0 1234
1dc32918
JP		 1235 if (hw->flash_address)
1236 iounmap(hw->flash_address);
6dd62ab0
VA		 1237 kfree(adapter->tx_ring);
1238 kfree(adapter->rx_ring);
e508be17 1239err_dma:
1da177e4 1240err_sw_init:
5377a416 1241err_mdio_ioremap:
13acde8f 1242 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918 1243 iounmap(hw->hw_addr);
1da177e4
LT		 1244err_ioremap:
1245 free_netdev(netdev);
1246err_alloc_etherdev:
81250297 1247 pci_release_selected_regions(pdev, bars);
6dd62ab0 1248err_pci_reg:
6dd62ab0 1249 pci_disable_device(pdev);
1da177e4
LT		 1250 return err;
1251}
1252
1253/**
1254 * e1000_remove - Device Removal Routine
1255 * @pdev: PCI device information struct
1256 *
1257 * e1000_remove is called by the PCI subsystem to alert the driver
1258 * that it should release a PCI device. The could be caused by a
1259 * Hot-Plug event, or because the driver is going to be removed from
1260 * memory.
1261 **/
9f9a12f8 1262static void e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1263{
1264 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1265 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1266 struct e1000_hw *hw = &adapter->hw;
1da177e4 1267
a4010afe 1268 e1000_down_and_stop(adapter);
0fccd0e9 1269 e1000_release_manageability(adapter);
1da177e4 1270
bea3348e
SH		 1271 unregister_netdev(netdev);
1272
1532ecea 1273 e1000_phy_hw_reset(hw);
1da177e4 1274
24025e4e
MC		 1275 kfree(adapter->tx_ring);
1276 kfree(adapter->rx_ring);
24025e4e 1277
1c26750c 1278 if (hw->mac_type == e1000_ce4100)
13acde8f 1279 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918
JP		 1280 iounmap(hw->hw_addr);
1281 if (hw->flash_address)
1282 iounmap(hw->flash_address);
81250297 1283 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1284
1285 free_netdev(netdev);
1286
1287 pci_disable_device(pdev);
1288}
1289
1290/**
1291 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1292 * @adapter: board private structure to initialize
1293 *
1294 * e1000_sw_init initializes the Adapter private data structure.
e508be17 1295 * e1000_init_hw_struct MUST be called before this function
1da177e4 1296 **/
9f9a12f8 1297static int e1000_sw_init(struct e1000_adapter *adapter)
1da177e4 1298{
eb0f8054 1299 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4 1300
f56799ea
JK		 1301 adapter->num_tx_queues = 1;
1302 adapter->num_rx_queues = 1;
581d708e
MC		 1303
1304 if (e1000_alloc_queues(adapter)) {
feb8f478 1305 e_err(probe, "Unable to allocate memory for queues\n");
581d708e
MC		 1306 return -ENOMEM;
1307 }
1308
47313054 1309 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1310 e1000_irq_disable(adapter);
1311
1da177e4 1312 spin_lock_init(&adapter->stats_lock);
1da177e4 1313
1314bbf3
AK		 1314 set_bit(__E1000_DOWN, &adapter->flags);
1315
1da177e4
LT		 1316 return 0;
1317}
1318
581d708e
MC		 1319/**
1320 * e1000_alloc_queues - Allocate memory for all rings
1321 * @adapter: board private structure to initialize
1322 *
1323 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1324 * number of queues at compile-time.
581d708e 1325 **/
9f9a12f8 1326static int e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1327{
1c7e5b12
YB		 1328 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1329 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1330 if (!adapter->tx_ring)
1331 return -ENOMEM;
581d708e 1332
1c7e5b12
YB		 1333 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1334 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1335 if (!adapter->rx_ring) {
1336 kfree(adapter->tx_ring);
1337 return -ENOMEM;
1338 }
581d708e 1339
581d708e
MC		 1340 return E1000_SUCCESS;
1341}
1342
1da177e4
LT		 1343/**
1344 * e1000_open - Called when a network interface is made active
1345 * @netdev: network interface device structure
1346 *
1347 * Returns 0 on success, negative value on failure
1348 *
1349 * The open entry point is called when a network interface is made
1350 * active by the system (IFF_UP). At this point all resources needed
1351 * for transmit and receive operations are allocated, the interrupt
a4010afe 1352 * handler is registered with the OS, the watchdog task is started,
1da177e4
LT		 1353 * and the stack is notified that the interface is ready.
1354 **/
64798845 1355static int e1000_open(struct net_device *netdev)
1da177e4 1356{
60490fe0 1357 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1358 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1359 int err;
1360
2db10a08 1361 /* disallow open during test */
1314bbf3 1362 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1363 return -EBUSY;
1364
eb62efd2
JB		 1365 netif_carrier_off(netdev);
1366
1da177e4 1367 /* allocate transmit descriptors */
e0aac5a2
AK		 1368 err = e1000_setup_all_tx_resources(adapter);
1369 if (err)
1da177e4
LT		 1370 goto err_setup_tx;
1371
1372 /* allocate receive descriptors */
e0aac5a2 1373 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1374 if (err)
e0aac5a2 1375 goto err_setup_rx;
b5bf28cd 1376
79f05bf0
AK		 1377 e1000_power_up_phy(adapter);
1378
2d7edb92 1379 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1380 if ((hw->mng_cookie.status &
2d7edb92
MC		 1381 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1382 e1000_update_mng_vlan(adapter);
1383 }
1da177e4 1384
e0aac5a2
AK		 1385 /* before we allocate an interrupt, we must be ready to handle it.
1386 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1387 * as soon as we call pci_request_irq, so we have to setup our
6cfbd97b
JK		 1388 * clean_rx handler before we do so.
1389 */
e0aac5a2
AK		 1390 e1000_configure(adapter);
1391
1392 err = e1000_request_irq(adapter);
1393 if (err)
1394 goto err_req_irq;
1395
1396 /* From here on the code is the same as e1000_up() */
1397 clear_bit(__E1000_DOWN, &adapter->flags);
1398
bea3348e 1399 napi_enable(&adapter->napi);
47313054 1400
e0aac5a2
AK		 1401 e1000_irq_enable(adapter);
1402
076152d5
BH		 1403 netif_start_queue(netdev);
1404
e0aac5a2 1405 /* fire a link status change interrupt to start the watchdog */
1dc32918 1406 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1407
1da177e4
LT		 1408 return E1000_SUCCESS;
1409
b5bf28cd 1410err_req_irq:
e0aac5a2 1411 e1000_power_down_phy(adapter);
581d708e 1412 e1000_free_all_rx_resources(adapter);
1da177e4 1413err_setup_rx:
581d708e 1414 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1415err_setup_tx:
1416 e1000_reset(adapter);
1417
1418 return err;
1419}
1420
1421/**
1422 * e1000_close - Disables a network interface
1423 * @netdev: network interface device structure
1424 *
1425 * Returns 0, this is not allowed to fail
1426 *
1427 * The close entry point is called when an interface is de-activated
1428 * by the OS. The hardware is still under the drivers control, but
1429 * needs to be disabled. A global MAC reset is issued to stop the
1430 * hardware, and all transmit and receive resources are freed.
1431 **/
64798845 1432static int e1000_close(struct net_device *netdev)
1da177e4 1433{
60490fe0 1434 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1435 struct e1000_hw *hw = &adapter->hw;
6a7d64e3 1436 int count = E1000_CHECK_RESET_COUNT;
1437
1438 while (test_bit(__E1000_RESETTING, &adapter->flags) && count--)
1439 usleep_range(10000, 20000);
1da177e4 1440
2db10a08 1441 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1442 e1000_down(adapter);
79f05bf0 1443 e1000_power_down_phy(adapter);
2db10a08 1444 e1000_free_irq(adapter);
1da177e4 1445
581d708e
MC		 1446 e1000_free_all_tx_resources(adapter);
1447 e1000_free_all_rx_resources(adapter);
1da177e4 1448
4666560a 1449 /* kill manageability vlan ID if supported, but not if a vlan with
6cfbd97b
JK		 1450 * the same ID is registered on the host OS (let 8021q kill it)
1451 */
1dc32918 1452 if ((hw->mng_cookie.status &
6cfbd97b
JK		 1453 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1454 !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
80d5c368
PM		 1455 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
1456 adapter->mng_vlan_id);
2d7edb92 1457 }
b55ccb35 1458
1da177e4
LT		 1459 return 0;
1460}
1461
1462/**
1463 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1464 * @adapter: address of board private structure
2d7edb92
MC		 1465 * @start: address of beginning of memory
1466 * @len: length of memory
1da177e4 1467 **/
64798845
JP		 1468static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1469 unsigned long len)
1da177e4 1470{
1dc32918 1471 struct e1000_hw *hw = &adapter->hw;
e982f17c 1472 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1473 unsigned long end = begin + len;
1474
2648345f 1475 /* First rev 82545 and 82546 need to not allow any memory
6cfbd97b
JK		 1476 * write location to cross 64k boundary due to errata 23
1477 */
1dc32918 1478 if (hw->mac_type == e1000_82545 ||
5377a416 1479 hw->mac_type == e1000_ce4100 ||
1dc32918 1480 hw->mac_type == e1000_82546) {
c3033b01 1481 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1482 }
1483
c3033b01 1484 return true;
1da177e4
LT		 1485}
1486
1487/**
1488 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1489 * @adapter: board private structure
581d708e 1490 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1491 *
1492 * Return 0 on success, negative on failure
1493 **/
64798845
JP		 1494static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1495 struct e1000_tx_ring *txdr)
1da177e4 1496{
1da177e4
LT		 1497 struct pci_dev *pdev = adapter->pdev;
1498 int size;
1499
1500 size = sizeof(struct e1000_buffer) * txdr->count;
89bf67f1 1501 txdr->buffer_info = vzalloc(size);
14f8dc49 1502 if (!txdr->buffer_info)
1da177e4 1503 return -ENOMEM;
1da177e4
LT		 1504
1505 /* round up to nearest 4K */
1506
1507 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1508 txdr->size = ALIGN(txdr->size, 4096);
1da177e4 1509
b16f53be
NN		 1510 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1511 GFP_KERNEL);
96838a40 1512 if (!txdr->desc) {
1da177e4 1513setup_tx_desc_die:
1da177e4
LT		 1514 vfree(txdr->buffer_info);
1515 return -ENOMEM;
1516 }
1517
2648345f 1518 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1519 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1520 void *olddesc = txdr->desc;
1521 dma_addr_t olddma = txdr->dma;
feb8f478 1522 e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
675ad473 1523 txdr->size, txdr->desc);
2648345f 1524 /* Try again, without freeing the previous */
b16f53be
NN		 1525 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
1526 &txdr->dma, GFP_KERNEL);
2648345f 1527 /* Failed allocation, critical failure */
96838a40 1528 if (!txdr->desc) {
b16f53be
NN		 1529 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1530 olddma);
1da177e4
LT		 1531 goto setup_tx_desc_die;
1532 }
1533
1534 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1535 /* give up */
b16f53be
NN		 1536 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1537 txdr->dma);
1538 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1539 olddma);
feb8f478 1540 e_err(probe, "Unable to allocate aligned memory "
675ad473 1541 "for the transmit descriptor ring\n");
1da177e4
LT		 1542 vfree(txdr->buffer_info);
1543 return -ENOMEM;
1544 } else {
2648345f 1545 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1546 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1547 olddma);
1da177e4
LT		 1548 }
1549 }
1550 memset(txdr->desc, 0, txdr->size);
1551
1552 txdr->next_to_use = 0;
1553 txdr->next_to_clean = 0;
1554
1555 return 0;
1556}
1557
581d708e
MC		 1558/**
1559 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1560 * (Descriptors) for all queues
1561 * @adapter: board private structure
1562 *
581d708e
MC		 1563 * Return 0 on success, negative on failure
1564 **/
64798845 1565int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1566{
1567 int i, err = 0;
1568
f56799ea 1569 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1570 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1571 if (err) {
feb8f478 1572 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1573 for (i-- ; i >= 0; i--)
1574 e1000_free_tx_resources(adapter,
1575 &adapter->tx_ring[i]);
581d708e
MC		 1576 break;
1577 }
1578 }
1579
1580 return err;
1581}
1582
1da177e4
LT		 1583/**
1584 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1585 * @adapter: board private structure
1586 *
1587 * Configure the Tx unit of the MAC after a reset.
1588 **/
64798845 1589static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1590{
406874a7 1591 u64 tdba;
581d708e 1592 struct e1000_hw *hw = &adapter->hw;
1532ecea 1593 u32 tdlen, tctl, tipg;
406874a7 1594 u32 ipgr1, ipgr2;
1da177e4
LT		 1595
1596 /* Setup the HW Tx Head and Tail descriptor pointers */
1597
f56799ea 1598 switch (adapter->num_tx_queues) {
24025e4e
MC		 1599 case 1:
1600 default:
581d708e
MC		 1601 tdba = adapter->tx_ring[0].dma;
1602 tdlen = adapter->tx_ring[0].count *
1603 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1604 ew32(TDLEN, tdlen);
1605 ew32(TDBAH, (tdba >> 32));
1606 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1607 ew32(TDT, 0);
1608 ew32(TDH, 0);
6cfbd97b
JK		 1609 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ?
1610 E1000_TDH : E1000_82542_TDH);
1611 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ?
1612 E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1613 break;
1614 }
1da177e4
LT		 1615
1616 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1617 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1618 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1619 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1620 else
1621 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1622
581d708e 1623 switch (hw->mac_type) {
1da177e4
LT		 1624 case e1000_82542_rev2_0:
1625 case e1000_82542_rev2_1:
1626 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1627 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1628 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1629 break;
1630 default:
0fadb059
JK		 1631 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1632 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1633 break;
1da177e4 1634 }
0fadb059
JK		 1635 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1636 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1637 ew32(TIPG, tipg);
1da177e4
LT		 1638
1639 /* Set the Tx Interrupt Delay register */
1640
1dc32918 1641 ew32(TIDV, adapter->tx_int_delay);
581d708e 1642 if (hw->mac_type >= e1000_82540)
1dc32918 1643 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1644
1645 /* Program the Transmit Control Register */
1646
1dc32918 1647 tctl = er32(TCTL);
1da177e4 1648 tctl &= ~E1000_TCTL_CT;
7e6c9861 1649 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1650 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1651
581d708e 1652 e1000_config_collision_dist(hw);
1da177e4
LT		 1653
1654 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1655 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1656
1657 /* only set IDE if we are delaying interrupts using the timers */
1658 if (adapter->tx_int_delay)
1659 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1660
581d708e 1661 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1662 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1663 else
1664 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1665
1666 /* Cache if we're 82544 running in PCI-X because we'll
6cfbd97b
JK		 1667 * need this to apply a workaround later in the send path.
1668 */
581d708e
MC		 1669 if (hw->mac_type == e1000_82544 &&
1670 hw->bus_type == e1000_bus_type_pcix)
3db1cd5c 1671 adapter->pcix_82544 = true;
7e6c9861 1672
1dc32918 1673 ew32(TCTL, tctl);
7e6c9861 1674
1da177e4
LT		 1675}
1676
1677/**
1678 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1679 * @adapter: board private structure
581d708e 1680 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1681 *
1682 * Returns 0 on success, negative on failure
1683 **/
64798845
JP		 1684static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1685 struct e1000_rx_ring *rxdr)
1da177e4 1686{
1da177e4 1687 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1688 int size, desc_len;
1da177e4
LT		 1689
1690 size = sizeof(struct e1000_buffer) * rxdr->count;
89bf67f1 1691 rxdr->buffer_info = vzalloc(size);
14f8dc49 1692 if (!rxdr->buffer_info)
1da177e4 1693 return -ENOMEM;
1da177e4 1694
1532ecea 1695 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1696
1da177e4
LT		 1697 /* Round up to nearest 4K */
1698
2d7edb92 1699 rxdr->size = rxdr->count * desc_len;
9099cfb9 1700 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4 1701
b16f53be
NN		 1702 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1703 GFP_KERNEL);
581d708e 1704 if (!rxdr->desc) {
1da177e4 1705setup_rx_desc_die:
1da177e4
LT		 1706 vfree(rxdr->buffer_info);
1707 return -ENOMEM;
1708 }
1709
2648345f 1710 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1711 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1712 void *olddesc = rxdr->desc;
1713 dma_addr_t olddma = rxdr->dma;
feb8f478 1714 e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
675ad473 1715 rxdr->size, rxdr->desc);
2648345f 1716 /* Try again, without freeing the previous */
b16f53be
NN		 1717 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
1718 &rxdr->dma, GFP_KERNEL);
2648345f 1719 /* Failed allocation, critical failure */
581d708e 1720 if (!rxdr->desc) {
b16f53be
NN		 1721 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1722 olddma);
1da177e4
LT		 1723 goto setup_rx_desc_die;
1724 }
1725
1726 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1727 /* give up */
b16f53be
NN		 1728 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1729 rxdr->dma);
1730 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1731 olddma);
feb8f478
ET		 1732 e_err(probe, "Unable to allocate aligned memory for "
1733 "the Rx descriptor ring\n");
581d708e 1734 goto setup_rx_desc_die;
1da177e4 1735 } else {
2648345f 1736 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1737 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1738 olddma);
1da177e4
LT		 1739 }
1740 }
1741 memset(rxdr->desc, 0, rxdr->size);
1742
1743 rxdr->next_to_clean = 0;
1744 rxdr->next_to_use = 0;
edbbb3ca 1745 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1746
1747 return 0;
1748}
1749
581d708e
MC		 1750/**
1751 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1752 * (Descriptors) for all queues
1753 * @adapter: board private structure
1754 *
581d708e
MC		 1755 * Return 0 on success, negative on failure
1756 **/
64798845 1757int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1758{
1759 int i, err = 0;
1760
f56799ea 1761 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1762 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1763 if (err) {
feb8f478 1764 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1765 for (i-- ; i >= 0; i--)
1766 e1000_free_rx_resources(adapter,
1767 &adapter->rx_ring[i]);
581d708e
MC		 1768 break;
1769 }
1770 }
1771
1772 return err;
1773}
1774
1da177e4 1775/**
2648345f 1776 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1777 * @adapter: Board private structure
1778 **/
64798845 1779static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1780{
1dc32918 1781 struct e1000_hw *hw = &adapter->hw;
630b25cd 1782 u32 rctl;
1da177e4 1783
1dc32918 1784 rctl = er32(RCTL);
1da177e4
LT		 1785
1786 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1787
d5bc77a2
DN		 1788 rctl |= E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
1789 E1000_RCTL_RDMTS_HALF |
1dc32918 1790 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1791
1dc32918 1792 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1793 rctl |= E1000_RCTL_SBP;
1794 else
1795 rctl &= ~E1000_RCTL_SBP;
1796
2d7edb92
MC		 1797 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1798 rctl &= ~E1000_RCTL_LPE;
1799 else
1800 rctl |= E1000_RCTL_LPE;
1801
1da177e4 1802 /* Setup buffer sizes */
9e2feace
AK		 1803 rctl &= ~E1000_RCTL_SZ_4096;
1804 rctl |= E1000_RCTL_BSEX;
1805 switch (adapter->rx_buffer_len) {
a1415ee6
JK		 1806 case E1000_RXBUFFER_2048:
1807 default:
1808 rctl |= E1000_RCTL_SZ_2048;
1809 rctl &= ~E1000_RCTL_BSEX;
1810 break;
1811 case E1000_RXBUFFER_4096:
1812 rctl |= E1000_RCTL_SZ_4096;
1813 break;
1814 case E1000_RXBUFFER_8192:
1815 rctl |= E1000_RCTL_SZ_8192;
1816 break;
1817 case E1000_RXBUFFER_16384:
1818 rctl |= E1000_RCTL_SZ_16384;
1819 break;
2d7edb92
MC		 1820 }
1821
e825b731
BG		 1822 /* This is useful for sniffing bad packets. */
1823 if (adapter->netdev->features & NETIF_F_RXALL) {
1824 /* UPE and MPE will be handled by normal PROMISC logic
6cfbd97b
JK		 1825 * in e1000e_set_rx_mode
1826 */
e825b731
BG		 1827 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
1828 E1000_RCTL_BAM | /* RX All Bcast Pkts */
1829 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
1830
1831 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
1832 E1000_RCTL_DPF | /* Allow filtered pause */
1833 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
1834 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
1835 * and that breaks VLANs.
1836 */
1837 }
1838
1dc32918 1839 ew32(RCTL, rctl);
1da177e4
LT		 1840}
1841
1842/**
1843 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1844 * @adapter: board private structure
1845 *
1846 * Configure the Rx unit of the MAC after a reset.
1847 **/
64798845 1848static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1849{
406874a7 1850 u64 rdba;
581d708e 1851 struct e1000_hw *hw = &adapter->hw;
1532ecea 1852 u32 rdlen, rctl, rxcsum;
2d7edb92 1853
edbbb3ca
JB		 1854 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1855 rdlen = adapter->rx_ring[0].count *
1856 sizeof(struct e1000_rx_desc);
1857 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1858 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1859 } else {
1860 rdlen = adapter->rx_ring[0].count *
1861 sizeof(struct e1000_rx_desc);
1862 adapter->clean_rx = e1000_clean_rx_irq;
1863 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1864 }
1da177e4
LT		 1865
1866 /* disable receives while setting up the descriptors */
1dc32918
JP		 1867 rctl = er32(RCTL);
1868 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1869
1870 /* set the Receive Delay Timer Register */
1dc32918 1871 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1872
581d708e 1873 if (hw->mac_type >= e1000_82540) {
1dc32918 1874 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1875 if (adapter->itr_setting != 0)
1dc32918 1876 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1877 }
1878
581d708e 1879 /* Setup the HW Rx Head and Tail Descriptor Pointers and
6cfbd97b
JK		 1880 * the Base and Length of the Rx Descriptor Ring
1881 */
f56799ea 1882 switch (adapter->num_rx_queues) {
24025e4e
MC		 1883 case 1:
1884 default:
581d708e 1885 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1886 ew32(RDLEN, rdlen);
1887 ew32(RDBAH, (rdba >> 32));
1888 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1889 ew32(RDT, 0);
1890 ew32(RDH, 0);
6cfbd97b
JK		 1891 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ?
1892 E1000_RDH : E1000_82542_RDH);
1893 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ?
1894 E1000_RDT : E1000_82542_RDT);
581d708e 1895 break;
24025e4e
MC		 1896 }
1897
1da177e4 1898 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1899 if (hw->mac_type >= e1000_82543) {
1dc32918 1900 rxcsum = er32(RXCSUM);
630b25cd 1901 if (adapter->rx_csum)
2d7edb92 1902 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1903 else
2d7edb92 1904 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1905 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1906 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1907 }
1908
1909 /* Enable Receives */
d5bc77a2 1910 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4
LT		 1911}
1912
1913/**
581d708e 1914 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1915 * @adapter: board private structure
581d708e 1916 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1917 *
1918 * Free all transmit software resources
1919 **/
64798845
JP		 1920static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1921 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1922{
1923 struct pci_dev *pdev = adapter->pdev;
1924
581d708e 1925 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1926
581d708e
MC		 1927 vfree(tx_ring->buffer_info);
1928 tx_ring->buffer_info = NULL;
1da177e4 1929
b16f53be
NN		 1930 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1931 tx_ring->dma);
1da177e4 1932
581d708e
MC		 1933 tx_ring->desc = NULL;
1934}
1935
1936/**
1937 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1938 * @adapter: board private structure
1939 *
1940 * Free all transmit software resources
1941 **/
64798845 1942void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1943{
1944 int i;
1945
f56799ea 1946 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1947 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1948}
1949
64798845
JP		 1950static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1951 struct e1000_buffer *buffer_info)
1da177e4 1952{
602c0554
AD		 1953 if (buffer_info->dma) {
1954 if (buffer_info->mapped_as_page)
b16f53be
NN		 1955 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1956 buffer_info->length, DMA_TO_DEVICE);
602c0554 1957 else
b16f53be 1958 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
602c0554 1959 buffer_info->length,
b16f53be 1960 DMA_TO_DEVICE);
602c0554
AD		 1961 buffer_info->dma = 0;
1962 }
a9ebadd6 1963 if (buffer_info->skb) {
1da177e4 1964 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1965 buffer_info->skb = NULL;
1966 }
37e73df8 1967 buffer_info->time_stamp = 0;
a9ebadd6 1968 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1969}
1970
1971/**
1972 * e1000_clean_tx_ring - Free Tx Buffers
1973 * @adapter: board private structure
581d708e 1974 * @tx_ring: ring to be cleaned
1da177e4 1975 **/
64798845
JP		 1976static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1977 struct e1000_tx_ring *tx_ring)
1da177e4 1978{
1dc32918 1979 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1980 struct e1000_buffer *buffer_info;
1981 unsigned long size;
1982 unsigned int i;
1983
1984 /* Free all the Tx ring sk_buffs */
1985
96838a40 1986 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1987 buffer_info = &tx_ring->buffer_info[i];
1988 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1989 }
1990
2f66fd36 1991 netdev_reset_queue(adapter->netdev);
1da177e4
LT		 1992 size = sizeof(struct e1000_buffer) * tx_ring->count;
1993 memset(tx_ring->buffer_info, 0, size);
1994
1995 /* Zero out the descriptor ring */
1996
1997 memset(tx_ring->desc, 0, tx_ring->size);
1998
1999 tx_ring->next_to_use = 0;
2000 tx_ring->next_to_clean = 0;
3db1cd5c 2001 tx_ring->last_tx_tso = false;
1da177e4 2002
1dc32918
JP		 2003 writel(0, hw->hw_addr + tx_ring->tdh);
2004 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2005}
2006
2007/**
2008 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2009 * @adapter: board private structure
2010 **/
64798845 2011static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2012{
2013 int i;
2014
f56799ea 2015 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2016 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2017}
2018
2019/**
2020 * e1000_free_rx_resources - Free Rx Resources
2021 * @adapter: board private structure
581d708e 2022 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2023 *
2024 * Free all receive software resources
2025 **/
64798845
JP		 2026static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2027 struct e1000_rx_ring *rx_ring)
1da177e4 2028{
1da177e4
LT		 2029 struct pci_dev *pdev = adapter->pdev;
2030
581d708e 2031 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2032
2033 vfree(rx_ring->buffer_info);
2034 rx_ring->buffer_info = NULL;
2035
b16f53be
NN		 2036 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2037 rx_ring->dma);
1da177e4
LT		 2038
2039 rx_ring->desc = NULL;
2040}
2041
2042/**
581d708e 2043 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2044 * @adapter: board private structure
581d708e
MC		 2045 *
2046 * Free all receive software resources
2047 **/
64798845 2048void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2049{
2050 int i;
2051
f56799ea 2052 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2053 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2054}
2055
2056/**
2057 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2058 * @adapter: board private structure
2059 * @rx_ring: ring to free buffers from
1da177e4 2060 **/
64798845
JP		 2061static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2062 struct e1000_rx_ring *rx_ring)
1da177e4 2063{
1dc32918 2064 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2065 struct e1000_buffer *buffer_info;
2066 struct pci_dev *pdev = adapter->pdev;
2067 unsigned long size;
630b25cd 2068 unsigned int i;
1da177e4
LT		 2069
2070 /* Free all the Rx ring sk_buffs */
96838a40 2071 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2072 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB		 2073 if (buffer_info->dma &&
2074 adapter->clean_rx == e1000_clean_rx_irq) {
b16f53be 2075 dma_unmap_single(&pdev->dev, buffer_info->dma,
edbbb3ca 2076 buffer_info->length,
b16f53be 2077 DMA_FROM_DEVICE);
edbbb3ca
JB		 2078 } else if (buffer_info->dma &&
2079 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
b16f53be
NN		 2080 dma_unmap_page(&pdev->dev, buffer_info->dma,
2081 buffer_info->length,
2082 DMA_FROM_DEVICE);
679be3ba 2083 }
1da177e4 2084
679be3ba 2085 buffer_info->dma = 0;
edbbb3ca
JB		 2086 if (buffer_info->page) {
2087 put_page(buffer_info->page);
2088 buffer_info->page = NULL;
2089 }
679be3ba 2090 if (buffer_info->skb) {
1da177e4
LT		 2091 dev_kfree_skb(buffer_info->skb);
2092 buffer_info->skb = NULL;
997f5cbd 2093 }
1da177e4
LT		 2094 }
2095
edbbb3ca
JB		 2096 /* there also may be some cached data from a chained receive */
2097 if (rx_ring->rx_skb_top) {
2098 dev_kfree_skb(rx_ring->rx_skb_top);
2099 rx_ring->rx_skb_top = NULL;
2100 }
2101
1da177e4
LT		 2102 size = sizeof(struct e1000_buffer) * rx_ring->count;
2103 memset(rx_ring->buffer_info, 0, size);
2104
2105 /* Zero out the descriptor ring */
1da177e4
LT		 2106 memset(rx_ring->desc, 0, rx_ring->size);
2107
2108 rx_ring->next_to_clean = 0;
2109 rx_ring->next_to_use = 0;
2110
1dc32918
JP		 2111 writel(0, hw->hw_addr + rx_ring->rdh);
2112 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2113}
2114
2115/**
2116 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2117 * @adapter: board private structure
2118 **/
64798845 2119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2120{
2121 int i;
2122
f56799ea 2123 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2124 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2125}
2126
2127/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2128 * and memory write and invalidate disabled for certain operations
2129 */
64798845 2130static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2131{
1dc32918 2132 struct e1000_hw *hw = &adapter->hw;
1da177e4 2133 struct net_device *netdev = adapter->netdev;
406874a7 2134 u32 rctl;
1da177e4 2135
1dc32918 2136 e1000_pci_clear_mwi(hw);
1da177e4 2137
1dc32918 2138 rctl = er32(RCTL);
1da177e4 2139 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2140 ew32(RCTL, rctl);
2141 E1000_WRITE_FLUSH();
1da177e4
LT		 2142 mdelay(5);
2143
96838a40 2144 if (netif_running(netdev))
581d708e 2145 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2146}
2147
64798845 2148static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2149{
1dc32918 2150 struct e1000_hw *hw = &adapter->hw;
1da177e4 2151 struct net_device *netdev = adapter->netdev;
406874a7 2152 u32 rctl;
1da177e4 2153
1dc32918 2154 rctl = er32(RCTL);
1da177e4 2155 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2156 ew32(RCTL, rctl);
2157 E1000_WRITE_FLUSH();
1da177e4
LT		 2158 mdelay(5);
2159
1dc32918
JP		 2160 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2161 e1000_pci_set_mwi(hw);
1da177e4 2162
96838a40 2163 if (netif_running(netdev)) {
72d64a43
JK		 2164 /* No need to loop, because 82542 supports only 1 queue */
2165 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2166 e1000_configure_rx(adapter);
72d64a43 2167 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2168 }
2169}
2170
2171/**
2172 * e1000_set_mac - Change the Ethernet Address of the NIC
2173 * @netdev: network interface device structure
2174 * @p: pointer to an address structure
2175 *
2176 * Returns 0 on success, negative on failure
2177 **/
64798845 2178static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2179{
60490fe0 2180 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2181 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2182 struct sockaddr *addr = p;
2183
96838a40 2184 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2185 return -EADDRNOTAVAIL;
2186
2187 /* 82542 2.0 needs to be in reset to write receive address registers */
2188
1dc32918 2189 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2190 e1000_enter_82542_rst(adapter);
2191
2192 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2193 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2194
1dc32918 2195 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2196
1dc32918 2197 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2198 e1000_leave_82542_rst(adapter);
2199
2200 return 0;
2201}
2202
2203/**
db0ce50d 2204 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2205 * @netdev: network interface device structure
2206 *
db0ce50d
PM		 2207 * The set_rx_mode entry point is called whenever the unicast or multicast
2208 * address lists or the network interface flags are updated. This routine is
2209 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2210 * promiscuous mode, and all-multi behavior.
2211 **/
64798845 2212static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2213{
60490fe0 2214 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2215 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2216 struct netdev_hw_addr *ha;
2217 bool use_uc = false;
406874a7
JP		 2218 u32 rctl;
2219 u32 hash_value;
868d5309 2220 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2221 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2222 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2223
14f8dc49 2224 if (!mcarray)
81c52285 2225 return;
cd94dd0b 2226
2648345f
MC		 2227 /* Check for Promiscuous and All Multicast modes */
2228
1dc32918 2229 rctl = er32(RCTL);
1da177e4 2230
96838a40 2231 if (netdev->flags & IFF_PROMISC) {
1da177e4 2232 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2233 rctl &= ~E1000_RCTL_VFE;
1da177e4 2234 } else {
1532ecea 2235 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2236 rctl |= E1000_RCTL_MPE;
1532ecea 2237 else
746b9f02 2238 rctl &= ~E1000_RCTL_MPE;
1532ecea 2239 /* Enable VLAN filter if there is a VLAN */
5622e404 2240 if (e1000_vlan_used(adapter))
1532ecea 2241 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2242 }
2243
32e7bfc4 2244 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2245 rctl |= E1000_RCTL_UPE;
2246 } else if (!(netdev->flags & IFF_PROMISC)) {
2247 rctl &= ~E1000_RCTL_UPE;
ccffad25 2248 use_uc = true;
1da177e4
LT		 2249 }
2250
1dc32918 2251 ew32(RCTL, rctl);
1da177e4
LT		 2252
2253 /* 82542 2.0 needs to be in reset to write receive address registers */
2254
96838a40 2255 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2256 e1000_enter_82542_rst(adapter);
2257
db0ce50d
PM		 2258 /* load the first 14 addresses into the exact filters 1-14. Unicast
2259 * addresses take precedence to avoid disabling unicast filtering
2260 * when possible.
2261 *
b595076a 2262 * RAR 0 is used for the station MAC address
1da177e4
LT		 2263 * if there are not 14 addresses, go ahead and clear the filters
2264 */
ccffad25
JP		 2265 i = 1;
2266 if (use_uc)
32e7bfc4 2267 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2268 if (i == rar_entries)
2269 break;
2270 e1000_rar_set(hw, ha->addr, i++);
2271 }
2272
22bedad3 2273 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP		 2274 if (i == rar_entries) {
2275 /* load any remaining addresses into the hash table */
2276 u32 hash_reg, hash_bit, mta;
22bedad3 2277 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP		 2278 hash_reg = (hash_value >> 5) & 0x7F;
2279 hash_bit = hash_value & 0x1F;
2280 mta = (1 << hash_bit);
2281 mcarray[hash_reg] |= mta;
10886af5 2282 } else {
22bedad3 2283 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT		 2284 }
2285 }
2286
7a81e9f3
JP		 2287 for (; i < rar_entries; i++) {
2288 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2289 E1000_WRITE_FLUSH();
2290 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2291 E1000_WRITE_FLUSH();
1da177e4
LT		 2292 }
2293
81c52285 2294 /* write the hash table completely, write from bottom to avoid
6cfbd97b
JK		 2295 * both stupid write combining chipsets, and flushing each write
2296 */
81c52285 2297 for (i = mta_reg_count - 1; i >= 0 ; i--) {
6cfbd97b 2298 /* If we are on an 82544 has an errata where writing odd
81c52285
JB		 2299 * offsets overwrites the previous even offset, but writing
2300 * backwards over the range solves the issue by always
2301 * writing the odd offset first
2302 */
2303 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2304 }
2305 E1000_WRITE_FLUSH();
2306
96838a40 2307 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2308 e1000_leave_82542_rst(adapter);
81c52285
JB		 2309
2310 kfree(mcarray);
1da177e4
LT		 2311}
2312
a4010afe
JB		 2313/**
2314 * e1000_update_phy_info_task - get phy info
2315 * @work: work struct contained inside adapter struct
2316 *
2317 * Need to wait a few seconds after link up to get diagnostic information from
2318 * the phy
2319 */
5cf42fcd
JB		 2320static void e1000_update_phy_info_task(struct work_struct *work)
2321{
2322 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2323 struct e1000_adapter,
2324 phy_info_task.work);
b2f963bf 2325
a4010afe 2326 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
1da177e4
LT		 2327}
2328
5cf42fcd
JB		 2329/**
2330 * e1000_82547_tx_fifo_stall_task - task to complete work
2331 * @work: work struct contained inside adapter struct
2332 **/
2333static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
2334{
2335 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2336 struct e1000_adapter,
2337 fifo_stall_task.work);
1dc32918 2338 struct e1000_hw *hw = &adapter->hw;
1da177e4 2339 struct net_device *netdev = adapter->netdev;
406874a7 2340 u32 tctl;
1da177e4 2341
96838a40 2342 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2343 if ((er32(TDT) == er32(TDH)) &&
2344 (er32(TDFT) == er32(TDFH)) &&
2345 (er32(TDFTS) == er32(TDFHS))) {
2346 tctl = er32(TCTL);
2347 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2348 ew32(TDFT, adapter->tx_head_addr);
2349 ew32(TDFH, adapter->tx_head_addr);
2350 ew32(TDFTS, adapter->tx_head_addr);
2351 ew32(TDFHS, adapter->tx_head_addr);
2352 ew32(TCTL, tctl);
2353 E1000_WRITE_FLUSH();
1da177e4
LT		 2354
2355 adapter->tx_fifo_head = 0;
2356 atomic_set(&adapter->tx_fifo_stall, 0);
2357 netif_wake_queue(netdev);
baa34745 2358 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
a4010afe 2359 schedule_delayed_work(&adapter->fifo_stall_task, 1);
1da177e4
LT		 2360 }
2361 }
2362}
2363
b548192a 2364bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2365{
2366 struct e1000_hw *hw = &adapter->hw;
2367 bool link_active = false;
be0f0719 2368
6d9e5130
NS		 2369 /* get_link_status is set on LSC (link status) interrupt or rx
2370 * sequence error interrupt (except on intel ce4100).
2371 * get_link_status will stay false until the
2372 * e1000_check_for_link establishes link for copper adapters
2373 * ONLY
be0f0719
JB		 2374 */
2375 switch (hw->media_type) {
2376 case e1000_media_type_copper:
6d9e5130
NS		 2377 if (hw->mac_type == e1000_ce4100)
2378 hw->get_link_status = 1;
be0f0719 2379 if (hw->get_link_status) {
120a5d0d 2380 e1000_check_for_link(hw);
be0f0719
JB		 2381 link_active = !hw->get_link_status;
2382 } else {
2383 link_active = true;
2384 }
2385 break;
2386 case e1000_media_type_fiber:
120a5d0d 2387 e1000_check_for_link(hw);
be0f0719
JB		 2388 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2389 break;
2390 case e1000_media_type_internal_serdes:
120a5d0d 2391 e1000_check_for_link(hw);
be0f0719
JB		 2392 link_active = hw->serdes_has_link;
2393 break;
2394 default:
2395 break;
2396 }
2397
2398 return link_active;
2399}
2400
1da177e4 2401/**
a4010afe
JB		 2402 * e1000_watchdog - work function
2403 * @work: work struct contained inside adapter struct
1da177e4 2404 **/
a4010afe 2405static void e1000_watchdog(struct work_struct *work)
1da177e4 2406{
a4010afe
JB		 2407 struct e1000_adapter *adapter = container_of(work,
2408 struct e1000_adapter,
2409 watchdog_task.work);
1dc32918 2410 struct e1000_hw *hw = &adapter->hw;
1da177e4 2411 struct net_device *netdev = adapter->netdev;
545c67c0 2412 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2413 u32 link, tctl;
90fb5135 2414
be0f0719
JB		 2415 link = e1000_has_link(adapter);
2416 if ((netif_carrier_ok(netdev)) && link)
2417 goto link_up;
1da177e4 2418
96838a40
JB		 2419 if (link) {
2420 if (!netif_carrier_ok(netdev)) {
406874a7 2421 u32 ctrl;
c3033b01 2422 bool txb2b = true;
be0f0719 2423 /* update snapshot of PHY registers on LSC */
1dc32918 2424 e1000_get_speed_and_duplex(hw,
6cfbd97b
JK		 2425 &adapter->link_speed,
2426 &adapter->link_duplex);
1da177e4 2427
1dc32918 2428 ctrl = er32(CTRL);
675ad473
ET		 2429 pr_info("%s NIC Link is Up %d Mbps %s, "
2430 "Flow Control: %s\n",
2431 netdev->name,
2432 adapter->link_speed,
2433 adapter->link_duplex == FULL_DUPLEX ?
2434 "Full Duplex" : "Half Duplex",
2435 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2436 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2437 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2438 E1000_CTRL_TFCE) ? "TX" : "None")));
1da177e4 2439
39ca5f03 2440 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2441 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2442 switch (adapter->link_speed) {
2443 case SPEED_10:
c3033b01 2444 txb2b = false;
be0f0719 2445 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2446 break;
2447 case SPEED_100:
c3033b01 2448 txb2b = false;
7e6c9861
JK		 2449 /* maybe add some timeout factor ? */
2450 break;
2451 }
2452
1532ecea 2453 /* enable transmits in the hardware */
1dc32918 2454 tctl = er32(TCTL);
7e6c9861 2455 tctl |= E1000_TCTL_EN;
1dc32918 2456 ew32(TCTL, tctl);
66a2b0a3 2457
1da177e4 2458 netif_carrier_on(netdev);
baa34745 2459 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2460 schedule_delayed_work(&adapter->phy_info_task,
2461 2 * HZ);
1da177e4
LT		 2462 adapter->smartspeed = 0;
2463 }
2464 } else {
96838a40 2465 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2466 adapter->link_speed = 0;
2467 adapter->link_duplex = 0;
675ad473
ET		 2468 pr_info("%s NIC Link is Down\n",
2469 netdev->name);
1da177e4 2470 netif_carrier_off(netdev);
baa34745
JB		 2471
2472 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2473 schedule_delayed_work(&adapter->phy_info_task,
2474 2 * HZ);
1da177e4
LT		 2475 }
2476
2477 e1000_smartspeed(adapter);
2478 }
2479
be0f0719 2480link_up:
1da177e4
LT		 2481 e1000_update_stats(adapter);
2482
1dc32918 2483 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2484 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2485 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2486 adapter->colc_old = adapter->stats.colc;
2487
2488 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2489 adapter->gorcl_old = adapter->stats.gorcl;
2490 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2491 adapter->gotcl_old = adapter->stats.gotcl;
2492
1dc32918 2493 e1000_update_adaptive(hw);
1da177e4 2494
f56799ea 2495 if (!netif_carrier_ok(netdev)) {
581d708e 2496 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2497 /* We've lost link, so the controller stops DMA,
2498 * but we've got queued Tx work that's never going
2499 * to get done, so reset controller to flush Tx.
6cfbd97b
JK		 2500 * (Do the reset outside of interrupt context).
2501 */
87041639
JK		 2502 adapter->tx_timeout_count++;
2503 schedule_work(&adapter->reset_task);
0ef4eedc 2504 /* exit immediately since reset is imminent */
b2f963bf 2505 return;
1da177e4
LT		 2506 }
2507 }
2508
eab2abf5
JB		 2509 /* Simple mode for Interrupt Throttle Rate (ITR) */
2510 if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
6cfbd97b 2511 /* Symmetric Tx/Rx gets a reduced ITR=2000;
eab2abf5
JB		 2512 * Total asymmetrical Tx or Rx gets ITR=8000;
2513 * everyone else is between 2000-8000.
2514 */
2515 u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
2516 u32 dif = (adapter->gotcl > adapter->gorcl ?
2517 adapter->gotcl - adapter->gorcl :
2518 adapter->gorcl - adapter->gotcl) / 10000;
2519 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2520
2521 ew32(ITR, 1000000000 / (itr * 256));
2522 }
2523
1da177e4 2524 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2525 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2526
2648345f 2527 /* Force detection of hung controller every watchdog period */
c3033b01 2528 adapter->detect_tx_hung = true;
1da177e4 2529
a4010afe 2530 /* Reschedule the task */
baa34745 2531 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 2532 schedule_delayed_work(&adapter->watchdog_task, 2 * HZ);
1da177e4
LT		 2533}
2534
835bb129
JB		 2535enum latency_range {
2536 lowest_latency = 0,
2537 low_latency = 1,
2538 bulk_latency = 2,
2539 latency_invalid = 255
2540};
2541
2542/**
2543 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2544 * @adapter: pointer to adapter
2545 * @itr_setting: current adapter->itr
2546 * @packets: the number of packets during this measurement interval
2547 * @bytes: the number of bytes during this measurement interval
2548 *
835bb129
JB		 2549 * Stores a new ITR value based on packets and byte
2550 * counts during the last interrupt. The advantage of per interrupt
2551 * computation is faster updates and more accurate ITR for the current
2552 * traffic pattern. Constants in this function were computed
2553 * based on theoretical maximum wire speed and thresholds were set based
2554 * on testing data as well as attempting to minimize response time
2555 * while increasing bulk throughput.
2556 * this functionality is controlled by the InterruptThrottleRate module
2557 * parameter (see e1000_param.c)
835bb129
JB		 2558 **/
2559static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2560 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2561{
2562 unsigned int retval = itr_setting;
2563 struct e1000_hw *hw = &adapter->hw;
2564
2565 if (unlikely(hw->mac_type < e1000_82540))
2566 goto update_itr_done;
2567
2568 if (packets == 0)
2569 goto update_itr_done;
2570
835bb129
JB		 2571 switch (itr_setting) {
2572 case lowest_latency:
2b65326e
JB		 2573 /* jumbo frames get bulk treatment*/
2574 if (bytes/packets > 8000)
2575 retval = bulk_latency;
2576 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2577 retval = low_latency;
2578 break;
2579 case low_latency: /* 50 usec aka 20000 ints/s */
2580 if (bytes > 10000) {
2b65326e
JB		 2581 /* jumbo frames need bulk latency setting */
2582 if (bytes/packets > 8000)
2583 retval = bulk_latency;
2584 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2585 retval = bulk_latency;
2586 else if ((packets > 35))
2587 retval = lowest_latency;
2b65326e
JB		 2588 } else if (bytes/packets > 2000)
2589 retval = bulk_latency;
2590 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2591 retval = lowest_latency;
2592 break;
2593 case bulk_latency: /* 250 usec aka 4000 ints/s */
2594 if (bytes > 25000) {
2595 if (packets > 35)
2596 retval = low_latency;
2b65326e
JB		 2597 } else if (bytes < 6000) {
2598 retval = low_latency;
835bb129
JB		 2599 }
2600 break;
2601 }
2602
2603update_itr_done:
2604 return retval;
2605}
2606
2607static void e1000_set_itr(struct e1000_adapter *adapter)
2608{
2609 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2610 u16 current_itr;
2611 u32 new_itr = adapter->itr;
835bb129
JB		 2612
2613 if (unlikely(hw->mac_type < e1000_82540))
2614 return;
2615
2616 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2617 if (unlikely(adapter->link_speed != SPEED_1000)) {
2618 current_itr = 0;
2619 new_itr = 4000;
2620 goto set_itr_now;
2621 }
2622
6cfbd97b
JK		 2623 adapter->tx_itr = e1000_update_itr(adapter, adapter->tx_itr,
2624 adapter->total_tx_packets,
2625 adapter->total_tx_bytes);
2b65326e
JB		 2626 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2627 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2628 adapter->tx_itr = low_latency;
2629
6cfbd97b
JK		 2630 adapter->rx_itr = e1000_update_itr(adapter, adapter->rx_itr,
2631 adapter->total_rx_packets,
2632 adapter->total_rx_bytes);
2b65326e
JB		 2633 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2634 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2635 adapter->rx_itr = low_latency;
835bb129
JB		 2636
2637 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2638
835bb129
JB		 2639 switch (current_itr) {
2640 /* counts and packets in update_itr are dependent on these numbers */
2641 case lowest_latency:
2642 new_itr = 70000;
2643 break;
2644 case low_latency:
2645 new_itr = 20000; /* aka hwitr = ~200 */
2646 break;
2647 case bulk_latency:
2648 new_itr = 4000;
2649 break;
2650 default:
2651 break;
2652 }
2653
2654set_itr_now:
2655 if (new_itr != adapter->itr) {
2656 /* this attempts to bias the interrupt rate towards Bulk
2657 * by adding intermediate steps when interrupt rate is
6cfbd97b
JK		 2658 * increasing
2659 */
835bb129 2660 new_itr = new_itr > adapter->itr ?
6cfbd97b
JK		 2661 min(adapter->itr + (new_itr >> 2), new_itr) :
2662 new_itr;
835bb129 2663 adapter->itr = new_itr;
1dc32918 2664 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129 2665 }
835bb129
JB		 2666}
2667
1da177e4
LT		 2668#define E1000_TX_FLAGS_CSUM 0x00000001
2669#define E1000_TX_FLAGS_VLAN 0x00000002
2670#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2671#define E1000_TX_FLAGS_IPV4 0x00000008
11a78dcf 2672#define E1000_TX_FLAGS_NO_FCS 0x00000010
1da177e4
LT		 2673#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2674#define E1000_TX_FLAGS_VLAN_SHIFT 16
2675
64798845
JP		 2676static int e1000_tso(struct e1000_adapter *adapter,
2677 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2678{
1da177e4 2679 struct e1000_context_desc *context_desc;
545c67c0 2680 struct e1000_buffer *buffer_info;
1da177e4 2681 unsigned int i;
406874a7
JP		 2682 u32 cmd_length = 0;
2683 u16 ipcse = 0, tucse, mss;
2684 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4 2685
89114afd 2686 if (skb_is_gso(skb)) {
4a54b1e5
FR		 2687 int err;
2688
2689 err = skb_cow_head(skb, 0);
2690 if (err < 0)
2691 return err;
1da177e4 2692
ab6a5bb6 2693 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2694 mss = skb_shinfo(skb)->gso_size;
60828236 2695 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2696 struct iphdr *iph = ip_hdr(skb);
2697 iph->tot_len = 0;
2698 iph->check = 0;
aa8223c7
ACM		 2699 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2700 iph->daddr, 0,
2701 IPPROTO_TCP,
2702 0);
2d7edb92 2703 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2704 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2705 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2706 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2707 tcp_hdr(skb)->check =
0660e03f
ACM		 2708 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2709 &ipv6_hdr(skb)->daddr,
2710 0, IPPROTO_TCP, 0);
2d7edb92 2711 ipcse = 0;
2d7edb92 2712 }
bbe735e4 2713 ipcss = skb_network_offset(skb);
eddc9ec5 2714 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2715 tucss = skb_transport_offset(skb);
aa8223c7 2716 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2717 tucse = 0;
2718
2719 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2720 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2721
581d708e
MC		 2722 i = tx_ring->next_to_use;
2723 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2724 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2725
2726 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2727 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2728 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2729 context_desc->upper_setup.tcp_fields.tucss = tucss;
2730 context_desc->upper_setup.tcp_fields.tucso = tucso;
2731 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2732 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2733 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2734 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2735
545c67c0 2736 buffer_info->time_stamp = jiffies;
a9ebadd6 2737 buffer_info->next_to_watch = i;
545c67c0 2738
581d708e
MC		 2739 if (++i == tx_ring->count) i = 0;
2740 tx_ring->next_to_use = i;
1da177e4 2741
c3033b01 2742 return true;
1da177e4 2743 }
c3033b01 2744 return false;
1da177e4
LT		 2745}
2746
64798845
JP		 2747static bool e1000_tx_csum(struct e1000_adapter *adapter,
2748 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2749{
2750 struct e1000_context_desc *context_desc;
545c67c0 2751 struct e1000_buffer *buffer_info;
1da177e4 2752 unsigned int i;
406874a7 2753 u8 css;
3ed30676 2754 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2755
3ed30676
DG		 2756 if (skb->ip_summed != CHECKSUM_PARTIAL)
2757 return false;
1da177e4 2758
3ed30676 2759 switch (skb->protocol) {
09640e63 2760 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2761 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2762 cmd_len |= E1000_TXD_CMD_TCP;
2763 break;
09640e63 2764 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2765 /* XXX not handling all IPV6 headers */
2766 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2767 cmd_len |= E1000_TXD_CMD_TCP;
2768 break;
2769 default:
2770 if (unlikely(net_ratelimit()))
feb8f478
ET		 2771 e_warn(drv, "checksum_partial proto=%x!\n",
2772 skb->protocol);
3ed30676
DG		 2773 break;
2774 }
1da177e4 2775
0d0b1672 2776 css = skb_checksum_start_offset(skb);
1da177e4 2777
3ed30676
DG		 2778 i = tx_ring->next_to_use;
2779 buffer_info = &tx_ring->buffer_info[i];
2780 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2781
3ed30676
DG		 2782 context_desc->lower_setup.ip_config = 0;
2783 context_desc->upper_setup.tcp_fields.tucss = css;
2784 context_desc->upper_setup.tcp_fields.tucso =
2785 css + skb->csum_offset;
2786 context_desc->upper_setup.tcp_fields.tucse = 0;
2787 context_desc->tcp_seg_setup.data = 0;
2788 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2789
3ed30676
DG		 2790 buffer_info->time_stamp = jiffies;
2791 buffer_info->next_to_watch = i;
1da177e4 2792
3ed30676
DG		 2793 if (unlikely(++i == tx_ring->count)) i = 0;
2794 tx_ring->next_to_use = i;
2795
2796 return true;
1da177e4
LT		 2797}
2798
2799#define E1000_MAX_TXD_PWR 12
2800#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2801
64798845
JP		 2802static int e1000_tx_map(struct e1000_adapter *adapter,
2803 struct e1000_tx_ring *tx_ring,
2804 struct sk_buff *skb, unsigned int first,
2805 unsigned int max_per_txd, unsigned int nr_frags,
2806 unsigned int mss)
1da177e4 2807{
1dc32918 2808 struct e1000_hw *hw = &adapter->hw;
602c0554 2809 struct pci_dev *pdev = adapter->pdev;
37e73df8 2810 struct e1000_buffer *buffer_info;
d20b606c 2811 unsigned int len = skb_headlen(skb);
602c0554 2812 unsigned int offset = 0, size, count = 0, i;
31c15a2f 2813 unsigned int f, bytecount, segs;
1da177e4
LT		 2814
2815 i = tx_ring->next_to_use;
2816
96838a40 2817 while (len) {
37e73df8 2818 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2819 size = min(len, max_per_txd);
fd803241
JK		 2820 /* Workaround for Controller erratum --
2821 * descriptor for non-tso packet in a linear SKB that follows a
2822 * tso gets written back prematurely before the data is fully
6cfbd97b
JK		 2823 * DMA'd to the controller
2824 */
fd803241 2825 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2826 !skb_is_gso(skb)) {
3db1cd5c 2827 tx_ring->last_tx_tso = false;
fd803241
JK		 2828 size -= 4;
2829 }
2830
1da177e4 2831 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2832 * in TSO mode. Append 4-byte sentinel desc
2833 */
96838a40 2834 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2835 size -= 4;
97338bde
MC		 2836 /* work-around for errata 10 and it applies
2837 * to all controllers in PCI-X mode
2838 * The fix is to make sure that the first descriptor of a
2839 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2840 */
1dc32918 2841 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2842 (size > 2015) && count == 0))
2843 size = 2015;
96838a40 2844
1da177e4 2845 /* Workaround for potential 82544 hang in PCI-X. Avoid
6cfbd97b
JK		 2846 * terminating buffers within evenly-aligned dwords.
2847 */
96838a40 2848 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2849 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2850 size > 4))
2851 size -= 4;
2852
2853 buffer_info->length = size;
cdd7549e 2854 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2855 buffer_info->time_stamp = jiffies;
602c0554 2856 buffer_info->mapped_as_page = false;
b16f53be
NN		 2857 buffer_info->dma = dma_map_single(&pdev->dev,
2858 skb->data + offset,
6cfbd97b 2859 size, DMA_TO_DEVICE);
b16f53be 2860 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2861 goto dma_error;
a9ebadd6 2862 buffer_info->next_to_watch = i;
1da177e4
LT		 2863
2864 len -= size;
2865 offset += size;
2866 count++;
37e73df8
AD		 2867 if (len) {
2868 i++;
2869 if (unlikely(i == tx_ring->count))
2870 i = 0;
2871 }
1da177e4
LT		 2872 }
2873
96838a40 2874 for (f = 0; f < nr_frags; f++) {
9e903e08 2875 const struct skb_frag_struct *frag;
1da177e4
LT		 2876
2877 frag = &skb_shinfo(skb)->frags[f];
9e903e08 2878 len = skb_frag_size(frag);
877749bf 2879 offset = 0;
1da177e4 2880
96838a40 2881 while (len) {
877749bf 2882 unsigned long bufend;
37e73df8
AD		 2883 i++;
2884 if (unlikely(i == tx_ring->count))
2885 i = 0;
2886
1da177e4
LT		 2887 buffer_info = &tx_ring->buffer_info[i];
2888 size = min(len, max_per_txd);
1da177e4 2889 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2890 * in TSO mode. Append 4-byte sentinel desc
2891 */
2892 if (unlikely(mss && f == (nr_frags-1) &&
2893 size == len && size > 8))
1da177e4 2894 size -= 4;
1da177e4
LT		 2895 /* Workaround for potential 82544 hang in PCI-X.
2896 * Avoid terminating buffers within evenly-aligned
6cfbd97b
JK		 2897 * dwords.
2898 */
877749bf
IC		 2899 bufend = (unsigned long)
2900 page_to_phys(skb_frag_page(frag));
2901 bufend += offset + size - 1;
96838a40 2902 if (unlikely(adapter->pcix_82544 &&
877749bf
IC		 2903 !(bufend & 4) &&
2904 size > 4))
1da177e4
LT		 2905 size -= 4;
2906
2907 buffer_info->length = size;
1da177e4 2908 buffer_info->time_stamp = jiffies;
602c0554 2909 buffer_info->mapped_as_page = true;
877749bf
IC		 2910 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
2911 offset, size, DMA_TO_DEVICE);
b16f53be 2912 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2913 goto dma_error;
a9ebadd6 2914 buffer_info->next_to_watch = i;
1da177e4
LT		 2915
2916 len -= size;
2917 offset += size;
2918 count++;
1da177e4
LT		 2919 }
2920 }
2921
31c15a2f
DN		 2922 segs = skb_shinfo(skb)->gso_segs ?: 1;
2923 /* multiply data chunks by size of headers */
2924 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
2925
1da177e4 2926 tx_ring->buffer_info[i].skb = skb;
31c15a2f
DN		 2927 tx_ring->buffer_info[i].segs = segs;
2928 tx_ring->buffer_info[i].bytecount = bytecount;
1da177e4
LT		 2929 tx_ring->buffer_info[first].next_to_watch = i;
2930
2931 return count;
602c0554
AD		 2932
2933dma_error:
2934 dev_err(&pdev->dev, "TX DMA map failed\n");
2935 buffer_info->dma = 0;
c1fa347f 2936 if (count)
602c0554 2937 count--;
c1fa347f
RK		 2938
2939 while (count--) {
2940 if (i==0)
602c0554 2941 i += tx_ring->count;
c1fa347f 2942 i--;
602c0554
AD		 2943 buffer_info = &tx_ring->buffer_info[i];
2944 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2945 }
2946
2947 return 0;
1da177e4
LT		 2948}
2949
64798845
JP		 2950static void e1000_tx_queue(struct e1000_adapter *adapter,
2951 struct e1000_tx_ring *tx_ring, int tx_flags,
2952 int count)
1da177e4 2953{
1dc32918 2954 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2955 struct e1000_tx_desc *tx_desc = NULL;
2956 struct e1000_buffer *buffer_info;
406874a7 2957 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2958 unsigned int i;
2959
96838a40 2960 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4 2961 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
6cfbd97b 2962 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2963 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2964
96838a40 2965 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2966 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2967 }
2968
96838a40 2969 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2970 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2971 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2972 }
2973
96838a40 2974 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2975 txd_lower |= E1000_TXD_CMD_VLE;
2976 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2977 }
2978
11a78dcf
BG		 2979 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
2980 txd_lower &= ~(E1000_TXD_CMD_IFCS);
2981
1da177e4
LT		 2982 i = tx_ring->next_to_use;
2983
96838a40 2984 while (count--) {
1da177e4
LT		 2985 buffer_info = &tx_ring->buffer_info[i];
2986 tx_desc = E1000_TX_DESC(*tx_ring, i);
2987 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2988 tx_desc->lower.data =
2989 cpu_to_le32(txd_lower | buffer_info->length);
2990 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2991 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2992 }
2993
2994 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2995
11a78dcf
BG		 2996 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
2997 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
2998 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
2999
1da177e4
LT		 3000 /* Force memory writes to complete before letting h/w
3001 * know there are new descriptors to fetch. (Only
3002 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 3003 * such as IA-64).
3004 */
1da177e4
LT		 3005 wmb();
3006
3007 tx_ring->next_to_use = i;
1dc32918 3008 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f 3009 /* we need this if more than one processor can write to our tail
6cfbd97b
JK		 3010 * at a time, it synchronizes IO on IA64/Altix systems
3011 */
2ce9047f 3012 mmiowb();
1da177e4
LT		 3013}
3014
1aa8b471 3015/* 82547 workaround to avoid controller hang in half-duplex environment.
1da177e4
LT		 3016 * The workaround is to avoid queuing a large packet that would span
3017 * the internal Tx FIFO ring boundary by notifying the stack to resend
3018 * the packet at a later time. This gives the Tx FIFO an opportunity to
3019 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3020 * to the beginning of the Tx FIFO.
1aa8b471 3021 */
1da177e4
LT		 3022
3023#define E1000_FIFO_HDR 0x10
3024#define E1000_82547_PAD_LEN 0x3E0
3025
64798845
JP		 3026static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3027 struct sk_buff *skb)
1da177e4 3028{
406874a7
JP		 3029 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3030 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3031
9099cfb9 3032 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3033
96838a40 3034 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3035 goto no_fifo_stall_required;
3036
96838a40 3037 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3038 return 1;
3039
96838a40 3040 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3041 atomic_set(&adapter->tx_fifo_stall, 1);
3042 return 1;
3043 }
3044
3045no_fifo_stall_required:
3046 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3047 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3048 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3049 return 0;
3050}
3051
65c7973f
JB		 3052static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3053{
3054 struct e1000_adapter *adapter = netdev_priv(netdev);
3055 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3056
3057 netif_stop_queue(netdev);
3058 /* Herbert's original patch had:
3059 * smp_mb__after_netif_stop_queue();
6cfbd97b
JK		 3060 * but since that doesn't exist yet, just open code it.
3061 */
65c7973f
JB		 3062 smp_mb();
3063
3064 /* We need to check again in a case another CPU has just
6cfbd97b
JK		 3065 * made room available.
3066 */
65c7973f
JB		 3067 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3068 return -EBUSY;
3069
3070 /* A reprieve! */
3071 netif_start_queue(netdev);
fcfb1224 3072 ++adapter->restart_queue;
65c7973f
JB		 3073 return 0;
3074}
3075
3076static int e1000_maybe_stop_tx(struct net_device *netdev,
6cfbd97b 3077 struct e1000_tx_ring *tx_ring, int size)
65c7973f
JB		 3078{
3079 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3080 return 0;
3081 return __e1000_maybe_stop_tx(netdev, size);
3082}
3083
1da177e4 3084#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 3085static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
3086 struct net_device *netdev)
1da177e4 3087{
60490fe0 3088 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3089 struct e1000_hw *hw = &adapter->hw;
581d708e 3090 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3091 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3092 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3093 unsigned int tx_flags = 0;
e743d313 3094 unsigned int len = skb_headlen(skb);
6d1e3aa7
KK		 3095 unsigned int nr_frags;
3096 unsigned int mss;
1da177e4 3097 int count = 0;
76c224bc 3098 int tso;
1da177e4 3099 unsigned int f;
1da177e4 3100
6cfbd97b 3101 /* This goes back to the question of how to logically map a Tx queue
65c7973f 3102 * to a flow. Right now, performance is impacted slightly negatively
6cfbd97b
JK		 3103 * if using multiple Tx queues. If the stack breaks away from a
3104 * single qdisc implementation, we can look at this again.
3105 */
581d708e 3106 tx_ring = adapter->tx_ring;
24025e4e 3107
59d86c76
TD		 3108 /* On PCI/PCI-X HW, if packet size is less than ETH_ZLEN,
3109 * packets may get corrupted during padding by HW.
3110 * To WA this issue, pad all small packets manually.
3111 */
3112 if (skb->len < ETH_ZLEN) {
3113 if (skb_pad(skb, ETH_ZLEN - skb->len))
3114 return NETDEV_TX_OK;
3115 skb->len = ETH_ZLEN;
3116 skb_set_tail_pointer(skb, ETH_ZLEN);
3117 }
3118
7967168c 3119 mss = skb_shinfo(skb)->gso_size;
76c224bc 3120 /* The controller does a simple calculation to
1da177e4
LT		 3121 * make sure there is enough room in the FIFO before
3122 * initiating the DMA for each buffer. The calc is:
3123 * 4 = ceil(buffer len/mss). To make sure we don't
3124 * overrun the FIFO, adjust the max buffer len if mss
6cfbd97b
JK		 3125 * drops.
3126 */
96838a40 3127 if (mss) {
406874a7 3128 u8 hdr_len;
1da177e4
LT		 3129 max_per_txd = min(mss << 2, max_per_txd);
3130 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3131
ab6a5bb6 3132 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3133 if (skb->data_len && hdr_len == len) {
1dc32918 3134 switch (hw->mac_type) {
9f687888 3135 unsigned int pull_size;
683a2aa3
HX		 3136 case e1000_82544:
3137 /* Make sure we have room to chop off 4 bytes,
3138 * and that the end alignment will work out to
3139 * this hardware's requirements
3140 * NOTE: this is a TSO only workaround
3141 * if end byte alignment not correct move us
6cfbd97b
JK		 3142 * into the next dword
3143 */
3144 if ((unsigned long)(skb_tail_pointer(skb) - 1)
3145 & 4)
683a2aa3
HX		 3146 break;
3147 /* fall through */
9f687888
JK		 3148 pull_size = min((unsigned int)4, skb->data_len);
3149 if (!__pskb_pull_tail(skb, pull_size)) {
feb8f478
ET		 3150 e_err(drv, "__pskb_pull_tail "
3151 "failed.\n");
9f687888 3152 dev_kfree_skb_any(skb);
749dfc70 3153 return NETDEV_TX_OK;
9f687888 3154 }
e743d313 3155 len = skb_headlen(skb);
9f687888
JK		 3156 break;
3157 default:
3158 /* do nothing */
3159 break;
d74bbd3b 3160 }
9a3056da 3161 }
1da177e4
LT		 3162 }
3163
9a3056da 3164 /* reserve a descriptor for the offload context */
84fa7933 3165 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3166 count++;
2648345f 3167 count++;
fd803241 3168
fd803241 3169 /* Controller Erratum workaround */
89114afd 3170 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3171 count++;
fd803241 3172
1da177e4
LT		 3173 count += TXD_USE_COUNT(len, max_txd_pwr);
3174
96838a40 3175 if (adapter->pcix_82544)
1da177e4
LT		 3176 count++;
3177
96838a40 3178 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3179 * in PCI-X mode, so add one more descriptor to the count
3180 */
1dc32918 3181 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3182 (len > 2015)))
3183 count++;
3184
1da177e4 3185 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3186 for (f = 0; f < nr_frags; f++)
9e903e08 3187 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
1da177e4 3188 max_txd_pwr);
96838a40 3189 if (adapter->pcix_82544)
1da177e4
LT		 3190 count += nr_frags;
3191
1da177e4 3192 /* need: count + 2 desc gap to keep tail from touching
6cfbd97b
JK		 3193 * head, otherwise try next time
3194 */
8017943e 3195 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3196 return NETDEV_TX_BUSY;
1da177e4 3197
a4010afe
JB		 3198 if (unlikely((hw->mac_type == e1000_82547) &&
3199 (e1000_82547_fifo_workaround(adapter, skb)))) {
3200 netif_stop_queue(netdev);
3201 if (!test_bit(__E1000_DOWN, &adapter->flags))
3202 schedule_delayed_work(&adapter->fifo_stall_task, 1);
3203 return NETDEV_TX_BUSY;
1da177e4
LT		 3204 }
3205
5622e404 3206 if (vlan_tx_tag_present(skb)) {
1da177e4
LT		 3207 tx_flags |= E1000_TX_FLAGS_VLAN;
3208 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3209 }
3210
581d708e 3211 first = tx_ring->next_to_use;
96838a40 3212
581d708e 3213 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3214 if (tso < 0) {
3215 dev_kfree_skb_any(skb);
3216 return NETDEV_TX_OK;
3217 }
3218
fd803241 3219 if (likely(tso)) {
8fce4731 3220 if (likely(hw->mac_type != e1000_82544))
3db1cd5c 3221 tx_ring->last_tx_tso = true;
1da177e4 3222 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3223 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3224 tx_flags |= E1000_TX_FLAGS_CSUM;
3225
60828236 3226 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3227 tx_flags |= E1000_TX_FLAGS_IPV4;
3228
11a78dcf
BG		 3229 if (unlikely(skb->no_fcs))
3230 tx_flags |= E1000_TX_FLAGS_NO_FCS;
3231
37e73df8 3232 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
6cfbd97b 3233 nr_frags, mss);
1da177e4 3234
37e73df8 3235 if (count) {
2f66fd36 3236 netdev_sent_queue(netdev, skb->len);
eab467f5
WB		 3237 skb_tx_timestamp(skb);
3238
37e73df8 3239 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3240 /* Make sure there is space in the ring for the next send. */
3241 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3242
37e73df8
AD		 3243 } else {
3244 dev_kfree_skb_any(skb);
3245 tx_ring->buffer_info[first].time_stamp = 0;
3246 tx_ring->next_to_use = first;
3247 }
1da177e4 3248
1da177e4
LT		 3249 return NETDEV_TX_OK;
3250}
3251
b04e36ba
TD		 3252#define NUM_REGS 38 /* 1 based count */
3253static void e1000_regdump(struct e1000_adapter *adapter)
3254{
3255 struct e1000_hw *hw = &adapter->hw;
3256 u32 regs[NUM_REGS];
3257 u32 *regs_buff = regs;
3258 int i = 0;
3259
e29b5d8f
TD		 3260 static const char * const reg_name[] = {
3261 "CTRL", "STATUS",
3262 "RCTL", "RDLEN", "RDH", "RDT", "RDTR",
3263 "TCTL", "TDBAL", "TDBAH", "TDLEN", "TDH", "TDT",
3264 "TIDV", "TXDCTL", "TADV", "TARC0",
3265 "TDBAL1", "TDBAH1", "TDLEN1", "TDH1", "TDT1",
3266 "TXDCTL1", "TARC1",
3267 "CTRL_EXT", "ERT", "RDBAL", "RDBAH",
3268 "TDFH", "TDFT", "TDFHS", "TDFTS", "TDFPC",
3269 "RDFH", "RDFT", "RDFHS", "RDFTS", "RDFPC"
b04e36ba
TD		 3270 };
3271
3272 regs_buff[0] = er32(CTRL);
3273 regs_buff[1] = er32(STATUS);
3274
3275 regs_buff[2] = er32(RCTL);
3276 regs_buff[3] = er32(RDLEN);
3277 regs_buff[4] = er32(RDH);
3278 regs_buff[5] = er32(RDT);
3279 regs_buff[6] = er32(RDTR);
3280
3281 regs_buff[7] = er32(TCTL);
3282 regs_buff[8] = er32(TDBAL);
3283 regs_buff[9] = er32(TDBAH);
3284 regs_buff[10] = er32(TDLEN);
3285 regs_buff[11] = er32(TDH);
3286 regs_buff[12] = er32(TDT);
3287 regs_buff[13] = er32(TIDV);
3288 regs_buff[14] = er32(TXDCTL);
3289 regs_buff[15] = er32(TADV);
3290 regs_buff[16] = er32(TARC0);
3291
3292 regs_buff[17] = er32(TDBAL1);
3293 regs_buff[18] = er32(TDBAH1);
3294 regs_buff[19] = er32(TDLEN1);
3295 regs_buff[20] = er32(TDH1);
3296 regs_buff[21] = er32(TDT1);
3297 regs_buff[22] = er32(TXDCTL1);
3298 regs_buff[23] = er32(TARC1);
3299 regs_buff[24] = er32(CTRL_EXT);
3300 regs_buff[25] = er32(ERT);
3301 regs_buff[26] = er32(RDBAL0);
3302 regs_buff[27] = er32(RDBAH0);
3303 regs_buff[28] = er32(TDFH);
3304 regs_buff[29] = er32(TDFT);
3305 regs_buff[30] = er32(TDFHS);
3306 regs_buff[31] = er32(TDFTS);
3307 regs_buff[32] = er32(TDFPC);
3308 regs_buff[33] = er32(RDFH);
3309 regs_buff[34] = er32(RDFT);
3310 regs_buff[35] = er32(RDFHS);
3311 regs_buff[36] = er32(RDFTS);
3312 regs_buff[37] = er32(RDFPC);
3313
3314 pr_info("Register dump\n");
e29b5d8f
TD		 3315 for (i = 0; i < NUM_REGS; i++)
3316 pr_info("%-15s %08x\n", reg_name[i], regs_buff[i]);
b04e36ba
TD		 3317}
3318
3319/*
3320 * e1000_dump: Print registers, tx ring and rx ring
3321 */
3322static void e1000_dump(struct e1000_adapter *adapter)
3323{
3324 /* this code doesn't handle multiple rings */
3325 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3326 struct e1000_rx_ring *rx_ring = adapter->rx_ring;
3327 int i;
3328
3329 if (!netif_msg_hw(adapter))
3330 return;
3331
3332 /* Print Registers */
3333 e1000_regdump(adapter);
3334
6cfbd97b 3335 /* transmit dump */
b04e36ba
TD		 3336 pr_info("TX Desc ring0 dump\n");
3337
3338 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
3339 *
3340 * Legacy Transmit Descriptor
3341 * +--------------------------------------------------------------+
3342 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
3343 * +--------------------------------------------------------------+
3344 * 8 | Special | CSS | Status | CMD | CSO | Length |
3345 * +--------------------------------------------------------------+
3346 * 63 48 47 36 35 32 31 24 23 16 15 0
3347 *
3348 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
3349 * 63 48 47 40 39 32 31 16 15 8 7 0
3350 * +----------------------------------------------------------------+
3351 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
3352 * +----------------------------------------------------------------+
3353 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
3354 * +----------------------------------------------------------------+
3355 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3356 *
3357 * Extended Data Descriptor (DTYP=0x1)
3358 * +----------------------------------------------------------------+
3359 * 0 | Buffer Address [63:0] |
3360 * +----------------------------------------------------------------+
3361 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
3362 * +----------------------------------------------------------------+
3363 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3364 */
e29b5d8f
TD		 3365 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestmp bi->skb\n");
3366 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestmp bi->skb\n");
b04e36ba
TD		 3367
3368 if (!netif_msg_tx_done(adapter))
3369 goto rx_ring_summary;
3370
3371 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
3372 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
3373 struct e1000_buffer *buffer_info = &tx_ring->buffer_info[i];
dd7f5c9e 3374 struct my_u { __le64 a; __le64 b; };
b04e36ba 3375 struct my_u *u = (struct my_u *)tx_desc;
e29b5d8f
TD		 3376 const char *type;
3377
b04e36ba 3378 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
e29b5d8f 3379 type = "NTC/U";
b04e36ba 3380 else if (i == tx_ring->next_to_use)
e29b5d8f 3381 type = "NTU";
b04e36ba 3382 else if (i == tx_ring->next_to_clean)
e29b5d8f 3383 type = "NTC";
b04e36ba 3384 else
e29b5d8f 3385 type = "";
b04e36ba 3386
e29b5d8f
TD		 3387 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p %s\n",
3388 ((le64_to_cpu(u->b) & (1<<20)) ? 'd' : 'c'), i,
3389 le64_to_cpu(u->a), le64_to_cpu(u->b),
3390 (u64)buffer_info->dma, buffer_info->length,
3391 buffer_info->next_to_watch,
3392 (u64)buffer_info->time_stamp, buffer_info->skb, type);
b04e36ba
TD		 3393 }
3394
3395rx_ring_summary:
6cfbd97b 3396 /* receive dump */
b04e36ba
TD		 3397 pr_info("\nRX Desc ring dump\n");
3398
3399 /* Legacy Receive Descriptor Format
3400 *
3401 * +-----------------------------------------------------+
3402 * | Buffer Address [63:0] |
3403 * +-----------------------------------------------------+
3404 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
3405 * +-----------------------------------------------------+
3406 * 63 48 47 40 39 32 31 16 15 0
3407 */
e29b5d8f 3408 pr_info("R[desc] [address 63:0 ] [vl er S cks ln] [bi->dma ] [bi->skb]\n");
b04e36ba
TD		 3409
3410 if (!netif_msg_rx_status(adapter))
3411 goto exit;
3412
3413 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
3414 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i);
3415 struct e1000_buffer *buffer_info = &rx_ring->buffer_info[i];
dd7f5c9e 3416 struct my_u { __le64 a; __le64 b; };
b04e36ba 3417 struct my_u *u = (struct my_u *)rx_desc;
e29b5d8f
TD		 3418 const char *type;
3419
b04e36ba 3420 if (i == rx_ring->next_to_use)
e29b5d8f 3421 type = "NTU";
b04e36ba 3422 else if (i == rx_ring->next_to_clean)
e29b5d8f 3423 type = "NTC";
b04e36ba 3424 else
e29b5d8f 3425 type = "";
b04e36ba 3426
e29b5d8f
TD		 3427 pr_info("R[0x%03X] %016llX %016llX %016llX %p %s\n",
3428 i, le64_to_cpu(u->a), le64_to_cpu(u->b),
3429 (u64)buffer_info->dma, buffer_info->skb, type);
b04e36ba
TD		 3430 } /* for */
3431
3432 /* dump the descriptor caches */
3433 /* rx */
e29b5d8f 3434 pr_info("Rx descriptor cache in 64bit format\n");
b04e36ba 3435 for (i = 0x6000; i <= 0x63FF ; i += 0x10) {
e29b5d8f
TD		 3436 pr_info("R%04X: %08X|%08X %08X|%08X\n",
3437 i,
3438 readl(adapter->hw.hw_addr + i+4),
3439 readl(adapter->hw.hw_addr + i),
3440 readl(adapter->hw.hw_addr + i+12),
3441 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3442 }
3443 /* tx */
e29b5d8f 3444 pr_info("Tx descriptor cache in 64bit format\n");
b04e36ba 3445 for (i = 0x7000; i <= 0x73FF ; i += 0x10) {
e29b5d8f
TD		 3446 pr_info("T%04X: %08X|%08X %08X|%08X\n",
3447 i,
3448 readl(adapter->hw.hw_addr + i+4),
3449 readl(adapter->hw.hw_addr + i),
3450 readl(adapter->hw.hw_addr + i+12),
3451 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3452 }
3453exit:
3454 return;
3455}
3456
1da177e4
LT		 3457/**
3458 * e1000_tx_timeout - Respond to a Tx Hang
3459 * @netdev: network interface device structure
3460 **/
64798845 3461static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3462{
60490fe0 3463 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3464
3465 /* Do the reset outside of interrupt context */
87041639
JK		 3466 adapter->tx_timeout_count++;
3467 schedule_work(&adapter->reset_task);
1da177e4
LT		 3468}
3469
64798845 3470static void e1000_reset_task(struct work_struct *work)
1da177e4 3471{
65f27f38
DH		 3472 struct e1000_adapter *adapter =
3473 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3474
b04e36ba 3475 e_err(drv, "Reset adapter\n");
b2f963bf 3476 e1000_reinit_locked(adapter);
1da177e4
LT		 3477}
3478
3479/**
3480 * e1000_get_stats - Get System Network Statistics
3481 * @netdev: network interface device structure
3482 *
3483 * Returns the address of the device statistics structure.
a4010afe 3484 * The statistics are actually updated from the watchdog.
1da177e4 3485 **/
64798845 3486static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3487{
6b7660cd 3488 /* only return the current stats */
5fe31def 3489 return &netdev->stats;
1da177e4
LT		 3490}
3491
3492/**
3493 * e1000_change_mtu - Change the Maximum Transfer Unit
3494 * @netdev: network interface device structure
3495 * @new_mtu: new value for maximum frame size
3496 *
3497 * Returns 0 on success, negative on failure
3498 **/
64798845 3499static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3500{
60490fe0 3501 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3502 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3503 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3504
96838a40
JB		 3505 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3506 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
feb8f478 3507 e_err(probe, "Invalid MTU setting\n");
1da177e4 3508 return -EINVAL;
2d7edb92 3509 }
1da177e4 3510
997f5cbd 3511 /* Adapter-specific max frame size limits. */
1dc32918 3512 switch (hw->mac_type) {
9e2feace 3513 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3514 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
feb8f478 3515 e_err(probe, "Jumbo Frames not supported.\n");
2d7edb92 3516 return -EINVAL;
2d7edb92 3517 }
997f5cbd 3518 break;
997f5cbd
JK		 3519 default:
3520 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3521 break;
1da177e4
LT		 3522 }
3523
3d6114e7
JB		 3524 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3525 msleep(1);
3526 /* e1000_down has a dependency on max_frame_size */
3527 hw->max_frame_size = max_frame;
3528 if (netif_running(netdev))
3529 e1000_down(adapter);
3530
87f5032e 3531 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3532 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3533 * larger slab size.
3534 * i.e. RXBUFFER_2048 --> size-4096 slab
6cfbd97b
JK		 3535 * however with the new *_jumbo_rx* routines, jumbo receives will use
3536 * fragmented skbs
3537 */
9e2feace 3538
9926146b 3539 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3540 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3541 else
3542#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3543 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3544#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3545 adapter->rx_buffer_len = PAGE_SIZE;
3546#endif
9e2feace
AK		 3547
3548 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3549 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3550 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3551 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3552 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3553
675ad473
ET		 3554 pr_info("%s changing MTU from %d to %d\n",
3555 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3556 netdev->mtu = new_mtu;
3557
2db10a08 3558 if (netif_running(netdev))
3d6114e7
JB		 3559 e1000_up(adapter);
3560 else
3561 e1000_reset(adapter);
3562
3563 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3564
1da177e4
LT		 3565 return 0;
3566}
3567
3568/**
3569 * e1000_update_stats - Update the board statistics counters
3570 * @adapter: board private structure
3571 **/
64798845 3572void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3573{
5fe31def 3574 struct net_device *netdev = adapter->netdev;
1da177e4 3575 struct e1000_hw *hw = &adapter->hw;
282f33c9 3576 struct pci_dev *pdev = adapter->pdev;
1da177e4 3577 unsigned long flags;
406874a7 3578 u16 phy_tmp;
1da177e4
LT		 3579
3580#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3581
6cfbd97b 3582 /* Prevent stats update while adapter is being reset, or if the pci
282f33c9
LV		 3583 * connection is down.
3584 */
9026729b 3585 if (adapter->link_speed == 0)
282f33c9 3586 return;
81b1955e 3587 if (pci_channel_offline(pdev))
9026729b
AK		 3588 return;
3589
1da177e4
LT		 3590 spin_lock_irqsave(&adapter->stats_lock, flags);
3591
828d055f 3592 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3593 * called from the interrupt context, so they must only
3594 * be written while holding adapter->stats_lock
3595 */
3596
1dc32918
JP		 3597 adapter->stats.crcerrs += er32(CRCERRS);
3598 adapter->stats.gprc += er32(GPRC);
3599 adapter->stats.gorcl += er32(GORCL);
3600 adapter->stats.gorch += er32(GORCH);
3601 adapter->stats.bprc += er32(BPRC);
3602 adapter->stats.mprc += er32(MPRC);
3603 adapter->stats.roc += er32(ROC);
3604
1532ecea
JB		 3605 adapter->stats.prc64 += er32(PRC64);
3606 adapter->stats.prc127 += er32(PRC127);
3607 adapter->stats.prc255 += er32(PRC255);
3608 adapter->stats.prc511 += er32(PRC511);
3609 adapter->stats.prc1023 += er32(PRC1023);
3610 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3611
3612 adapter->stats.symerrs += er32(SYMERRS);
3613 adapter->stats.mpc += er32(MPC);
3614 adapter->stats.scc += er32(SCC);
3615 adapter->stats.ecol += er32(ECOL);
3616 adapter->stats.mcc += er32(MCC);
3617 adapter->stats.latecol += er32(LATECOL);
3618 adapter->stats.dc += er32(DC);
3619 adapter->stats.sec += er32(SEC);
3620 adapter->stats.rlec += er32(RLEC);
3621 adapter->stats.xonrxc += er32(XONRXC);
3622 adapter->stats.xontxc += er32(XONTXC);
3623 adapter->stats.xoffrxc += er32(XOFFRXC);
3624 adapter->stats.xofftxc += er32(XOFFTXC);
3625 adapter->stats.fcruc += er32(FCRUC);
3626 adapter->stats.gptc += er32(GPTC);
3627 adapter->stats.gotcl += er32(GOTCL);
3628 adapter->stats.gotch += er32(GOTCH);
3629 adapter->stats.rnbc += er32(RNBC);
3630 adapter->stats.ruc += er32(RUC);
3631 adapter->stats.rfc += er32(RFC);
3632 adapter->stats.rjc += er32(RJC);
3633 adapter->stats.torl += er32(TORL);
3634 adapter->stats.torh += er32(TORH);
3635 adapter->stats.totl += er32(TOTL);
3636 adapter->stats.toth += er32(TOTH);
3637 adapter->stats.tpr += er32(TPR);
3638
1532ecea
JB		 3639 adapter->stats.ptc64 += er32(PTC64);
3640 adapter->stats.ptc127 += er32(PTC127);
3641 adapter->stats.ptc255 += er32(PTC255);
3642 adapter->stats.ptc511 += er32(PTC511);
3643 adapter->stats.ptc1023 += er32(PTC1023);
3644 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3645
3646 adapter->stats.mptc += er32(MPTC);
3647 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3648
3649 /* used for adaptive IFS */
3650
1dc32918 3651 hw->tx_packet_delta = er32(TPT);
1da177e4 3652 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3653 hw->collision_delta = er32(COLC);
1da177e4
LT		 3654 adapter->stats.colc += hw->collision_delta;
3655
96838a40 3656 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3657 adapter->stats.algnerrc += er32(ALGNERRC);
3658 adapter->stats.rxerrc += er32(RXERRC);
3659 adapter->stats.tncrs += er32(TNCRS);
3660 adapter->stats.cexterr += er32(CEXTERR);
3661 adapter->stats.tsctc += er32(TSCTC);
3662 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3663 }
3664
3665 /* Fill out the OS statistics structure */
5fe31def
AK		 3666 netdev->stats.multicast = adapter->stats.mprc;
3667 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3668
3669 /* Rx Errors */
3670
87041639 3671 /* RLEC on some newer hardware can be incorrect so build
6cfbd97b
JK		 3672 * our own version based on RUC and ROC
3673 */
5fe31def 3674 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3675 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3676 adapter->stats.ruc + adapter->stats.roc +
3677 adapter->stats.cexterr;
49559854 3678 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3679 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3680 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3681 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3682 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3683
3684 /* Tx Errors */
49559854 3685 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3686 netdev->stats.tx_errors = adapter->stats.txerrc;
3687 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3688 netdev->stats.tx_window_errors = adapter->stats.latecol;
3689 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3690 if (hw->bad_tx_carr_stats_fd &&
167fb284 3691 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3692 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3693 adapter->stats.tncrs = 0;
3694 }
1da177e4
LT		 3695
3696 /* Tx Dropped needs to be maintained elsewhere */
3697
3698 /* Phy Stats */
96838a40
JB		 3699 if (hw->media_type == e1000_media_type_copper) {
3700 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3701 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3702 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3703 adapter->phy_stats.idle_errors += phy_tmp;
3704 }
3705
96838a40 3706 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3707 (hw->phy_type == e1000_phy_m88) &&
3708 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3709 adapter->phy_stats.receive_errors += phy_tmp;
3710 }
3711
15e376b4 3712 /* Management Stats */
1dc32918
JP		 3713 if (hw->has_smbus) {
3714 adapter->stats.mgptc += er32(MGTPTC);
3715 adapter->stats.mgprc += er32(MGTPRC);
3716 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3717 }
3718
1da177e4
LT		 3719 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3720}
9ac98284 3721
1da177e4
LT		 3722/**
3723 * e1000_intr - Interrupt Handler
3724 * @irq: interrupt number
3725 * @data: pointer to a network interface device structure
1da177e4 3726 **/
64798845 3727static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3728{
3729 struct net_device *netdev = data;
60490fe0 3730 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3731 struct e1000_hw *hw = &adapter->hw;
1532ecea 3732 u32 icr = er32(ICR);
c3570acb 3733
4c11b8ad 3734 if (unlikely((!icr)))
835bb129
JB		 3735 return IRQ_NONE; /* Not our interrupt */
3736
6cfbd97b 3737 /* we might have caused the interrupt, but the above
4c11b8ad
JB		 3738 * read cleared it, and just in case the driver is
3739 * down there is nothing to do so return handled
3740 */
3741 if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
3742 return IRQ_HANDLED;
3743
96838a40 3744 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3745 hw->get_link_status = 1;
1314bbf3
AK		 3746 /* guard against interrupt when we're going down */
3747 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 3748 schedule_delayed_work(&adapter->watchdog_task, 1);
1da177e4
LT		 3749 }
3750
1532ecea
JB		 3751 /* disable interrupts, without the synchronize_irq bit */
3752 ew32(IMC, ~0);
3753 E1000_WRITE_FLUSH();
3754
288379f0 3755 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3756 adapter->total_tx_bytes = 0;
3757 adapter->total_tx_packets = 0;
3758 adapter->total_rx_bytes = 0;
3759 adapter->total_rx_packets = 0;
288379f0 3760 __napi_schedule(&adapter->napi);
a6c42322 3761 } else {
90fb5135 3762 /* this really should not happen! if it does it is basically a
6cfbd97b
JK		 3763 * bug, but not a hard error, so enable ints and continue
3764 */
a6c42322
JB		 3765 if (!test_bit(__E1000_DOWN, &adapter->flags))
3766 e1000_irq_enable(adapter);
3767 }
1da177e4 3768
1da177e4
LT		 3769 return IRQ_HANDLED;
3770}
3771
1da177e4
LT		 3772/**
3773 * e1000_clean - NAPI Rx polling callback
3774 * @adapter: board private structure
3775 **/
64798845 3776static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3777{
6cfbd97b
JK		 3778 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
3779 napi);
650b5a5c 3780 int tx_clean_complete = 0, work_done = 0;
581d708e 3781
650b5a5c 3782 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3783
650b5a5c 3784 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3785
650b5a5c 3786 if (!tx_clean_complete)
d2c7ddd6
DM		 3787 work_done = budget;
3788
53e52c72
DM		 3789 /* If budget not fully consumed, exit the polling mode */
3790 if (work_done < budget) {
835bb129
JB		 3791 if (likely(adapter->itr_setting & 3))
3792 e1000_set_itr(adapter);
288379f0 3793 napi_complete(napi);
a6c42322
JB		 3794 if (!test_bit(__E1000_DOWN, &adapter->flags))
3795 e1000_irq_enable(adapter);
1da177e4
LT		 3796 }
3797
bea3348e 3798 return work_done;
1da177e4
LT		 3799}
3800
1da177e4
LT		 3801/**
3802 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3803 * @adapter: board private structure
3804 **/
64798845
JP		 3805static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3806 struct e1000_tx_ring *tx_ring)
1da177e4 3807{
1dc32918 3808 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3809 struct net_device *netdev = adapter->netdev;
3810 struct e1000_tx_desc *tx_desc, *eop_desc;
3811 struct e1000_buffer *buffer_info;
3812 unsigned int i, eop;
2a1af5d7 3813 unsigned int count = 0;
835bb129 3814 unsigned int total_tx_bytes=0, total_tx_packets=0;
2f66fd36 3815 unsigned int bytes_compl = 0, pkts_compl = 0;
1da177e4
LT		 3816
3817 i = tx_ring->next_to_clean;
3818 eop = tx_ring->buffer_info[i].next_to_watch;
3819 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3820
ccfb342c
AD		 3821 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3822 (count < tx_ring->count)) {
843f4267 3823 bool cleaned = false;
2d0bb1c1 3824 rmb(); /* read buffer_info after eop_desc */
843f4267 3825 for ( ; !cleaned; count++) {
1da177e4
LT		 3826 tx_desc = E1000_TX_DESC(*tx_ring, i);
3827 buffer_info = &tx_ring->buffer_info[i];
3828 cleaned = (i == eop);
3829
835bb129 3830 if (cleaned) {
31c15a2f
DN		 3831 total_tx_packets += buffer_info->segs;
3832 total_tx_bytes += buffer_info->bytecount;
2f66fd36
OESC		 3833 if (buffer_info->skb) {
3834 bytes_compl += buffer_info->skb->len;
3835 pkts_compl++;
3836 }
3837
835bb129 3838 }
fd803241 3839 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3840 tx_desc->upper.data = 0;
1da177e4 3841
96838a40 3842 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3843 }
581d708e 3844
1da177e4
LT		 3845 eop = tx_ring->buffer_info[i].next_to_watch;
3846 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3847 }
3848
3849 tx_ring->next_to_clean = i;
3850
2f66fd36
OESC		 3851 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
3852
77b2aad5 3853#define TX_WAKE_THRESHOLD 32
843f4267 3854 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3855 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3856 /* Make sure that anybody stopping the queue after this
3857 * sees the new next_to_clean.
3858 */
3859 smp_mb();
cdd7549e
JB		 3860
3861 if (netif_queue_stopped(netdev) &&
3862 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3863 netif_wake_queue(netdev);
fcfb1224
JB		 3864 ++adapter->restart_queue;
3865 }
77b2aad5 3866 }
2648345f 3867
581d708e 3868 if (adapter->detect_tx_hung) {
2648345f 3869 /* Detect a transmit hang in hardware, this serializes the
6cfbd97b
JK		 3870 * check with the clearing of time_stamp and movement of i
3871 */
c3033b01 3872 adapter->detect_tx_hung = false;
cdd7549e
JB		 3873 if (tx_ring->buffer_info[eop].time_stamp &&
3874 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
6cfbd97b 3875 (adapter->tx_timeout_factor * HZ)) &&
8e95a202 3876 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3877
3878 /* detected Tx unit hang */
feb8f478 3879 e_err(drv, "Detected Tx Unit Hang\n"
675ad473
ET		 3880 " Tx Queue <%lu>\n"
3881 " TDH <%x>\n"
3882 " TDT <%x>\n"
3883 " next_to_use <%x>\n"
3884 " next_to_clean <%x>\n"
3885 "buffer_info[next_to_clean]\n"
3886 " time_stamp <%lx>\n"
3887 " next_to_watch <%x>\n"
3888 " jiffies <%lx>\n"
3889 " next_to_watch.status <%x>\n",
49a45a06 3890 (unsigned long)(tx_ring - adapter->tx_ring),
1dc32918
JP		 3891 readl(hw->hw_addr + tx_ring->tdh),
3892 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3893 tx_ring->next_to_use,
392137fa 3894 tx_ring->next_to_clean,
cdd7549e 3895 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3896 eop,
3897 jiffies,
3898 eop_desc->upper.fields.status);
b04e36ba 3899 e1000_dump(adapter);
1da177e4 3900 netif_stop_queue(netdev);
70b8f1e1 3901 }
1da177e4 3902 }
835bb129
JB		 3903 adapter->total_tx_bytes += total_tx_bytes;
3904 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3905 netdev->stats.tx_bytes += total_tx_bytes;
3906 netdev->stats.tx_packets += total_tx_packets;
807540ba 3907 return count < tx_ring->count;
1da177e4
LT		 3908}
3909
3910/**
3911 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3912 * @adapter: board private structure
3913 * @status_err: receive descriptor status and error fields
3914 * @csum: receive descriptor csum field
3915 * @sk_buff: socket buffer with received data
1da177e4 3916 **/
64798845
JP		 3917static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3918 u32 csum, struct sk_buff *skb)
1da177e4 3919{
1dc32918 3920 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3921 u16 status = (u16)status_err;
3922 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 3923
3924 skb_checksum_none_assert(skb);
2d7edb92 3925
1da177e4 3926 /* 82543 or newer only */
1dc32918 3927 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3928 /* Ignore Checksum bit is set */
96838a40 3929 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3930 /* TCP/UDP checksum error bit is set */
96838a40 3931 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3932 /* let the stack verify checksum errors */
1da177e4 3933 adapter->hw_csum_err++;
2d7edb92
MC		 3934 return;
3935 }
3936 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3937 if (!(status & E1000_RXD_STAT_TCPCS))
3938 return;
3939
2d7edb92
MC		 3940 /* It must be a TCP or UDP packet with a valid checksum */
3941 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3942 /* TCP checksum is good */
3943 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3944 }
2d7edb92 3945 adapter->hw_csum_good++;
1da177e4
LT		 3946}
3947
edbbb3ca
JB		 3948/**
3949 * e1000_consume_page - helper function
3950 **/
3951static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
6cfbd97b 3952 u16 length)
edbbb3ca
JB		 3953{
3954 bi->page = NULL;
3955 skb->len += length;
3956 skb->data_len += length;
ed64b3cc 3957 skb->truesize += PAGE_SIZE;
edbbb3ca
JB		 3958}
3959
3960/**
3961 * e1000_receive_skb - helper function to handle rx indications
3962 * @adapter: board private structure
3963 * @status: descriptor status field as written by hardware
3964 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3965 * @skb: pointer to sk_buff to be indicated to stack
3966 */
3967static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3968 __le16 vlan, struct sk_buff *skb)
3969{
6a08d194
JB		 3970 skb->protocol = eth_type_trans(skb, adapter->netdev);
3971
5622e404
JP		 3972 if (status & E1000_RXD_STAT_VP) {
3973 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
3974
86a9bad3 3975 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
5622e404
JP		 3976 }
3977 napi_gro_receive(&adapter->napi, skb);
edbbb3ca
JB		 3978}
3979
3980/**
3981 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
3982 * @adapter: board private structure
3983 * @rx_ring: ring to clean
3984 * @work_done: amount of napi work completed this call
3985 * @work_to_do: max amount of work allowed for this call to do
3986 *
3987 * the return value indicates whether actual cleaning was done, there
3988 * is no guarantee that everything was cleaned
3989 */
3990static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
3991 struct e1000_rx_ring *rx_ring,
3992 int *work_done, int work_to_do)
3993{
3994 struct e1000_hw *hw = &adapter->hw;
3995 struct net_device *netdev = adapter->netdev;
3996 struct pci_dev *pdev = adapter->pdev;
3997 struct e1000_rx_desc *rx_desc, *next_rxd;
3998 struct e1000_buffer *buffer_info, *next_buffer;
3999 unsigned long irq_flags;
4000 u32 length;
4001 unsigned int i;
4002 int cleaned_count = 0;
4003 bool cleaned = false;
4004 unsigned int total_rx_bytes=0, total_rx_packets=0;
4005
4006 i = rx_ring->next_to_clean;
4007 rx_desc = E1000_RX_DESC(*rx_ring, i);
4008 buffer_info = &rx_ring->buffer_info[i];
4009
4010 while (rx_desc->status & E1000_RXD_STAT_DD) {
4011 struct sk_buff *skb;
4012 u8 status;
4013
4014 if (*work_done >= work_to_do)
4015 break;
4016 (*work_done)++;
2d0bb1c1 4017 rmb(); /* read descriptor and rx_buffer_info after status DD */
edbbb3ca
JB		 4018
4019 status = rx_desc->status;
4020 skb = buffer_info->skb;
4021 buffer_info->skb = NULL;
4022
4023 if (++i == rx_ring->count) i = 0;
4024 next_rxd = E1000_RX_DESC(*rx_ring, i);
4025 prefetch(next_rxd);
4026
4027 next_buffer = &rx_ring->buffer_info[i];
4028
4029 cleaned = true;
4030 cleaned_count++;
b16f53be
NN		 4031 dma_unmap_page(&pdev->dev, buffer_info->dma,
4032 buffer_info->length, DMA_FROM_DEVICE);
edbbb3ca
JB		 4033 buffer_info->dma = 0;
4034
4035 length = le16_to_cpu(rx_desc->length);
4036
4037 /* errors is only valid for DD + EOP descriptors */
4038 if (unlikely((status & E1000_RXD_STAT_EOP) &&
4039 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
a3060858
SAS		 4040 u8 *mapped;
4041 u8 last_byte;
4042
4043 mapped = page_address(buffer_info->page);
4044 last_byte = *(mapped + length - 1);
edbbb3ca
JB		 4045 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4046 last_byte)) {
4047 spin_lock_irqsave(&adapter->stats_lock,
6cfbd97b 4048 irq_flags);
edbbb3ca 4049 e1000_tbi_adjust_stats(hw, &adapter->stats,
281a8f24 4050 length, mapped);
edbbb3ca 4051 spin_unlock_irqrestore(&adapter->stats_lock,
6cfbd97b 4052 irq_flags);
edbbb3ca
JB		 4053 length--;
4054 } else {
e825b731
BG		 4055 if (netdev->features & NETIF_F_RXALL)
4056 goto process_skb;
edbbb3ca
JB		 4057 /* recycle both page and skb */
4058 buffer_info->skb = skb;
4059 /* an error means any chain goes out the window
6cfbd97b
JK		 4060 * too
4061 */
edbbb3ca
JB		 4062 if (rx_ring->rx_skb_top)
4063 dev_kfree_skb(rx_ring->rx_skb_top);
4064 rx_ring->rx_skb_top = NULL;
4065 goto next_desc;
4066 }
4067 }
4068
4069#define rxtop rx_ring->rx_skb_top
e825b731 4070process_skb:
edbbb3ca
JB		 4071 if (!(status & E1000_RXD_STAT_EOP)) {
4072 /* this descriptor is only the beginning (or middle) */
4073 if (!rxtop) {
4074 /* this is the beginning of a chain */
4075 rxtop = skb;
4076 skb_fill_page_desc(rxtop, 0, buffer_info->page,
6cfbd97b 4077 0, length);
edbbb3ca
JB		 4078 } else {
4079 /* this is the middle of a chain */
4080 skb_fill_page_desc(rxtop,
4081 skb_shinfo(rxtop)->nr_frags,
4082 buffer_info->page, 0, length);
4083 /* re-use the skb, only consumed the page */
4084 buffer_info->skb = skb;
4085 }
4086 e1000_consume_page(buffer_info, rxtop, length);
4087 goto next_desc;
4088 } else {
4089 if (rxtop) {
4090 /* end of the chain */
4091 skb_fill_page_desc(rxtop,
4092 skb_shinfo(rxtop)->nr_frags,
4093 buffer_info->page, 0, length);
4094 /* re-use the current skb, we only consumed the
6cfbd97b
JK		 4095 * page
4096 */
edbbb3ca
JB		 4097 buffer_info->skb = skb;
4098 skb = rxtop;
4099 rxtop = NULL;
4100 e1000_consume_page(buffer_info, skb, length);
4101 } else {
4102 /* no chain, got EOP, this buf is the packet
6cfbd97b
JK		 4103 * copybreak to save the put_page/alloc_page
4104 */
edbbb3ca
JB		 4105 if (length <= copybreak &&
4106 skb_tailroom(skb) >= length) {
4107 u8 *vaddr;
4679026d 4108 vaddr = kmap_atomic(buffer_info->page);
6cfbd97b
JK		 4109 memcpy(skb_tail_pointer(skb), vaddr,
4110 length);
4679026d 4111 kunmap_atomic(vaddr);
edbbb3ca 4112 /* re-use the page, so don't erase
6cfbd97b
JK		 4113 * buffer_info->page
4114 */
edbbb3ca
JB		 4115 skb_put(skb, length);
4116 } else {
4117 skb_fill_page_desc(skb, 0,
6cfbd97b
JK		 4118 buffer_info->page, 0,
4119 length);
edbbb3ca 4120 e1000_consume_page(buffer_info, skb,
6cfbd97b 4121 length);
edbbb3ca
JB		 4122 }
4123 }
4124 }
4125
4126 /* Receive Checksum Offload XXX recompute due to CRC strip? */
4127 e1000_rx_checksum(adapter,
6cfbd97b
JK		 4128 (u32)(status) |
4129 ((u32)(rx_desc->errors) << 24),
4130 le16_to_cpu(rx_desc->csum), skb);
edbbb3ca 4131
b0d1562c
BG		 4132 total_rx_bytes += (skb->len - 4); /* don't count FCS */
4133 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4134 pskb_trim(skb, skb->len - 4);
edbbb3ca
JB		 4135 total_rx_packets++;
4136
4137 /* eth type trans needs skb->data to point to something */
4138 if (!pskb_may_pull(skb, ETH_HLEN)) {
feb8f478 4139 e_err(drv, "pskb_may_pull failed.\n");
edbbb3ca
JB		 4140 dev_kfree_skb(skb);
4141 goto next_desc;
4142 }
4143
edbbb3ca
JB		 4144 e1000_receive_skb(adapter, status, rx_desc->special, skb);
4145
4146next_desc:
4147 rx_desc->status = 0;
4148
4149 /* return some buffers to hardware, one at a time is too slow */
4150 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4151 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4152 cleaned_count = 0;
4153 }
4154
4155 /* use prefetched values */
4156 rx_desc = next_rxd;
4157 buffer_info = next_buffer;
4158 }
4159 rx_ring->next_to_clean = i;
4160
4161 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4162 if (cleaned_count)
4163 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4164
4165 adapter->total_rx_packets += total_rx_packets;
4166 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4167 netdev->stats.rx_bytes += total_rx_bytes;
4168 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 4169 return cleaned;
4170}
4171
6cfbd97b 4172/* this should improve performance for small packets with large amounts
57bf6eef
JP		 4173 * of reassembly being done in the stack
4174 */
4175static void e1000_check_copybreak(struct net_device *netdev,
4176 struct e1000_buffer *buffer_info,
4177 u32 length, struct sk_buff **skb)
4178{
4179 struct sk_buff *new_skb;
4180
4181 if (length > copybreak)
4182 return;
4183
4184 new_skb = netdev_alloc_skb_ip_align(netdev, length);
4185 if (!new_skb)
4186 return;
4187
4188 skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN,
4189 (*skb)->data - NET_IP_ALIGN,
4190 length + NET_IP_ALIGN);
4191 /* save the skb in buffer_info as good */
4192 buffer_info->skb = *skb;
4193 *skb = new_skb;
4194}
4195
1da177e4 4196/**
2d7edb92 4197 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 4198 * @adapter: board private structure
edbbb3ca
JB		 4199 * @rx_ring: ring to clean
4200 * @work_done: amount of napi work completed this call
4201 * @work_to_do: max amount of work allowed for this call to do
4202 */
64798845
JP		 4203static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
4204 struct e1000_rx_ring *rx_ring,
4205 int *work_done, int work_to_do)
1da177e4 4206{
1dc32918 4207 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4208 struct net_device *netdev = adapter->netdev;
4209 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 4210 struct e1000_rx_desc *rx_desc, *next_rxd;
4211 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 4212 unsigned long flags;
406874a7 4213 u32 length;
1da177e4 4214 unsigned int i;
72d64a43 4215 int cleaned_count = 0;
c3033b01 4216 bool cleaned = false;
835bb129 4217 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4218
4219 i = rx_ring->next_to_clean;
4220 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4221 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4222
b92ff8ee 4223 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4224 struct sk_buff *skb;
a292ca6e 4225 u8 status;
90fb5135 4226
96838a40 4227 if (*work_done >= work_to_do)
1da177e4
LT		 4228 break;
4229 (*work_done)++;
2d0bb1c1 4230 rmb(); /* read descriptor and rx_buffer_info after status DD */
c3570acb 4231
a292ca6e 4232 status = rx_desc->status;
b92ff8ee 4233 skb = buffer_info->skb;
86c3d59f
JB		 4234 buffer_info->skb = NULL;
4235
30320be8
JK		 4236 prefetch(skb->data - NET_IP_ALIGN);
4237
86c3d59f
JB		 4238 if (++i == rx_ring->count) i = 0;
4239 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4240 prefetch(next_rxd);
4241
86c3d59f 4242 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4243
c3033b01 4244 cleaned = true;
72d64a43 4245 cleaned_count++;
b16f53be
NN		 4246 dma_unmap_single(&pdev->dev, buffer_info->dma,
4247 buffer_info->length, DMA_FROM_DEVICE);
679be3ba 4248 buffer_info->dma = 0;
1da177e4 4249
1da177e4 4250 length = le16_to_cpu(rx_desc->length);
ea30e119 4251 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 4252 * packet, if thats the case we need to toss it. In fact, we
4253 * to toss every packet with the EOP bit clear and the next
4254 * frame that _does_ have the EOP bit set, as it is by
4255 * definition only a frame fragment
4256 */
4257 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
4258 adapter->discarding = true;
4259
4260 if (adapter->discarding) {
a1415ee6 4261 /* All receives must fit into a single buffer */
feb8f478 4262 e_dbg("Receive packet consumed multiple buffers\n");
864c4e45 4263 /* recycle */
8fc897b0 4264 buffer_info->skb = skb;
40a14dea
JB		 4265 if (status & E1000_RXD_STAT_EOP)
4266 adapter->discarding = false;
1da177e4
LT		 4267 goto next_desc;
4268 }
4269
96838a40 4270 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 4271 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4272 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4273 last_byte)) {
1da177e4 4274 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4275 e1000_tbi_adjust_stats(hw, &adapter->stats,
6cfbd97b 4276 length, skb->data);
1da177e4 4277 spin_unlock_irqrestore(&adapter->stats_lock,
6cfbd97b 4278 flags);
1da177e4
LT		 4279 length--;
4280 } else {
e825b731
BG		 4281 if (netdev->features & NETIF_F_RXALL)
4282 goto process_skb;
9e2feace
AK		 4283 /* recycle */
4284 buffer_info->skb = skb;
1da177e4
LT		 4285 goto next_desc;
4286 }
1cb5821f 4287 }
1da177e4 4288
e825b731 4289process_skb:
b0d1562c 4290 total_rx_bytes += (length - 4); /* don't count FCS */
835bb129
JB		 4291 total_rx_packets++;
4292
b0d1562c
BG		 4293 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4294 /* adjust length to remove Ethernet CRC, this must be
4295 * done after the TBI_ACCEPT workaround above
4296 */
4297 length -= 4;
4298
57bf6eef
JP		 4299 e1000_check_copybreak(netdev, buffer_info, length, &skb);
4300
996695de 4301 skb_put(skb, length);
1da177e4
LT		 4302
4303 /* Receive Checksum Offload */
a292ca6e 4304 e1000_rx_checksum(adapter,
406874a7
JP		 4305 (u32)(status) |
4306 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4307 le16_to_cpu(rx_desc->csum), skb);
96838a40 4308
edbbb3ca 4309 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 4310
1da177e4
LT		 4311next_desc:
4312 rx_desc->status = 0;
1da177e4 4313
72d64a43
JK		 4314 /* return some buffers to hardware, one at a time is too slow */
4315 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4316 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4317 cleaned_count = 0;
4318 }
4319
30320be8 4320 /* use prefetched values */
86c3d59f
JB		 4321 rx_desc = next_rxd;
4322 buffer_info = next_buffer;
1da177e4 4323 }
1da177e4 4324 rx_ring->next_to_clean = i;
72d64a43
JK		 4325
4326 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4327 if (cleaned_count)
4328 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4329
835bb129
JB		 4330 adapter->total_rx_packets += total_rx_packets;
4331 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4332 netdev->stats.rx_bytes += total_rx_bytes;
4333 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4334 return cleaned;
4335}
4336
edbbb3ca
JB		 4337/**
4338 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
4339 * @adapter: address of board private structure
4340 * @rx_ring: pointer to receive ring structure
4341 * @cleaned_count: number of buffers to allocate this pass
4342 **/
edbbb3ca
JB		 4343static void
4344e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
6cfbd97b 4345 struct e1000_rx_ring *rx_ring, int cleaned_count)
edbbb3ca
JB		 4346{
4347 struct net_device *netdev = adapter->netdev;
4348 struct pci_dev *pdev = adapter->pdev;
4349 struct e1000_rx_desc *rx_desc;
4350 struct e1000_buffer *buffer_info;
4351 struct sk_buff *skb;
4352 unsigned int i;
89d71a66 4353 unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
edbbb3ca
JB		 4354
4355 i = rx_ring->next_to_use;
4356 buffer_info = &rx_ring->buffer_info[i];
4357
4358 while (cleaned_count--) {
4359 skb = buffer_info->skb;
4360 if (skb) {
4361 skb_trim(skb, 0);
4362 goto check_page;
4363 }
4364
89d71a66 4365 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 4366 if (unlikely(!skb)) {
4367 /* Better luck next round */
4368 adapter->alloc_rx_buff_failed++;
4369 break;
4370 }
4371
edbbb3ca
JB		 4372 buffer_info->skb = skb;
4373 buffer_info->length = adapter->rx_buffer_len;
4374check_page:
4375 /* allocate a new page if necessary */
4376 if (!buffer_info->page) {
4377 buffer_info->page = alloc_page(GFP_ATOMIC);
4378 if (unlikely(!buffer_info->page)) {
4379 adapter->alloc_rx_buff_failed++;
4380 break;
4381 }
4382 }
4383
b5abb028 4384 if (!buffer_info->dma) {
b16f53be 4385 buffer_info->dma = dma_map_page(&pdev->dev,
6cfbd97b 4386 buffer_info->page, 0,
b16f53be
NN		 4387 buffer_info->length,
4388 DMA_FROM_DEVICE);
4389 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB		 4390 put_page(buffer_info->page);
4391 dev_kfree_skb(skb);
4392 buffer_info->page = NULL;
4393 buffer_info->skb = NULL;
4394 buffer_info->dma = 0;
4395 adapter->alloc_rx_buff_failed++;
4396 break; /* while !buffer_info->skb */
4397 }
4398 }
edbbb3ca
JB		 4399
4400 rx_desc = E1000_RX_DESC(*rx_ring, i);
4401 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4402
4403 if (unlikely(++i == rx_ring->count))
4404 i = 0;
4405 buffer_info = &rx_ring->buffer_info[i];
4406 }
4407
4408 if (likely(rx_ring->next_to_use != i)) {
4409 rx_ring->next_to_use = i;
4410 if (unlikely(i-- == 0))
4411 i = (rx_ring->count - 1);
4412
4413 /* Force memory writes to complete before letting h/w
4414 * know there are new descriptors to fetch. (Only
4415 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4416 * such as IA-64).
4417 */
edbbb3ca
JB		 4418 wmb();
4419 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4420 }
4421}
4422
1da177e4 4423/**
2d7edb92 4424 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4425 * @adapter: address of board private structure
4426 **/
64798845
JP		 4427static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4428 struct e1000_rx_ring *rx_ring,
4429 int cleaned_count)
1da177e4 4430{
1dc32918 4431 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4432 struct net_device *netdev = adapter->netdev;
4433 struct pci_dev *pdev = adapter->pdev;
4434 struct e1000_rx_desc *rx_desc;
4435 struct e1000_buffer *buffer_info;
4436 struct sk_buff *skb;
2648345f 4437 unsigned int i;
89d71a66 4438 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4439
4440 i = rx_ring->next_to_use;
4441 buffer_info = &rx_ring->buffer_info[i];
4442
a292ca6e 4443 while (cleaned_count--) {
ca6f7224
CH		 4444 skb = buffer_info->skb;
4445 if (skb) {
a292ca6e
JK		 4446 skb_trim(skb, 0);
4447 goto map_skb;
4448 }
4449
89d71a66 4450 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
96838a40 4451 if (unlikely(!skb)) {
1da177e4 4452 /* Better luck next round */
72d64a43 4453 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4454 break;
4455 }
4456
2648345f 4457 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4458 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4459 struct sk_buff *oldskb = skb;
feb8f478
ET		 4460 e_err(rx_err, "skb align check failed: %u bytes at "
4461 "%p\n", bufsz, skb->data);
2648345f 4462 /* Try again, without freeing the previous */
89d71a66 4463 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
2648345f 4464 /* Failed allocation, critical failure */
1da177e4
LT		 4465 if (!skb) {
4466 dev_kfree_skb(oldskb);
edbbb3ca 4467 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4468 break;
4469 }
2648345f 4470
1da177e4
LT		 4471 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4472 /* give up */
4473 dev_kfree_skb(skb);
4474 dev_kfree_skb(oldskb);
edbbb3ca 4475 adapter->alloc_rx_buff_failed++;
1da177e4 4476 break; /* while !buffer_info->skb */
1da177e4 4477 }
ca6f7224
CH		 4478
4479 /* Use new allocation */
4480 dev_kfree_skb(oldskb);
1da177e4 4481 }
1da177e4
LT		 4482 buffer_info->skb = skb;
4483 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4484map_skb:
b16f53be 4485 buffer_info->dma = dma_map_single(&pdev->dev,
1da177e4 4486 skb->data,
edbbb3ca 4487 buffer_info->length,
b16f53be
NN		 4488 DMA_FROM_DEVICE);
4489 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB		 4490 dev_kfree_skb(skb);
4491 buffer_info->skb = NULL;
4492 buffer_info->dma = 0;
4493 adapter->alloc_rx_buff_failed++;
4494 break; /* while !buffer_info->skb */
4495 }
1da177e4 4496
6cfbd97b 4497 /* XXX if it was allocated cleanly it will never map to a
edbbb3ca
JB		 4498 * boundary crossing
4499 */
4500
2648345f
MC		 4501 /* Fix for errata 23, can't cross 64kB boundary */
4502 if (!e1000_check_64k_bound(adapter,
4503 (void *)(unsigned long)buffer_info->dma,
4504 adapter->rx_buffer_len)) {
feb8f478
ET		 4505 e_err(rx_err, "dma align check failed: %u bytes at "
4506 "%p\n", adapter->rx_buffer_len,
675ad473 4507 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4508 dev_kfree_skb(skb);
4509 buffer_info->skb = NULL;
4510
b16f53be 4511 dma_unmap_single(&pdev->dev, buffer_info->dma,
1da177e4 4512 adapter->rx_buffer_len,
b16f53be 4513 DMA_FROM_DEVICE);
679be3ba 4514 buffer_info->dma = 0;
1da177e4 4515
edbbb3ca 4516 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4517 break; /* while !buffer_info->skb */
4518 }
1da177e4
LT		 4519 rx_desc = E1000_RX_DESC(*rx_ring, i);
4520 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4521
96838a40
JB		 4522 if (unlikely(++i == rx_ring->count))
4523 i = 0;
1da177e4
LT		 4524 buffer_info = &rx_ring->buffer_info[i];
4525 }
4526
b92ff8ee
JB		 4527 if (likely(rx_ring->next_to_use != i)) {
4528 rx_ring->next_to_use = i;
4529 if (unlikely(i-- == 0))
4530 i = (rx_ring->count - 1);
4531
4532 /* Force memory writes to complete before letting h/w
4533 * know there are new descriptors to fetch. (Only
4534 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4535 * such as IA-64).
4536 */
b92ff8ee 4537 wmb();
1dc32918 4538 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4539 }
1da177e4
LT		 4540}
4541
4542/**
4543 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4544 * @adapter:
4545 **/
64798845 4546static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4547{
1dc32918 4548 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4549 u16 phy_status;
4550 u16 phy_ctrl;
1da177e4 4551
1dc32918
JP		 4552 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4553 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4554 return;
4555
96838a40 4556 if (adapter->smartspeed == 0) {
1da177e4 4557 /* If Master/Slave config fault is asserted twice,
6cfbd97b
JK		 4558 * we assume back-to-back
4559 */
1dc32918 4560 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4561 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4562 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4563 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4564 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4565 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4566 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4567 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4568 phy_ctrl);
4569 adapter->smartspeed++;
1dc32918
JP		 4570 if (!e1000_phy_setup_autoneg(hw) &&
4571 !e1000_read_phy_reg(hw, PHY_CTRL,
6cfbd97b 4572 &phy_ctrl)) {
1da177e4
LT		 4573 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4574 MII_CR_RESTART_AUTO_NEG);
1dc32918 4575 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4576 phy_ctrl);
4577 }
4578 }
4579 return;
96838a40 4580 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4581 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4582 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4583 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4584 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4585 if (!e1000_phy_setup_autoneg(hw) &&
4586 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4587 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4588 MII_CR_RESTART_AUTO_NEG);
1dc32918 4589 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4590 }
4591 }
4592 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4593 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4594 adapter->smartspeed = 0;
4595}
4596
4597/**
4598 * e1000_ioctl -
4599 * @netdev:
4600 * @ifreq:
4601 * @cmd:
4602 **/
64798845 4603static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4604{
4605 switch (cmd) {
4606 case SIOCGMIIPHY:
4607 case SIOCGMIIREG:
4608 case SIOCSMIIREG:
4609 return e1000_mii_ioctl(netdev, ifr, cmd);
4610 default:
4611 return -EOPNOTSUPP;
4612 }
4613}
4614
4615/**
4616 * e1000_mii_ioctl -
4617 * @netdev:
4618 * @ifreq:
4619 * @cmd:
4620 **/
64798845
JP		 4621static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4622 int cmd)
1da177e4 4623{
60490fe0 4624 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4625 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4626 struct mii_ioctl_data *data = if_mii(ifr);
4627 int retval;
406874a7 4628 u16 mii_reg;
97876fc6 4629 unsigned long flags;
1da177e4 4630
1dc32918 4631 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4632 return -EOPNOTSUPP;
4633
4634 switch (cmd) {
4635 case SIOCGMIIPHY:
1dc32918 4636 data->phy_id = hw->phy_addr;
1da177e4
LT		 4637 break;
4638 case SIOCGMIIREG:
97876fc6 4639 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4640 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4641 &data->val_out)) {
4642 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4643 return -EIO;
97876fc6
MC		 4644 }
4645 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4646 break;
4647 case SIOCSMIIREG:
96838a40 4648 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4649 return -EFAULT;
4650 mii_reg = data->val_in;
97876fc6 4651 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4652 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4653 mii_reg)) {
4654 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4655 return -EIO;
97876fc6 4656 }
f0163ac4 4657 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4658 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4659 switch (data->reg_num) {
4660 case PHY_CTRL:
96838a40 4661 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4662 break;
96838a40 4663 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4664 hw->autoneg = 1;
4665 hw->autoneg_advertised = 0x2F;
1da177e4 4666 } else {
14ad2513 4667 u32 speed;
1da177e4 4668 if (mii_reg & 0x40)
14ad2513 4669 speed = SPEED_1000;
1da177e4 4670 else if (mii_reg & 0x2000)
14ad2513 4671 speed = SPEED_100;
1da177e4 4672 else
14ad2513
DD		 4673 speed = SPEED_10;
4674 retval = e1000_set_spd_dplx(
4675 adapter, speed,
4676 ((mii_reg & 0x100)
4677 ? DUPLEX_FULL :
4678 DUPLEX_HALF));
f0163ac4 4679 if (retval)
1da177e4
LT		 4680 return retval;
4681 }
2db10a08
AK		 4682 if (netif_running(adapter->netdev))
4683 e1000_reinit_locked(adapter);
4684 else
1da177e4
LT		 4685 e1000_reset(adapter);
4686 break;
4687 case M88E1000_PHY_SPEC_CTRL:
4688 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4689 if (e1000_phy_reset(hw))
1da177e4
LT		 4690 return -EIO;
4691 break;
4692 }
4693 } else {
4694 switch (data->reg_num) {
4695 case PHY_CTRL:
96838a40 4696 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4697 break;
2db10a08
AK		 4698 if (netif_running(adapter->netdev))
4699 e1000_reinit_locked(adapter);
4700 else
1da177e4
LT		 4701 e1000_reset(adapter);
4702 break;
4703 }
4704 }
4705 break;
4706 default:
4707 return -EOPNOTSUPP;
4708 }
4709 return E1000_SUCCESS;
4710}
4711
64798845 4712void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4713{
4714 struct e1000_adapter *adapter = hw->back;
2648345f 4715 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4716
96838a40 4717 if (ret_val)
feb8f478 4718 e_err(probe, "Error in setting MWI\n");
1da177e4
LT		 4719}
4720
64798845 4721void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4722{
4723 struct e1000_adapter *adapter = hw->back;
4724
4725 pci_clear_mwi(adapter->pdev);
4726}
4727
64798845 4728int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4729{
4730 struct e1000_adapter *adapter = hw->back;
4731 return pcix_get_mmrbc(adapter->pdev);
4732}
4733
64798845 4734void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4735{
4736 struct e1000_adapter *adapter = hw->back;
4737 pcix_set_mmrbc(adapter->pdev, mmrbc);
4738}
4739
64798845 4740void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4741{
4742 outl(value, port);
4743}
4744
5622e404
JP		 4745static bool e1000_vlan_used(struct e1000_adapter *adapter)
4746{
4747 u16 vid;
4748
4749 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4750 return true;
4751 return false;
4752}
4753
52f5509f
JP		 4754static void __e1000_vlan_mode(struct e1000_adapter *adapter,
4755 netdev_features_t features)
4756{
4757 struct e1000_hw *hw = &adapter->hw;
4758 u32 ctrl;
4759
4760 ctrl = er32(CTRL);
f646968f 4761 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
52f5509f
JP		 4762 /* enable VLAN tag insert/strip */
4763 ctrl |= E1000_CTRL_VME;
4764 } else {
4765 /* disable VLAN tag insert/strip */
4766 ctrl &= ~E1000_CTRL_VME;
4767 }
4768 ew32(CTRL, ctrl);
4769}
5622e404
JP		 4770static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
4771 bool filter_on)
1da177e4 4772{
1dc32918 4773 struct e1000_hw *hw = &adapter->hw;
5622e404 4774 u32 rctl;
1da177e4 4775
9150b76a
JB		 4776 if (!test_bit(__E1000_DOWN, &adapter->flags))
4777 e1000_irq_disable(adapter);
1da177e4 4778
52f5509f 4779 __e1000_vlan_mode(adapter, adapter->netdev->features);
5622e404 4780 if (filter_on) {
1532ecea
JB		 4781 /* enable VLAN receive filtering */
4782 rctl = er32(RCTL);
4783 rctl &= ~E1000_RCTL_CFIEN;
5622e404 4784 if (!(adapter->netdev->flags & IFF_PROMISC))
1532ecea
JB		 4785 rctl |= E1000_RCTL_VFE;
4786 ew32(RCTL, rctl);
4787 e1000_update_mng_vlan(adapter);
1da177e4 4788 } else {
1532ecea
JB		 4789 /* disable VLAN receive filtering */
4790 rctl = er32(RCTL);
4791 rctl &= ~E1000_RCTL_VFE;
4792 ew32(RCTL, rctl);
5622e404 4793 }
fd38d7a0 4794
5622e404
JP		 4795 if (!test_bit(__E1000_DOWN, &adapter->flags))
4796 e1000_irq_enable(adapter);
4797}
4798
c8f44aff 4799static void e1000_vlan_mode(struct net_device *netdev,
52f5509f 4800 netdev_features_t features)
5622e404
JP		 4801{
4802 struct e1000_adapter *adapter = netdev_priv(netdev);
5622e404
JP		 4803
4804 if (!test_bit(__E1000_DOWN, &adapter->flags))
4805 e1000_irq_disable(adapter);
4806
52f5509f 4807 __e1000_vlan_mode(adapter, features);
1da177e4 4808
9150b76a
JB		 4809 if (!test_bit(__E1000_DOWN, &adapter->flags))
4810 e1000_irq_enable(adapter);
1da177e4
LT		 4811}
4812
80d5c368
PM		 4813static int e1000_vlan_rx_add_vid(struct net_device *netdev,
4814 __be16 proto, u16 vid)
1da177e4 4815{
60490fe0 4816 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4817 struct e1000_hw *hw = &adapter->hw;
406874a7 4818 u32 vfta, index;
96838a40 4819
1dc32918 4820 if ((hw->mng_cookie.status &
96838a40
JB		 4821 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4822 (vid == adapter->mng_vlan_id))
8e586137 4823 return 0;
5622e404
JP		 4824
4825 if (!e1000_vlan_used(adapter))
4826 e1000_vlan_filter_on_off(adapter, true);
4827
1da177e4
LT		 4828 /* add VID to filter table */
4829 index = (vid >> 5) & 0x7F;
1dc32918 4830 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4831 vfta |= (1 << (vid & 0x1F));
1dc32918 4832 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4833
4834 set_bit(vid, adapter->active_vlans);
8e586137
JP		 4835
4836 return 0;
1da177e4
LT		 4837}
4838
80d5c368
PM		 4839static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
4840 __be16 proto, u16 vid)
1da177e4 4841{
60490fe0 4842 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4843 struct e1000_hw *hw = &adapter->hw;
406874a7 4844 u32 vfta, index;
1da177e4 4845
9150b76a
JB		 4846 if (!test_bit(__E1000_DOWN, &adapter->flags))
4847 e1000_irq_disable(adapter);
9150b76a
JB		 4848 if (!test_bit(__E1000_DOWN, &adapter->flags))
4849 e1000_irq_enable(adapter);
1da177e4
LT		 4850
4851 /* remove VID from filter table */
4852 index = (vid >> 5) & 0x7F;
1dc32918 4853 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4854 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4855 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4856
4857 clear_bit(vid, adapter->active_vlans);
4858
4859 if (!e1000_vlan_used(adapter))
4860 e1000_vlan_filter_on_off(adapter, false);
8e586137
JP		 4861
4862 return 0;
1da177e4
LT		 4863}
4864
64798845 4865static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4 4866{
5622e404 4867 u16 vid;
1da177e4 4868
5622e404
JP		 4869 if (!e1000_vlan_used(adapter))
4870 return;
4871
4872 e1000_vlan_filter_on_off(adapter, true);
4873 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368 4874 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
1da177e4
LT		 4875}
4876
14ad2513 4877int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
1da177e4 4878{
1dc32918
JP		 4879 struct e1000_hw *hw = &adapter->hw;
4880
4881 hw->autoneg = 0;
1da177e4 4882
14ad2513 4883 /* Make sure dplx is at most 1 bit and lsb of speed is not set
6cfbd97b
JK		 4884 * for the switch() below to work
4885 */
14ad2513
DD		 4886 if ((spd & 1) || (dplx & ~1))
4887 goto err_inval;
4888
6921368f 4889 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4890 if ((hw->media_type == e1000_media_type_fiber) &&
14ad2513
DD		 4891 spd != SPEED_1000 &&
4892 dplx != DUPLEX_FULL)
4893 goto err_inval;
6921368f 4894
14ad2513 4895 switch (spd + dplx) {
1da177e4 4896 case SPEED_10 + DUPLEX_HALF:
1dc32918 4897 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4898 break;
4899 case SPEED_10 + DUPLEX_FULL:
1dc32918 4900 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4901 break;
4902 case SPEED_100 + DUPLEX_HALF:
1dc32918 4903 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4904 break;
4905 case SPEED_100 + DUPLEX_FULL:
1dc32918 4906 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4907 break;
4908 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4909 hw->autoneg = 1;
4910 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4911 break;
4912 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4913 default:
14ad2513 4914 goto err_inval;
1da177e4 4915 }
c819bbd5
JB		 4916
4917 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
4918 hw->mdix = AUTO_ALL_MODES;
4919
1da177e4 4920 return 0;
14ad2513
DD		 4921
4922err_inval:
4923 e_err(probe, "Unsupported Speed/Duplex configuration\n");
4924 return -EINVAL;
1da177e4
LT		 4925}
4926
b43fcd7d 4927static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4928{
4929 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4930 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4931 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4932 u32 ctrl, ctrl_ext, rctl, status;
4933 u32 wufc = adapter->wol;
6fdfef16 4934#ifdef CONFIG_PM
240b1710 4935 int retval = 0;
6fdfef16 4936#endif
1da177e4
LT		 4937
4938 netif_device_detach(netdev);
4939
2db10a08 4940 if (netif_running(netdev)) {
6a7d64e3 4941 int count = E1000_CHECK_RESET_COUNT;
4942
4943 while (test_bit(__E1000_RESETTING, &adapter->flags) && count--)
4944 usleep_range(10000, 20000);
4945
2db10a08 4946 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4947 e1000_down(adapter);
2db10a08 4948 }
1da177e4 4949
2f82665f 4950#ifdef CONFIG_PM
1d33e9c6 4951 retval = pci_save_state(pdev);
3a3847e0 4952 if (retval)
2f82665f
JB		 4953 return retval;
4954#endif
4955
1dc32918 4956 status = er32(STATUS);
96838a40 4957 if (status & E1000_STATUS_LU)
1da177e4
LT		 4958 wufc &= ~E1000_WUFC_LNKC;
4959
96838a40 4960 if (wufc) {
1da177e4 4961 e1000_setup_rctl(adapter);
db0ce50d 4962 e1000_set_rx_mode(netdev);
1da177e4 4963
b868179c
DN		 4964 rctl = er32(RCTL);
4965
1da177e4 4966 /* turn on all-multi mode if wake on multicast is enabled */
b868179c 4967 if (wufc & E1000_WUFC_MC)
1da177e4 4968 rctl |= E1000_RCTL_MPE;
b868179c
DN		 4969
4970 /* enable receives in the hardware */
4971 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4 4972
1dc32918
JP		 4973 if (hw->mac_type >= e1000_82540) {
4974 ctrl = er32(CTRL);
1da177e4
LT		 4975 /* advertise wake from D3Cold */
4976 #define E1000_CTRL_ADVD3WUC 0x00100000
4977 /* phy power management enable */
4978 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4979 ctrl |= E1000_CTRL_ADVD3WUC |
4980 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4981 ew32(CTRL, ctrl);
1da177e4
LT		 4982 }
4983
1dc32918 4984 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 4985 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4986 /* keep the laser running in D3 */
1dc32918 4987 ctrl_ext = er32(CTRL_EXT);
1da177e4 4988 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4989 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4990 }
4991
1dc32918
JP		 4992 ew32(WUC, E1000_WUC_PME_EN);
4993 ew32(WUFC, wufc);
1da177e4 4994 } else {
1dc32918
JP		 4995 ew32(WUC, 0);
4996 ew32(WUFC, 0);
1da177e4
LT		 4997 }
4998
0fccd0e9
JG		 4999 e1000_release_manageability(adapter);
5000
b43fcd7d
RW		 5001 *enable_wake = !!wufc;
5002
0fccd0e9 5003 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 5004 if (adapter->en_mng_pt)
5005 *enable_wake = true;
1da177e4 5006
edd106fc
AK		 5007 if (netif_running(netdev))
5008 e1000_free_irq(adapter);
5009
1da177e4 5010 pci_disable_device(pdev);
240b1710 5011
1da177e4
LT		 5012 return 0;
5013}
5014
2f82665f 5015#ifdef CONFIG_PM
b43fcd7d
RW		 5016static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5017{
5018 int retval;
5019 bool wake;
5020
5021 retval = __e1000_shutdown(pdev, &wake);
5022 if (retval)
5023 return retval;
5024
5025 if (wake) {
5026 pci_prepare_to_sleep(pdev);
5027 } else {
5028 pci_wake_from_d3(pdev, false);
5029 pci_set_power_state(pdev, PCI_D3hot);
5030 }
5031
5032 return 0;
5033}
5034
64798845 5035static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 5036{
5037 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5038 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5039 struct e1000_hw *hw = &adapter->hw;
406874a7 5040 u32 err;
1da177e4 5041
d0e027db 5042 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 5043 pci_restore_state(pdev);
dbb5aaeb 5044 pci_save_state(pdev);
81250297
TI		 5045
5046 if (adapter->need_ioport)
5047 err = pci_enable_device(pdev);
5048 else
5049 err = pci_enable_device_mem(pdev);
c7be73bc 5050 if (err) {
675ad473 5051 pr_err("Cannot enable PCI device from suspend\n");
3d1dd8cb
AK		 5052 return err;
5053 }
a4cb847d 5054 pci_set_master(pdev);
1da177e4 5055
d0e027db
AK		 5056 pci_enable_wake(pdev, PCI_D3hot, 0);
5057 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5058
c7be73bc
JP		 5059 if (netif_running(netdev)) {
5060 err = e1000_request_irq(adapter);
5061 if (err)
5062 return err;
5063 }
edd106fc
AK		 5064
5065 e1000_power_up_phy(adapter);
1da177e4 5066 e1000_reset(adapter);
1dc32918 5067 ew32(WUS, ~0);
1da177e4 5068
0fccd0e9
JG		 5069 e1000_init_manageability(adapter);
5070
96838a40 5071 if (netif_running(netdev))
1da177e4
LT		 5072 e1000_up(adapter);
5073
5074 netif_device_attach(netdev);
5075
1da177e4
LT		 5076 return 0;
5077}
5078#endif
c653e635
AK		 5079
5080static void e1000_shutdown(struct pci_dev *pdev)
5081{
b43fcd7d
RW		 5082 bool wake;
5083
5084 __e1000_shutdown(pdev, &wake);
5085
5086 if (system_state == SYSTEM_POWER_OFF) {
5087 pci_wake_from_d3(pdev, wake);
5088 pci_set_power_state(pdev, PCI_D3hot);
5089 }
c653e635
AK		 5090}
5091
1da177e4 5092#ifdef CONFIG_NET_POLL_CONTROLLER
6cfbd97b 5093/* Polling 'interrupt' - used by things like netconsole to send skbs
1da177e4
LT		 5094 * without having to re-enable interrupts. It's not called while
5095 * the interrupt routine is executing.
5096 */
64798845 5097static void e1000_netpoll(struct net_device *netdev)
1da177e4 5098{
60490fe0 5099 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5100
1da177e4 5101 disable_irq(adapter->pdev->irq);
7d12e780 5102 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 5103 enable_irq(adapter->pdev->irq);
5104}
5105#endif
5106
9026729b
AK		 5107/**
5108 * e1000_io_error_detected - called when PCI error is detected
5109 * @pdev: Pointer to PCI device
120a5d0d 5110 * @state: The current pci connection state
9026729b
AK		 5111 *
5112 * This function is called after a PCI bus error affecting
5113 * this device has been detected.
5114 */
64798845
JP		 5115static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5116 pci_channel_state_t state)
9026729b
AK		 5117{
5118 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5119 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 5120
5121 netif_device_detach(netdev);
5122
eab63302
AD		 5123 if (state == pci_channel_io_perm_failure)
5124 return PCI_ERS_RESULT_DISCONNECT;
5125
9026729b
AK		 5126 if (netif_running(netdev))
5127 e1000_down(adapter);
72e8d6bb 5128 pci_disable_device(pdev);
9026729b
AK		 5129
5130 /* Request a slot slot reset. */
5131 return PCI_ERS_RESULT_NEED_RESET;
5132}
5133
5134/**
5135 * e1000_io_slot_reset - called after the pci bus has been reset.
5136 * @pdev: Pointer to PCI device
5137 *
5138 * Restart the card from scratch, as if from a cold-boot. Implementation
5139 * resembles the first-half of the e1000_resume routine.
5140 */
5141static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5142{
5143 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5144 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5145 struct e1000_hw *hw = &adapter->hw;
81250297 5146 int err;
9026729b 5147
81250297
TI		 5148 if (adapter->need_ioport)
5149 err = pci_enable_device(pdev);
5150 else
5151 err = pci_enable_device_mem(pdev);
5152 if (err) {
675ad473 5153 pr_err("Cannot re-enable PCI device after reset.\n");
9026729b
AK		 5154 return PCI_ERS_RESULT_DISCONNECT;
5155 }
5156 pci_set_master(pdev);
5157
dbf38c94
LV		 5158 pci_enable_wake(pdev, PCI_D3hot, 0);
5159 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5160
9026729b 5161 e1000_reset(adapter);
1dc32918 5162 ew32(WUS, ~0);
9026729b
AK		 5163
5164 return PCI_ERS_RESULT_RECOVERED;
5165}
5166
5167/**
5168 * e1000_io_resume - called when traffic can start flowing again.
5169 * @pdev: Pointer to PCI device
5170 *
5171 * This callback is called when the error recovery driver tells us that
5172 * its OK to resume normal operation. Implementation resembles the
5173 * second-half of the e1000_resume routine.
5174 */
5175static void e1000_io_resume(struct pci_dev *pdev)
5176{
5177 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5178 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 5179
5180 e1000_init_manageability(adapter);
9026729b
AK		 5181
5182 if (netif_running(netdev)) {
5183 if (e1000_up(adapter)) {
675ad473 5184 pr_info("can't bring device back up after reset\n");
9026729b
AK		 5185 return;
5186 }
5187 }
5188
5189 netif_device_attach(netdev);
9026729b
AK		 5190}
5191
1da177e4 5192/* e1000_main.c */
Linux kernel - Deliverables
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