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bonding: use ndo_change_rx_flags callback
[deliverable/linux.git] / drivers / net / ethernet / intel / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
5377a416 31#include <linux/io.h>
70c71606 32#include <linux/prefetch.h>
5622e404
JP		 33#include <linux/bitops.h>
34#include <linux/if_vlan.h>
5377a416
DB		 35
36/* Intel Media SOC GbE MDIO physical base address */
37static unsigned long ce4100_gbe_mdio_base_phy;
38/* Intel Media SOC GbE MDIO virtual base address */
39void __iomem *ce4100_gbe_mdio_base_virt;
1da177e4 40
1da177e4 41char e1000_driver_name[] = "e1000";
3ad2cc67 42static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
ab08853f 43#define DRV_VERSION "7.3.21-k8-NAPI"
abec42a4
SH		 44const char e1000_driver_version[] = DRV_VERSION;
45static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 46
47/* e1000_pci_tbl - PCI Device ID Table
48 *
49 * Last entry must be all 0s
50 *
51 * Macro expands to...
52 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
53 */
a3aa1884 54static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
1da177e4
LT		 55 INTEL_E1000_ETHERNET_DEVICE(0x1000),
56 INTEL_E1000_ETHERNET_DEVICE(0x1001),
57 INTEL_E1000_ETHERNET_DEVICE(0x1004),
58 INTEL_E1000_ETHERNET_DEVICE(0x1008),
59 INTEL_E1000_ETHERNET_DEVICE(0x1009),
60 INTEL_E1000_ETHERNET_DEVICE(0x100C),
61 INTEL_E1000_ETHERNET_DEVICE(0x100D),
62 INTEL_E1000_ETHERNET_DEVICE(0x100E),
63 INTEL_E1000_ETHERNET_DEVICE(0x100F),
64 INTEL_E1000_ETHERNET_DEVICE(0x1010),
65 INTEL_E1000_ETHERNET_DEVICE(0x1011),
66 INTEL_E1000_ETHERNET_DEVICE(0x1012),
67 INTEL_E1000_ETHERNET_DEVICE(0x1013),
68 INTEL_E1000_ETHERNET_DEVICE(0x1014),
69 INTEL_E1000_ETHERNET_DEVICE(0x1015),
70 INTEL_E1000_ETHERNET_DEVICE(0x1016),
71 INTEL_E1000_ETHERNET_DEVICE(0x1017),
72 INTEL_E1000_ETHERNET_DEVICE(0x1018),
73 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 74 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 75 INTEL_E1000_ETHERNET_DEVICE(0x101D),
76 INTEL_E1000_ETHERNET_DEVICE(0x101E),
77 INTEL_E1000_ETHERNET_DEVICE(0x1026),
78 INTEL_E1000_ETHERNET_DEVICE(0x1027),
79 INTEL_E1000_ETHERNET_DEVICE(0x1028),
80 INTEL_E1000_ETHERNET_DEVICE(0x1075),
81 INTEL_E1000_ETHERNET_DEVICE(0x1076),
82 INTEL_E1000_ETHERNET_DEVICE(0x1077),
83 INTEL_E1000_ETHERNET_DEVICE(0x1078),
84 INTEL_E1000_ETHERNET_DEVICE(0x1079),
85 INTEL_E1000_ETHERNET_DEVICE(0x107A),
86 INTEL_E1000_ETHERNET_DEVICE(0x107B),
87 INTEL_E1000_ETHERNET_DEVICE(0x107C),
88 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 89 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 90 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
5377a416 91 INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
1da177e4
LT		 92 /* required last entry */
93 {0,}
94};
95
96MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
97
35574764
NN		 98int e1000_up(struct e1000_adapter *adapter);
99void e1000_down(struct e1000_adapter *adapter);
100void e1000_reinit_locked(struct e1000_adapter *adapter);
101void e1000_reset(struct e1000_adapter *adapter);
35574764
NN		 102int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
103int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
104void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
105void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 106static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 107 struct e1000_tx_ring *txdr);
3ad2cc67 108static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 109 struct e1000_rx_ring *rxdr);
3ad2cc67 110static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 111 struct e1000_tx_ring *tx_ring);
3ad2cc67 112static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 113 struct e1000_rx_ring *rx_ring);
114void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 115
116static int e1000_init_module(void);
117static void e1000_exit_module(void);
118static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
119static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 120static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 121static int e1000_sw_init(struct e1000_adapter *adapter);
122static int e1000_open(struct net_device *netdev);
123static int e1000_close(struct net_device *netdev);
124static void e1000_configure_tx(struct e1000_adapter *adapter);
125static void e1000_configure_rx(struct e1000_adapter *adapter);
126static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 127static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
128static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
129static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
db0ce50d 133static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4 134static void e1000_update_phy_info(unsigned long data);
5cf42fcd 135static void e1000_update_phy_info_task(struct work_struct *work);
1da177e4 136static void e1000_watchdog(unsigned long data);
1da177e4 137static void e1000_82547_tx_fifo_stall(unsigned long data);
5cf42fcd 138static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
3b29a56d
SH		 139static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
140 struct net_device *netdev);
1da177e4
LT		 141static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
142static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
143static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 144static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 145static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
146 struct e1000_tx_ring *tx_ring);
bea3348e 147static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 148static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
149 struct e1000_rx_ring *rx_ring,
150 int *work_done, int work_to_do);
edbbb3ca
JB		 151static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
152 struct e1000_rx_ring *rx_ring,
153 int *work_done, int work_to_do);
581d708e 154static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 155 struct e1000_rx_ring *rx_ring,
72d64a43 156 int cleaned_count);
edbbb3ca
JB		 157static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
158 struct e1000_rx_ring *rx_ring,
159 int cleaned_count);
1da177e4
LT		 160static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
161static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
162 int cmd);
1da177e4
LT		 163static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
164static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
165static void e1000_tx_timeout(struct net_device *dev);
65f27f38 166static void e1000_reset_task(struct work_struct *work);
1da177e4 167static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 168static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
169 struct sk_buff *skb);
1da177e4 170
5622e404
JP		 171static bool e1000_vlan_used(struct e1000_adapter *adapter);
172static void e1000_vlan_mode(struct net_device *netdev, u32 features);
406874a7
JP		 173static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
174static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 175static void e1000_restore_vlan(struct e1000_adapter *adapter);
176
6fdfef16 177#ifdef CONFIG_PM
b43fcd7d 178static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 179static int e1000_resume(struct pci_dev *pdev);
180#endif
c653e635 181static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 182
183#ifdef CONFIG_NET_POLL_CONTROLLER
184/* for netdump / net console */
185static void e1000_netpoll (struct net_device *netdev);
186#endif
187
1f753861
JB		 188#define COPYBREAK_DEFAULT 256
189static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
190module_param(copybreak, uint, 0644);
191MODULE_PARM_DESC(copybreak,
192 "Maximum size of packet that is copied to a new buffer on receive");
193
9026729b
AK		 194static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
195 pci_channel_state_t state);
196static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
197static void e1000_io_resume(struct pci_dev *pdev);
198
199static struct pci_error_handlers e1000_err_handler = {
200 .error_detected = e1000_io_error_detected,
201 .slot_reset = e1000_io_slot_reset,
202 .resume = e1000_io_resume,
203};
24025e4e 204
1da177e4
LT		 205static struct pci_driver e1000_driver = {
206 .name = e1000_driver_name,
207 .id_table = e1000_pci_tbl,
208 .probe = e1000_probe,
209 .remove = __devexit_p(e1000_remove),
c4e24f01 210#ifdef CONFIG_PM
25985edc 211 /* Power Management Hooks */
1da177e4 212 .suspend = e1000_suspend,
c653e635 213 .resume = e1000_resume,
1da177e4 214#endif
9026729b
AK		 215 .shutdown = e1000_shutdown,
216 .err_handler = &e1000_err_handler
1da177e4
LT		 217};
218
219MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
220MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
221MODULE_LICENSE("GPL");
222MODULE_VERSION(DRV_VERSION);
223
224static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
225module_param(debug, int, 0);
226MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
227
675ad473
ET		 228/**
229 * e1000_get_hw_dev - return device
230 * used by hardware layer to print debugging information
231 *
232 **/
233struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
234{
235 struct e1000_adapter *adapter = hw->back;
236 return adapter->netdev;
237}
238
1da177e4
LT		 239/**
240 * e1000_init_module - Driver Registration Routine
241 *
242 * e1000_init_module is the first routine called when the driver is
243 * loaded. All it does is register with the PCI subsystem.
244 **/
245
64798845 246static int __init e1000_init_module(void)
1da177e4
LT		 247{
248 int ret;
675ad473 249 pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
1da177e4 250
675ad473 251 pr_info("%s\n", e1000_copyright);
1da177e4 252
29917620 253 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 254 if (copybreak != COPYBREAK_DEFAULT) {
255 if (copybreak == 0)
675ad473 256 pr_info("copybreak disabled\n");
1f753861 257 else
675ad473
ET		 258 pr_info("copybreak enabled for "
259 "packets <= %u bytes\n", copybreak);
1f753861 260 }
1da177e4
LT		 261 return ret;
262}
263
264module_init(e1000_init_module);
265
266/**
267 * e1000_exit_module - Driver Exit Cleanup Routine
268 *
269 * e1000_exit_module is called just before the driver is removed
270 * from memory.
271 **/
272
64798845 273static void __exit e1000_exit_module(void)
1da177e4 274{
1da177e4
LT		 275 pci_unregister_driver(&e1000_driver);
276}
277
278module_exit(e1000_exit_module);
279
2db10a08
AK		 280static int e1000_request_irq(struct e1000_adapter *adapter)
281{
282 struct net_device *netdev = adapter->netdev;
3e18826c 283 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 284 int irq_flags = IRQF_SHARED;
285 int err;
2db10a08 286
e94bd23f
AK		 287 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
288 netdev);
289 if (err) {
feb8f478 290 e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 291 }
2db10a08
AK		 292
293 return err;
294}
295
296static void e1000_free_irq(struct e1000_adapter *adapter)
297{
298 struct net_device *netdev = adapter->netdev;
299
300 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 301}
302
1da177e4
LT		 303/**
304 * e1000_irq_disable - Mask off interrupt generation on the NIC
305 * @adapter: board private structure
306 **/
307
64798845 308static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 309{
1dc32918
JP		 310 struct e1000_hw *hw = &adapter->hw;
311
312 ew32(IMC, ~0);
313 E1000_WRITE_FLUSH();
1da177e4
LT		 314 synchronize_irq(adapter->pdev->irq);
315}
316
317/**
318 * e1000_irq_enable - Enable default interrupt generation settings
319 * @adapter: board private structure
320 **/
321
64798845 322static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 323{
1dc32918
JP		 324 struct e1000_hw *hw = &adapter->hw;
325
326 ew32(IMS, IMS_ENABLE_MASK);
327 E1000_WRITE_FLUSH();
1da177e4 328}
3ad2cc67 329
64798845 330static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 331{
1dc32918 332 struct e1000_hw *hw = &adapter->hw;
2d7edb92 333 struct net_device *netdev = adapter->netdev;
1dc32918 334 u16 vid = hw->mng_cookie.vlan_id;
406874a7 335 u16 old_vid = adapter->mng_vlan_id;
96838a40 336
5622e404
JP		 337 if (!e1000_vlan_used(adapter))
338 return;
339
340 if (!test_bit(vid, adapter->active_vlans)) {
341 if (hw->mng_cookie.status &
342 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
343 e1000_vlan_rx_add_vid(netdev, vid);
c5f226fe 344 adapter->mng_vlan_id = vid;
5622e404
JP		 345 } else {
346 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
347 }
348 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
349 (vid != old_vid) &&
350 !test_bit(old_vid, adapter->active_vlans))
351 e1000_vlan_rx_kill_vid(netdev, old_vid);
352 } else {
353 adapter->mng_vlan_id = vid;
2d7edb92
MC		 354 }
355}
b55ccb35 356
64798845 357static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 358{
1dc32918
JP		 359 struct e1000_hw *hw = &adapter->hw;
360
0fccd0e9 361 if (adapter->en_mng_pt) {
1dc32918 362 u32 manc = er32(MANC);
0fccd0e9
JG		 363
364 /* disable hardware interception of ARP */
365 manc &= ~(E1000_MANC_ARP_EN);
366
1dc32918 367 ew32(MANC, manc);
0fccd0e9
JG		 368 }
369}
370
64798845 371static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 372{
1dc32918
JP		 373 struct e1000_hw *hw = &adapter->hw;
374
0fccd0e9 375 if (adapter->en_mng_pt) {
1dc32918 376 u32 manc = er32(MANC);
0fccd0e9
JG		 377
378 /* re-enable hardware interception of ARP */
379 manc |= E1000_MANC_ARP_EN;
380
1dc32918 381 ew32(MANC, manc);
0fccd0e9
JG		 382 }
383}
384
e0aac5a2
AK		 385/**
386 * e1000_configure - configure the hardware for RX and TX
387 * @adapter = private board structure
388 **/
389static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 390{
391 struct net_device *netdev = adapter->netdev;
2db10a08 392 int i;
1da177e4 393
db0ce50d 394 e1000_set_rx_mode(netdev);
1da177e4
LT		 395
396 e1000_restore_vlan(adapter);
0fccd0e9 397 e1000_init_manageability(adapter);
1da177e4
LT		 398
399 e1000_configure_tx(adapter);
400 e1000_setup_rctl(adapter);
401 e1000_configure_rx(adapter);
72d64a43
JK		 402 /* call E1000_DESC_UNUSED which always leaves
403 * at least 1 descriptor unused to make sure
404 * next_to_use != next_to_clean */
f56799ea 405 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 406 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 407 adapter->alloc_rx_buf(adapter, ring,
408 E1000_DESC_UNUSED(ring));
f56799ea 409 }
e0aac5a2
AK		 410}
411
412int e1000_up(struct e1000_adapter *adapter)
413{
1dc32918
JP		 414 struct e1000_hw *hw = &adapter->hw;
415
e0aac5a2
AK		 416 /* hardware has been reset, we need to reload some things */
417 e1000_configure(adapter);
418
419 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 420
bea3348e 421 napi_enable(&adapter->napi);
c3570acb 422
5de55624
MC		 423 e1000_irq_enable(adapter);
424
4cb9be7a
JB		 425 netif_wake_queue(adapter->netdev);
426
79f3d399 427 /* fire a link change interrupt to start the watchdog */
1dc32918 428 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 429 return 0;
430}
431
79f05bf0
AK		 432/**
433 * e1000_power_up_phy - restore link in case the phy was powered down
434 * @adapter: address of board private structure
435 *
436 * The phy may be powered down to save power and turn off link when the
437 * driver is unloaded and wake on lan is not enabled (among others)
438 * *** this routine MUST be followed by a call to e1000_reset ***
439 *
440 **/
441
d658266e 442void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 443{
1dc32918 444 struct e1000_hw *hw = &adapter->hw;
406874a7 445 u16 mii_reg = 0;
79f05bf0
AK		 446
447 /* Just clear the power down bit to wake the phy back up */
1dc32918 448 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 449 /* according to the manual, the phy will retain its
450 * settings across a power-down/up cycle */
1dc32918 451 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 452 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 453 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 454 }
455}
456
457static void e1000_power_down_phy(struct e1000_adapter *adapter)
458{
1dc32918
JP		 459 struct e1000_hw *hw = &adapter->hw;
460
61c2505f 461 /* Power down the PHY so no link is implied when interface is down *
c3033b01 462 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 463 * (a) WoL is enabled
464 * (b) AMT is active
465 * (c) SoL/IDER session is active */
1dc32918
JP		 466 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
467 hw->media_type == e1000_media_type_copper) {
406874a7 468 u16 mii_reg = 0;
61c2505f 469
1dc32918 470 switch (hw->mac_type) {
61c2505f
BA		 471 case e1000_82540:
472 case e1000_82545:
473 case e1000_82545_rev_3:
474 case e1000_82546:
5377a416 475 case e1000_ce4100:
61c2505f
BA		 476 case e1000_82546_rev_3:
477 case e1000_82541:
478 case e1000_82541_rev_2:
479 case e1000_82547:
480 case e1000_82547_rev_2:
1dc32918 481 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 482 goto out;
483 break;
61c2505f
BA		 484 default:
485 goto out;
486 }
1dc32918 487 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 488 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 489 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 490 mdelay(1);
491 }
61c2505f
BA		 492out:
493 return;
79f05bf0
AK		 494}
495
64798845 496void e1000_down(struct e1000_adapter *adapter)
1da177e4 497{
a6c42322 498 struct e1000_hw *hw = &adapter->hw;
1da177e4 499 struct net_device *netdev = adapter->netdev;
a6c42322 500 u32 rctl, tctl;
1da177e4 501
1314bbf3 502
a6c42322
JB		 503 /* disable receives in the hardware */
504 rctl = er32(RCTL);
505 ew32(RCTL, rctl & ~E1000_RCTL_EN);
506 /* flush and sleep below */
507
51851073 508 netif_tx_disable(netdev);
a6c42322
JB		 509
510 /* disable transmits in the hardware */
511 tctl = er32(TCTL);
512 tctl &= ~E1000_TCTL_EN;
513 ew32(TCTL, tctl);
514 /* flush both disables and wait for them to finish */
515 E1000_WRITE_FLUSH();
516 msleep(10);
517
bea3348e 518 napi_disable(&adapter->napi);
c3570acb 519
1da177e4 520 e1000_irq_disable(adapter);
c1605eb3 521
ab08853f
AC		 522 /*
523 * Setting DOWN must be after irq_disable to prevent
524 * a screaming interrupt. Setting DOWN also prevents
525 * timers and tasks from rescheduling.
526 */
527 set_bit(__E1000_DOWN, &adapter->flags);
528
1da177e4
LT		 529 del_timer_sync(&adapter->tx_fifo_stall_timer);
530 del_timer_sync(&adapter->watchdog_timer);
531 del_timer_sync(&adapter->phy_info_timer);
532
1da177e4
LT		 533 adapter->link_speed = 0;
534 adapter->link_duplex = 0;
535 netif_carrier_off(netdev);
1da177e4
LT		 536
537 e1000_reset(adapter);
581d708e
MC		 538 e1000_clean_all_tx_rings(adapter);
539 e1000_clean_all_rx_rings(adapter);
1da177e4 540}
1da177e4 541
38df7a39 542static void e1000_reinit_safe(struct e1000_adapter *adapter)
338c15e4
JB		 543{
544 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
545 msleep(1);
546 rtnl_lock();
547 e1000_down(adapter);
548 e1000_up(adapter);
549 rtnl_unlock();
550 clear_bit(__E1000_RESETTING, &adapter->flags);
551}
552
64798845 553void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08 554{
338c15e4
JB		 555 /* if rtnl_lock is not held the call path is bogus */
556 ASSERT_RTNL();
2db10a08
AK		 557 WARN_ON(in_interrupt());
558 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
559 msleep(1);
560 e1000_down(adapter);
561 e1000_up(adapter);
562 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 563}
564
64798845 565void e1000_reset(struct e1000_adapter *adapter)
1da177e4 566{
1dc32918 567 struct e1000_hw *hw = &adapter->hw;
406874a7 568 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 569 bool legacy_pba_adjust = false;
b7cb8c2c 570 u16 hwm;
1da177e4
LT		 571
572 /* Repartition Pba for greater than 9k mtu
573 * To take effect CTRL.RST is required.
574 */
575
1dc32918 576 switch (hw->mac_type) {
018ea44e
BA		 577 case e1000_82542_rev2_0:
578 case e1000_82542_rev2_1:
579 case e1000_82543:
580 case e1000_82544:
581 case e1000_82540:
582 case e1000_82541:
583 case e1000_82541_rev_2:
c3033b01 584 legacy_pba_adjust = true;
018ea44e
BA		 585 pba = E1000_PBA_48K;
586 break;
587 case e1000_82545:
588 case e1000_82545_rev_3:
589 case e1000_82546:
5377a416 590 case e1000_ce4100:
018ea44e
BA		 591 case e1000_82546_rev_3:
592 pba = E1000_PBA_48K;
593 break;
2d7edb92 594 case e1000_82547:
0e6ef3e0 595 case e1000_82547_rev_2:
c3033b01 596 legacy_pba_adjust = true;
2d7edb92
MC		 597 pba = E1000_PBA_30K;
598 break;
018ea44e
BA		 599 case e1000_undefined:
600 case e1000_num_macs:
2d7edb92
MC		 601 break;
602 }
603
c3033b01 604 if (legacy_pba_adjust) {
b7cb8c2c 605 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 606 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 607
1dc32918 608 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 609 adapter->tx_fifo_head = 0;
610 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
611 adapter->tx_fifo_size =
612 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
613 atomic_set(&adapter->tx_fifo_stall, 0);
614 }
b7cb8c2c 615 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 616 /* adjust PBA for jumbo frames */
1dc32918 617 ew32(PBA, pba);
018ea44e
BA		 618
619 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 620 * large enough to accommodate two full transmit packets,
018ea44e 621 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 622 * the Rx FIFO should be large enough to accommodate at least
018ea44e
BA		 623 * one full receive packet and is similarly rounded up and
624 * expressed in KB. */
1dc32918 625 pba = er32(PBA);
018ea44e
BA		 626 /* upper 16 bits has Tx packet buffer allocation size in KB */
627 tx_space = pba >> 16;
628 /* lower 16 bits has Rx packet buffer allocation size in KB */
629 pba &= 0xffff;
b7cb8c2c
JB		 630 /*
631 * the tx fifo also stores 16 bytes of information about the tx
632 * but don't include ethernet FCS because hardware appends it
633 */
634 min_tx_space = (hw->max_frame_size +
635 sizeof(struct e1000_tx_desc) -
636 ETH_FCS_LEN) * 2;
9099cfb9 637 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 638 min_tx_space >>= 10;
b7cb8c2c
JB		 639 /* software strips receive CRC, so leave room for it */
640 min_rx_space = hw->max_frame_size;
9099cfb9 641 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 642 min_rx_space >>= 10;
643
644 /* If current Tx allocation is less than the min Tx FIFO size,
645 * and the min Tx FIFO size is less than the current Rx FIFO
646 * allocation, take space away from current Rx allocation */
647 if (tx_space < min_tx_space &&
648 ((min_tx_space - tx_space) < pba)) {
649 pba = pba - (min_tx_space - tx_space);
650
651 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 652 switch (hw->mac_type) {
018ea44e
BA		 653 case e1000_82545 ... e1000_82546_rev_3:
654 pba &= ~(E1000_PBA_8K - 1);
655 break;
656 default:
657 break;
658 }
659
660 /* if short on rx space, rx wins and must trump tx
661 * adjustment or use Early Receive if available */
1532ecea
JB		 662 if (pba < min_rx_space)
663 pba = min_rx_space;
018ea44e 664 }
1da177e4 665 }
2d7edb92 666
1dc32918 667 ew32(PBA, pba);
1da177e4 668
b7cb8c2c
JB		 669 /*
670 * flow control settings:
671 * The high water mark must be low enough to fit one full frame
672 * (or the size used for early receive) above it in the Rx FIFO.
673 * Set it to the lower of:
674 * - 90% of the Rx FIFO size, and
675 * - the full Rx FIFO size minus the early receive size (for parts
676 * with ERT support assuming ERT set to E1000_ERT_2048), or
677 * - the full Rx FIFO size minus one full frame
678 */
679 hwm = min(((pba << 10) * 9 / 10),
680 ((pba << 10) - hw->max_frame_size));
681
682 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
683 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 684 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 685 hw->fc_send_xon = 1;
686 hw->fc = hw->original_fc;
1da177e4 687
2d7edb92 688 /* Allow time for pending master requests to run */
1dc32918
JP		 689 e1000_reset_hw(hw);
690 if (hw->mac_type >= e1000_82544)
691 ew32(WUC, 0);
09ae3e88 692
1dc32918 693 if (e1000_init_hw(hw))
feb8f478 694 e_dev_err("Hardware Error\n");
2d7edb92 695 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 696
697 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 698 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 699 hw->autoneg == 1 &&
700 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
701 u32 ctrl = er32(CTRL);
3d5460a0
JB		 702 /* clear phy power management bit if we are in gig only mode,
703 * which if enabled will attempt negotiation to 100Mb, which
704 * can cause a loss of link at power off or driver unload */
705 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 706 ew32(CTRL, ctrl);
3d5460a0
JB		 707 }
708
1da177e4 709 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 710 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 711
1dc32918
JP		 712 e1000_reset_adaptive(hw);
713 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 714
0fccd0e9 715 e1000_release_manageability(adapter);
1da177e4
LT		 716}
717
67b3c27c
AK		 718/**
719 * Dump the eeprom for users having checksum issues
720 **/
b4ea895d 721static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 722{
723 struct net_device *netdev = adapter->netdev;
724 struct ethtool_eeprom eeprom;
725 const struct ethtool_ops *ops = netdev->ethtool_ops;
726 u8 *data;
727 int i;
728 u16 csum_old, csum_new = 0;
729
730 eeprom.len = ops->get_eeprom_len(netdev);
731 eeprom.offset = 0;
732
733 data = kmalloc(eeprom.len, GFP_KERNEL);
734 if (!data) {
675ad473 735 pr_err("Unable to allocate memory to dump EEPROM data\n");
67b3c27c
AK		 736 return;
737 }
738
739 ops->get_eeprom(netdev, &eeprom, data);
740
741 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
742 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
743 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
744 csum_new += data[i] + (data[i + 1] << 8);
745 csum_new = EEPROM_SUM - csum_new;
746
675ad473
ET		 747 pr_err("/*********************/\n");
748 pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
749 pr_err("Calculated : 0x%04x\n", csum_new);
67b3c27c 750
675ad473
ET		 751 pr_err("Offset Values\n");
752 pr_err("======== ======\n");
67b3c27c
AK		 753 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
754
675ad473
ET		 755 pr_err("Include this output when contacting your support provider.\n");
756 pr_err("This is not a software error! Something bad happened to\n");
757 pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
758 pr_err("result in further problems, possibly loss of data,\n");
759 pr_err("corruption or system hangs!\n");
760 pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
761 pr_err("which is invalid and requires you to set the proper MAC\n");
762 pr_err("address manually before continuing to enable this network\n");
763 pr_err("device. Please inspect the EEPROM dump and report the\n");
764 pr_err("issue to your hardware vendor or Intel Customer Support.\n");
765 pr_err("/*********************/\n");
67b3c27c
AK		 766
767 kfree(data);
768}
769
81250297
TI		 770/**
771 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
772 * @pdev: PCI device information struct
773 *
774 * Return true if an adapter needs ioport resources
775 **/
776static int e1000_is_need_ioport(struct pci_dev *pdev)
777{
778 switch (pdev->device) {
779 case E1000_DEV_ID_82540EM:
780 case E1000_DEV_ID_82540EM_LOM:
781 case E1000_DEV_ID_82540EP:
782 case E1000_DEV_ID_82540EP_LOM:
783 case E1000_DEV_ID_82540EP_LP:
784 case E1000_DEV_ID_82541EI:
785 case E1000_DEV_ID_82541EI_MOBILE:
786 case E1000_DEV_ID_82541ER:
787 case E1000_DEV_ID_82541ER_LOM:
788 case E1000_DEV_ID_82541GI:
789 case E1000_DEV_ID_82541GI_LF:
790 case E1000_DEV_ID_82541GI_MOBILE:
791 case E1000_DEV_ID_82544EI_COPPER:
792 case E1000_DEV_ID_82544EI_FIBER:
793 case E1000_DEV_ID_82544GC_COPPER:
794 case E1000_DEV_ID_82544GC_LOM:
795 case E1000_DEV_ID_82545EM_COPPER:
796 case E1000_DEV_ID_82545EM_FIBER:
797 case E1000_DEV_ID_82546EB_COPPER:
798 case E1000_DEV_ID_82546EB_FIBER:
799 case E1000_DEV_ID_82546EB_QUAD_COPPER:
800 return true;
801 default:
802 return false;
803 }
804}
805
5622e404
JP		 806static u32 e1000_fix_features(struct net_device *netdev, u32 features)
807{
808 /*
809 * Since there is no support for separate rx/tx vlan accel
810 * enable/disable make sure tx flag is always in same state as rx.
811 */
812 if (features & NETIF_F_HW_VLAN_RX)
813 features |= NETIF_F_HW_VLAN_TX;
814 else
815 features &= ~NETIF_F_HW_VLAN_TX;
816
817 return features;
818}
819
e97d3207
MM		 820static int e1000_set_features(struct net_device *netdev, u32 features)
821{
822 struct e1000_adapter *adapter = netdev_priv(netdev);
823 u32 changed = features ^ netdev->features;
824
5622e404
JP		 825 if (changed & NETIF_F_HW_VLAN_RX)
826 e1000_vlan_mode(netdev, features);
827
e97d3207
MM		 828 if (!(changed & NETIF_F_RXCSUM))
829 return 0;
830
831 adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
832
833 if (netif_running(netdev))
834 e1000_reinit_locked(adapter);
835 else
836 e1000_reset(adapter);
837
838 return 0;
839}
840
0e7614bc
SH		 841static const struct net_device_ops e1000_netdev_ops = {
842 .ndo_open = e1000_open,
843 .ndo_stop = e1000_close,
00829823 844 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 845 .ndo_get_stats = e1000_get_stats,
846 .ndo_set_rx_mode = e1000_set_rx_mode,
847 .ndo_set_mac_address = e1000_set_mac,
5622e404 848 .ndo_tx_timeout = e1000_tx_timeout,
0e7614bc
SH		 849 .ndo_change_mtu = e1000_change_mtu,
850 .ndo_do_ioctl = e1000_ioctl,
851 .ndo_validate_addr = eth_validate_addr,
0e7614bc
SH		 852 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
853 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
854#ifdef CONFIG_NET_POLL_CONTROLLER
855 .ndo_poll_controller = e1000_netpoll,
856#endif
5622e404
JP		 857 .ndo_fix_features = e1000_fix_features,
858 .ndo_set_features = e1000_set_features,
0e7614bc
SH		 859};
860
e508be17
JB		 861/**
862 * e1000_init_hw_struct - initialize members of hw struct
863 * @adapter: board private struct
864 * @hw: structure used by e1000_hw.c
865 *
866 * Factors out initialization of the e1000_hw struct to its own function
867 * that can be called very early at init (just after struct allocation).
868 * Fields are initialized based on PCI device information and
869 * OS network device settings (MTU size).
870 * Returns negative error codes if MAC type setup fails.
871 */
872static int e1000_init_hw_struct(struct e1000_adapter *adapter,
873 struct e1000_hw *hw)
874{
875 struct pci_dev *pdev = adapter->pdev;
876
877 /* PCI config space info */
878 hw->vendor_id = pdev->vendor;
879 hw->device_id = pdev->device;
880 hw->subsystem_vendor_id = pdev->subsystem_vendor;
881 hw->subsystem_id = pdev->subsystem_device;
882 hw->revision_id = pdev->revision;
883
884 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
885
886 hw->max_frame_size = adapter->netdev->mtu +
887 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
888 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
889
890 /* identify the MAC */
891 if (e1000_set_mac_type(hw)) {
892 e_err(probe, "Unknown MAC Type\n");
893 return -EIO;
894 }
895
896 switch (hw->mac_type) {
897 default:
898 break;
899 case e1000_82541:
900 case e1000_82547:
901 case e1000_82541_rev_2:
902 case e1000_82547_rev_2:
903 hw->phy_init_script = 1;
904 break;
905 }
906
907 e1000_set_media_type(hw);
908 e1000_get_bus_info(hw);
909
910 hw->wait_autoneg_complete = false;
911 hw->tbi_compatibility_en = true;
912 hw->adaptive_ifs = true;
913
914 /* Copper options */
915
916 if (hw->media_type == e1000_media_type_copper) {
917 hw->mdix = AUTO_ALL_MODES;
918 hw->disable_polarity_correction = false;
919 hw->master_slave = E1000_MASTER_SLAVE;
920 }
921
922 return 0;
923}
924
1da177e4
LT		 925/**
926 * e1000_probe - Device Initialization Routine
927 * @pdev: PCI device information struct
928 * @ent: entry in e1000_pci_tbl
929 *
930 * Returns 0 on success, negative on failure
931 *
932 * e1000_probe initializes an adapter identified by a pci_dev structure.
933 * The OS initialization, configuring of the adapter private structure,
934 * and a hardware reset occur.
935 **/
1dc32918
JP		 936static int __devinit e1000_probe(struct pci_dev *pdev,
937 const struct pci_device_id *ent)
1da177e4
LT		 938{
939 struct net_device *netdev;
940 struct e1000_adapter *adapter;
1dc32918 941 struct e1000_hw *hw;
2d7edb92 942
1da177e4 943 static int cards_found = 0;
120cd576 944 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 945 int i, err, pci_using_dac;
406874a7 946 u16 eeprom_data = 0;
5377a416 947 u16 tmp = 0;
406874a7 948 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 949 int bars, need_ioport;
0795af57 950
81250297
TI		 951 /* do not allocate ioport bars when not needed */
952 need_ioport = e1000_is_need_ioport(pdev);
953 if (need_ioport) {
954 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
955 err = pci_enable_device(pdev);
956 } else {
957 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 958 err = pci_enable_device_mem(pdev);
81250297 959 }
c7be73bc 960 if (err)
1da177e4
LT		 961 return err;
962
81250297 963 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 964 if (err)
6dd62ab0 965 goto err_pci_reg;
1da177e4
LT		 966
967 pci_set_master(pdev);
dbb5aaeb
NN		 968 err = pci_save_state(pdev);
969 if (err)
970 goto err_alloc_etherdev;
1da177e4 971
6dd62ab0 972 err = -ENOMEM;
1da177e4 973 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 974 if (!netdev)
1da177e4 975 goto err_alloc_etherdev;
1da177e4 976
1da177e4
LT		 977 SET_NETDEV_DEV(netdev, &pdev->dev);
978
979 pci_set_drvdata(pdev, netdev);
60490fe0 980 adapter = netdev_priv(netdev);
1da177e4
LT		 981 adapter->netdev = netdev;
982 adapter->pdev = pdev;
1da177e4 983 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 984 adapter->bars = bars;
985 adapter->need_ioport = need_ioport;
1da177e4 986
1dc32918
JP		 987 hw = &adapter->hw;
988 hw->back = adapter;
989
6dd62ab0 990 err = -EIO;
275f165f 991 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 992 if (!hw->hw_addr)
1da177e4 993 goto err_ioremap;
1da177e4 994
81250297
TI		 995 if (adapter->need_ioport) {
996 for (i = BAR_1; i <= BAR_5; i++) {
997 if (pci_resource_len(pdev, i) == 0)
998 continue;
999 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1000 hw->io_base = pci_resource_start(pdev, i);
1001 break;
1002 }
1da177e4
LT		 1003 }
1004 }
1005
e508be17
JB		 1006 /* make ready for any if (hw->...) below */
1007 err = e1000_init_hw_struct(adapter, hw);
1008 if (err)
1009 goto err_sw_init;
1010
1011 /*
1012 * there is a workaround being applied below that limits
1013 * 64-bit DMA addresses to 64-bit hardware. There are some
1014 * 32-bit adapters that Tx hang when given 64-bit DMA addresses
1015 */
1016 pci_using_dac = 0;
1017 if ((hw->bus_type == e1000_bus_type_pcix) &&
1018 !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
1019 /*
1020 * according to DMA-API-HOWTO, coherent calls will always
1021 * succeed if the set call did
1022 */
1023 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
1024 pci_using_dac = 1;
e508be17 1025 } else {
19a0b67a
DN		 1026 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1027 if (err) {
1028 pr_err("No usable DMA config, aborting\n");
1029 goto err_dma;
1030 }
1031 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
e508be17
JB		 1032 }
1033
0e7614bc 1034 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1035 e1000_set_ethtool_ops(netdev);
1da177e4 1036 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1037 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1038
0eb5a34c 1039 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1040
1da177e4
LT		 1041 adapter->bd_number = cards_found;
1042
1043 /* setup the private structure */
1044
c7be73bc
JP		 1045 err = e1000_sw_init(adapter);
1046 if (err)
1da177e4
LT		 1047 goto err_sw_init;
1048
6dd62ab0 1049 err = -EIO;
5377a416
DB		 1050 if (hw->mac_type == e1000_ce4100) {
1051 ce4100_gbe_mdio_base_phy = pci_resource_start(pdev, BAR_1);
1052 ce4100_gbe_mdio_base_virt = ioremap(ce4100_gbe_mdio_base_phy,
1053 pci_resource_len(pdev, BAR_1));
1054
1055 if (!ce4100_gbe_mdio_base_virt)
1056 goto err_mdio_ioremap;
1057 }
2d7edb92 1058
1dc32918 1059 if (hw->mac_type >= e1000_82543) {
e97d3207 1060 netdev->hw_features = NETIF_F_SG |
5622e404
JP		 1061 NETIF_F_HW_CSUM |
1062 NETIF_F_HW_VLAN_RX;
e97d3207 1063 netdev->features = NETIF_F_HW_VLAN_TX |
1da177e4
LT		 1064 NETIF_F_HW_VLAN_FILTER;
1065 }
1066
1dc32918
JP		 1067 if ((hw->mac_type >= e1000_82544) &&
1068 (hw->mac_type != e1000_82547))
e97d3207
MM		 1069 netdev->hw_features |= NETIF_F_TSO;
1070
1071 netdev->features |= netdev->hw_features;
1072 netdev->hw_features |= NETIF_F_RXCSUM;
2d7edb92 1073
7b872a55 1074 if (pci_using_dac) {
1da177e4 1075 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 1076 netdev->vlan_features |= NETIF_F_HIGHDMA;
1077 }
1da177e4 1078
20501a69 1079 netdev->vlan_features |= NETIF_F_TSO;
20501a69
PM		 1080 netdev->vlan_features |= NETIF_F_HW_CSUM;
1081 netdev->vlan_features |= NETIF_F_SG;
1082
1dc32918 1083 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1084
cd94dd0b 1085 /* initialize eeprom parameters */
1dc32918 1086 if (e1000_init_eeprom_params(hw)) {
feb8f478 1087 e_err(probe, "EEPROM initialization failed\n");
6dd62ab0 1088 goto err_eeprom;
cd94dd0b
AK		 1089 }
1090
96838a40 1091 /* before reading the EEPROM, reset the controller to
1da177e4 1092 * put the device in a known good starting state */
96838a40 1093
1dc32918 1094 e1000_reset_hw(hw);
1da177e4
LT		 1095
1096 /* make sure the EEPROM is good */
1dc32918 1097 if (e1000_validate_eeprom_checksum(hw) < 0) {
feb8f478 1098 e_err(probe, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 1099 e1000_dump_eeprom(adapter);
1100 /*
1101 * set MAC address to all zeroes to invalidate and temporary
1102 * disable this device for the user. This blocks regular
1103 * traffic while still permitting ethtool ioctls from reaching
1104 * the hardware as well as allowing the user to run the
1105 * interface after manually setting a hw addr using
1106 * `ip set address`
1107 */
1dc32918 1108 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1109 } else {
1110 /* copy the MAC address out of the EEPROM */
1dc32918 1111 if (e1000_read_mac_addr(hw))
feb8f478 1112 e_err(probe, "EEPROM Read Error\n");
1da177e4 1113 }
67b3c27c 1114 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 1115 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1116 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1117
67b3c27c 1118 if (!is_valid_ether_addr(netdev->perm_addr))
feb8f478 1119 e_err(probe, "Invalid MAC Address\n");
1da177e4 1120
1da177e4 1121 init_timer(&adapter->tx_fifo_stall_timer);
c061b18d 1122 adapter->tx_fifo_stall_timer.function = e1000_82547_tx_fifo_stall;
e982f17c 1123 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 1124
1125 init_timer(&adapter->watchdog_timer);
c061b18d 1126 adapter->watchdog_timer.function = e1000_watchdog;
1da177e4
LT		 1127 adapter->watchdog_timer.data = (unsigned long) adapter;
1128
1da177e4 1129 init_timer(&adapter->phy_info_timer);
c061b18d 1130 adapter->phy_info_timer.function = e1000_update_phy_info;
e982f17c 1131 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 1132
5cf42fcd 1133 INIT_WORK(&adapter->fifo_stall_task, e1000_82547_tx_fifo_stall_task);
65f27f38 1134 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5cf42fcd 1135 INIT_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
1da177e4 1136
1da177e4
LT		 1137 e1000_check_options(adapter);
1138
1139 /* Initial Wake on LAN setting
1140 * If APM wake is enabled in the EEPROM,
1141 * enable the ACPI Magic Packet filter
1142 */
1143
1dc32918 1144 switch (hw->mac_type) {
1da177e4
LT		 1145 case e1000_82542_rev2_0:
1146 case e1000_82542_rev2_1:
1147 case e1000_82543:
1148 break;
1149 case e1000_82544:
1dc32918 1150 e1000_read_eeprom(hw,
1da177e4
LT		 1151 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1152 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1153 break;
1154 case e1000_82546:
1155 case e1000_82546_rev_3:
1dc32918
JP		 1156 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1157 e1000_read_eeprom(hw,
1da177e4
LT		 1158 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1159 break;
1160 }
1161 /* Fall Through */
1162 default:
1dc32918 1163 e1000_read_eeprom(hw,
1da177e4
LT		 1164 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1165 break;
1166 }
96838a40 1167 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1168 adapter->eeprom_wol |= E1000_WUFC_MAG;
1169
1170 /* now that we have the eeprom settings, apply the special cases
1171 * where the eeprom may be wrong or the board simply won't support
1172 * wake on lan on a particular port */
1173 switch (pdev->device) {
1174 case E1000_DEV_ID_82546GB_PCIE:
1175 adapter->eeprom_wol = 0;
1176 break;
1177 case E1000_DEV_ID_82546EB_FIBER:
1178 case E1000_DEV_ID_82546GB_FIBER:
120cd576
JB		 1179 /* Wake events only supported on port A for dual fiber
1180 * regardless of eeprom setting */
1dc32918 1181 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1182 adapter->eeprom_wol = 0;
1183 break;
1184 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1185 /* if quad port adapter, disable WoL on all but port A */
1186 if (global_quad_port_a != 0)
1187 adapter->eeprom_wol = 0;
1188 else
1189 adapter->quad_port_a = 1;
1190 /* Reset for multiple quad port adapters */
1191 if (++global_quad_port_a == 4)
1192 global_quad_port_a = 0;
1193 break;
1194 }
1195
1196 /* initialize the wol settings based on the eeprom settings */
1197 adapter->wol = adapter->eeprom_wol;
de126489 1198 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1199
5377a416
DB		 1200 /* Auto detect PHY address */
1201 if (hw->mac_type == e1000_ce4100) {
1202 for (i = 0; i < 32; i++) {
1203 hw->phy_addr = i;
1204 e1000_read_phy_reg(hw, PHY_ID2, &tmp);
1205 if (tmp == 0 || tmp == 0xFF) {
1206 if (i == 31)
1207 goto err_eeprom;
1208 continue;
1209 } else
1210 break;
1211 }
1212 }
1213
675ad473
ET		 1214 /* reset the hardware with the new settings */
1215 e1000_reset(adapter);
1216
1217 strcpy(netdev->name, "eth%d");
1218 err = register_netdev(netdev);
1219 if (err)
1220 goto err_register;
1221
5622e404
JP		 1222 e1000_vlan_mode(netdev, netdev->features);
1223
fb3d47d4 1224 /* print bus type/speed/width info */
feb8f478 1225 e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
7837e58c
JP		 1226 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1227 ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
1228 (hw->bus_speed == e1000_bus_speed_120) ? 120 :
1229 (hw->bus_speed == e1000_bus_speed_100) ? 100 :
1230 (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
1231 ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
1232 netdev->dev_addr);
1314bbf3 1233
eb62efd2
JB		 1234 /* carrier off reporting is important to ethtool even BEFORE open */
1235 netif_carrier_off(netdev);
1236
feb8f478 1237 e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
1da177e4
LT		 1238
1239 cards_found++;
1240 return 0;
1241
1242err_register:
6dd62ab0 1243err_eeprom:
1532ecea 1244 e1000_phy_hw_reset(hw);
6dd62ab0 1245
1dc32918
JP		 1246 if (hw->flash_address)
1247 iounmap(hw->flash_address);
6dd62ab0
VA		 1248 kfree(adapter->tx_ring);
1249 kfree(adapter->rx_ring);
e508be17 1250err_dma:
1da177e4 1251err_sw_init:
5377a416
DB		 1252err_mdio_ioremap:
1253 iounmap(ce4100_gbe_mdio_base_virt);
1dc32918 1254 iounmap(hw->hw_addr);
1da177e4
LT		 1255err_ioremap:
1256 free_netdev(netdev);
1257err_alloc_etherdev:
81250297 1258 pci_release_selected_regions(pdev, bars);
6dd62ab0 1259err_pci_reg:
6dd62ab0 1260 pci_disable_device(pdev);
1da177e4
LT		 1261 return err;
1262}
1263
1264/**
1265 * e1000_remove - Device Removal Routine
1266 * @pdev: PCI device information struct
1267 *
1268 * e1000_remove is called by the PCI subsystem to alert the driver
1269 * that it should release a PCI device. The could be caused by a
1270 * Hot-Plug event, or because the driver is going to be removed from
1271 * memory.
1272 **/
1273
64798845 1274static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1275{
1276 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1277 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1278 struct e1000_hw *hw = &adapter->hw;
1da177e4 1279
baa34745
JB		 1280 set_bit(__E1000_DOWN, &adapter->flags);
1281 del_timer_sync(&adapter->tx_fifo_stall_timer);
1282 del_timer_sync(&adapter->watchdog_timer);
1283 del_timer_sync(&adapter->phy_info_timer);
1284
28e53bdd 1285 cancel_work_sync(&adapter->reset_task);
be2b28ed 1286
0fccd0e9 1287 e1000_release_manageability(adapter);
1da177e4 1288
bea3348e
SH		 1289 unregister_netdev(netdev);
1290
1532ecea 1291 e1000_phy_hw_reset(hw);
1da177e4 1292
24025e4e
MC		 1293 kfree(adapter->tx_ring);
1294 kfree(adapter->rx_ring);
24025e4e 1295
1dc32918
JP		 1296 iounmap(hw->hw_addr);
1297 if (hw->flash_address)
1298 iounmap(hw->flash_address);
81250297 1299 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1300
1301 free_netdev(netdev);
1302
1303 pci_disable_device(pdev);
1304}
1305
1306/**
1307 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1308 * @adapter: board private structure to initialize
1309 *
1310 * e1000_sw_init initializes the Adapter private data structure.
e508be17 1311 * e1000_init_hw_struct MUST be called before this function
1da177e4
LT		 1312 **/
1313
64798845 1314static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4 1315{
eb0f8054 1316 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4 1317
f56799ea
JK		 1318 adapter->num_tx_queues = 1;
1319 adapter->num_rx_queues = 1;
581d708e
MC		 1320
1321 if (e1000_alloc_queues(adapter)) {
feb8f478 1322 e_err(probe, "Unable to allocate memory for queues\n");
581d708e
MC		 1323 return -ENOMEM;
1324 }
1325
47313054 1326 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1327 e1000_irq_disable(adapter);
1328
1da177e4 1329 spin_lock_init(&adapter->stats_lock);
1da177e4 1330
1314bbf3
AK		 1331 set_bit(__E1000_DOWN, &adapter->flags);
1332
1da177e4
LT		 1333 return 0;
1334}
1335
581d708e
MC		 1336/**
1337 * e1000_alloc_queues - Allocate memory for all rings
1338 * @adapter: board private structure to initialize
1339 *
1340 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1341 * number of queues at compile-time.
581d708e
MC		 1342 **/
1343
64798845 1344static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1345{
1c7e5b12
YB		 1346 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1347 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1348 if (!adapter->tx_ring)
1349 return -ENOMEM;
581d708e 1350
1c7e5b12
YB		 1351 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1352 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1353 if (!adapter->rx_ring) {
1354 kfree(adapter->tx_ring);
1355 return -ENOMEM;
1356 }
581d708e 1357
581d708e
MC		 1358 return E1000_SUCCESS;
1359}
1360
1da177e4
LT		 1361/**
1362 * e1000_open - Called when a network interface is made active
1363 * @netdev: network interface device structure
1364 *
1365 * Returns 0 on success, negative value on failure
1366 *
1367 * The open entry point is called when a network interface is made
1368 * active by the system (IFF_UP). At this point all resources needed
1369 * for transmit and receive operations are allocated, the interrupt
1370 * handler is registered with the OS, the watchdog timer is started,
1371 * and the stack is notified that the interface is ready.
1372 **/
1373
64798845 1374static int e1000_open(struct net_device *netdev)
1da177e4 1375{
60490fe0 1376 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1377 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1378 int err;
1379
2db10a08 1380 /* disallow open during test */
1314bbf3 1381 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1382 return -EBUSY;
1383
eb62efd2
JB		 1384 netif_carrier_off(netdev);
1385
1da177e4 1386 /* allocate transmit descriptors */
e0aac5a2
AK		 1387 err = e1000_setup_all_tx_resources(adapter);
1388 if (err)
1da177e4
LT		 1389 goto err_setup_tx;
1390
1391 /* allocate receive descriptors */
e0aac5a2 1392 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1393 if (err)
e0aac5a2 1394 goto err_setup_rx;
b5bf28cd 1395
79f05bf0
AK		 1396 e1000_power_up_phy(adapter);
1397
2d7edb92 1398 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1399 if ((hw->mng_cookie.status &
2d7edb92
MC		 1400 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1401 e1000_update_mng_vlan(adapter);
1402 }
1da177e4 1403
e0aac5a2
AK		 1404 /* before we allocate an interrupt, we must be ready to handle it.
1405 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1406 * as soon as we call pci_request_irq, so we have to setup our
1407 * clean_rx handler before we do so. */
1408 e1000_configure(adapter);
1409
1410 err = e1000_request_irq(adapter);
1411 if (err)
1412 goto err_req_irq;
1413
1414 /* From here on the code is the same as e1000_up() */
1415 clear_bit(__E1000_DOWN, &adapter->flags);
1416
bea3348e 1417 napi_enable(&adapter->napi);
47313054 1418
e0aac5a2
AK		 1419 e1000_irq_enable(adapter);
1420
076152d5
BH		 1421 netif_start_queue(netdev);
1422
e0aac5a2 1423 /* fire a link status change interrupt to start the watchdog */
1dc32918 1424 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1425
1da177e4
LT		 1426 return E1000_SUCCESS;
1427
b5bf28cd 1428err_req_irq:
e0aac5a2 1429 e1000_power_down_phy(adapter);
581d708e 1430 e1000_free_all_rx_resources(adapter);
1da177e4 1431err_setup_rx:
581d708e 1432 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1433err_setup_tx:
1434 e1000_reset(adapter);
1435
1436 return err;
1437}
1438
1439/**
1440 * e1000_close - Disables a network interface
1441 * @netdev: network interface device structure
1442 *
1443 * Returns 0, this is not allowed to fail
1444 *
1445 * The close entry point is called when an interface is de-activated
1446 * by the OS. The hardware is still under the drivers control, but
1447 * needs to be disabled. A global MAC reset is issued to stop the
1448 * hardware, and all transmit and receive resources are freed.
1449 **/
1450
64798845 1451static int e1000_close(struct net_device *netdev)
1da177e4 1452{
60490fe0 1453 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1454 struct e1000_hw *hw = &adapter->hw;
1da177e4 1455
2db10a08 1456 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1457 e1000_down(adapter);
79f05bf0 1458 e1000_power_down_phy(adapter);
2db10a08 1459 e1000_free_irq(adapter);
1da177e4 1460
581d708e
MC		 1461 e1000_free_all_tx_resources(adapter);
1462 e1000_free_all_rx_resources(adapter);
1da177e4 1463
4666560a
BA		 1464 /* kill manageability vlan ID if supported, but not if a vlan with
1465 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1466 if ((hw->mng_cookie.status &
4666560a 1467 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5622e404 1468 !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
2d7edb92
MC		 1469 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1470 }
b55ccb35 1471
1da177e4
LT		 1472 return 0;
1473}
1474
1475/**
1476 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1477 * @adapter: address of board private structure
2d7edb92
MC		 1478 * @start: address of beginning of memory
1479 * @len: length of memory
1da177e4 1480 **/
64798845
JP		 1481static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1482 unsigned long len)
1da177e4 1483{
1dc32918 1484 struct e1000_hw *hw = &adapter->hw;
e982f17c 1485 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1486 unsigned long end = begin + len;
1487
2648345f
MC		 1488 /* First rev 82545 and 82546 need to not allow any memory
1489 * write location to cross 64k boundary due to errata 23 */
1dc32918 1490 if (hw->mac_type == e1000_82545 ||
5377a416 1491 hw->mac_type == e1000_ce4100 ||
1dc32918 1492 hw->mac_type == e1000_82546) {
c3033b01 1493 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1494 }
1495
c3033b01 1496 return true;
1da177e4
LT		 1497}
1498
1499/**
1500 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1501 * @adapter: board private structure
581d708e 1502 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1503 *
1504 * Return 0 on success, negative on failure
1505 **/
1506
64798845
JP		 1507static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1508 struct e1000_tx_ring *txdr)
1da177e4 1509{
1da177e4
LT		 1510 struct pci_dev *pdev = adapter->pdev;
1511 int size;
1512
1513 size = sizeof(struct e1000_buffer) * txdr->count;
89bf67f1 1514 txdr->buffer_info = vzalloc(size);
96838a40 1515 if (!txdr->buffer_info) {
feb8f478
ET		 1516 e_err(probe, "Unable to allocate memory for the Tx descriptor "
1517 "ring\n");
1da177e4
LT		 1518 return -ENOMEM;
1519 }
1da177e4
LT		 1520
1521 /* round up to nearest 4K */
1522
1523 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1524 txdr->size = ALIGN(txdr->size, 4096);
1da177e4 1525
b16f53be
NN		 1526 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1527 GFP_KERNEL);
96838a40 1528 if (!txdr->desc) {
1da177e4 1529setup_tx_desc_die:
1da177e4 1530 vfree(txdr->buffer_info);
feb8f478
ET		 1531 e_err(probe, "Unable to allocate memory for the Tx descriptor "
1532 "ring\n");
1da177e4
LT		 1533 return -ENOMEM;
1534 }
1535
2648345f 1536 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1537 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1538 void *olddesc = txdr->desc;
1539 dma_addr_t olddma = txdr->dma;
feb8f478 1540 e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
675ad473 1541 txdr->size, txdr->desc);
2648345f 1542 /* Try again, without freeing the previous */
b16f53be
NN		 1543 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
1544 &txdr->dma, GFP_KERNEL);
2648345f 1545 /* Failed allocation, critical failure */
96838a40 1546 if (!txdr->desc) {
b16f53be
NN		 1547 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1548 olddma);
1da177e4
LT		 1549 goto setup_tx_desc_die;
1550 }
1551
1552 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1553 /* give up */
b16f53be
NN		 1554 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1555 txdr->dma);
1556 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1557 olddma);
feb8f478 1558 e_err(probe, "Unable to allocate aligned memory "
675ad473 1559 "for the transmit descriptor ring\n");
1da177e4
LT		 1560 vfree(txdr->buffer_info);
1561 return -ENOMEM;
1562 } else {
2648345f 1563 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1564 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1565 olddma);
1da177e4
LT		 1566 }
1567 }
1568 memset(txdr->desc, 0, txdr->size);
1569
1570 txdr->next_to_use = 0;
1571 txdr->next_to_clean = 0;
1572
1573 return 0;
1574}
1575
581d708e
MC		 1576/**
1577 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1578 * (Descriptors) for all queues
1579 * @adapter: board private structure
1580 *
581d708e
MC		 1581 * Return 0 on success, negative on failure
1582 **/
1583
64798845 1584int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1585{
1586 int i, err = 0;
1587
f56799ea 1588 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1589 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1590 if (err) {
feb8f478 1591 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1592 for (i-- ; i >= 0; i--)
1593 e1000_free_tx_resources(adapter,
1594 &adapter->tx_ring[i]);
581d708e
MC		 1595 break;
1596 }
1597 }
1598
1599 return err;
1600}
1601
1da177e4
LT		 1602/**
1603 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1604 * @adapter: board private structure
1605 *
1606 * Configure the Tx unit of the MAC after a reset.
1607 **/
1608
64798845 1609static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1610{
406874a7 1611 u64 tdba;
581d708e 1612 struct e1000_hw *hw = &adapter->hw;
1532ecea 1613 u32 tdlen, tctl, tipg;
406874a7 1614 u32 ipgr1, ipgr2;
1da177e4
LT		 1615
1616 /* Setup the HW Tx Head and Tail descriptor pointers */
1617
f56799ea 1618 switch (adapter->num_tx_queues) {
24025e4e
MC		 1619 case 1:
1620 default:
581d708e
MC		 1621 tdba = adapter->tx_ring[0].dma;
1622 tdlen = adapter->tx_ring[0].count *
1623 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1624 ew32(TDLEN, tdlen);
1625 ew32(TDBAH, (tdba >> 32));
1626 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1627 ew32(TDT, 0);
1628 ew32(TDH, 0);
6a951698
AK		 1629 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1630 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1631 break;
1632 }
1da177e4
LT		 1633
1634 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1635 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1636 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1637 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1638 else
1639 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1640
581d708e 1641 switch (hw->mac_type) {
1da177e4
LT		 1642 case e1000_82542_rev2_0:
1643 case e1000_82542_rev2_1:
1644 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1645 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1646 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1647 break;
1648 default:
0fadb059
JK		 1649 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1650 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1651 break;
1da177e4 1652 }
0fadb059
JK		 1653 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1654 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1655 ew32(TIPG, tipg);
1da177e4
LT		 1656
1657 /* Set the Tx Interrupt Delay register */
1658
1dc32918 1659 ew32(TIDV, adapter->tx_int_delay);
581d708e 1660 if (hw->mac_type >= e1000_82540)
1dc32918 1661 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1662
1663 /* Program the Transmit Control Register */
1664
1dc32918 1665 tctl = er32(TCTL);
1da177e4 1666 tctl &= ~E1000_TCTL_CT;
7e6c9861 1667 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1668 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1669
581d708e 1670 e1000_config_collision_dist(hw);
1da177e4
LT		 1671
1672 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1673 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1674
1675 /* only set IDE if we are delaying interrupts using the timers */
1676 if (adapter->tx_int_delay)
1677 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1678
581d708e 1679 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1680 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1681 else
1682 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1683
1684 /* Cache if we're 82544 running in PCI-X because we'll
1685 * need this to apply a workaround later in the send path. */
581d708e
MC		 1686 if (hw->mac_type == e1000_82544 &&
1687 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1688 adapter->pcix_82544 = 1;
7e6c9861 1689
1dc32918 1690 ew32(TCTL, tctl);
7e6c9861 1691
1da177e4
LT		 1692}
1693
1694/**
1695 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1696 * @adapter: board private structure
581d708e 1697 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1698 *
1699 * Returns 0 on success, negative on failure
1700 **/
1701
64798845
JP		 1702static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1703 struct e1000_rx_ring *rxdr)
1da177e4 1704{
1da177e4 1705 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1706 int size, desc_len;
1da177e4
LT		 1707
1708 size = sizeof(struct e1000_buffer) * rxdr->count;
89bf67f1 1709 rxdr->buffer_info = vzalloc(size);
581d708e 1710 if (!rxdr->buffer_info) {
feb8f478
ET		 1711 e_err(probe, "Unable to allocate memory for the Rx descriptor "
1712 "ring\n");
1da177e4
LT		 1713 return -ENOMEM;
1714 }
1da177e4 1715
1532ecea 1716 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1717
1da177e4
LT		 1718 /* Round up to nearest 4K */
1719
2d7edb92 1720 rxdr->size = rxdr->count * desc_len;
9099cfb9 1721 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4 1722
b16f53be
NN		 1723 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1724 GFP_KERNEL);
1da177e4 1725
581d708e 1726 if (!rxdr->desc) {
feb8f478
ET		 1727 e_err(probe, "Unable to allocate memory for the Rx descriptor "
1728 "ring\n");
1da177e4 1729setup_rx_desc_die:
1da177e4
LT		 1730 vfree(rxdr->buffer_info);
1731 return -ENOMEM;
1732 }
1733
2648345f 1734 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1735 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1736 void *olddesc = rxdr->desc;
1737 dma_addr_t olddma = rxdr->dma;
feb8f478 1738 e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
675ad473 1739 rxdr->size, rxdr->desc);
2648345f 1740 /* Try again, without freeing the previous */
b16f53be
NN		 1741 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
1742 &rxdr->dma, GFP_KERNEL);
2648345f 1743 /* Failed allocation, critical failure */
581d708e 1744 if (!rxdr->desc) {
b16f53be
NN		 1745 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1746 olddma);
feb8f478
ET		 1747 e_err(probe, "Unable to allocate memory for the Rx "
1748 "descriptor ring\n");
1da177e4
LT		 1749 goto setup_rx_desc_die;
1750 }
1751
1752 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1753 /* give up */
b16f53be
NN		 1754 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1755 rxdr->dma);
1756 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1757 olddma);
feb8f478
ET		 1758 e_err(probe, "Unable to allocate aligned memory for "
1759 "the Rx descriptor ring\n");
581d708e 1760 goto setup_rx_desc_die;
1da177e4 1761 } else {
2648345f 1762 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1763 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1764 olddma);
1da177e4
LT		 1765 }
1766 }
1767 memset(rxdr->desc, 0, rxdr->size);
1768
1769 rxdr->next_to_clean = 0;
1770 rxdr->next_to_use = 0;
edbbb3ca 1771 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1772
1773 return 0;
1774}
1775
581d708e
MC		 1776/**
1777 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1778 * (Descriptors) for all queues
1779 * @adapter: board private structure
1780 *
581d708e
MC		 1781 * Return 0 on success, negative on failure
1782 **/
1783
64798845 1784int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1785{
1786 int i, err = 0;
1787
f56799ea 1788 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1789 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1790 if (err) {
feb8f478 1791 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1792 for (i-- ; i >= 0; i--)
1793 e1000_free_rx_resources(adapter,
1794 &adapter->rx_ring[i]);
581d708e
MC		 1795 break;
1796 }
1797 }
1798
1799 return err;
1800}
1801
1da177e4 1802/**
2648345f 1803 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1804 * @adapter: Board private structure
1805 **/
64798845 1806static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1807{
1dc32918 1808 struct e1000_hw *hw = &adapter->hw;
630b25cd 1809 u32 rctl;
1da177e4 1810
1dc32918 1811 rctl = er32(RCTL);
1da177e4
LT		 1812
1813 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1814
1815 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1816 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1817 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1818
1dc32918 1819 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1820 rctl |= E1000_RCTL_SBP;
1821 else
1822 rctl &= ~E1000_RCTL_SBP;
1823
2d7edb92
MC		 1824 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1825 rctl &= ~E1000_RCTL_LPE;
1826 else
1827 rctl |= E1000_RCTL_LPE;
1828
1da177e4 1829 /* Setup buffer sizes */
9e2feace
AK		 1830 rctl &= ~E1000_RCTL_SZ_4096;
1831 rctl |= E1000_RCTL_BSEX;
1832 switch (adapter->rx_buffer_len) {
a1415ee6
JK		 1833 case E1000_RXBUFFER_2048:
1834 default:
1835 rctl |= E1000_RCTL_SZ_2048;
1836 rctl &= ~E1000_RCTL_BSEX;
1837 break;
1838 case E1000_RXBUFFER_4096:
1839 rctl |= E1000_RCTL_SZ_4096;
1840 break;
1841 case E1000_RXBUFFER_8192:
1842 rctl |= E1000_RCTL_SZ_8192;
1843 break;
1844 case E1000_RXBUFFER_16384:
1845 rctl |= E1000_RCTL_SZ_16384;
1846 break;
2d7edb92
MC		 1847 }
1848
1dc32918 1849 ew32(RCTL, rctl);
1da177e4
LT		 1850}
1851
1852/**
1853 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1854 * @adapter: board private structure
1855 *
1856 * Configure the Rx unit of the MAC after a reset.
1857 **/
1858
64798845 1859static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1860{
406874a7 1861 u64 rdba;
581d708e 1862 struct e1000_hw *hw = &adapter->hw;
1532ecea 1863 u32 rdlen, rctl, rxcsum;
2d7edb92 1864
edbbb3ca
JB		 1865 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1866 rdlen = adapter->rx_ring[0].count *
1867 sizeof(struct e1000_rx_desc);
1868 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1869 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1870 } else {
1871 rdlen = adapter->rx_ring[0].count *
1872 sizeof(struct e1000_rx_desc);
1873 adapter->clean_rx = e1000_clean_rx_irq;
1874 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1875 }
1da177e4
LT		 1876
1877 /* disable receives while setting up the descriptors */
1dc32918
JP		 1878 rctl = er32(RCTL);
1879 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1880
1881 /* set the Receive Delay Timer Register */
1dc32918 1882 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1883
581d708e 1884 if (hw->mac_type >= e1000_82540) {
1dc32918 1885 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1886 if (adapter->itr_setting != 0)
1dc32918 1887 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1888 }
1889
581d708e
MC		 1890 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1891 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1892 switch (adapter->num_rx_queues) {
24025e4e
MC		 1893 case 1:
1894 default:
581d708e 1895 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1896 ew32(RDLEN, rdlen);
1897 ew32(RDBAH, (rdba >> 32));
1898 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1899 ew32(RDT, 0);
1900 ew32(RDH, 0);
6a951698
AK		 1901 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1902 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 1903 break;
24025e4e
MC		 1904 }
1905
1da177e4 1906 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1907 if (hw->mac_type >= e1000_82543) {
1dc32918 1908 rxcsum = er32(RXCSUM);
630b25cd 1909 if (adapter->rx_csum)
2d7edb92 1910 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1911 else
2d7edb92 1912 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1913 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1914 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1915 }
1916
1917 /* Enable Receives */
1dc32918 1918 ew32(RCTL, rctl);
1da177e4
LT		 1919}
1920
1921/**
581d708e 1922 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1923 * @adapter: board private structure
581d708e 1924 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1925 *
1926 * Free all transmit software resources
1927 **/
1928
64798845
JP		 1929static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1930 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1931{
1932 struct pci_dev *pdev = adapter->pdev;
1933
581d708e 1934 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1935
581d708e
MC		 1936 vfree(tx_ring->buffer_info);
1937 tx_ring->buffer_info = NULL;
1da177e4 1938
b16f53be
NN		 1939 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1940 tx_ring->dma);
1da177e4 1941
581d708e
MC		 1942 tx_ring->desc = NULL;
1943}
1944
1945/**
1946 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1947 * @adapter: board private structure
1948 *
1949 * Free all transmit software resources
1950 **/
1951
64798845 1952void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1953{
1954 int i;
1955
f56799ea 1956 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1957 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1958}
1959
64798845
JP		 1960static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1961 struct e1000_buffer *buffer_info)
1da177e4 1962{
602c0554
AD		 1963 if (buffer_info->dma) {
1964 if (buffer_info->mapped_as_page)
b16f53be
NN		 1965 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1966 buffer_info->length, DMA_TO_DEVICE);
602c0554 1967 else
b16f53be 1968 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
602c0554 1969 buffer_info->length,
b16f53be 1970 DMA_TO_DEVICE);
602c0554
AD		 1971 buffer_info->dma = 0;
1972 }
a9ebadd6 1973 if (buffer_info->skb) {
1da177e4 1974 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1975 buffer_info->skb = NULL;
1976 }
37e73df8 1977 buffer_info->time_stamp = 0;
a9ebadd6 1978 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1979}
1980
1981/**
1982 * e1000_clean_tx_ring - Free Tx Buffers
1983 * @adapter: board private structure
581d708e 1984 * @tx_ring: ring to be cleaned
1da177e4
LT		 1985 **/
1986
64798845
JP		 1987static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1988 struct e1000_tx_ring *tx_ring)
1da177e4 1989{
1dc32918 1990 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1991 struct e1000_buffer *buffer_info;
1992 unsigned long size;
1993 unsigned int i;
1994
1995 /* Free all the Tx ring sk_buffs */
1996
96838a40 1997 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1998 buffer_info = &tx_ring->buffer_info[i];
1999 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2000 }
2001
2002 size = sizeof(struct e1000_buffer) * tx_ring->count;
2003 memset(tx_ring->buffer_info, 0, size);
2004
2005 /* Zero out the descriptor ring */
2006
2007 memset(tx_ring->desc, 0, tx_ring->size);
2008
2009 tx_ring->next_to_use = 0;
2010 tx_ring->next_to_clean = 0;
fd803241 2011 tx_ring->last_tx_tso = 0;
1da177e4 2012
1dc32918
JP		 2013 writel(0, hw->hw_addr + tx_ring->tdh);
2014 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2015}
2016
2017/**
2018 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2019 * @adapter: board private structure
2020 **/
2021
64798845 2022static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2023{
2024 int i;
2025
f56799ea 2026 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2027 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2028}
2029
2030/**
2031 * e1000_free_rx_resources - Free Rx Resources
2032 * @adapter: board private structure
581d708e 2033 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2034 *
2035 * Free all receive software resources
2036 **/
2037
64798845
JP		 2038static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2039 struct e1000_rx_ring *rx_ring)
1da177e4 2040{
1da177e4
LT		 2041 struct pci_dev *pdev = adapter->pdev;
2042
581d708e 2043 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2044
2045 vfree(rx_ring->buffer_info);
2046 rx_ring->buffer_info = NULL;
2047
b16f53be
NN		 2048 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2049 rx_ring->dma);
1da177e4
LT		 2050
2051 rx_ring->desc = NULL;
2052}
2053
2054/**
581d708e 2055 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2056 * @adapter: board private structure
581d708e
MC		 2057 *
2058 * Free all receive software resources
2059 **/
2060
64798845 2061void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2062{
2063 int i;
2064
f56799ea 2065 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2066 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2067}
2068
2069/**
2070 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2071 * @adapter: board private structure
2072 * @rx_ring: ring to free buffers from
1da177e4
LT		 2073 **/
2074
64798845
JP		 2075static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2076 struct e1000_rx_ring *rx_ring)
1da177e4 2077{
1dc32918 2078 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2079 struct e1000_buffer *buffer_info;
2080 struct pci_dev *pdev = adapter->pdev;
2081 unsigned long size;
630b25cd 2082 unsigned int i;
1da177e4
LT		 2083
2084 /* Free all the Rx ring sk_buffs */
96838a40 2085 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2086 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB		 2087 if (buffer_info->dma &&
2088 adapter->clean_rx == e1000_clean_rx_irq) {
b16f53be 2089 dma_unmap_single(&pdev->dev, buffer_info->dma,
edbbb3ca 2090 buffer_info->length,
b16f53be 2091 DMA_FROM_DEVICE);
edbbb3ca
JB		 2092 } else if (buffer_info->dma &&
2093 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
b16f53be
NN		 2094 dma_unmap_page(&pdev->dev, buffer_info->dma,
2095 buffer_info->length,
2096 DMA_FROM_DEVICE);
679be3ba 2097 }
1da177e4 2098
679be3ba 2099 buffer_info->dma = 0;
edbbb3ca
JB		 2100 if (buffer_info->page) {
2101 put_page(buffer_info->page);
2102 buffer_info->page = NULL;
2103 }
679be3ba 2104 if (buffer_info->skb) {
1da177e4
LT		 2105 dev_kfree_skb(buffer_info->skb);
2106 buffer_info->skb = NULL;
997f5cbd 2107 }
1da177e4
LT		 2108 }
2109
edbbb3ca
JB		 2110 /* there also may be some cached data from a chained receive */
2111 if (rx_ring->rx_skb_top) {
2112 dev_kfree_skb(rx_ring->rx_skb_top);
2113 rx_ring->rx_skb_top = NULL;
2114 }
2115
1da177e4
LT		 2116 size = sizeof(struct e1000_buffer) * rx_ring->count;
2117 memset(rx_ring->buffer_info, 0, size);
2118
2119 /* Zero out the descriptor ring */
1da177e4
LT		 2120 memset(rx_ring->desc, 0, rx_ring->size);
2121
2122 rx_ring->next_to_clean = 0;
2123 rx_ring->next_to_use = 0;
2124
1dc32918
JP		 2125 writel(0, hw->hw_addr + rx_ring->rdh);
2126 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2127}
2128
2129/**
2130 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2131 * @adapter: board private structure
2132 **/
2133
64798845 2134static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2135{
2136 int i;
2137
f56799ea 2138 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2139 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2140}
2141
2142/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2143 * and memory write and invalidate disabled for certain operations
2144 */
64798845 2145static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2146{
1dc32918 2147 struct e1000_hw *hw = &adapter->hw;
1da177e4 2148 struct net_device *netdev = adapter->netdev;
406874a7 2149 u32 rctl;
1da177e4 2150
1dc32918 2151 e1000_pci_clear_mwi(hw);
1da177e4 2152
1dc32918 2153 rctl = er32(RCTL);
1da177e4 2154 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2155 ew32(RCTL, rctl);
2156 E1000_WRITE_FLUSH();
1da177e4
LT		 2157 mdelay(5);
2158
96838a40 2159 if (netif_running(netdev))
581d708e 2160 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2161}
2162
64798845 2163static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2164{
1dc32918 2165 struct e1000_hw *hw = &adapter->hw;
1da177e4 2166 struct net_device *netdev = adapter->netdev;
406874a7 2167 u32 rctl;
1da177e4 2168
1dc32918 2169 rctl = er32(RCTL);
1da177e4 2170 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2171 ew32(RCTL, rctl);
2172 E1000_WRITE_FLUSH();
1da177e4
LT		 2173 mdelay(5);
2174
1dc32918
JP		 2175 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2176 e1000_pci_set_mwi(hw);
1da177e4 2177
96838a40 2178 if (netif_running(netdev)) {
72d64a43
JK		 2179 /* No need to loop, because 82542 supports only 1 queue */
2180 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2181 e1000_configure_rx(adapter);
72d64a43 2182 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2183 }
2184}
2185
2186/**
2187 * e1000_set_mac - Change the Ethernet Address of the NIC
2188 * @netdev: network interface device structure
2189 * @p: pointer to an address structure
2190 *
2191 * Returns 0 on success, negative on failure
2192 **/
2193
64798845 2194static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2195{
60490fe0 2196 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2197 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2198 struct sockaddr *addr = p;
2199
96838a40 2200 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2201 return -EADDRNOTAVAIL;
2202
2203 /* 82542 2.0 needs to be in reset to write receive address registers */
2204
1dc32918 2205 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2206 e1000_enter_82542_rst(adapter);
2207
2208 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2209 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2210
1dc32918 2211 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2212
1dc32918 2213 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2214 e1000_leave_82542_rst(adapter);
2215
2216 return 0;
2217}
2218
2219/**
db0ce50d 2220 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2221 * @netdev: network interface device structure
2222 *
db0ce50d
PM		 2223 * The set_rx_mode entry point is called whenever the unicast or multicast
2224 * address lists or the network interface flags are updated. This routine is
2225 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2226 * promiscuous mode, and all-multi behavior.
2227 **/
2228
64798845 2229static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2230{
60490fe0 2231 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2232 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2233 struct netdev_hw_addr *ha;
2234 bool use_uc = false;
406874a7
JP		 2235 u32 rctl;
2236 u32 hash_value;
868d5309 2237 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2238 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2239 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2240
2241 if (!mcarray) {
feb8f478 2242 e_err(probe, "memory allocation failed\n");
81c52285
JB		 2243 return;
2244 }
cd94dd0b 2245
2648345f
MC		 2246 /* Check for Promiscuous and All Multicast modes */
2247
1dc32918 2248 rctl = er32(RCTL);
1da177e4 2249
96838a40 2250 if (netdev->flags & IFF_PROMISC) {
1da177e4 2251 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2252 rctl &= ~E1000_RCTL_VFE;
1da177e4 2253 } else {
1532ecea 2254 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2255 rctl |= E1000_RCTL_MPE;
1532ecea 2256 else
746b9f02 2257 rctl &= ~E1000_RCTL_MPE;
1532ecea 2258 /* Enable VLAN filter if there is a VLAN */
5622e404 2259 if (e1000_vlan_used(adapter))
1532ecea 2260 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2261 }
2262
32e7bfc4 2263 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2264 rctl |= E1000_RCTL_UPE;
2265 } else if (!(netdev->flags & IFF_PROMISC)) {
2266 rctl &= ~E1000_RCTL_UPE;
ccffad25 2267 use_uc = true;
1da177e4
LT		 2268 }
2269
1dc32918 2270 ew32(RCTL, rctl);
1da177e4
LT		 2271
2272 /* 82542 2.0 needs to be in reset to write receive address registers */
2273
96838a40 2274 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2275 e1000_enter_82542_rst(adapter);
2276
db0ce50d
PM		 2277 /* load the first 14 addresses into the exact filters 1-14. Unicast
2278 * addresses take precedence to avoid disabling unicast filtering
2279 * when possible.
2280 *
b595076a 2281 * RAR 0 is used for the station MAC address
1da177e4
LT		 2282 * if there are not 14 addresses, go ahead and clear the filters
2283 */
ccffad25
JP		 2284 i = 1;
2285 if (use_uc)
32e7bfc4 2286 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2287 if (i == rar_entries)
2288 break;
2289 e1000_rar_set(hw, ha->addr, i++);
2290 }
2291
22bedad3 2292 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP		 2293 if (i == rar_entries) {
2294 /* load any remaining addresses into the hash table */
2295 u32 hash_reg, hash_bit, mta;
22bedad3 2296 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP		 2297 hash_reg = (hash_value >> 5) & 0x7F;
2298 hash_bit = hash_value & 0x1F;
2299 mta = (1 << hash_bit);
2300 mcarray[hash_reg] |= mta;
10886af5 2301 } else {
22bedad3 2302 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT		 2303 }
2304 }
2305
7a81e9f3
JP		 2306 for (; i < rar_entries; i++) {
2307 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2308 E1000_WRITE_FLUSH();
2309 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2310 E1000_WRITE_FLUSH();
1da177e4
LT		 2311 }
2312
81c52285
JB		 2313 /* write the hash table completely, write from bottom to avoid
2314 * both stupid write combining chipsets, and flushing each write */
2315 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2316 /*
2317 * If we are on an 82544 has an errata where writing odd
2318 * offsets overwrites the previous even offset, but writing
2319 * backwards over the range solves the issue by always
2320 * writing the odd offset first
2321 */
2322 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2323 }
2324 E1000_WRITE_FLUSH();
2325
96838a40 2326 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2327 e1000_leave_82542_rst(adapter);
81c52285
JB		 2328
2329 kfree(mcarray);
1da177e4
LT		 2330}
2331
2332/* Need to wait a few seconds after link up to get diagnostic information from
2333 * the phy */
2334
64798845 2335static void e1000_update_phy_info(unsigned long data)
1da177e4 2336{
e982f17c 2337 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
5cf42fcd
JB		 2338 schedule_work(&adapter->phy_info_task);
2339}
2340
2341static void e1000_update_phy_info_task(struct work_struct *work)
2342{
2343 struct e1000_adapter *adapter = container_of(work,
2344 struct e1000_adapter,
2345 phy_info_task);
1dc32918 2346 struct e1000_hw *hw = &adapter->hw;
338c15e4
JB		 2347
2348 rtnl_lock();
1dc32918 2349 e1000_phy_get_info(hw, &adapter->phy_info);
338c15e4 2350 rtnl_unlock();
1da177e4
LT		 2351}
2352
2353/**
2354 * e1000_82547_tx_fifo_stall - Timer Call-back
2355 * @data: pointer to adapter cast into an unsigned long
2356 **/
64798845 2357static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2358{
e982f17c 2359 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
5cf42fcd
JB		 2360 schedule_work(&adapter->fifo_stall_task);
2361}
2362
2363/**
2364 * e1000_82547_tx_fifo_stall_task - task to complete work
2365 * @work: work struct contained inside adapter struct
2366 **/
2367static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
2368{
2369 struct e1000_adapter *adapter = container_of(work,
2370 struct e1000_adapter,
2371 fifo_stall_task);
1dc32918 2372 struct e1000_hw *hw = &adapter->hw;
1da177e4 2373 struct net_device *netdev = adapter->netdev;
406874a7 2374 u32 tctl;
1da177e4 2375
338c15e4 2376 rtnl_lock();
96838a40 2377 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2378 if ((er32(TDT) == er32(TDH)) &&
2379 (er32(TDFT) == er32(TDFH)) &&
2380 (er32(TDFTS) == er32(TDFHS))) {
2381 tctl = er32(TCTL);
2382 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2383 ew32(TDFT, adapter->tx_head_addr);
2384 ew32(TDFH, adapter->tx_head_addr);
2385 ew32(TDFTS, adapter->tx_head_addr);
2386 ew32(TDFHS, adapter->tx_head_addr);
2387 ew32(TCTL, tctl);
2388 E1000_WRITE_FLUSH();
1da177e4
LT		 2389
2390 adapter->tx_fifo_head = 0;
2391 atomic_set(&adapter->tx_fifo_stall, 0);
2392 netif_wake_queue(netdev);
baa34745 2393 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
1da177e4
LT		 2394 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2395 }
2396 }
338c15e4 2397 rtnl_unlock();
1da177e4
LT		 2398}
2399
b548192a 2400bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2401{
2402 struct e1000_hw *hw = &adapter->hw;
2403 bool link_active = false;
be0f0719 2404
6d9e5130
NS		 2405 /* get_link_status is set on LSC (link status) interrupt or rx
2406 * sequence error interrupt (except on intel ce4100).
2407 * get_link_status will stay false until the
2408 * e1000_check_for_link establishes link for copper adapters
2409 * ONLY
be0f0719
JB		 2410 */
2411 switch (hw->media_type) {
2412 case e1000_media_type_copper:
6d9e5130
NS		 2413 if (hw->mac_type == e1000_ce4100)
2414 hw->get_link_status = 1;
be0f0719 2415 if (hw->get_link_status) {
120a5d0d 2416 e1000_check_for_link(hw);
be0f0719
JB		 2417 link_active = !hw->get_link_status;
2418 } else {
2419 link_active = true;
2420 }
2421 break;
2422 case e1000_media_type_fiber:
120a5d0d 2423 e1000_check_for_link(hw);
be0f0719
JB		 2424 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2425 break;
2426 case e1000_media_type_internal_serdes:
120a5d0d 2427 e1000_check_for_link(hw);
be0f0719
JB		 2428 link_active = hw->serdes_has_link;
2429 break;
2430 default:
2431 break;
2432 }
2433
2434 return link_active;
2435}
2436
1da177e4
LT		 2437/**
2438 * e1000_watchdog - Timer Call-back
2439 * @data: pointer to adapter cast into an unsigned long
2440 **/
64798845 2441static void e1000_watchdog(unsigned long data)
1da177e4 2442{
e982f17c 2443 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2444 struct e1000_hw *hw = &adapter->hw;
1da177e4 2445 struct net_device *netdev = adapter->netdev;
545c67c0 2446 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2447 u32 link, tctl;
90fb5135 2448
be0f0719
JB		 2449 link = e1000_has_link(adapter);
2450 if ((netif_carrier_ok(netdev)) && link)
2451 goto link_up;
1da177e4 2452
96838a40
JB		 2453 if (link) {
2454 if (!netif_carrier_ok(netdev)) {
406874a7 2455 u32 ctrl;
c3033b01 2456 bool txb2b = true;
be0f0719 2457 /* update snapshot of PHY registers on LSC */
1dc32918 2458 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2459 &adapter->link_speed,
2460 &adapter->link_duplex);
2461
1dc32918 2462 ctrl = er32(CTRL);
675ad473
ET		 2463 pr_info("%s NIC Link is Up %d Mbps %s, "
2464 "Flow Control: %s\n",
2465 netdev->name,
2466 adapter->link_speed,
2467 adapter->link_duplex == FULL_DUPLEX ?
2468 "Full Duplex" : "Half Duplex",
2469 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2470 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2471 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2472 E1000_CTRL_TFCE) ? "TX" : "None")));
1da177e4 2473
39ca5f03 2474 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2475 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2476 switch (adapter->link_speed) {
2477 case SPEED_10:
c3033b01 2478 txb2b = false;
be0f0719 2479 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2480 break;
2481 case SPEED_100:
c3033b01 2482 txb2b = false;
7e6c9861
JK		 2483 /* maybe add some timeout factor ? */
2484 break;
2485 }
2486
1532ecea 2487 /* enable transmits in the hardware */
1dc32918 2488 tctl = er32(TCTL);
7e6c9861 2489 tctl |= E1000_TCTL_EN;
1dc32918 2490 ew32(TCTL, tctl);
66a2b0a3 2491
1da177e4 2492 netif_carrier_on(netdev);
baa34745
JB		 2493 if (!test_bit(__E1000_DOWN, &adapter->flags))
2494 mod_timer(&adapter->phy_info_timer,
2495 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2496 adapter->smartspeed = 0;
2497 }
2498 } else {
96838a40 2499 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2500 adapter->link_speed = 0;
2501 adapter->link_duplex = 0;
675ad473
ET		 2502 pr_info("%s NIC Link is Down\n",
2503 netdev->name);
1da177e4 2504 netif_carrier_off(netdev);
baa34745
JB		 2505
2506 if (!test_bit(__E1000_DOWN, &adapter->flags))
2507 mod_timer(&adapter->phy_info_timer,
2508 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2509 }
2510
2511 e1000_smartspeed(adapter);
2512 }
2513
be0f0719 2514link_up:
1da177e4
LT		 2515 e1000_update_stats(adapter);
2516
1dc32918 2517 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2518 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2519 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2520 adapter->colc_old = adapter->stats.colc;
2521
2522 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2523 adapter->gorcl_old = adapter->stats.gorcl;
2524 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2525 adapter->gotcl_old = adapter->stats.gotcl;
2526
1dc32918 2527 e1000_update_adaptive(hw);
1da177e4 2528
f56799ea 2529 if (!netif_carrier_ok(netdev)) {
581d708e 2530 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2531 /* We've lost link, so the controller stops DMA,
2532 * but we've got queued Tx work that's never going
2533 * to get done, so reset controller to flush Tx.
2534 * (Do the reset outside of interrupt context). */
87041639
JK		 2535 adapter->tx_timeout_count++;
2536 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 2537 /* return immediately since reset is imminent */
2538 return;
1da177e4
LT		 2539 }
2540 }
2541
eab2abf5
JB		 2542 /* Simple mode for Interrupt Throttle Rate (ITR) */
2543 if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
2544 /*
2545 * Symmetric Tx/Rx gets a reduced ITR=2000;
2546 * Total asymmetrical Tx or Rx gets ITR=8000;
2547 * everyone else is between 2000-8000.
2548 */
2549 u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
2550 u32 dif = (adapter->gotcl > adapter->gorcl ?
2551 adapter->gotcl - adapter->gorcl :
2552 adapter->gorcl - adapter->gotcl) / 10000;
2553 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2554
2555 ew32(ITR, 1000000000 / (itr * 256));
2556 }
2557
1da177e4 2558 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2559 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2560
2648345f 2561 /* Force detection of hung controller every watchdog period */
c3033b01 2562 adapter->detect_tx_hung = true;
1da177e4
LT		 2563
2564 /* Reset the timer */
baa34745
JB		 2565 if (!test_bit(__E1000_DOWN, &adapter->flags))
2566 mod_timer(&adapter->watchdog_timer,
2567 round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2568}
2569
835bb129
JB		 2570enum latency_range {
2571 lowest_latency = 0,
2572 low_latency = 1,
2573 bulk_latency = 2,
2574 latency_invalid = 255
2575};
2576
2577/**
2578 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2579 * @adapter: pointer to adapter
2580 * @itr_setting: current adapter->itr
2581 * @packets: the number of packets during this measurement interval
2582 * @bytes: the number of bytes during this measurement interval
2583 *
835bb129
JB		 2584 * Stores a new ITR value based on packets and byte
2585 * counts during the last interrupt. The advantage of per interrupt
2586 * computation is faster updates and more accurate ITR for the current
2587 * traffic pattern. Constants in this function were computed
2588 * based on theoretical maximum wire speed and thresholds were set based
2589 * on testing data as well as attempting to minimize response time
2590 * while increasing bulk throughput.
2591 * this functionality is controlled by the InterruptThrottleRate module
2592 * parameter (see e1000_param.c)
835bb129
JB		 2593 **/
2594static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2595 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2596{
2597 unsigned int retval = itr_setting;
2598 struct e1000_hw *hw = &adapter->hw;
2599
2600 if (unlikely(hw->mac_type < e1000_82540))
2601 goto update_itr_done;
2602
2603 if (packets == 0)
2604 goto update_itr_done;
2605
835bb129
JB		 2606 switch (itr_setting) {
2607 case lowest_latency:
2b65326e
JB		 2608 /* jumbo frames get bulk treatment*/
2609 if (bytes/packets > 8000)
2610 retval = bulk_latency;
2611 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2612 retval = low_latency;
2613 break;
2614 case low_latency: /* 50 usec aka 20000 ints/s */
2615 if (bytes > 10000) {
2b65326e
JB		 2616 /* jumbo frames need bulk latency setting */
2617 if (bytes/packets > 8000)
2618 retval = bulk_latency;
2619 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2620 retval = bulk_latency;
2621 else if ((packets > 35))
2622 retval = lowest_latency;
2b65326e
JB		 2623 } else if (bytes/packets > 2000)
2624 retval = bulk_latency;
2625 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2626 retval = lowest_latency;
2627 break;
2628 case bulk_latency: /* 250 usec aka 4000 ints/s */
2629 if (bytes > 25000) {
2630 if (packets > 35)
2631 retval = low_latency;
2b65326e
JB		 2632 } else if (bytes < 6000) {
2633 retval = low_latency;
835bb129
JB		 2634 }
2635 break;
2636 }
2637
2638update_itr_done:
2639 return retval;
2640}
2641
2642static void e1000_set_itr(struct e1000_adapter *adapter)
2643{
2644 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2645 u16 current_itr;
2646 u32 new_itr = adapter->itr;
835bb129
JB		 2647
2648 if (unlikely(hw->mac_type < e1000_82540))
2649 return;
2650
2651 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2652 if (unlikely(adapter->link_speed != SPEED_1000)) {
2653 current_itr = 0;
2654 new_itr = 4000;
2655 goto set_itr_now;
2656 }
2657
2658 adapter->tx_itr = e1000_update_itr(adapter,
2659 adapter->tx_itr,
2660 adapter->total_tx_packets,
2661 adapter->total_tx_bytes);
2b65326e
JB		 2662 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2663 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2664 adapter->tx_itr = low_latency;
2665
835bb129
JB		 2666 adapter->rx_itr = e1000_update_itr(adapter,
2667 adapter->rx_itr,
2668 adapter->total_rx_packets,
2669 adapter->total_rx_bytes);
2b65326e
JB		 2670 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2671 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2672 adapter->rx_itr = low_latency;
835bb129
JB		 2673
2674 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2675
835bb129
JB		 2676 switch (current_itr) {
2677 /* counts and packets in update_itr are dependent on these numbers */
2678 case lowest_latency:
2679 new_itr = 70000;
2680 break;
2681 case low_latency:
2682 new_itr = 20000; /* aka hwitr = ~200 */
2683 break;
2684 case bulk_latency:
2685 new_itr = 4000;
2686 break;
2687 default:
2688 break;
2689 }
2690
2691set_itr_now:
2692 if (new_itr != adapter->itr) {
2693 /* this attempts to bias the interrupt rate towards Bulk
2694 * by adding intermediate steps when interrupt rate is
2695 * increasing */
2696 new_itr = new_itr > adapter->itr ?
2697 min(adapter->itr + (new_itr >> 2), new_itr) :
2698 new_itr;
2699 adapter->itr = new_itr;
1dc32918 2700 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129 2701 }
835bb129
JB		 2702}
2703
1da177e4
LT		 2704#define E1000_TX_FLAGS_CSUM 0x00000001
2705#define E1000_TX_FLAGS_VLAN 0x00000002
2706#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2707#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2708#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2709#define E1000_TX_FLAGS_VLAN_SHIFT 16
2710
64798845
JP		 2711static int e1000_tso(struct e1000_adapter *adapter,
2712 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2713{
1da177e4 2714 struct e1000_context_desc *context_desc;
545c67c0 2715 struct e1000_buffer *buffer_info;
1da177e4 2716 unsigned int i;
406874a7
JP		 2717 u32 cmd_length = 0;
2718 u16 ipcse = 0, tucse, mss;
2719 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2720 int err;
2721
89114afd 2722 if (skb_is_gso(skb)) {
1da177e4
LT		 2723 if (skb_header_cloned(skb)) {
2724 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2725 if (err)
2726 return err;
2727 }
2728
ab6a5bb6 2729 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2730 mss = skb_shinfo(skb)->gso_size;
60828236 2731 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2732 struct iphdr *iph = ip_hdr(skb);
2733 iph->tot_len = 0;
2734 iph->check = 0;
aa8223c7
ACM		 2735 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2736 iph->daddr, 0,
2737 IPPROTO_TCP,
2738 0);
2d7edb92 2739 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2740 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2741 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2742 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2743 tcp_hdr(skb)->check =
0660e03f
ACM		 2744 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2745 &ipv6_hdr(skb)->daddr,
2746 0, IPPROTO_TCP, 0);
2d7edb92 2747 ipcse = 0;
2d7edb92 2748 }
bbe735e4 2749 ipcss = skb_network_offset(skb);
eddc9ec5 2750 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2751 tucss = skb_transport_offset(skb);
aa8223c7 2752 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2753 tucse = 0;
2754
2755 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2756 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2757
581d708e
MC		 2758 i = tx_ring->next_to_use;
2759 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2760 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2761
2762 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2763 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2764 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2765 context_desc->upper_setup.tcp_fields.tucss = tucss;
2766 context_desc->upper_setup.tcp_fields.tucso = tucso;
2767 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2768 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2769 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2770 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2771
545c67c0 2772 buffer_info->time_stamp = jiffies;
a9ebadd6 2773 buffer_info->next_to_watch = i;
545c67c0 2774
581d708e
MC		 2775 if (++i == tx_ring->count) i = 0;
2776 tx_ring->next_to_use = i;
1da177e4 2777
c3033b01 2778 return true;
1da177e4 2779 }
c3033b01 2780 return false;
1da177e4
LT		 2781}
2782
64798845
JP		 2783static bool e1000_tx_csum(struct e1000_adapter *adapter,
2784 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2785{
2786 struct e1000_context_desc *context_desc;
545c67c0 2787 struct e1000_buffer *buffer_info;
1da177e4 2788 unsigned int i;
406874a7 2789 u8 css;
3ed30676 2790 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2791
3ed30676
DG		 2792 if (skb->ip_summed != CHECKSUM_PARTIAL)
2793 return false;
1da177e4 2794
3ed30676 2795 switch (skb->protocol) {
09640e63 2796 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2797 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2798 cmd_len |= E1000_TXD_CMD_TCP;
2799 break;
09640e63 2800 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2801 /* XXX not handling all IPV6 headers */
2802 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2803 cmd_len |= E1000_TXD_CMD_TCP;
2804 break;
2805 default:
2806 if (unlikely(net_ratelimit()))
feb8f478
ET		 2807 e_warn(drv, "checksum_partial proto=%x!\n",
2808 skb->protocol);
3ed30676
DG		 2809 break;
2810 }
1da177e4 2811
0d0b1672 2812 css = skb_checksum_start_offset(skb);
1da177e4 2813
3ed30676
DG		 2814 i = tx_ring->next_to_use;
2815 buffer_info = &tx_ring->buffer_info[i];
2816 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2817
3ed30676
DG		 2818 context_desc->lower_setup.ip_config = 0;
2819 context_desc->upper_setup.tcp_fields.tucss = css;
2820 context_desc->upper_setup.tcp_fields.tucso =
2821 css + skb->csum_offset;
2822 context_desc->upper_setup.tcp_fields.tucse = 0;
2823 context_desc->tcp_seg_setup.data = 0;
2824 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2825
3ed30676
DG		 2826 buffer_info->time_stamp = jiffies;
2827 buffer_info->next_to_watch = i;
1da177e4 2828
3ed30676
DG		 2829 if (unlikely(++i == tx_ring->count)) i = 0;
2830 tx_ring->next_to_use = i;
2831
2832 return true;
1da177e4
LT		 2833}
2834
2835#define E1000_MAX_TXD_PWR 12
2836#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2837
64798845
JP		 2838static int e1000_tx_map(struct e1000_adapter *adapter,
2839 struct e1000_tx_ring *tx_ring,
2840 struct sk_buff *skb, unsigned int first,
2841 unsigned int max_per_txd, unsigned int nr_frags,
2842 unsigned int mss)
1da177e4 2843{
1dc32918 2844 struct e1000_hw *hw = &adapter->hw;
602c0554 2845 struct pci_dev *pdev = adapter->pdev;
37e73df8 2846 struct e1000_buffer *buffer_info;
d20b606c 2847 unsigned int len = skb_headlen(skb);
602c0554 2848 unsigned int offset = 0, size, count = 0, i;
1da177e4 2849 unsigned int f;
1da177e4
LT		 2850
2851 i = tx_ring->next_to_use;
2852
96838a40 2853 while (len) {
37e73df8 2854 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2855 size = min(len, max_per_txd);
fd803241
JK		 2856 /* Workaround for Controller erratum --
2857 * descriptor for non-tso packet in a linear SKB that follows a
2858 * tso gets written back prematurely before the data is fully
0f15a8fa 2859 * DMA'd to the controller */
fd803241 2860 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2861 !skb_is_gso(skb)) {
fd803241
JK		 2862 tx_ring->last_tx_tso = 0;
2863 size -= 4;
2864 }
2865
1da177e4
LT		 2866 /* Workaround for premature desc write-backs
2867 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2868 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2869 size -= 4;
97338bde
MC		 2870 /* work-around for errata 10 and it applies
2871 * to all controllers in PCI-X mode
2872 * The fix is to make sure that the first descriptor of a
2873 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2874 */
1dc32918 2875 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2876 (size > 2015) && count == 0))
2877 size = 2015;
96838a40 2878
1da177e4
LT		 2879 /* Workaround for potential 82544 hang in PCI-X. Avoid
2880 * terminating buffers within evenly-aligned dwords. */
96838a40 2881 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2882 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2883 size > 4))
2884 size -= 4;
2885
2886 buffer_info->length = size;
cdd7549e 2887 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2888 buffer_info->time_stamp = jiffies;
602c0554 2889 buffer_info->mapped_as_page = false;
b16f53be
NN		 2890 buffer_info->dma = dma_map_single(&pdev->dev,
2891 skb->data + offset,
2892 size, DMA_TO_DEVICE);
2893 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2894 goto dma_error;
a9ebadd6 2895 buffer_info->next_to_watch = i;
1da177e4
LT		 2896
2897 len -= size;
2898 offset += size;
2899 count++;
37e73df8
AD		 2900 if (len) {
2901 i++;
2902 if (unlikely(i == tx_ring->count))
2903 i = 0;
2904 }
1da177e4
LT		 2905 }
2906
96838a40 2907 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2908 struct skb_frag_struct *frag;
2909
2910 frag = &skb_shinfo(skb)->frags[f];
2911 len = frag->size;
602c0554 2912 offset = frag->page_offset;
1da177e4 2913
96838a40 2914 while (len) {
37e73df8
AD		 2915 i++;
2916 if (unlikely(i == tx_ring->count))
2917 i = 0;
2918
1da177e4
LT		 2919 buffer_info = &tx_ring->buffer_info[i];
2920 size = min(len, max_per_txd);
1da177e4
LT		 2921 /* Workaround for premature desc write-backs
2922 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2923 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 2924 size -= 4;
1da177e4
LT		 2925 /* Workaround for potential 82544 hang in PCI-X.
2926 * Avoid terminating buffers within evenly-aligned
2927 * dwords. */
96838a40 2928 if (unlikely(adapter->pcix_82544 &&
8fce4731
JB		 2929 !((unsigned long)(page_to_phys(frag->page) + offset
2930 + size - 1) & 4) &&
2931 size > 4))
1da177e4
LT		 2932 size -= 4;
2933
2934 buffer_info->length = size;
1da177e4 2935 buffer_info->time_stamp = jiffies;
602c0554 2936 buffer_info->mapped_as_page = true;
b16f53be 2937 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
602c0554 2938 offset, size,
b16f53be
NN		 2939 DMA_TO_DEVICE);
2940 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2941 goto dma_error;
a9ebadd6 2942 buffer_info->next_to_watch = i;
1da177e4
LT		 2943
2944 len -= size;
2945 offset += size;
2946 count++;
1da177e4
LT		 2947 }
2948 }
2949
1da177e4
LT		 2950 tx_ring->buffer_info[i].skb = skb;
2951 tx_ring->buffer_info[first].next_to_watch = i;
2952
2953 return count;
602c0554
AD		 2954
2955dma_error:
2956 dev_err(&pdev->dev, "TX DMA map failed\n");
2957 buffer_info->dma = 0;
c1fa347f 2958 if (count)
602c0554 2959 count--;
c1fa347f
RK		 2960
2961 while (count--) {
2962 if (i==0)
602c0554 2963 i += tx_ring->count;
c1fa347f 2964 i--;
602c0554
AD		 2965 buffer_info = &tx_ring->buffer_info[i];
2966 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2967 }
2968
2969 return 0;
1da177e4
LT		 2970}
2971
64798845
JP		 2972static void e1000_tx_queue(struct e1000_adapter *adapter,
2973 struct e1000_tx_ring *tx_ring, int tx_flags,
2974 int count)
1da177e4 2975{
1dc32918 2976 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2977 struct e1000_tx_desc *tx_desc = NULL;
2978 struct e1000_buffer *buffer_info;
406874a7 2979 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2980 unsigned int i;
2981
96838a40 2982 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2983 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2984 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2985 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2986
96838a40 2987 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2988 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2989 }
2990
96838a40 2991 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2992 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2993 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2994 }
2995
96838a40 2996 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2997 txd_lower |= E1000_TXD_CMD_VLE;
2998 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2999 }
3000
3001 i = tx_ring->next_to_use;
3002
96838a40 3003 while (count--) {
1da177e4
LT		 3004 buffer_info = &tx_ring->buffer_info[i];
3005 tx_desc = E1000_TX_DESC(*tx_ring, i);
3006 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3007 tx_desc->lower.data =
3008 cpu_to_le32(txd_lower | buffer_info->length);
3009 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3010 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3011 }
3012
3013 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3014
3015 /* Force memory writes to complete before letting h/w
3016 * know there are new descriptors to fetch. (Only
3017 * applicable for weak-ordered memory model archs,
3018 * such as IA-64). */
3019 wmb();
3020
3021 tx_ring->next_to_use = i;
1dc32918 3022 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 3023 /* we need this if more than one processor can write to our tail
3024 * at a time, it syncronizes IO on IA64/Altix systems */
3025 mmiowb();
1da177e4
LT		 3026}
3027
3028/**
3029 * 82547 workaround to avoid controller hang in half-duplex environment.
3030 * The workaround is to avoid queuing a large packet that would span
3031 * the internal Tx FIFO ring boundary by notifying the stack to resend
3032 * the packet at a later time. This gives the Tx FIFO an opportunity to
3033 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3034 * to the beginning of the Tx FIFO.
3035 **/
3036
3037#define E1000_FIFO_HDR 0x10
3038#define E1000_82547_PAD_LEN 0x3E0
3039
64798845
JP		 3040static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3041 struct sk_buff *skb)
1da177e4 3042{
406874a7
JP		 3043 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3044 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3045
9099cfb9 3046 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3047
96838a40 3048 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3049 goto no_fifo_stall_required;
3050
96838a40 3051 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3052 return 1;
3053
96838a40 3054 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3055 atomic_set(&adapter->tx_fifo_stall, 1);
3056 return 1;
3057 }
3058
3059no_fifo_stall_required:
3060 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3061 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3062 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3063 return 0;
3064}
3065
65c7973f
JB		 3066static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3067{
3068 struct e1000_adapter *adapter = netdev_priv(netdev);
3069 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3070
3071 netif_stop_queue(netdev);
3072 /* Herbert's original patch had:
3073 * smp_mb__after_netif_stop_queue();
3074 * but since that doesn't exist yet, just open code it. */
3075 smp_mb();
3076
3077 /* We need to check again in a case another CPU has just
3078 * made room available. */
3079 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3080 return -EBUSY;
3081
3082 /* A reprieve! */
3083 netif_start_queue(netdev);
fcfb1224 3084 ++adapter->restart_queue;
65c7973f
JB		 3085 return 0;
3086}
3087
3088static int e1000_maybe_stop_tx(struct net_device *netdev,
3089 struct e1000_tx_ring *tx_ring, int size)
3090{
3091 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3092 return 0;
3093 return __e1000_maybe_stop_tx(netdev, size);
3094}
3095
1da177e4 3096#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 3097static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
3098 struct net_device *netdev)
1da177e4 3099{
60490fe0 3100 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3101 struct e1000_hw *hw = &adapter->hw;
581d708e 3102 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3103 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3104 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3105 unsigned int tx_flags = 0;
e743d313 3106 unsigned int len = skb_headlen(skb);
6d1e3aa7
KK		 3107 unsigned int nr_frags;
3108 unsigned int mss;
1da177e4 3109 int count = 0;
76c224bc 3110 int tso;
1da177e4 3111 unsigned int f;
1da177e4 3112
65c7973f
JB		 3113 /* This goes back to the question of how to logically map a tx queue
3114 * to a flow. Right now, performance is impacted slightly negatively
3115 * if using multiple tx queues. If the stack breaks away from a
3116 * single qdisc implementation, we can look at this again. */
581d708e 3117 tx_ring = adapter->tx_ring;
24025e4e 3118
581d708e 3119 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3120 dev_kfree_skb_any(skb);
3121 return NETDEV_TX_OK;
3122 }
3123
7967168c 3124 mss = skb_shinfo(skb)->gso_size;
76c224bc 3125 /* The controller does a simple calculation to
1da177e4
LT		 3126 * make sure there is enough room in the FIFO before
3127 * initiating the DMA for each buffer. The calc is:
3128 * 4 = ceil(buffer len/mss). To make sure we don't
3129 * overrun the FIFO, adjust the max buffer len if mss
3130 * drops. */
96838a40 3131 if (mss) {
406874a7 3132 u8 hdr_len;
1da177e4
LT		 3133 max_per_txd = min(mss << 2, max_per_txd);
3134 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3135
ab6a5bb6 3136 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3137 if (skb->data_len && hdr_len == len) {
1dc32918 3138 switch (hw->mac_type) {
9f687888 3139 unsigned int pull_size;
683a2aa3
HX		 3140 case e1000_82544:
3141 /* Make sure we have room to chop off 4 bytes,
3142 * and that the end alignment will work out to
3143 * this hardware's requirements
3144 * NOTE: this is a TSO only workaround
3145 * if end byte alignment not correct move us
3146 * into the next dword */
27a884dc 3147 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3148 break;
3149 /* fall through */
9f687888
JK		 3150 pull_size = min((unsigned int)4, skb->data_len);
3151 if (!__pskb_pull_tail(skb, pull_size)) {
feb8f478
ET		 3152 e_err(drv, "__pskb_pull_tail "
3153 "failed.\n");
9f687888 3154 dev_kfree_skb_any(skb);
749dfc70 3155 return NETDEV_TX_OK;
9f687888 3156 }
e743d313 3157 len = skb_headlen(skb);
9f687888
JK		 3158 break;
3159 default:
3160 /* do nothing */
3161 break;
d74bbd3b 3162 }
9a3056da 3163 }
1da177e4
LT		 3164 }
3165
9a3056da 3166 /* reserve a descriptor for the offload context */
84fa7933 3167 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3168 count++;
2648345f 3169 count++;
fd803241 3170
fd803241 3171 /* Controller Erratum workaround */
89114afd 3172 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3173 count++;
fd803241 3174
1da177e4
LT		 3175 count += TXD_USE_COUNT(len, max_txd_pwr);
3176
96838a40 3177 if (adapter->pcix_82544)
1da177e4
LT		 3178 count++;
3179
96838a40 3180 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3181 * in PCI-X mode, so add one more descriptor to the count
3182 */
1dc32918 3183 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3184 (len > 2015)))
3185 count++;
3186
1da177e4 3187 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3188 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3189 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3190 max_txd_pwr);
96838a40 3191 if (adapter->pcix_82544)
1da177e4
LT		 3192 count += nr_frags;
3193
1da177e4
LT		 3194 /* need: count + 2 desc gap to keep tail from touching
3195 * head, otherwise try next time */
8017943e 3196 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3197 return NETDEV_TX_BUSY;
1da177e4 3198
1dc32918 3199 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3200 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3201 netif_stop_queue(netdev);
baa34745
JB		 3202 if (!test_bit(__E1000_DOWN, &adapter->flags))
3203 mod_timer(&adapter->tx_fifo_stall_timer,
3204 jiffies + 1);
1da177e4
LT		 3205 return NETDEV_TX_BUSY;
3206 }
3207 }
3208
5622e404 3209 if (vlan_tx_tag_present(skb)) {
1da177e4
LT		 3210 tx_flags |= E1000_TX_FLAGS_VLAN;
3211 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3212 }
3213
581d708e 3214 first = tx_ring->next_to_use;
96838a40 3215
581d708e 3216 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3217 if (tso < 0) {
3218 dev_kfree_skb_any(skb);
3219 return NETDEV_TX_OK;
3220 }
3221
fd803241 3222 if (likely(tso)) {
8fce4731
JB		 3223 if (likely(hw->mac_type != e1000_82544))
3224 tx_ring->last_tx_tso = 1;
1da177e4 3225 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3226 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3227 tx_flags |= E1000_TX_FLAGS_CSUM;
3228
60828236 3229 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3230 tx_flags |= E1000_TX_FLAGS_IPV4;
3231
37e73df8
AD		 3232 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3233 nr_frags, mss);
1da177e4 3234
37e73df8
AD		 3235 if (count) {
3236 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3237 /* Make sure there is space in the ring for the next send. */
3238 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3239
37e73df8
AD		 3240 } else {
3241 dev_kfree_skb_any(skb);
3242 tx_ring->buffer_info[first].time_stamp = 0;
3243 tx_ring->next_to_use = first;
3244 }
1da177e4 3245
1da177e4
LT		 3246 return NETDEV_TX_OK;
3247}
3248
3249/**
3250 * e1000_tx_timeout - Respond to a Tx Hang
3251 * @netdev: network interface device structure
3252 **/
3253
64798845 3254static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3255{
60490fe0 3256 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3257
3258 /* Do the reset outside of interrupt context */
87041639
JK		 3259 adapter->tx_timeout_count++;
3260 schedule_work(&adapter->reset_task);
1da177e4
LT		 3261}
3262
64798845 3263static void e1000_reset_task(struct work_struct *work)
1da177e4 3264{
65f27f38
DH		 3265 struct e1000_adapter *adapter =
3266 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3267
338c15e4 3268 e1000_reinit_safe(adapter);
1da177e4
LT		 3269}
3270
3271/**
3272 * e1000_get_stats - Get System Network Statistics
3273 * @netdev: network interface device structure
3274 *
3275 * Returns the address of the device statistics structure.
3276 * The statistics are actually updated from the timer callback.
3277 **/
3278
64798845 3279static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3280{
6b7660cd 3281 /* only return the current stats */
5fe31def 3282 return &netdev->stats;
1da177e4
LT		 3283}
3284
3285/**
3286 * e1000_change_mtu - Change the Maximum Transfer Unit
3287 * @netdev: network interface device structure
3288 * @new_mtu: new value for maximum frame size
3289 *
3290 * Returns 0 on success, negative on failure
3291 **/
3292
64798845 3293static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3294{
60490fe0 3295 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3296 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3297 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3298
96838a40
JB		 3299 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3300 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
feb8f478 3301 e_err(probe, "Invalid MTU setting\n");
1da177e4 3302 return -EINVAL;
2d7edb92 3303 }
1da177e4 3304
997f5cbd 3305 /* Adapter-specific max frame size limits. */
1dc32918 3306 switch (hw->mac_type) {
9e2feace 3307 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3308 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
feb8f478 3309 e_err(probe, "Jumbo Frames not supported.\n");
2d7edb92 3310 return -EINVAL;
2d7edb92 3311 }
997f5cbd 3312 break;
997f5cbd
JK		 3313 default:
3314 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3315 break;
1da177e4
LT		 3316 }
3317
3d6114e7
JB		 3318 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3319 msleep(1);
3320 /* e1000_down has a dependency on max_frame_size */
3321 hw->max_frame_size = max_frame;
3322 if (netif_running(netdev))
3323 e1000_down(adapter);
3324
87f5032e 3325 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3326 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3327 * larger slab size.
3328 * i.e. RXBUFFER_2048 --> size-4096 slab
3329 * however with the new *_jumbo_rx* routines, jumbo receives will use
3330 * fragmented skbs */
9e2feace 3331
9926146b 3332 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3333 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3334 else
3335#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3336 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3337#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3338 adapter->rx_buffer_len = PAGE_SIZE;
3339#endif
9e2feace
AK		 3340
3341 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3342 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3343 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3344 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3345 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3346
675ad473
ET		 3347 pr_info("%s changing MTU from %d to %d\n",
3348 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3349 netdev->mtu = new_mtu;
3350
2db10a08 3351 if (netif_running(netdev))
3d6114e7
JB		 3352 e1000_up(adapter);
3353 else
3354 e1000_reset(adapter);
3355
3356 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3357
1da177e4
LT		 3358 return 0;
3359}
3360
3361/**
3362 * e1000_update_stats - Update the board statistics counters
3363 * @adapter: board private structure
3364 **/
3365
64798845 3366void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3367{
5fe31def 3368 struct net_device *netdev = adapter->netdev;
1da177e4 3369 struct e1000_hw *hw = &adapter->hw;
282f33c9 3370 struct pci_dev *pdev = adapter->pdev;
1da177e4 3371 unsigned long flags;
406874a7 3372 u16 phy_tmp;
1da177e4
LT		 3373
3374#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3375
282f33c9
LV		 3376 /*
3377 * Prevent stats update while adapter is being reset, or if the pci
3378 * connection is down.
3379 */
9026729b 3380 if (adapter->link_speed == 0)
282f33c9 3381 return;
81b1955e 3382 if (pci_channel_offline(pdev))
9026729b
AK		 3383 return;
3384
1da177e4
LT		 3385 spin_lock_irqsave(&adapter->stats_lock, flags);
3386
828d055f 3387 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3388 * called from the interrupt context, so they must only
3389 * be written while holding adapter->stats_lock
3390 */
3391
1dc32918
JP		 3392 adapter->stats.crcerrs += er32(CRCERRS);
3393 adapter->stats.gprc += er32(GPRC);
3394 adapter->stats.gorcl += er32(GORCL);
3395 adapter->stats.gorch += er32(GORCH);
3396 adapter->stats.bprc += er32(BPRC);
3397 adapter->stats.mprc += er32(MPRC);
3398 adapter->stats.roc += er32(ROC);
3399
1532ecea
JB		 3400 adapter->stats.prc64 += er32(PRC64);
3401 adapter->stats.prc127 += er32(PRC127);
3402 adapter->stats.prc255 += er32(PRC255);
3403 adapter->stats.prc511 += er32(PRC511);
3404 adapter->stats.prc1023 += er32(PRC1023);
3405 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3406
3407 adapter->stats.symerrs += er32(SYMERRS);
3408 adapter->stats.mpc += er32(MPC);
3409 adapter->stats.scc += er32(SCC);
3410 adapter->stats.ecol += er32(ECOL);
3411 adapter->stats.mcc += er32(MCC);
3412 adapter->stats.latecol += er32(LATECOL);
3413 adapter->stats.dc += er32(DC);
3414 adapter->stats.sec += er32(SEC);
3415 adapter->stats.rlec += er32(RLEC);
3416 adapter->stats.xonrxc += er32(XONRXC);
3417 adapter->stats.xontxc += er32(XONTXC);
3418 adapter->stats.xoffrxc += er32(XOFFRXC);
3419 adapter->stats.xofftxc += er32(XOFFTXC);
3420 adapter->stats.fcruc += er32(FCRUC);
3421 adapter->stats.gptc += er32(GPTC);
3422 adapter->stats.gotcl += er32(GOTCL);
3423 adapter->stats.gotch += er32(GOTCH);
3424 adapter->stats.rnbc += er32(RNBC);
3425 adapter->stats.ruc += er32(RUC);
3426 adapter->stats.rfc += er32(RFC);
3427 adapter->stats.rjc += er32(RJC);
3428 adapter->stats.torl += er32(TORL);
3429 adapter->stats.torh += er32(TORH);
3430 adapter->stats.totl += er32(TOTL);
3431 adapter->stats.toth += er32(TOTH);
3432 adapter->stats.tpr += er32(TPR);
3433
1532ecea
JB		 3434 adapter->stats.ptc64 += er32(PTC64);
3435 adapter->stats.ptc127 += er32(PTC127);
3436 adapter->stats.ptc255 += er32(PTC255);
3437 adapter->stats.ptc511 += er32(PTC511);
3438 adapter->stats.ptc1023 += er32(PTC1023);
3439 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3440
3441 adapter->stats.mptc += er32(MPTC);
3442 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3443
3444 /* used for adaptive IFS */
3445
1dc32918 3446 hw->tx_packet_delta = er32(TPT);
1da177e4 3447 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3448 hw->collision_delta = er32(COLC);
1da177e4
LT		 3449 adapter->stats.colc += hw->collision_delta;
3450
96838a40 3451 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3452 adapter->stats.algnerrc += er32(ALGNERRC);
3453 adapter->stats.rxerrc += er32(RXERRC);
3454 adapter->stats.tncrs += er32(TNCRS);
3455 adapter->stats.cexterr += er32(CEXTERR);
3456 adapter->stats.tsctc += er32(TSCTC);
3457 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3458 }
3459
3460 /* Fill out the OS statistics structure */
5fe31def
AK		 3461 netdev->stats.multicast = adapter->stats.mprc;
3462 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3463
3464 /* Rx Errors */
3465
87041639
JK		 3466 /* RLEC on some newer hardware can be incorrect so build
3467 * our own version based on RUC and ROC */
5fe31def 3468 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3469 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3470 adapter->stats.ruc + adapter->stats.roc +
3471 adapter->stats.cexterr;
49559854 3472 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3473 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3474 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3475 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3476 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3477
3478 /* Tx Errors */
49559854 3479 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3480 netdev->stats.tx_errors = adapter->stats.txerrc;
3481 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3482 netdev->stats.tx_window_errors = adapter->stats.latecol;
3483 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3484 if (hw->bad_tx_carr_stats_fd &&
167fb284 3485 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3486 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3487 adapter->stats.tncrs = 0;
3488 }
1da177e4
LT		 3489
3490 /* Tx Dropped needs to be maintained elsewhere */
3491
3492 /* Phy Stats */
96838a40
JB		 3493 if (hw->media_type == e1000_media_type_copper) {
3494 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3495 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3496 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3497 adapter->phy_stats.idle_errors += phy_tmp;
3498 }
3499
96838a40 3500 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3501 (hw->phy_type == e1000_phy_m88) &&
3502 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3503 adapter->phy_stats.receive_errors += phy_tmp;
3504 }
3505
15e376b4 3506 /* Management Stats */
1dc32918
JP		 3507 if (hw->has_smbus) {
3508 adapter->stats.mgptc += er32(MGTPTC);
3509 adapter->stats.mgprc += er32(MGTPRC);
3510 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3511 }
3512
1da177e4
LT		 3513 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3514}
9ac98284 3515
1da177e4
LT		 3516/**
3517 * e1000_intr - Interrupt Handler
3518 * @irq: interrupt number
3519 * @data: pointer to a network interface device structure
1da177e4
LT		 3520 **/
3521
64798845 3522static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3523{
3524 struct net_device *netdev = data;
60490fe0 3525 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3526 struct e1000_hw *hw = &adapter->hw;
1532ecea 3527 u32 icr = er32(ICR);
c3570acb 3528
4c11b8ad 3529 if (unlikely((!icr)))
835bb129
JB		 3530 return IRQ_NONE; /* Not our interrupt */
3531
4c11b8ad
JB		 3532 /*
3533 * we might have caused the interrupt, but the above
3534 * read cleared it, and just in case the driver is
3535 * down there is nothing to do so return handled
3536 */
3537 if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
3538 return IRQ_HANDLED;
3539
96838a40 3540 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3541 hw->get_link_status = 1;
1314bbf3
AK		 3542 /* guard against interrupt when we're going down */
3543 if (!test_bit(__E1000_DOWN, &adapter->flags))
3544 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3545 }
3546
1532ecea
JB		 3547 /* disable interrupts, without the synchronize_irq bit */
3548 ew32(IMC, ~0);
3549 E1000_WRITE_FLUSH();
3550
288379f0 3551 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3552 adapter->total_tx_bytes = 0;
3553 adapter->total_tx_packets = 0;
3554 adapter->total_rx_bytes = 0;
3555 adapter->total_rx_packets = 0;
288379f0 3556 __napi_schedule(&adapter->napi);
a6c42322 3557 } else {
90fb5135
AK		 3558 /* this really should not happen! if it does it is basically a
3559 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB		 3560 if (!test_bit(__E1000_DOWN, &adapter->flags))
3561 e1000_irq_enable(adapter);
3562 }
1da177e4 3563
1da177e4
LT		 3564 return IRQ_HANDLED;
3565}
3566
1da177e4
LT		 3567/**
3568 * e1000_clean - NAPI Rx polling callback
3569 * @adapter: board private structure
3570 **/
64798845 3571static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3572{
bea3348e 3573 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
650b5a5c 3574 int tx_clean_complete = 0, work_done = 0;
581d708e 3575
650b5a5c 3576 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3577
650b5a5c 3578 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3579
650b5a5c 3580 if (!tx_clean_complete)
d2c7ddd6
DM		 3581 work_done = budget;
3582
53e52c72
DM		 3583 /* If budget not fully consumed, exit the polling mode */
3584 if (work_done < budget) {
835bb129
JB		 3585 if (likely(adapter->itr_setting & 3))
3586 e1000_set_itr(adapter);
288379f0 3587 napi_complete(napi);
a6c42322
JB		 3588 if (!test_bit(__E1000_DOWN, &adapter->flags))
3589 e1000_irq_enable(adapter);
1da177e4
LT		 3590 }
3591
bea3348e 3592 return work_done;
1da177e4
LT		 3593}
3594
1da177e4
LT		 3595/**
3596 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3597 * @adapter: board private structure
3598 **/
64798845
JP		 3599static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3600 struct e1000_tx_ring *tx_ring)
1da177e4 3601{
1dc32918 3602 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3603 struct net_device *netdev = adapter->netdev;
3604 struct e1000_tx_desc *tx_desc, *eop_desc;
3605 struct e1000_buffer *buffer_info;
3606 unsigned int i, eop;
2a1af5d7 3607 unsigned int count = 0;
835bb129 3608 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3609
3610 i = tx_ring->next_to_clean;
3611 eop = tx_ring->buffer_info[i].next_to_watch;
3612 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3613
ccfb342c
AD		 3614 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3615 (count < tx_ring->count)) {
843f4267 3616 bool cleaned = false;
2d0bb1c1 3617 rmb(); /* read buffer_info after eop_desc */
843f4267 3618 for ( ; !cleaned; count++) {
1da177e4
LT		 3619 tx_desc = E1000_TX_DESC(*tx_ring, i);
3620 buffer_info = &tx_ring->buffer_info[i];
3621 cleaned = (i == eop);
3622
835bb129 3623 if (cleaned) {
2b65326e 3624 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3625 unsigned int segs, bytecount;
3626 segs = skb_shinfo(skb)->gso_segs ?: 1;
3627 /* multiply data chunks by size of headers */
3628 bytecount = ((segs - 1) * skb_headlen(skb)) +
3629 skb->len;
2b65326e 3630 total_tx_packets += segs;
7753b171 3631 total_tx_bytes += bytecount;
835bb129 3632 }
fd803241 3633 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3634 tx_desc->upper.data = 0;
1da177e4 3635
96838a40 3636 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3637 }
581d708e 3638
1da177e4
LT		 3639 eop = tx_ring->buffer_info[i].next_to_watch;
3640 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3641 }
3642
3643 tx_ring->next_to_clean = i;
3644
77b2aad5 3645#define TX_WAKE_THRESHOLD 32
843f4267 3646 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3647 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3648 /* Make sure that anybody stopping the queue after this
3649 * sees the new next_to_clean.
3650 */
3651 smp_mb();
cdd7549e
JB		 3652
3653 if (netif_queue_stopped(netdev) &&
3654 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3655 netif_wake_queue(netdev);
fcfb1224
JB		 3656 ++adapter->restart_queue;
3657 }
77b2aad5 3658 }
2648345f 3659
581d708e 3660 if (adapter->detect_tx_hung) {
2648345f 3661 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3662 * check with the clearing of time_stamp and movement of i */
c3033b01 3663 adapter->detect_tx_hung = false;
cdd7549e
JB		 3664 if (tx_ring->buffer_info[eop].time_stamp &&
3665 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
8e95a202
JP		 3666 (adapter->tx_timeout_factor * HZ)) &&
3667 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3668
3669 /* detected Tx unit hang */
feb8f478 3670 e_err(drv, "Detected Tx Unit Hang\n"
675ad473
ET		 3671 " Tx Queue <%lu>\n"
3672 " TDH <%x>\n"
3673 " TDT <%x>\n"
3674 " next_to_use <%x>\n"
3675 " next_to_clean <%x>\n"
3676 "buffer_info[next_to_clean]\n"
3677 " time_stamp <%lx>\n"
3678 " next_to_watch <%x>\n"
3679 " jiffies <%lx>\n"
3680 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3681 (unsigned long)((tx_ring - adapter->tx_ring) /
3682 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3683 readl(hw->hw_addr + tx_ring->tdh),
3684 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3685 tx_ring->next_to_use,
392137fa 3686 tx_ring->next_to_clean,
cdd7549e 3687 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3688 eop,
3689 jiffies,
3690 eop_desc->upper.fields.status);
1da177e4 3691 netif_stop_queue(netdev);
70b8f1e1 3692 }
1da177e4 3693 }
835bb129
JB		 3694 adapter->total_tx_bytes += total_tx_bytes;
3695 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3696 netdev->stats.tx_bytes += total_tx_bytes;
3697 netdev->stats.tx_packets += total_tx_packets;
807540ba 3698 return count < tx_ring->count;
1da177e4
LT		 3699}
3700
3701/**
3702 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3703 * @adapter: board private structure
3704 * @status_err: receive descriptor status and error fields
3705 * @csum: receive descriptor csum field
3706 * @sk_buff: socket buffer with received data
1da177e4
LT		 3707 **/
3708
64798845
JP		 3709static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3710 u32 csum, struct sk_buff *skb)
1da177e4 3711{
1dc32918 3712 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3713 u16 status = (u16)status_err;
3714 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 3715
3716 skb_checksum_none_assert(skb);
2d7edb92 3717
1da177e4 3718 /* 82543 or newer only */
1dc32918 3719 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3720 /* Ignore Checksum bit is set */
96838a40 3721 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3722 /* TCP/UDP checksum error bit is set */
96838a40 3723 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3724 /* let the stack verify checksum errors */
1da177e4 3725 adapter->hw_csum_err++;
2d7edb92
MC		 3726 return;
3727 }
3728 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3729 if (!(status & E1000_RXD_STAT_TCPCS))
3730 return;
3731
2d7edb92
MC		 3732 /* It must be a TCP or UDP packet with a valid checksum */
3733 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3734 /* TCP checksum is good */
3735 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3736 }
2d7edb92 3737 adapter->hw_csum_good++;
1da177e4
LT		 3738}
3739
edbbb3ca
JB		 3740/**
3741 * e1000_consume_page - helper function
3742 **/
3743static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
3744 u16 length)
3745{
3746 bi->page = NULL;
3747 skb->len += length;
3748 skb->data_len += length;
3749 skb->truesize += length;
3750}
3751
3752/**
3753 * e1000_receive_skb - helper function to handle rx indications
3754 * @adapter: board private structure
3755 * @status: descriptor status field as written by hardware
3756 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3757 * @skb: pointer to sk_buff to be indicated to stack
3758 */
3759static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3760 __le16 vlan, struct sk_buff *skb)
3761{
6a08d194
JB		 3762 skb->protocol = eth_type_trans(skb, adapter->netdev);
3763
5622e404
JP		 3764 if (status & E1000_RXD_STAT_VP) {
3765 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
3766
3767 __vlan_hwaccel_put_tag(skb, vid);
3768 }
3769 napi_gro_receive(&adapter->napi, skb);
edbbb3ca
JB		 3770}
3771
3772/**
3773 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
3774 * @adapter: board private structure
3775 * @rx_ring: ring to clean
3776 * @work_done: amount of napi work completed this call
3777 * @work_to_do: max amount of work allowed for this call to do
3778 *
3779 * the return value indicates whether actual cleaning was done, there
3780 * is no guarantee that everything was cleaned
3781 */
3782static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
3783 struct e1000_rx_ring *rx_ring,
3784 int *work_done, int work_to_do)
3785{
3786 struct e1000_hw *hw = &adapter->hw;
3787 struct net_device *netdev = adapter->netdev;
3788 struct pci_dev *pdev = adapter->pdev;
3789 struct e1000_rx_desc *rx_desc, *next_rxd;
3790 struct e1000_buffer *buffer_info, *next_buffer;
3791 unsigned long irq_flags;
3792 u32 length;
3793 unsigned int i;
3794 int cleaned_count = 0;
3795 bool cleaned = false;
3796 unsigned int total_rx_bytes=0, total_rx_packets=0;
3797
3798 i = rx_ring->next_to_clean;
3799 rx_desc = E1000_RX_DESC(*rx_ring, i);
3800 buffer_info = &rx_ring->buffer_info[i];
3801
3802 while (rx_desc->status & E1000_RXD_STAT_DD) {
3803 struct sk_buff *skb;
3804 u8 status;
3805
3806 if (*work_done >= work_to_do)
3807 break;
3808 (*work_done)++;
2d0bb1c1 3809 rmb(); /* read descriptor and rx_buffer_info after status DD */
edbbb3ca
JB		 3810
3811 status = rx_desc->status;
3812 skb = buffer_info->skb;
3813 buffer_info->skb = NULL;
3814
3815 if (++i == rx_ring->count) i = 0;
3816 next_rxd = E1000_RX_DESC(*rx_ring, i);
3817 prefetch(next_rxd);
3818
3819 next_buffer = &rx_ring->buffer_info[i];
3820
3821 cleaned = true;
3822 cleaned_count++;
b16f53be
NN		 3823 dma_unmap_page(&pdev->dev, buffer_info->dma,
3824 buffer_info->length, DMA_FROM_DEVICE);
edbbb3ca
JB		 3825 buffer_info->dma = 0;
3826
3827 length = le16_to_cpu(rx_desc->length);
3828
3829 /* errors is only valid for DD + EOP descriptors */
3830 if (unlikely((status & E1000_RXD_STAT_EOP) &&
3831 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
3832 u8 last_byte = *(skb->data + length - 1);
3833 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
3834 last_byte)) {
3835 spin_lock_irqsave(&adapter->stats_lock,
3836 irq_flags);
3837 e1000_tbi_adjust_stats(hw, &adapter->stats,
3838 length, skb->data);
3839 spin_unlock_irqrestore(&adapter->stats_lock,
3840 irq_flags);
3841 length--;
3842 } else {
3843 /* recycle both page and skb */
3844 buffer_info->skb = skb;
3845 /* an error means any chain goes out the window
3846 * too */
3847 if (rx_ring->rx_skb_top)
3848 dev_kfree_skb(rx_ring->rx_skb_top);
3849 rx_ring->rx_skb_top = NULL;
3850 goto next_desc;
3851 }
3852 }
3853
3854#define rxtop rx_ring->rx_skb_top
3855 if (!(status & E1000_RXD_STAT_EOP)) {
3856 /* this descriptor is only the beginning (or middle) */
3857 if (!rxtop) {
3858 /* this is the beginning of a chain */
3859 rxtop = skb;
3860 skb_fill_page_desc(rxtop, 0, buffer_info->page,
3861 0, length);
3862 } else {
3863 /* this is the middle of a chain */
3864 skb_fill_page_desc(rxtop,
3865 skb_shinfo(rxtop)->nr_frags,
3866 buffer_info->page, 0, length);
3867 /* re-use the skb, only consumed the page */
3868 buffer_info->skb = skb;
3869 }
3870 e1000_consume_page(buffer_info, rxtop, length);
3871 goto next_desc;
3872 } else {
3873 if (rxtop) {
3874 /* end of the chain */
3875 skb_fill_page_desc(rxtop,
3876 skb_shinfo(rxtop)->nr_frags,
3877 buffer_info->page, 0, length);
3878 /* re-use the current skb, we only consumed the
3879 * page */
3880 buffer_info->skb = skb;
3881 skb = rxtop;
3882 rxtop = NULL;
3883 e1000_consume_page(buffer_info, skb, length);
3884 } else {
3885 /* no chain, got EOP, this buf is the packet
3886 * copybreak to save the put_page/alloc_page */
3887 if (length <= copybreak &&
3888 skb_tailroom(skb) >= length) {
3889 u8 *vaddr;
3890 vaddr = kmap_atomic(buffer_info->page,
3891 KM_SKB_DATA_SOFTIRQ);
3892 memcpy(skb_tail_pointer(skb), vaddr, length);
3893 kunmap_atomic(vaddr,
3894 KM_SKB_DATA_SOFTIRQ);
3895 /* re-use the page, so don't erase
3896 * buffer_info->page */
3897 skb_put(skb, length);
3898 } else {
3899 skb_fill_page_desc(skb, 0,
3900 buffer_info->page, 0,
3901 length);
3902 e1000_consume_page(buffer_info, skb,
3903 length);
3904 }
3905 }
3906 }
3907
3908 /* Receive Checksum Offload XXX recompute due to CRC strip? */
3909 e1000_rx_checksum(adapter,
3910 (u32)(status) |
3911 ((u32)(rx_desc->errors) << 24),
3912 le16_to_cpu(rx_desc->csum), skb);
3913
3914 pskb_trim(skb, skb->len - 4);
3915
3916 /* probably a little skewed due to removing CRC */
3917 total_rx_bytes += skb->len;
3918 total_rx_packets++;
3919
3920 /* eth type trans needs skb->data to point to something */
3921 if (!pskb_may_pull(skb, ETH_HLEN)) {
feb8f478 3922 e_err(drv, "pskb_may_pull failed.\n");
edbbb3ca
JB		 3923 dev_kfree_skb(skb);
3924 goto next_desc;
3925 }
3926
edbbb3ca
JB		 3927 e1000_receive_skb(adapter, status, rx_desc->special, skb);
3928
3929next_desc:
3930 rx_desc->status = 0;
3931
3932 /* return some buffers to hardware, one at a time is too slow */
3933 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3934 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3935 cleaned_count = 0;
3936 }
3937
3938 /* use prefetched values */
3939 rx_desc = next_rxd;
3940 buffer_info = next_buffer;
3941 }
3942 rx_ring->next_to_clean = i;
3943
3944 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3945 if (cleaned_count)
3946 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3947
3948 adapter->total_rx_packets += total_rx_packets;
3949 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 3950 netdev->stats.rx_bytes += total_rx_bytes;
3951 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 3952 return cleaned;
3953}
3954
57bf6eef
JP		 3955/*
3956 * this should improve performance for small packets with large amounts
3957 * of reassembly being done in the stack
3958 */
3959static void e1000_check_copybreak(struct net_device *netdev,
3960 struct e1000_buffer *buffer_info,
3961 u32 length, struct sk_buff **skb)
3962{
3963 struct sk_buff *new_skb;
3964
3965 if (length > copybreak)
3966 return;
3967
3968 new_skb = netdev_alloc_skb_ip_align(netdev, length);
3969 if (!new_skb)
3970 return;
3971
3972 skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN,
3973 (*skb)->data - NET_IP_ALIGN,
3974 length + NET_IP_ALIGN);
3975 /* save the skb in buffer_info as good */
3976 buffer_info->skb = *skb;
3977 *skb = new_skb;
3978}
3979
1da177e4 3980/**
2d7edb92 3981 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 3982 * @adapter: board private structure
edbbb3ca
JB		 3983 * @rx_ring: ring to clean
3984 * @work_done: amount of napi work completed this call
3985 * @work_to_do: max amount of work allowed for this call to do
3986 */
64798845
JP		 3987static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3988 struct e1000_rx_ring *rx_ring,
3989 int *work_done, int work_to_do)
1da177e4 3990{
1dc32918 3991 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3992 struct net_device *netdev = adapter->netdev;
3993 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3994 struct e1000_rx_desc *rx_desc, *next_rxd;
3995 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3996 unsigned long flags;
406874a7 3997 u32 length;
1da177e4 3998 unsigned int i;
72d64a43 3999 int cleaned_count = 0;
c3033b01 4000 bool cleaned = false;
835bb129 4001 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4002
4003 i = rx_ring->next_to_clean;
4004 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4005 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4006
b92ff8ee 4007 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4008 struct sk_buff *skb;
a292ca6e 4009 u8 status;
90fb5135 4010
96838a40 4011 if (*work_done >= work_to_do)
1da177e4
LT		 4012 break;
4013 (*work_done)++;
2d0bb1c1 4014 rmb(); /* read descriptor and rx_buffer_info after status DD */
c3570acb 4015
a292ca6e 4016 status = rx_desc->status;
b92ff8ee 4017 skb = buffer_info->skb;
86c3d59f
JB		 4018 buffer_info->skb = NULL;
4019
30320be8
JK		 4020 prefetch(skb->data - NET_IP_ALIGN);
4021
86c3d59f
JB		 4022 if (++i == rx_ring->count) i = 0;
4023 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4024 prefetch(next_rxd);
4025
86c3d59f 4026 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4027
c3033b01 4028 cleaned = true;
72d64a43 4029 cleaned_count++;
b16f53be
NN		 4030 dma_unmap_single(&pdev->dev, buffer_info->dma,
4031 buffer_info->length, DMA_FROM_DEVICE);
679be3ba 4032 buffer_info->dma = 0;
1da177e4 4033
1da177e4 4034 length = le16_to_cpu(rx_desc->length);
ea30e119 4035 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 4036 * packet, if thats the case we need to toss it. In fact, we
4037 * to toss every packet with the EOP bit clear and the next
4038 * frame that _does_ have the EOP bit set, as it is by
4039 * definition only a frame fragment
4040 */
4041 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
4042 adapter->discarding = true;
4043
4044 if (adapter->discarding) {
a1415ee6 4045 /* All receives must fit into a single buffer */
feb8f478 4046 e_dbg("Receive packet consumed multiple buffers\n");
864c4e45 4047 /* recycle */
8fc897b0 4048 buffer_info->skb = skb;
40a14dea
JB		 4049 if (status & E1000_RXD_STAT_EOP)
4050 adapter->discarding = false;
1da177e4
LT		 4051 goto next_desc;
4052 }
4053
96838a40 4054 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 4055 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4056 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4057 last_byte)) {
1da177e4 4058 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4059 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 4060 length, skb->data);
4061 spin_unlock_irqrestore(&adapter->stats_lock,
4062 flags);
4063 length--;
4064 } else {
9e2feace
AK		 4065 /* recycle */
4066 buffer_info->skb = skb;
1da177e4
LT		 4067 goto next_desc;
4068 }
1cb5821f 4069 }
1da177e4 4070
d2a1e213
JB		 4071 /* adjust length to remove Ethernet CRC, this must be
4072 * done after the TBI_ACCEPT workaround above */
4073 length -= 4;
4074
835bb129
JB		 4075 /* probably a little skewed due to removing CRC */
4076 total_rx_bytes += length;
4077 total_rx_packets++;
4078
57bf6eef
JP		 4079 e1000_check_copybreak(netdev, buffer_info, length, &skb);
4080
996695de 4081 skb_put(skb, length);
1da177e4
LT		 4082
4083 /* Receive Checksum Offload */
a292ca6e 4084 e1000_rx_checksum(adapter,
406874a7
JP		 4085 (u32)(status) |
4086 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4087 le16_to_cpu(rx_desc->csum), skb);
96838a40 4088
edbbb3ca 4089 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 4090
1da177e4
LT		 4091next_desc:
4092 rx_desc->status = 0;
1da177e4 4093
72d64a43
JK		 4094 /* return some buffers to hardware, one at a time is too slow */
4095 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4096 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4097 cleaned_count = 0;
4098 }
4099
30320be8 4100 /* use prefetched values */
86c3d59f
JB		 4101 rx_desc = next_rxd;
4102 buffer_info = next_buffer;
1da177e4 4103 }
1da177e4 4104 rx_ring->next_to_clean = i;
72d64a43
JK		 4105
4106 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4107 if (cleaned_count)
4108 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4109
835bb129
JB		 4110 adapter->total_rx_packets += total_rx_packets;
4111 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4112 netdev->stats.rx_bytes += total_rx_bytes;
4113 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4114 return cleaned;
4115}
4116
edbbb3ca
JB		 4117/**
4118 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
4119 * @adapter: address of board private structure
4120 * @rx_ring: pointer to receive ring structure
4121 * @cleaned_count: number of buffers to allocate this pass
4122 **/
4123
4124static void
4125e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
4126 struct e1000_rx_ring *rx_ring, int cleaned_count)
4127{
4128 struct net_device *netdev = adapter->netdev;
4129 struct pci_dev *pdev = adapter->pdev;
4130 struct e1000_rx_desc *rx_desc;
4131 struct e1000_buffer *buffer_info;
4132 struct sk_buff *skb;
4133 unsigned int i;
89d71a66 4134 unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
edbbb3ca
JB		 4135
4136 i = rx_ring->next_to_use;
4137 buffer_info = &rx_ring->buffer_info[i];
4138
4139 while (cleaned_count--) {
4140 skb = buffer_info->skb;
4141 if (skb) {
4142 skb_trim(skb, 0);
4143 goto check_page;
4144 }
4145
89d71a66 4146 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 4147 if (unlikely(!skb)) {
4148 /* Better luck next round */
4149 adapter->alloc_rx_buff_failed++;
4150 break;
4151 }
4152
4153 /* Fix for errata 23, can't cross 64kB boundary */
4154 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4155 struct sk_buff *oldskb = skb;
feb8f478
ET		 4156 e_err(rx_err, "skb align check failed: %u bytes at "
4157 "%p\n", bufsz, skb->data);
edbbb3ca 4158 /* Try again, without freeing the previous */
89d71a66 4159 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 4160 /* Failed allocation, critical failure */
4161 if (!skb) {
4162 dev_kfree_skb(oldskb);
4163 adapter->alloc_rx_buff_failed++;
4164 break;
4165 }
4166
4167 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4168 /* give up */
4169 dev_kfree_skb(skb);
4170 dev_kfree_skb(oldskb);
4171 break; /* while (cleaned_count--) */
4172 }
4173
4174 /* Use new allocation */
4175 dev_kfree_skb(oldskb);
4176 }
edbbb3ca
JB		 4177 buffer_info->skb = skb;
4178 buffer_info->length = adapter->rx_buffer_len;
4179check_page:
4180 /* allocate a new page if necessary */
4181 if (!buffer_info->page) {
4182 buffer_info->page = alloc_page(GFP_ATOMIC);
4183 if (unlikely(!buffer_info->page)) {
4184 adapter->alloc_rx_buff_failed++;
4185 break;
4186 }
4187 }
4188
b5abb028 4189 if (!buffer_info->dma) {
b16f53be 4190 buffer_info->dma = dma_map_page(&pdev->dev,
edbbb3ca 4191 buffer_info->page, 0,
b16f53be
NN		 4192 buffer_info->length,
4193 DMA_FROM_DEVICE);
4194 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB		 4195 put_page(buffer_info->page);
4196 dev_kfree_skb(skb);
4197 buffer_info->page = NULL;
4198 buffer_info->skb = NULL;
4199 buffer_info->dma = 0;
4200 adapter->alloc_rx_buff_failed++;
4201 break; /* while !buffer_info->skb */
4202 }
4203 }
edbbb3ca
JB		 4204
4205 rx_desc = E1000_RX_DESC(*rx_ring, i);
4206 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4207
4208 if (unlikely(++i == rx_ring->count))
4209 i = 0;
4210 buffer_info = &rx_ring->buffer_info[i];
4211 }
4212
4213 if (likely(rx_ring->next_to_use != i)) {
4214 rx_ring->next_to_use = i;
4215 if (unlikely(i-- == 0))
4216 i = (rx_ring->count - 1);
4217
4218 /* Force memory writes to complete before letting h/w
4219 * know there are new descriptors to fetch. (Only
4220 * applicable for weak-ordered memory model archs,
4221 * such as IA-64). */
4222 wmb();
4223 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4224 }
4225}
4226
1da177e4 4227/**
2d7edb92 4228 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4229 * @adapter: address of board private structure
4230 **/
4231
64798845
JP		 4232static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4233 struct e1000_rx_ring *rx_ring,
4234 int cleaned_count)
1da177e4 4235{
1dc32918 4236 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4237 struct net_device *netdev = adapter->netdev;
4238 struct pci_dev *pdev = adapter->pdev;
4239 struct e1000_rx_desc *rx_desc;
4240 struct e1000_buffer *buffer_info;
4241 struct sk_buff *skb;
2648345f 4242 unsigned int i;
89d71a66 4243 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4244
4245 i = rx_ring->next_to_use;
4246 buffer_info = &rx_ring->buffer_info[i];
4247
a292ca6e 4248 while (cleaned_count--) {
ca6f7224
CH		 4249 skb = buffer_info->skb;
4250 if (skb) {
a292ca6e
JK		 4251 skb_trim(skb, 0);
4252 goto map_skb;
4253 }
4254
89d71a66 4255 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
96838a40 4256 if (unlikely(!skb)) {
1da177e4 4257 /* Better luck next round */
72d64a43 4258 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4259 break;
4260 }
4261
2648345f 4262 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4263 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4264 struct sk_buff *oldskb = skb;
feb8f478
ET		 4265 e_err(rx_err, "skb align check failed: %u bytes at "
4266 "%p\n", bufsz, skb->data);
2648345f 4267 /* Try again, without freeing the previous */
89d71a66 4268 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
2648345f 4269 /* Failed allocation, critical failure */
1da177e4
LT		 4270 if (!skb) {
4271 dev_kfree_skb(oldskb);
edbbb3ca 4272 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4273 break;
4274 }
2648345f 4275
1da177e4
LT		 4276 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4277 /* give up */
4278 dev_kfree_skb(skb);
4279 dev_kfree_skb(oldskb);
edbbb3ca 4280 adapter->alloc_rx_buff_failed++;
1da177e4 4281 break; /* while !buffer_info->skb */
1da177e4 4282 }
ca6f7224
CH		 4283
4284 /* Use new allocation */
4285 dev_kfree_skb(oldskb);
1da177e4 4286 }
1da177e4
LT		 4287 buffer_info->skb = skb;
4288 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4289map_skb:
b16f53be 4290 buffer_info->dma = dma_map_single(&pdev->dev,
1da177e4 4291 skb->data,
edbbb3ca 4292 buffer_info->length,
b16f53be
NN		 4293 DMA_FROM_DEVICE);
4294 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB		 4295 dev_kfree_skb(skb);
4296 buffer_info->skb = NULL;
4297 buffer_info->dma = 0;
4298 adapter->alloc_rx_buff_failed++;
4299 break; /* while !buffer_info->skb */
4300 }
1da177e4 4301
edbbb3ca
JB		 4302 /*
4303 * XXX if it was allocated cleanly it will never map to a
4304 * boundary crossing
4305 */
4306
2648345f
MC		 4307 /* Fix for errata 23, can't cross 64kB boundary */
4308 if (!e1000_check_64k_bound(adapter,
4309 (void *)(unsigned long)buffer_info->dma,
4310 adapter->rx_buffer_len)) {
feb8f478
ET		 4311 e_err(rx_err, "dma align check failed: %u bytes at "
4312 "%p\n", adapter->rx_buffer_len,
675ad473 4313 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4314 dev_kfree_skb(skb);
4315 buffer_info->skb = NULL;
4316
b16f53be 4317 dma_unmap_single(&pdev->dev, buffer_info->dma,
1da177e4 4318 adapter->rx_buffer_len,
b16f53be 4319 DMA_FROM_DEVICE);
679be3ba 4320 buffer_info->dma = 0;
1da177e4 4321
edbbb3ca 4322 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4323 break; /* while !buffer_info->skb */
4324 }
1da177e4
LT		 4325 rx_desc = E1000_RX_DESC(*rx_ring, i);
4326 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4327
96838a40
JB		 4328 if (unlikely(++i == rx_ring->count))
4329 i = 0;
1da177e4
LT		 4330 buffer_info = &rx_ring->buffer_info[i];
4331 }
4332
b92ff8ee
JB		 4333 if (likely(rx_ring->next_to_use != i)) {
4334 rx_ring->next_to_use = i;
4335 if (unlikely(i-- == 0))
4336 i = (rx_ring->count - 1);
4337
4338 /* Force memory writes to complete before letting h/w
4339 * know there are new descriptors to fetch. (Only
4340 * applicable for weak-ordered memory model archs,
4341 * such as IA-64). */
4342 wmb();
1dc32918 4343 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4344 }
1da177e4
LT		 4345}
4346
4347/**
4348 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4349 * @adapter:
4350 **/
4351
64798845 4352static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4353{
1dc32918 4354 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4355 u16 phy_status;
4356 u16 phy_ctrl;
1da177e4 4357
1dc32918
JP		 4358 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4359 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4360 return;
4361
96838a40 4362 if (adapter->smartspeed == 0) {
1da177e4
LT		 4363 /* If Master/Slave config fault is asserted twice,
4364 * we assume back-to-back */
1dc32918 4365 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4366 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4367 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4368 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4369 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4370 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4371 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4372 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4373 phy_ctrl);
4374 adapter->smartspeed++;
1dc32918
JP		 4375 if (!e1000_phy_setup_autoneg(hw) &&
4376 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4377 &phy_ctrl)) {
4378 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4379 MII_CR_RESTART_AUTO_NEG);
1dc32918 4380 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4381 phy_ctrl);
4382 }
4383 }
4384 return;
96838a40 4385 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4386 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4387 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4388 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4389 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4390 if (!e1000_phy_setup_autoneg(hw) &&
4391 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4392 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4393 MII_CR_RESTART_AUTO_NEG);
1dc32918 4394 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4395 }
4396 }
4397 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4398 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4399 adapter->smartspeed = 0;
4400}
4401
4402/**
4403 * e1000_ioctl -
4404 * @netdev:
4405 * @ifreq:
4406 * @cmd:
4407 **/
4408
64798845 4409static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4410{
4411 switch (cmd) {
4412 case SIOCGMIIPHY:
4413 case SIOCGMIIREG:
4414 case SIOCSMIIREG:
4415 return e1000_mii_ioctl(netdev, ifr, cmd);
4416 default:
4417 return -EOPNOTSUPP;
4418 }
4419}
4420
4421/**
4422 * e1000_mii_ioctl -
4423 * @netdev:
4424 * @ifreq:
4425 * @cmd:
4426 **/
4427
64798845
JP		 4428static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4429 int cmd)
1da177e4 4430{
60490fe0 4431 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4432 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4433 struct mii_ioctl_data *data = if_mii(ifr);
4434 int retval;
406874a7 4435 u16 mii_reg;
97876fc6 4436 unsigned long flags;
1da177e4 4437
1dc32918 4438 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4439 return -EOPNOTSUPP;
4440
4441 switch (cmd) {
4442 case SIOCGMIIPHY:
1dc32918 4443 data->phy_id = hw->phy_addr;
1da177e4
LT		 4444 break;
4445 case SIOCGMIIREG:
97876fc6 4446 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4447 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4448 &data->val_out)) {
4449 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4450 return -EIO;
97876fc6
MC		 4451 }
4452 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4453 break;
4454 case SIOCSMIIREG:
96838a40 4455 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4456 return -EFAULT;
4457 mii_reg = data->val_in;
97876fc6 4458 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4459 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4460 mii_reg)) {
4461 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4462 return -EIO;
97876fc6 4463 }
f0163ac4 4464 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4465 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4466 switch (data->reg_num) {
4467 case PHY_CTRL:
96838a40 4468 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4469 break;
96838a40 4470 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4471 hw->autoneg = 1;
4472 hw->autoneg_advertised = 0x2F;
1da177e4 4473 } else {
14ad2513 4474 u32 speed;
1da177e4 4475 if (mii_reg & 0x40)
14ad2513 4476 speed = SPEED_1000;
1da177e4 4477 else if (mii_reg & 0x2000)
14ad2513 4478 speed = SPEED_100;
1da177e4 4479 else
14ad2513
DD		 4480 speed = SPEED_10;
4481 retval = e1000_set_spd_dplx(
4482 adapter, speed,
4483 ((mii_reg & 0x100)
4484 ? DUPLEX_FULL :
4485 DUPLEX_HALF));
f0163ac4 4486 if (retval)
1da177e4
LT		 4487 return retval;
4488 }
2db10a08
AK		 4489 if (netif_running(adapter->netdev))
4490 e1000_reinit_locked(adapter);
4491 else
1da177e4
LT		 4492 e1000_reset(adapter);
4493 break;
4494 case M88E1000_PHY_SPEC_CTRL:
4495 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4496 if (e1000_phy_reset(hw))
1da177e4
LT		 4497 return -EIO;
4498 break;
4499 }
4500 } else {
4501 switch (data->reg_num) {
4502 case PHY_CTRL:
96838a40 4503 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4504 break;
2db10a08
AK		 4505 if (netif_running(adapter->netdev))
4506 e1000_reinit_locked(adapter);
4507 else
1da177e4
LT		 4508 e1000_reset(adapter);
4509 break;
4510 }
4511 }
4512 break;
4513 default:
4514 return -EOPNOTSUPP;
4515 }
4516 return E1000_SUCCESS;
4517}
4518
64798845 4519void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4520{
4521 struct e1000_adapter *adapter = hw->back;
2648345f 4522 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4523
96838a40 4524 if (ret_val)
feb8f478 4525 e_err(probe, "Error in setting MWI\n");
1da177e4
LT		 4526}
4527
64798845 4528void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4529{
4530 struct e1000_adapter *adapter = hw->back;
4531
4532 pci_clear_mwi(adapter->pdev);
4533}
4534
64798845 4535int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4536{
4537 struct e1000_adapter *adapter = hw->back;
4538 return pcix_get_mmrbc(adapter->pdev);
4539}
4540
64798845 4541void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4542{
4543 struct e1000_adapter *adapter = hw->back;
4544 pcix_set_mmrbc(adapter->pdev, mmrbc);
4545}
4546
64798845 4547void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4548{
4549 outl(value, port);
4550}
4551
5622e404
JP		 4552static bool e1000_vlan_used(struct e1000_adapter *adapter)
4553{
4554 u16 vid;
4555
4556 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4557 return true;
4558 return false;
4559}
4560
4561static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
4562 bool filter_on)
1da177e4 4563{
1dc32918 4564 struct e1000_hw *hw = &adapter->hw;
5622e404 4565 u32 rctl;
1da177e4 4566
9150b76a
JB		 4567 if (!test_bit(__E1000_DOWN, &adapter->flags))
4568 e1000_irq_disable(adapter);
1da177e4 4569
5622e404 4570 if (filter_on) {
1532ecea
JB		 4571 /* enable VLAN receive filtering */
4572 rctl = er32(RCTL);
4573 rctl &= ~E1000_RCTL_CFIEN;
5622e404 4574 if (!(adapter->netdev->flags & IFF_PROMISC))
1532ecea
JB		 4575 rctl |= E1000_RCTL_VFE;
4576 ew32(RCTL, rctl);
4577 e1000_update_mng_vlan(adapter);
1da177e4 4578 } else {
1532ecea
JB		 4579 /* disable VLAN receive filtering */
4580 rctl = er32(RCTL);
4581 rctl &= ~E1000_RCTL_VFE;
4582 ew32(RCTL, rctl);
5622e404 4583 }
fd38d7a0 4584
5622e404
JP		 4585 if (!test_bit(__E1000_DOWN, &adapter->flags))
4586 e1000_irq_enable(adapter);
4587}
4588
4589static void e1000_vlan_mode(struct net_device *netdev, u32 features)
4590{
4591 struct e1000_adapter *adapter = netdev_priv(netdev);
4592 struct e1000_hw *hw = &adapter->hw;
4593 u32 ctrl;
4594
4595 if (!test_bit(__E1000_DOWN, &adapter->flags))
4596 e1000_irq_disable(adapter);
4597
4598 ctrl = er32(CTRL);
4599 if (features & NETIF_F_HW_VLAN_RX) {
4600 /* enable VLAN tag insert/strip */
4601 ctrl |= E1000_CTRL_VME;
4602 } else {
4603 /* disable VLAN tag insert/strip */
4604 ctrl &= ~E1000_CTRL_VME;
1da177e4 4605 }
5622e404 4606 ew32(CTRL, ctrl);
1da177e4 4607
9150b76a
JB		 4608 if (!test_bit(__E1000_DOWN, &adapter->flags))
4609 e1000_irq_enable(adapter);
1da177e4
LT		 4610}
4611
64798845 4612static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4613{
60490fe0 4614 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4615 struct e1000_hw *hw = &adapter->hw;
406874a7 4616 u32 vfta, index;
96838a40 4617
1dc32918 4618 if ((hw->mng_cookie.status &
96838a40
JB		 4619 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4620 (vid == adapter->mng_vlan_id))
2d7edb92 4621 return;
5622e404
JP		 4622
4623 if (!e1000_vlan_used(adapter))
4624 e1000_vlan_filter_on_off(adapter, true);
4625
1da177e4
LT		 4626 /* add VID to filter table */
4627 index = (vid >> 5) & 0x7F;
1dc32918 4628 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4629 vfta |= (1 << (vid & 0x1F));
1dc32918 4630 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4631
4632 set_bit(vid, adapter->active_vlans);
1da177e4
LT		 4633}
4634
64798845 4635static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4636{
60490fe0 4637 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4638 struct e1000_hw *hw = &adapter->hw;
406874a7 4639 u32 vfta, index;
1da177e4 4640
9150b76a
JB		 4641 if (!test_bit(__E1000_DOWN, &adapter->flags))
4642 e1000_irq_disable(adapter);
9150b76a
JB		 4643 if (!test_bit(__E1000_DOWN, &adapter->flags))
4644 e1000_irq_enable(adapter);
1da177e4
LT		 4645
4646 /* remove VID from filter table */
4647 index = (vid >> 5) & 0x7F;
1dc32918 4648 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4649 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4650 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4651
4652 clear_bit(vid, adapter->active_vlans);
4653
4654 if (!e1000_vlan_used(adapter))
4655 e1000_vlan_filter_on_off(adapter, false);
1da177e4
LT		 4656}
4657
64798845 4658static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4 4659{
5622e404 4660 u16 vid;
1da177e4 4661
5622e404
JP		 4662 if (!e1000_vlan_used(adapter))
4663 return;
4664
4665 e1000_vlan_filter_on_off(adapter, true);
4666 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4667 e1000_vlan_rx_add_vid(adapter->netdev, vid);
1da177e4
LT		 4668}
4669
14ad2513 4670int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
1da177e4 4671{
1dc32918
JP		 4672 struct e1000_hw *hw = &adapter->hw;
4673
4674 hw->autoneg = 0;
1da177e4 4675
14ad2513
DD		 4676 /* Make sure dplx is at most 1 bit and lsb of speed is not set
4677 * for the switch() below to work */
4678 if ((spd & 1) || (dplx & ~1))
4679 goto err_inval;
4680
6921368f 4681 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4682 if ((hw->media_type == e1000_media_type_fiber) &&
14ad2513
DD		 4683 spd != SPEED_1000 &&
4684 dplx != DUPLEX_FULL)
4685 goto err_inval;
6921368f 4686
14ad2513 4687 switch (spd + dplx) {
1da177e4 4688 case SPEED_10 + DUPLEX_HALF:
1dc32918 4689 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4690 break;
4691 case SPEED_10 + DUPLEX_FULL:
1dc32918 4692 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4693 break;
4694 case SPEED_100 + DUPLEX_HALF:
1dc32918 4695 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4696 break;
4697 case SPEED_100 + DUPLEX_FULL:
1dc32918 4698 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4699 break;
4700 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4701 hw->autoneg = 1;
4702 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4703 break;
4704 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4705 default:
14ad2513 4706 goto err_inval;
1da177e4
LT		 4707 }
4708 return 0;
14ad2513
DD		 4709
4710err_inval:
4711 e_err(probe, "Unsupported Speed/Duplex configuration\n");
4712 return -EINVAL;
1da177e4
LT		 4713}
4714
b43fcd7d 4715static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4716{
4717 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4718 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4719 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4720 u32 ctrl, ctrl_ext, rctl, status;
4721 u32 wufc = adapter->wol;
6fdfef16 4722#ifdef CONFIG_PM
240b1710 4723 int retval = 0;
6fdfef16 4724#endif
1da177e4
LT		 4725
4726 netif_device_detach(netdev);
4727
2db10a08
AK		 4728 if (netif_running(netdev)) {
4729 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4730 e1000_down(adapter);
2db10a08 4731 }
1da177e4 4732
2f82665f 4733#ifdef CONFIG_PM
1d33e9c6 4734 retval = pci_save_state(pdev);
2f82665f
JB		 4735 if (retval)
4736 return retval;
4737#endif
4738
1dc32918 4739 status = er32(STATUS);
96838a40 4740 if (status & E1000_STATUS_LU)
1da177e4
LT		 4741 wufc &= ~E1000_WUFC_LNKC;
4742
96838a40 4743 if (wufc) {
1da177e4 4744 e1000_setup_rctl(adapter);
db0ce50d 4745 e1000_set_rx_mode(netdev);
1da177e4
LT		 4746
4747 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4748 if (wufc & E1000_WUFC_MC) {
1dc32918 4749 rctl = er32(RCTL);
1da177e4 4750 rctl |= E1000_RCTL_MPE;
1dc32918 4751 ew32(RCTL, rctl);
1da177e4
LT		 4752 }
4753
1dc32918
JP		 4754 if (hw->mac_type >= e1000_82540) {
4755 ctrl = er32(CTRL);
1da177e4
LT		 4756 /* advertise wake from D3Cold */
4757 #define E1000_CTRL_ADVD3WUC 0x00100000
4758 /* phy power management enable */
4759 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4760 ctrl |= E1000_CTRL_ADVD3WUC |
4761 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4762 ew32(CTRL, ctrl);
1da177e4
LT		 4763 }
4764
1dc32918 4765 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 4766 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4767 /* keep the laser running in D3 */
1dc32918 4768 ctrl_ext = er32(CTRL_EXT);
1da177e4 4769 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4770 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4771 }
4772
1dc32918
JP		 4773 ew32(WUC, E1000_WUC_PME_EN);
4774 ew32(WUFC, wufc);
1da177e4 4775 } else {
1dc32918
JP		 4776 ew32(WUC, 0);
4777 ew32(WUFC, 0);
1da177e4
LT		 4778 }
4779
0fccd0e9
JG		 4780 e1000_release_manageability(adapter);
4781
b43fcd7d
RW		 4782 *enable_wake = !!wufc;
4783
0fccd0e9 4784 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 4785 if (adapter->en_mng_pt)
4786 *enable_wake = true;
1da177e4 4787
edd106fc
AK		 4788 if (netif_running(netdev))
4789 e1000_free_irq(adapter);
4790
1da177e4 4791 pci_disable_device(pdev);
240b1710 4792
1da177e4
LT		 4793 return 0;
4794}
4795
2f82665f 4796#ifdef CONFIG_PM
b43fcd7d
RW		 4797static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4798{
4799 int retval;
4800 bool wake;
4801
4802 retval = __e1000_shutdown(pdev, &wake);
4803 if (retval)
4804 return retval;
4805
4806 if (wake) {
4807 pci_prepare_to_sleep(pdev);
4808 } else {
4809 pci_wake_from_d3(pdev, false);
4810 pci_set_power_state(pdev, PCI_D3hot);
4811 }
4812
4813 return 0;
4814}
4815
64798845 4816static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4817{
4818 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4819 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4820 struct e1000_hw *hw = &adapter->hw;
406874a7 4821 u32 err;
1da177e4 4822
d0e027db 4823 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4824 pci_restore_state(pdev);
dbb5aaeb 4825 pci_save_state(pdev);
81250297
TI		 4826
4827 if (adapter->need_ioport)
4828 err = pci_enable_device(pdev);
4829 else
4830 err = pci_enable_device_mem(pdev);
c7be73bc 4831 if (err) {
675ad473 4832 pr_err("Cannot enable PCI device from suspend\n");
3d1dd8cb
AK		 4833 return err;
4834 }
a4cb847d 4835 pci_set_master(pdev);
1da177e4 4836
d0e027db
AK		 4837 pci_enable_wake(pdev, PCI_D3hot, 0);
4838 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4839
c7be73bc
JP		 4840 if (netif_running(netdev)) {
4841 err = e1000_request_irq(adapter);
4842 if (err)
4843 return err;
4844 }
edd106fc
AK		 4845
4846 e1000_power_up_phy(adapter);
1da177e4 4847 e1000_reset(adapter);
1dc32918 4848 ew32(WUS, ~0);
1da177e4 4849
0fccd0e9
JG		 4850 e1000_init_manageability(adapter);
4851
96838a40 4852 if (netif_running(netdev))
1da177e4
LT		 4853 e1000_up(adapter);
4854
4855 netif_device_attach(netdev);
4856
1da177e4
LT		 4857 return 0;
4858}
4859#endif
c653e635
AK		 4860
4861static void e1000_shutdown(struct pci_dev *pdev)
4862{
b43fcd7d
RW		 4863 bool wake;
4864
4865 __e1000_shutdown(pdev, &wake);
4866
4867 if (system_state == SYSTEM_POWER_OFF) {
4868 pci_wake_from_d3(pdev, wake);
4869 pci_set_power_state(pdev, PCI_D3hot);
4870 }
c653e635
AK		 4871}
4872
1da177e4
LT		 4873#ifdef CONFIG_NET_POLL_CONTROLLER
4874/*
4875 * Polling 'interrupt' - used by things like netconsole to send skbs
4876 * without having to re-enable interrupts. It's not called while
4877 * the interrupt routine is executing.
4878 */
64798845 4879static void e1000_netpoll(struct net_device *netdev)
1da177e4 4880{
60490fe0 4881 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4882
1da177e4 4883 disable_irq(adapter->pdev->irq);
7d12e780 4884 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4885 enable_irq(adapter->pdev->irq);
4886}
4887#endif
4888
9026729b
AK		 4889/**
4890 * e1000_io_error_detected - called when PCI error is detected
4891 * @pdev: Pointer to PCI device
120a5d0d 4892 * @state: The current pci connection state
9026729b
AK		 4893 *
4894 * This function is called after a PCI bus error affecting
4895 * this device has been detected.
4896 */
64798845
JP		 4897static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4898 pci_channel_state_t state)
9026729b
AK		 4899{
4900 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4901 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4902
4903 netif_device_detach(netdev);
4904
eab63302
AD		 4905 if (state == pci_channel_io_perm_failure)
4906 return PCI_ERS_RESULT_DISCONNECT;
4907
9026729b
AK		 4908 if (netif_running(netdev))
4909 e1000_down(adapter);
72e8d6bb 4910 pci_disable_device(pdev);
9026729b
AK		 4911
4912 /* Request a slot slot reset. */
4913 return PCI_ERS_RESULT_NEED_RESET;
4914}
4915
4916/**
4917 * e1000_io_slot_reset - called after the pci bus has been reset.
4918 * @pdev: Pointer to PCI device
4919 *
4920 * Restart the card from scratch, as if from a cold-boot. Implementation
4921 * resembles the first-half of the e1000_resume routine.
4922 */
4923static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4924{
4925 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4926 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4927 struct e1000_hw *hw = &adapter->hw;
81250297 4928 int err;
9026729b 4929
81250297
TI		 4930 if (adapter->need_ioport)
4931 err = pci_enable_device(pdev);
4932 else
4933 err = pci_enable_device_mem(pdev);
4934 if (err) {
675ad473 4935 pr_err("Cannot re-enable PCI device after reset.\n");
9026729b
AK		 4936 return PCI_ERS_RESULT_DISCONNECT;
4937 }
4938 pci_set_master(pdev);
4939
dbf38c94
LV		 4940 pci_enable_wake(pdev, PCI_D3hot, 0);
4941 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4942
9026729b 4943 e1000_reset(adapter);
1dc32918 4944 ew32(WUS, ~0);
9026729b
AK		 4945
4946 return PCI_ERS_RESULT_RECOVERED;
4947}
4948
4949/**
4950 * e1000_io_resume - called when traffic can start flowing again.
4951 * @pdev: Pointer to PCI device
4952 *
4953 * This callback is called when the error recovery driver tells us that
4954 * its OK to resume normal operation. Implementation resembles the
4955 * second-half of the e1000_resume routine.
4956 */
4957static void e1000_io_resume(struct pci_dev *pdev)
4958{
4959 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4960 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 4961
4962 e1000_init_manageability(adapter);
9026729b
AK		 4963
4964 if (netif_running(netdev)) {
4965 if (e1000_up(adapter)) {
675ad473 4966 pr_info("can't bring device back up after reset\n");
9026729b
AK		 4967 return;
4968 }
4969 }
4970
4971 netif_device_attach(netdev);
9026729b
AK		 4972}
4973
1da177e4 4974/* e1000_main.c */
Linux kernel - Deliverables
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