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c7d05ca8 JB |
1 | /******************************************************************************* |
2 | * | |
3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
66fc360a | 4 | * Copyright(c) 2013 - 2016 Intel Corporation. |
c7d05ca8 JB |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms and conditions of the GNU General Public License, | |
8 | * version 2, as published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | * more details. | |
14 | * | |
dc641b73 GR |
15 | * You should have received a copy of the GNU General Public License along |
16 | * with this program. If not, see <http://www.gnu.org/licenses/>. | |
c7d05ca8 JB |
17 | * |
18 | * The full GNU General Public License is included in this distribution in | |
19 | * the file called "COPYING". | |
20 | * | |
21 | * Contact Information: | |
22 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
23 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
24 | * | |
25 | ******************************************************************************/ | |
26 | ||
27 | /* ethtool support for i40e */ | |
28 | ||
29 | #include "i40e.h" | |
30 | #include "i40e_diag.h" | |
31 | ||
32 | struct i40e_stats { | |
33 | char stat_string[ETH_GSTRING_LEN]; | |
34 | int sizeof_stat; | |
35 | int stat_offset; | |
36 | }; | |
37 | ||
38 | #define I40E_STAT(_type, _name, _stat) { \ | |
39 | .stat_string = _name, \ | |
40 | .sizeof_stat = FIELD_SIZEOF(_type, _stat), \ | |
41 | .stat_offset = offsetof(_type, _stat) \ | |
42 | } | |
fad177dc | 43 | |
c7d05ca8 | 44 | #define I40E_NETDEV_STAT(_net_stat) \ |
fad177dc | 45 | I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat) |
c7d05ca8 JB |
46 | #define I40E_PF_STAT(_name, _stat) \ |
47 | I40E_STAT(struct i40e_pf, _name, _stat) | |
48 | #define I40E_VSI_STAT(_name, _stat) \ | |
49 | I40E_STAT(struct i40e_vsi, _name, _stat) | |
8eab9cfd SN |
50 | #define I40E_VEB_STAT(_name, _stat) \ |
51 | I40E_STAT(struct i40e_veb, _name, _stat) | |
c7d05ca8 JB |
52 | |
53 | static const struct i40e_stats i40e_gstrings_net_stats[] = { | |
54 | I40E_NETDEV_STAT(rx_packets), | |
55 | I40E_NETDEV_STAT(tx_packets), | |
56 | I40E_NETDEV_STAT(rx_bytes), | |
57 | I40E_NETDEV_STAT(tx_bytes), | |
58 | I40E_NETDEV_STAT(rx_errors), | |
59 | I40E_NETDEV_STAT(tx_errors), | |
60 | I40E_NETDEV_STAT(rx_dropped), | |
61 | I40E_NETDEV_STAT(tx_dropped), | |
c7d05ca8 JB |
62 | I40E_NETDEV_STAT(collisions), |
63 | I40E_NETDEV_STAT(rx_length_errors), | |
64 | I40E_NETDEV_STAT(rx_crc_errors), | |
65 | }; | |
66 | ||
8eab9cfd SN |
67 | static const struct i40e_stats i40e_gstrings_veb_stats[] = { |
68 | I40E_VEB_STAT("rx_bytes", stats.rx_bytes), | |
69 | I40E_VEB_STAT("tx_bytes", stats.tx_bytes), | |
70 | I40E_VEB_STAT("rx_unicast", stats.rx_unicast), | |
71 | I40E_VEB_STAT("tx_unicast", stats.tx_unicast), | |
72 | I40E_VEB_STAT("rx_multicast", stats.rx_multicast), | |
73 | I40E_VEB_STAT("tx_multicast", stats.tx_multicast), | |
74 | I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast), | |
75 | I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast), | |
76 | I40E_VEB_STAT("rx_discards", stats.rx_discards), | |
77 | I40E_VEB_STAT("tx_discards", stats.tx_discards), | |
78 | I40E_VEB_STAT("tx_errors", stats.tx_errors), | |
79 | I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol), | |
80 | }; | |
81 | ||
41a9e55c | 82 | static const struct i40e_stats i40e_gstrings_misc_stats[] = { |
418631d4 SN |
83 | I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast), |
84 | I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast), | |
85 | I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast), | |
86 | I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast), | |
41a9e55c SN |
87 | I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast), |
88 | I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast), | |
418631d4 | 89 | I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol), |
2fc3d715 | 90 | I40E_VSI_STAT("tx_linearize", tx_linearize), |
164c9f54 | 91 | I40E_VSI_STAT("tx_force_wb", tx_force_wb), |
dd353109 | 92 | I40E_VSI_STAT("tx_lost_interrupt", tx_lost_interrupt), |
c40918c3 JB |
93 | I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed), |
94 | I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed), | |
41a9e55c SN |
95 | }; |
96 | ||
c7d05ca8 JB |
97 | /* These PF_STATs might look like duplicates of some NETDEV_STATs, |
98 | * but they are separate. This device supports Virtualization, and | |
99 | * as such might have several netdevs supporting VMDq and FCoE going | |
100 | * through a single port. The NETDEV_STATs are for individual netdevs | |
101 | * seen at the top of the stack, and the PF_STATs are for the physical | |
102 | * function at the bottom of the stack hosting those netdevs. | |
103 | * | |
104 | * The PF_STATs are appended to the netdev stats only when ethtool -S | |
105 | * is queried on the base PF netdev, not on the VMDq or FCoE netdev. | |
106 | */ | |
107 | static struct i40e_stats i40e_gstrings_stats[] = { | |
108 | I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes), | |
109 | I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes), | |
532d283d SN |
110 | I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast), |
111 | I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast), | |
112 | I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast), | |
113 | I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast), | |
114 | I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast), | |
115 | I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast), | |
c7d05ca8 JB |
116 | I40E_PF_STAT("tx_errors", stats.eth.tx_errors), |
117 | I40E_PF_STAT("rx_dropped", stats.eth.rx_discards), | |
c7d05ca8 | 118 | I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down), |
9f7c9448 | 119 | I40E_PF_STAT("rx_crc_errors", stats.crc_errors), |
c7d05ca8 JB |
120 | I40E_PF_STAT("illegal_bytes", stats.illegal_bytes), |
121 | I40E_PF_STAT("mac_local_faults", stats.mac_local_faults), | |
122 | I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults), | |
a47a15f4 | 123 | I40E_PF_STAT("tx_timeout", tx_timeout_count), |
8a3c91cc | 124 | I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error), |
c7d05ca8 JB |
125 | I40E_PF_STAT("rx_length_errors", stats.rx_length_errors), |
126 | I40E_PF_STAT("link_xon_rx", stats.link_xon_rx), | |
127 | I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx), | |
128 | I40E_PF_STAT("link_xon_tx", stats.link_xon_tx), | |
129 | I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx), | |
130 | I40E_PF_STAT("rx_size_64", stats.rx_size_64), | |
131 | I40E_PF_STAT("rx_size_127", stats.rx_size_127), | |
132 | I40E_PF_STAT("rx_size_255", stats.rx_size_255), | |
133 | I40E_PF_STAT("rx_size_511", stats.rx_size_511), | |
134 | I40E_PF_STAT("rx_size_1023", stats.rx_size_1023), | |
135 | I40E_PF_STAT("rx_size_1522", stats.rx_size_1522), | |
136 | I40E_PF_STAT("rx_size_big", stats.rx_size_big), | |
137 | I40E_PF_STAT("tx_size_64", stats.tx_size_64), | |
138 | I40E_PF_STAT("tx_size_127", stats.tx_size_127), | |
139 | I40E_PF_STAT("tx_size_255", stats.tx_size_255), | |
140 | I40E_PF_STAT("tx_size_511", stats.tx_size_511), | |
141 | I40E_PF_STAT("tx_size_1023", stats.tx_size_1023), | |
142 | I40E_PF_STAT("tx_size_1522", stats.tx_size_1522), | |
143 | I40E_PF_STAT("tx_size_big", stats.tx_size_big), | |
144 | I40E_PF_STAT("rx_undersize", stats.rx_undersize), | |
145 | I40E_PF_STAT("rx_fragments", stats.rx_fragments), | |
146 | I40E_PF_STAT("rx_oversize", stats.rx_oversize), | |
147 | I40E_PF_STAT("rx_jabber", stats.rx_jabber), | |
148 | I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests), | |
1d0a4ada | 149 | I40E_PF_STAT("arq_overflows", arq_overflows), |
beb0dff1 | 150 | I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared), |
60793f4a | 151 | I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt), |
433c47de | 152 | I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match), |
60ccd45c | 153 | I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match), |
d0389e51 | 154 | I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status), |
433c47de | 155 | I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match), |
d0389e51 | 156 | I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status), |
433c47de | 157 | |
bee5af7e ASJ |
158 | /* LPI stats */ |
159 | I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status), | |
160 | I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status), | |
161 | I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count), | |
162 | I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count), | |
c7d05ca8 JB |
163 | }; |
164 | ||
38e00438 VD |
165 | #ifdef I40E_FCOE |
166 | static const struct i40e_stats i40e_gstrings_fcoe_stats[] = { | |
167 | I40E_VSI_STAT("fcoe_bad_fccrc", fcoe_stats.fcoe_bad_fccrc), | |
168 | I40E_VSI_STAT("rx_fcoe_dropped", fcoe_stats.rx_fcoe_dropped), | |
169 | I40E_VSI_STAT("rx_fcoe_packets", fcoe_stats.rx_fcoe_packets), | |
170 | I40E_VSI_STAT("rx_fcoe_dwords", fcoe_stats.rx_fcoe_dwords), | |
171 | I40E_VSI_STAT("fcoe_ddp_count", fcoe_stats.fcoe_ddp_count), | |
172 | I40E_VSI_STAT("fcoe_last_error", fcoe_stats.fcoe_last_error), | |
173 | I40E_VSI_STAT("tx_fcoe_packets", fcoe_stats.tx_fcoe_packets), | |
174 | I40E_VSI_STAT("tx_fcoe_dwords", fcoe_stats.tx_fcoe_dwords), | |
175 | }; | |
176 | ||
177 | #endif /* I40E_FCOE */ | |
c7d05ca8 | 178 | #define I40E_QUEUE_STATS_LEN(n) \ |
31cd840e SN |
179 | (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \ |
180 | * 2 /* Tx and Rx together */ \ | |
181 | * (sizeof(struct i40e_queue_stats) / sizeof(u64))) | |
c7d05ca8 JB |
182 | #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats) |
183 | #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats) | |
41a9e55c | 184 | #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats) |
38e00438 VD |
185 | #ifdef I40E_FCOE |
186 | #define I40E_FCOE_STATS_LEN ARRAY_SIZE(i40e_gstrings_fcoe_stats) | |
187 | #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \ | |
188 | I40E_FCOE_STATS_LEN + \ | |
189 | I40E_MISC_STATS_LEN + \ | |
190 | I40E_QUEUE_STATS_LEN((n))) | |
191 | #else | |
c7d05ca8 | 192 | #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \ |
41a9e55c | 193 | I40E_MISC_STATS_LEN + \ |
c7d05ca8 | 194 | I40E_QUEUE_STATS_LEN((n))) |
38e00438 | 195 | #endif /* I40E_FCOE */ |
c7d05ca8 JB |
196 | #define I40E_PFC_STATS_LEN ( \ |
197 | (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \ | |
198 | FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \ | |
199 | FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \ | |
200 | FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \ | |
201 | FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \ | |
202 | / sizeof(u64)) | |
fe860afb NP |
203 | #define I40E_VEB_TC_STATS_LEN ( \ |
204 | (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \ | |
205 | FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \ | |
206 | FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \ | |
207 | FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \ | |
208 | / sizeof(u64)) | |
8eab9cfd | 209 | #define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats) |
fe860afb | 210 | #define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN) |
c7d05ca8 JB |
211 | #define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \ |
212 | I40E_PFC_STATS_LEN + \ | |
213 | I40E_VSI_STATS_LEN((n))) | |
214 | ||
215 | enum i40e_ethtool_test_id { | |
216 | I40E_ETH_TEST_REG = 0, | |
217 | I40E_ETH_TEST_EEPROM, | |
218 | I40E_ETH_TEST_INTR, | |
219 | I40E_ETH_TEST_LOOPBACK, | |
220 | I40E_ETH_TEST_LINK, | |
221 | }; | |
222 | ||
223 | static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = { | |
224 | "Register test (offline)", | |
225 | "Eeprom test (offline)", | |
226 | "Interrupt test (offline)", | |
227 | "Loopback test (offline)", | |
228 | "Link test (on/offline)" | |
229 | }; | |
230 | ||
231 | #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN) | |
232 | ||
b5569892 ASJ |
233 | static const char i40e_priv_flags_strings_gl[][ETH_GSTRING_LEN] = { |
234 | "MFP", | |
235 | "LinkPolling", | |
236 | "flow-director-atr", | |
237 | "veb-stats", | |
238 | "hw-atr-eviction", | |
239 | "vf-true-promisc-support", | |
240 | }; | |
241 | ||
242 | #define I40E_PRIV_FLAGS_GL_STR_LEN ARRAY_SIZE(i40e_priv_flags_strings_gl) | |
243 | ||
7e45ab44 GR |
244 | static const char i40e_priv_flags_strings[][ETH_GSTRING_LEN] = { |
245 | "NPAR", | |
9ac77266 | 246 | "LinkPolling", |
ef17178c | 247 | "flow-director-atr", |
1cdfd88f | 248 | "veb-stats", |
72b74869 | 249 | "hw-atr-eviction", |
7e45ab44 GR |
250 | }; |
251 | ||
9ac77266 | 252 | #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_priv_flags_strings) |
7e45ab44 | 253 | |
f0d8c733 SN |
254 | /** |
255 | * i40e_partition_setting_complaint - generic complaint for MFP restriction | |
256 | * @pf: the PF struct | |
257 | **/ | |
258 | static void i40e_partition_setting_complaint(struct i40e_pf *pf) | |
259 | { | |
260 | dev_info(&pf->pdev->dev, | |
261 | "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n"); | |
262 | } | |
263 | ||
06566e5d CS |
264 | /** |
265 | * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes | |
266 | * @phy_types: PHY types to convert | |
267 | * @supported: pointer to the ethtool supported variable to fill in | |
268 | * @advertising: pointer to the ethtool advertising variable to fill in | |
269 | * | |
270 | **/ | |
271 | static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported, | |
272 | u32 *advertising) | |
273 | { | |
274 | enum i40e_aq_capabilities_phy_type phy_types = pf->hw.phy.phy_types; | |
2853704f | 275 | struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info; |
06566e5d CS |
276 | *supported = 0x0; |
277 | *advertising = 0x0; | |
278 | ||
279 | if (phy_types & I40E_CAP_PHY_TYPE_SGMII) { | |
280 | *supported |= SUPPORTED_Autoneg | | |
281 | SUPPORTED_1000baseT_Full; | |
2853704f AD |
282 | *advertising |= ADVERTISED_Autoneg; |
283 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) | |
284 | *advertising |= ADVERTISED_1000baseT_Full; | |
06566e5d CS |
285 | if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) { |
286 | *supported |= SUPPORTED_100baseT_Full; | |
287 | *advertising |= ADVERTISED_100baseT_Full; | |
288 | } | |
289 | } | |
290 | if (phy_types & I40E_CAP_PHY_TYPE_XAUI || | |
291 | phy_types & I40E_CAP_PHY_TYPE_XFI || | |
292 | phy_types & I40E_CAP_PHY_TYPE_SFI || | |
293 | phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU || | |
294 | phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) | |
295 | *supported |= SUPPORTED_10000baseT_Full; | |
296 | if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU || | |
297 | phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 || | |
298 | phy_types & I40E_CAP_PHY_TYPE_10GBASE_T || | |
299 | phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR || | |
300 | phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) { | |
301 | *supported |= SUPPORTED_Autoneg | | |
302 | SUPPORTED_10000baseT_Full; | |
2853704f AD |
303 | *advertising |= ADVERTISED_Autoneg; |
304 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) | |
305 | *advertising |= ADVERTISED_10000baseT_Full; | |
06566e5d CS |
306 | } |
307 | if (phy_types & I40E_CAP_PHY_TYPE_XLAUI || | |
308 | phy_types & I40E_CAP_PHY_TYPE_XLPPI || | |
309 | phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC) | |
310 | *supported |= SUPPORTED_40000baseCR4_Full; | |
311 | if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU || | |
312 | phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) { | |
313 | *supported |= SUPPORTED_Autoneg | | |
314 | SUPPORTED_40000baseCR4_Full; | |
2853704f AD |
315 | *advertising |= ADVERTISED_Autoneg; |
316 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB) | |
317 | *advertising |= ADVERTISED_40000baseCR4_Full; | |
06566e5d | 318 | } |
01a7a9fe | 319 | if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) { |
06566e5d CS |
320 | *supported |= SUPPORTED_Autoneg | |
321 | SUPPORTED_100baseT_Full; | |
2853704f AD |
322 | *advertising |= ADVERTISED_Autoneg; |
323 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) | |
324 | *advertising |= ADVERTISED_100baseT_Full; | |
06566e5d CS |
325 | } |
326 | if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T || | |
327 | phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX || | |
328 | phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX || | |
329 | phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) { | |
330 | *supported |= SUPPORTED_Autoneg | | |
331 | SUPPORTED_1000baseT_Full; | |
2853704f AD |
332 | *advertising |= ADVERTISED_Autoneg; |
333 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) | |
334 | *advertising |= ADVERTISED_1000baseT_Full; | |
06566e5d CS |
335 | } |
336 | if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) | |
337 | *supported |= SUPPORTED_40000baseSR4_Full; | |
338 | if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) | |
339 | *supported |= SUPPORTED_40000baseLR4_Full; | |
340 | if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) { | |
341 | *supported |= SUPPORTED_40000baseKR4_Full | | |
342 | SUPPORTED_Autoneg; | |
343 | *advertising |= ADVERTISED_40000baseKR4_Full | | |
344 | ADVERTISED_Autoneg; | |
345 | } | |
346 | if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) { | |
347 | *supported |= SUPPORTED_20000baseKR2_Full | | |
348 | SUPPORTED_Autoneg; | |
2853704f AD |
349 | *advertising |= ADVERTISED_Autoneg; |
350 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB) | |
351 | *advertising |= ADVERTISED_20000baseKR2_Full; | |
06566e5d CS |
352 | } |
353 | if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR) { | |
354 | *supported |= SUPPORTED_10000baseKR_Full | | |
355 | SUPPORTED_Autoneg; | |
2853704f AD |
356 | *advertising |= ADVERTISED_Autoneg; |
357 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) | |
358 | *advertising |= ADVERTISED_10000baseKR_Full; | |
06566e5d CS |
359 | } |
360 | if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) { | |
361 | *supported |= SUPPORTED_10000baseKX4_Full | | |
362 | SUPPORTED_Autoneg; | |
2853704f AD |
363 | *advertising |= ADVERTISED_Autoneg; |
364 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) | |
365 | *advertising |= ADVERTISED_10000baseKX4_Full; | |
06566e5d CS |
366 | } |
367 | if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX) { | |
368 | *supported |= SUPPORTED_1000baseKX_Full | | |
369 | SUPPORTED_Autoneg; | |
2853704f AD |
370 | *advertising |= ADVERTISED_Autoneg; |
371 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) | |
372 | *advertising |= ADVERTISED_1000baseKX_Full; | |
06566e5d CS |
373 | } |
374 | } | |
375 | ||
c7d05ca8 | 376 | /** |
e827845c CS |
377 | * i40e_get_settings_link_up - Get the Link settings for when link is up |
378 | * @hw: hw structure | |
379 | * @ecmd: ethtool command to fill in | |
c7d05ca8 | 380 | * @netdev: network interface device structure |
c7d05ca8 | 381 | * |
c7d05ca8 | 382 | **/ |
e827845c CS |
383 | static void i40e_get_settings_link_up(struct i40e_hw *hw, |
384 | struct ethtool_cmd *ecmd, | |
3b6c2179 CS |
385 | struct net_device *netdev, |
386 | struct i40e_pf *pf) | |
c7d05ca8 | 387 | { |
c7d05ca8 | 388 | struct i40e_link_status *hw_link_info = &hw->phy.link_info; |
c7d05ca8 | 389 | u32 link_speed = hw_link_info->link_speed; |
06566e5d CS |
390 | u32 e_advertising = 0x0; |
391 | u32 e_supported = 0x0; | |
c7d05ca8 | 392 | |
e827845c | 393 | /* Initialize supported and advertised settings based on phy settings */ |
c7d05ca8 JB |
394 | switch (hw_link_info->phy_type) { |
395 | case I40E_PHY_TYPE_40GBASE_CR4: | |
396 | case I40E_PHY_TYPE_40GBASE_CR4_CU: | |
4e91bcd5 JB |
397 | ecmd->supported = SUPPORTED_Autoneg | |
398 | SUPPORTED_40000baseCR4_Full; | |
399 | ecmd->advertising = ADVERTISED_Autoneg | | |
400 | ADVERTISED_40000baseCR4_Full; | |
c7d05ca8 | 401 | break; |
e827845c CS |
402 | case I40E_PHY_TYPE_XLAUI: |
403 | case I40E_PHY_TYPE_XLPPI: | |
180204c7 | 404 | case I40E_PHY_TYPE_40GBASE_AOC: |
e827845c CS |
405 | ecmd->supported = SUPPORTED_40000baseCR4_Full; |
406 | break; | |
c7d05ca8 JB |
407 | case I40E_PHY_TYPE_40GBASE_SR4: |
408 | ecmd->supported = SUPPORTED_40000baseSR4_Full; | |
c7d05ca8 JB |
409 | break; |
410 | case I40E_PHY_TYPE_40GBASE_LR4: | |
411 | ecmd->supported = SUPPORTED_40000baseLR4_Full; | |
c7d05ca8 | 412 | break; |
4e91bcd5 JB |
413 | case I40E_PHY_TYPE_10GBASE_SR: |
414 | case I40E_PHY_TYPE_10GBASE_LR: | |
124ed15b CS |
415 | case I40E_PHY_TYPE_1000BASE_SX: |
416 | case I40E_PHY_TYPE_1000BASE_LX: | |
0a862b43 CS |
417 | ecmd->supported = SUPPORTED_10000baseT_Full; |
418 | if (hw_link_info->module_type[2] & | |
419 | I40E_MODULE_TYPE_1000BASE_SX || | |
420 | hw_link_info->module_type[2] & | |
421 | I40E_MODULE_TYPE_1000BASE_LX) { | |
422 | ecmd->supported |= SUPPORTED_1000baseT_Full; | |
423 | if (hw_link_info->requested_speeds & | |
424 | I40E_LINK_SPEED_1GB) | |
425 | ecmd->advertising |= ADVERTISED_1000baseT_Full; | |
426 | } | |
e827845c CS |
427 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) |
428 | ecmd->advertising |= ADVERTISED_10000baseT_Full; | |
e827845c | 429 | break; |
4e91bcd5 | 430 | case I40E_PHY_TYPE_10GBASE_T: |
e827845c | 431 | case I40E_PHY_TYPE_1000BASE_T: |
06566e5d | 432 | case I40E_PHY_TYPE_100BASE_TX: |
4e91bcd5 | 433 | ecmd->supported = SUPPORTED_Autoneg | |
5960d33f | 434 | SUPPORTED_10000baseT_Full | |
06566e5d CS |
435 | SUPPORTED_1000baseT_Full | |
436 | SUPPORTED_100baseT_Full; | |
e827845c CS |
437 | ecmd->advertising = ADVERTISED_Autoneg; |
438 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB) | |
439 | ecmd->advertising |= ADVERTISED_10000baseT_Full; | |
440 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) | |
441 | ecmd->advertising |= ADVERTISED_1000baseT_Full; | |
06566e5d CS |
442 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB) |
443 | ecmd->advertising |= ADVERTISED_100baseT_Full; | |
3b6c2179 | 444 | break; |
48becae6 CS |
445 | case I40E_PHY_TYPE_1000BASE_T_OPTICAL: |
446 | ecmd->supported = SUPPORTED_Autoneg | | |
447 | SUPPORTED_1000baseT_Full; | |
448 | ecmd->advertising = ADVERTISED_Autoneg | | |
449 | ADVERTISED_1000baseT_Full; | |
450 | break; | |
e827845c CS |
451 | case I40E_PHY_TYPE_10GBASE_CR1_CU: |
452 | case I40E_PHY_TYPE_10GBASE_CR1: | |
453 | ecmd->supported = SUPPORTED_Autoneg | | |
454 | SUPPORTED_10000baseT_Full; | |
4e91bcd5 | 455 | ecmd->advertising = ADVERTISED_Autoneg | |
e827845c | 456 | ADVERTISED_10000baseT_Full; |
4e91bcd5 JB |
457 | break; |
458 | case I40E_PHY_TYPE_XAUI: | |
459 | case I40E_PHY_TYPE_XFI: | |
460 | case I40E_PHY_TYPE_SFI: | |
461 | case I40E_PHY_TYPE_10GBASE_SFPP_CU: | |
180204c7 | 462 | case I40E_PHY_TYPE_10GBASE_AOC: |
4e91bcd5 | 463 | ecmd->supported = SUPPORTED_10000baseT_Full; |
9169827b | 464 | ecmd->advertising = SUPPORTED_10000baseT_Full; |
4e91bcd5 | 465 | break; |
4e91bcd5 JB |
466 | case I40E_PHY_TYPE_SGMII: |
467 | ecmd->supported = SUPPORTED_Autoneg | | |
3b6c2179 | 468 | SUPPORTED_1000baseT_Full; |
e827845c CS |
469 | if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB) |
470 | ecmd->advertising |= ADVERTISED_1000baseT_Full; | |
48b1804e | 471 | if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) { |
3b6c2179 CS |
472 | ecmd->supported |= SUPPORTED_100baseT_Full; |
473 | if (hw_link_info->requested_speeds & | |
474 | I40E_LINK_SPEED_100MB) | |
475 | ecmd->advertising |= ADVERTISED_100baseT_Full; | |
476 | } | |
4e91bcd5 | 477 | break; |
fc72dbce CS |
478 | case I40E_PHY_TYPE_40GBASE_KR4: |
479 | case I40E_PHY_TYPE_20GBASE_KR2: | |
480 | case I40E_PHY_TYPE_10GBASE_KR: | |
481 | case I40E_PHY_TYPE_10GBASE_KX4: | |
482 | case I40E_PHY_TYPE_1000BASE_KX: | |
06566e5d CS |
483 | ecmd->supported |= SUPPORTED_40000baseKR4_Full | |
484 | SUPPORTED_20000baseKR2_Full | | |
485 | SUPPORTED_10000baseKR_Full | | |
486 | SUPPORTED_10000baseKX4_Full | | |
487 | SUPPORTED_1000baseKX_Full | | |
488 | SUPPORTED_Autoneg; | |
489 | ecmd->advertising |= ADVERTISED_40000baseKR4_Full | | |
490 | ADVERTISED_20000baseKR2_Full | | |
491 | ADVERTISED_10000baseKR_Full | | |
492 | ADVERTISED_10000baseKX4_Full | | |
493 | ADVERTISED_1000baseKX_Full | | |
494 | ADVERTISED_Autoneg; | |
fc72dbce | 495 | break; |
4e91bcd5 JB |
496 | default: |
497 | /* if we got here and link is up something bad is afoot */ | |
124ed15b CS |
498 | netdev_info(netdev, "WARNING: Link is up but PHY type 0x%x is not recognized.\n", |
499 | hw_link_info->phy_type); | |
c7d05ca8 JB |
500 | } |
501 | ||
06566e5d CS |
502 | /* Now that we've worked out everything that could be supported by the |
503 | * current PHY type, get what is supported by the NVM and them to | |
504 | * get what is truly supported | |
505 | */ | |
506 | i40e_phy_type_to_ethtool(pf, &e_supported, | |
507 | &e_advertising); | |
508 | ||
509 | ecmd->supported = ecmd->supported & e_supported; | |
510 | ecmd->advertising = ecmd->advertising & e_advertising; | |
511 | ||
e827845c CS |
512 | /* Set speed and duplex */ |
513 | switch (link_speed) { | |
514 | case I40E_LINK_SPEED_40GB: | |
edf5cffd | 515 | ethtool_cmd_speed_set(ecmd, SPEED_40000); |
e827845c | 516 | break; |
ae24b409 JB |
517 | case I40E_LINK_SPEED_20GB: |
518 | ethtool_cmd_speed_set(ecmd, SPEED_20000); | |
519 | break; | |
e827845c CS |
520 | case I40E_LINK_SPEED_10GB: |
521 | ethtool_cmd_speed_set(ecmd, SPEED_10000); | |
522 | break; | |
523 | case I40E_LINK_SPEED_1GB: | |
524 | ethtool_cmd_speed_set(ecmd, SPEED_1000); | |
525 | break; | |
526 | case I40E_LINK_SPEED_100MB: | |
527 | ethtool_cmd_speed_set(ecmd, SPEED_100); | |
528 | break; | |
529 | default: | |
530 | break; | |
531 | } | |
532 | ecmd->duplex = DUPLEX_FULL; | |
533 | } | |
534 | ||
535 | /** | |
536 | * i40e_get_settings_link_down - Get the Link settings for when link is down | |
537 | * @hw: hw structure | |
538 | * @ecmd: ethtool command to fill in | |
539 | * | |
540 | * Reports link settings that can be determined when link is down | |
541 | **/ | |
542 | static void i40e_get_settings_link_down(struct i40e_hw *hw, | |
3b6c2179 CS |
543 | struct ethtool_cmd *ecmd, |
544 | struct i40e_pf *pf) | |
e827845c | 545 | { |
e827845c | 546 | /* link is down and the driver needs to fall back on |
fc72dbce | 547 | * supported phy types to figure out what info to display |
e827845c | 548 | */ |
06566e5d CS |
549 | i40e_phy_type_to_ethtool(pf, &ecmd->supported, |
550 | &ecmd->advertising); | |
e827845c CS |
551 | |
552 | /* With no link speed and duplex are unknown */ | |
553 | ethtool_cmd_speed_set(ecmd, SPEED_UNKNOWN); | |
554 | ecmd->duplex = DUPLEX_UNKNOWN; | |
555 | } | |
556 | ||
557 | /** | |
558 | * i40e_get_settings - Get Link Speed and Duplex settings | |
559 | * @netdev: network interface device structure | |
560 | * @ecmd: ethtool command | |
561 | * | |
562 | * Reports speed/duplex settings based on media_type | |
563 | **/ | |
564 | static int i40e_get_settings(struct net_device *netdev, | |
565 | struct ethtool_cmd *ecmd) | |
566 | { | |
567 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
568 | struct i40e_pf *pf = np->vsi->back; | |
569 | struct i40e_hw *hw = &pf->hw; | |
570 | struct i40e_link_status *hw_link_info = &hw->phy.link_info; | |
571 | bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; | |
572 | ||
573 | if (link_up) | |
3b6c2179 | 574 | i40e_get_settings_link_up(hw, ecmd, netdev, pf); |
e827845c | 575 | else |
3b6c2179 | 576 | i40e_get_settings_link_down(hw, ecmd, pf); |
e827845c CS |
577 | |
578 | /* Now set the settings that don't rely on link being up/down */ | |
e827845c | 579 | /* Set autoneg settings */ |
c9a3d471 JB |
580 | ecmd->autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? |
581 | AUTONEG_ENABLE : AUTONEG_DISABLE); | |
c7d05ca8 | 582 | |
c9a3d471 JB |
583 | switch (hw->phy.media_type) { |
584 | case I40E_MEDIA_TYPE_BACKPLANE: | |
4e91bcd5 JB |
585 | ecmd->supported |= SUPPORTED_Autoneg | |
586 | SUPPORTED_Backplane; | |
587 | ecmd->advertising |= ADVERTISED_Autoneg | | |
588 | ADVERTISED_Backplane; | |
c7d05ca8 | 589 | ecmd->port = PORT_NONE; |
c9a3d471 JB |
590 | break; |
591 | case I40E_MEDIA_TYPE_BASET: | |
c7d05ca8 JB |
592 | ecmd->supported |= SUPPORTED_TP; |
593 | ecmd->advertising |= ADVERTISED_TP; | |
594 | ecmd->port = PORT_TP; | |
c9a3d471 JB |
595 | break; |
596 | case I40E_MEDIA_TYPE_DA: | |
597 | case I40E_MEDIA_TYPE_CX4: | |
be405eb0 JB |
598 | ecmd->supported |= SUPPORTED_FIBRE; |
599 | ecmd->advertising |= ADVERTISED_FIBRE; | |
600 | ecmd->port = PORT_DA; | |
c9a3d471 JB |
601 | break; |
602 | case I40E_MEDIA_TYPE_FIBER: | |
c7d05ca8 | 603 | ecmd->supported |= SUPPORTED_FIBRE; |
c7d05ca8 | 604 | ecmd->port = PORT_FIBRE; |
c9a3d471 JB |
605 | break; |
606 | case I40E_MEDIA_TYPE_UNKNOWN: | |
607 | default: | |
608 | ecmd->port = PORT_OTHER; | |
609 | break; | |
c7d05ca8 JB |
610 | } |
611 | ||
e827845c | 612 | /* Set transceiver */ |
c7d05ca8 JB |
613 | ecmd->transceiver = XCVR_EXTERNAL; |
614 | ||
e827845c | 615 | /* Set flow control settings */ |
4e91bcd5 JB |
616 | ecmd->supported |= SUPPORTED_Pause; |
617 | ||
e827845c | 618 | switch (hw->fc.requested_mode) { |
4e91bcd5 JB |
619 | case I40E_FC_FULL: |
620 | ecmd->advertising |= ADVERTISED_Pause; | |
621 | break; | |
622 | case I40E_FC_TX_PAUSE: | |
623 | ecmd->advertising |= ADVERTISED_Asym_Pause; | |
624 | break; | |
625 | case I40E_FC_RX_PAUSE: | |
626 | ecmd->advertising |= (ADVERTISED_Pause | | |
627 | ADVERTISED_Asym_Pause); | |
628 | break; | |
629 | default: | |
630 | ecmd->advertising &= ~(ADVERTISED_Pause | | |
631 | ADVERTISED_Asym_Pause); | |
632 | break; | |
633 | } | |
634 | ||
c7d05ca8 JB |
635 | return 0; |
636 | } | |
637 | ||
bf9c7141 CS |
638 | /** |
639 | * i40e_set_settings - Set Speed and Duplex | |
640 | * @netdev: network interface device structure | |
641 | * @ecmd: ethtool command | |
642 | * | |
643 | * Set speed/duplex per media_types advertised/forced | |
644 | **/ | |
645 | static int i40e_set_settings(struct net_device *netdev, | |
646 | struct ethtool_cmd *ecmd) | |
647 | { | |
648 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
649 | struct i40e_aq_get_phy_abilities_resp abilities; | |
650 | struct i40e_aq_set_phy_config config; | |
651 | struct i40e_pf *pf = np->vsi->back; | |
652 | struct i40e_vsi *vsi = np->vsi; | |
653 | struct i40e_hw *hw = &pf->hw; | |
654 | struct ethtool_cmd safe_ecmd; | |
655 | i40e_status status = 0; | |
656 | bool change = false; | |
657 | int err = 0; | |
658 | u8 autoneg; | |
659 | u32 advertise; | |
660 | ||
f0d8c733 SN |
661 | /* Changing port settings is not supported if this isn't the |
662 | * port's controlling PF | |
663 | */ | |
664 | if (hw->partition_id != 1) { | |
665 | i40e_partition_setting_complaint(pf); | |
666 | return -EOPNOTSUPP; | |
667 | } | |
668 | ||
bf9c7141 CS |
669 | if (vsi != pf->vsi[pf->lan_vsi]) |
670 | return -EOPNOTSUPP; | |
671 | ||
672 | if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET && | |
673 | hw->phy.media_type != I40E_MEDIA_TYPE_FIBER && | |
c57e9f17 | 674 | hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE && |
6536227d | 675 | hw->phy.media_type != I40E_MEDIA_TYPE_DA && |
c57e9f17 | 676 | hw->phy.link_info.link_info & I40E_AQ_LINK_UP) |
bf9c7141 CS |
677 | return -EOPNOTSUPP; |
678 | ||
fc72dbce CS |
679 | if (hw->device_id == I40E_DEV_ID_KX_B || |
680 | hw->device_id == I40E_DEV_ID_KX_C || | |
681 | hw->device_id == I40E_DEV_ID_20G_KR2 || | |
682 | hw->device_id == I40E_DEV_ID_20G_KR2_A) { | |
683 | netdev_info(netdev, "Changing settings is not supported on backplane.\n"); | |
684 | return -EOPNOTSUPP; | |
685 | } | |
686 | ||
bf9c7141 CS |
687 | /* get our own copy of the bits to check against */ |
688 | memset(&safe_ecmd, 0, sizeof(struct ethtool_cmd)); | |
689 | i40e_get_settings(netdev, &safe_ecmd); | |
690 | ||
691 | /* save autoneg and speed out of ecmd */ | |
692 | autoneg = ecmd->autoneg; | |
693 | advertise = ecmd->advertising; | |
694 | ||
695 | /* set autoneg and speed back to what they currently are */ | |
696 | ecmd->autoneg = safe_ecmd.autoneg; | |
697 | ecmd->advertising = safe_ecmd.advertising; | |
698 | ||
699 | ecmd->cmd = safe_ecmd.cmd; | |
700 | /* If ecmd and safe_ecmd are not the same now, then they are | |
701 | * trying to set something that we do not support | |
702 | */ | |
703 | if (memcmp(ecmd, &safe_ecmd, sizeof(struct ethtool_cmd))) | |
704 | return -EOPNOTSUPP; | |
705 | ||
706 | while (test_bit(__I40E_CONFIG_BUSY, &vsi->state)) | |
707 | usleep_range(1000, 2000); | |
708 | ||
709 | /* Get the current phy config */ | |
710 | status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, | |
711 | NULL); | |
712 | if (status) | |
713 | return -EAGAIN; | |
714 | ||
124ed15b | 715 | /* Copy abilities to config in case autoneg is not |
bf9c7141 CS |
716 | * set below |
717 | */ | |
718 | memset(&config, 0, sizeof(struct i40e_aq_set_phy_config)); | |
bf9c7141 CS |
719 | config.abilities = abilities.abilities; |
720 | ||
721 | /* Check autoneg */ | |
722 | if (autoneg == AUTONEG_ENABLE) { | |
bf9c7141 CS |
723 | /* If autoneg was not already enabled */ |
724 | if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) { | |
3ce12ee9 CS |
725 | /* If autoneg is not supported, return error */ |
726 | if (!(safe_ecmd.supported & SUPPORTED_Autoneg)) { | |
727 | netdev_info(netdev, "Autoneg not supported on this phy\n"); | |
728 | return -EINVAL; | |
729 | } | |
730 | /* Autoneg is allowed to change */ | |
bf9c7141 CS |
731 | config.abilities = abilities.abilities | |
732 | I40E_AQ_PHY_ENABLE_AN; | |
733 | change = true; | |
734 | } | |
735 | } else { | |
bf9c7141 CS |
736 | /* If autoneg is currently enabled */ |
737 | if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) { | |
3ce12ee9 CS |
738 | /* If autoneg is supported 10GBASE_T is the only PHY |
739 | * that can disable it, so otherwise return error | |
740 | */ | |
741 | if (safe_ecmd.supported & SUPPORTED_Autoneg && | |
742 | hw->phy.link_info.phy_type != | |
743 | I40E_PHY_TYPE_10GBASE_T) { | |
744 | netdev_info(netdev, "Autoneg cannot be disabled on this phy\n"); | |
745 | return -EINVAL; | |
746 | } | |
747 | /* Autoneg is allowed to change */ | |
5960d33f | 748 | config.abilities = abilities.abilities & |
bf9c7141 CS |
749 | ~I40E_AQ_PHY_ENABLE_AN; |
750 | change = true; | |
751 | } | |
752 | } | |
753 | ||
754 | if (advertise & ~safe_ecmd.supported) | |
755 | return -EINVAL; | |
756 | ||
757 | if (advertise & ADVERTISED_100baseT_Full) | |
124ed15b | 758 | config.link_speed |= I40E_LINK_SPEED_100MB; |
bf9c7141 CS |
759 | if (advertise & ADVERTISED_1000baseT_Full || |
760 | advertise & ADVERTISED_1000baseKX_Full) | |
124ed15b | 761 | config.link_speed |= I40E_LINK_SPEED_1GB; |
bf9c7141 CS |
762 | if (advertise & ADVERTISED_10000baseT_Full || |
763 | advertise & ADVERTISED_10000baseKX4_Full || | |
764 | advertise & ADVERTISED_10000baseKR_Full) | |
124ed15b | 765 | config.link_speed |= I40E_LINK_SPEED_10GB; |
ae24b409 JB |
766 | if (advertise & ADVERTISED_20000baseKR2_Full) |
767 | config.link_speed |= I40E_LINK_SPEED_20GB; | |
bf9c7141 CS |
768 | if (advertise & ADVERTISED_40000baseKR4_Full || |
769 | advertise & ADVERTISED_40000baseCR4_Full || | |
770 | advertise & ADVERTISED_40000baseSR4_Full || | |
771 | advertise & ADVERTISED_40000baseLR4_Full) | |
124ed15b | 772 | config.link_speed |= I40E_LINK_SPEED_40GB; |
bf9c7141 | 773 | |
0002e118 CS |
774 | /* If speed didn't get set, set it to what it currently is. |
775 | * This is needed because if advertise is 0 (as it is when autoneg | |
776 | * is disabled) then speed won't get set. | |
777 | */ | |
778 | if (!config.link_speed) | |
779 | config.link_speed = abilities.link_speed; | |
780 | ||
124ed15b | 781 | if (change || (abilities.link_speed != config.link_speed)) { |
bf9c7141 CS |
782 | /* copy over the rest of the abilities */ |
783 | config.phy_type = abilities.phy_type; | |
784 | config.eee_capability = abilities.eee_capability; | |
785 | config.eeer = abilities.eeer_val; | |
786 | config.low_power_ctrl = abilities.d3_lpan; | |
787 | ||
e827845c CS |
788 | /* save the requested speeds */ |
789 | hw->phy.link_info.requested_speeds = config.link_speed; | |
94128516 CS |
790 | /* set link and auto negotiation so changes take effect */ |
791 | config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK; | |
792 | /* If link is up put link down */ | |
793 | if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) { | |
794 | /* Tell the OS link is going down, the link will go | |
795 | * back up when fw says it is ready asynchronously | |
796 | */ | |
c156f856 | 797 | i40e_print_link_message(vsi, false); |
94128516 CS |
798 | netif_carrier_off(netdev); |
799 | netif_tx_stop_all_queues(netdev); | |
800 | } | |
bf9c7141 CS |
801 | |
802 | /* make the aq call */ | |
803 | status = i40e_aq_set_phy_config(hw, &config, NULL); | |
804 | if (status) { | |
f1c7e72e SN |
805 | netdev_info(netdev, "Set phy config failed, err %s aq_err %s\n", |
806 | i40e_stat_str(hw, status), | |
807 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
bf9c7141 CS |
808 | return -EAGAIN; |
809 | } | |
810 | ||
0a862b43 | 811 | status = i40e_update_link_info(hw); |
bf9c7141 | 812 | if (status) |
52e9689e CS |
813 | netdev_dbg(netdev, "Updating link info failed with err %s aq_err %s\n", |
814 | i40e_stat_str(hw, status), | |
815 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
bf9c7141 CS |
816 | |
817 | } else { | |
818 | netdev_info(netdev, "Nothing changed, exiting without setting anything.\n"); | |
819 | } | |
820 | ||
821 | return err; | |
822 | } | |
823 | ||
a6599721 JB |
824 | static int i40e_nway_reset(struct net_device *netdev) |
825 | { | |
826 | /* restart autonegotiation */ | |
827 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
828 | struct i40e_pf *pf = np->vsi->back; | |
829 | struct i40e_hw *hw = &pf->hw; | |
830 | bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP; | |
831 | i40e_status ret = 0; | |
832 | ||
833 | ret = i40e_aq_set_link_restart_an(hw, link_up, NULL); | |
834 | if (ret) { | |
f1c7e72e SN |
835 | netdev_info(netdev, "link restart failed, err %s aq_err %s\n", |
836 | i40e_stat_str(hw, ret), | |
837 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
a6599721 JB |
838 | return -EIO; |
839 | } | |
840 | ||
841 | return 0; | |
842 | } | |
843 | ||
c7d05ca8 JB |
844 | /** |
845 | * i40e_get_pauseparam - Get Flow Control status | |
846 | * Return tx/rx-pause status | |
847 | **/ | |
848 | static void i40e_get_pauseparam(struct net_device *netdev, | |
849 | struct ethtool_pauseparam *pause) | |
850 | { | |
851 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
852 | struct i40e_pf *pf = np->vsi->back; | |
853 | struct i40e_hw *hw = &pf->hw; | |
854 | struct i40e_link_status *hw_link_info = &hw->phy.link_info; | |
4b7698cb | 855 | struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; |
c7d05ca8 JB |
856 | |
857 | pause->autoneg = | |
858 | ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? | |
859 | AUTONEG_ENABLE : AUTONEG_DISABLE); | |
860 | ||
4b7698cb NP |
861 | /* PFC enabled so report LFC as off */ |
862 | if (dcbx_cfg->pfc.pfcenable) { | |
863 | pause->rx_pause = 0; | |
864 | pause->tx_pause = 0; | |
865 | return; | |
866 | } | |
867 | ||
d52c20b7 | 868 | if (hw->fc.current_mode == I40E_FC_RX_PAUSE) { |
c7d05ca8 | 869 | pause->rx_pause = 1; |
d52c20b7 | 870 | } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) { |
c7d05ca8 | 871 | pause->tx_pause = 1; |
d52c20b7 JB |
872 | } else if (hw->fc.current_mode == I40E_FC_FULL) { |
873 | pause->rx_pause = 1; | |
874 | pause->tx_pause = 1; | |
875 | } | |
c7d05ca8 JB |
876 | } |
877 | ||
2becc35a CS |
878 | /** |
879 | * i40e_set_pauseparam - Set Flow Control parameter | |
880 | * @netdev: network interface device structure | |
881 | * @pause: return tx/rx flow control status | |
882 | **/ | |
883 | static int i40e_set_pauseparam(struct net_device *netdev, | |
884 | struct ethtool_pauseparam *pause) | |
885 | { | |
886 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
887 | struct i40e_pf *pf = np->vsi->back; | |
888 | struct i40e_vsi *vsi = np->vsi; | |
889 | struct i40e_hw *hw = &pf->hw; | |
890 | struct i40e_link_status *hw_link_info = &hw->phy.link_info; | |
4b7698cb | 891 | struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config; |
2becc35a CS |
892 | bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP; |
893 | i40e_status status; | |
894 | u8 aq_failures; | |
7d62dac6 | 895 | int err = 0; |
2becc35a | 896 | |
f0d8c733 SN |
897 | /* Changing the port's flow control is not supported if this isn't the |
898 | * port's controlling PF | |
899 | */ | |
900 | if (hw->partition_id != 1) { | |
901 | i40e_partition_setting_complaint(pf); | |
902 | return -EOPNOTSUPP; | |
903 | } | |
904 | ||
2becc35a CS |
905 | if (vsi != pf->vsi[pf->lan_vsi]) |
906 | return -EOPNOTSUPP; | |
907 | ||
908 | if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ? | |
909 | AUTONEG_ENABLE : AUTONEG_DISABLE)) { | |
910 | netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n"); | |
911 | return -EOPNOTSUPP; | |
912 | } | |
913 | ||
914 | /* If we have link and don't have autoneg */ | |
915 | if (!test_bit(__I40E_DOWN, &pf->state) && | |
916 | !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) { | |
917 | /* Send message that it might not necessarily work*/ | |
918 | netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n"); | |
919 | } | |
920 | ||
4b7698cb NP |
921 | if (dcbx_cfg->pfc.pfcenable) { |
922 | netdev_info(netdev, | |
923 | "Priority flow control enabled. Cannot set link flow control.\n"); | |
2becc35a CS |
924 | return -EOPNOTSUPP; |
925 | } | |
926 | ||
927 | if (pause->rx_pause && pause->tx_pause) | |
928 | hw->fc.requested_mode = I40E_FC_FULL; | |
929 | else if (pause->rx_pause && !pause->tx_pause) | |
930 | hw->fc.requested_mode = I40E_FC_RX_PAUSE; | |
931 | else if (!pause->rx_pause && pause->tx_pause) | |
932 | hw->fc.requested_mode = I40E_FC_TX_PAUSE; | |
933 | else if (!pause->rx_pause && !pause->tx_pause) | |
934 | hw->fc.requested_mode = I40E_FC_NONE; | |
935 | else | |
936 | return -EINVAL; | |
937 | ||
94128516 CS |
938 | /* Tell the OS link is going down, the link will go back up when fw |
939 | * says it is ready asynchronously | |
940 | */ | |
c156f856 | 941 | i40e_print_link_message(vsi, false); |
94128516 CS |
942 | netif_carrier_off(netdev); |
943 | netif_tx_stop_all_queues(netdev); | |
944 | ||
2becc35a CS |
945 | /* Set the fc mode and only restart an if link is up*/ |
946 | status = i40e_set_fc(hw, &aq_failures, link_up); | |
947 | ||
948 | if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) { | |
f1c7e72e SN |
949 | netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n", |
950 | i40e_stat_str(hw, status), | |
951 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
2becc35a CS |
952 | err = -EAGAIN; |
953 | } | |
954 | if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) { | |
f1c7e72e SN |
955 | netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n", |
956 | i40e_stat_str(hw, status), | |
957 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
2becc35a CS |
958 | err = -EAGAIN; |
959 | } | |
960 | if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) { | |
f1c7e72e SN |
961 | netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n", |
962 | i40e_stat_str(hw, status), | |
963 | i40e_aq_str(hw, hw->aq.asq_last_status)); | |
2becc35a CS |
964 | err = -EAGAIN; |
965 | } | |
966 | ||
7d62dac6 CS |
967 | if (!test_bit(__I40E_DOWN, &pf->state)) { |
968 | /* Give it a little more time to try to come back */ | |
969 | msleep(75); | |
970 | if (!test_bit(__I40E_DOWN, &pf->state)) | |
971 | return i40e_nway_reset(netdev); | |
972 | } | |
2becc35a CS |
973 | |
974 | return err; | |
975 | } | |
976 | ||
c7d05ca8 JB |
977 | static u32 i40e_get_msglevel(struct net_device *netdev) |
978 | { | |
979 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
980 | struct i40e_pf *pf = np->vsi->back; | |
981 | ||
982 | return pf->msg_enable; | |
983 | } | |
984 | ||
985 | static void i40e_set_msglevel(struct net_device *netdev, u32 data) | |
986 | { | |
987 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
988 | struct i40e_pf *pf = np->vsi->back; | |
989 | ||
990 | if (I40E_DEBUG_USER & data) | |
991 | pf->hw.debug_mask = data; | |
992 | pf->msg_enable = data; | |
993 | } | |
994 | ||
995 | static int i40e_get_regs_len(struct net_device *netdev) | |
996 | { | |
997 | int reg_count = 0; | |
998 | int i; | |
999 | ||
1000 | for (i = 0; i40e_reg_list[i].offset != 0; i++) | |
1001 | reg_count += i40e_reg_list[i].elements; | |
1002 | ||
1003 | return reg_count * sizeof(u32); | |
1004 | } | |
1005 | ||
1006 | static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs, | |
1007 | void *p) | |
1008 | { | |
1009 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1010 | struct i40e_pf *pf = np->vsi->back; | |
1011 | struct i40e_hw *hw = &pf->hw; | |
1012 | u32 *reg_buf = p; | |
1013 | int i, j, ri; | |
1014 | u32 reg; | |
1015 | ||
1016 | /* Tell ethtool which driver-version-specific regs output we have. | |
1017 | * | |
1018 | * At some point, if we have ethtool doing special formatting of | |
1019 | * this data, it will rely on this version number to know how to | |
1020 | * interpret things. Hence, this needs to be updated if/when the | |
1021 | * diags register table is changed. | |
1022 | */ | |
1023 | regs->version = 1; | |
1024 | ||
1025 | /* loop through the diags reg table for what to print */ | |
1026 | ri = 0; | |
1027 | for (i = 0; i40e_reg_list[i].offset != 0; i++) { | |
1028 | for (j = 0; j < i40e_reg_list[i].elements; j++) { | |
1029 | reg = i40e_reg_list[i].offset | |
1030 | + (j * i40e_reg_list[i].stride); | |
1031 | reg_buf[ri++] = rd32(hw, reg); | |
1032 | } | |
1033 | } | |
1034 | ||
1035 | } | |
1036 | ||
1037 | static int i40e_get_eeprom(struct net_device *netdev, | |
1038 | struct ethtool_eeprom *eeprom, u8 *bytes) | |
1039 | { | |
1040 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1041 | struct i40e_hw *hw = &np->vsi->back->hw; | |
e5e0a5db | 1042 | struct i40e_pf *pf = np->vsi->back; |
c150a502 | 1043 | int ret_val = 0, len, offset; |
e5e0a5db ASJ |
1044 | u8 *eeprom_buff; |
1045 | u16 i, sectors; | |
1046 | bool last; | |
cd552cb4 SN |
1047 | u32 magic; |
1048 | ||
e5e0a5db | 1049 | #define I40E_NVM_SECTOR_SIZE 4096 |
c7d05ca8 JB |
1050 | if (eeprom->len == 0) |
1051 | return -EINVAL; | |
1052 | ||
cd552cb4 SN |
1053 | /* check for NVMUpdate access method */ |
1054 | magic = hw->vendor_id | (hw->device_id << 16); | |
1055 | if (eeprom->magic && eeprom->magic != magic) { | |
6e93d0c9 SN |
1056 | struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; |
1057 | int errno = 0; | |
cd552cb4 SN |
1058 | |
1059 | /* make sure it is the right magic for NVMUpdate */ | |
1060 | if ((eeprom->magic >> 16) != hw->device_id) | |
6e93d0c9 SN |
1061 | errno = -EINVAL; |
1062 | else if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) || | |
1063 | test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) | |
1064 | errno = -EBUSY; | |
1065 | else | |
1066 | ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); | |
1067 | ||
1068 | if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) | |
cd552cb4 | 1069 | dev_info(&pf->pdev->dev, |
c150a502 SN |
1070 | "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", |
1071 | ret_val, hw->aq.asq_last_status, errno, | |
1072 | (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), | |
1073 | cmd->offset, cmd->data_size); | |
cd552cb4 SN |
1074 | |
1075 | return errno; | |
1076 | } | |
1077 | ||
1078 | /* normal ethtool get_eeprom support */ | |
c7d05ca8 JB |
1079 | eeprom->magic = hw->vendor_id | (hw->device_id << 16); |
1080 | ||
e5e0a5db | 1081 | eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL); |
c7d05ca8 JB |
1082 | if (!eeprom_buff) |
1083 | return -ENOMEM; | |
1084 | ||
e5e0a5db ASJ |
1085 | ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ); |
1086 | if (ret_val) { | |
1087 | dev_info(&pf->pdev->dev, | |
1088 | "Failed Acquiring NVM resource for read err=%d status=0x%x\n", | |
1089 | ret_val, hw->aq.asq_last_status); | |
1090 | goto free_buff; | |
c7d05ca8 JB |
1091 | } |
1092 | ||
e5e0a5db ASJ |
1093 | sectors = eeprom->len / I40E_NVM_SECTOR_SIZE; |
1094 | sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0; | |
1095 | len = I40E_NVM_SECTOR_SIZE; | |
1096 | last = false; | |
1097 | for (i = 0; i < sectors; i++) { | |
1098 | if (i == (sectors - 1)) { | |
1099 | len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i); | |
1100 | last = true; | |
1101 | } | |
c150a502 SN |
1102 | offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i), |
1103 | ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len, | |
cd552cb4 | 1104 | (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i), |
e5e0a5db | 1105 | last, NULL); |
c150a502 | 1106 | if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) { |
e5e0a5db | 1107 | dev_info(&pf->pdev->dev, |
c150a502 SN |
1108 | "read NVM failed, invalid offset 0x%x\n", |
1109 | offset); | |
1110 | break; | |
1111 | } else if (ret_val && | |
1112 | hw->aq.asq_last_status == I40E_AQ_RC_EACCES) { | |
1113 | dev_info(&pf->pdev->dev, | |
1114 | "read NVM failed, access, offset 0x%x\n", | |
1115 | offset); | |
1116 | break; | |
1117 | } else if (ret_val) { | |
1118 | dev_info(&pf->pdev->dev, | |
1119 | "read NVM failed offset %d err=%d status=0x%x\n", | |
1120 | offset, ret_val, hw->aq.asq_last_status); | |
1121 | break; | |
e5e0a5db ASJ |
1122 | } |
1123 | } | |
c7d05ca8 | 1124 | |
e5e0a5db | 1125 | i40e_release_nvm(hw); |
cd552cb4 | 1126 | memcpy(bytes, (u8 *)eeprom_buff, eeprom->len); |
e5e0a5db | 1127 | free_buff: |
c7d05ca8 | 1128 | kfree(eeprom_buff); |
c7d05ca8 JB |
1129 | return ret_val; |
1130 | } | |
1131 | ||
1132 | static int i40e_get_eeprom_len(struct net_device *netdev) | |
1133 | { | |
1134 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1135 | struct i40e_hw *hw = &np->vsi->back->hw; | |
e5e0a5db ASJ |
1136 | u32 val; |
1137 | ||
1138 | val = (rd32(hw, I40E_GLPCI_LBARCTRL) | |
1139 | & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK) | |
1140 | >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT; | |
1141 | /* register returns value in power of 2, 64Kbyte chunks. */ | |
41a1d04b | 1142 | val = (64 * 1024) * BIT(val); |
e5e0a5db | 1143 | return val; |
c7d05ca8 JB |
1144 | } |
1145 | ||
cd552cb4 SN |
1146 | static int i40e_set_eeprom(struct net_device *netdev, |
1147 | struct ethtool_eeprom *eeprom, u8 *bytes) | |
1148 | { | |
1149 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1150 | struct i40e_hw *hw = &np->vsi->back->hw; | |
1151 | struct i40e_pf *pf = np->vsi->back; | |
6e93d0c9 | 1152 | struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom; |
cd552cb4 | 1153 | int ret_val = 0; |
6e93d0c9 | 1154 | int errno = 0; |
cd552cb4 SN |
1155 | u32 magic; |
1156 | ||
1157 | /* normal ethtool set_eeprom is not supported */ | |
1158 | magic = hw->vendor_id | (hw->device_id << 16); | |
1159 | if (eeprom->magic == magic) | |
6e93d0c9 | 1160 | errno = -EOPNOTSUPP; |
cd552cb4 | 1161 | /* check for NVMUpdate access method */ |
6e93d0c9 SN |
1162 | else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id) |
1163 | errno = -EINVAL; | |
1164 | else if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) || | |
1165 | test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) | |
1166 | errno = -EBUSY; | |
1167 | else | |
1168 | ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno); | |
cd552cb4 | 1169 | |
6e93d0c9 | 1170 | if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM)) |
cd552cb4 | 1171 | dev_info(&pf->pdev->dev, |
c150a502 SN |
1172 | "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n", |
1173 | ret_val, hw->aq.asq_last_status, errno, | |
1174 | (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK), | |
1175 | cmd->offset, cmd->data_size); | |
cd552cb4 SN |
1176 | |
1177 | return errno; | |
1178 | } | |
1179 | ||
c7d05ca8 JB |
1180 | static void i40e_get_drvinfo(struct net_device *netdev, |
1181 | struct ethtool_drvinfo *drvinfo) | |
1182 | { | |
1183 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1184 | struct i40e_vsi *vsi = np->vsi; | |
1185 | struct i40e_pf *pf = vsi->back; | |
1186 | ||
1187 | strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver)); | |
1188 | strlcpy(drvinfo->version, i40e_driver_version_str, | |
1189 | sizeof(drvinfo->version)); | |
6dec1017 | 1190 | strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw), |
c7d05ca8 JB |
1191 | sizeof(drvinfo->fw_version)); |
1192 | strlcpy(drvinfo->bus_info, pci_name(pf->pdev), | |
1193 | sizeof(drvinfo->bus_info)); | |
b5569892 ASJ |
1194 | if (pf->hw.pf_id == 0) |
1195 | drvinfo->n_priv_flags = I40E_PRIV_FLAGS_GL_STR_LEN; | |
1196 | else | |
1197 | drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN; | |
c7d05ca8 JB |
1198 | } |
1199 | ||
1200 | static void i40e_get_ringparam(struct net_device *netdev, | |
1201 | struct ethtool_ringparam *ring) | |
1202 | { | |
1203 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1204 | struct i40e_pf *pf = np->vsi->back; | |
1205 | struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi]; | |
1206 | ||
1207 | ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS; | |
1208 | ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS; | |
1209 | ring->rx_mini_max_pending = 0; | |
1210 | ring->rx_jumbo_max_pending = 0; | |
9f65e15b AD |
1211 | ring->rx_pending = vsi->rx_rings[0]->count; |
1212 | ring->tx_pending = vsi->tx_rings[0]->count; | |
c7d05ca8 JB |
1213 | ring->rx_mini_pending = 0; |
1214 | ring->rx_jumbo_pending = 0; | |
1215 | } | |
1216 | ||
1217 | static int i40e_set_ringparam(struct net_device *netdev, | |
1218 | struct ethtool_ringparam *ring) | |
1219 | { | |
1220 | struct i40e_ring *tx_rings = NULL, *rx_rings = NULL; | |
1221 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1222 | struct i40e_vsi *vsi = np->vsi; | |
1223 | struct i40e_pf *pf = vsi->back; | |
1224 | u32 new_rx_count, new_tx_count; | |
1225 | int i, err = 0; | |
1226 | ||
1227 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) | |
1228 | return -EINVAL; | |
1229 | ||
1fa18370 SN |
1230 | if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS || |
1231 | ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS || | |
1232 | ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS || | |
1233 | ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) { | |
1234 | netdev_info(netdev, | |
1235 | "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n", | |
1236 | ring->tx_pending, ring->rx_pending, | |
1237 | I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS); | |
1238 | return -EINVAL; | |
1239 | } | |
1240 | ||
1241 | new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); | |
1242 | new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE); | |
c7d05ca8 JB |
1243 | |
1244 | /* if nothing to do return success */ | |
9f65e15b AD |
1245 | if ((new_tx_count == vsi->tx_rings[0]->count) && |
1246 | (new_rx_count == vsi->rx_rings[0]->count)) | |
c7d05ca8 JB |
1247 | return 0; |
1248 | ||
1249 | while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state)) | |
1250 | usleep_range(1000, 2000); | |
1251 | ||
1252 | if (!netif_running(vsi->netdev)) { | |
1253 | /* simple case - set for the next time the netdev is started */ | |
1254 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b AD |
1255 | vsi->tx_rings[i]->count = new_tx_count; |
1256 | vsi->rx_rings[i]->count = new_rx_count; | |
c7d05ca8 JB |
1257 | } |
1258 | goto done; | |
1259 | } | |
1260 | ||
1261 | /* We can't just free everything and then setup again, | |
1262 | * because the ISRs in MSI-X mode get passed pointers | |
1263 | * to the Tx and Rx ring structs. | |
1264 | */ | |
1265 | ||
1266 | /* alloc updated Tx resources */ | |
9f65e15b | 1267 | if (new_tx_count != vsi->tx_rings[0]->count) { |
c7d05ca8 JB |
1268 | netdev_info(netdev, |
1269 | "Changing Tx descriptor count from %d to %d.\n", | |
9f65e15b | 1270 | vsi->tx_rings[0]->count, new_tx_count); |
c7d05ca8 JB |
1271 | tx_rings = kcalloc(vsi->alloc_queue_pairs, |
1272 | sizeof(struct i40e_ring), GFP_KERNEL); | |
1273 | if (!tx_rings) { | |
1274 | err = -ENOMEM; | |
1275 | goto done; | |
1276 | } | |
1277 | ||
1278 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
1279 | /* clone ring and setup updated count */ | |
9f65e15b | 1280 | tx_rings[i] = *vsi->tx_rings[i]; |
c7d05ca8 | 1281 | tx_rings[i].count = new_tx_count; |
1e8efb42 JB |
1282 | /* the desc and bi pointers will be reallocated in the |
1283 | * setup call | |
1284 | */ | |
1285 | tx_rings[i].desc = NULL; | |
1286 | tx_rings[i].rx_bi = NULL; | |
c7d05ca8 JB |
1287 | err = i40e_setup_tx_descriptors(&tx_rings[i]); |
1288 | if (err) { | |
1289 | while (i) { | |
1290 | i--; | |
1291 | i40e_free_tx_resources(&tx_rings[i]); | |
1292 | } | |
1293 | kfree(tx_rings); | |
1294 | tx_rings = NULL; | |
1295 | ||
1296 | goto done; | |
1297 | } | |
1298 | } | |
1299 | } | |
1300 | ||
1301 | /* alloc updated Rx resources */ | |
9f65e15b | 1302 | if (new_rx_count != vsi->rx_rings[0]->count) { |
c7d05ca8 JB |
1303 | netdev_info(netdev, |
1304 | "Changing Rx descriptor count from %d to %d\n", | |
9f65e15b | 1305 | vsi->rx_rings[0]->count, new_rx_count); |
c7d05ca8 JB |
1306 | rx_rings = kcalloc(vsi->alloc_queue_pairs, |
1307 | sizeof(struct i40e_ring), GFP_KERNEL); | |
1308 | if (!rx_rings) { | |
1309 | err = -ENOMEM; | |
1310 | goto free_tx; | |
1311 | } | |
1312 | ||
1313 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
147e81ec JB |
1314 | /* this is to allow wr32 to have something to write to |
1315 | * during early allocation of Rx buffers | |
1316 | */ | |
1317 | u32 __iomem faketail = 0; | |
1318 | struct i40e_ring *ring; | |
1319 | u16 unused; | |
1320 | ||
c7d05ca8 | 1321 | /* clone ring and setup updated count */ |
9f65e15b | 1322 | rx_rings[i] = *vsi->rx_rings[i]; |
c7d05ca8 | 1323 | rx_rings[i].count = new_rx_count; |
1e8efb42 JB |
1324 | /* the desc and bi pointers will be reallocated in the |
1325 | * setup call | |
1326 | */ | |
1327 | rx_rings[i].desc = NULL; | |
1328 | rx_rings[i].rx_bi = NULL; | |
147e81ec | 1329 | rx_rings[i].tail = (u8 __iomem *)&faketail; |
c7d05ca8 | 1330 | err = i40e_setup_rx_descriptors(&rx_rings[i]); |
147e81ec JB |
1331 | if (err) |
1332 | goto rx_unwind; | |
1333 | ||
1334 | /* now allocate the Rx buffers to make sure the OS | |
1335 | * has enough memory, any failure here means abort | |
1336 | */ | |
1337 | ring = &rx_rings[i]; | |
1338 | unused = I40E_DESC_UNUSED(ring); | |
1339 | err = i40e_alloc_rx_buffers(ring, unused); | |
1340 | rx_unwind: | |
c7d05ca8 | 1341 | if (err) { |
147e81ec | 1342 | do { |
c7d05ca8 | 1343 | i40e_free_rx_resources(&rx_rings[i]); |
147e81ec | 1344 | } while (i--); |
c7d05ca8 JB |
1345 | kfree(rx_rings); |
1346 | rx_rings = NULL; | |
1347 | ||
1348 | goto free_tx; | |
1349 | } | |
1350 | } | |
1351 | } | |
1352 | ||
1353 | /* Bring interface down, copy in the new ring info, | |
1354 | * then restore the interface | |
1355 | */ | |
1356 | i40e_down(vsi); | |
1357 | ||
1358 | if (tx_rings) { | |
1359 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b AD |
1360 | i40e_free_tx_resources(vsi->tx_rings[i]); |
1361 | *vsi->tx_rings[i] = tx_rings[i]; | |
c7d05ca8 JB |
1362 | } |
1363 | kfree(tx_rings); | |
1364 | tx_rings = NULL; | |
1365 | } | |
1366 | ||
1367 | if (rx_rings) { | |
1368 | for (i = 0; i < vsi->num_queue_pairs; i++) { | |
9f65e15b | 1369 | i40e_free_rx_resources(vsi->rx_rings[i]); |
147e81ec JB |
1370 | /* get the real tail offset */ |
1371 | rx_rings[i].tail = vsi->rx_rings[i]->tail; | |
1372 | /* this is to fake out the allocation routine | |
1373 | * into thinking it has to realloc everything | |
1374 | * but the recycling logic will let us re-use | |
1375 | * the buffers allocated above | |
1376 | */ | |
1377 | rx_rings[i].next_to_use = 0; | |
1378 | rx_rings[i].next_to_clean = 0; | |
1379 | rx_rings[i].next_to_alloc = 0; | |
1380 | /* do a struct copy */ | |
9f65e15b | 1381 | *vsi->rx_rings[i] = rx_rings[i]; |
c7d05ca8 JB |
1382 | } |
1383 | kfree(rx_rings); | |
1384 | rx_rings = NULL; | |
1385 | } | |
1386 | ||
1387 | i40e_up(vsi); | |
1388 | ||
1389 | free_tx: | |
1390 | /* error cleanup if the Rx allocations failed after getting Tx */ | |
1391 | if (tx_rings) { | |
1392 | for (i = 0; i < vsi->num_queue_pairs; i++) | |
1393 | i40e_free_tx_resources(&tx_rings[i]); | |
1394 | kfree(tx_rings); | |
1395 | tx_rings = NULL; | |
1396 | } | |
1397 | ||
1398 | done: | |
1399 | clear_bit(__I40E_CONFIG_BUSY, &pf->state); | |
1400 | ||
1401 | return err; | |
1402 | } | |
1403 | ||
1404 | static int i40e_get_sset_count(struct net_device *netdev, int sset) | |
1405 | { | |
1406 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1407 | struct i40e_vsi *vsi = np->vsi; | |
1408 | struct i40e_pf *pf = vsi->back; | |
1409 | ||
1410 | switch (sset) { | |
1411 | case ETH_SS_TEST: | |
1412 | return I40E_TEST_LEN; | |
1413 | case ETH_SS_STATS: | |
58ce5175 | 1414 | if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) { |
8eab9cfd SN |
1415 | int len = I40E_PF_STATS_LEN(netdev); |
1416 | ||
d1a8d275 ASJ |
1417 | if ((pf->lan_veb != I40E_NO_VEB) && |
1418 | (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) | |
fe860afb | 1419 | len += I40E_VEB_STATS_TOTAL; |
8eab9cfd SN |
1420 | return len; |
1421 | } else { | |
c7d05ca8 | 1422 | return I40E_VSI_STATS_LEN(netdev); |
8eab9cfd | 1423 | } |
7e45ab44 | 1424 | case ETH_SS_PRIV_FLAGS: |
b5569892 ASJ |
1425 | if (pf->hw.pf_id == 0) |
1426 | return I40E_PRIV_FLAGS_GL_STR_LEN; | |
1427 | else | |
1428 | return I40E_PRIV_FLAGS_STR_LEN; | |
c7d05ca8 JB |
1429 | default: |
1430 | return -EOPNOTSUPP; | |
1431 | } | |
1432 | } | |
1433 | ||
1434 | static void i40e_get_ethtool_stats(struct net_device *netdev, | |
1435 | struct ethtool_stats *stats, u64 *data) | |
1436 | { | |
1437 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
e7046ee1 | 1438 | struct i40e_ring *tx_ring, *rx_ring; |
c7d05ca8 JB |
1439 | struct i40e_vsi *vsi = np->vsi; |
1440 | struct i40e_pf *pf = vsi->back; | |
1441 | int i = 0; | |
1442 | char *p; | |
1443 | int j; | |
1444 | struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi); | |
980e9b11 | 1445 | unsigned int start; |
c7d05ca8 JB |
1446 | |
1447 | i40e_update_stats(vsi); | |
1448 | ||
1449 | for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) { | |
1450 | p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset; | |
1451 | data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat == | |
1452 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; | |
1453 | } | |
41a9e55c SN |
1454 | for (j = 0; j < I40E_MISC_STATS_LEN; j++) { |
1455 | p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset; | |
1456 | data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat == | |
1457 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; | |
1458 | } | |
38e00438 VD |
1459 | #ifdef I40E_FCOE |
1460 | for (j = 0; j < I40E_FCOE_STATS_LEN; j++) { | |
1461 | p = (char *)vsi + i40e_gstrings_fcoe_stats[j].stat_offset; | |
1462 | data[i++] = (i40e_gstrings_fcoe_stats[j].sizeof_stat == | |
1463 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; | |
1464 | } | |
1465 | #endif | |
980e9b11 | 1466 | rcu_read_lock(); |
99c472a3 | 1467 | for (j = 0; j < vsi->num_queue_pairs; j++) { |
e7046ee1 | 1468 | tx_ring = ACCESS_ONCE(vsi->tx_rings[j]); |
980e9b11 AD |
1469 | |
1470 | if (!tx_ring) | |
1471 | continue; | |
1472 | ||
1473 | /* process Tx ring statistics */ | |
1474 | do { | |
57a7744e | 1475 | start = u64_stats_fetch_begin_irq(&tx_ring->syncp); |
980e9b11 AD |
1476 | data[i] = tx_ring->stats.packets; |
1477 | data[i + 1] = tx_ring->stats.bytes; | |
57a7744e | 1478 | } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start)); |
99c472a3 | 1479 | i += 2; |
980e9b11 AD |
1480 | |
1481 | /* Rx ring is the 2nd half of the queue pair */ | |
1482 | rx_ring = &tx_ring[1]; | |
1483 | do { | |
57a7744e | 1484 | start = u64_stats_fetch_begin_irq(&rx_ring->syncp); |
99c472a3 CS |
1485 | data[i] = rx_ring->stats.packets; |
1486 | data[i + 1] = rx_ring->stats.bytes; | |
57a7744e | 1487 | } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start)); |
99c472a3 | 1488 | i += 2; |
c7d05ca8 | 1489 | } |
980e9b11 | 1490 | rcu_read_unlock(); |
58ce5175 | 1491 | if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) |
8eab9cfd SN |
1492 | return; |
1493 | ||
d1a8d275 ASJ |
1494 | if ((pf->lan_veb != I40E_NO_VEB) && |
1495 | (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { | |
8eab9cfd | 1496 | struct i40e_veb *veb = pf->veb[pf->lan_veb]; |
6995b36c | 1497 | |
8eab9cfd SN |
1498 | for (j = 0; j < I40E_VEB_STATS_LEN; j++) { |
1499 | p = (char *)veb; | |
1500 | p += i40e_gstrings_veb_stats[j].stat_offset; | |
1501 | data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat == | |
1502 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; | |
c7d05ca8 | 1503 | } |
74a6c665 JB |
1504 | for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) { |
1505 | data[i++] = veb->tc_stats.tc_tx_packets[j]; | |
1506 | data[i++] = veb->tc_stats.tc_tx_bytes[j]; | |
1507 | data[i++] = veb->tc_stats.tc_rx_packets[j]; | |
1508 | data[i++] = veb->tc_stats.tc_rx_bytes[j]; | |
1509 | } | |
c7d05ca8 | 1510 | } |
8eab9cfd SN |
1511 | for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) { |
1512 | p = (char *)pf + i40e_gstrings_stats[j].stat_offset; | |
1513 | data[i++] = (i40e_gstrings_stats[j].sizeof_stat == | |
1514 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; | |
1515 | } | |
1516 | for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { | |
1517 | data[i++] = pf->stats.priority_xon_tx[j]; | |
1518 | data[i++] = pf->stats.priority_xoff_tx[j]; | |
1519 | } | |
1520 | for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) { | |
1521 | data[i++] = pf->stats.priority_xon_rx[j]; | |
1522 | data[i++] = pf->stats.priority_xoff_rx[j]; | |
1523 | } | |
1524 | for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) | |
1525 | data[i++] = pf->stats.priority_xon_2_xoff[j]; | |
c7d05ca8 JB |
1526 | } |
1527 | ||
1528 | static void i40e_get_strings(struct net_device *netdev, u32 stringset, | |
1529 | u8 *data) | |
1530 | { | |
1531 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1532 | struct i40e_vsi *vsi = np->vsi; | |
1533 | struct i40e_pf *pf = vsi->back; | |
1534 | char *p = (char *)data; | |
1535 | int i; | |
1536 | ||
1537 | switch (stringset) { | |
1538 | case ETH_SS_TEST: | |
1539 | for (i = 0; i < I40E_TEST_LEN; i++) { | |
1540 | memcpy(data, i40e_gstrings_test[i], ETH_GSTRING_LEN); | |
1541 | data += ETH_GSTRING_LEN; | |
1542 | } | |
1543 | break; | |
1544 | case ETH_SS_STATS: | |
1545 | for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) { | |
1546 | snprintf(p, ETH_GSTRING_LEN, "%s", | |
1547 | i40e_gstrings_net_stats[i].stat_string); | |
1548 | p += ETH_GSTRING_LEN; | |
1549 | } | |
41a9e55c SN |
1550 | for (i = 0; i < I40E_MISC_STATS_LEN; i++) { |
1551 | snprintf(p, ETH_GSTRING_LEN, "%s", | |
1552 | i40e_gstrings_misc_stats[i].stat_string); | |
1553 | p += ETH_GSTRING_LEN; | |
1554 | } | |
38e00438 VD |
1555 | #ifdef I40E_FCOE |
1556 | for (i = 0; i < I40E_FCOE_STATS_LEN; i++) { | |
1557 | snprintf(p, ETH_GSTRING_LEN, "%s", | |
1558 | i40e_gstrings_fcoe_stats[i].stat_string); | |
1559 | p += ETH_GSTRING_LEN; | |
1560 | } | |
1561 | #endif | |
c7d05ca8 | 1562 | for (i = 0; i < vsi->num_queue_pairs; i++) { |
fbcfac34 | 1563 | snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i); |
c7d05ca8 | 1564 | p += ETH_GSTRING_LEN; |
fbcfac34 | 1565 | snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i); |
c7d05ca8 | 1566 | p += ETH_GSTRING_LEN; |
fbcfac34 | 1567 | snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i); |
c7d05ca8 | 1568 | p += ETH_GSTRING_LEN; |
fbcfac34 | 1569 | snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i); |
c7d05ca8 JB |
1570 | p += ETH_GSTRING_LEN; |
1571 | } | |
58ce5175 | 1572 | if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1) |
8eab9cfd SN |
1573 | return; |
1574 | ||
d1a8d275 ASJ |
1575 | if ((pf->lan_veb != I40E_NO_VEB) && |
1576 | (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { | |
8eab9cfd SN |
1577 | for (i = 0; i < I40E_VEB_STATS_LEN; i++) { |
1578 | snprintf(p, ETH_GSTRING_LEN, "veb.%s", | |
1579 | i40e_gstrings_veb_stats[i].stat_string); | |
c7d05ca8 JB |
1580 | p += ETH_GSTRING_LEN; |
1581 | } | |
fe860afb NP |
1582 | for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) { |
1583 | snprintf(p, ETH_GSTRING_LEN, | |
fbcfac34 | 1584 | "veb.tc_%d_tx_packets", i); |
fe860afb NP |
1585 | p += ETH_GSTRING_LEN; |
1586 | snprintf(p, ETH_GSTRING_LEN, | |
fbcfac34 | 1587 | "veb.tc_%d_tx_bytes", i); |
fe860afb NP |
1588 | p += ETH_GSTRING_LEN; |
1589 | snprintf(p, ETH_GSTRING_LEN, | |
fbcfac34 | 1590 | "veb.tc_%d_rx_packets", i); |
fe860afb NP |
1591 | p += ETH_GSTRING_LEN; |
1592 | snprintf(p, ETH_GSTRING_LEN, | |
fbcfac34 | 1593 | "veb.tc_%d_rx_bytes", i); |
fe860afb NP |
1594 | p += ETH_GSTRING_LEN; |
1595 | } | |
c7d05ca8 | 1596 | } |
8eab9cfd SN |
1597 | for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) { |
1598 | snprintf(p, ETH_GSTRING_LEN, "port.%s", | |
1599 | i40e_gstrings_stats[i].stat_string); | |
1600 | p += ETH_GSTRING_LEN; | |
1601 | } | |
1602 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
1603 | snprintf(p, ETH_GSTRING_LEN, | |
fbcfac34 | 1604 | "port.tx_priority_%d_xon", i); |
8eab9cfd SN |
1605 | p += ETH_GSTRING_LEN; |
1606 | snprintf(p, ETH_GSTRING_LEN, | |
fbcfac34 | 1607 | "port.tx_priority_%d_xoff", i); |
8eab9cfd SN |
1608 | p += ETH_GSTRING_LEN; |
1609 | } | |
1610 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
1611 | snprintf(p, ETH_GSTRING_LEN, | |
fbcfac34 | 1612 | "port.rx_priority_%d_xon", i); |
8eab9cfd SN |
1613 | p += ETH_GSTRING_LEN; |
1614 | snprintf(p, ETH_GSTRING_LEN, | |
fbcfac34 | 1615 | "port.rx_priority_%d_xoff", i); |
8eab9cfd SN |
1616 | p += ETH_GSTRING_LEN; |
1617 | } | |
1618 | for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) { | |
1619 | snprintf(p, ETH_GSTRING_LEN, | |
fbcfac34 | 1620 | "port.rx_priority_%d_xon_2_xoff", i); |
8eab9cfd SN |
1621 | p += ETH_GSTRING_LEN; |
1622 | } | |
c7d05ca8 JB |
1623 | /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */ |
1624 | break; | |
7e45ab44 | 1625 | case ETH_SS_PRIV_FLAGS: |
b5569892 ASJ |
1626 | if (pf->hw.pf_id == 0) { |
1627 | for (i = 0; i < I40E_PRIV_FLAGS_GL_STR_LEN; i++) { | |
1628 | memcpy(data, i40e_priv_flags_strings_gl[i], | |
1629 | ETH_GSTRING_LEN); | |
1630 | data += ETH_GSTRING_LEN; | |
1631 | } | |
1632 | } else { | |
1633 | for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) { | |
1634 | memcpy(data, i40e_priv_flags_strings[i], | |
1635 | ETH_GSTRING_LEN); | |
1636 | data += ETH_GSTRING_LEN; | |
1637 | } | |
7e45ab44 GR |
1638 | } |
1639 | break; | |
579b23d8 AA |
1640 | default: |
1641 | break; | |
c7d05ca8 JB |
1642 | } |
1643 | } | |
1644 | ||
1645 | static int i40e_get_ts_info(struct net_device *dev, | |
1646 | struct ethtool_ts_info *info) | |
1647 | { | |
beb0dff1 JK |
1648 | struct i40e_pf *pf = i40e_netdev_to_pf(dev); |
1649 | ||
fe88bda9 JK |
1650 | /* only report HW timestamping if PTP is enabled */ |
1651 | if (!(pf->flags & I40E_FLAG_PTP)) | |
1652 | return ethtool_op_get_ts_info(dev, info); | |
1653 | ||
beb0dff1 JK |
1654 | info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | |
1655 | SOF_TIMESTAMPING_RX_SOFTWARE | | |
1656 | SOF_TIMESTAMPING_SOFTWARE | | |
1657 | SOF_TIMESTAMPING_TX_HARDWARE | | |
1658 | SOF_TIMESTAMPING_RX_HARDWARE | | |
1659 | SOF_TIMESTAMPING_RAW_HARDWARE; | |
1660 | ||
1661 | if (pf->ptp_clock) | |
1662 | info->phc_index = ptp_clock_index(pf->ptp_clock); | |
1663 | else | |
1664 | info->phc_index = -1; | |
1665 | ||
41a1d04b | 1666 | info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); |
beb0dff1 | 1667 | |
41a1d04b JB |
1668 | info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | |
1669 | BIT(HWTSTAMP_FILTER_PTP_V1_L4_EVENT) | | |
1670 | BIT(HWTSTAMP_FILTER_PTP_V2_EVENT); | |
beb0dff1 JK |
1671 | |
1672 | return 0; | |
c7d05ca8 JB |
1673 | } |
1674 | ||
7b086397 | 1675 | static int i40e_link_test(struct net_device *netdev, u64 *data) |
c7d05ca8 | 1676 | { |
7b086397 SN |
1677 | struct i40e_netdev_priv *np = netdev_priv(netdev); |
1678 | struct i40e_pf *pf = np->vsi->back; | |
a72a5abc JB |
1679 | i40e_status status; |
1680 | bool link_up = false; | |
7b086397 | 1681 | |
b03aaa9c | 1682 | netif_info(pf, hw, netdev, "link test\n"); |
a72a5abc JB |
1683 | status = i40e_get_link_status(&pf->hw, &link_up); |
1684 | if (status) { | |
1685 | netif_err(pf, drv, netdev, "link query timed out, please retry test\n"); | |
1686 | *data = 1; | |
1687 | return *data; | |
1688 | } | |
1689 | ||
1690 | if (link_up) | |
c7d05ca8 JB |
1691 | *data = 0; |
1692 | else | |
1693 | *data = 1; | |
1694 | ||
1695 | return *data; | |
1696 | } | |
1697 | ||
7b086397 | 1698 | static int i40e_reg_test(struct net_device *netdev, u64 *data) |
c7d05ca8 | 1699 | { |
7b086397 SN |
1700 | struct i40e_netdev_priv *np = netdev_priv(netdev); |
1701 | struct i40e_pf *pf = np->vsi->back; | |
c7d05ca8 | 1702 | |
b03aaa9c | 1703 | netif_info(pf, hw, netdev, "register test\n"); |
7b086397 | 1704 | *data = i40e_diag_reg_test(&pf->hw); |
c7d05ca8 | 1705 | |
7b086397 | 1706 | return *data; |
c7d05ca8 JB |
1707 | } |
1708 | ||
7b086397 | 1709 | static int i40e_eeprom_test(struct net_device *netdev, u64 *data) |
c7d05ca8 | 1710 | { |
7b086397 SN |
1711 | struct i40e_netdev_priv *np = netdev_priv(netdev); |
1712 | struct i40e_pf *pf = np->vsi->back; | |
c7d05ca8 | 1713 | |
b03aaa9c | 1714 | netif_info(pf, hw, netdev, "eeprom test\n"); |
7b086397 | 1715 | *data = i40e_diag_eeprom_test(&pf->hw); |
c7d05ca8 | 1716 | |
4443ec94 SN |
1717 | /* forcebly clear the NVM Update state machine */ |
1718 | pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT; | |
1719 | ||
7b086397 | 1720 | return *data; |
c7d05ca8 JB |
1721 | } |
1722 | ||
7b086397 | 1723 | static int i40e_intr_test(struct net_device *netdev, u64 *data) |
c7d05ca8 | 1724 | { |
7b086397 SN |
1725 | struct i40e_netdev_priv *np = netdev_priv(netdev); |
1726 | struct i40e_pf *pf = np->vsi->back; | |
cd92e72f SN |
1727 | u16 swc_old = pf->sw_int_count; |
1728 | ||
b03aaa9c | 1729 | netif_info(pf, hw, netdev, "interrupt test\n"); |
cd92e72f SN |
1730 | wr32(&pf->hw, I40E_PFINT_DYN_CTL0, |
1731 | (I40E_PFINT_DYN_CTL0_INTENA_MASK | | |
5d1ff106 SN |
1732 | I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK | |
1733 | I40E_PFINT_DYN_CTL0_ITR_INDX_MASK | | |
1734 | I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK | | |
1735 | I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK)); | |
cd92e72f SN |
1736 | usleep_range(1000, 2000); |
1737 | *data = (swc_old == pf->sw_int_count); | |
c7d05ca8 JB |
1738 | |
1739 | return *data; | |
1740 | } | |
1741 | ||
7b086397 | 1742 | static int i40e_loopback_test(struct net_device *netdev, u64 *data) |
c7d05ca8 | 1743 | { |
b03aaa9c SN |
1744 | struct i40e_netdev_priv *np = netdev_priv(netdev); |
1745 | struct i40e_pf *pf = np->vsi->back; | |
1746 | ||
1747 | netif_info(pf, hw, netdev, "loopback test not implemented\n"); | |
cd92e72f | 1748 | *data = 0; |
c7d05ca8 JB |
1749 | |
1750 | return *data; | |
1751 | } | |
1752 | ||
e17bc411 GR |
1753 | static inline bool i40e_active_vfs(struct i40e_pf *pf) |
1754 | { | |
1755 | struct i40e_vf *vfs = pf->vf; | |
1756 | int i; | |
1757 | ||
1758 | for (i = 0; i < pf->num_alloc_vfs; i++) | |
6995b36c | 1759 | if (test_bit(I40E_VF_STAT_ACTIVE, &vfs[i].vf_states)) |
e17bc411 GR |
1760 | return true; |
1761 | return false; | |
1762 | } | |
1763 | ||
510efb26 GR |
1764 | static inline bool i40e_active_vmdqs(struct i40e_pf *pf) |
1765 | { | |
1766 | struct i40e_vsi **vsi = pf->vsi; | |
1767 | int i; | |
1768 | ||
1769 | for (i = 0; i < pf->num_alloc_vsi; i++) { | |
1770 | if (!vsi[i]) | |
1771 | continue; | |
1772 | if (vsi[i]->type == I40E_VSI_VMDQ2) | |
1773 | return true; | |
1774 | } | |
1775 | ||
1776 | return false; | |
1777 | } | |
1778 | ||
c7d05ca8 JB |
1779 | static void i40e_diag_test(struct net_device *netdev, |
1780 | struct ethtool_test *eth_test, u64 *data) | |
1781 | { | |
1782 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
5b86c5cf | 1783 | bool if_running = netif_running(netdev); |
c7d05ca8 JB |
1784 | struct i40e_pf *pf = np->vsi->back; |
1785 | ||
c7d05ca8 JB |
1786 | if (eth_test->flags == ETH_TEST_FL_OFFLINE) { |
1787 | /* Offline tests */ | |
b03aaa9c | 1788 | netif_info(pf, drv, netdev, "offline testing starting\n"); |
c7d05ca8 | 1789 | |
f551b438 | 1790 | set_bit(__I40E_TESTING, &pf->state); |
e17bc411 | 1791 | |
510efb26 | 1792 | if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) { |
e17bc411 | 1793 | dev_warn(&pf->pdev->dev, |
510efb26 | 1794 | "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n"); |
e17bc411 GR |
1795 | data[I40E_ETH_TEST_REG] = 1; |
1796 | data[I40E_ETH_TEST_EEPROM] = 1; | |
1797 | data[I40E_ETH_TEST_INTR] = 1; | |
1798 | data[I40E_ETH_TEST_LOOPBACK] = 1; | |
1799 | data[I40E_ETH_TEST_LINK] = 1; | |
1800 | eth_test->flags |= ETH_TEST_FL_FAILED; | |
1801 | clear_bit(__I40E_TESTING, &pf->state); | |
1802 | goto skip_ol_tests; | |
1803 | } | |
1804 | ||
5b86c5cf GR |
1805 | /* If the device is online then take it offline */ |
1806 | if (if_running) | |
1807 | /* indicate we're in test mode */ | |
08ca3874 | 1808 | i40e_close(netdev); |
5b86c5cf | 1809 | else |
b4e53f02 GR |
1810 | /* This reset does not affect link - if it is |
1811 | * changed to a type of reset that does affect | |
1812 | * link then the following link test would have | |
1813 | * to be moved to before the reset | |
1814 | */ | |
41a1d04b | 1815 | i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED)); |
f551b438 | 1816 | |
7b086397 | 1817 | if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) |
c7d05ca8 JB |
1818 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1819 | ||
7b086397 | 1820 | if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM])) |
c7d05ca8 JB |
1821 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1822 | ||
7b086397 | 1823 | if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR])) |
c7d05ca8 JB |
1824 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1825 | ||
7b086397 | 1826 | if (i40e_loopback_test(netdev, &data[I40E_ETH_TEST_LOOPBACK])) |
c7d05ca8 JB |
1827 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1828 | ||
f551b438 SN |
1829 | /* run reg test last, a reset is required after it */ |
1830 | if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG])) | |
1831 | eth_test->flags |= ETH_TEST_FL_FAILED; | |
1832 | ||
1833 | clear_bit(__I40E_TESTING, &pf->state); | |
41a1d04b | 1834 | i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED)); |
5b86c5cf GR |
1835 | |
1836 | if (if_running) | |
08ca3874 | 1837 | i40e_open(netdev); |
c7d05ca8 | 1838 | } else { |
c7d05ca8 | 1839 | /* Online tests */ |
b03aaa9c SN |
1840 | netif_info(pf, drv, netdev, "online testing starting\n"); |
1841 | ||
7b086397 | 1842 | if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK])) |
c7d05ca8 JB |
1843 | eth_test->flags |= ETH_TEST_FL_FAILED; |
1844 | ||
1845 | /* Offline only tests, not run in online; pass by default */ | |
1846 | data[I40E_ETH_TEST_REG] = 0; | |
1847 | data[I40E_ETH_TEST_EEPROM] = 0; | |
1848 | data[I40E_ETH_TEST_INTR] = 0; | |
1849 | data[I40E_ETH_TEST_LOOPBACK] = 0; | |
c7d05ca8 | 1850 | } |
c140c17b | 1851 | |
e17bc411 GR |
1852 | skip_ol_tests: |
1853 | ||
b03aaa9c | 1854 | netif_info(pf, drv, netdev, "testing finished\n"); |
c7d05ca8 JB |
1855 | } |
1856 | ||
1857 | static void i40e_get_wol(struct net_device *netdev, | |
1858 | struct ethtool_wolinfo *wol) | |
1859 | { | |
8e2773ae SN |
1860 | struct i40e_netdev_priv *np = netdev_priv(netdev); |
1861 | struct i40e_pf *pf = np->vsi->back; | |
1862 | struct i40e_hw *hw = &pf->hw; | |
1863 | u16 wol_nvm_bits; | |
1864 | ||
1865 | /* NVM bit on means WoL disabled for the port */ | |
1866 | i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); | |
41a1d04b | 1867 | if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) { |
8e2773ae SN |
1868 | wol->supported = 0; |
1869 | wol->wolopts = 0; | |
1870 | } else { | |
1871 | wol->supported = WAKE_MAGIC; | |
1872 | wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0); | |
1873 | } | |
1874 | } | |
1875 | ||
f0d8c733 SN |
1876 | /** |
1877 | * i40e_set_wol - set the WakeOnLAN configuration | |
1878 | * @netdev: the netdev in question | |
1879 | * @wol: the ethtool WoL setting data | |
1880 | **/ | |
8e2773ae SN |
1881 | static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol) |
1882 | { | |
1883 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1884 | struct i40e_pf *pf = np->vsi->back; | |
f0d8c733 | 1885 | struct i40e_vsi *vsi = np->vsi; |
8e2773ae SN |
1886 | struct i40e_hw *hw = &pf->hw; |
1887 | u16 wol_nvm_bits; | |
1888 | ||
f0d8c733 SN |
1889 | /* WoL not supported if this isn't the controlling PF on the port */ |
1890 | if (hw->partition_id != 1) { | |
1891 | i40e_partition_setting_complaint(pf); | |
1892 | return -EOPNOTSUPP; | |
1893 | } | |
1894 | ||
1895 | if (vsi != pf->vsi[pf->lan_vsi]) | |
1896 | return -EOPNOTSUPP; | |
1897 | ||
8e2773ae SN |
1898 | /* NVM bit on means WoL disabled for the port */ |
1899 | i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits); | |
41a1d04b | 1900 | if (BIT(hw->port) & wol_nvm_bits) |
8e2773ae SN |
1901 | return -EOPNOTSUPP; |
1902 | ||
1903 | /* only magic packet is supported */ | |
1904 | if (wol->wolopts && (wol->wolopts != WAKE_MAGIC)) | |
1905 | return -EOPNOTSUPP; | |
1906 | ||
1907 | /* is this a new value? */ | |
1908 | if (pf->wol_en != !!wol->wolopts) { | |
1909 | pf->wol_en = !!wol->wolopts; | |
1910 | device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en); | |
1911 | } | |
1912 | ||
c7d05ca8 JB |
1913 | return 0; |
1914 | } | |
1915 | ||
1916 | static int i40e_set_phys_id(struct net_device *netdev, | |
1917 | enum ethtool_phys_id_state state) | |
1918 | { | |
1919 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
31b606d0 | 1920 | i40e_status ret = 0; |
c7d05ca8 JB |
1921 | struct i40e_pf *pf = np->vsi->back; |
1922 | struct i40e_hw *hw = &pf->hw; | |
1923 | int blink_freq = 2; | |
31b606d0 | 1924 | u16 temp_status; |
c7d05ca8 JB |
1925 | |
1926 | switch (state) { | |
1927 | case ETHTOOL_ID_ACTIVE: | |
31b606d0 CW |
1928 | if (!(pf->flags & I40E_FLAG_HAVE_10GBASET_PHY)) { |
1929 | pf->led_status = i40e_led_get(hw); | |
1930 | } else { | |
06c0e39b | 1931 | i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, NULL); |
31b606d0 CW |
1932 | ret = i40e_led_get_phy(hw, &temp_status, |
1933 | &pf->phy_led_val); | |
1934 | pf->led_status = temp_status; | |
1935 | } | |
c7d05ca8 JB |
1936 | return blink_freq; |
1937 | case ETHTOOL_ID_ON: | |
31b606d0 CW |
1938 | if (!(pf->flags & I40E_FLAG_HAVE_10GBASET_PHY)) |
1939 | i40e_led_set(hw, 0xf, false); | |
1940 | else | |
1941 | ret = i40e_led_set_phy(hw, true, pf->led_status, 0); | |
c7d05ca8 JB |
1942 | break; |
1943 | case ETHTOOL_ID_OFF: | |
31b606d0 CW |
1944 | if (!(pf->flags & I40E_FLAG_HAVE_10GBASET_PHY)) |
1945 | i40e_led_set(hw, 0x0, false); | |
1946 | else | |
1947 | ret = i40e_led_set_phy(hw, false, pf->led_status, 0); | |
c7d05ca8 JB |
1948 | break; |
1949 | case ETHTOOL_ID_INACTIVE: | |
31b606d0 CW |
1950 | if (!(pf->flags & I40E_FLAG_HAVE_10GBASET_PHY)) { |
1951 | i40e_led_set(hw, false, pf->led_status); | |
1952 | } else { | |
1953 | ret = i40e_led_set_phy(hw, false, pf->led_status, | |
1954 | (pf->phy_led_val | | |
1955 | I40E_PHY_LED_MODE_ORIG)); | |
1956 | i40e_aq_set_phy_debug(hw, 0, NULL); | |
1957 | } | |
c7d05ca8 | 1958 | break; |
579b23d8 AA |
1959 | default: |
1960 | break; | |
c7d05ca8 | 1961 | } |
31b606d0 CW |
1962 | if (ret) |
1963 | return -ENOENT; | |
1964 | else | |
1965 | return 0; | |
c7d05ca8 JB |
1966 | } |
1967 | ||
1968 | /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt | |
1969 | * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also | |
1970 | * 125us (8000 interrupts per second) == ITR(62) | |
1971 | */ | |
1972 | ||
a75e8005 KL |
1973 | static int __i40e_get_coalesce(struct net_device *netdev, |
1974 | struct ethtool_coalesce *ec, | |
1975 | int queue) | |
c7d05ca8 JB |
1976 | { |
1977 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
1978 | struct i40e_vsi *vsi = np->vsi; | |
1979 | ||
1980 | ec->tx_max_coalesced_frames_irq = vsi->work_limit; | |
1981 | ec->rx_max_coalesced_frames_irq = vsi->work_limit; | |
1982 | ||
a75e8005 KL |
1983 | /* rx and tx usecs has per queue value. If user doesn't specify the queue, |
1984 | * return queue 0's value to represent. | |
1985 | */ | |
1986 | if (queue < 0) { | |
1987 | queue = 0; | |
1988 | } else if (queue >= vsi->num_queue_pairs) { | |
1989 | return -EINVAL; | |
1990 | } | |
1991 | ||
1992 | if (ITR_IS_DYNAMIC(vsi->rx_rings[queue]->rx_itr_setting)) | |
32f5f54a | 1993 | ec->use_adaptive_rx_coalesce = 1; |
c7d05ca8 | 1994 | |
a75e8005 | 1995 | if (ITR_IS_DYNAMIC(vsi->tx_rings[queue]->tx_itr_setting)) |
32f5f54a MW |
1996 | ec->use_adaptive_tx_coalesce = 1; |
1997 | ||
a75e8005 KL |
1998 | ec->rx_coalesce_usecs = vsi->rx_rings[queue]->rx_itr_setting & ~I40E_ITR_DYNAMIC; |
1999 | ec->tx_coalesce_usecs = vsi->tx_rings[queue]->tx_itr_setting & ~I40E_ITR_DYNAMIC; | |
2000 | ||
ac26fc13 JB |
2001 | /* we use the _usecs_high to store/set the interrupt rate limit |
2002 | * that the hardware supports, that almost but not quite | |
2003 | * fits the original intent of the ethtool variable, | |
2004 | * the rx_coalesce_usecs_high limits total interrupts | |
2005 | * per second from both tx/rx sources. | |
2006 | */ | |
2007 | ec->rx_coalesce_usecs_high = vsi->int_rate_limit; | |
2008 | ec->tx_coalesce_usecs_high = vsi->int_rate_limit; | |
c7d05ca8 JB |
2009 | |
2010 | return 0; | |
2011 | } | |
2012 | ||
a75e8005 | 2013 | static int i40e_get_coalesce(struct net_device *netdev, |
c7d05ca8 JB |
2014 | struct ethtool_coalesce *ec) |
2015 | { | |
a75e8005 KL |
2016 | return __i40e_get_coalesce(netdev, ec, -1); |
2017 | } | |
2018 | ||
be280bad KL |
2019 | static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue, |
2020 | struct ethtool_coalesce *ec) | |
2021 | { | |
2022 | return __i40e_get_coalesce(netdev, ec, queue); | |
2023 | } | |
2024 | ||
a75e8005 KL |
2025 | static void i40e_set_itr_per_queue(struct i40e_vsi *vsi, |
2026 | struct ethtool_coalesce *ec, | |
2027 | int queue) | |
2028 | { | |
2029 | struct i40e_pf *pf = vsi->back; | |
2030 | struct i40e_hw *hw = &pf->hw; | |
c7d05ca8 | 2031 | struct i40e_q_vector *q_vector; |
a75e8005 KL |
2032 | u16 vector, intrl; |
2033 | ||
2034 | intrl = INTRL_USEC_TO_REG(vsi->int_rate_limit); | |
2035 | ||
2036 | vsi->rx_rings[queue]->rx_itr_setting = ec->rx_coalesce_usecs; | |
2037 | vsi->tx_rings[queue]->tx_itr_setting = ec->tx_coalesce_usecs; | |
2038 | ||
2039 | if (ec->use_adaptive_rx_coalesce) | |
2040 | vsi->rx_rings[queue]->rx_itr_setting |= I40E_ITR_DYNAMIC; | |
2041 | else | |
2042 | vsi->rx_rings[queue]->rx_itr_setting &= ~I40E_ITR_DYNAMIC; | |
2043 | ||
2044 | if (ec->use_adaptive_tx_coalesce) | |
2045 | vsi->tx_rings[queue]->tx_itr_setting |= I40E_ITR_DYNAMIC; | |
2046 | else | |
2047 | vsi->tx_rings[queue]->tx_itr_setting &= ~I40E_ITR_DYNAMIC; | |
2048 | ||
2049 | q_vector = vsi->rx_rings[queue]->q_vector; | |
2050 | q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[queue]->rx_itr_setting); | |
2051 | vector = vsi->base_vector + q_vector->v_idx; | |
2052 | wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr); | |
2053 | ||
2054 | q_vector = vsi->tx_rings[queue]->q_vector; | |
2055 | q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[queue]->tx_itr_setting); | |
2056 | vector = vsi->base_vector + q_vector->v_idx; | |
2057 | wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr); | |
2058 | ||
2059 | wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl); | |
2060 | i40e_flush(hw); | |
2061 | } | |
2062 | ||
2063 | static int __i40e_set_coalesce(struct net_device *netdev, | |
2064 | struct ethtool_coalesce *ec, | |
2065 | int queue) | |
2066 | { | |
2067 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
c7d05ca8 JB |
2068 | struct i40e_vsi *vsi = np->vsi; |
2069 | struct i40e_pf *pf = vsi->back; | |
c7d05ca8 JB |
2070 | int i; |
2071 | ||
2072 | if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq) | |
2073 | vsi->work_limit = ec->tx_max_coalesced_frames_irq; | |
2074 | ||
ac26fc13 JB |
2075 | /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */ |
2076 | if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) { | |
2077 | netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n"); | |
2078 | return -EINVAL; | |
2079 | } | |
2080 | ||
2081 | if (ec->rx_coalesce_usecs_high >= INTRL_REG_TO_USEC(I40E_MAX_INTRL)) { | |
2082 | netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-235\n"); | |
2083 | return -EINVAL; | |
2084 | } | |
2085 | ||
a75e8005 | 2086 | if (ec->rx_coalesce_usecs == 0) { |
5c2cebda | 2087 | if (ec->use_adaptive_rx_coalesce) |
79442d38 | 2088 | netif_info(pf, drv, netdev, "rx-usecs=0, need to disable adaptive-rx for a complete disable\n"); |
a75e8005 KL |
2089 | } else if ((ec->rx_coalesce_usecs < (I40E_MIN_ITR << 1)) || |
2090 | (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1))) { | |
2091 | netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n"); | |
2092 | return -EINVAL; | |
5c2cebda | 2093 | } |
c7d05ca8 | 2094 | |
ac26fc13 JB |
2095 | vsi->int_rate_limit = ec->rx_coalesce_usecs_high; |
2096 | ||
a75e8005 | 2097 | if (ec->tx_coalesce_usecs == 0) { |
5c2cebda | 2098 | if (ec->use_adaptive_tx_coalesce) |
79442d38 | 2099 | netif_info(pf, drv, netdev, "tx-usecs=0, need to disable adaptive-tx for a complete disable\n"); |
a75e8005 KL |
2100 | } else if ((ec->tx_coalesce_usecs < (I40E_MIN_ITR << 1)) || |
2101 | (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1))) { | |
2102 | netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n"); | |
2103 | return -EINVAL; | |
5c2cebda | 2104 | } |
32f5f54a | 2105 | |
a75e8005 KL |
2106 | /* rx and tx usecs has per queue value. If user doesn't specify the queue, |
2107 | * apply to all queues. | |
2108 | */ | |
2109 | if (queue < 0) { | |
2110 | for (i = 0; i < vsi->num_queue_pairs; i++) | |
2111 | i40e_set_itr_per_queue(vsi, ec, i); | |
2112 | } else if (queue < vsi->num_queue_pairs) { | |
2113 | i40e_set_itr_per_queue(vsi, ec, queue); | |
2114 | } else { | |
2115 | netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n", | |
2116 | vsi->num_queue_pairs - 1); | |
2117 | return -EINVAL; | |
c7d05ca8 JB |
2118 | } |
2119 | ||
2120 | return 0; | |
2121 | } | |
2122 | ||
a75e8005 KL |
2123 | static int i40e_set_coalesce(struct net_device *netdev, |
2124 | struct ethtool_coalesce *ec) | |
2125 | { | |
2126 | return __i40e_set_coalesce(netdev, ec, -1); | |
2127 | } | |
2128 | ||
f3757a4d KL |
2129 | static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue, |
2130 | struct ethtool_coalesce *ec) | |
2131 | { | |
2132 | return __i40e_set_coalesce(netdev, ec, queue); | |
2133 | } | |
2134 | ||
c7d05ca8 JB |
2135 | /** |
2136 | * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type | |
2137 | * @pf: pointer to the physical function struct | |
2138 | * @cmd: ethtool rxnfc command | |
2139 | * | |
2140 | * Returns Success if the flow is supported, else Invalid Input. | |
2141 | **/ | |
2142 | static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd) | |
2143 | { | |
eb0dd6e4 CW |
2144 | struct i40e_hw *hw = &pf->hw; |
2145 | u8 flow_pctype = 0; | |
2146 | u64 i_set = 0; | |
2147 | ||
c7d05ca8 JB |
2148 | cmd->data = 0; |
2149 | ||
c7d05ca8 JB |
2150 | switch (cmd->flow_type) { |
2151 | case TCP_V4_FLOW: | |
eb0dd6e4 CW |
2152 | flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; |
2153 | break; | |
c7d05ca8 | 2154 | case UDP_V4_FLOW: |
eb0dd6e4 CW |
2155 | flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; |
2156 | break; | |
2157 | case TCP_V6_FLOW: | |
2158 | flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; | |
2159 | break; | |
2160 | case UDP_V6_FLOW: | |
2161 | flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; | |
2162 | break; | |
c7d05ca8 JB |
2163 | case SCTP_V4_FLOW: |
2164 | case AH_ESP_V4_FLOW: | |
2165 | case AH_V4_FLOW: | |
2166 | case ESP_V4_FLOW: | |
2167 | case IPV4_FLOW: | |
c7d05ca8 JB |
2168 | case SCTP_V6_FLOW: |
2169 | case AH_ESP_V6_FLOW: | |
2170 | case AH_V6_FLOW: | |
2171 | case ESP_V6_FLOW: | |
2172 | case IPV6_FLOW: | |
eb0dd6e4 | 2173 | /* Default is src/dest for IP, no matter the L4 hashing */ |
c7d05ca8 JB |
2174 | cmd->data |= RXH_IP_SRC | RXH_IP_DST; |
2175 | break; | |
2176 | default: | |
2177 | return -EINVAL; | |
2178 | } | |
2179 | ||
eb0dd6e4 CW |
2180 | /* Read flow based hash input set register */ |
2181 | if (flow_pctype) { | |
2182 | i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, | |
2183 | flow_pctype)) | | |
2184 | ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, | |
2185 | flow_pctype)) << 32); | |
2186 | } | |
2187 | ||
2188 | /* Process bits of hash input set */ | |
2189 | if (i_set) { | |
2190 | if (i_set & I40E_L4_SRC_MASK) | |
2191 | cmd->data |= RXH_L4_B_0_1; | |
2192 | if (i_set & I40E_L4_DST_MASK) | |
2193 | cmd->data |= RXH_L4_B_2_3; | |
2194 | ||
2195 | if (cmd->flow_type == TCP_V4_FLOW || | |
2196 | cmd->flow_type == UDP_V4_FLOW) { | |
2197 | if (i_set & I40E_L3_SRC_MASK) | |
2198 | cmd->data |= RXH_IP_SRC; | |
2199 | if (i_set & I40E_L3_DST_MASK) | |
2200 | cmd->data |= RXH_IP_DST; | |
2201 | } else if (cmd->flow_type == TCP_V6_FLOW || | |
2202 | cmd->flow_type == UDP_V6_FLOW) { | |
2203 | if (i_set & I40E_L3_V6_SRC_MASK) | |
2204 | cmd->data |= RXH_IP_SRC; | |
2205 | if (i_set & I40E_L3_V6_DST_MASK) | |
2206 | cmd->data |= RXH_IP_DST; | |
2207 | } | |
2208 | } | |
2209 | ||
c7d05ca8 JB |
2210 | return 0; |
2211 | } | |
2212 | ||
17a73f6b JG |
2213 | /** |
2214 | * i40e_get_ethtool_fdir_all - Populates the rule count of a command | |
2215 | * @pf: Pointer to the physical function struct | |
2216 | * @cmd: The command to get or set Rx flow classification rules | |
2217 | * @rule_locs: Array of used rule locations | |
2218 | * | |
2219 | * This function populates both the total and actual rule count of | |
2220 | * the ethtool flow classification command | |
2221 | * | |
2222 | * Returns 0 on success or -EMSGSIZE if entry not found | |
2223 | **/ | |
2224 | static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf, | |
2225 | struct ethtool_rxnfc *cmd, | |
2226 | u32 *rule_locs) | |
2227 | { | |
2228 | struct i40e_fdir_filter *rule; | |
2229 | struct hlist_node *node2; | |
2230 | int cnt = 0; | |
2231 | ||
2232 | /* report total rule count */ | |
082def10 | 2233 | cmd->data = i40e_get_fd_cnt_all(pf); |
17a73f6b JG |
2234 | |
2235 | hlist_for_each_entry_safe(rule, node2, | |
2236 | &pf->fdir_filter_list, fdir_node) { | |
2237 | if (cnt == cmd->rule_cnt) | |
2238 | return -EMSGSIZE; | |
2239 | ||
2240 | rule_locs[cnt] = rule->fd_id; | |
2241 | cnt++; | |
2242 | } | |
2243 | ||
2244 | cmd->rule_cnt = cnt; | |
2245 | ||
2246 | return 0; | |
2247 | } | |
2248 | ||
2249 | /** | |
2250 | * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow | |
2251 | * @pf: Pointer to the physical function struct | |
2252 | * @cmd: The command to get or set Rx flow classification rules | |
2253 | * | |
2254 | * This function looks up a filter based on the Rx flow classification | |
2255 | * command and fills the flow spec info for it if found | |
2256 | * | |
2257 | * Returns 0 on success or -EINVAL if filter not found | |
2258 | **/ | |
2259 | static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf, | |
2260 | struct ethtool_rxnfc *cmd) | |
2261 | { | |
2262 | struct ethtool_rx_flow_spec *fsp = | |
2263 | (struct ethtool_rx_flow_spec *)&cmd->fs; | |
2264 | struct i40e_fdir_filter *rule = NULL; | |
2265 | struct hlist_node *node2; | |
2266 | ||
17a73f6b JG |
2267 | hlist_for_each_entry_safe(rule, node2, |
2268 | &pf->fdir_filter_list, fdir_node) { | |
2269 | if (fsp->location <= rule->fd_id) | |
2270 | break; | |
2271 | } | |
2272 | ||
2273 | if (!rule || fsp->location != rule->fd_id) | |
2274 | return -EINVAL; | |
2275 | ||
2276 | fsp->flow_type = rule->flow_type; | |
7d54eb2c ASJ |
2277 | if (fsp->flow_type == IP_USER_FLOW) { |
2278 | fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4; | |
2279 | fsp->h_u.usr_ip4_spec.proto = 0; | |
2280 | fsp->m_u.usr_ip4_spec.proto = 0; | |
2281 | } | |
2282 | ||
04b73bd7 ASJ |
2283 | /* Reverse the src and dest notion, since the HW views them from |
2284 | * Tx perspective where as the user expects it from Rx filter view. | |
2285 | */ | |
2286 | fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port; | |
2287 | fsp->h_u.tcp_ip4_spec.pdst = rule->src_port; | |
2288 | fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip[0]; | |
2289 | fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip[0]; | |
387ce1a9 ASJ |
2290 | |
2291 | if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET) | |
2292 | fsp->ring_cookie = RX_CLS_FLOW_DISC; | |
2293 | else | |
2294 | fsp->ring_cookie = rule->q_index; | |
17a73f6b | 2295 | |
e7c8c60b ASJ |
2296 | if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) { |
2297 | struct i40e_vsi *vsi; | |
2298 | ||
2299 | vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi); | |
2300 | if (vsi && vsi->type == I40E_VSI_SRIOV) { | |
2301 | fsp->h_ext.data[1] = htonl(vsi->vf_id); | |
2302 | fsp->m_ext.data[1] = htonl(0x1); | |
2303 | } | |
2304 | } | |
2305 | ||
17a73f6b JG |
2306 | return 0; |
2307 | } | |
2308 | ||
c7d05ca8 JB |
2309 | /** |
2310 | * i40e_get_rxnfc - command to get RX flow classification rules | |
2311 | * @netdev: network interface device structure | |
2312 | * @cmd: ethtool rxnfc command | |
2313 | * | |
2314 | * Returns Success if the command is supported. | |
2315 | **/ | |
2316 | static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd, | |
2317 | u32 *rule_locs) | |
2318 | { | |
2319 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2320 | struct i40e_vsi *vsi = np->vsi; | |
2321 | struct i40e_pf *pf = vsi->back; | |
2322 | int ret = -EOPNOTSUPP; | |
2323 | ||
2324 | switch (cmd->cmd) { | |
2325 | case ETHTOOL_GRXRINGS: | |
3e3aa21f | 2326 | cmd->data = vsi->num_queue_pairs; |
c7d05ca8 JB |
2327 | ret = 0; |
2328 | break; | |
2329 | case ETHTOOL_GRXFH: | |
2330 | ret = i40e_get_rss_hash_opts(pf, cmd); | |
2331 | break; | |
2332 | case ETHTOOL_GRXCLSRLCNT: | |
17a73f6b | 2333 | cmd->rule_cnt = pf->fdir_pf_active_filters; |
082def10 ASJ |
2334 | /* report total rule count */ |
2335 | cmd->data = i40e_get_fd_cnt_all(pf); | |
c7d05ca8 JB |
2336 | ret = 0; |
2337 | break; | |
2338 | case ETHTOOL_GRXCLSRULE: | |
17a73f6b | 2339 | ret = i40e_get_ethtool_fdir_entry(pf, cmd); |
c7d05ca8 JB |
2340 | break; |
2341 | case ETHTOOL_GRXCLSRLALL: | |
17a73f6b JG |
2342 | ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs); |
2343 | break; | |
c7d05ca8 JB |
2344 | default: |
2345 | break; | |
2346 | } | |
2347 | ||
2348 | return ret; | |
2349 | } | |
2350 | ||
eb0dd6e4 CW |
2351 | /** |
2352 | * i40e_get_rss_hash_bits - Read RSS Hash bits from register | |
2353 | * @nfc: pointer to user request | |
2354 | * @i_setc bits currently set | |
2355 | * | |
2356 | * Returns value of bits to be set per user request | |
2357 | **/ | |
2358 | static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc) | |
2359 | { | |
2360 | u64 i_set = i_setc; | |
2361 | u64 src_l3 = 0, dst_l3 = 0; | |
2362 | ||
2363 | if (nfc->data & RXH_L4_B_0_1) | |
2364 | i_set |= I40E_L4_SRC_MASK; | |
2365 | else | |
2366 | i_set &= ~I40E_L4_SRC_MASK; | |
2367 | if (nfc->data & RXH_L4_B_2_3) | |
2368 | i_set |= I40E_L4_DST_MASK; | |
2369 | else | |
2370 | i_set &= ~I40E_L4_DST_MASK; | |
2371 | ||
2372 | if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) { | |
2373 | src_l3 = I40E_L3_V6_SRC_MASK; | |
2374 | dst_l3 = I40E_L3_V6_DST_MASK; | |
2375 | } else if (nfc->flow_type == TCP_V4_FLOW || | |
2376 | nfc->flow_type == UDP_V4_FLOW) { | |
2377 | src_l3 = I40E_L3_SRC_MASK; | |
2378 | dst_l3 = I40E_L3_DST_MASK; | |
2379 | } else { | |
2380 | /* Any other flow type are not supported here */ | |
2381 | return i_set; | |
2382 | } | |
2383 | ||
2384 | if (nfc->data & RXH_IP_SRC) | |
2385 | i_set |= src_l3; | |
2386 | else | |
2387 | i_set &= ~src_l3; | |
2388 | if (nfc->data & RXH_IP_DST) | |
2389 | i_set |= dst_l3; | |
2390 | else | |
2391 | i_set &= ~dst_l3; | |
2392 | ||
2393 | return i_set; | |
2394 | } | |
2395 | ||
c7d05ca8 JB |
2396 | /** |
2397 | * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash | |
2398 | * @pf: pointer to the physical function struct | |
2399 | * @cmd: ethtool rxnfc command | |
2400 | * | |
2401 | * Returns Success if the flow input set is supported. | |
2402 | **/ | |
2403 | static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc) | |
2404 | { | |
2405 | struct i40e_hw *hw = &pf->hw; | |
272cdaf2 SN |
2406 | u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) | |
2407 | ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32); | |
eb0dd6e4 CW |
2408 | u8 flow_pctype = 0; |
2409 | u64 i_set, i_setc; | |
c7d05ca8 JB |
2410 | |
2411 | /* RSS does not support anything other than hashing | |
2412 | * to queues on src and dst IPs and ports | |
2413 | */ | |
2414 | if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | | |
2415 | RXH_L4_B_0_1 | RXH_L4_B_2_3)) | |
2416 | return -EINVAL; | |
2417 | ||
c7d05ca8 JB |
2418 | switch (nfc->flow_type) { |
2419 | case TCP_V4_FLOW: | |
eb0dd6e4 CW |
2420 | flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP; |
2421 | if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) | |
2422 | hena |= | |
2423 | BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); | |
c7d05ca8 JB |
2424 | break; |
2425 | case TCP_V6_FLOW: | |
eb0dd6e4 CW |
2426 | flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP; |
2427 | if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) | |
2428 | hena |= | |
2429 | BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK); | |
2430 | if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) | |
2431 | hena |= | |
2432 | BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK); | |
c7d05ca8 JB |
2433 | break; |
2434 | case UDP_V4_FLOW: | |
eb0dd6e4 CW |
2435 | flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP; |
2436 | if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) | |
2437 | hena |= | |
2438 | BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) | | |
2439 | BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP); | |
2440 | ||
2441 | hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); | |
c7d05ca8 JB |
2442 | break; |
2443 | case UDP_V6_FLOW: | |
eb0dd6e4 CW |
2444 | flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP; |
2445 | if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE) | |
2446 | hena |= | |
2447 | BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) | | |
2448 | BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP); | |
2449 | ||
2450 | hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); | |
c7d05ca8 JB |
2451 | break; |
2452 | case AH_ESP_V4_FLOW: | |
2453 | case AH_V4_FLOW: | |
2454 | case ESP_V4_FLOW: | |
2455 | case SCTP_V4_FLOW: | |
2456 | if ((nfc->data & RXH_L4_B_0_1) || | |
2457 | (nfc->data & RXH_L4_B_2_3)) | |
2458 | return -EINVAL; | |
41a1d04b | 2459 | hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER); |
c7d05ca8 JB |
2460 | break; |
2461 | case AH_ESP_V6_FLOW: | |
2462 | case AH_V6_FLOW: | |
2463 | case ESP_V6_FLOW: | |
2464 | case SCTP_V6_FLOW: | |
2465 | if ((nfc->data & RXH_L4_B_0_1) || | |
2466 | (nfc->data & RXH_L4_B_2_3)) | |
2467 | return -EINVAL; | |
41a1d04b | 2468 | hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER); |
c7d05ca8 JB |
2469 | break; |
2470 | case IPV4_FLOW: | |
41a1d04b JB |
2471 | hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) | |
2472 | BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4); | |
c7d05ca8 JB |
2473 | break; |
2474 | case IPV6_FLOW: | |
41a1d04b JB |
2475 | hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) | |
2476 | BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6); | |
c7d05ca8 JB |
2477 | break; |
2478 | default: | |
2479 | return -EINVAL; | |
2480 | } | |
2481 | ||
eb0dd6e4 CW |
2482 | if (flow_pctype) { |
2483 | i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, | |
2484 | flow_pctype)) | | |
2485 | ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, | |
2486 | flow_pctype)) << 32); | |
2487 | i_set = i40e_get_rss_hash_bits(nfc, i_setc); | |
2488 | i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype), | |
2489 | (u32)i_set); | |
2490 | i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype), | |
2491 | (u32)(i_set >> 32)); | |
2492 | hena |= BIT_ULL(flow_pctype); | |
2493 | } | |
2494 | ||
272cdaf2 SN |
2495 | i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena); |
2496 | i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32)); | |
c7d05ca8 JB |
2497 | i40e_flush(hw); |
2498 | ||
2499 | return 0; | |
2500 | } | |
2501 | ||
43fddb75 ASJ |
2502 | /** |
2503 | * i40e_match_fdir_input_set - Match a new filter against an existing one | |
2504 | * @rule: The filter already added | |
2505 | * @input: The new filter to comapre against | |
2506 | * | |
2507 | * Returns true if the two input set match | |
2508 | **/ | |
2509 | static bool i40e_match_fdir_input_set(struct i40e_fdir_filter *rule, | |
2510 | struct i40e_fdir_filter *input) | |
2511 | { | |
2512 | if ((rule->dst_ip[0] != input->dst_ip[0]) || | |
2513 | (rule->src_ip[0] != input->src_ip[0]) || | |
2514 | (rule->dst_port != input->dst_port) || | |
2515 | (rule->src_port != input->src_port)) | |
2516 | return false; | |
2517 | return true; | |
2518 | } | |
2519 | ||
c7d05ca8 | 2520 | /** |
17a73f6b JG |
2521 | * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry |
2522 | * @vsi: Pointer to the targeted VSI | |
2523 | * @input: The filter to update or NULL to indicate deletion | |
2524 | * @sw_idx: Software index to the filter | |
2525 | * @cmd: The command to get or set Rx flow classification rules | |
c7d05ca8 | 2526 | * |
17a73f6b JG |
2527 | * This function updates (or deletes) a Flow Director entry from |
2528 | * the hlist of the corresponding PF | |
2529 | * | |
2530 | * Returns 0 on success | |
c7d05ca8 | 2531 | **/ |
17a73f6b JG |
2532 | static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi, |
2533 | struct i40e_fdir_filter *input, | |
2534 | u16 sw_idx, | |
2535 | struct ethtool_rxnfc *cmd) | |
c7d05ca8 | 2536 | { |
17a73f6b | 2537 | struct i40e_fdir_filter *rule, *parent; |
c7d05ca8 | 2538 | struct i40e_pf *pf = vsi->back; |
17a73f6b JG |
2539 | struct hlist_node *node2; |
2540 | int err = -EINVAL; | |
c7d05ca8 | 2541 | |
17a73f6b JG |
2542 | parent = NULL; |
2543 | rule = NULL; | |
c7d05ca8 | 2544 | |
17a73f6b JG |
2545 | hlist_for_each_entry_safe(rule, node2, |
2546 | &pf->fdir_filter_list, fdir_node) { | |
2547 | /* hash found, or no matching entry */ | |
2548 | if (rule->fd_id >= sw_idx) | |
2549 | break; | |
2550 | parent = rule; | |
c7d05ca8 JB |
2551 | } |
2552 | ||
17a73f6b JG |
2553 | /* if there is an old rule occupying our place remove it */ |
2554 | if (rule && (rule->fd_id == sw_idx)) { | |
43fddb75 ASJ |
2555 | if (input && !i40e_match_fdir_input_set(rule, input)) |
2556 | err = i40e_add_del_fdir(vsi, rule, false); | |
2557 | else if (!input) | |
2558 | err = i40e_add_del_fdir(vsi, rule, false); | |
17a73f6b JG |
2559 | hlist_del(&rule->fdir_node); |
2560 | kfree(rule); | |
2561 | pf->fdir_pf_active_filters--; | |
cbf61325 ASJ |
2562 | } |
2563 | ||
17a73f6b JG |
2564 | /* If no input this was a delete, err should be 0 if a rule was |
2565 | * successfully found and removed from the list else -EINVAL | |
2566 | */ | |
2567 | if (!input) | |
2568 | return err; | |
c7d05ca8 | 2569 | |
17a73f6b JG |
2570 | /* initialize node and set software index */ |
2571 | INIT_HLIST_NODE(&input->fdir_node); | |
c7d05ca8 | 2572 | |
17a73f6b JG |
2573 | /* add filter to the list */ |
2574 | if (parent) | |
1d023284 | 2575 | hlist_add_behind(&input->fdir_node, &parent->fdir_node); |
17a73f6b JG |
2576 | else |
2577 | hlist_add_head(&input->fdir_node, | |
2578 | &pf->fdir_filter_list); | |
c7d05ca8 | 2579 | |
17a73f6b JG |
2580 | /* update counts */ |
2581 | pf->fdir_pf_active_filters++; | |
c7d05ca8 | 2582 | |
17a73f6b | 2583 | return 0; |
c7d05ca8 JB |
2584 | } |
2585 | ||
2586 | /** | |
17a73f6b JG |
2587 | * i40e_del_fdir_entry - Deletes a Flow Director filter entry |
2588 | * @vsi: Pointer to the targeted VSI | |
2589 | * @cmd: The command to get or set Rx flow classification rules | |
c7d05ca8 | 2590 | * |
17a73f6b JG |
2591 | * The function removes a Flow Director filter entry from the |
2592 | * hlist of the corresponding PF | |
c7d05ca8 | 2593 | * |
17a73f6b JG |
2594 | * Returns 0 on success |
2595 | */ | |
2596 | static int i40e_del_fdir_entry(struct i40e_vsi *vsi, | |
2597 | struct ethtool_rxnfc *cmd) | |
c7d05ca8 | 2598 | { |
17a73f6b JG |
2599 | struct ethtool_rx_flow_spec *fsp = |
2600 | (struct ethtool_rx_flow_spec *)&cmd->fs; | |
c7d05ca8 | 2601 | struct i40e_pf *pf = vsi->back; |
17a73f6b | 2602 | int ret = 0; |
c7d05ca8 | 2603 | |
60793f4a ASJ |
2604 | if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) || |
2605 | test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) | |
2606 | return -EBUSY; | |
2607 | ||
1e1be8f6 ASJ |
2608 | if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) |
2609 | return -EBUSY; | |
2610 | ||
17a73f6b | 2611 | ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd); |
c7d05ca8 | 2612 | |
55a5e60b | 2613 | i40e_fdir_check_and_reenable(pf); |
17a73f6b | 2614 | return ret; |
c7d05ca8 JB |
2615 | } |
2616 | ||
2617 | /** | |
1eaa3840 | 2618 | * i40e_add_fdir_ethtool - Add/Remove Flow Director filters |
c7d05ca8 JB |
2619 | * @vsi: pointer to the targeted VSI |
2620 | * @cmd: command to get or set RX flow classification rules | |
c7d05ca8 | 2621 | * |
1eaa3840 ASJ |
2622 | * Add Flow Director filters for a specific flow spec based on their |
2623 | * protocol. Returns 0 if the filters were successfully added. | |
c7d05ca8 | 2624 | **/ |
1eaa3840 ASJ |
2625 | static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi, |
2626 | struct ethtool_rxnfc *cmd) | |
c7d05ca8 | 2627 | { |
17a73f6b JG |
2628 | struct ethtool_rx_flow_spec *fsp; |
2629 | struct i40e_fdir_filter *input; | |
c7d05ca8 | 2630 | struct i40e_pf *pf; |
17a73f6b | 2631 | int ret = -EINVAL; |
e7c8c60b | 2632 | u16 vf_id; |
c7d05ca8 JB |
2633 | |
2634 | if (!vsi) | |
2635 | return -EINVAL; | |
c7d05ca8 JB |
2636 | pf = vsi->back; |
2637 | ||
55a5e60b ASJ |
2638 | if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED)) |
2639 | return -EOPNOTSUPP; | |
2640 | ||
1eaa3840 | 2641 | if (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED) |
55a5e60b ASJ |
2642 | return -ENOSPC; |
2643 | ||
60793f4a ASJ |
2644 | if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) || |
2645 | test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) | |
2646 | return -EBUSY; | |
2647 | ||
1e1be8f6 ASJ |
2648 | if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state)) |
2649 | return -EBUSY; | |
2650 | ||
55a5e60b ASJ |
2651 | fsp = (struct ethtool_rx_flow_spec *)&cmd->fs; |
2652 | ||
17a73f6b JG |
2653 | if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort + |
2654 | pf->hw.func_caps.fd_filters_guaranteed)) { | |
c7d05ca8 | 2655 | return -EINVAL; |
17a73f6b | 2656 | } |
c7d05ca8 | 2657 | |
387ce1a9 ASJ |
2658 | if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) && |
2659 | (fsp->ring_cookie >= vsi->num_queue_pairs)) | |
17a73f6b | 2660 | return -EINVAL; |
c7d05ca8 | 2661 | |
17a73f6b | 2662 | input = kzalloc(sizeof(*input), GFP_KERNEL); |
c7d05ca8 | 2663 | |
17a73f6b JG |
2664 | if (!input) |
2665 | return -ENOMEM; | |
c7d05ca8 | 2666 | |
17a73f6b JG |
2667 | input->fd_id = fsp->location; |
2668 | ||
35a91fdd ASJ |
2669 | if (fsp->ring_cookie == RX_CLS_FLOW_DISC) |
2670 | input->dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; | |
2671 | else | |
2672 | input->dest_ctl = | |
2673 | I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; | |
2674 | ||
17a73f6b JG |
2675 | input->q_index = fsp->ring_cookie; |
2676 | input->flex_off = 0; | |
2677 | input->pctype = 0; | |
2678 | input->dest_vsi = vsi->id; | |
17a73f6b | 2679 | input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID; |
0bf4b1b0 | 2680 | input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id); |
17a73f6b JG |
2681 | input->flow_type = fsp->flow_type; |
2682 | input->ip4_proto = fsp->h_u.usr_ip4_spec.proto; | |
04b73bd7 ASJ |
2683 | |
2684 | /* Reverse the src and dest notion, since the HW expects them to be from | |
2685 | * Tx perspective where as the input from user is from Rx filter view. | |
2686 | */ | |
2687 | input->dst_port = fsp->h_u.tcp_ip4_spec.psrc; | |
2688 | input->src_port = fsp->h_u.tcp_ip4_spec.pdst; | |
2689 | input->dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src; | |
2690 | input->src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst; | |
17a73f6b | 2691 | |
e7c8c60b | 2692 | if (ntohl(fsp->m_ext.data[1])) { |
bab3a34b SN |
2693 | vf_id = ntohl(fsp->h_ext.data[1]); |
2694 | if (vf_id >= pf->num_alloc_vfs) { | |
2695 | netif_info(pf, drv, vsi->netdev, | |
2696 | "Invalid VF id %d\n", vf_id); | |
e7c8c60b ASJ |
2697 | goto free_input; |
2698 | } | |
e7c8c60b ASJ |
2699 | /* Find vsi id from vf id and override dest vsi */ |
2700 | input->dest_vsi = pf->vf[vf_id].lan_vsi_id; | |
2701 | if (input->q_index >= pf->vf[vf_id].num_queue_pairs) { | |
bab3a34b SN |
2702 | netif_info(pf, drv, vsi->netdev, |
2703 | "Invalid queue id %d for VF %d\n", | |
2704 | input->q_index, vf_id); | |
e7c8c60b ASJ |
2705 | goto free_input; |
2706 | } | |
2707 | } | |
2708 | ||
1eaa3840 | 2709 | ret = i40e_add_del_fdir(vsi, input, true); |
e7c8c60b | 2710 | free_input: |
1eaa3840 | 2711 | if (ret) |
17a73f6b | 2712 | kfree(input); |
17a73f6b | 2713 | else |
1eaa3840 | 2714 | i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL); |
c7d05ca8 JB |
2715 | |
2716 | return ret; | |
2717 | } | |
8fb905b3 | 2718 | |
c7d05ca8 JB |
2719 | /** |
2720 | * i40e_set_rxnfc - command to set RX flow classification rules | |
2721 | * @netdev: network interface device structure | |
2722 | * @cmd: ethtool rxnfc command | |
2723 | * | |
2724 | * Returns Success if the command is supported. | |
2725 | **/ | |
2726 | static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd) | |
2727 | { | |
2728 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2729 | struct i40e_vsi *vsi = np->vsi; | |
2730 | struct i40e_pf *pf = vsi->back; | |
2731 | int ret = -EOPNOTSUPP; | |
2732 | ||
2733 | switch (cmd->cmd) { | |
2734 | case ETHTOOL_SRXFH: | |
2735 | ret = i40e_set_rss_hash_opt(pf, cmd); | |
2736 | break; | |
2737 | case ETHTOOL_SRXCLSRLINS: | |
1eaa3840 | 2738 | ret = i40e_add_fdir_ethtool(vsi, cmd); |
c7d05ca8 JB |
2739 | break; |
2740 | case ETHTOOL_SRXCLSRLDEL: | |
17a73f6b | 2741 | ret = i40e_del_fdir_entry(vsi, cmd); |
c7d05ca8 JB |
2742 | break; |
2743 | default: | |
2744 | break; | |
2745 | } | |
2746 | ||
2747 | return ret; | |
2748 | } | |
2749 | ||
4b7820ca ASJ |
2750 | /** |
2751 | * i40e_max_channels - get Max number of combined channels supported | |
2752 | * @vsi: vsi pointer | |
2753 | **/ | |
2754 | static unsigned int i40e_max_channels(struct i40e_vsi *vsi) | |
2755 | { | |
2756 | /* TODO: This code assumes DCB and FD is disabled for now. */ | |
2757 | return vsi->alloc_queue_pairs; | |
2758 | } | |
2759 | ||
2760 | /** | |
2761 | * i40e_get_channels - Get the current channels enabled and max supported etc. | |
2762 | * @netdev: network interface device structure | |
2763 | * @ch: ethtool channels structure | |
2764 | * | |
2765 | * We don't support separate tx and rx queues as channels. The other count | |
2766 | * represents how many queues are being used for control. max_combined counts | |
2767 | * how many queue pairs we can support. They may not be mapped 1 to 1 with | |
2768 | * q_vectors since we support a lot more queue pairs than q_vectors. | |
2769 | **/ | |
2770 | static void i40e_get_channels(struct net_device *dev, | |
2771 | struct ethtool_channels *ch) | |
2772 | { | |
2773 | struct i40e_netdev_priv *np = netdev_priv(dev); | |
2774 | struct i40e_vsi *vsi = np->vsi; | |
2775 | struct i40e_pf *pf = vsi->back; | |
2776 | ||
2777 | /* report maximum channels */ | |
2778 | ch->max_combined = i40e_max_channels(vsi); | |
2779 | ||
2780 | /* report info for other vector */ | |
60ea5f83 | 2781 | ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0; |
4b7820ca ASJ |
2782 | ch->max_other = ch->other_count; |
2783 | ||
2784 | /* Note: This code assumes DCB is disabled for now. */ | |
2785 | ch->combined_count = vsi->num_queue_pairs; | |
2786 | } | |
2787 | ||
2788 | /** | |
2789 | * i40e_set_channels - Set the new channels count. | |
2790 | * @netdev: network interface device structure | |
2791 | * @ch: ethtool channels structure | |
2792 | * | |
2793 | * The new channels count may not be the same as requested by the user | |
2794 | * since it gets rounded down to a power of 2 value. | |
2795 | **/ | |
2796 | static int i40e_set_channels(struct net_device *dev, | |
2797 | struct ethtool_channels *ch) | |
2798 | { | |
59826d9b | 2799 | const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; |
4b7820ca ASJ |
2800 | struct i40e_netdev_priv *np = netdev_priv(dev); |
2801 | unsigned int count = ch->combined_count; | |
2802 | struct i40e_vsi *vsi = np->vsi; | |
2803 | struct i40e_pf *pf = vsi->back; | |
59826d9b JK |
2804 | struct i40e_fdir_filter *rule; |
2805 | struct hlist_node *node2; | |
4b7820ca | 2806 | int new_count; |
59826d9b | 2807 | int err = 0; |
4b7820ca ASJ |
2808 | |
2809 | /* We do not support setting channels for any other VSI at present */ | |
2810 | if (vsi->type != I40E_VSI_MAIN) | |
2811 | return -EINVAL; | |
2812 | ||
2813 | /* verify they are not requesting separate vectors */ | |
2814 | if (!count || ch->rx_count || ch->tx_count) | |
2815 | return -EINVAL; | |
2816 | ||
2817 | /* verify other_count has not changed */ | |
60ea5f83 | 2818 | if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0)) |
4b7820ca ASJ |
2819 | return -EINVAL; |
2820 | ||
2821 | /* verify the number of channels does not exceed hardware limits */ | |
2822 | if (count > i40e_max_channels(vsi)) | |
2823 | return -EINVAL; | |
2824 | ||
59826d9b JK |
2825 | /* verify that the number of channels does not invalidate any current |
2826 | * flow director rules | |
2827 | */ | |
2828 | hlist_for_each_entry_safe(rule, node2, | |
2829 | &pf->fdir_filter_list, fdir_node) { | |
2830 | if (rule->dest_ctl != drop && count <= rule->q_index) { | |
2831 | dev_warn(&pf->pdev->dev, | |
2832 | "Existing user defined filter %d assigns flow to queue %d\n", | |
2833 | rule->fd_id, rule->q_index); | |
2834 | err = -EINVAL; | |
2835 | } | |
2836 | } | |
2837 | ||
2838 | if (err) { | |
2839 | dev_err(&pf->pdev->dev, | |
2840 | "Existing filter rules must be deleted to reduce combined channel count to %d\n", | |
2841 | count); | |
2842 | return err; | |
2843 | } | |
2844 | ||
4b7820ca ASJ |
2845 | /* update feature limits from largest to smallest supported values */ |
2846 | /* TODO: Flow director limit, DCB etc */ | |
2847 | ||
4b7820ca ASJ |
2848 | /* use rss_reconfig to rebuild with new queue count and update traffic |
2849 | * class queue mapping | |
2850 | */ | |
2851 | new_count = i40e_reconfig_rss_queues(pf, count); | |
5f90f422 | 2852 | if (new_count > 0) |
4b7820ca ASJ |
2853 | return 0; |
2854 | else | |
2855 | return -EINVAL; | |
2856 | } | |
2857 | ||
b29e13bb MW |
2858 | /** |
2859 | * i40e_get_rxfh_key_size - get the RSS hash key size | |
2860 | * @netdev: network interface device structure | |
2861 | * | |
2862 | * Returns the table size. | |
2863 | **/ | |
2864 | static u32 i40e_get_rxfh_key_size(struct net_device *netdev) | |
2865 | { | |
2866 | return I40E_HKEY_ARRAY_SIZE; | |
2867 | } | |
2868 | ||
2869 | /** | |
2870 | * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size | |
2871 | * @netdev: network interface device structure | |
2872 | * | |
2873 | * Returns the table size. | |
2874 | **/ | |
2875 | static u32 i40e_get_rxfh_indir_size(struct net_device *netdev) | |
2876 | { | |
2877 | return I40E_HLUT_ARRAY_SIZE; | |
2878 | } | |
2879 | ||
2880 | static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, | |
2881 | u8 *hfunc) | |
2882 | { | |
2883 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2884 | struct i40e_vsi *vsi = np->vsi; | |
043dd650 HZ |
2885 | u8 *lut, *seed = NULL; |
2886 | int ret; | |
2887 | u16 i; | |
b29e13bb MW |
2888 | |
2889 | if (hfunc) | |
2890 | *hfunc = ETH_RSS_HASH_TOP; | |
2891 | ||
2892 | if (!indir) | |
2893 | return 0; | |
2894 | ||
043dd650 HZ |
2895 | seed = key; |
2896 | lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); | |
2897 | if (!lut) | |
2898 | return -ENOMEM; | |
2899 | ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE); | |
2900 | if (ret) | |
2901 | goto out; | |
2902 | for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) | |
2903 | indir[i] = (u32)(lut[i]); | |
b29e13bb | 2904 | |
043dd650 HZ |
2905 | out: |
2906 | kfree(lut); | |
2907 | ||
2908 | return ret; | |
b29e13bb MW |
2909 | } |
2910 | ||
2911 | /** | |
2912 | * i40e_set_rxfh - set the rx flow hash indirection table | |
2913 | * @netdev: network interface device structure | |
2914 | * @indir: indirection table | |
2915 | * @key: hash key | |
2916 | * | |
cd494fb4 | 2917 | * Returns -EINVAL if the table specifies an invalid queue id, otherwise |
b29e13bb MW |
2918 | * returns 0 after programming the table. |
2919 | **/ | |
2920 | static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir, | |
2921 | const u8 *key, const u8 hfunc) | |
2922 | { | |
2923 | struct i40e_netdev_priv *np = netdev_priv(netdev); | |
2924 | struct i40e_vsi *vsi = np->vsi; | |
28c5869f | 2925 | u8 *seed = NULL; |
043dd650 | 2926 | u16 i; |
b29e13bb MW |
2927 | |
2928 | if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) | |
2929 | return -EOPNOTSUPP; | |
2930 | ||
2931 | if (!indir) | |
2932 | return 0; | |
2933 | ||
b29e13bb | 2934 | if (key) { |
28c5869f HZ |
2935 | if (!vsi->rss_hkey_user) { |
2936 | vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE, | |
2937 | GFP_KERNEL); | |
2938 | if (!vsi->rss_hkey_user) | |
2939 | return -ENOMEM; | |
2940 | } | |
2941 | memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE); | |
2942 | seed = vsi->rss_hkey_user; | |
b29e13bb | 2943 | } |
28c5869f HZ |
2944 | if (!vsi->rss_lut_user) { |
2945 | vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL); | |
2946 | if (!vsi->rss_lut_user) | |
2947 | return -ENOMEM; | |
2948 | } | |
2949 | ||
2950 | /* Each 32 bits pointed by 'indir' is stored with a lut entry */ | |
043dd650 | 2951 | for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++) |
28c5869f | 2952 | vsi->rss_lut_user[i] = (u8)(indir[i]); |
043dd650 | 2953 | |
28c5869f HZ |
2954 | return i40e_config_rss(vsi, seed, vsi->rss_lut_user, |
2955 | I40E_HLUT_ARRAY_SIZE); | |
b29e13bb MW |
2956 | } |
2957 | ||
7e45ab44 GR |
2958 | /** |
2959 | * i40e_get_priv_flags - report device private flags | |
2960 | * @dev: network interface device structure | |
2961 | * | |
2962 | * The get string set count and the string set should be matched for each | |
2963 | * flag returned. Add new strings for each flag to the i40e_priv_flags_strings | |
2964 | * array. | |
2965 | * | |
2966 | * Returns a u32 bitmap of flags. | |
2967 | **/ | |
5bbc3301 | 2968 | static u32 i40e_get_priv_flags(struct net_device *dev) |
7e45ab44 GR |
2969 | { |
2970 | struct i40e_netdev_priv *np = netdev_priv(dev); | |
2971 | struct i40e_vsi *vsi = np->vsi; | |
2972 | struct i40e_pf *pf = vsi->back; | |
2973 | u32 ret_flags = 0; | |
2974 | ||
9ac77266 SN |
2975 | ret_flags |= pf->flags & I40E_FLAG_LINK_POLLING_ENABLED ? |
2976 | I40E_PRIV_FLAGS_LINKPOLL_FLAG : 0; | |
ef17178c JB |
2977 | ret_flags |= pf->flags & I40E_FLAG_FD_ATR_ENABLED ? |
2978 | I40E_PRIV_FLAGS_FD_ATR : 0; | |
1cdfd88f SN |
2979 | ret_flags |= pf->flags & I40E_FLAG_VEB_STATS_ENABLED ? |
2980 | I40E_PRIV_FLAGS_VEB_STATS : 0; | |
72b74869 ASJ |
2981 | ret_flags |= pf->auto_disable_flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE ? |
2982 | 0 : I40E_PRIV_FLAGS_HW_ATR_EVICT; | |
b5569892 ASJ |
2983 | if (pf->hw.pf_id == 0) { |
2984 | ret_flags |= pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT ? | |
2985 | I40E_PRIV_FLAGS_TRUE_PROMISC_SUPPORT : 0; | |
2986 | } | |
7e45ab44 GR |
2987 | |
2988 | return ret_flags; | |
2989 | } | |
2990 | ||
9ac77266 SN |
2991 | /** |
2992 | * i40e_set_priv_flags - set private flags | |
2993 | * @dev: network interface device structure | |
2994 | * @flags: bit flags to be set | |
2995 | **/ | |
2996 | static int i40e_set_priv_flags(struct net_device *dev, u32 flags) | |
2997 | { | |
2998 | struct i40e_netdev_priv *np = netdev_priv(dev); | |
2999 | struct i40e_vsi *vsi = np->vsi; | |
3000 | struct i40e_pf *pf = vsi->back; | |
b5569892 | 3001 | u16 sw_flags = 0, valid_flags = 0; |
827de392 | 3002 | bool reset_required = false; |
b5569892 ASJ |
3003 | bool promisc_change = false; |
3004 | int ret; | |
827de392 JB |
3005 | |
3006 | /* NOTE: MFP is not settable */ | |
3007 | ||
9ac77266 SN |
3008 | if (flags & I40E_PRIV_FLAGS_LINKPOLL_FLAG) |
3009 | pf->flags |= I40E_FLAG_LINK_POLLING_ENABLED; | |
3010 | else | |
3011 | pf->flags &= ~I40E_FLAG_LINK_POLLING_ENABLED; | |
3012 | ||
ef17178c JB |
3013 | /* allow the user to control the state of the Flow |
3014 | * Director ATR (Application Targeted Routing) feature | |
3015 | * of the driver | |
3016 | */ | |
3017 | if (flags & I40E_PRIV_FLAGS_FD_ATR) { | |
3018 | pf->flags |= I40E_FLAG_FD_ATR_ENABLED; | |
3019 | } else { | |
3020 | pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED; | |
3021 | pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED; | |
3022 | } | |
3023 | ||
66fc360a SN |
3024 | if ((flags & I40E_PRIV_FLAGS_VEB_STATS) && |
3025 | !(pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { | |
1cdfd88f | 3026 | pf->flags |= I40E_FLAG_VEB_STATS_ENABLED; |
66fc360a SN |
3027 | reset_required = true; |
3028 | } else if (!(flags & I40E_PRIV_FLAGS_VEB_STATS) && | |
3029 | (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) { | |
1cdfd88f | 3030 | pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED; |
66fc360a SN |
3031 | reset_required = true; |
3032 | } | |
1cdfd88f | 3033 | |
b5569892 ASJ |
3034 | if (pf->hw.pf_id == 0) { |
3035 | if ((flags & I40E_PRIV_FLAGS_TRUE_PROMISC_SUPPORT) && | |
3036 | !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) { | |
3037 | pf->flags |= I40E_FLAG_TRUE_PROMISC_SUPPORT; | |
3038 | promisc_change = true; | |
3039 | } else if (!(flags & I40E_PRIV_FLAGS_TRUE_PROMISC_SUPPORT) && | |
3040 | (pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) { | |
3041 | pf->flags &= ~I40E_FLAG_TRUE_PROMISC_SUPPORT; | |
3042 | promisc_change = true; | |
3043 | } | |
3044 | } | |
3045 | if (promisc_change) { | |
3046 | if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) | |
3047 | sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; | |
3048 | valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC; | |
3049 | ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags, | |
3050 | NULL); | |
3051 | if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) { | |
3052 | dev_info(&pf->pdev->dev, | |
3053 | "couldn't set switch config bits, err %s aq_err %s\n", | |
3054 | i40e_stat_str(&pf->hw, ret), | |
3055 | i40e_aq_str(&pf->hw, | |
3056 | pf->hw.aq.asq_last_status)); | |
3057 | /* not a fatal problem, just keep going */ | |
3058 | } | |
3059 | } | |
3060 | ||
72b74869 ASJ |
3061 | if ((flags & I40E_PRIV_FLAGS_HW_ATR_EVICT) && |
3062 | (pf->flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE)) | |
3063 | pf->auto_disable_flags &= ~I40E_FLAG_HW_ATR_EVICT_CAPABLE; | |
3064 | else | |
3065 | pf->auto_disable_flags |= I40E_FLAG_HW_ATR_EVICT_CAPABLE; | |
3066 | ||
827de392 JB |
3067 | /* if needed, issue reset to cause things to take effect */ |
3068 | if (reset_required) | |
3069 | i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED)); | |
3070 | ||
9ac77266 SN |
3071 | return 0; |
3072 | } | |
3073 | ||
c7d05ca8 JB |
3074 | static const struct ethtool_ops i40e_ethtool_ops = { |
3075 | .get_settings = i40e_get_settings, | |
bf9c7141 | 3076 | .set_settings = i40e_set_settings, |
c7d05ca8 JB |
3077 | .get_drvinfo = i40e_get_drvinfo, |
3078 | .get_regs_len = i40e_get_regs_len, | |
3079 | .get_regs = i40e_get_regs, | |
3080 | .nway_reset = i40e_nway_reset, | |
3081 | .get_link = ethtool_op_get_link, | |
3082 | .get_wol = i40e_get_wol, | |
8e2773ae | 3083 | .set_wol = i40e_set_wol, |
cd552cb4 | 3084 | .set_eeprom = i40e_set_eeprom, |
c7d05ca8 JB |
3085 | .get_eeprom_len = i40e_get_eeprom_len, |
3086 | .get_eeprom = i40e_get_eeprom, | |
3087 | .get_ringparam = i40e_get_ringparam, | |
3088 | .set_ringparam = i40e_set_ringparam, | |
3089 | .get_pauseparam = i40e_get_pauseparam, | |
2becc35a | 3090 | .set_pauseparam = i40e_set_pauseparam, |
c7d05ca8 JB |
3091 | .get_msglevel = i40e_get_msglevel, |
3092 | .set_msglevel = i40e_set_msglevel, | |
3093 | .get_rxnfc = i40e_get_rxnfc, | |
3094 | .set_rxnfc = i40e_set_rxnfc, | |
3095 | .self_test = i40e_diag_test, | |
3096 | .get_strings = i40e_get_strings, | |
3097 | .set_phys_id = i40e_set_phys_id, | |
3098 | .get_sset_count = i40e_get_sset_count, | |
3099 | .get_ethtool_stats = i40e_get_ethtool_stats, | |
3100 | .get_coalesce = i40e_get_coalesce, | |
3101 | .set_coalesce = i40e_set_coalesce, | |
b29e13bb MW |
3102 | .get_rxfh_key_size = i40e_get_rxfh_key_size, |
3103 | .get_rxfh_indir_size = i40e_get_rxfh_indir_size, | |
3104 | .get_rxfh = i40e_get_rxfh, | |
3105 | .set_rxfh = i40e_set_rxfh, | |
4b7820ca ASJ |
3106 | .get_channels = i40e_get_channels, |
3107 | .set_channels = i40e_set_channels, | |
c7d05ca8 | 3108 | .get_ts_info = i40e_get_ts_info, |
7e45ab44 | 3109 | .get_priv_flags = i40e_get_priv_flags, |
9ac77266 | 3110 | .set_priv_flags = i40e_set_priv_flags, |
be280bad | 3111 | .get_per_queue_coalesce = i40e_get_per_queue_coalesce, |
f3757a4d | 3112 | .set_per_queue_coalesce = i40e_set_per_queue_coalesce, |
c7d05ca8 JB |
3113 | }; |
3114 | ||
3115 | void i40e_set_ethtool_ops(struct net_device *netdev) | |
3116 | { | |
7ad24ea4 | 3117 | netdev->ethtool_ops = &i40e_ethtool_ops; |
c7d05ca8 | 3118 | } |