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Merge tag 'driver-core-4.6-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / drivers / net / ethernet / intel / ixgbevf / ixgbevf_main.c
CommitLineData
92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
dec0d8e4 4 Copyright(c) 1999 - 2015 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
dec0d8e4 16 this program; if not, see <http://www.gnu.org/licenses/>.
92915f71
GR		 17
18 The full GNU General Public License is included in this distribution in
19 the file called "COPYING".
20
21 Contact Information:
22 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24
25*******************************************************************************/
26
92915f71
GR		 27/******************************************************************************
28 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
29******************************************************************************/
dbd9636e
JK		 30
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
92915f71 33#include <linux/types.h>
dadcd65f 34#include <linux/bitops.h>
92915f71
GR		 35#include <linux/module.h>
36#include <linux/pci.h>
37#include <linux/netdevice.h>
38#include <linux/vmalloc.h>
39#include <linux/string.h>
40#include <linux/in.h>
41#include <linux/ip.h>
42#include <linux/tcp.h>
70a10e25 43#include <linux/sctp.h>
92915f71 44#include <linux/ipv6.h>
5a0e3ad6 45#include <linux/slab.h>
92915f71
GR		 46#include <net/checksum.h>
47#include <net/ip6_checksum.h>
48#include <linux/ethtool.h>
01789349 49#include <linux/if.h>
92915f71 50#include <linux/if_vlan.h>
70c71606 51#include <linux/prefetch.h>
92915f71
GR		 52
53#include "ixgbevf.h"
54
3d8fe98f 55const char ixgbevf_driver_name[] = "ixgbevf";
92915f71 56static const char ixgbevf_driver_string[] =
422e05d1 57 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 58
86f359f6 59#define DRV_VERSION "2.12.1-k"
92915f71 60const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5 61static char ixgbevf_copyright[] =
40a13e24 62 "Copyright (c) 2009 - 2015 Intel Corporation.";
92915f71
GR		 63
64static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 65 [board_82599_vf] = &ixgbevf_82599_vf_info,
66 [board_X540_vf] = &ixgbevf_X540_vf_info,
47068b0d
ET		 67 [board_X550_vf] = &ixgbevf_X550_vf_info,
68 [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
92915f71
GR		 69};
70
71/* ixgbevf_pci_tbl - PCI Device ID Table
72 *
73 * Wildcard entries (PCI_ANY_ID) should come last
74 * Last entry must be all 0s
75 *
76 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
77 * Class, Class Mask, private data (not used) }
78 */
9baa3c34 79static const struct pci_device_id ixgbevf_pci_tbl[] = {
39ba22b4
SH		 80 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
81 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
47068b0d
ET		 82 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
83 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
92915f71
GR		 84 /* required last entry */
85 {0, }
86};
87MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
88
89MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
b8ce18cd 90MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
92915f71
GR		 91MODULE_LICENSE("GPL");
92MODULE_VERSION(DRV_VERSION);
93
b3f4d599 94#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
95static int debug = -1;
96module_param(debug, int, 0);
97MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
92915f71 98
40a13e24
MR		 99static struct workqueue_struct *ixgbevf_wq;
100
9ac5c5cc
ET		 101static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
102{
103 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
104 !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
105 !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
40a13e24 106 queue_work(ixgbevf_wq, &adapter->service_task);
9ac5c5cc
ET		 107}
108
109static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
110{
111 BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
112
113 /* flush memory to make sure state is correct before next watchdog */
114 smp_mb__before_atomic();
115 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
116}
117
92915f71 118/* forward decls */
220fe050 119static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
fa71ae27 120static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
56e94095 121static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
92915f71 122
dbf8b0d8
MR		 123static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
124{
125 struct ixgbevf_adapter *adapter = hw->back;
126
127 if (!hw->hw_addr)
128 return;
129 hw->hw_addr = NULL;
130 dev_err(&adapter->pdev->dev, "Adapter removed\n");
9ac5c5cc
ET		 131 if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
132 ixgbevf_service_event_schedule(adapter);
dbf8b0d8
MR		 133}
134
135static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
136{
137 u32 value;
138
139 /* The following check not only optimizes a bit by not
140 * performing a read on the status register when the
141 * register just read was a status register read that
142 * returned IXGBE_FAILED_READ_REG. It also blocks any
143 * potential recursion.
144 */
145 if (reg == IXGBE_VFSTATUS) {
146 ixgbevf_remove_adapter(hw);
147 return;
148 }
32c74949 149 value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
dbf8b0d8
MR		 150 if (value == IXGBE_FAILED_READ_REG)
151 ixgbevf_remove_adapter(hw);
152}
153
32c74949 154u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
dbf8b0d8
MR		 155{
156 u8 __iomem *reg_addr = ACCESS_ONCE(hw->hw_addr);
157 u32 value;
158
159 if (IXGBE_REMOVED(reg_addr))
160 return IXGBE_FAILED_READ_REG;
161 value = readl(reg_addr + reg);
162 if (unlikely(value == IXGBE_FAILED_READ_REG))
163 ixgbevf_check_remove(hw, reg);
164 return value;
165}
166
49ce9c2c 167/**
65d676c8 168 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 169 * @adapter: pointer to adapter struct
170 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
171 * @queue: queue to map the corresponding interrupt to
172 * @msix_vector: the vector to map to the corresponding queue
dec0d8e4 173 **/
92915f71
GR		 174static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
175 u8 queue, u8 msix_vector)
176{
177 u32 ivar, index;
178 struct ixgbe_hw *hw = &adapter->hw;
dec0d8e4 179
92915f71
GR		 180 if (direction == -1) {
181 /* other causes */
182 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
183 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
184 ivar &= ~0xFF;
185 ivar |= msix_vector;
186 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
187 } else {
dec0d8e4 188 /* Tx or Rx causes */
92915f71
GR		 189 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
190 index = ((16 * (queue & 1)) + (8 * direction));
191 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
192 ivar &= ~(0xFF << index);
193 ivar |= (msix_vector << index);
194 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
195 }
196}
197
70a10e25 198static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_ring *tx_ring,
9bdfefd2
ET		 199 struct ixgbevf_tx_buffer *tx_buffer)
200{
201 if (tx_buffer->skb) {
202 dev_kfree_skb_any(tx_buffer->skb);
203 if (dma_unmap_len(tx_buffer, len))
70a10e25 204 dma_unmap_single(tx_ring->dev,
9bdfefd2
ET		 205 dma_unmap_addr(tx_buffer, dma),
206 dma_unmap_len(tx_buffer, len),
2a1f8794 207 DMA_TO_DEVICE);
9bdfefd2
ET		 208 } else if (dma_unmap_len(tx_buffer, len)) {
209 dma_unmap_page(tx_ring->dev,
210 dma_unmap_addr(tx_buffer, dma),
211 dma_unmap_len(tx_buffer, len),
212 DMA_TO_DEVICE);
92915f71 213 }
9bdfefd2
ET		 214 tx_buffer->next_to_watch = NULL;
215 tx_buffer->skb = NULL;
216 dma_unmap_len_set(tx_buffer, len, 0);
217 /* tx_buffer must be completely set up in the transmit path */
92915f71
GR		 218}
219
e08400b7
ET		 220static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
221{
222 return ring->stats.packets;
223}
92915f71 224
e08400b7
ET		 225static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
226{
227 struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
228 struct ixgbe_hw *hw = &adapter->hw;
92915f71 229
e08400b7
ET		 230 u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
231 u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
232
233 if (head != tail)
234 return (head < tail) ?
235 tail - head : (tail + ring->count - head);
236
237 return 0;
238}
239
240static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
241{
242 u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
243 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
244 u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
245
246 clear_check_for_tx_hang(tx_ring);
247
248 /* Check for a hung queue, but be thorough. This verifies
249 * that a transmit has been completed since the previous
250 * check AND there is at least one packet pending. The
251 * ARMED bit is set to indicate a potential hang.
252 */
253 if ((tx_done_old == tx_done) && tx_pending) {
254 /* make sure it is true for two checks in a row */
255 return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
256 &tx_ring->state);
257 }
258 /* reset the countdown */
259 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
260
261 /* update completed stats and continue */
262 tx_ring->tx_stats.tx_done_old = tx_done;
263
264 return false;
265}
266
9ac5c5cc
ET		 267static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
268{
269 /* Do the reset outside of interrupt context */
270 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
271 adapter->flags |= IXGBEVF_FLAG_RESET_REQUESTED;
272 ixgbevf_service_event_schedule(adapter);
273 }
274}
275
e08400b7
ET		 276/**
277 * ixgbevf_tx_timeout - Respond to a Tx Hang
278 * @netdev: network interface device structure
279 **/
280static void ixgbevf_tx_timeout(struct net_device *netdev)
281{
282 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
283
9ac5c5cc 284 ixgbevf_tx_timeout_reset(adapter);
e08400b7 285}
92915f71
GR		 286
287/**
288 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
fa71ae27 289 * @q_vector: board private structure
92915f71
GR		 290 * @tx_ring: tx ring to clean
291 **/
fa71ae27 292static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
92915f71
GR		 293 struct ixgbevf_ring *tx_ring)
294{
fa71ae27 295 struct ixgbevf_adapter *adapter = q_vector->adapter;
7ad1a093
ET		 296 struct ixgbevf_tx_buffer *tx_buffer;
297 union ixgbe_adv_tx_desc *tx_desc;
92915f71 298 unsigned int total_bytes = 0, total_packets = 0;
7ad1a093
ET		 299 unsigned int budget = tx_ring->count / 2;
300 unsigned int i = tx_ring->next_to_clean;
92915f71 301
10cc1bdd
AD		 302 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
303 return true;
304
7ad1a093
ET		 305 tx_buffer = &tx_ring->tx_buffer_info[i];
306 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
307 i -= tx_ring->count;
92915f71 308
e757e3e1 309 do {
7ad1a093 310 union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
e757e3e1
AD		 311
312 /* if next_to_watch is not set then there is no work pending */
313 if (!eop_desc)
314 break;
315
316 /* prevent any other reads prior to eop_desc */
317 read_barrier_depends();
318
319 /* if DD is not set pending work has not been completed */
320 if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
321 break;
322
323 /* clear next_to_watch to prevent false hangs */
7ad1a093 324 tx_buffer->next_to_watch = NULL;
e757e3e1 325
7ad1a093
ET		 326 /* update the statistics for this packet */
327 total_bytes += tx_buffer->bytecount;
328 total_packets += tx_buffer->gso_segs;
92915f71 329
9bdfefd2
ET		 330 /* free the skb */
331 dev_kfree_skb_any(tx_buffer->skb);
332
333 /* unmap skb header data */
334 dma_unmap_single(tx_ring->dev,
335 dma_unmap_addr(tx_buffer, dma),
336 dma_unmap_len(tx_buffer, len),
337 DMA_TO_DEVICE);
338
7ad1a093 339 /* clear tx_buffer data */
9bdfefd2
ET		 340 tx_buffer->skb = NULL;
341 dma_unmap_len_set(tx_buffer, len, 0);
92915f71 342
7ad1a093
ET		 343 /* unmap remaining buffers */
344 while (tx_desc != eop_desc) {
7ad1a093
ET		 345 tx_buffer++;
346 tx_desc++;
92915f71 347 i++;
7ad1a093
ET		 348 if (unlikely(!i)) {
349 i -= tx_ring->count;
350 tx_buffer = tx_ring->tx_buffer_info;
351 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
352 }
e757e3e1 353
9bdfefd2
ET		 354 /* unmap any remaining paged data */
355 if (dma_unmap_len(tx_buffer, len)) {
356 dma_unmap_page(tx_ring->dev,
357 dma_unmap_addr(tx_buffer, dma),
358 dma_unmap_len(tx_buffer, len),
359 DMA_TO_DEVICE);
360 dma_unmap_len_set(tx_buffer, len, 0);
361 }
92915f71
GR		 362 }
363
7ad1a093
ET		 364 /* move us one more past the eop_desc for start of next pkt */
365 tx_buffer++;
366 tx_desc++;
367 i++;
368 if (unlikely(!i)) {
369 i -= tx_ring->count;
370 tx_buffer = tx_ring->tx_buffer_info;
371 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
372 }
373
374 /* issue prefetch for next Tx descriptor */
375 prefetch(tx_desc);
376
377 /* update budget accounting */
378 budget--;
379 } while (likely(budget));
380
381 i += tx_ring->count;
92915f71 382 tx_ring->next_to_clean = i;
7ad1a093
ET		 383 u64_stats_update_begin(&tx_ring->syncp);
384 tx_ring->stats.bytes += total_bytes;
385 tx_ring->stats.packets += total_packets;
386 u64_stats_update_end(&tx_ring->syncp);
387 q_vector->tx.total_bytes += total_bytes;
388 q_vector->tx.total_packets += total_packets;
92915f71 389
e08400b7
ET		 390 if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
391 struct ixgbe_hw *hw = &adapter->hw;
392 union ixgbe_adv_tx_desc *eop_desc;
393
394 eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
395
396 pr_err("Detected Tx Unit Hang\n"
397 " Tx Queue <%d>\n"
398 " TDH, TDT <%x>, <%x>\n"
399 " next_to_use <%x>\n"
400 " next_to_clean <%x>\n"
401 "tx_buffer_info[next_to_clean]\n"
402 " next_to_watch <%p>\n"
403 " eop_desc->wb.status <%x>\n"
404 " time_stamp <%lx>\n"
405 " jiffies <%lx>\n",
406 tx_ring->queue_index,
407 IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
408 IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
409 tx_ring->next_to_use, i,
410 eop_desc, (eop_desc ? eop_desc->wb.status : 0),
411 tx_ring->tx_buffer_info[i].time_stamp, jiffies);
412
413 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
414
415 /* schedule immediate reset if we believe we hung */
9ac5c5cc 416 ixgbevf_tx_timeout_reset(adapter);
e08400b7
ET		 417
418 return true;
419 }
420
92915f71 421#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7ad1a093 422 if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
f880d07b 423 (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
92915f71
GR		 424 /* Make sure that anybody stopping the queue after this
425 * sees the new next_to_clean.
426 */
427 smp_mb();
7ad1a093 428
fb40195c
AD		 429 if (__netif_subqueue_stopped(tx_ring->netdev,
430 tx_ring->queue_index) &&
92915f71 431 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
fb40195c
AD		 432 netif_wake_subqueue(tx_ring->netdev,
433 tx_ring->queue_index);
7ad1a093 434 ++tx_ring->tx_stats.restart_queue;
92915f71 435 }
92915f71
GR		 436 }
437
7ad1a093 438 return !!budget;
92915f71
GR		 439}
440
08681618
JK		 441/**
442 * ixgbevf_rx_skb - Helper function to determine proper Rx method
443 * @q_vector: structure containing interrupt and ring information
444 * @skb: packet to send up
08681618
JK		 445 **/
446static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
dff80520 447 struct sk_buff *skb)
08681618 448{
c777cdfa
JK		 449#ifdef CONFIG_NET_RX_BUSY_POLL
450 skb_mark_napi_id(skb, &q_vector->napi);
451
452 if (ixgbevf_qv_busy_polling(q_vector)) {
453 netif_receive_skb(skb);
454 /* exit early if we busy polled */
455 return;
456 }
457#endif /* CONFIG_NET_RX_BUSY_POLL */
688ff32d
ET		 458
459 napi_gro_receive(&q_vector->napi, skb);
08681618
JK		 460}
461
1e1429d6
FD		 462#define IXGBE_RSS_L4_TYPES_MASK \
463 ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
464 (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
465 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
466 (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
467
468static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
469 union ixgbe_adv_rx_desc *rx_desc,
470 struct sk_buff *skb)
471{
472 u16 rss_type;
473
474 if (!(ring->netdev->features & NETIF_F_RXHASH))
475 return;
476
477 rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
478 IXGBE_RXDADV_RSSTYPE_MASK;
479
480 if (!rss_type)
481 return;
482
483 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
484 (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
485 PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
486}
487
dec0d8e4
JK		 488/**
489 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
ec62fe26
ET		 490 * @ring: structure containig ring specific data
491 * @rx_desc: current Rx descriptor being processed
92915f71 492 * @skb: skb currently being received and modified
dec0d8e4 493 **/
55fb277c 494static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
ec62fe26
ET		 495 union ixgbe_adv_rx_desc *rx_desc,
496 struct sk_buff *skb)
92915f71 497{
bc8acf2c 498 skb_checksum_none_assert(skb);
92915f71
GR		 499
500 /* Rx csum disabled */
fb40195c 501 if (!(ring->netdev->features & NETIF_F_RXCSUM))
92915f71
GR		 502 return;
503
504 /* if IP and error */
ec62fe26
ET		 505 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
506 ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
095e2617 507 ring->rx_stats.csum_err++;
92915f71
GR		 508 return;
509 }
510
ec62fe26 511 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
92915f71
GR		 512 return;
513
ec62fe26 514 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
095e2617 515 ring->rx_stats.csum_err++;
92915f71
GR		 516 return;
517 }
518
519 /* It must be a TCP or UDP packet with a valid checksum */
520 skb->ip_summed = CHECKSUM_UNNECESSARY;
92915f71
GR		 521}
522
dec0d8e4
JK		 523/**
524 * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
dff80520
ET		 525 * @rx_ring: rx descriptor ring packet is being transacted on
526 * @rx_desc: pointer to the EOP Rx descriptor
527 * @skb: pointer to current skb being populated
528 *
529 * This function checks the ring, descriptor, and packet information in
530 * order to populate the checksum, VLAN, protocol, and other fields within
531 * the skb.
dec0d8e4 532 **/
dff80520
ET		 533static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
534 union ixgbe_adv_rx_desc *rx_desc,
535 struct sk_buff *skb)
536{
1e1429d6 537 ixgbevf_rx_hash(rx_ring, rx_desc, skb);
dff80520
ET		 538 ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
539
540 if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
541 u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
542 unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
543
544 if (test_bit(vid & VLAN_VID_MASK, active_vlans))
545 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
546 }
547
548 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
549}
550
4b95fe3d
ET		 551/**
552 * ixgbevf_is_non_eop - process handling of non-EOP buffers
553 * @rx_ring: Rx ring being processed
554 * @rx_desc: Rx descriptor for current buffer
555 * @skb: current socket buffer containing buffer in progress
556 *
557 * This function updates next to clean. If the buffer is an EOP buffer
558 * this function exits returning false, otherwise it will place the
559 * sk_buff in the next buffer to be chained and return true indicating
560 * that this is in fact a non-EOP buffer.
561 **/
562static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
bad17234 563 union ixgbe_adv_rx_desc *rx_desc)
4b95fe3d
ET		 564{
565 u32 ntc = rx_ring->next_to_clean + 1;
566
567 /* fetch, update, and store next to clean */
568 ntc = (ntc < rx_ring->count) ? ntc : 0;
569 rx_ring->next_to_clean = ntc;
570
571 prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
572
573 if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
574 return false;
575
576 return true;
577}
578
bad17234
ET		 579static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
580 struct ixgbevf_rx_buffer *bi)
bafa578f 581{
bad17234 582 struct page *page = bi->page;
bafa578f
ET		 583 dma_addr_t dma = bi->dma;
584
bad17234
ET		 585 /* since we are recycling buffers we should seldom need to alloc */
586 if (likely(page))
bafa578f
ET		 587 return true;
588
bad17234
ET		 589 /* alloc new page for storage */
590 page = dev_alloc_page();
591 if (unlikely(!page)) {
592 rx_ring->rx_stats.alloc_rx_page_failed++;
bafa578f
ET		 593 return false;
594 }
595
bad17234
ET		 596 /* map page for use */
597 dma = dma_map_page(rx_ring->dev, page, 0,
598 PAGE_SIZE, DMA_FROM_DEVICE);
bafa578f
ET		 599
600 /* if mapping failed free memory back to system since
601 * there isn't much point in holding memory we can't use
602 */
603 if (dma_mapping_error(rx_ring->dev, dma)) {
bad17234 604 __free_page(page);
bafa578f
ET		 605
606 rx_ring->rx_stats.alloc_rx_buff_failed++;
607 return false;
608 }
609
bafa578f 610 bi->dma = dma;
bad17234
ET		 611 bi->page = page;
612 bi->page_offset = 0;
bafa578f
ET		 613
614 return true;
615}
616
92915f71
GR		 617/**
618 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
095e2617 619 * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
bafa578f 620 * @cleaned_count: number of buffers to replace
92915f71 621 **/
095e2617 622static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
bafa578f 623 u16 cleaned_count)
92915f71 624{
92915f71
GR		 625 union ixgbe_adv_rx_desc *rx_desc;
626 struct ixgbevf_rx_buffer *bi;
fb40195c 627 unsigned int i = rx_ring->next_to_use;
92915f71 628
bafa578f
ET		 629 /* nothing to do or no valid netdev defined */
630 if (!cleaned_count || !rx_ring->netdev)
631 return;
b9dd245b 632
bafa578f
ET		 633 rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
634 bi = &rx_ring->rx_buffer_info[i];
635 i -= rx_ring->count;
05d063aa 636
bafa578f 637 do {
bad17234 638 if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
bafa578f 639 break;
b9dd245b 640
bafa578f
ET		 641 /* Refresh the desc even if pkt_addr didn't change
642 * because each write-back erases this info.
643 */
bad17234 644 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
92915f71 645
bafa578f
ET		 646 rx_desc++;
647 bi++;
92915f71 648 i++;
bafa578f
ET		 649 if (unlikely(!i)) {
650 rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
651 bi = rx_ring->rx_buffer_info;
652 i -= rx_ring->count;
653 }
654
655 /* clear the hdr_addr for the next_to_use descriptor */
656 rx_desc->read.hdr_addr = 0;
657
658 cleaned_count--;
659 } while (cleaned_count);
660
661 i += rx_ring->count;
92915f71 662
bafa578f
ET		 663 if (rx_ring->next_to_use != i) {
664 /* record the next descriptor to use */
665 rx_ring->next_to_use = i;
666
bad17234
ET		 667 /* update next to alloc since we have filled the ring */
668 rx_ring->next_to_alloc = i;
669
bafa578f
ET		 670 /* Force memory writes to complete before letting h/w
671 * know there are new descriptors to fetch. (Only
672 * applicable for weak-ordered memory model archs,
673 * such as IA-64).
674 */
675 wmb();
676 ixgbevf_write_tail(rx_ring, i);
677 }
92915f71
GR		 678}
679
dec0d8e4
JK		 680/**
681 * ixgbevf_cleanup_headers - Correct corrupted or empty headers
bad17234
ET		 682 * @rx_ring: rx descriptor ring packet is being transacted on
683 * @rx_desc: pointer to the EOP Rx descriptor
684 * @skb: pointer to current skb being fixed
685 *
686 * Check for corrupted packet headers caused by senders on the local L2
687 * embedded NIC switch not setting up their Tx Descriptors right. These
688 * should be very rare.
689 *
690 * Also address the case where we are pulling data in on pages only
691 * and as such no data is present in the skb header.
692 *
693 * In addition if skb is not at least 60 bytes we need to pad it so that
694 * it is large enough to qualify as a valid Ethernet frame.
695 *
696 * Returns true if an error was encountered and skb was freed.
dec0d8e4 697 **/
bad17234
ET		 698static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
699 union ixgbe_adv_rx_desc *rx_desc,
700 struct sk_buff *skb)
701{
702 /* verify that the packet does not have any known errors */
703 if (unlikely(ixgbevf_test_staterr(rx_desc,
704 IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
705 struct net_device *netdev = rx_ring->netdev;
706
707 if (!(netdev->features & NETIF_F_RXALL)) {
708 dev_kfree_skb_any(skb);
709 return true;
710 }
711 }
712
a94d9e22
AD		 713 /* if eth_skb_pad returns an error the skb was freed */
714 if (eth_skb_pad(skb))
715 return true;
bad17234
ET		 716
717 return false;
718}
719
dec0d8e4
JK		 720/**
721 * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
bad17234
ET		 722 * @rx_ring: rx descriptor ring to store buffers on
723 * @old_buff: donor buffer to have page reused
724 *
725 * Synchronizes page for reuse by the adapter
dec0d8e4 726 **/
bad17234
ET		 727static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
728 struct ixgbevf_rx_buffer *old_buff)
729{
730 struct ixgbevf_rx_buffer *new_buff;
731 u16 nta = rx_ring->next_to_alloc;
732
733 new_buff = &rx_ring->rx_buffer_info[nta];
734
735 /* update, and store next to alloc */
736 nta++;
737 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
738
739 /* transfer page from old buffer to new buffer */
740 new_buff->page = old_buff->page;
741 new_buff->dma = old_buff->dma;
742 new_buff->page_offset = old_buff->page_offset;
743
744 /* sync the buffer for use by the device */
745 dma_sync_single_range_for_device(rx_ring->dev, new_buff->dma,
746 new_buff->page_offset,
747 IXGBEVF_RX_BUFSZ,
748 DMA_FROM_DEVICE);
749}
750
751static inline bool ixgbevf_page_is_reserved(struct page *page)
752{
2f064f34 753 return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
bad17234
ET		 754}
755
dec0d8e4
JK		 756/**
757 * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
bad17234
ET		 758 * @rx_ring: rx descriptor ring to transact packets on
759 * @rx_buffer: buffer containing page to add
760 * @rx_desc: descriptor containing length of buffer written by hardware
761 * @skb: sk_buff to place the data into
762 *
763 * This function will add the data contained in rx_buffer->page to the skb.
764 * This is done either through a direct copy if the data in the buffer is
765 * less than the skb header size, otherwise it will just attach the page as
766 * a frag to the skb.
767 *
768 * The function will then update the page offset if necessary and return
769 * true if the buffer can be reused by the adapter.
dec0d8e4 770 **/
bad17234
ET		 771static bool ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
772 struct ixgbevf_rx_buffer *rx_buffer,
773 union ixgbe_adv_rx_desc *rx_desc,
774 struct sk_buff *skb)
775{
776 struct page *page = rx_buffer->page;
5505bdb5 777 unsigned char *va = page_address(page) + rx_buffer->page_offset;
bad17234
ET		 778 unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
779#if (PAGE_SIZE < 8192)
780 unsigned int truesize = IXGBEVF_RX_BUFSZ;
781#else
782 unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
783#endif
5505bdb5 784 unsigned int pull_len;
bad17234 785
5505bdb5
AD		 786 if (unlikely(skb_is_nonlinear(skb)))
787 goto add_tail_frag;
bad17234 788
5505bdb5 789 if (likely(size <= IXGBEVF_RX_HDR_SIZE)) {
bad17234
ET		 790 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
791
792 /* page is not reserved, we can reuse buffer as is */
793 if (likely(!ixgbevf_page_is_reserved(page)))
794 return true;
795
796 /* this page cannot be reused so discard it */
797 put_page(page);
798 return false;
799 }
800
5505bdb5
AD		 801 /* we need the header to contain the greater of either ETH_HLEN or
802 * 60 bytes if the skb->len is less than 60 for skb_pad.
803 */
804 pull_len = eth_get_headlen(va, IXGBEVF_RX_HDR_SIZE);
805
806 /* align pull length to size of long to optimize memcpy performance */
807 memcpy(__skb_put(skb, pull_len), va, ALIGN(pull_len, sizeof(long)));
808
809 /* update all of the pointers */
810 va += pull_len;
811 size -= pull_len;
812
813add_tail_frag:
bad17234 814 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
5505bdb5 815 (unsigned long)va & ~PAGE_MASK, size, truesize);
bad17234
ET		 816
817 /* avoid re-using remote pages */
818 if (unlikely(ixgbevf_page_is_reserved(page)))
819 return false;
820
821#if (PAGE_SIZE < 8192)
822 /* if we are only owner of page we can reuse it */
823 if (unlikely(page_count(page) != 1))
824 return false;
825
826 /* flip page offset to other buffer */
827 rx_buffer->page_offset ^= IXGBEVF_RX_BUFSZ;
828
829#else
830 /* move offset up to the next cache line */
831 rx_buffer->page_offset += truesize;
832
833 if (rx_buffer->page_offset > (PAGE_SIZE - IXGBEVF_RX_BUFSZ))
834 return false;
835
836#endif
837 /* Even if we own the page, we are not allowed to use atomic_set()
838 * This would break get_page_unless_zero() users.
839 */
fe896d18 840 page_ref_inc(page);
bad17234
ET		 841
842 return true;
843}
844
845static struct sk_buff *ixgbevf_fetch_rx_buffer(struct ixgbevf_ring *rx_ring,
846 union ixgbe_adv_rx_desc *rx_desc,
847 struct sk_buff *skb)
848{
849 struct ixgbevf_rx_buffer *rx_buffer;
850 struct page *page;
851
852 rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
853 page = rx_buffer->page;
854 prefetchw(page);
855
856 if (likely(!skb)) {
857 void *page_addr = page_address(page) +
858 rx_buffer->page_offset;
859
860 /* prefetch first cache line of first page */
861 prefetch(page_addr);
862#if L1_CACHE_BYTES < 128
863 prefetch(page_addr + L1_CACHE_BYTES);
864#endif
865
866 /* allocate a skb to store the frags */
867 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
868 IXGBEVF_RX_HDR_SIZE);
869 if (unlikely(!skb)) {
870 rx_ring->rx_stats.alloc_rx_buff_failed++;
871 return NULL;
872 }
873
874 /* we will be copying header into skb->data in
875 * pskb_may_pull so it is in our interest to prefetch
876 * it now to avoid a possible cache miss
877 */
878 prefetchw(skb->data);
879 }
880
881 /* we are reusing so sync this buffer for CPU use */
882 dma_sync_single_range_for_cpu(rx_ring->dev,
883 rx_buffer->dma,
884 rx_buffer->page_offset,
885 IXGBEVF_RX_BUFSZ,
886 DMA_FROM_DEVICE);
887
888 /* pull page into skb */
889 if (ixgbevf_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
890 /* hand second half of page back to the ring */
891 ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
892 } else {
893 /* we are not reusing the buffer so unmap it */
894 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
895 PAGE_SIZE, DMA_FROM_DEVICE);
896 }
897
898 /* clear contents of buffer_info */
899 rx_buffer->dma = 0;
900 rx_buffer->page = NULL;
901
902 return skb;
903}
904
92915f71 905static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
5f3600eb 906 u32 qmask)
92915f71 907{
92915f71
GR		 908 struct ixgbe_hw *hw = &adapter->hw;
909
5f3600eb 910 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
92915f71
GR		 911}
912
08e50a20
JK		 913static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
914 struct ixgbevf_ring *rx_ring,
915 int budget)
92915f71 916{
92915f71 917 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
bafa578f 918 u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
bad17234 919 struct sk_buff *skb = rx_ring->skb;
92915f71 920
6622402a 921 while (likely(total_rx_packets < budget)) {
4b95fe3d 922 union ixgbe_adv_rx_desc *rx_desc;
b97fe3b1 923
0579eefc
ET		 924 /* return some buffers to hardware, one at a time is too slow */
925 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
926 ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
927 cleaned_count = 0;
928 }
929
bad17234 930 rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
0579eefc
ET		 931
932 if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_DD))
92915f71 933 break;
92915f71 934
0579eefc
ET		 935 /* This memory barrier is needed to keep us from reading
936 * any other fields out of the rx_desc until we know the
937 * RXD_STAT_DD bit is set
938 */
939 rmb();
ec62fe26 940
bad17234
ET		 941 /* retrieve a buffer from the ring */
942 skb = ixgbevf_fetch_rx_buffer(rx_ring, rx_desc, skb);
0579eefc 943
bad17234
ET		 944 /* exit if we failed to retrieve a buffer */
945 if (!skb)
946 break;
92915f71 947
b97fe3b1
ET		 948 cleaned_count++;
949
bad17234
ET		 950 /* fetch next buffer in frame if non-eop */
951 if (ixgbevf_is_non_eop(rx_ring, rx_desc))
0579eefc 952 continue;
5c60f81a 953
bad17234
ET		 954 /* verify the packet layout is correct */
955 if (ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
956 skb = NULL;
0579eefc 957 continue;
92915f71
GR		 958 }
959
92915f71
GR		 960 /* probably a little skewed due to removing CRC */
961 total_rx_bytes += skb->len;
92915f71 962
815cccbf
JF		 963 /* Workaround hardware that can't do proper VEPA multicast
964 * source pruning.
965 */
bd9d5592 966 if ((skb->pkt_type == PACKET_BROADCAST ||
dec0d8e4 967 skb->pkt_type == PACKET_MULTICAST) &&
095e2617 968 ether_addr_equal(rx_ring->netdev->dev_addr,
7367d0b5 969 eth_hdr(skb)->h_source)) {
815cccbf 970 dev_kfree_skb_irq(skb);
0579eefc 971 continue;
815cccbf
JF		 972 }
973
dff80520
ET		 974 /* populate checksum, VLAN, and protocol */
975 ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
976
977 ixgbevf_rx_skb(q_vector, skb);
92915f71 978
bad17234
ET		 979 /* reset skb pointer */
980 skb = NULL;
981
0579eefc 982 /* update budget accounting */
6622402a
ET		 983 total_rx_packets++;
984 }
92915f71 985
bad17234
ET		 986 /* place incomplete frames back on ring for completion */
987 rx_ring->skb = skb;
988
4197aa7b 989 u64_stats_update_begin(&rx_ring->syncp);
095e2617
ET		 990 rx_ring->stats.packets += total_rx_packets;
991 rx_ring->stats.bytes += total_rx_bytes;
4197aa7b 992 u64_stats_update_end(&rx_ring->syncp);
ac6ed8f0
GR		 993 q_vector->rx.total_packets += total_rx_packets;
994 q_vector->rx.total_bytes += total_rx_bytes;
92915f71 995
08e50a20 996 return total_rx_packets;
92915f71
GR		 997}
998
999/**
fa71ae27 1000 * ixgbevf_poll - NAPI polling calback
92915f71
GR		 1001 * @napi: napi struct with our devices info in it
1002 * @budget: amount of work driver is allowed to do this pass, in packets
1003 *
fa71ae27 1004 * This function will clean more than one or more rings associated with a
92915f71
GR		 1005 * q_vector.
1006 **/
fa71ae27 1007static int ixgbevf_poll(struct napi_struct *napi, int budget)
92915f71
GR		 1008{
1009 struct ixgbevf_q_vector *q_vector =
1010 container_of(napi, struct ixgbevf_q_vector, napi);
1011 struct ixgbevf_adapter *adapter = q_vector->adapter;
fa71ae27 1012 struct ixgbevf_ring *ring;
32b3e08f 1013 int per_ring_budget, work_done = 0;
fa71ae27
AD		 1014 bool clean_complete = true;
1015
1016 ixgbevf_for_each_ring(ring, q_vector->tx)
1017 clean_complete &= ixgbevf_clean_tx_irq(q_vector, ring);
92915f71 1018
d0f71aff
WD		 1019 if (budget <= 0)
1020 return budget;
c777cdfa
JK		 1021#ifdef CONFIG_NET_RX_BUSY_POLL
1022 if (!ixgbevf_qv_lock_napi(q_vector))
1023 return budget;
1024#endif
1025
92915f71 1026 /* attempt to distribute budget to each queue fairly, but don't allow
dec0d8e4
JK		 1027 * the budget to go below 1 because we'll exit polling
1028 */
fa71ae27
AD		 1029 if (q_vector->rx.count > 1)
1030 per_ring_budget = max(budget/q_vector->rx.count, 1);
1031 else
1032 per_ring_budget = budget;
1033
32b3e08f
JB		 1034 ixgbevf_for_each_ring(ring, q_vector->rx) {
1035 int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
1036 per_ring_budget);
1037 work_done += cleaned;
1038 clean_complete &= (cleaned < per_ring_budget);
1039 }
fa71ae27 1040
c777cdfa
JK		 1041#ifdef CONFIG_NET_RX_BUSY_POLL
1042 ixgbevf_qv_unlock_napi(q_vector);
1043#endif
1044
fa71ae27
AD		 1045 /* If all work not completed, return budget and keep polling */
1046 if (!clean_complete)
1047 return budget;
1048 /* all work done, exit the polling mode */
32b3e08f 1049 napi_complete_done(napi, work_done);
9ad3d6f7 1050 if (adapter->rx_itr_setting == 1)
fa71ae27 1051 ixgbevf_set_itr(q_vector);
2e7cfbdd
MR		 1052 if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
1053 !test_bit(__IXGBEVF_REMOVING, &adapter->state))
fa71ae27
AD		 1054 ixgbevf_irq_enable_queues(adapter,
1055 1 << q_vector->v_idx);
92915f71 1056
fa71ae27 1057 return 0;
92915f71
GR		 1058}
1059
ce422606
GR		 1060/**
1061 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
1062 * @q_vector: structure containing interrupt and ring information
dec0d8e4 1063 **/
3849623e 1064void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
ce422606
GR		 1065{
1066 struct ixgbevf_adapter *adapter = q_vector->adapter;
1067 struct ixgbe_hw *hw = &adapter->hw;
1068 int v_idx = q_vector->v_idx;
1069 u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
1070
dec0d8e4 1071 /* set the WDIS bit to not clear the timer bits and cause an
ce422606
GR		 1072 * immediate assertion of the interrupt
1073 */
1074 itr_reg |= IXGBE_EITR_CNT_WDIS;
1075
1076 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
1077}
92915f71 1078
c777cdfa
JK		 1079#ifdef CONFIG_NET_RX_BUSY_POLL
1080/* must be called with local_bh_disable()d */
1081static int ixgbevf_busy_poll_recv(struct napi_struct *napi)
1082{
1083 struct ixgbevf_q_vector *q_vector =
1084 container_of(napi, struct ixgbevf_q_vector, napi);
1085 struct ixgbevf_adapter *adapter = q_vector->adapter;
1086 struct ixgbevf_ring *ring;
1087 int found = 0;
1088
1089 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
1090 return LL_FLUSH_FAILED;
1091
1092 if (!ixgbevf_qv_lock_poll(q_vector))
1093 return LL_FLUSH_BUSY;
1094
1095 ixgbevf_for_each_ring(ring, q_vector->rx) {
1096 found = ixgbevf_clean_rx_irq(q_vector, ring, 4);
3b5dca26
JK		 1097#ifdef BP_EXTENDED_STATS
1098 if (found)
095e2617 1099 ring->stats.cleaned += found;
3b5dca26 1100 else
095e2617 1101 ring->stats.misses++;
3b5dca26 1102#endif
c777cdfa
JK		 1103 if (found)
1104 break;
1105 }
1106
1107 ixgbevf_qv_unlock_poll(q_vector);
1108
1109 return found;
1110}
1111#endif /* CONFIG_NET_RX_BUSY_POLL */
1112
92915f71
GR		 1113/**
1114 * ixgbevf_configure_msix - Configure MSI-X hardware
1115 * @adapter: board private structure
1116 *
1117 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
1118 * interrupts.
1119 **/
1120static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
1121{
1122 struct ixgbevf_q_vector *q_vector;
6b43c446 1123 int q_vectors, v_idx;
92915f71
GR		 1124
1125 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
5f3600eb 1126 adapter->eims_enable_mask = 0;
92915f71 1127
dec0d8e4 1128 /* Populate the IVAR table and set the ITR values to the
92915f71
GR		 1129 * corresponding register.
1130 */
1131 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
6b43c446 1132 struct ixgbevf_ring *ring;
dec0d8e4 1133
92915f71 1134 q_vector = adapter->q_vector[v_idx];
6b43c446
AD		 1135
1136 ixgbevf_for_each_ring(ring, q_vector->rx)
1137 ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
1138
1139 ixgbevf_for_each_ring(ring, q_vector->tx)
1140 ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
92915f71 1141
5f3600eb 1142 if (q_vector->tx.ring && !q_vector->rx.ring) {
dec0d8e4 1143 /* Tx only vector */
5f3600eb 1144 if (adapter->tx_itr_setting == 1)
8a9ca110 1145 q_vector->itr = IXGBE_12K_ITR;
5f3600eb
AD		 1146 else
1147 q_vector->itr = adapter->tx_itr_setting;
1148 } else {
dec0d8e4 1149 /* Rx or Rx/Tx vector */
5f3600eb
AD		 1150 if (adapter->rx_itr_setting == 1)
1151 q_vector->itr = IXGBE_20K_ITR;
1152 else
1153 q_vector->itr = adapter->rx_itr_setting;
1154 }
1155
1156 /* add q_vector eims value to global eims_enable_mask */
1157 adapter->eims_enable_mask |= 1 << v_idx;
92915f71 1158
5f3600eb 1159 ixgbevf_write_eitr(q_vector);
92915f71
GR		 1160 }
1161
1162 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
5f3600eb
AD		 1163 /* setup eims_other and add value to global eims_enable_mask */
1164 adapter->eims_other = 1 << v_idx;
1165 adapter->eims_enable_mask |= adapter->eims_other;
92915f71
GR		 1166}
1167
1168enum latency_range {
1169 lowest_latency = 0,
1170 low_latency = 1,
1171 bulk_latency = 2,
1172 latency_invalid = 255
1173};
1174
1175/**
1176 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
5f3600eb
AD		 1177 * @q_vector: structure containing interrupt and ring information
1178 * @ring_container: structure containing ring performance data
92915f71 1179 *
dec0d8e4
JK		 1180 * Stores a new ITR value based on packets and byte
1181 * counts during the last interrupt. The advantage of per interrupt
1182 * computation is faster updates and more accurate ITR for the current
1183 * traffic pattern. Constants in this function were computed
1184 * based on theoretical maximum wire speed and thresholds were set based
1185 * on testing data as well as attempting to minimize response time
1186 * while increasing bulk throughput.
92915f71 1187 **/
5f3600eb
AD		 1188static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
1189 struct ixgbevf_ring_container *ring_container)
92915f71 1190{
5f3600eb
AD		 1191 int bytes = ring_container->total_bytes;
1192 int packets = ring_container->total_packets;
92915f71
GR		 1193 u32 timepassed_us;
1194 u64 bytes_perint;
5f3600eb 1195 u8 itr_setting = ring_container->itr;
92915f71
GR		 1196
1197 if (packets == 0)
5f3600eb 1198 return;
92915f71 1199
dec0d8e4 1200 /* simple throttle rate management
92915f71
GR		 1201 * 0-20MB/s lowest (100000 ints/s)
1202 * 20-100MB/s low (20000 ints/s)
8a9ca110 1203 * 100-1249MB/s bulk (12000 ints/s)
92915f71
GR		 1204 */
1205 /* what was last interrupt timeslice? */
5f3600eb 1206 timepassed_us = q_vector->itr >> 2;
92915f71
GR		 1207 bytes_perint = bytes / timepassed_us; /* bytes/usec */
1208
1209 switch (itr_setting) {
1210 case lowest_latency:
e2c28ce7 1211 if (bytes_perint > 10)
5f3600eb 1212 itr_setting = low_latency;
92915f71
GR		 1213 break;
1214 case low_latency:
e2c28ce7 1215 if (bytes_perint > 20)
5f3600eb 1216 itr_setting = bulk_latency;
e2c28ce7 1217 else if (bytes_perint <= 10)
5f3600eb 1218 itr_setting = lowest_latency;
92915f71
GR		 1219 break;
1220 case bulk_latency:
e2c28ce7 1221 if (bytes_perint <= 20)
5f3600eb 1222 itr_setting = low_latency;
92915f71
GR		 1223 break;
1224 }
1225
5f3600eb
AD		 1226 /* clear work counters since we have the values we need */
1227 ring_container->total_bytes = 0;
1228 ring_container->total_packets = 0;
1229
1230 /* write updated itr to ring container */
1231 ring_container->itr = itr_setting;
92915f71
GR		 1232}
1233
fa71ae27 1234static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
92915f71 1235{
5f3600eb
AD		 1236 u32 new_itr = q_vector->itr;
1237 u8 current_itr;
92915f71 1238
5f3600eb
AD		 1239 ixgbevf_update_itr(q_vector, &q_vector->tx);
1240 ixgbevf_update_itr(q_vector, &q_vector->rx);
92915f71 1241
6b43c446 1242 current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
92915f71
GR		 1243
1244 switch (current_itr) {
1245 /* counts and packets in update_itr are dependent on these numbers */
1246 case lowest_latency:
5f3600eb 1247 new_itr = IXGBE_100K_ITR;
92915f71
GR		 1248 break;
1249 case low_latency:
5f3600eb 1250 new_itr = IXGBE_20K_ITR;
92915f71
GR		 1251 break;
1252 case bulk_latency:
8a9ca110 1253 new_itr = IXGBE_12K_ITR;
92915f71 1254 break;
9ad3d6f7
ET		 1255 default:
1256 break;
92915f71
GR		 1257 }
1258
5f3600eb 1259 if (new_itr != q_vector->itr) {
92915f71 1260 /* do an exponential smoothing */
5f3600eb
AD		 1261 new_itr = (10 * new_itr * q_vector->itr) /
1262 ((9 * new_itr) + q_vector->itr);
1263
1264 /* save the algorithm value here */
1265 q_vector->itr = new_itr;
1266
1267 ixgbevf_write_eitr(q_vector);
92915f71 1268 }
92915f71
GR		 1269}
1270
4b2cd27f 1271static irqreturn_t ixgbevf_msix_other(int irq, void *data)
92915f71 1272{
fa71ae27 1273 struct ixgbevf_adapter *adapter = data;
92915f71 1274 struct ixgbe_hw *hw = &adapter->hw;
08259594 1275
4b2cd27f 1276 hw->mac.get_link_status = 1;
1e72bfc3 1277
9ac5c5cc 1278 ixgbevf_service_event_schedule(adapter);
3a2c4033 1279
5f3600eb
AD		 1280 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
1281
92915f71
GR		 1282 return IRQ_HANDLED;
1283}
1284
92915f71 1285/**
fa71ae27 1286 * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
92915f71
GR		 1287 * @irq: unused
1288 * @data: pointer to our q_vector struct for this interrupt vector
1289 **/
fa71ae27 1290static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
92915f71
GR		 1291{
1292 struct ixgbevf_q_vector *q_vector = data;
92915f71 1293
5f3600eb 1294 /* EIAM disabled interrupts (on this vector) for us */
fa71ae27 1295 if (q_vector->rx.ring || q_vector->tx.ring)
ef2662b2 1296 napi_schedule_irqoff(&q_vector->napi);
92915f71
GR		 1297
1298 return IRQ_HANDLED;
1299}
1300
1301static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1302 int r_idx)
1303{
1304 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1305
87e70ab9
DS		 1306 a->rx_ring[r_idx]->next = q_vector->rx.ring;
1307 q_vector->rx.ring = a->rx_ring[r_idx];
6b43c446 1308 q_vector->rx.count++;
92915f71
GR		 1309}
1310
1311static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1312 int t_idx)
1313{
1314 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1315
87e70ab9
DS		 1316 a->tx_ring[t_idx]->next = q_vector->tx.ring;
1317 q_vector->tx.ring = a->tx_ring[t_idx];
6b43c446 1318 q_vector->tx.count++;
92915f71
GR		 1319}
1320
1321/**
1322 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1323 * @adapter: board private structure to initialize
1324 *
1325 * This function maps descriptor rings to the queue-specific vectors
1326 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1327 * one vector per ring/queue, but on a constrained vector budget, we
1328 * group the rings as "efficiently" as possible. You would add new
1329 * mapping configurations in here.
1330 **/
1331static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1332{
1333 int q_vectors;
1334 int v_start = 0;
1335 int rxr_idx = 0, txr_idx = 0;
1336 int rxr_remaining = adapter->num_rx_queues;
1337 int txr_remaining = adapter->num_tx_queues;
1338 int i, j;
1339 int rqpv, tqpv;
92915f71
GR		 1340
1341 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1342
dec0d8e4 1343 /* The ideal configuration...
92915f71
GR		 1344 * We have enough vectors to map one per queue.
1345 */
1346 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1347 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1348 map_vector_to_rxq(adapter, v_start, rxr_idx);
1349
1350 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1351 map_vector_to_txq(adapter, v_start, txr_idx);
50985b5f 1352 return 0;
92915f71
GR		 1353 }
1354
dec0d8e4 1355 /* If we don't have enough vectors for a 1-to-1
92915f71
GR		 1356 * mapping, we'll have to group them so there are
1357 * multiple queues per vector.
1358 */
1359 /* Re-adjusting *qpv takes care of the remainder. */
1360 for (i = v_start; i < q_vectors; i++) {
1361 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1362 for (j = 0; j < rqpv; j++) {
1363 map_vector_to_rxq(adapter, i, rxr_idx);
1364 rxr_idx++;
1365 rxr_remaining--;
1366 }
1367 }
1368 for (i = v_start; i < q_vectors; i++) {
1369 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1370 for (j = 0; j < tqpv; j++) {
1371 map_vector_to_txq(adapter, i, txr_idx);
1372 txr_idx++;
1373 txr_remaining--;
1374 }
1375 }
1376
50985b5f 1377 return 0;
92915f71
GR		 1378}
1379
1380/**
1381 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1382 * @adapter: board private structure
1383 *
1384 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1385 * interrupts from the kernel.
1386 **/
1387static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1388{
1389 struct net_device *netdev = adapter->netdev;
fa71ae27
AD		 1390 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1391 int vector, err;
92915f71
GR		 1392 int ri = 0, ti = 0;
1393
92915f71 1394 for (vector = 0; vector < q_vectors; vector++) {
fa71ae27
AD		 1395 struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
1396 struct msix_entry *entry = &adapter->msix_entries[vector];
1397
1398 if (q_vector->tx.ring && q_vector->rx.ring) {
1399 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1400 "%s-%s-%d", netdev->name, "TxRx", ri++);
1401 ti++;
1402 } else if (q_vector->rx.ring) {
1403 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1404 "%s-%s-%d", netdev->name, "rx", ri++);
1405 } else if (q_vector->tx.ring) {
1406 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
1407 "%s-%s-%d", netdev->name, "tx", ti++);
92915f71
GR		 1408 } else {
1409 /* skip this unused q_vector */
1410 continue;
1411 }
fa71ae27
AD		 1412 err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
1413 q_vector->name, q_vector);
92915f71
GR		 1414 if (err) {
1415 hw_dbg(&adapter->hw,
dec0d8e4
JK		 1416 "request_irq failed for MSIX interrupt Error: %d\n",
1417 err);
92915f71
GR		 1418 goto free_queue_irqs;
1419 }
1420 }
1421
92915f71 1422 err = request_irq(adapter->msix_entries[vector].vector,
4b2cd27f 1423 &ixgbevf_msix_other, 0, netdev->name, adapter);
92915f71 1424 if (err) {
dec0d8e4
JK		 1425 hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
1426 err);
92915f71
GR		 1427 goto free_queue_irqs;
1428 }
1429
1430 return 0;
1431
1432free_queue_irqs:
fa71ae27
AD		 1433 while (vector) {
1434 vector--;
1435 free_irq(adapter->msix_entries[vector].vector,
1436 adapter->q_vector[vector]);
1437 }
a1f6c6b1 1438 /* This failure is non-recoverable - it indicates the system is
1439 * out of MSIX vector resources and the VF driver cannot run
1440 * without them. Set the number of msix vectors to zero
1441 * indicating that not enough can be allocated. The error
1442 * will be returned to the user indicating device open failed.
1443 * Any further attempts to force the driver to open will also
1444 * fail. The only way to recover is to unload the driver and
1445 * reload it again. If the system has recovered some MSIX
1446 * vectors then it may succeed.
1447 */
1448 adapter->num_msix_vectors = 0;
92915f71
GR		 1449 return err;
1450}
1451
1452static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1453{
1454 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1455
1456 for (i = 0; i < q_vectors; i++) {
1457 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
dec0d8e4 1458
6b43c446
AD		 1459 q_vector->rx.ring = NULL;
1460 q_vector->tx.ring = NULL;
1461 q_vector->rx.count = 0;
1462 q_vector->tx.count = 0;
92915f71
GR		 1463 }
1464}
1465
1466/**
1467 * ixgbevf_request_irq - initialize interrupts
1468 * @adapter: board private structure
1469 *
1470 * Attempts to configure interrupts using the best available
1471 * capabilities of the hardware and kernel.
1472 **/
1473static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1474{
50985b5f 1475 int err = ixgbevf_request_msix_irqs(adapter);
92915f71
GR		 1476
1477 if (err)
dec0d8e4 1478 hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
92915f71
GR		 1479
1480 return err;
1481}
1482
1483static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1484{
92915f71
GR		 1485 int i, q_vectors;
1486
1487 q_vectors = adapter->num_msix_vectors;
92915f71
GR		 1488 i = q_vectors - 1;
1489
fa71ae27 1490 free_irq(adapter->msix_entries[i].vector, adapter);
92915f71
GR		 1491 i--;
1492
1493 for (; i >= 0; i--) {
fa71ae27
AD		 1494 /* free only the irqs that were actually requested */
1495 if (!adapter->q_vector[i]->rx.ring &&
1496 !adapter->q_vector[i]->tx.ring)
1497 continue;
1498
92915f71
GR		 1499 free_irq(adapter->msix_entries[i].vector,
1500 adapter->q_vector[i]);
1501 }
1502
1503 ixgbevf_reset_q_vectors(adapter);
1504}
1505
1506/**
1507 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1508 * @adapter: board private structure
1509 **/
1510static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1511{
92915f71 1512 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 1513 int i;
92915f71 1514
5f3600eb 1515 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
92915f71 1516 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
5f3600eb 1517 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
92915f71
GR		 1518
1519 IXGBE_WRITE_FLUSH(hw);
1520
1521 for (i = 0; i < adapter->num_msix_vectors; i++)
1522 synchronize_irq(adapter->msix_entries[i].vector);
1523}
1524
1525/**
1526 * ixgbevf_irq_enable - Enable default interrupt generation settings
1527 * @adapter: board private structure
1528 **/
5f3600eb 1529static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
92915f71
GR		 1530{
1531 struct ixgbe_hw *hw = &adapter->hw;
92915f71 1532
5f3600eb
AD		 1533 IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
1534 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
1535 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
92915f71
GR		 1536}
1537
de02decb
DS		 1538/**
1539 * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
1540 * @adapter: board private structure
1541 * @ring: structure containing ring specific data
1542 *
1543 * Configure the Tx descriptor ring after a reset.
1544 **/
1545static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
1546 struct ixgbevf_ring *ring)
1547{
1548 struct ixgbe_hw *hw = &adapter->hw;
1549 u64 tdba = ring->dma;
1550 int wait_loop = 10;
1551 u32 txdctl = IXGBE_TXDCTL_ENABLE;
1552 u8 reg_idx = ring->reg_idx;
1553
1554 /* disable queue to avoid issues while updating state */
1555 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1556 IXGBE_WRITE_FLUSH(hw);
1557
1558 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
1559 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
1560 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
1561 ring->count * sizeof(union ixgbe_adv_tx_desc));
1562
1563 /* disable head writeback */
1564 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
1565 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
1566
1567 /* enable relaxed ordering */
1568 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
1569 (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
1570 IXGBE_DCA_TXCTRL_DATA_RRO_EN));
1571
1572 /* reset head and tail pointers */
1573 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
1574 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
dbf8b0d8 1575 ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
de02decb
DS		 1576
1577 /* reset ntu and ntc to place SW in sync with hardwdare */
1578 ring->next_to_clean = 0;
1579 ring->next_to_use = 0;
1580
1581 /* In order to avoid issues WTHRESH + PTHRESH should always be equal
1582 * to or less than the number of on chip descriptors, which is
1583 * currently 40.
1584 */
1585 txdctl |= (8 << 16); /* WTHRESH = 8 */
1586
1587 /* Setting PTHRESH to 32 both improves performance */
1588 txdctl |= (1 << 8) | /* HTHRESH = 1 */
1589 32; /* PTHRESH = 32 */
1590
e08400b7
ET		 1591 clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
1592
de02decb
DS		 1593 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
1594
1595 /* poll to verify queue is enabled */
1596 do {
1597 usleep_range(1000, 2000);
1598 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
1599 } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
1600 if (!wait_loop)
1601 pr_err("Could not enable Tx Queue %d\n", reg_idx);
1602}
1603
92915f71
GR		 1604/**
1605 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1606 * @adapter: board private structure
1607 *
1608 * Configure the Tx unit of the MAC after a reset.
1609 **/
1610static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1611{
de02decb 1612 u32 i;
92915f71
GR		 1613
1614 /* Setup the HW Tx Head and Tail descriptor pointers */
de02decb
DS		 1615 for (i = 0; i < adapter->num_tx_queues; i++)
1616 ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
92915f71
GR		 1617}
1618
1619#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1620
1621static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1622{
92915f71
GR		 1623 struct ixgbe_hw *hw = &adapter->hw;
1624 u32 srrctl;
1625
92915f71
GR		 1626 srrctl = IXGBE_SRRCTL_DROP_EN;
1627
bad17234
ET		 1628 srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
1629 srrctl |= IXGBEVF_RX_BUFSZ >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
77d5dfca 1630 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
92915f71 1631
92915f71
GR		 1632 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1633}
1634
1bb9c639
DS		 1635static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
1636{
1637 struct ixgbe_hw *hw = &adapter->hw;
1638
1639 /* PSRTYPE must be initialized in 82599 */
1640 u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
1641 IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
1642 IXGBE_PSRTYPE_L2HDR;
1643
1644 if (adapter->num_rx_queues > 1)
1645 psrtype |= 1 << 29;
1646
1647 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1648}
1649
de02decb
DS		 1650#define IXGBEVF_MAX_RX_DESC_POLL 10
1651static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
1652 struct ixgbevf_ring *ring)
1653{
1654 struct ixgbe_hw *hw = &adapter->hw;
1655 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1656 u32 rxdctl;
1657 u8 reg_idx = ring->reg_idx;
1658
26597802
MR		 1659 if (IXGBE_REMOVED(hw->hw_addr))
1660 return;
de02decb
DS		 1661 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1662 rxdctl &= ~IXGBE_RXDCTL_ENABLE;
1663
1664 /* write value back with RXDCTL.ENABLE bit cleared */
1665 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1666
dec0d8e4 1667 /* the hardware may take up to 100us to really disable the Rx queue */
de02decb
DS		 1668 do {
1669 udelay(10);
1670 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1671 } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
1672
1673 if (!wait_loop)
1674 pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
1675 reg_idx);
1676}
1677
1678static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1679 struct ixgbevf_ring *ring)
1680{
1681 struct ixgbe_hw *hw = &adapter->hw;
1682 int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
1683 u32 rxdctl;
1684 u8 reg_idx = ring->reg_idx;
1685
26597802
MR		 1686 if (IXGBE_REMOVED(hw->hw_addr))
1687 return;
de02decb
DS		 1688 do {
1689 usleep_range(1000, 2000);
1690 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1691 } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
1692
1693 if (!wait_loop)
1694 pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
1695 reg_idx);
1696}
1697
9295edb4
ET		 1698static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
1699{
1700 struct ixgbe_hw *hw = &adapter->hw;
1701 u32 vfmrqc = 0, vfreta = 0;
9295edb4 1702 u16 rss_i = adapter->num_rx_queues;
9cba434f 1703 u8 i, j;
9295edb4
ET		 1704
1705 /* Fill out hash function seeds */
9cba434f
ET		 1706 netdev_rss_key_fill(adapter->rss_key, sizeof(adapter->rss_key));
1707 for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
1708 IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), adapter->rss_key[i]);
9295edb4 1709
9cba434f 1710 for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
9295edb4
ET		 1711 if (j == rss_i)
1712 j = 0;
9cba434f
ET		 1713
1714 adapter->rss_indir_tbl[i] = j;
1715
1716 vfreta |= j << (i & 0x3) * 8;
1717 if ((i & 3) == 3) {
9295edb4 1718 IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
9cba434f
ET		 1719 vfreta = 0;
1720 }
9295edb4
ET		 1721 }
1722
1723 /* Perform hash on these packet types */
1724 vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
1725 IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
1726 IXGBE_VFMRQC_RSS_FIELD_IPV6 |
1727 IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
1728
1729 vfmrqc |= IXGBE_VFMRQC_RSSEN;
1730
1731 IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
1732}
1733
de02decb
DS		 1734static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
1735 struct ixgbevf_ring *ring)
1736{
1737 struct ixgbe_hw *hw = &adapter->hw;
1738 u64 rdba = ring->dma;
1739 u32 rxdctl;
1740 u8 reg_idx = ring->reg_idx;
1741
1742 /* disable queue to avoid issues while updating state */
1743 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
1744 ixgbevf_disable_rx_queue(adapter, ring);
1745
1746 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
1747 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
1748 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
1749 ring->count * sizeof(union ixgbe_adv_rx_desc));
1750
1751 /* enable relaxed ordering */
1752 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
1753 IXGBE_DCA_RXCTRL_DESC_RRO_EN);
1754
1755 /* reset head and tail pointers */
1756 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
1757 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
dbf8b0d8 1758 ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
de02decb
DS		 1759
1760 /* reset ntu and ntc to place SW in sync with hardwdare */
1761 ring->next_to_clean = 0;
1762 ring->next_to_use = 0;
bad17234 1763 ring->next_to_alloc = 0;
de02decb
DS		 1764
1765 ixgbevf_configure_srrctl(adapter, reg_idx);
1766
bad17234
ET		 1767 /* allow any size packet since we can handle overflow */
1768 rxdctl &= ~IXGBE_RXDCTL_RLPML_EN;
1769
de02decb
DS		 1770 rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
1771 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
1772
1773 ixgbevf_rx_desc_queue_enable(adapter, ring);
095e2617 1774 ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
de02decb
DS		 1775}
1776
92915f71
GR		 1777/**
1778 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1779 * @adapter: board private structure
1780 *
1781 * Configure the Rx unit of the MAC after a reset.
1782 **/
1783static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1784{
de02decb 1785 int i;
bad17234
ET		 1786 struct ixgbe_hw *hw = &adapter->hw;
1787 struct net_device *netdev = adapter->netdev;
92915f71 1788
1bb9c639 1789 ixgbevf_setup_psrtype(adapter);
9295edb4
ET		 1790 if (hw->mac.type >= ixgbe_mac_X550_vf)
1791 ixgbevf_setup_vfmrqc(adapter);
dd1fe113 1792
bad17234
ET		 1793 /* notify the PF of our intent to use this size of frame */
1794 ixgbevf_rlpml_set_vf(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
92915f71 1795
92915f71 1796 /* Setup the HW Rx Head and Tail Descriptor Pointers and
dec0d8e4
JK		 1797 * the Base and Length of the Rx Descriptor Ring
1798 */
de02decb
DS		 1799 for (i = 0; i < adapter->num_rx_queues; i++)
1800 ixgbevf_configure_rx_ring(adapter, adapter->rx_ring[i]);
92915f71
GR		 1801}
1802
80d5c368
PM		 1803static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
1804 __be16 proto, u16 vid)
92915f71
GR		 1805{
1806 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1807 struct ixgbe_hw *hw = &adapter->hw;
2ddc7fe1
AD		 1808 int err;
1809
55fdd45b 1810 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1811
92915f71 1812 /* add VID to filter table */
2ddc7fe1 1813 err = hw->mac.ops.set_vfta(hw, vid, 0, true);
1c55ed76 1814
55fdd45b 1815 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1816
2ddc7fe1
AD		 1817 /* translate error return types so error makes sense */
1818 if (err == IXGBE_ERR_MBX)
1819 return -EIO;
1820
1821 if (err == IXGBE_ERR_INVALID_ARGUMENT)
1822 return -EACCES;
1823
dadcd65f 1824 set_bit(vid, adapter->active_vlans);
8e586137 1825
2ddc7fe1 1826 return err;
92915f71
GR		 1827}
1828
80d5c368
PM		 1829static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
1830 __be16 proto, u16 vid)
92915f71
GR		 1831{
1832 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1833 struct ixgbe_hw *hw = &adapter->hw;
50985b5f 1834 int err;
92915f71 1835
55fdd45b 1836 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1837
92915f71 1838 /* remove VID from filter table */
92fe0bf7 1839 err = hw->mac.ops.set_vfta(hw, vid, 0, false);
1c55ed76 1840
55fdd45b 1841 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 1842
dadcd65f 1843 clear_bit(vid, adapter->active_vlans);
8e586137 1844
2ddc7fe1 1845 return err;
92915f71
GR		 1846}
1847
1848static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1849{
dadcd65f 1850 u16 vid;
92915f71 1851
dadcd65f 1852 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368
PM		 1853 ixgbevf_vlan_rx_add_vid(adapter->netdev,
1854 htons(ETH_P_8021Q), vid);
92915f71
GR		 1855}
1856
46ec20ff
GR		 1857static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1858{
1859 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1860 struct ixgbe_hw *hw = &adapter->hw;
1861 int count = 0;
1862
1863 if ((netdev_uc_count(netdev)) > 10) {
dbd9636e 1864 pr_err("Too many unicast filters - No Space\n");
46ec20ff
GR		 1865 return -ENOSPC;
1866 }
1867
1868 if (!netdev_uc_empty(netdev)) {
1869 struct netdev_hw_addr *ha;
dec0d8e4 1870
46ec20ff
GR		 1871 netdev_for_each_uc_addr(ha, netdev) {
1872 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1873 udelay(200);
1874 }
1875 } else {
dec0d8e4
JK		 1876 /* If the list is empty then send message to PF driver to
1877 * clear all MAC VLANs on this VF.
46ec20ff
GR		 1878 */
1879 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1880 }
1881
1882 return count;
1883}
1884
92915f71 1885/**
dee847f5 1886 * ixgbevf_set_rx_mode - Multicast and unicast set
92915f71
GR		 1887 * @netdev: network interface device structure
1888 *
1889 * The set_rx_method entry point is called whenever the multicast address
dee847f5
GR		 1890 * list, unicast address list or the network interface flags are updated.
1891 * This routine is responsible for configuring the hardware for proper
1892 * multicast mode and configuring requested unicast filters.
92915f71
GR		 1893 **/
1894static void ixgbevf_set_rx_mode(struct net_device *netdev)
1895{
1896 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1897 struct ixgbe_hw *hw = &adapter->hw;
8443c1a4
HS		 1898 unsigned int flags = netdev->flags;
1899 int xcast_mode;
1900
1901 xcast_mode = (flags & IFF_ALLMULTI) ? IXGBEVF_XCAST_MODE_ALLMULTI :
1902 (flags & (IFF_BROADCAST | IFF_MULTICAST)) ?
1903 IXGBEVF_XCAST_MODE_MULTI : IXGBEVF_XCAST_MODE_NONE;
92915f71 1904
55fdd45b 1905 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 1906
8443c1a4
HS		 1907 hw->mac.ops.update_xcast_mode(hw, netdev, xcast_mode);
1908
92915f71 1909 /* reprogram multicast list */
92fe0bf7 1910 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 1911
1912 ixgbevf_write_uc_addr_list(netdev);
1c55ed76 1913
55fdd45b 1914 spin_unlock_bh(&adapter->mbx_lock);
92915f71
GR		 1915}
1916
1917static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1918{
1919 int q_idx;
1920 struct ixgbevf_q_vector *q_vector;
1921 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1922
1923 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
92915f71 1924 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK		 1925#ifdef CONFIG_NET_RX_BUSY_POLL
1926 ixgbevf_qv_init_lock(adapter->q_vector[q_idx]);
1927#endif
fa71ae27 1928 napi_enable(&q_vector->napi);
92915f71
GR		 1929 }
1930}
1931
1932static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1933{
1934 int q_idx;
1935 struct ixgbevf_q_vector *q_vector;
1936 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1937
1938 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1939 q_vector = adapter->q_vector[q_idx];
92915f71 1940 napi_disable(&q_vector->napi);
c777cdfa
JK		 1941#ifdef CONFIG_NET_RX_BUSY_POLL
1942 while (!ixgbevf_qv_disable(adapter->q_vector[q_idx])) {
1943 pr_info("QV %d locked\n", q_idx);
1944 usleep_range(1000, 20000);
1945 }
1946#endif /* CONFIG_NET_RX_BUSY_POLL */
92915f71
GR		 1947 }
1948}
1949
220fe050
DS		 1950static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
1951{
1952 struct ixgbe_hw *hw = &adapter->hw;
1953 unsigned int def_q = 0;
1954 unsigned int num_tcs = 0;
2dc571aa
ET		 1955 unsigned int num_rx_queues = adapter->num_rx_queues;
1956 unsigned int num_tx_queues = adapter->num_tx_queues;
220fe050
DS		 1957 int err;
1958
1959 spin_lock_bh(&adapter->mbx_lock);
1960
1961 /* fetch queue configuration from the PF */
1962 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
1963
1964 spin_unlock_bh(&adapter->mbx_lock);
1965
1966 if (err)
1967 return err;
1968
1969 if (num_tcs > 1) {
2dc571aa
ET		 1970 /* we need only one Tx queue */
1971 num_tx_queues = 1;
1972
220fe050 1973 /* update default Tx ring register index */
87e70ab9 1974 adapter->tx_ring[0]->reg_idx = def_q;
220fe050
DS		 1975
1976 /* we need as many queues as traffic classes */
1977 num_rx_queues = num_tcs;
1978 }
1979
1980 /* if we have a bad config abort request queue reset */
2dc571aa
ET		 1981 if ((adapter->num_rx_queues != num_rx_queues) ||
1982 (adapter->num_tx_queues != num_tx_queues)) {
220fe050
DS		 1983 /* force mailbox timeout to prevent further messages */
1984 hw->mbx.timeout = 0;
1985
1986 /* wait for watchdog to come around and bail us out */
1987 adapter->flags |= IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
1988 }
1989
1990 return 0;
1991}
1992
92915f71
GR		 1993static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1994{
220fe050
DS		 1995 ixgbevf_configure_dcb(adapter);
1996
de02decb 1997 ixgbevf_set_rx_mode(adapter->netdev);
92915f71
GR		 1998
1999 ixgbevf_restore_vlan(adapter);
2000
2001 ixgbevf_configure_tx(adapter);
2002 ixgbevf_configure_rx(adapter);
92915f71
GR		 2003}
2004
33bd9f60
GR		 2005static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
2006{
2007 /* Only save pre-reset stats if there are some */
2008 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
2009 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
2010 adapter->stats.base_vfgprc;
2011 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
2012 adapter->stats.base_vfgptc;
2013 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
2014 adapter->stats.base_vfgorc;
2015 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
2016 adapter->stats.base_vfgotc;
2017 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
2018 adapter->stats.base_vfmprc;
2019 }
2020}
2021
2022static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
2023{
2024 struct ixgbe_hw *hw = &adapter->hw;
2025
2026 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
2027 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
2028 adapter->stats.last_vfgorc |=
2029 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
2030 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
2031 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
2032 adapter->stats.last_vfgotc |=
2033 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
2034 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
2035
2036 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
2037 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
2038 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
2039 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
2040 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
2041}
2042
31186785
AD		 2043static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
2044{
2045 struct ixgbe_hw *hw = &adapter->hw;
94cf66f8
VZ		 2046 int api[] = { ixgbe_mbox_api_12,
2047 ixgbe_mbox_api_11,
56e94095 2048 ixgbe_mbox_api_10,
31186785 2049 ixgbe_mbox_api_unknown };
50985b5f 2050 int err, idx = 0;
31186785 2051
55fdd45b 2052 spin_lock_bh(&adapter->mbx_lock);
31186785
AD		 2053
2054 while (api[idx] != ixgbe_mbox_api_unknown) {
2055 err = ixgbevf_negotiate_api_version(hw, api[idx]);
2056 if (!err)
2057 break;
2058 idx++;
2059 }
2060
55fdd45b 2061 spin_unlock_bh(&adapter->mbx_lock);
31186785
AD		 2062}
2063
795180d8 2064static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
92915f71
GR		 2065{
2066 struct net_device *netdev = adapter->netdev;
2067 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 2068
2069 ixgbevf_configure_msix(adapter);
2070
55fdd45b 2071 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 2072
92fe0bf7
GR		 2073 if (is_valid_ether_addr(hw->mac.addr))
2074 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
2075 else
2076 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
92915f71 2077
55fdd45b 2078 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 2079
4e857c58 2080 smp_mb__before_atomic();
92915f71
GR		 2081 clear_bit(__IXGBEVF_DOWN, &adapter->state);
2082 ixgbevf_napi_enable_all(adapter);
2083
d9bdb57f
ET		 2084 /* clear any pending interrupts, may auto mask */
2085 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2086 ixgbevf_irq_enable(adapter);
2087
92915f71
GR		 2088 /* enable transmits */
2089 netif_tx_start_all_queues(netdev);
2090
33bd9f60
GR		 2091 ixgbevf_save_reset_stats(adapter);
2092 ixgbevf_init_last_counter_stats(adapter);
2093
4b2cd27f 2094 hw->mac.get_link_status = 1;
9ac5c5cc 2095 mod_timer(&adapter->service_timer, jiffies);
92915f71
GR		 2096}
2097
795180d8 2098void ixgbevf_up(struct ixgbevf_adapter *adapter)
92915f71 2099{
92915f71
GR		 2100 ixgbevf_configure(adapter);
2101
795180d8 2102 ixgbevf_up_complete(adapter);
92915f71
GR		 2103}
2104
2105/**
2106 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
92915f71
GR		 2107 * @rx_ring: ring to free buffers from
2108 **/
05d063aa 2109static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
92915f71 2110{
bad17234 2111 struct device *dev = rx_ring->dev;
92915f71
GR		 2112 unsigned long size;
2113 unsigned int i;
2114
bad17234
ET		 2115 /* Free Rx ring sk_buff */
2116 if (rx_ring->skb) {
2117 dev_kfree_skb(rx_ring->skb);
2118 rx_ring->skb = NULL;
2119 }
2120
2121 /* ring already cleared, nothing to do */
c0456c23
GR		 2122 if (!rx_ring->rx_buffer_info)
2123 return;
92915f71 2124
bad17234 2125 /* Free all the Rx ring pages */
92915f71 2126 for (i = 0; i < rx_ring->count; i++) {
bad17234 2127 struct ixgbevf_rx_buffer *rx_buffer;
92915f71 2128
bad17234
ET		 2129 rx_buffer = &rx_ring->rx_buffer_info[i];
2130 if (rx_buffer->dma)
2131 dma_unmap_page(dev, rx_buffer->dma,
2132 PAGE_SIZE, DMA_FROM_DEVICE);
2133 rx_buffer->dma = 0;
2134 if (rx_buffer->page)
2135 __free_page(rx_buffer->page);
2136 rx_buffer->page = NULL;
92915f71
GR		 2137 }
2138
2139 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2140 memset(rx_ring->rx_buffer_info, 0, size);
2141
2142 /* Zero out the descriptor ring */
2143 memset(rx_ring->desc, 0, rx_ring->size);
92915f71
GR		 2144}
2145
2146/**
2147 * ixgbevf_clean_tx_ring - Free Tx Buffers
92915f71
GR		 2148 * @tx_ring: ring to be cleaned
2149 **/
05d063aa 2150static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
92915f71
GR		 2151{
2152 struct ixgbevf_tx_buffer *tx_buffer_info;
2153 unsigned long size;
2154 unsigned int i;
2155
c0456c23
GR		 2156 if (!tx_ring->tx_buffer_info)
2157 return;
2158
92915f71 2159 /* Free all the Tx ring sk_buffs */
92915f71
GR		 2160 for (i = 0; i < tx_ring->count; i++) {
2161 tx_buffer_info = &tx_ring->tx_buffer_info[i];
70a10e25 2162 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer_info);
92915f71
GR		 2163 }
2164
2165 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2166 memset(tx_ring->tx_buffer_info, 0, size);
2167
2168 memset(tx_ring->desc, 0, tx_ring->size);
92915f71
GR		 2169}
2170
2171/**
2172 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
2173 * @adapter: board private structure
2174 **/
2175static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
2176{
2177 int i;
2178
2179 for (i = 0; i < adapter->num_rx_queues; i++)
05d063aa 2180 ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
92915f71
GR		 2181}
2182
2183/**
2184 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
2185 * @adapter: board private structure
2186 **/
2187static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
2188{
2189 int i;
2190
2191 for (i = 0; i < adapter->num_tx_queues; i++)
05d063aa 2192 ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
92915f71
GR		 2193}
2194
2195void ixgbevf_down(struct ixgbevf_adapter *adapter)
2196{
2197 struct net_device *netdev = adapter->netdev;
2198 struct ixgbe_hw *hw = &adapter->hw;
de02decb 2199 int i;
92915f71
GR		 2200
2201 /* signal that we are down to the interrupt handler */
5b346dc9
MR		 2202 if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
2203 return; /* do nothing if already down */
858c3dda 2204
dec0d8e4 2205 /* disable all enabled Rx queues */
858c3dda 2206 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 2207 ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
92915f71 2208
d9bdb57f 2209 usleep_range(10000, 20000);
92915f71
GR		 2210
2211 netif_tx_stop_all_queues(netdev);
2212
d9bdb57f
ET		 2213 /* call carrier off first to avoid false dev_watchdog timeouts */
2214 netif_carrier_off(netdev);
2215 netif_tx_disable(netdev);
2216
92915f71
GR		 2217 ixgbevf_irq_disable(adapter);
2218
2219 ixgbevf_napi_disable_all(adapter);
2220
9ac5c5cc 2221 del_timer_sync(&adapter->service_timer);
92915f71
GR		 2222
2223 /* disable transmits in the hardware now that interrupts are off */
2224 for (i = 0; i < adapter->num_tx_queues; i++) {
de02decb
DS		 2225 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
2226
2227 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
2228 IXGBE_TXDCTL_SWFLSH);
92915f71
GR		 2229 }
2230
92915f71
GR		 2231 if (!pci_channel_offline(adapter->pdev))
2232 ixgbevf_reset(adapter);
2233
2234 ixgbevf_clean_all_tx_rings(adapter);
2235 ixgbevf_clean_all_rx_rings(adapter);
2236}
2237
2238void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
2239{
2240 WARN_ON(in_interrupt());
c0456c23 2241
92915f71
GR		 2242 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
2243 msleep(1);
2244
4b2cd27f
AD		 2245 ixgbevf_down(adapter);
2246 ixgbevf_up(adapter);
92915f71
GR		 2247
2248 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
2249}
2250
2251void ixgbevf_reset(struct ixgbevf_adapter *adapter)
2252{
2253 struct ixgbe_hw *hw = &adapter->hw;
2254 struct net_device *netdev = adapter->netdev;
2255
798e381a 2256 if (hw->mac.ops.reset_hw(hw)) {
92915f71 2257 hw_dbg(hw, "PF still resetting\n");
798e381a 2258 } else {
92915f71 2259 hw->mac.ops.init_hw(hw);
798e381a
DS		 2260 ixgbevf_negotiate_api(adapter);
2261 }
92915f71
GR		 2262
2263 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
91a76baa
ET		 2264 ether_addr_copy(netdev->dev_addr, adapter->hw.mac.addr);
2265 ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
92915f71 2266 }
e66c92ad
ET		 2267
2268 adapter->last_reset = jiffies;
92915f71
GR		 2269}
2270
e45dd5fe
JK		 2271static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
2272 int vectors)
92915f71 2273{
a5f9337b 2274 int vector_threshold;
92915f71 2275
fa71ae27
AD		 2276 /* We'll want at least 2 (vector_threshold):
2277 * 1) TxQ[0] + RxQ[0] handler
2278 * 2) Other (Link Status Change, etc.)
92915f71
GR		 2279 */
2280 vector_threshold = MIN_MSIX_COUNT;
2281
2282 /* The more we get, the more we will assign to Tx/Rx Cleanup
2283 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
2284 * Right now, we simply care about how many we'll get; we'll
2285 * set them up later while requesting irq's.
2286 */
5c1e3588
AG		 2287 vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
2288 vector_threshold, vectors);
92915f71 2289
5c1e3588 2290 if (vectors < 0) {
e45dd5fe
JK		 2291 dev_err(&adapter->pdev->dev,
2292 "Unable to allocate MSI-X interrupts\n");
92915f71
GR		 2293 kfree(adapter->msix_entries);
2294 adapter->msix_entries = NULL;
5c1e3588 2295 return vectors;
92915f71 2296 }
dee847f5 2297
5c1e3588
AG		 2298 /* Adjust for only the vectors we'll use, which is minimum
2299 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
2300 * vectors we were allocated.
2301 */
2302 adapter->num_msix_vectors = vectors;
2303
2304 return 0;
92915f71
GR		 2305}
2306
49ce9c2c
BH		 2307/**
2308 * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
92915f71
GR		 2309 * @adapter: board private structure to initialize
2310 *
2311 * This is the top level queue allocation routine. The order here is very
2312 * important, starting with the "most" number of features turned on at once,
2313 * and ending with the smallest set of features. This way large combinations
2314 * can be allocated if they're turned on, and smaller combinations are the
2315 * fallthrough conditions.
2316 *
2317 **/
2318static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
2319{
220fe050
DS		 2320 struct ixgbe_hw *hw = &adapter->hw;
2321 unsigned int def_q = 0;
2322 unsigned int num_tcs = 0;
2323 int err;
2324
92915f71
GR		 2325 /* Start with base case */
2326 adapter->num_rx_queues = 1;
2327 adapter->num_tx_queues = 1;
220fe050
DS		 2328
2329 spin_lock_bh(&adapter->mbx_lock);
2330
2331 /* fetch queue configuration from the PF */
2332 err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
2333
2334 spin_unlock_bh(&adapter->mbx_lock);
2335
2336 if (err)
2337 return;
2338
2339 /* we need as many queues as traffic classes */
2dc571aa 2340 if (num_tcs > 1) {
220fe050 2341 adapter->num_rx_queues = num_tcs;
2dc571aa
ET		 2342 } else {
2343 u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
2344
2345 switch (hw->api_version) {
2346 case ixgbe_mbox_api_11:
94cf66f8 2347 case ixgbe_mbox_api_12:
2dc571aa
ET		 2348 adapter->num_rx_queues = rss;
2349 adapter->num_tx_queues = rss;
2350 default:
2351 break;
2352 }
2353 }
92915f71
GR		 2354}
2355
2356/**
2357 * ixgbevf_alloc_queues - Allocate memory for all rings
2358 * @adapter: board private structure to initialize
2359 *
2360 * We allocate one ring per queue at run-time since we don't know the
2361 * number of queues at compile-time. The polling_netdev array is
2362 * intended for Multiqueue, but should work fine with a single queue.
2363 **/
2364static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
2365{
87e70ab9
DS		 2366 struct ixgbevf_ring *ring;
2367 int rx = 0, tx = 0;
92915f71 2368
87e70ab9
DS		 2369 for (; tx < adapter->num_tx_queues; tx++) {
2370 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2371 if (!ring)
2372 goto err_allocation;
92915f71 2373
87e70ab9
DS		 2374 ring->dev = &adapter->pdev->dev;
2375 ring->netdev = adapter->netdev;
2376 ring->count = adapter->tx_ring_count;
2377 ring->queue_index = tx;
2378 ring->reg_idx = tx;
92915f71 2379
87e70ab9 2380 adapter->tx_ring[tx] = ring;
92915f71
GR		 2381 }
2382
87e70ab9
DS		 2383 for (; rx < adapter->num_rx_queues; rx++) {
2384 ring = kzalloc(sizeof(*ring), GFP_KERNEL);
2385 if (!ring)
2386 goto err_allocation;
2387
2388 ring->dev = &adapter->pdev->dev;
2389 ring->netdev = adapter->netdev;
2390
2391 ring->count = adapter->rx_ring_count;
2392 ring->queue_index = rx;
2393 ring->reg_idx = rx;
2394
2395 adapter->rx_ring[rx] = ring;
92915f71
GR		 2396 }
2397
2398 return 0;
2399
87e70ab9
DS		 2400err_allocation:
2401 while (tx) {
2402 kfree(adapter->tx_ring[--tx]);
2403 adapter->tx_ring[tx] = NULL;
2404 }
2405
2406 while (rx) {
2407 kfree(adapter->rx_ring[--rx]);
2408 adapter->rx_ring[rx] = NULL;
2409 }
92915f71
GR		 2410 return -ENOMEM;
2411}
2412
2413/**
2414 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2415 * @adapter: board private structure to initialize
2416 *
2417 * Attempt to configure the interrupts using the best available
2418 * capabilities of the hardware and the kernel.
2419 **/
2420static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2421{
91e2b89b 2422 struct net_device *netdev = adapter->netdev;
50985b5f 2423 int err;
92915f71
GR		 2424 int vector, v_budget;
2425
dec0d8e4 2426 /* It's easy to be greedy for MSI-X vectors, but it really
92915f71
GR		 2427 * doesn't do us much good if we have a lot more vectors
2428 * than CPU's. So let's be conservative and only ask for
fa71ae27
AD		 2429 * (roughly) the same number of vectors as there are CPU's.
2430 * The default is to use pairs of vectors.
92915f71 2431 */
fa71ae27
AD		 2432 v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
2433 v_budget = min_t(int, v_budget, num_online_cpus());
2434 v_budget += NON_Q_VECTORS;
92915f71
GR		 2435
2436 /* A failure in MSI-X entry allocation isn't fatal, but it does
dec0d8e4
JK		 2437 * mean we disable MSI-X capabilities of the adapter.
2438 */
92915f71
GR		 2439 adapter->msix_entries = kcalloc(v_budget,
2440 sizeof(struct msix_entry), GFP_KERNEL);
50985b5f
MR		 2441 if (!adapter->msix_entries)
2442 return -ENOMEM;
92915f71
GR		 2443
2444 for (vector = 0; vector < v_budget; vector++)
2445 adapter->msix_entries[vector].entry = vector;
2446
e45dd5fe
JK		 2447 err = ixgbevf_acquire_msix_vectors(adapter, v_budget);
2448 if (err)
50985b5f 2449 return err;
92915f71 2450
91e2b89b
GR		 2451 err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
2452 if (err)
50985b5f 2453 return err;
91e2b89b 2454
50985b5f 2455 return netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
92915f71
GR		 2456}
2457
2458/**
2459 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2460 * @adapter: board private structure to initialize
2461 *
2462 * We allocate one q_vector per queue interrupt. If allocation fails we
2463 * return -ENOMEM.
2464 **/
2465static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2466{
2467 int q_idx, num_q_vectors;
2468 struct ixgbevf_q_vector *q_vector;
92915f71
GR		 2469
2470 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 2471
2472 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2473 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2474 if (!q_vector)
2475 goto err_out;
2476 q_vector->adapter = adapter;
2477 q_vector->v_idx = q_idx;
fa71ae27
AD		 2478 netif_napi_add(adapter->netdev, &q_vector->napi,
2479 ixgbevf_poll, 64);
92915f71
GR		 2480 adapter->q_vector[q_idx] = q_vector;
2481 }
2482
2483 return 0;
2484
2485err_out:
2486 while (q_idx) {
2487 q_idx--;
2488 q_vector = adapter->q_vector[q_idx];
c777cdfa
JK		 2489#ifdef CONFIG_NET_RX_BUSY_POLL
2490 napi_hash_del(&q_vector->napi);
2491#endif
92915f71
GR		 2492 netif_napi_del(&q_vector->napi);
2493 kfree(q_vector);
2494 adapter->q_vector[q_idx] = NULL;
2495 }
2496 return -ENOMEM;
2497}
2498
2499/**
2500 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2501 * @adapter: board private structure to initialize
2502 *
2503 * This function frees the memory allocated to the q_vectors. In addition if
2504 * NAPI is enabled it will delete any references to the NAPI struct prior
2505 * to freeing the q_vector.
2506 **/
2507static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2508{
f4477702 2509 int q_idx, num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
92915f71
GR		 2510
2511 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2512 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2513
2514 adapter->q_vector[q_idx] = NULL;
c777cdfa
JK		 2515#ifdef CONFIG_NET_RX_BUSY_POLL
2516 napi_hash_del(&q_vector->napi);
2517#endif
f4477702 2518 netif_napi_del(&q_vector->napi);
92915f71
GR		 2519 kfree(q_vector);
2520 }
2521}
2522
2523/**
2524 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2525 * @adapter: board private structure
2526 *
2527 **/
2528static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2529{
2530 pci_disable_msix(adapter->pdev);
2531 kfree(adapter->msix_entries);
2532 adapter->msix_entries = NULL;
92915f71
GR		 2533}
2534
2535/**
2536 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2537 * @adapter: board private structure to initialize
2538 *
2539 **/
2540static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2541{
2542 int err;
2543
2544 /* Number of supported queues */
2545 ixgbevf_set_num_queues(adapter);
2546
2547 err = ixgbevf_set_interrupt_capability(adapter);
2548 if (err) {
2549 hw_dbg(&adapter->hw,
2550 "Unable to setup interrupt capabilities\n");
2551 goto err_set_interrupt;
2552 }
2553
2554 err = ixgbevf_alloc_q_vectors(adapter);
2555 if (err) {
dec0d8e4 2556 hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
92915f71
GR		 2557 goto err_alloc_q_vectors;
2558 }
2559
2560 err = ixgbevf_alloc_queues(adapter);
2561 if (err) {
dbd9636e 2562 pr_err("Unable to allocate memory for queues\n");
92915f71
GR		 2563 goto err_alloc_queues;
2564 }
2565
dec0d8e4 2566 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u\n",
92915f71
GR		 2567 (adapter->num_rx_queues > 1) ? "Enabled" :
2568 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2569
2570 set_bit(__IXGBEVF_DOWN, &adapter->state);
2571
2572 return 0;
2573err_alloc_queues:
2574 ixgbevf_free_q_vectors(adapter);
2575err_alloc_q_vectors:
2576 ixgbevf_reset_interrupt_capability(adapter);
2577err_set_interrupt:
2578 return err;
2579}
2580
0ac1e8ce
AD		 2581/**
2582 * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
2583 * @adapter: board private structure to clear interrupt scheme on
2584 *
2585 * We go through and clear interrupt specific resources and reset the structure
2586 * to pre-load conditions
2587 **/
2588static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
2589{
87e70ab9
DS		 2590 int i;
2591
2592 for (i = 0; i < adapter->num_tx_queues; i++) {
2593 kfree(adapter->tx_ring[i]);
2594 adapter->tx_ring[i] = NULL;
2595 }
2596 for (i = 0; i < adapter->num_rx_queues; i++) {
2597 kfree(adapter->rx_ring[i]);
2598 adapter->rx_ring[i] = NULL;
2599 }
2600
0ac1e8ce
AD		 2601 adapter->num_tx_queues = 0;
2602 adapter->num_rx_queues = 0;
2603
2604 ixgbevf_free_q_vectors(adapter);
2605 ixgbevf_reset_interrupt_capability(adapter);
2606}
2607
92915f71
GR		 2608/**
2609 * ixgbevf_sw_init - Initialize general software structures
92915f71
GR		 2610 * @adapter: board private structure to initialize
2611 *
2612 * ixgbevf_sw_init initializes the Adapter private data structure.
2613 * Fields are initialized based on PCI device information and
2614 * OS network device settings (MTU size).
2615 **/
9f9a12f8 2616static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
92915f71
GR		 2617{
2618 struct ixgbe_hw *hw = &adapter->hw;
2619 struct pci_dev *pdev = adapter->pdev;
e1941a74 2620 struct net_device *netdev = adapter->netdev;
92915f71
GR		 2621 int err;
2622
2623 /* PCI config space info */
92915f71
GR		 2624 hw->vendor_id = pdev->vendor;
2625 hw->device_id = pdev->device;
ff938e43 2626 hw->revision_id = pdev->revision;
92915f71
GR		 2627 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2628 hw->subsystem_device_id = pdev->subsystem_device;
2629
2630 hw->mbx.ops.init_params(hw);
56e94095
AD		 2631
2632 /* assume legacy case in which PF would only give VF 2 queues */
2633 hw->mac.max_tx_queues = 2;
2634 hw->mac.max_rx_queues = 2;
2635
798e381a
DS		 2636 /* lock to protect mailbox accesses */
2637 spin_lock_init(&adapter->mbx_lock);
2638
92915f71
GR		 2639 err = hw->mac.ops.reset_hw(hw);
2640 if (err) {
2641 dev_info(&pdev->dev,
e1941a74 2642 "PF still in reset state. Is the PF interface up?\n");
92915f71
GR		 2643 } else {
2644 err = hw->mac.ops.init_hw(hw);
2645 if (err) {
dbd9636e 2646 pr_err("init_shared_code failed: %d\n", err);
92915f71
GR		 2647 goto out;
2648 }
798e381a 2649 ixgbevf_negotiate_api(adapter);
e1941a74
GR		 2650 err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
2651 if (err)
2652 dev_info(&pdev->dev, "Error reading MAC address\n");
2653 else if (is_zero_ether_addr(adapter->hw.mac.addr))
2654 dev_info(&pdev->dev,
2655 "MAC address not assigned by administrator.\n");
91a76baa 2656 ether_addr_copy(netdev->dev_addr, hw->mac.addr);
e1941a74
GR		 2657 }
2658
2659 if (!is_valid_ether_addr(netdev->dev_addr)) {
2660 dev_info(&pdev->dev, "Assigning random MAC address\n");
2661 eth_hw_addr_random(netdev);
91a76baa 2662 ether_addr_copy(hw->mac.addr, netdev->dev_addr);
465fc643 2663 ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
92915f71
GR		 2664 }
2665
2666 /* Enable dynamic interrupt throttling rates */
5f3600eb
AD		 2667 adapter->rx_itr_setting = 1;
2668 adapter->tx_itr_setting = 1;
92915f71 2669
92915f71
GR		 2670 /* set default ring sizes */
2671 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2672 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2673
92915f71 2674 set_bit(__IXGBEVF_DOWN, &adapter->state);
1a0d6ae5 2675 return 0;
92915f71
GR		 2676
2677out:
2678 return err;
2679}
2680
92915f71
GR		 2681#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2682 { \
2683 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2684 if (current_counter < last_counter) \
2685 counter += 0x100000000LL; \
2686 last_counter = current_counter; \
2687 counter &= 0xFFFFFFFF00000000LL; \
2688 counter |= current_counter; \
2689 }
2690
2691#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2692 { \
2693 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2694 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
dec0d8e4
JK		 2695 u64 current_counter = (current_counter_msb << 32) | \
2696 current_counter_lsb; \
92915f71
GR		 2697 if (current_counter < last_counter) \
2698 counter += 0x1000000000LL; \
2699 last_counter = current_counter; \
2700 counter &= 0xFFFFFFF000000000LL; \
2701 counter |= current_counter; \
2702 }
2703/**
2704 * ixgbevf_update_stats - Update the board statistics counters.
2705 * @adapter: board private structure
2706 **/
2707void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2708{
2709 struct ixgbe_hw *hw = &adapter->hw;
55fb277c 2710 int i;
92915f71 2711
e66c92ad
ET		 2712 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2713 test_bit(__IXGBEVF_RESETTING, &adapter->state))
088245a3
GR		 2714 return;
2715
92915f71
GR		 2716 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2717 adapter->stats.vfgprc);
2718 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2719 adapter->stats.vfgptc);
2720 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2721 adapter->stats.last_vfgorc,
2722 adapter->stats.vfgorc);
2723 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2724 adapter->stats.last_vfgotc,
2725 adapter->stats.vfgotc);
2726 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2727 adapter->stats.vfmprc);
55fb277c
GR		 2728
2729 for (i = 0; i < adapter->num_rx_queues; i++) {
2730 adapter->hw_csum_rx_error +=
87e70ab9 2731 adapter->rx_ring[i]->hw_csum_rx_error;
87e70ab9 2732 adapter->rx_ring[i]->hw_csum_rx_error = 0;
55fb277c 2733 }
92915f71
GR		 2734}
2735
2736/**
9ac5c5cc 2737 * ixgbevf_service_timer - Timer Call-back
92915f71
GR		 2738 * @data: pointer to adapter cast into an unsigned long
2739 **/
9ac5c5cc 2740static void ixgbevf_service_timer(unsigned long data)
92915f71
GR		 2741{
2742 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
e66c92ad 2743
9ac5c5cc
ET		 2744 /* Reset the timer */
2745 mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
2746
2747 ixgbevf_service_event_schedule(adapter);
e66c92ad
ET		 2748}
2749
9ac5c5cc 2750static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
e66c92ad 2751{
9ac5c5cc
ET		 2752 if (!(adapter->flags & IXGBEVF_FLAG_RESET_REQUESTED))
2753 return;
e66c92ad 2754
9ac5c5cc 2755 adapter->flags &= ~IXGBEVF_FLAG_RESET_REQUESTED;
e66c92ad
ET		 2756
2757 /* If we're already down or resetting, just bail */
2758 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2759 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2760 return;
2761
2762 adapter->tx_timeout_count++;
2763
2764 ixgbevf_reinit_locked(adapter);
2765}
2766
dec0d8e4
JK		 2767/**
2768 * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
2769 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2770 *
2771 * This function serves two purposes. First it strobes the interrupt lines
2772 * in order to make certain interrupts are occurring. Secondly it sets the
2773 * bits needed to check for TX hangs. As a result we should immediately
2774 * determine if a hang has occurred.
dec0d8e4 2775 **/
e66c92ad
ET		 2776static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
2777{
92915f71 2778 struct ixgbe_hw *hw = &adapter->hw;
5f3600eb 2779 u32 eics = 0;
92915f71
GR		 2780 int i;
2781
e66c92ad
ET		 2782 /* If we're down or resetting, just bail */
2783 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2784 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2785 return;
92915f71 2786
e08400b7
ET		 2787 /* Force detection of hung controller */
2788 if (netif_carrier_ok(adapter->netdev)) {
2789 for (i = 0; i < adapter->num_tx_queues; i++)
2790 set_check_for_tx_hang(adapter->tx_ring[i]);
2791 }
2792
dec0d8e4 2793 /* get one bit for every active Tx/Rx interrupt vector */
92915f71
GR		 2794 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2795 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
9ac5c5cc 2796
6b43c446 2797 if (qv->rx.ring || qv->tx.ring)
5f3600eb 2798 eics |= 1 << i;
92915f71
GR		 2799 }
2800
e66c92ad 2801 /* Cause software interrupt to ensure rings are cleaned */
5f3600eb 2802 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
e66c92ad 2803}
92915f71 2804
e66c92ad
ET		 2805/**
2806 * ixgbevf_watchdog_update_link - update the link status
dec0d8e4 2807 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2808 **/
2809static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
2810{
2811 struct ixgbe_hw *hw = &adapter->hw;
2812 u32 link_speed = adapter->link_speed;
2813 bool link_up = adapter->link_up;
2814 s32 err;
2815
2816 spin_lock_bh(&adapter->mbx_lock);
2817
2818 err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
2819
2820 spin_unlock_bh(&adapter->mbx_lock);
2821
2822 /* if check for link returns error we will need to reset */
2823 if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
9ac5c5cc 2824 adapter->flags |= IXGBEVF_FLAG_RESET_REQUESTED;
e66c92ad
ET		 2825 link_up = false;
2826 }
2827
2828 adapter->link_up = link_up;
2829 adapter->link_speed = link_speed;
92915f71
GR		 2830}
2831
e66c92ad
ET		 2832/**
2833 * ixgbevf_watchdog_link_is_up - update netif_carrier status and
2834 * print link up message
dec0d8e4 2835 * @adapter: pointer to the device adapter structure
e66c92ad
ET		 2836 **/
2837static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
92915f71 2838{
e66c92ad 2839 struct net_device *netdev = adapter->netdev;
92915f71 2840
e66c92ad
ET		 2841 /* only continue if link was previously down */
2842 if (netif_carrier_ok(netdev))
92915f71
GR		 2843 return;
2844
e66c92ad
ET		 2845 dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
2846 (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2847 "10 Gbps" :
2848 (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
2849 "1 Gbps" :
2850 (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
2851 "100 Mbps" :
2852 "unknown speed");
92915f71 2853
e66c92ad
ET		 2854 netif_carrier_on(netdev);
2855}
2856
2857/**
2858 * ixgbevf_watchdog_link_is_down - update netif_carrier status and
2859 * print link down message
dec0d8e4 2860 * @adapter: pointer to the adapter structure
e66c92ad
ET		 2861 **/
2862static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
2863{
2864 struct net_device *netdev = adapter->netdev;
2865
2866 adapter->link_speed = 0;
2867
2868 /* only continue if link was up previously */
2869 if (!netif_carrier_ok(netdev))
2870 return;
2871
2872 dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
2873
2874 netif_carrier_off(netdev);
92915f71
GR		 2875}
2876
2877/**
9ac5c5cc
ET		 2878 * ixgbevf_watchdog_subtask - worker thread to bring link up
2879 * @work: pointer to work_struct containing our data
2880 **/
2881static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
2882{
2883 /* if interface is down do nothing */
2884 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2885 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2886 return;
2887
2888 ixgbevf_watchdog_update_link(adapter);
2889
2890 if (adapter->link_up)
2891 ixgbevf_watchdog_link_is_up(adapter);
2892 else
2893 ixgbevf_watchdog_link_is_down(adapter);
2894
2895 ixgbevf_update_stats(adapter);
2896}
2897
2898/**
2899 * ixgbevf_service_task - manages and runs subtasks
92915f71
GR		 2900 * @work: pointer to work_struct containing our data
2901 **/
9ac5c5cc 2902static void ixgbevf_service_task(struct work_struct *work)
92915f71
GR		 2903{
2904 struct ixgbevf_adapter *adapter = container_of(work,
2905 struct ixgbevf_adapter,
9ac5c5cc 2906 service_task);
92915f71 2907 struct ixgbe_hw *hw = &adapter->hw;
92915f71 2908
26597802
MR		 2909 if (IXGBE_REMOVED(hw->hw_addr)) {
2910 if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
2911 rtnl_lock();
2912 ixgbevf_down(adapter);
2913 rtnl_unlock();
2914 }
2915 return;
2916 }
e66c92ad 2917
220fe050 2918 ixgbevf_queue_reset_subtask(adapter);
9ac5c5cc
ET		 2919 ixgbevf_reset_subtask(adapter);
2920 ixgbevf_watchdog_subtask(adapter);
e66c92ad
ET		 2921 ixgbevf_check_hang_subtask(adapter);
2922
9ac5c5cc 2923 ixgbevf_service_event_complete(adapter);
92915f71
GR		 2924}
2925
2926/**
2927 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
92915f71
GR		 2928 * @tx_ring: Tx descriptor ring for a specific queue
2929 *
2930 * Free all transmit software resources
2931 **/
05d063aa 2932void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2933{
05d063aa 2934 ixgbevf_clean_tx_ring(tx_ring);
92915f71
GR		 2935
2936 vfree(tx_ring->tx_buffer_info);
2937 tx_ring->tx_buffer_info = NULL;
2938
de02decb
DS		 2939 /* if not set, then don't free */
2940 if (!tx_ring->desc)
2941 return;
2942
05d063aa 2943 dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
2a1f8794 2944 tx_ring->dma);
92915f71
GR		 2945
2946 tx_ring->desc = NULL;
2947}
2948
2949/**
2950 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2951 * @adapter: board private structure
2952 *
2953 * Free all transmit software resources
2954 **/
2955static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2956{
2957 int i;
2958
2959 for (i = 0; i < adapter->num_tx_queues; i++)
87e70ab9 2960 if (adapter->tx_ring[i]->desc)
05d063aa 2961 ixgbevf_free_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 2962}
2963
2964/**
2965 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
dec0d8e4 2966 * @tx_ring: Tx descriptor ring (for a specific queue) to setup
92915f71
GR		 2967 *
2968 * Return 0 on success, negative on failure
2969 **/
05d063aa 2970int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
92915f71 2971{
92915f71
GR		 2972 int size;
2973
2974 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2975 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2976 if (!tx_ring->tx_buffer_info)
2977 goto err;
92915f71
GR		 2978
2979 /* round up to nearest 4K */
2980 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2981 tx_ring->size = ALIGN(tx_ring->size, 4096);
2982
05d063aa 2983 tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
2a1f8794 2984 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2985 if (!tx_ring->desc)
2986 goto err;
2987
92915f71
GR		 2988 return 0;
2989
2990err:
2991 vfree(tx_ring->tx_buffer_info);
2992 tx_ring->tx_buffer_info = NULL;
dec0d8e4 2993 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
92915f71
GR		 2994 return -ENOMEM;
2995}
2996
2997/**
2998 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2999 * @adapter: board private structure
3000 *
3001 * If this function returns with an error, then it's possible one or
3002 * more of the rings is populated (while the rest are not). It is the
3003 * callers duty to clean those orphaned rings.
3004 *
3005 * Return 0 on success, negative on failure
3006 **/
3007static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
3008{
3009 int i, err = 0;
3010
3011 for (i = 0; i < adapter->num_tx_queues; i++) {
05d063aa 3012 err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
92915f71
GR		 3013 if (!err)
3014 continue;
dec0d8e4 3015 hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
92915f71
GR		 3016 break;
3017 }
3018
3019 return err;
3020}
3021
3022/**
3023 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
dec0d8e4 3024 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
92915f71
GR		 3025 *
3026 * Returns 0 on success, negative on failure
3027 **/
05d063aa 3028int ixgbevf_setup_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3029{
92915f71
GR		 3030 int size;
3031
3032 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 3033 rx_ring->rx_buffer_info = vzalloc(size);
e404decb 3034 if (!rx_ring->rx_buffer_info)
05d063aa 3035 goto err;
92915f71
GR		 3036
3037 /* Round up to nearest 4K */
3038 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
3039 rx_ring->size = ALIGN(rx_ring->size, 4096);
3040
05d063aa 3041 rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
2a1f8794 3042 &rx_ring->dma, GFP_KERNEL);
92915f71 3043
05d063aa
ET		 3044 if (!rx_ring->desc)
3045 goto err;
92915f71 3046
92915f71 3047 return 0;
05d063aa
ET		 3048err:
3049 vfree(rx_ring->rx_buffer_info);
3050 rx_ring->rx_buffer_info = NULL;
3051 dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
92915f71
GR		 3052 return -ENOMEM;
3053}
3054
3055/**
3056 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
3057 * @adapter: board private structure
3058 *
3059 * If this function returns with an error, then it's possible one or
3060 * more of the rings is populated (while the rest are not). It is the
3061 * callers duty to clean those orphaned rings.
3062 *
3063 * Return 0 on success, negative on failure
3064 **/
3065static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
3066{
3067 int i, err = 0;
3068
3069 for (i = 0; i < adapter->num_rx_queues; i++) {
05d063aa 3070 err = ixgbevf_setup_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3071 if (!err)
3072 continue;
dec0d8e4 3073 hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
92915f71
GR		 3074 break;
3075 }
3076 return err;
3077}
3078
3079/**
3080 * ixgbevf_free_rx_resources - Free Rx Resources
92915f71
GR		 3081 * @rx_ring: ring to clean the resources from
3082 *
3083 * Free all receive software resources
3084 **/
05d063aa 3085void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
92915f71 3086{
05d063aa 3087 ixgbevf_clean_rx_ring(rx_ring);
92915f71
GR		 3088
3089 vfree(rx_ring->rx_buffer_info);
3090 rx_ring->rx_buffer_info = NULL;
3091
05d063aa 3092 dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
2a1f8794 3093 rx_ring->dma);
92915f71
GR		 3094
3095 rx_ring->desc = NULL;
3096}
3097
3098/**
3099 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
3100 * @adapter: board private structure
3101 *
3102 * Free all receive software resources
3103 **/
3104static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
3105{
3106 int i;
3107
3108 for (i = 0; i < adapter->num_rx_queues; i++)
87e70ab9 3109 if (adapter->rx_ring[i]->desc)
05d063aa 3110 ixgbevf_free_rx_resources(adapter->rx_ring[i]);
92915f71
GR		 3111}
3112
3113/**
3114 * ixgbevf_open - Called when a network interface is made active
3115 * @netdev: network interface device structure
3116 *
3117 * Returns 0 on success, negative value on failure
3118 *
3119 * The open entry point is called when a network interface is made
3120 * active by the system (IFF_UP). At this point all resources needed
3121 * for transmit and receive operations are allocated, the interrupt
3122 * handler is registered with the OS, the watchdog timer is started,
3123 * and the stack is notified that the interface is ready.
3124 **/
324d0867 3125int ixgbevf_open(struct net_device *netdev)
92915f71
GR		 3126{
3127 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3128 struct ixgbe_hw *hw = &adapter->hw;
3129 int err;
3130
a1f6c6b1 3131 /* A previous failure to open the device because of a lack of
3132 * available MSIX vector resources may have reset the number
3133 * of msix vectors variable to zero. The only way to recover
3134 * is to unload/reload the driver and hope that the system has
3135 * been able to recover some MSIX vector resources.
3136 */
3137 if (!adapter->num_msix_vectors)
3138 return -ENOMEM;
3139
92915f71
GR		 3140 if (hw->adapter_stopped) {
3141 ixgbevf_reset(adapter);
3142 /* if adapter is still stopped then PF isn't up and
dec0d8e4
JK		 3143 * the VF can't start.
3144 */
92915f71
GR		 3145 if (hw->adapter_stopped) {
3146 err = IXGBE_ERR_MBX;
dec0d8e4 3147 pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
92915f71
GR		 3148 goto err_setup_reset;
3149 }
3150 }
3151
d9bdb57f
ET		 3152 /* disallow open during test */
3153 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
3154 return -EBUSY;
3155
3156 netif_carrier_off(netdev);
3157
92915f71
GR		 3158 /* allocate transmit descriptors */
3159 err = ixgbevf_setup_all_tx_resources(adapter);
3160 if (err)
3161 goto err_setup_tx;
3162
3163 /* allocate receive descriptors */
3164 err = ixgbevf_setup_all_rx_resources(adapter);
3165 if (err)
3166 goto err_setup_rx;
3167
3168 ixgbevf_configure(adapter);
3169
dec0d8e4 3170 /* Map the Tx/Rx rings to the vectors we were allotted.
92915f71
GR		 3171 * if request_irq will be called in this function map_rings
3172 * must be called *before* up_complete
3173 */
3174 ixgbevf_map_rings_to_vectors(adapter);
3175
92915f71
GR		 3176 err = ixgbevf_request_irq(adapter);
3177 if (err)
3178 goto err_req_irq;
3179
d9bdb57f 3180 ixgbevf_up_complete(adapter);
92915f71
GR		 3181
3182 return 0;
3183
3184err_req_irq:
3185 ixgbevf_down(adapter);
92915f71
GR		 3186err_setup_rx:
3187 ixgbevf_free_all_rx_resources(adapter);
3188err_setup_tx:
3189 ixgbevf_free_all_tx_resources(adapter);
3190 ixgbevf_reset(adapter);
3191
3192err_setup_reset:
3193
3194 return err;
3195}
3196
3197/**
3198 * ixgbevf_close - Disables a network interface
3199 * @netdev: network interface device structure
3200 *
3201 * Returns 0, this is not allowed to fail
3202 *
3203 * The close entry point is called when an interface is de-activated
3204 * by the OS. The hardware is still under the drivers control, but
3205 * needs to be disabled. A global MAC reset is issued to stop the
3206 * hardware, and all transmit and receive resources are freed.
3207 **/
324d0867 3208int ixgbevf_close(struct net_device *netdev)
92915f71
GR		 3209{
3210 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3211
3212 ixgbevf_down(adapter);
3213 ixgbevf_free_irq(adapter);
3214
3215 ixgbevf_free_all_tx_resources(adapter);
3216 ixgbevf_free_all_rx_resources(adapter);
3217
3218 return 0;
3219}
3220
220fe050
DS		 3221static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
3222{
3223 struct net_device *dev = adapter->netdev;
3224
3225 if (!(adapter->flags & IXGBEVF_FLAG_QUEUE_RESET_REQUESTED))
3226 return;
3227
3228 adapter->flags &= ~IXGBEVF_FLAG_QUEUE_RESET_REQUESTED;
3229
3230 /* if interface is down do nothing */
3231 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
3232 test_bit(__IXGBEVF_RESETTING, &adapter->state))
3233 return;
3234
3235 /* Hardware has to reinitialize queues and interrupts to
3236 * match packet buffer alignment. Unfortunately, the
3237 * hardware is not flexible enough to do this dynamically.
3238 */
3239 if (netif_running(dev))
3240 ixgbevf_close(dev);
3241
3242 ixgbevf_clear_interrupt_scheme(adapter);
3243 ixgbevf_init_interrupt_scheme(adapter);
3244
3245 if (netif_running(dev))
3246 ixgbevf_open(dev);
3247}
3248
70a10e25
AD		 3249static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
3250 u32 vlan_macip_lens, u32 type_tucmd,
3251 u32 mss_l4len_idx)
92915f71
GR		 3252{
3253 struct ixgbe_adv_tx_context_desc *context_desc;
70a10e25 3254 u16 i = tx_ring->next_to_use;
92915f71 3255
70a10e25 3256 context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
92915f71 3257
70a10e25
AD		 3258 i++;
3259 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
92915f71 3260
70a10e25
AD		 3261 /* set bits to identify this as an advanced context descriptor */
3262 type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
92915f71 3263
70a10e25
AD		 3264 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
3265 context_desc->seqnum_seed = 0;
3266 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
3267 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
3268}
3269
3270static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
7ad1a093
ET		 3271 struct ixgbevf_tx_buffer *first,
3272 u8 *hdr_len)
70a10e25 3273{
7ad1a093 3274 struct sk_buff *skb = first->skb;
70a10e25
AD		 3275 u32 vlan_macip_lens, type_tucmd;
3276 u32 mss_l4len_idx, l4len;
8f12c034 3277 int err;
70a10e25 3278
01a545cf
ET		 3279 if (skb->ip_summed != CHECKSUM_PARTIAL)
3280 return 0;
3281
70a10e25
AD		 3282 if (!skb_is_gso(skb))
3283 return 0;
92915f71 3284
8f12c034
FR		 3285 err = skb_cow_head(skb, 0);
3286 if (err < 0)
3287 return err;
92915f71 3288
70a10e25
AD		 3289 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
3290 type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
3291
10e4fb33 3292 if (first->protocol == htons(ETH_P_IP)) {
70a10e25 3293 struct iphdr *iph = ip_hdr(skb);
dec0d8e4 3294
70a10e25
AD		 3295 iph->tot_len = 0;
3296 iph->check = 0;
3297 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3298 iph->daddr, 0,
3299 IPPROTO_TCP,
3300 0);
3301 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
7ad1a093
ET		 3302 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3303 IXGBE_TX_FLAGS_CSUM |
3304 IXGBE_TX_FLAGS_IPV4;
70a10e25
AD		 3305 } else if (skb_is_gso_v6(skb)) {
3306 ipv6_hdr(skb)->payload_len = 0;
3307 tcp_hdr(skb)->check =
3308 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3309 &ipv6_hdr(skb)->daddr,
3310 0, IPPROTO_TCP, 0);
7ad1a093
ET		 3311 first->tx_flags |= IXGBE_TX_FLAGS_TSO |
3312 IXGBE_TX_FLAGS_CSUM;
70a10e25
AD		 3313 }
3314
3315 /* compute header lengths */
3316 l4len = tcp_hdrlen(skb);
3317 *hdr_len += l4len;
3318 *hdr_len = skb_transport_offset(skb) + l4len;
3319
dec0d8e4 3320 /* update GSO size and bytecount with header size */
7ad1a093
ET		 3321 first->gso_segs = skb_shinfo(skb)->gso_segs;
3322 first->bytecount += (first->gso_segs - 1) * *hdr_len;
3323
70a10e25
AD		 3324 /* mss_l4len_id: use 1 as index for TSO */
3325 mss_l4len_idx = l4len << IXGBE_ADVTXD_L4LEN_SHIFT;
3326 mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
3327 mss_l4len_idx |= 1 << IXGBE_ADVTXD_IDX_SHIFT;
3328
3329 /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
3330 vlan_macip_lens = skb_network_header_len(skb);
3331 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3332 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25
AD		 3333
3334 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3335 type_tucmd, mss_l4len_idx);
3336
3337 return 1;
92915f71
GR		 3338}
3339
7ad1a093
ET		 3340static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
3341 struct ixgbevf_tx_buffer *first)
92915f71 3342{
7ad1a093 3343 struct sk_buff *skb = first->skb;
70a10e25
AD		 3344 u32 vlan_macip_lens = 0;
3345 u32 mss_l4len_idx = 0;
3346 u32 type_tucmd = 0;
92915f71 3347
70a10e25
AD		 3348 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3349 u8 l4_hdr = 0;
d34a614a 3350 __be16 frag_off;
dec0d8e4 3351
10e4fb33 3352 switch (first->protocol) {
0933ce4a 3353 case htons(ETH_P_IP):
70a10e25
AD		 3354 vlan_macip_lens |= skb_network_header_len(skb);
3355 type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
3356 l4_hdr = ip_hdr(skb)->protocol;
3357 break;
0933ce4a 3358 case htons(ETH_P_IPV6):
70a10e25
AD		 3359 vlan_macip_lens |= skb_network_header_len(skb);
3360 l4_hdr = ipv6_hdr(skb)->nexthdr;
d34a614a
MR		 3361 if (likely(skb_network_header_len(skb) ==
3362 sizeof(struct ipv6hdr)))
3363 break;
3364 ipv6_skip_exthdr(skb, skb_network_offset(skb) +
3365 sizeof(struct ipv6hdr),
3366 &l4_hdr, &frag_off);
3367 if (unlikely(frag_off))
3368 l4_hdr = NEXTHDR_FRAGMENT;
70a10e25
AD		 3369 break;
3370 default:
70a10e25
AD		 3371 break;
3372 }
92915f71 3373
70a10e25
AD		 3374 switch (l4_hdr) {
3375 case IPPROTO_TCP:
3376 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
3377 mss_l4len_idx = tcp_hdrlen(skb) <<
3378 IXGBE_ADVTXD_L4LEN_SHIFT;
3379 break;
3380 case IPPROTO_SCTP:
3381 type_tucmd |= IXGBE_ADVTXD_TUCMD_L4T_SCTP;
3382 mss_l4len_idx = sizeof(struct sctphdr) <<
3383 IXGBE_ADVTXD_L4LEN_SHIFT;
3384 break;
3385 case IPPROTO_UDP:
3386 mss_l4len_idx = sizeof(struct udphdr) <<
3387 IXGBE_ADVTXD_L4LEN_SHIFT;
3388 break;
3389 default:
3390 if (unlikely(net_ratelimit())) {
3391 dev_warn(tx_ring->dev,
d34a614a
MR		 3392 "partial checksum, l3 proto=%x, l4 proto=%x\n",
3393 first->protocol, l4_hdr);
70a10e25 3394 }
d34a614a
MR		 3395 skb_checksum_help(skb);
3396 goto no_csum;
70a10e25 3397 }
7ad1a093
ET		 3398
3399 /* update TX checksum flag */
3400 first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
92915f71
GR		 3401 }
3402
d34a614a 3403no_csum:
70a10e25
AD		 3404 /* vlan_macip_lens: MACLEN, VLAN tag */
3405 vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
7ad1a093 3406 vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
70a10e25
AD		 3407
3408 ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
3409 type_tucmd, mss_l4len_idx);
92915f71
GR		 3410}
3411
29d37fa1 3412static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
92915f71 3413{
29d37fa1
ET		 3414 /* set type for advanced descriptor with frame checksum insertion */
3415 __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
3416 IXGBE_ADVTXD_DCMD_IFCS |
3417 IXGBE_ADVTXD_DCMD_DEXT);
92915f71 3418
dec0d8e4 3419 /* set HW VLAN bit if VLAN is present */
29d37fa1
ET		 3420 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3421 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
92915f71 3422
29d37fa1
ET		 3423 /* set segmentation enable bits for TSO/FSO */
3424 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3425 cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
92915f71 3426
29d37fa1
ET		 3427 return cmd_type;
3428}
92915f71 3429
29d37fa1
ET		 3430static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
3431 u32 tx_flags, unsigned int paylen)
3432{
3433 __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
9bdfefd2 3434
29d37fa1
ET		 3435 /* enable L4 checksum for TSO and TX checksum offload */
3436 if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3437 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
92915f71 3438
29d37fa1
ET		 3439 /* enble IPv4 checksum for TSO */
3440 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3441 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
92915f71 3442
29d37fa1
ET		 3443 /* use index 1 context for TSO/FSO/FCOE */
3444 if (tx_flags & IXGBE_TX_FLAGS_TSO)
3445 olinfo_status |= cpu_to_le32(1 << IXGBE_ADVTXD_IDX_SHIFT);
92915f71 3446
29d37fa1
ET		 3447 /* Check Context must be set if Tx switch is enabled, which it
3448 * always is for case where virtual functions are running
3449 */
3450 olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
92915f71 3451
29d37fa1
ET		 3452 tx_desc->read.olinfo_status = olinfo_status;
3453}
92915f71 3454
29d37fa1
ET		 3455static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
3456 struct ixgbevf_tx_buffer *first,
3457 const u8 hdr_len)
3458{
3459 dma_addr_t dma;
3460 struct sk_buff *skb = first->skb;
3461 struct ixgbevf_tx_buffer *tx_buffer;
3462 union ixgbe_adv_tx_desc *tx_desc;
3463 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
3464 unsigned int data_len = skb->data_len;
3465 unsigned int size = skb_headlen(skb);
3466 unsigned int paylen = skb->len - hdr_len;
3467 u32 tx_flags = first->tx_flags;
3468 __le32 cmd_type;
3469 u16 i = tx_ring->next_to_use;
9bdfefd2 3470
29d37fa1 3471 tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
92915f71 3472
29d37fa1
ET		 3473 ixgbevf_tx_olinfo_status(tx_desc, tx_flags, paylen);
3474 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
7ad1a093 3475
29d37fa1
ET		 3476 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
3477 if (dma_mapping_error(tx_ring->dev, dma))
3478 goto dma_error;
92915f71 3479
29d37fa1
ET		 3480 /* record length, and DMA address */
3481 dma_unmap_len_set(first, len, size);
3482 dma_unmap_addr_set(first, dma, dma);
92915f71 3483
29d37fa1 3484 tx_desc->read.buffer_addr = cpu_to_le64(dma);
92915f71 3485
29d37fa1
ET		 3486 for (;;) {
3487 while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
3488 tx_desc->read.cmd_type_len =
3489 cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
92915f71 3490
29d37fa1
ET		 3491 i++;
3492 tx_desc++;
3493 if (i == tx_ring->count) {
3494 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3495 i = 0;
3496 }
92915f71 3497
29d37fa1
ET		 3498 dma += IXGBE_MAX_DATA_PER_TXD;
3499 size -= IXGBE_MAX_DATA_PER_TXD;
92915f71 3500
29d37fa1
ET		 3501 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3502 tx_desc->read.olinfo_status = 0;
3503 }
92915f71 3504
29d37fa1
ET		 3505 if (likely(!data_len))
3506 break;
92915f71 3507
29d37fa1 3508 tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
92915f71 3509
29d37fa1
ET		 3510 i++;
3511 tx_desc++;
3512 if (i == tx_ring->count) {
3513 tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
3514 i = 0;
3515 }
92915f71 3516
29d37fa1
ET		 3517 size = skb_frag_size(frag);
3518 data_len -= size;
92915f71 3519
29d37fa1
ET		 3520 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
3521 DMA_TO_DEVICE);
3522 if (dma_mapping_error(tx_ring->dev, dma))
3523 goto dma_error;
70a10e25 3524
29d37fa1
ET		 3525 tx_buffer = &tx_ring->tx_buffer_info[i];
3526 dma_unmap_len_set(tx_buffer, len, size);
3527 dma_unmap_addr_set(tx_buffer, dma, dma);
92915f71 3528
29d37fa1
ET		 3529 tx_desc->read.buffer_addr = cpu_to_le64(dma);
3530 tx_desc->read.olinfo_status = 0;
3531
3532 frag++;
70a10e25 3533 }
92915f71 3534
29d37fa1
ET		 3535 /* write last descriptor with RS and EOP bits */
3536 cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
3537 tx_desc->read.cmd_type_len = cmd_type;
3538
3539 /* set the timestamp */
3540 first->time_stamp = jiffies;
3541
3542 /* Force memory writes to complete before letting h/w know there
3543 * are new descriptors to fetch. (Only applicable for weak-ordered
3544 * memory model archs, such as IA-64).
3545 *
3546 * We also need this memory barrier (wmb) to make certain all of the
3547 * status bits have been updated before next_to_watch is written.
70a10e25 3548 */
29d37fa1 3549 wmb();
92915f71 3550
29d37fa1
ET		 3551 /* set next_to_watch value indicating a packet is present */
3552 first->next_to_watch = tx_desc;
92915f71 3553
29d37fa1
ET		 3554 i++;
3555 if (i == tx_ring->count)
3556 i = 0;
9bdfefd2 3557
29d37fa1 3558 tx_ring->next_to_use = i;
92915f71 3559
29d37fa1 3560 /* notify HW of packet */
06380db6 3561 ixgbevf_write_tail(tx_ring, i);
29d37fa1
ET		 3562
3563 return;
3564dma_error:
3565 dev_err(tx_ring->dev, "TX DMA map failed\n");
3566
3567 /* clear dma mappings for failed tx_buffer_info map */
3568 for (;;) {
3569 tx_buffer = &tx_ring->tx_buffer_info[i];
3570 ixgbevf_unmap_and_free_tx_resource(tx_ring, tx_buffer);
3571 if (tx_buffer == first)
3572 break;
3573 if (i == 0)
3574 i = tx_ring->count;
3575 i--;
3576 }
92915f71 3577
92915f71 3578 tx_ring->next_to_use = i;
92915f71
GR		 3579}
3580
fb40195c 3581static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3582{
fb40195c 3583 netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
92915f71
GR		 3584 /* Herbert's original patch had:
3585 * smp_mb__after_netif_stop_queue();
dec0d8e4
JK		 3586 * but since that doesn't exist yet, just open code it.
3587 */
92915f71
GR		 3588 smp_mb();
3589
3590 /* We need to check again in a case another CPU has just
dec0d8e4
JK		 3591 * made room available.
3592 */
f880d07b 3593 if (likely(ixgbevf_desc_unused(tx_ring) < size))
92915f71
GR		 3594 return -EBUSY;
3595
3596 /* A reprieve! - use start_queue because it doesn't call schedule */
fb40195c 3597 netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
095e2617
ET		 3598 ++tx_ring->tx_stats.restart_queue;
3599
92915f71
GR		 3600 return 0;
3601}
3602
fb40195c 3603static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
92915f71 3604{
f880d07b 3605 if (likely(ixgbevf_desc_unused(tx_ring) >= size))
92915f71 3606 return 0;
fb40195c 3607 return __ixgbevf_maybe_stop_tx(tx_ring, size);
92915f71
GR		 3608}
3609
3610static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3611{
3612 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
7ad1a093 3613 struct ixgbevf_tx_buffer *first;
92915f71 3614 struct ixgbevf_ring *tx_ring;
7ad1a093
ET		 3615 int tso;
3616 u32 tx_flags = 0;
3595990a
AD		 3617 u16 count = TXD_USE_COUNT(skb_headlen(skb));
3618#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3619 unsigned short f;
3620#endif
7ad1a093 3621 u8 hdr_len = 0;
f9d08f16 3622 u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
7ad1a093 3623
46acc460 3624 if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
e7fcd543 3625 dev_kfree_skb_any(skb);
f9d08f16
GR		 3626 return NETDEV_TX_OK;
3627 }
92915f71 3628
7ad1a093 3629 tx_ring = adapter->tx_ring[skb->queue_mapping];
92915f71 3630
dec0d8e4 3631 /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
3595990a
AD		 3632 * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
3633 * + 2 desc gap to keep tail from touching head,
3634 * + 1 desc for context descriptor,
3635 * otherwise try next time
3636 */
3637#if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
3638 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3639 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3640#else
3641 count += skb_shinfo(skb)->nr_frags;
3642#endif
fb40195c 3643 if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
095e2617 3644 tx_ring->tx_stats.tx_busy++;
3595990a
AD		 3645 return NETDEV_TX_BUSY;
3646 }
3647
7ad1a093
ET		 3648 /* record the location of the first descriptor for this packet */
3649 first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
3650 first->skb = skb;
3651 first->bytecount = skb->len;
3652 first->gso_segs = 1;
3653
df8a39de
JP		 3654 if (skb_vlan_tag_present(skb)) {
3655 tx_flags |= skb_vlan_tag_get(skb);
92915f71
GR		 3656 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3657 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3658 }
3659
7ad1a093
ET		 3660 /* record initial flags and protocol */
3661 first->tx_flags = tx_flags;
3662 first->protocol = vlan_get_protocol(skb);
92915f71 3663
7ad1a093
ET		 3664 tso = ixgbevf_tso(tx_ring, first, &hdr_len);
3665 if (tso < 0)
3666 goto out_drop;
b5d217f3 3667 else if (!tso)
7ad1a093 3668 ixgbevf_tx_csum(tx_ring, first);
92915f71 3669
29d37fa1 3670 ixgbevf_tx_map(tx_ring, first, hdr_len);
70a10e25 3671
fb40195c 3672 ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
92915f71 3673
7ad1a093
ET		 3674 return NETDEV_TX_OK;
3675
3676out_drop:
3677 dev_kfree_skb_any(first->skb);
3678 first->skb = NULL;
3679
92915f71
GR		 3680 return NETDEV_TX_OK;
3681}
3682
92915f71
GR		 3683/**
3684 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3685 * @netdev: network interface device structure
3686 * @p: pointer to an address structure
3687 *
3688 * Returns 0 on success, negative on failure
3689 **/
3690static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3691{
3692 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3693 struct ixgbe_hw *hw = &adapter->hw;
3694 struct sockaddr *addr = p;
32ca6868 3695 int err;
92915f71
GR		 3696
3697 if (!is_valid_ether_addr(addr->sa_data))
3698 return -EADDRNOTAVAIL;
3699
55fdd45b 3700 spin_lock_bh(&adapter->mbx_lock);
1c55ed76 3701
32ca6868 3702 err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0);
92915f71 3703
55fdd45b 3704 spin_unlock_bh(&adapter->mbx_lock);
1c55ed76 3705
32ca6868
ET		 3706 if (err)
3707 return -EPERM;
3708
3709 ether_addr_copy(hw->mac.addr, addr->sa_data);
3710 ether_addr_copy(netdev->dev_addr, addr->sa_data);
3711
92915f71
GR		 3712 return 0;
3713}
3714
3715/**
3716 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3717 * @netdev: network interface device structure
3718 * @new_mtu: new value for maximum frame size
3719 *
3720 * Returns 0 on success, negative on failure
3721 **/
3722static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3723{
3724 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
bad17234 3725 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3726 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4 3727 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
69bfbec4 3728
56e94095
AD		 3729 switch (adapter->hw.api_version) {
3730 case ixgbe_mbox_api_11:
94cf66f8 3731 case ixgbe_mbox_api_12:
69bfbec4 3732 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
56e94095
AD		 3733 break;
3734 default:
47068b0d 3735 if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
56e94095
AD		 3736 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
3737 break;
3738 }
92915f71
GR		 3739
3740 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 3741 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR		 3742 return -EINVAL;
3743
bad17234 3744 hw_dbg(hw, "changing MTU from %d to %d\n",
92915f71
GR		 3745 netdev->mtu, new_mtu);
3746 /* must set new MTU before calling down or up */
3747 netdev->mtu = new_mtu;
3748
bad17234
ET		 3749 /* notify the PF of our intent to use this size of frame */
3750 ixgbevf_rlpml_set_vf(hw, max_frame);
92915f71
GR		 3751
3752 return 0;
3753}
3754
688ff32d
ET		 3755#ifdef CONFIG_NET_POLL_CONTROLLER
3756/* Polling 'interrupt' - used by things like netconsole to send skbs
3757 * without having to re-enable interrupts. It's not called while
3758 * the interrupt routine is executing.
3759 */
3760static void ixgbevf_netpoll(struct net_device *netdev)
3761{
3762 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3763 int i;
3764
3765 /* if interface is down do nothing */
3766 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
3767 return;
3768 for (i = 0; i < adapter->num_rx_queues; i++)
3769 ixgbevf_msix_clean_rings(0, adapter->q_vector[i]);
3770}
3771#endif /* CONFIG_NET_POLL_CONTROLLER */
3772
0ac1e8ce 3773static int ixgbevf_suspend(struct pci_dev *pdev, pm_message_t state)
92915f71
GR		 3774{
3775 struct net_device *netdev = pci_get_drvdata(pdev);
3776 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3777#ifdef CONFIG_PM
3778 int retval = 0;
3779#endif
92915f71
GR		 3780
3781 netif_device_detach(netdev);
3782
3783 if (netif_running(netdev)) {
0ac1e8ce 3784 rtnl_lock();
92915f71
GR		 3785 ixgbevf_down(adapter);
3786 ixgbevf_free_irq(adapter);
3787 ixgbevf_free_all_tx_resources(adapter);
3788 ixgbevf_free_all_rx_resources(adapter);
0ac1e8ce 3789 rtnl_unlock();
92915f71
GR		 3790 }
3791
0ac1e8ce 3792 ixgbevf_clear_interrupt_scheme(adapter);
92915f71 3793
0ac1e8ce
AD		 3794#ifdef CONFIG_PM
3795 retval = pci_save_state(pdev);
3796 if (retval)
3797 return retval;
92915f71 3798
0ac1e8ce 3799#endif
bc0c7151
MR		 3800 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
3801 pci_disable_device(pdev);
0ac1e8ce
AD		 3802
3803 return 0;
3804}
3805
3806#ifdef CONFIG_PM
3807static int ixgbevf_resume(struct pci_dev *pdev)
3808{
27ae2967
WY		 3809 struct net_device *netdev = pci_get_drvdata(pdev);
3810 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
0ac1e8ce
AD		 3811 u32 err;
3812
0ac1e8ce 3813 pci_restore_state(pdev);
dec0d8e4 3814 /* pci_restore_state clears dev->state_saved so call
0ac1e8ce
AD		 3815 * pci_save_state to restore it.
3816 */
3817 pci_save_state(pdev);
3818
3819 err = pci_enable_device_mem(pdev);
3820 if (err) {
3821 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
3822 return err;
3823 }
4e857c58 3824 smp_mb__before_atomic();
bc0c7151 3825 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
0ac1e8ce
AD		 3826 pci_set_master(pdev);
3827
798e381a
DS		 3828 ixgbevf_reset(adapter);
3829
0ac1e8ce
AD		 3830 rtnl_lock();
3831 err = ixgbevf_init_interrupt_scheme(adapter);
3832 rtnl_unlock();
3833 if (err) {
3834 dev_err(&pdev->dev, "Cannot initialize interrupts\n");
3835 return err;
3836 }
3837
0ac1e8ce
AD		 3838 if (netif_running(netdev)) {
3839 err = ixgbevf_open(netdev);
3840 if (err)
3841 return err;
3842 }
3843
3844 netif_device_attach(netdev);
3845
3846 return err;
3847}
3848
3849#endif /* CONFIG_PM */
3850static void ixgbevf_shutdown(struct pci_dev *pdev)
3851{
3852 ixgbevf_suspend(pdev, PMSG_SUSPEND);
92915f71
GR		 3853}
3854
4197aa7b
ED		 3855static struct rtnl_link_stats64 *ixgbevf_get_stats(struct net_device *netdev,
3856 struct rtnl_link_stats64 *stats)
3857{
3858 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3859 unsigned int start;
3860 u64 bytes, packets;
3861 const struct ixgbevf_ring *ring;
3862 int i;
3863
3864 ixgbevf_update_stats(adapter);
3865
3866 stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
3867
3868 for (i = 0; i < adapter->num_rx_queues; i++) {
87e70ab9 3869 ring = adapter->rx_ring[i];
4197aa7b 3870 do {
57a7744e 3871 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 3872 bytes = ring->stats.bytes;
3873 packets = ring->stats.packets;
57a7744e 3874 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 3875 stats->rx_bytes += bytes;
3876 stats->rx_packets += packets;
3877 }
3878
3879 for (i = 0; i < adapter->num_tx_queues; i++) {
87e70ab9 3880 ring = adapter->tx_ring[i];
4197aa7b 3881 do {
57a7744e 3882 start = u64_stats_fetch_begin_irq(&ring->syncp);
095e2617
ET		 3883 bytes = ring->stats.bytes;
3884 packets = ring->stats.packets;
57a7744e 3885 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
4197aa7b
ED		 3886 stats->tx_bytes += bytes;
3887 stats->tx_packets += packets;
3888 }
3889
3890 return stats;
3891}
3892
0ac1e8ce 3893static const struct net_device_ops ixgbevf_netdev_ops = {
c12db769
SH		 3894 .ndo_open = ixgbevf_open,
3895 .ndo_stop = ixgbevf_close,
3896 .ndo_start_xmit = ixgbevf_xmit_frame,
3897 .ndo_set_rx_mode = ixgbevf_set_rx_mode,
4197aa7b 3898 .ndo_get_stats64 = ixgbevf_get_stats,
92915f71 3899 .ndo_validate_addr = eth_validate_addr,
c12db769
SH		 3900 .ndo_set_mac_address = ixgbevf_set_mac,
3901 .ndo_change_mtu = ixgbevf_change_mtu,
3902 .ndo_tx_timeout = ixgbevf_tx_timeout,
c12db769
SH		 3903 .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
3904 .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
c777cdfa
JK		 3905#ifdef CONFIG_NET_RX_BUSY_POLL
3906 .ndo_busy_poll = ixgbevf_busy_poll_recv,
3907#endif
688ff32d
ET		 3908#ifdef CONFIG_NET_POLL_CONTROLLER
3909 .ndo_poll_controller = ixgbevf_netpoll,
3910#endif
0f90300f 3911 .ndo_features_check = passthru_features_check,
92915f71 3912};
92915f71
GR		 3913
3914static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3915{
0ac1e8ce 3916 dev->netdev_ops = &ixgbevf_netdev_ops;
92915f71
GR		 3917 ixgbevf_set_ethtool_ops(dev);
3918 dev->watchdog_timeo = 5 * HZ;
3919}
3920
3921/**
3922 * ixgbevf_probe - Device Initialization Routine
3923 * @pdev: PCI device information struct
3924 * @ent: entry in ixgbevf_pci_tbl
3925 *
3926 * Returns 0 on success, negative on failure
3927 *
3928 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3929 * The OS initialization, configuring of the adapter private structure,
3930 * and a hardware reset occur.
3931 **/
1dd06ae8 3932static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
92915f71
GR		 3933{
3934 struct net_device *netdev;
3935 struct ixgbevf_adapter *adapter = NULL;
3936 struct ixgbe_hw *hw = NULL;
3937 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
92915f71 3938 int err, pci_using_dac;
0333464f 3939 bool disable_dev = false;
92915f71
GR		 3940
3941 err = pci_enable_device(pdev);
3942 if (err)
3943 return err;
3944
53567aa4 3945 if (!dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3946 pci_using_dac = 1;
3947 } else {
53567aa4 3948 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3949 if (err) {
dec0d8e4 3950 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
53567aa4 3951 goto err_dma;
92915f71
GR		 3952 }
3953 pci_using_dac = 0;
3954 }
3955
3956 err = pci_request_regions(pdev, ixgbevf_driver_name);
3957 if (err) {
3958 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3959 goto err_pci_reg;
3960 }
3961
3962 pci_set_master(pdev);
3963
92915f71
GR		 3964 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3965 MAX_TX_QUEUES);
92915f71
GR		 3966 if (!netdev) {
3967 err = -ENOMEM;
3968 goto err_alloc_etherdev;
3969 }
3970
3971 SET_NETDEV_DEV(netdev, &pdev->dev);
3972
92915f71
GR		 3973 adapter = netdev_priv(netdev);
3974
3975 adapter->netdev = netdev;
3976 adapter->pdev = pdev;
3977 hw = &adapter->hw;
3978 hw->back = adapter;
b3f4d599 3979 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
92915f71 3980
dec0d8e4 3981 /* call save state here in standalone driver because it relies on
92915f71
GR		 3982 * adapter struct to exist, and needs to call netdev_priv
3983 */
3984 pci_save_state(pdev);
3985
3986 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3987 pci_resource_len(pdev, 0));
dbf8b0d8 3988 adapter->io_addr = hw->hw_addr;
92915f71
GR		 3989 if (!hw->hw_addr) {
3990 err = -EIO;
3991 goto err_ioremap;
3992 }
3993
3994 ixgbevf_assign_netdev_ops(netdev);
3995
dec0d8e4 3996 /* Setup HW API */
92915f71
GR		 3997 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3998 hw->mac.type = ii->mac;
3999
4000 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
f416dfc0 4001 sizeof(struct ixgbe_mbx_operations));
92915f71 4002
92915f71
GR		 4003 /* setup the private structure */
4004 err = ixgbevf_sw_init(adapter);
1a0d6ae5
DK		 4005 if (err)
4006 goto err_sw_init;
4007
4008 /* The HW MAC address was set and/or determined in sw_init */
1a0d6ae5
DK		 4009 if (!is_valid_ether_addr(netdev->dev_addr)) {
4010 pr_err("invalid MAC address\n");
4011 err = -EIO;
4012 goto err_sw_init;
4013 }
92915f71 4014
471a76de 4015 netdev->hw_features = NETIF_F_SG |
dec0d8e4
JK		 4016 NETIF_F_IP_CSUM |
4017 NETIF_F_IPV6_CSUM |
4018 NETIF_F_TSO |
4019 NETIF_F_TSO6 |
4020 NETIF_F_RXCSUM;
471a76de
MM		 4021
4022 netdev->features = netdev->hw_features |
f646968f
PM		 4023 NETIF_F_HW_VLAN_CTAG_TX |
4024 NETIF_F_HW_VLAN_CTAG_RX |
4025 NETIF_F_HW_VLAN_CTAG_FILTER;
92915f71 4026
39f35a37
ET		 4027 netdev->vlan_features |= NETIF_F_TSO |
4028 NETIF_F_TSO6 |
4029 NETIF_F_IP_CSUM |
4030 NETIF_F_IPV6_CSUM |
4031 NETIF_F_SG;
92915f71
GR		 4032
4033 if (pci_using_dac)
4034 netdev->features |= NETIF_F_HIGHDMA;
4035
01789349
JP		 4036 netdev->priv_flags |= IFF_UNICAST_FLT;
4037
ea699569
MR		 4038 if (IXGBE_REMOVED(hw->hw_addr)) {
4039 err = -EIO;
4040 goto err_sw_init;
4041 }
9ac5c5cc
ET		 4042
4043 setup_timer(&adapter->service_timer, &ixgbevf_service_timer,
4044 (unsigned long)adapter);
4045
4046 INIT_WORK(&adapter->service_task, ixgbevf_service_task);
4047 set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
4048 clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
92915f71
GR		 4049
4050 err = ixgbevf_init_interrupt_scheme(adapter);
4051 if (err)
4052 goto err_sw_init;
4053
92915f71
GR		 4054 strcpy(netdev->name, "eth%d");
4055
4056 err = register_netdev(netdev);
4057 if (err)
4058 goto err_register;
4059
0333464f 4060 pci_set_drvdata(pdev, netdev);
5d426ad1
GR		 4061 netif_carrier_off(netdev);
4062
33bd9f60
GR		 4063 ixgbevf_init_last_counter_stats(adapter);
4064
47068b0d
ET		 4065 /* print the VF info */
4066 dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
4067 dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
92915f71 4068
47068b0d
ET		 4069 switch (hw->mac.type) {
4070 case ixgbe_mac_X550_vf:
4071 dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
4072 break;
4073 case ixgbe_mac_X540_vf:
4074 dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
4075 break;
4076 case ixgbe_mac_82599_vf:
4077 default:
4078 dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
4079 break;
4080 }
92915f71 4081
92915f71
GR		 4082 return 0;
4083
4084err_register:
0ac1e8ce 4085 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4086err_sw_init:
4087 ixgbevf_reset_interrupt_capability(adapter);
dbf8b0d8 4088 iounmap(adapter->io_addr);
92915f71 4089err_ioremap:
0333464f 4090 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4091 free_netdev(netdev);
4092err_alloc_etherdev:
4093 pci_release_regions(pdev);
4094err_pci_reg:
4095err_dma:
0333464f 4096 if (!adapter || disable_dev)
bc0c7151 4097 pci_disable_device(pdev);
92915f71
GR		 4098 return err;
4099}
4100
4101/**
4102 * ixgbevf_remove - Device Removal Routine
4103 * @pdev: PCI device information struct
4104 *
4105 * ixgbevf_remove is called by the PCI subsystem to alert the driver
4106 * that it should release a PCI device. The could be caused by a
4107 * Hot-Plug event, or because the driver is going to be removed from
4108 * memory.
4109 **/
9f9a12f8 4110static void ixgbevf_remove(struct pci_dev *pdev)
92915f71
GR		 4111{
4112 struct net_device *netdev = pci_get_drvdata(pdev);
0333464f
ET		 4113 struct ixgbevf_adapter *adapter;
4114 bool disable_dev;
4115
4116 if (!netdev)
4117 return;
4118
4119 adapter = netdev_priv(netdev);
92915f71 4120
2e7cfbdd 4121 set_bit(__IXGBEVF_REMOVING, &adapter->state);
9ac5c5cc 4122 cancel_work_sync(&adapter->service_task);
92915f71 4123
fd13a9ab 4124 if (netdev->reg_state == NETREG_REGISTERED)
92915f71 4125 unregister_netdev(netdev);
92915f71 4126
0ac1e8ce 4127 ixgbevf_clear_interrupt_scheme(adapter);
92915f71
GR		 4128 ixgbevf_reset_interrupt_capability(adapter);
4129
dbf8b0d8 4130 iounmap(adapter->io_addr);
92915f71
GR		 4131 pci_release_regions(pdev);
4132
4133 hw_dbg(&adapter->hw, "Remove complete\n");
4134
0333464f 4135 disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
92915f71
GR		 4136 free_netdev(netdev);
4137
0333464f 4138 if (disable_dev)
bc0c7151 4139 pci_disable_device(pdev);
92915f71
GR		 4140}
4141
9f19f31d
AD		 4142/**
4143 * ixgbevf_io_error_detected - called when PCI error is detected
4144 * @pdev: Pointer to PCI device
4145 * @state: The current pci connection state
4146 *
4147 * This function is called after a PCI bus error affecting
4148 * this device has been detected.
dec0d8e4 4149 **/
9f19f31d
AD		 4150static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
4151 pci_channel_state_t state)
4152{
4153 struct net_device *netdev = pci_get_drvdata(pdev);
4154 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4155
9ac5c5cc 4156 if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
ea699569
MR		 4157 return PCI_ERS_RESULT_DISCONNECT;
4158
bc0c7151 4159 rtnl_lock();
9f19f31d
AD		 4160 netif_device_detach(netdev);
4161
bc0c7151
MR		 4162 if (state == pci_channel_io_perm_failure) {
4163 rtnl_unlock();
9f19f31d 4164 return PCI_ERS_RESULT_DISCONNECT;
bc0c7151 4165 }
9f19f31d
AD		 4166
4167 if (netif_running(netdev))
4168 ixgbevf_down(adapter);
4169
bc0c7151
MR		 4170 if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
4171 pci_disable_device(pdev);
4172 rtnl_unlock();
9f19f31d
AD		 4173
4174 /* Request a slot slot reset. */
4175 return PCI_ERS_RESULT_NEED_RESET;
4176}
4177
4178/**
4179 * ixgbevf_io_slot_reset - called after the pci bus has been reset.
4180 * @pdev: Pointer to PCI device
4181 *
4182 * Restart the card from scratch, as if from a cold-boot. Implementation
4183 * resembles the first-half of the ixgbevf_resume routine.
dec0d8e4 4184 **/
9f19f31d
AD		 4185static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
4186{
4187 struct net_device *netdev = pci_get_drvdata(pdev);
4188 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4189
4190 if (pci_enable_device_mem(pdev)) {
4191 dev_err(&pdev->dev,
4192 "Cannot re-enable PCI device after reset.\n");
4193 return PCI_ERS_RESULT_DISCONNECT;
4194 }
4195
4e857c58 4196 smp_mb__before_atomic();
bc0c7151 4197 clear_bit(__IXGBEVF_DISABLED, &adapter->state);
9f19f31d
AD		 4198 pci_set_master(pdev);
4199
4200 ixgbevf_reset(adapter);
4201
4202 return PCI_ERS_RESULT_RECOVERED;
4203}
4204
4205/**
4206 * ixgbevf_io_resume - called when traffic can start flowing again.
4207 * @pdev: Pointer to PCI device
4208 *
4209 * This callback is called when the error recovery driver tells us that
4210 * its OK to resume normal operation. Implementation resembles the
4211 * second-half of the ixgbevf_resume routine.
dec0d8e4 4212 **/
9f19f31d
AD		 4213static void ixgbevf_io_resume(struct pci_dev *pdev)
4214{
4215 struct net_device *netdev = pci_get_drvdata(pdev);
4216 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
4217
4218 if (netif_running(netdev))
4219 ixgbevf_up(adapter);
4220
4221 netif_device_attach(netdev);
4222}
4223
4224/* PCI Error Recovery (ERS) */
3646f0e5 4225static const struct pci_error_handlers ixgbevf_err_handler = {
9f19f31d
AD		 4226 .error_detected = ixgbevf_io_error_detected,
4227 .slot_reset = ixgbevf_io_slot_reset,
4228 .resume = ixgbevf_io_resume,
4229};
4230
92915f71 4231static struct pci_driver ixgbevf_driver = {
dec0d8e4
JK		 4232 .name = ixgbevf_driver_name,
4233 .id_table = ixgbevf_pci_tbl,
4234 .probe = ixgbevf_probe,
4235 .remove = ixgbevf_remove,
0ac1e8ce
AD		 4236#ifdef CONFIG_PM
4237 /* Power Management Hooks */
dec0d8e4
JK		 4238 .suspend = ixgbevf_suspend,
4239 .resume = ixgbevf_resume,
0ac1e8ce 4240#endif
dec0d8e4
JK		 4241 .shutdown = ixgbevf_shutdown,
4242 .err_handler = &ixgbevf_err_handler
92915f71
GR		 4243};
4244
4245/**
65d676c8 4246 * ixgbevf_init_module - Driver Registration Routine
92915f71 4247 *
65d676c8 4248 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 4249 * loaded. All it does is register with the PCI subsystem.
4250 **/
4251static int __init ixgbevf_init_module(void)
4252{
dbd9636e
JK		 4253 pr_info("%s - version %s\n", ixgbevf_driver_string,
4254 ixgbevf_driver_version);
92915f71 4255
dbd9636e 4256 pr_info("%s\n", ixgbevf_copyright);
40a13e24
MR		 4257 ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
4258 if (!ixgbevf_wq) {
4259 pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
4260 return -ENOMEM;
4261 }
92915f71 4262
50985b5f 4263 return pci_register_driver(&ixgbevf_driver);
92915f71
GR		 4264}
4265
4266module_init(ixgbevf_init_module);
4267
4268/**
65d676c8 4269 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 4270 *
65d676c8 4271 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 4272 * from memory.
4273 **/
4274static void __exit ixgbevf_exit_module(void)
4275{
4276 pci_unregister_driver(&ixgbevf_driver);
40a13e24
MR		 4277 if (ixgbevf_wq) {
4278 destroy_workqueue(ixgbevf_wq);
4279 ixgbevf_wq = NULL;
4280 }
92915f71
GR		 4281}
4282
4283#ifdef DEBUG
4284/**
65d676c8 4285 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 4286 * used by hardware layer to print debugging information
4287 **/
4288char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
4289{
4290 struct ixgbevf_adapter *adapter = hw->back;
dec0d8e4 4291
92915f71
GR		 4292 return adapter->netdev->name;
4293}
4294
4295#endif
4296module_exit(ixgbevf_exit_module);
4297
4298/* ixgbevf_main.c */
Linux kernel - Deliverables
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