Commit | Line | Data |
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2a2336f8 YP |
1 | /* |
2 | * Copyright (c) 2007 Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <linux/errno.h> | |
34 | #include <linux/if_ether.h> | |
c59fec20 | 35 | #include <linux/if_vlan.h> |
ee40fa06 | 36 | #include <linux/export.h> |
2a2336f8 YP |
37 | |
38 | #include <linux/mlx4/cmd.h> | |
39 | ||
40 | #include "mlx4.h" | |
b4b6e842 | 41 | #include "mlx4_stats.h" |
2a2336f8 YP |
42 | |
43 | #define MLX4_MAC_VALID (1ull << 63) | |
2a2336f8 YP |
44 | |
45 | #define MLX4_VLAN_VALID (1u << 31) | |
46 | #define MLX4_VLAN_MASK 0xfff | |
47 | ||
78500b8c MM |
48 | #define MLX4_STATS_TRAFFIC_COUNTERS_MASK 0xfULL |
49 | #define MLX4_STATS_TRAFFIC_DROPS_MASK 0xc0ULL | |
50 | #define MLX4_STATS_ERROR_COUNTERS_MASK 0x1ffc30ULL | |
51 | #define MLX4_STATS_PORT_COUNTERS_MASK 0x1fe00000ULL | |
52 | ||
53 | #define MLX4_FLAG_V_IGNORE_FCS_MASK 0x2 | |
54 | #define MLX4_IGNORE_FCS_MASK 0x1 | |
564ed9b1 | 55 | #define MLX4_TC_MAX_NUMBER 8 |
78500b8c | 56 | |
2a2336f8 YP |
57 | void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table) |
58 | { | |
59 | int i; | |
60 | ||
61 | mutex_init(&table->mutex); | |
62 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { | |
63 | table->entries[i] = 0; | |
64 | table->refs[i] = 0; | |
5f61385d | 65 | table->is_dup[i] = false; |
2a2336f8 YP |
66 | } |
67 | table->max = 1 << dev->caps.log_num_macs; | |
68 | table->total = 0; | |
69 | } | |
70 | ||
71 | void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table) | |
72 | { | |
73 | int i; | |
74 | ||
75 | mutex_init(&table->mutex); | |
76 | for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { | |
77 | table->entries[i] = 0; | |
78 | table->refs[i] = 0; | |
5f61385d | 79 | table->is_dup[i] = false; |
2a2336f8 | 80 | } |
e72ebf5a | 81 | table->max = (1 << dev->caps.log_num_vlans) - MLX4_VLAN_REGULAR; |
2a2336f8 YP |
82 | table->total = 0; |
83 | } | |
84 | ||
111c6094 JM |
85 | void mlx4_init_roce_gid_table(struct mlx4_dev *dev, |
86 | struct mlx4_roce_gid_table *table) | |
87 | { | |
88 | int i; | |
89 | ||
90 | mutex_init(&table->mutex); | |
91 | for (i = 0; i < MLX4_ROCE_MAX_GIDS; i++) | |
92 | memset(table->roce_gids[i].raw, 0, MLX4_ROCE_GID_ENTRY_SIZE); | |
93 | } | |
94 | ||
ffe455ad EE |
95 | static int validate_index(struct mlx4_dev *dev, |
96 | struct mlx4_mac_table *table, int index) | |
97 | { | |
98 | int err = 0; | |
99 | ||
100 | if (index < 0 || index >= table->max || !table->entries[index]) { | |
101 | mlx4_warn(dev, "No valid Mac entry for the given index\n"); | |
102 | err = -EINVAL; | |
103 | } | |
104 | return err; | |
105 | } | |
106 | ||
107 | static int find_index(struct mlx4_dev *dev, | |
108 | struct mlx4_mac_table *table, u64 mac) | |
109 | { | |
110 | int i; | |
111 | ||
112 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { | |
f4fd40b2 JM |
113 | if (table->refs[i] && |
114 | (MLX4_MAC_MASK & mac) == | |
ffe455ad EE |
115 | (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) |
116 | return i; | |
117 | } | |
118 | /* Mac not found */ | |
119 | return -EINVAL; | |
1679200f YP |
120 | } |
121 | ||
ffe455ad EE |
122 | static int mlx4_set_port_mac_table(struct mlx4_dev *dev, u8 port, |
123 | __be64 *entries) | |
124 | { | |
125 | struct mlx4_cmd_mailbox *mailbox; | |
126 | u32 in_mod; | |
127 | int err; | |
128 | ||
129 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
130 | if (IS_ERR(mailbox)) | |
131 | return PTR_ERR(mailbox); | |
132 | ||
133 | memcpy(mailbox->buf, entries, MLX4_MAC_TABLE_SIZE); | |
134 | ||
135 | in_mod = MLX4_SET_PORT_MAC_TABLE << 8 | port; | |
0f6740c7 | 136 | |
a130b590 IS |
137 | err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, |
138 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
139 | MLX4_CMD_NATIVE); | |
ffe455ad EE |
140 | |
141 | mlx4_free_cmd_mailbox(dev, mailbox); | |
142 | return err; | |
143 | } | |
144 | ||
297e0dad MS |
145 | int mlx4_find_cached_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *idx) |
146 | { | |
147 | struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; | |
148 | struct mlx4_mac_table *table = &info->mac_table; | |
149 | int i; | |
150 | ||
151 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { | |
152 | if (!table->refs[i]) | |
153 | continue; | |
154 | ||
155 | if (mac == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) { | |
156 | *idx = i; | |
157 | return 0; | |
158 | } | |
159 | } | |
160 | ||
161 | return -ENOENT; | |
162 | } | |
163 | EXPORT_SYMBOL_GPL(mlx4_find_cached_mac); | |
164 | ||
5f61385d MS |
165 | static bool mlx4_need_mf_bond(struct mlx4_dev *dev) |
166 | { | |
167 | int i, num_eth_ports = 0; | |
168 | ||
169 | if (!mlx4_is_mfunc(dev)) | |
170 | return false; | |
171 | mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) | |
172 | ++num_eth_ports; | |
173 | ||
174 | return (num_eth_ports == 2) ? true : false; | |
175 | } | |
176 | ||
ffe455ad EE |
177 | int __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac) |
178 | { | |
179 | struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; | |
180 | struct mlx4_mac_table *table = &info->mac_table; | |
181 | int i, err = 0; | |
182 | int free = -1; | |
5f61385d MS |
183 | int free_for_dup = -1; |
184 | bool dup = mlx4_is_mf_bonded(dev); | |
185 | u8 dup_port = (port == 1) ? 2 : 1; | |
186 | struct mlx4_mac_table *dup_table = &mlx4_priv(dev)->port[dup_port].mac_table; | |
187 | bool need_mf_bond = mlx4_need_mf_bond(dev); | |
188 | bool can_mf_bond = true; | |
189 | ||
190 | mlx4_dbg(dev, "Registering MAC: 0x%llx for port %d %s duplicate\n", | |
191 | (unsigned long long)mac, port, | |
192 | dup ? "with" : "without"); | |
193 | ||
194 | if (need_mf_bond) { | |
195 | if (port == 1) { | |
196 | mutex_lock(&table->mutex); | |
03a79f31 | 197 | mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); |
5f61385d MS |
198 | } else { |
199 | mutex_lock(&dup_table->mutex); | |
03a79f31 | 200 | mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); |
5f61385d MS |
201 | } |
202 | } else { | |
203 | mutex_lock(&table->mutex); | |
204 | } | |
ffe455ad | 205 | |
5f61385d MS |
206 | if (need_mf_bond) { |
207 | int index_at_port = -1; | |
208 | int index_at_dup_port = -1; | |
209 | ||
210 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { | |
211 | if (((MLX4_MAC_MASK & mac) == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i])))) | |
212 | index_at_port = i; | |
213 | if (((MLX4_MAC_MASK & mac) == (MLX4_MAC_MASK & be64_to_cpu(dup_table->entries[i])))) | |
214 | index_at_dup_port = i; | |
215 | } | |
216 | ||
217 | /* check that same mac is not in the tables at different indices */ | |
218 | if ((index_at_port != index_at_dup_port) && | |
219 | (index_at_port >= 0) && | |
220 | (index_at_dup_port >= 0)) | |
221 | can_mf_bond = false; | |
222 | ||
223 | /* If the mac is already in the primary table, the slot must be | |
224 | * available in the duplicate table as well. | |
225 | */ | |
226 | if (index_at_port >= 0 && index_at_dup_port < 0 && | |
227 | dup_table->refs[index_at_port]) { | |
228 | can_mf_bond = false; | |
229 | } | |
230 | /* If the mac is already in the duplicate table, check that the | |
231 | * corresponding index is not occupied in the primary table, or | |
232 | * the primary table already contains the mac at the same index. | |
233 | * Otherwise, you cannot bond (primary contains a different mac | |
234 | * at that index). | |
235 | */ | |
236 | if (index_at_dup_port >= 0) { | |
237 | if (!table->refs[index_at_dup_port] || | |
238 | ((MLX4_MAC_MASK & mac) == (MLX4_MAC_MASK & be64_to_cpu(table->entries[index_at_dup_port])))) | |
239 | free_for_dup = index_at_dup_port; | |
240 | else | |
241 | can_mf_bond = false; | |
242 | } | |
243 | } | |
0f6740c7 | 244 | |
ffe455ad | 245 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { |
f4fd40b2 JM |
246 | if (!table->refs[i]) { |
247 | if (free < 0) | |
248 | free = i; | |
5f61385d MS |
249 | if (free_for_dup < 0 && need_mf_bond && can_mf_bond) { |
250 | if (!dup_table->refs[i]) | |
251 | free_for_dup = i; | |
252 | } | |
2a2336f8 YP |
253 | continue; |
254 | } | |
255 | ||
f4fd40b2 JM |
256 | if ((MLX4_MAC_MASK & mac) == |
257 | (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) { | |
6ce71acd RE |
258 | /* MAC already registered, increment ref count */ |
259 | err = i; | |
260 | ++table->refs[i]; | |
5f61385d MS |
261 | if (dup) { |
262 | u64 dup_mac = MLX4_MAC_MASK & be64_to_cpu(dup_table->entries[i]); | |
263 | ||
264 | if (dup_mac != mac || !dup_table->is_dup[i]) { | |
265 | mlx4_warn(dev, "register mac: expect duplicate mac 0x%llx on port %d index %d\n", | |
266 | mac, dup_port, i); | |
267 | } | |
268 | } | |
2a2336f8 YP |
269 | goto out; |
270 | } | |
271 | } | |
0926f910 | 272 | |
5f61385d MS |
273 | if (need_mf_bond && (free_for_dup < 0)) { |
274 | if (dup) { | |
275 | mlx4_warn(dev, "Fail to allocate duplicate MAC table entry\n"); | |
276 | mlx4_warn(dev, "High Availability for virtual functions may not work as expected\n"); | |
277 | dup = false; | |
278 | } | |
279 | can_mf_bond = false; | |
280 | } | |
281 | ||
282 | if (need_mf_bond && can_mf_bond) | |
283 | free = free_for_dup; | |
284 | ||
2a2336f8 YP |
285 | mlx4_dbg(dev, "Free MAC index is %d\n", free); |
286 | ||
287 | if (table->total == table->max) { | |
288 | /* No free mac entries */ | |
289 | err = -ENOSPC; | |
290 | goto out; | |
291 | } | |
292 | ||
293 | /* Register new MAC */ | |
2a2336f8 YP |
294 | table->entries[free] = cpu_to_be64(mac | MLX4_MAC_VALID); |
295 | ||
296 | err = mlx4_set_port_mac_table(dev, port, table->entries); | |
297 | if (unlikely(err)) { | |
ffe455ad EE |
298 | mlx4_err(dev, "Failed adding MAC: 0x%llx\n", |
299 | (unsigned long long) mac); | |
2a2336f8 YP |
300 | table->entries[free] = 0; |
301 | goto out; | |
302 | } | |
6ce71acd | 303 | table->refs[free] = 1; |
5f61385d | 304 | table->is_dup[free] = false; |
2a2336f8 | 305 | ++table->total; |
5f61385d MS |
306 | if (dup) { |
307 | dup_table->refs[free] = 0; | |
308 | dup_table->is_dup[free] = true; | |
309 | dup_table->entries[free] = cpu_to_be64(mac | MLX4_MAC_VALID); | |
310 | ||
311 | err = mlx4_set_port_mac_table(dev, dup_port, dup_table->entries); | |
312 | if (unlikely(err)) { | |
313 | mlx4_warn(dev, "Failed adding duplicate mac: 0x%llx\n", mac); | |
314 | dup_table->is_dup[free] = false; | |
315 | dup_table->entries[free] = 0; | |
316 | goto out; | |
317 | } | |
318 | ++dup_table->total; | |
319 | } | |
320 | err = free; | |
2a2336f8 | 321 | out: |
5f61385d MS |
322 | if (need_mf_bond) { |
323 | if (port == 2) { | |
324 | mutex_unlock(&table->mutex); | |
325 | mutex_unlock(&dup_table->mutex); | |
326 | } else { | |
327 | mutex_unlock(&dup_table->mutex); | |
328 | mutex_unlock(&table->mutex); | |
329 | } | |
330 | } else { | |
331 | mutex_unlock(&table->mutex); | |
332 | } | |
2a2336f8 YP |
333 | return err; |
334 | } | |
ffe455ad | 335 | EXPORT_SYMBOL_GPL(__mlx4_register_mac); |
2a2336f8 | 336 | |
ffe455ad | 337 | int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac) |
2a2336f8 | 338 | { |
e7dbeba8 | 339 | u64 out_param = 0; |
acddd5dd | 340 | int err = -EINVAL; |
2a2336f8 | 341 | |
ffe455ad | 342 | if (mlx4_is_mfunc(dev)) { |
acddd5dd JM |
343 | if (!(dev->flags & MLX4_FLAG_OLD_REG_MAC)) { |
344 | err = mlx4_cmd_imm(dev, mac, &out_param, | |
345 | ((u32) port) << 8 | (u32) RES_MAC, | |
346 | RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, | |
347 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
348 | } | |
349 | if (err && err == -EINVAL && mlx4_is_slave(dev)) { | |
350 | /* retry using old REG_MAC format */ | |
351 | set_param_l(&out_param, port); | |
352 | err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC, | |
353 | RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, | |
354 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
355 | if (!err) | |
356 | dev->flags |= MLX4_FLAG_OLD_REG_MAC; | |
357 | } | |
ffe455ad EE |
358 | if (err) |
359 | return err; | |
1679200f | 360 | |
ffe455ad | 361 | return get_param_l(&out_param); |
1679200f | 362 | } |
ffe455ad | 363 | return __mlx4_register_mac(dev, port, mac); |
1679200f | 364 | } |
ffe455ad EE |
365 | EXPORT_SYMBOL_GPL(mlx4_register_mac); |
366 | ||
16a10ffd YB |
367 | int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port) |
368 | { | |
369 | return dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] + | |
370 | (port - 1) * (1 << dev->caps.log_num_macs); | |
371 | } | |
372 | EXPORT_SYMBOL_GPL(mlx4_get_base_qpn); | |
1679200f | 373 | |
ffe455ad | 374 | void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac) |
1679200f | 375 | { |
143b3efb EE |
376 | struct mlx4_port_info *info; |
377 | struct mlx4_mac_table *table; | |
ffe455ad | 378 | int index; |
5f61385d MS |
379 | bool dup = mlx4_is_mf_bonded(dev); |
380 | u8 dup_port = (port == 1) ? 2 : 1; | |
381 | struct mlx4_mac_table *dup_table = &mlx4_priv(dev)->port[dup_port].mac_table; | |
1679200f | 382 | |
143b3efb EE |
383 | if (port < 1 || port > dev->caps.num_ports) { |
384 | mlx4_warn(dev, "invalid port number (%d), aborting...\n", port); | |
385 | return; | |
386 | } | |
387 | info = &mlx4_priv(dev)->port[port]; | |
388 | table = &info->mac_table; | |
5f61385d MS |
389 | |
390 | if (dup) { | |
391 | if (port == 1) { | |
392 | mutex_lock(&table->mutex); | |
03a79f31 | 393 | mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); |
5f61385d MS |
394 | } else { |
395 | mutex_lock(&dup_table->mutex); | |
03a79f31 | 396 | mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); |
5f61385d MS |
397 | } |
398 | } else { | |
399 | mutex_lock(&table->mutex); | |
400 | } | |
401 | ||
6ce71acd | 402 | index = find_index(dev, table, mac); |
1679200f YP |
403 | |
404 | if (validate_index(dev, table, index)) | |
405 | goto out; | |
5f61385d MS |
406 | |
407 | if (--table->refs[index] || table->is_dup[index]) { | |
1a91de28 JP |
408 | mlx4_dbg(dev, "Have more references for index %d, no need to modify mac table\n", |
409 | index); | |
5f61385d MS |
410 | if (!table->refs[index]) |
411 | dup_table->is_dup[index] = false; | |
6ce71acd RE |
412 | goto out; |
413 | } | |
1679200f | 414 | |
ffe455ad | 415 | table->entries[index] = 0; |
5f61385d MS |
416 | if (mlx4_set_port_mac_table(dev, port, table->entries)) |
417 | mlx4_warn(dev, "Fail to set mac in port %d during unregister\n", port); | |
ffe455ad | 418 | --table->total; |
5f61385d MS |
419 | |
420 | if (dup) { | |
421 | dup_table->is_dup[index] = false; | |
422 | if (dup_table->refs[index]) | |
423 | goto out; | |
424 | dup_table->entries[index] = 0; | |
425 | if (mlx4_set_port_mac_table(dev, dup_port, dup_table->entries)) | |
426 | mlx4_warn(dev, "Fail to set mac in duplicate port %d during unregister\n", dup_port); | |
427 | ||
428 | --table->total; | |
429 | } | |
2a2336f8 | 430 | out: |
5f61385d MS |
431 | if (dup) { |
432 | if (port == 2) { | |
433 | mutex_unlock(&table->mutex); | |
434 | mutex_unlock(&dup_table->mutex); | |
435 | } else { | |
436 | mutex_unlock(&dup_table->mutex); | |
437 | mutex_unlock(&table->mutex); | |
438 | } | |
439 | } else { | |
440 | mutex_unlock(&table->mutex); | |
441 | } | |
2a2336f8 | 442 | } |
ffe455ad EE |
443 | EXPORT_SYMBOL_GPL(__mlx4_unregister_mac); |
444 | ||
445 | void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac) | |
446 | { | |
e7dbeba8 | 447 | u64 out_param = 0; |
ffe455ad EE |
448 | |
449 | if (mlx4_is_mfunc(dev)) { | |
acddd5dd JM |
450 | if (!(dev->flags & MLX4_FLAG_OLD_REG_MAC)) { |
451 | (void) mlx4_cmd_imm(dev, mac, &out_param, | |
452 | ((u32) port) << 8 | (u32) RES_MAC, | |
453 | RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES, | |
454 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
455 | } else { | |
456 | /* use old unregister mac format */ | |
457 | set_param_l(&out_param, port); | |
458 | (void) mlx4_cmd_imm(dev, mac, &out_param, RES_MAC, | |
459 | RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES, | |
460 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
461 | } | |
ffe455ad EE |
462 | return; |
463 | } | |
464 | __mlx4_unregister_mac(dev, port, mac); | |
465 | return; | |
466 | } | |
2a2336f8 YP |
467 | EXPORT_SYMBOL_GPL(mlx4_unregister_mac); |
468 | ||
16a10ffd | 469 | int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac) |
1679200f YP |
470 | { |
471 | struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; | |
472 | struct mlx4_mac_table *table = &info->mac_table; | |
ffe455ad EE |
473 | int index = qpn - info->base_qpn; |
474 | int err = 0; | |
5f61385d MS |
475 | bool dup = mlx4_is_mf_bonded(dev); |
476 | u8 dup_port = (port == 1) ? 2 : 1; | |
477 | struct mlx4_mac_table *dup_table = &mlx4_priv(dev)->port[dup_port].mac_table; | |
1679200f | 478 | |
ffe455ad | 479 | /* CX1 doesn't support multi-functions */ |
5f61385d MS |
480 | if (dup) { |
481 | if (port == 1) { | |
482 | mutex_lock(&table->mutex); | |
03a79f31 | 483 | mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); |
5f61385d MS |
484 | } else { |
485 | mutex_lock(&dup_table->mutex); | |
03a79f31 | 486 | mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); |
5f61385d MS |
487 | } |
488 | } else { | |
489 | mutex_lock(&table->mutex); | |
490 | } | |
1679200f YP |
491 | |
492 | err = validate_index(dev, table, index); | |
493 | if (err) | |
494 | goto out; | |
495 | ||
496 | table->entries[index] = cpu_to_be64(new_mac | MLX4_MAC_VALID); | |
497 | ||
498 | err = mlx4_set_port_mac_table(dev, port, table->entries); | |
499 | if (unlikely(err)) { | |
ffe455ad EE |
500 | mlx4_err(dev, "Failed adding MAC: 0x%llx\n", |
501 | (unsigned long long) new_mac); | |
1679200f | 502 | table->entries[index] = 0; |
5f61385d MS |
503 | } else { |
504 | if (dup) { | |
505 | dup_table->entries[index] = cpu_to_be64(new_mac | MLX4_MAC_VALID); | |
506 | ||
507 | err = mlx4_set_port_mac_table(dev, dup_port, dup_table->entries); | |
508 | if (unlikely(err)) { | |
509 | mlx4_err(dev, "Failed adding duplicate MAC: 0x%llx\n", | |
510 | (unsigned long long)new_mac); | |
511 | dup_table->entries[index] = 0; | |
512 | } | |
513 | } | |
1679200f YP |
514 | } |
515 | out: | |
5f61385d MS |
516 | if (dup) { |
517 | if (port == 2) { | |
518 | mutex_unlock(&table->mutex); | |
519 | mutex_unlock(&dup_table->mutex); | |
520 | } else { | |
521 | mutex_unlock(&dup_table->mutex); | |
522 | mutex_unlock(&table->mutex); | |
523 | } | |
524 | } else { | |
525 | mutex_unlock(&table->mutex); | |
526 | } | |
1679200f YP |
527 | return err; |
528 | } | |
16a10ffd | 529 | EXPORT_SYMBOL_GPL(__mlx4_replace_mac); |
ffe455ad | 530 | |
2a2336f8 YP |
531 | static int mlx4_set_port_vlan_table(struct mlx4_dev *dev, u8 port, |
532 | __be32 *entries) | |
533 | { | |
534 | struct mlx4_cmd_mailbox *mailbox; | |
535 | u32 in_mod; | |
536 | int err; | |
537 | ||
538 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
539 | if (IS_ERR(mailbox)) | |
540 | return PTR_ERR(mailbox); | |
541 | ||
542 | memcpy(mailbox->buf, entries, MLX4_VLAN_TABLE_SIZE); | |
543 | in_mod = MLX4_SET_PORT_VLAN_TABLE << 8 | port; | |
a130b590 IS |
544 | err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, |
545 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
546 | MLX4_CMD_NATIVE); | |
2a2336f8 YP |
547 | |
548 | mlx4_free_cmd_mailbox(dev, mailbox); | |
549 | ||
550 | return err; | |
551 | } | |
552 | ||
4c3eb3ca EC |
553 | int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx) |
554 | { | |
555 | struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; | |
556 | int i; | |
557 | ||
558 | for (i = 0; i < MLX4_MAX_VLAN_NUM; ++i) { | |
559 | if (table->refs[i] && | |
560 | (vid == (MLX4_VLAN_MASK & | |
561 | be32_to_cpu(table->entries[i])))) { | |
562 | /* VLAN already registered, increase reference count */ | |
563 | *idx = i; | |
564 | return 0; | |
565 | } | |
566 | } | |
567 | ||
568 | return -ENOENT; | |
569 | } | |
570 | EXPORT_SYMBOL_GPL(mlx4_find_cached_vlan); | |
571 | ||
3f7fb021 | 572 | int __mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, |
ffe455ad | 573 | int *index) |
2a2336f8 YP |
574 | { |
575 | struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; | |
576 | int i, err = 0; | |
577 | int free = -1; | |
5f61385d MS |
578 | int free_for_dup = -1; |
579 | bool dup = mlx4_is_mf_bonded(dev); | |
580 | u8 dup_port = (port == 1) ? 2 : 1; | |
581 | struct mlx4_vlan_table *dup_table = &mlx4_priv(dev)->port[dup_port].vlan_table; | |
582 | bool need_mf_bond = mlx4_need_mf_bond(dev); | |
583 | bool can_mf_bond = true; | |
584 | ||
585 | mlx4_dbg(dev, "Registering VLAN: %d for port %d %s duplicate\n", | |
586 | vlan, port, | |
587 | dup ? "with" : "without"); | |
588 | ||
589 | if (need_mf_bond) { | |
590 | if (port == 1) { | |
591 | mutex_lock(&table->mutex); | |
03a79f31 | 592 | mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); |
5f61385d MS |
593 | } else { |
594 | mutex_lock(&dup_table->mutex); | |
03a79f31 | 595 | mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); |
5f61385d MS |
596 | } |
597 | } else { | |
598 | mutex_lock(&table->mutex); | |
599 | } | |
e72ebf5a YP |
600 | |
601 | if (table->total == table->max) { | |
602 | /* No free vlan entries */ | |
603 | err = -ENOSPC; | |
604 | goto out; | |
605 | } | |
606 | ||
5f61385d MS |
607 | if (need_mf_bond) { |
608 | int index_at_port = -1; | |
609 | int index_at_dup_port = -1; | |
610 | ||
611 | for (i = MLX4_VLAN_REGULAR; i < MLX4_MAX_VLAN_NUM; i++) { | |
612 | if ((vlan == (MLX4_VLAN_MASK & be32_to_cpu(table->entries[i])))) | |
613 | index_at_port = i; | |
614 | if ((vlan == (MLX4_VLAN_MASK & be32_to_cpu(dup_table->entries[i])))) | |
615 | index_at_dup_port = i; | |
616 | } | |
617 | /* check that same vlan is not in the tables at different indices */ | |
618 | if ((index_at_port != index_at_dup_port) && | |
619 | (index_at_port >= 0) && | |
620 | (index_at_dup_port >= 0)) | |
621 | can_mf_bond = false; | |
622 | ||
623 | /* If the vlan is already in the primary table, the slot must be | |
624 | * available in the duplicate table as well. | |
625 | */ | |
626 | if (index_at_port >= 0 && index_at_dup_port < 0 && | |
627 | dup_table->refs[index_at_port]) { | |
628 | can_mf_bond = false; | |
629 | } | |
630 | /* If the vlan is already in the duplicate table, check that the | |
631 | * corresponding index is not occupied in the primary table, or | |
632 | * the primary table already contains the vlan at the same index. | |
633 | * Otherwise, you cannot bond (primary contains a different vlan | |
634 | * at that index). | |
635 | */ | |
636 | if (index_at_dup_port >= 0) { | |
637 | if (!table->refs[index_at_dup_port] || | |
638 | (vlan == (MLX4_VLAN_MASK & be32_to_cpu(dup_table->entries[index_at_dup_port])))) | |
639 | free_for_dup = index_at_dup_port; | |
640 | else | |
641 | can_mf_bond = false; | |
642 | } | |
643 | } | |
644 | ||
2a2336f8 | 645 | for (i = MLX4_VLAN_REGULAR; i < MLX4_MAX_VLAN_NUM; i++) { |
5f61385d MS |
646 | if (!table->refs[i]) { |
647 | if (free < 0) | |
648 | free = i; | |
649 | if (free_for_dup < 0 && need_mf_bond && can_mf_bond) { | |
650 | if (!dup_table->refs[i]) | |
651 | free_for_dup = i; | |
652 | } | |
2a2336f8 YP |
653 | } |
654 | ||
5f61385d | 655 | if ((table->refs[i] || table->is_dup[i]) && |
2a2336f8 YP |
656 | (vlan == (MLX4_VLAN_MASK & |
657 | be32_to_cpu(table->entries[i])))) { | |
25985edc | 658 | /* Vlan already registered, increase references count */ |
5f61385d | 659 | mlx4_dbg(dev, "vlan %u is already registered.\n", vlan); |
2a2336f8 YP |
660 | *index = i; |
661 | ++table->refs[i]; | |
5f61385d MS |
662 | if (dup) { |
663 | u16 dup_vlan = MLX4_VLAN_MASK & be32_to_cpu(dup_table->entries[i]); | |
664 | ||
665 | if (dup_vlan != vlan || !dup_table->is_dup[i]) { | |
666 | mlx4_warn(dev, "register vlan: expected duplicate vlan %u on port %d index %d\n", | |
667 | vlan, dup_port, i); | |
668 | } | |
669 | } | |
2a2336f8 YP |
670 | goto out; |
671 | } | |
672 | } | |
673 | ||
5f61385d MS |
674 | if (need_mf_bond && (free_for_dup < 0)) { |
675 | if (dup) { | |
676 | mlx4_warn(dev, "Fail to allocate duplicate VLAN table entry\n"); | |
677 | mlx4_warn(dev, "High Availability for virtual functions may not work as expected\n"); | |
678 | dup = false; | |
679 | } | |
680 | can_mf_bond = false; | |
681 | } | |
682 | ||
683 | if (need_mf_bond && can_mf_bond) | |
684 | free = free_for_dup; | |
685 | ||
0926f910 EC |
686 | if (free < 0) { |
687 | err = -ENOMEM; | |
688 | goto out; | |
689 | } | |
690 | ||
ffe455ad | 691 | /* Register new VLAN */ |
2a2336f8 | 692 | table->refs[free] = 1; |
5f61385d | 693 | table->is_dup[free] = false; |
2a2336f8 YP |
694 | table->entries[free] = cpu_to_be32(vlan | MLX4_VLAN_VALID); |
695 | ||
696 | err = mlx4_set_port_vlan_table(dev, port, table->entries); | |
697 | if (unlikely(err)) { | |
698 | mlx4_warn(dev, "Failed adding vlan: %u\n", vlan); | |
699 | table->refs[free] = 0; | |
700 | table->entries[free] = 0; | |
701 | goto out; | |
702 | } | |
5f61385d MS |
703 | ++table->total; |
704 | if (dup) { | |
705 | dup_table->refs[free] = 0; | |
706 | dup_table->is_dup[free] = true; | |
707 | dup_table->entries[free] = cpu_to_be32(vlan | MLX4_VLAN_VALID); | |
708 | ||
709 | err = mlx4_set_port_vlan_table(dev, dup_port, dup_table->entries); | |
710 | if (unlikely(err)) { | |
711 | mlx4_warn(dev, "Failed adding duplicate vlan: %u\n", vlan); | |
712 | dup_table->is_dup[free] = false; | |
713 | dup_table->entries[free] = 0; | |
714 | goto out; | |
715 | } | |
716 | ++dup_table->total; | |
717 | } | |
2a2336f8 YP |
718 | |
719 | *index = free; | |
2a2336f8 | 720 | out: |
5f61385d MS |
721 | if (need_mf_bond) { |
722 | if (port == 2) { | |
723 | mutex_unlock(&table->mutex); | |
724 | mutex_unlock(&dup_table->mutex); | |
725 | } else { | |
726 | mutex_unlock(&dup_table->mutex); | |
727 | mutex_unlock(&table->mutex); | |
728 | } | |
729 | } else { | |
730 | mutex_unlock(&table->mutex); | |
731 | } | |
2a2336f8 YP |
732 | return err; |
733 | } | |
ffe455ad EE |
734 | |
735 | int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index) | |
736 | { | |
e7dbeba8 | 737 | u64 out_param = 0; |
ffe455ad EE |
738 | int err; |
739 | ||
162226a1 JM |
740 | if (vlan > 4095) |
741 | return -EINVAL; | |
742 | ||
ffe455ad | 743 | if (mlx4_is_mfunc(dev)) { |
acddd5dd JM |
744 | err = mlx4_cmd_imm(dev, vlan, &out_param, |
745 | ((u32) port) << 8 | (u32) RES_VLAN, | |
ffe455ad EE |
746 | RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, |
747 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
748 | if (!err) | |
749 | *index = get_param_l(&out_param); | |
750 | ||
751 | return err; | |
752 | } | |
753 | return __mlx4_register_vlan(dev, port, vlan, index); | |
754 | } | |
2a2336f8 YP |
755 | EXPORT_SYMBOL_GPL(mlx4_register_vlan); |
756 | ||
2009d005 | 757 | void __mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan) |
2a2336f8 YP |
758 | { |
759 | struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; | |
2009d005 | 760 | int index; |
5f61385d MS |
761 | bool dup = mlx4_is_mf_bonded(dev); |
762 | u8 dup_port = (port == 1) ? 2 : 1; | |
763 | struct mlx4_vlan_table *dup_table = &mlx4_priv(dev)->port[dup_port].vlan_table; | |
764 | ||
765 | if (dup) { | |
766 | if (port == 1) { | |
767 | mutex_lock(&table->mutex); | |
03a79f31 | 768 | mutex_lock_nested(&dup_table->mutex, SINGLE_DEPTH_NESTING); |
5f61385d MS |
769 | } else { |
770 | mutex_lock(&dup_table->mutex); | |
03a79f31 | 771 | mutex_lock_nested(&table->mutex, SINGLE_DEPTH_NESTING); |
5f61385d MS |
772 | } |
773 | } else { | |
774 | mutex_lock(&table->mutex); | |
775 | } | |
2a2336f8 | 776 | |
2009d005 JM |
777 | if (mlx4_find_cached_vlan(dev, port, vlan, &index)) { |
778 | mlx4_warn(dev, "vlan 0x%x is not in the vlan table\n", vlan); | |
779 | goto out; | |
2a2336f8 YP |
780 | } |
781 | ||
2009d005 JM |
782 | if (index < MLX4_VLAN_REGULAR) { |
783 | mlx4_warn(dev, "Trying to free special vlan index %d\n", index); | |
2a2336f8 YP |
784 | goto out; |
785 | } | |
2009d005 | 786 | |
5f61385d | 787 | if (--table->refs[index] || table->is_dup[index]) { |
1a91de28 JP |
788 | mlx4_dbg(dev, "Have %d more references for index %d, no need to modify vlan table\n", |
789 | table->refs[index], index); | |
5f61385d MS |
790 | if (!table->refs[index]) |
791 | dup_table->is_dup[index] = false; | |
2a2336f8 YP |
792 | goto out; |
793 | } | |
794 | table->entries[index] = 0; | |
5f61385d MS |
795 | if (mlx4_set_port_vlan_table(dev, port, table->entries)) |
796 | mlx4_warn(dev, "Fail to set vlan in port %d during unregister\n", port); | |
2a2336f8 | 797 | --table->total; |
5f61385d MS |
798 | if (dup) { |
799 | dup_table->is_dup[index] = false; | |
800 | if (dup_table->refs[index]) | |
801 | goto out; | |
802 | dup_table->entries[index] = 0; | |
803 | if (mlx4_set_port_vlan_table(dev, dup_port, dup_table->entries)) | |
804 | mlx4_warn(dev, "Fail to set vlan in duplicate port %d during unregister\n", dup_port); | |
805 | --dup_table->total; | |
806 | } | |
2a2336f8 | 807 | out: |
5f61385d MS |
808 | if (dup) { |
809 | if (port == 2) { | |
810 | mutex_unlock(&table->mutex); | |
811 | mutex_unlock(&dup_table->mutex); | |
812 | } else { | |
813 | mutex_unlock(&dup_table->mutex); | |
814 | mutex_unlock(&table->mutex); | |
815 | } | |
816 | } else { | |
817 | mutex_unlock(&table->mutex); | |
818 | } | |
2a2336f8 | 819 | } |
ffe455ad | 820 | |
2009d005 | 821 | void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan) |
ffe455ad | 822 | { |
162226a1 | 823 | u64 out_param = 0; |
ffe455ad EE |
824 | |
825 | if (mlx4_is_mfunc(dev)) { | |
2009d005 | 826 | (void) mlx4_cmd_imm(dev, vlan, &out_param, |
acddd5dd | 827 | ((u32) port) << 8 | (u32) RES_VLAN, |
162226a1 JM |
828 | RES_OP_RESERVE_AND_MAP, |
829 | MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A, | |
830 | MLX4_CMD_WRAPPED); | |
ffe455ad EE |
831 | return; |
832 | } | |
2009d005 | 833 | __mlx4_unregister_vlan(dev, port, vlan); |
ffe455ad | 834 | } |
2a2336f8 | 835 | EXPORT_SYMBOL_GPL(mlx4_unregister_vlan); |
7ff93f8b | 836 | |
5f61385d MS |
837 | int mlx4_bond_mac_table(struct mlx4_dev *dev) |
838 | { | |
839 | struct mlx4_mac_table *t1 = &mlx4_priv(dev)->port[1].mac_table; | |
840 | struct mlx4_mac_table *t2 = &mlx4_priv(dev)->port[2].mac_table; | |
841 | int ret = 0; | |
842 | int i; | |
843 | bool update1 = false; | |
844 | bool update2 = false; | |
845 | ||
846 | mutex_lock(&t1->mutex); | |
847 | mutex_lock(&t2->mutex); | |
848 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { | |
849 | if ((t1->entries[i] != t2->entries[i]) && | |
850 | t1->entries[i] && t2->entries[i]) { | |
851 | mlx4_warn(dev, "can't duplicate entry %d in mac table\n", i); | |
852 | ret = -EINVAL; | |
853 | goto unlock; | |
854 | } | |
855 | } | |
856 | ||
857 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { | |
858 | if (t1->entries[i] && !t2->entries[i]) { | |
859 | t2->entries[i] = t1->entries[i]; | |
860 | t2->is_dup[i] = true; | |
861 | update2 = true; | |
862 | } else if (!t1->entries[i] && t2->entries[i]) { | |
863 | t1->entries[i] = t2->entries[i]; | |
864 | t1->is_dup[i] = true; | |
865 | update1 = true; | |
866 | } else if (t1->entries[i] && t2->entries[i]) { | |
867 | t1->is_dup[i] = true; | |
868 | t2->is_dup[i] = true; | |
869 | } | |
870 | } | |
871 | ||
872 | if (update1) { | |
873 | ret = mlx4_set_port_mac_table(dev, 1, t1->entries); | |
874 | if (ret) | |
875 | mlx4_warn(dev, "failed to set MAC table for port 1 (%d)\n", ret); | |
876 | } | |
877 | if (!ret && update2) { | |
878 | ret = mlx4_set_port_mac_table(dev, 2, t2->entries); | |
879 | if (ret) | |
880 | mlx4_warn(dev, "failed to set MAC table for port 2 (%d)\n", ret); | |
881 | } | |
882 | ||
883 | if (ret) | |
884 | mlx4_warn(dev, "failed to create mirror MAC tables\n"); | |
885 | unlock: | |
886 | mutex_unlock(&t2->mutex); | |
887 | mutex_unlock(&t1->mutex); | |
888 | return ret; | |
889 | } | |
890 | ||
891 | int mlx4_unbond_mac_table(struct mlx4_dev *dev) | |
892 | { | |
893 | struct mlx4_mac_table *t1 = &mlx4_priv(dev)->port[1].mac_table; | |
894 | struct mlx4_mac_table *t2 = &mlx4_priv(dev)->port[2].mac_table; | |
895 | int ret = 0; | |
896 | int ret1; | |
897 | int i; | |
898 | bool update1 = false; | |
899 | bool update2 = false; | |
900 | ||
901 | mutex_lock(&t1->mutex); | |
902 | mutex_lock(&t2->mutex); | |
903 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { | |
904 | if (t1->entries[i] != t2->entries[i]) { | |
905 | mlx4_warn(dev, "mac table is in an unexpected state when trying to unbond\n"); | |
906 | ret = -EINVAL; | |
907 | goto unlock; | |
908 | } | |
909 | } | |
910 | ||
911 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { | |
912 | if (!t1->entries[i]) | |
913 | continue; | |
914 | t1->is_dup[i] = false; | |
915 | if (!t1->refs[i]) { | |
916 | t1->entries[i] = 0; | |
917 | update1 = true; | |
918 | } | |
919 | t2->is_dup[i] = false; | |
920 | if (!t2->refs[i]) { | |
921 | t2->entries[i] = 0; | |
922 | update2 = true; | |
923 | } | |
924 | } | |
925 | ||
926 | if (update1) { | |
927 | ret = mlx4_set_port_mac_table(dev, 1, t1->entries); | |
928 | if (ret) | |
929 | mlx4_warn(dev, "failed to unmirror MAC tables for port 1(%d)\n", ret); | |
930 | } | |
931 | if (update2) { | |
932 | ret1 = mlx4_set_port_mac_table(dev, 2, t2->entries); | |
933 | if (ret1) { | |
934 | mlx4_warn(dev, "failed to unmirror MAC tables for port 2(%d)\n", ret1); | |
935 | ret = ret1; | |
936 | } | |
937 | } | |
938 | unlock: | |
939 | mutex_unlock(&t2->mutex); | |
940 | mutex_unlock(&t1->mutex); | |
941 | return ret; | |
942 | } | |
943 | ||
944 | int mlx4_bond_vlan_table(struct mlx4_dev *dev) | |
945 | { | |
946 | struct mlx4_vlan_table *t1 = &mlx4_priv(dev)->port[1].vlan_table; | |
947 | struct mlx4_vlan_table *t2 = &mlx4_priv(dev)->port[2].vlan_table; | |
948 | int ret = 0; | |
949 | int i; | |
950 | bool update1 = false; | |
951 | bool update2 = false; | |
952 | ||
953 | mutex_lock(&t1->mutex); | |
954 | mutex_lock(&t2->mutex); | |
955 | for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { | |
956 | if ((t1->entries[i] != t2->entries[i]) && | |
957 | t1->entries[i] && t2->entries[i]) { | |
958 | mlx4_warn(dev, "can't duplicate entry %d in vlan table\n", i); | |
959 | ret = -EINVAL; | |
960 | goto unlock; | |
961 | } | |
962 | } | |
963 | ||
964 | for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { | |
965 | if (t1->entries[i] && !t2->entries[i]) { | |
966 | t2->entries[i] = t1->entries[i]; | |
967 | t2->is_dup[i] = true; | |
968 | update2 = true; | |
969 | } else if (!t1->entries[i] && t2->entries[i]) { | |
970 | t1->entries[i] = t2->entries[i]; | |
971 | t1->is_dup[i] = true; | |
972 | update1 = true; | |
973 | } else if (t1->entries[i] && t2->entries[i]) { | |
974 | t1->is_dup[i] = true; | |
975 | t2->is_dup[i] = true; | |
976 | } | |
977 | } | |
978 | ||
979 | if (update1) { | |
980 | ret = mlx4_set_port_vlan_table(dev, 1, t1->entries); | |
981 | if (ret) | |
982 | mlx4_warn(dev, "failed to set VLAN table for port 1 (%d)\n", ret); | |
983 | } | |
984 | if (!ret && update2) { | |
985 | ret = mlx4_set_port_vlan_table(dev, 2, t2->entries); | |
986 | if (ret) | |
987 | mlx4_warn(dev, "failed to set VLAN table for port 2 (%d)\n", ret); | |
988 | } | |
989 | ||
990 | if (ret) | |
991 | mlx4_warn(dev, "failed to create mirror VLAN tables\n"); | |
992 | unlock: | |
993 | mutex_unlock(&t2->mutex); | |
994 | mutex_unlock(&t1->mutex); | |
995 | return ret; | |
996 | } | |
997 | ||
998 | int mlx4_unbond_vlan_table(struct mlx4_dev *dev) | |
999 | { | |
1000 | struct mlx4_vlan_table *t1 = &mlx4_priv(dev)->port[1].vlan_table; | |
1001 | struct mlx4_vlan_table *t2 = &mlx4_priv(dev)->port[2].vlan_table; | |
1002 | int ret = 0; | |
1003 | int ret1; | |
1004 | int i; | |
1005 | bool update1 = false; | |
1006 | bool update2 = false; | |
1007 | ||
1008 | mutex_lock(&t1->mutex); | |
1009 | mutex_lock(&t2->mutex); | |
1010 | for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { | |
1011 | if (t1->entries[i] != t2->entries[i]) { | |
1012 | mlx4_warn(dev, "vlan table is in an unexpected state when trying to unbond\n"); | |
1013 | ret = -EINVAL; | |
1014 | goto unlock; | |
1015 | } | |
1016 | } | |
1017 | ||
1018 | for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { | |
1019 | if (!t1->entries[i]) | |
1020 | continue; | |
1021 | t1->is_dup[i] = false; | |
1022 | if (!t1->refs[i]) { | |
1023 | t1->entries[i] = 0; | |
1024 | update1 = true; | |
1025 | } | |
1026 | t2->is_dup[i] = false; | |
1027 | if (!t2->refs[i]) { | |
1028 | t2->entries[i] = 0; | |
1029 | update2 = true; | |
1030 | } | |
1031 | } | |
1032 | ||
1033 | if (update1) { | |
1034 | ret = mlx4_set_port_vlan_table(dev, 1, t1->entries); | |
1035 | if (ret) | |
1036 | mlx4_warn(dev, "failed to unmirror VLAN tables for port 1(%d)\n", ret); | |
1037 | } | |
1038 | if (update2) { | |
1039 | ret1 = mlx4_set_port_vlan_table(dev, 2, t2->entries); | |
1040 | if (ret1) { | |
1041 | mlx4_warn(dev, "failed to unmirror VLAN tables for port 2(%d)\n", ret1); | |
1042 | ret = ret1; | |
1043 | } | |
1044 | } | |
1045 | unlock: | |
1046 | mutex_unlock(&t2->mutex); | |
1047 | mutex_unlock(&t1->mutex); | |
1048 | return ret; | |
1049 | } | |
1050 | ||
9a5aa622 JM |
1051 | int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps) |
1052 | { | |
1053 | struct mlx4_cmd_mailbox *inmailbox, *outmailbox; | |
1054 | u8 *inbuf, *outbuf; | |
1055 | int err; | |
1056 | ||
1057 | inmailbox = mlx4_alloc_cmd_mailbox(dev); | |
1058 | if (IS_ERR(inmailbox)) | |
1059 | return PTR_ERR(inmailbox); | |
1060 | ||
1061 | outmailbox = mlx4_alloc_cmd_mailbox(dev); | |
1062 | if (IS_ERR(outmailbox)) { | |
1063 | mlx4_free_cmd_mailbox(dev, inmailbox); | |
1064 | return PTR_ERR(outmailbox); | |
1065 | } | |
1066 | ||
1067 | inbuf = inmailbox->buf; | |
1068 | outbuf = outmailbox->buf; | |
9a5aa622 JM |
1069 | inbuf[0] = 1; |
1070 | inbuf[1] = 1; | |
1071 | inbuf[2] = 1; | |
1072 | inbuf[3] = 1; | |
1073 | *(__be16 *) (&inbuf[16]) = cpu_to_be16(0x0015); | |
1074 | *(__be32 *) (&inbuf[20]) = cpu_to_be32(port); | |
1075 | ||
1076 | err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3, | |
f9baff50 JM |
1077 | MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C, |
1078 | MLX4_CMD_NATIVE); | |
9a5aa622 JM |
1079 | if (!err) |
1080 | *caps = *(__be32 *) (outbuf + 84); | |
1081 | mlx4_free_cmd_mailbox(dev, inmailbox); | |
1082 | mlx4_free_cmd_mailbox(dev, outmailbox); | |
1083 | return err; | |
1084 | } | |
9cd59352 | 1085 | static struct mlx4_roce_gid_entry zgid_entry; |
9a5aa622 | 1086 | |
449fc488 | 1087 | int mlx4_get_slave_num_gids(struct mlx4_dev *dev, int slave, int port) |
b6ffaeff | 1088 | { |
449fc488 MB |
1089 | int vfs; |
1090 | int slave_gid = slave; | |
1091 | unsigned i; | |
1092 | struct mlx4_slaves_pport slaves_pport; | |
1093 | struct mlx4_active_ports actv_ports; | |
1094 | unsigned max_port_p_one; | |
1095 | ||
b6ffaeff JM |
1096 | if (slave == 0) |
1097 | return MLX4_ROCE_PF_GIDS; | |
449fc488 MB |
1098 | |
1099 | /* Slave is a VF */ | |
1100 | slaves_pport = mlx4_phys_to_slaves_pport(dev, port); | |
1101 | actv_ports = mlx4_get_active_ports(dev, slave); | |
1102 | max_port_p_one = find_first_bit(actv_ports.ports, dev->caps.num_ports) + | |
1103 | bitmap_weight(actv_ports.ports, dev->caps.num_ports) + 1; | |
1104 | ||
1105 | for (i = 1; i < max_port_p_one; i++) { | |
1106 | struct mlx4_active_ports exclusive_ports; | |
1107 | struct mlx4_slaves_pport slaves_pport_actv; | |
1108 | bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); | |
1109 | set_bit(i - 1, exclusive_ports.ports); | |
1110 | if (i == port) | |
1111 | continue; | |
1112 | slaves_pport_actv = mlx4_phys_to_slaves_pport_actv( | |
1113 | dev, &exclusive_ports); | |
1114 | slave_gid -= bitmap_weight(slaves_pport_actv.slaves, | |
872bf2fb | 1115 | dev->persist->num_vfs + 1); |
449fc488 | 1116 | } |
872bf2fb | 1117 | vfs = bitmap_weight(slaves_pport.slaves, dev->persist->num_vfs + 1) - 1; |
449fc488 MB |
1118 | if (slave_gid <= ((MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS) % vfs)) |
1119 | return ((MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS) / vfs) + 1; | |
1120 | return (MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS) / vfs; | |
b6ffaeff JM |
1121 | } |
1122 | ||
449fc488 | 1123 | int mlx4_get_base_gid_ix(struct mlx4_dev *dev, int slave, int port) |
b6ffaeff JM |
1124 | { |
1125 | int gids; | |
449fc488 MB |
1126 | unsigned i; |
1127 | int slave_gid = slave; | |
b6ffaeff JM |
1128 | int vfs; |
1129 | ||
449fc488 MB |
1130 | struct mlx4_slaves_pport slaves_pport; |
1131 | struct mlx4_active_ports actv_ports; | |
1132 | unsigned max_port_p_one; | |
b6ffaeff JM |
1133 | |
1134 | if (slave == 0) | |
1135 | return 0; | |
b6ffaeff | 1136 | |
449fc488 MB |
1137 | slaves_pport = mlx4_phys_to_slaves_pport(dev, port); |
1138 | actv_ports = mlx4_get_active_ports(dev, slave); | |
1139 | max_port_p_one = find_first_bit(actv_ports.ports, dev->caps.num_ports) + | |
1140 | bitmap_weight(actv_ports.ports, dev->caps.num_ports) + 1; | |
1141 | ||
1142 | for (i = 1; i < max_port_p_one; i++) { | |
1143 | struct mlx4_active_ports exclusive_ports; | |
1144 | struct mlx4_slaves_pport slaves_pport_actv; | |
1145 | bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); | |
1146 | set_bit(i - 1, exclusive_ports.ports); | |
1147 | if (i == port) | |
1148 | continue; | |
1149 | slaves_pport_actv = mlx4_phys_to_slaves_pport_actv( | |
1150 | dev, &exclusive_ports); | |
1151 | slave_gid -= bitmap_weight(slaves_pport_actv.slaves, | |
872bf2fb | 1152 | dev->persist->num_vfs + 1); |
449fc488 MB |
1153 | } |
1154 | gids = MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS; | |
872bf2fb | 1155 | vfs = bitmap_weight(slaves_pport.slaves, dev->persist->num_vfs + 1) - 1; |
449fc488 MB |
1156 | if (slave_gid <= gids % vfs) |
1157 | return MLX4_ROCE_PF_GIDS + ((gids / vfs) + 1) * (slave_gid - 1); | |
1158 | ||
1159 | return MLX4_ROCE_PF_GIDS + (gids % vfs) + | |
1160 | ((gids / vfs) * (slave_gid - 1)); | |
b6ffaeff | 1161 | } |
449fc488 | 1162 | EXPORT_SYMBOL_GPL(mlx4_get_base_gid_ix); |
b6ffaeff | 1163 | |
111c6094 JM |
1164 | static int mlx4_reset_roce_port_gids(struct mlx4_dev *dev, int slave, |
1165 | int port, struct mlx4_cmd_mailbox *mailbox) | |
1166 | { | |
1167 | struct mlx4_roce_gid_entry *gid_entry_mbox; | |
1168 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1169 | int num_gids, base, offset; | |
1170 | int i, err; | |
1171 | ||
1172 | num_gids = mlx4_get_slave_num_gids(dev, slave, port); | |
1173 | base = mlx4_get_base_gid_ix(dev, slave, port); | |
1174 | ||
1175 | memset(mailbox->buf, 0, MLX4_MAILBOX_SIZE); | |
1176 | ||
1177 | mutex_lock(&(priv->port[port].gid_table.mutex)); | |
1178 | /* Zero-out gids belonging to that slave in the port GID table */ | |
1179 | for (i = 0, offset = base; i < num_gids; offset++, i++) | |
1180 | memcpy(priv->port[port].gid_table.roce_gids[offset].raw, | |
1181 | zgid_entry.raw, MLX4_ROCE_GID_ENTRY_SIZE); | |
1182 | ||
1183 | /* Now, copy roce port gids table to mailbox for passing to FW */ | |
1184 | gid_entry_mbox = (struct mlx4_roce_gid_entry *)mailbox->buf; | |
1185 | for (i = 0; i < MLX4_ROCE_MAX_GIDS; gid_entry_mbox++, i++) | |
1186 | memcpy(gid_entry_mbox->raw, | |
1187 | priv->port[port].gid_table.roce_gids[i].raw, | |
1188 | MLX4_ROCE_GID_ENTRY_SIZE); | |
1189 | ||
1190 | err = mlx4_cmd(dev, mailbox->dma, | |
a130b590 IS |
1191 | ((u32)port) | (MLX4_SET_PORT_GID_TABLE << 8), |
1192 | MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT, | |
1193 | MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); | |
111c6094 JM |
1194 | mutex_unlock(&(priv->port[port].gid_table.mutex)); |
1195 | return err; | |
1196 | } | |
1197 | ||
1198 | ||
1199 | void mlx4_reset_roce_gids(struct mlx4_dev *dev, int slave) | |
1200 | { | |
1201 | struct mlx4_active_ports actv_ports; | |
1202 | struct mlx4_cmd_mailbox *mailbox; | |
1203 | int num_eth_ports, err; | |
1204 | int i; | |
1205 | ||
872bf2fb | 1206 | if (slave < 0 || slave > dev->persist->num_vfs) |
111c6094 JM |
1207 | return; |
1208 | ||
1209 | actv_ports = mlx4_get_active_ports(dev, slave); | |
1210 | ||
1211 | for (i = 0, num_eth_ports = 0; i < dev->caps.num_ports; i++) { | |
1212 | if (test_bit(i, actv_ports.ports)) { | |
1213 | if (dev->caps.port_type[i + 1] != MLX4_PORT_TYPE_ETH) | |
1214 | continue; | |
1215 | num_eth_ports++; | |
1216 | } | |
1217 | } | |
1218 | ||
1219 | if (!num_eth_ports) | |
1220 | return; | |
1221 | ||
1222 | /* have ETH ports. Alloc mailbox for SET_PORT command */ | |
1223 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
1224 | if (IS_ERR(mailbox)) | |
1225 | return; | |
1226 | ||
1227 | for (i = 0; i < dev->caps.num_ports; i++) { | |
1228 | if (test_bit(i, actv_ports.ports)) { | |
1229 | if (dev->caps.port_type[i + 1] != MLX4_PORT_TYPE_ETH) | |
1230 | continue; | |
1231 | err = mlx4_reset_roce_port_gids(dev, slave, i + 1, mailbox); | |
1232 | if (err) | |
1233 | mlx4_warn(dev, "Could not reset ETH port GID table for slave %d, port %d (%d)\n", | |
1234 | slave, i + 1, err); | |
1235 | } | |
1236 | } | |
1237 | ||
1238 | mlx4_free_cmd_mailbox(dev, mailbox); | |
1239 | return; | |
1240 | } | |
1241 | ||
ffe455ad EE |
1242 | static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod, |
1243 | u8 op_mod, struct mlx4_cmd_mailbox *inbox) | |
1244 | { | |
1245 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1246 | struct mlx4_port_info *port_info; | |
1247 | struct mlx4_mfunc_master_ctx *master = &priv->mfunc.master; | |
1248 | struct mlx4_slave_state *slave_st = &master->slave_state[slave]; | |
1249 | struct mlx4_set_port_rqp_calc_context *qpn_context; | |
1250 | struct mlx4_set_port_general_context *gen_context; | |
b6ffaeff | 1251 | struct mlx4_roce_gid_entry *gid_entry_tbl, *gid_entry_mbox, *gid_entry_mb1; |
ffe455ad EE |
1252 | int reset_qkey_viols; |
1253 | int port; | |
1254 | int is_eth; | |
b6ffaeff JM |
1255 | int num_gids; |
1256 | int base; | |
ffe455ad EE |
1257 | u32 in_modifier; |
1258 | u32 promisc; | |
1259 | u16 mtu, prev_mtu; | |
1260 | int err; | |
b6ffaeff JM |
1261 | int i, j; |
1262 | int offset; | |
ffe455ad EE |
1263 | __be32 agg_cap_mask; |
1264 | __be32 slave_cap_mask; | |
1265 | __be32 new_cap_mask; | |
1266 | ||
1267 | port = in_mod & 0xff; | |
1268 | in_modifier = in_mod >> 8; | |
1269 | is_eth = op_mod; | |
1270 | port_info = &priv->port[port]; | |
1271 | ||
1272 | /* Slaves cannot perform SET_PORT operations except changing MTU */ | |
1273 | if (is_eth) { | |
1274 | if (slave != dev->caps.function && | |
9cd59352 JM |
1275 | in_modifier != MLX4_SET_PORT_GENERAL && |
1276 | in_modifier != MLX4_SET_PORT_GID_TABLE) { | |
ffe455ad EE |
1277 | mlx4_warn(dev, "denying SET_PORT for slave:%d\n", |
1278 | slave); | |
1279 | return -EINVAL; | |
1280 | } | |
1281 | switch (in_modifier) { | |
1282 | case MLX4_SET_PORT_RQP_CALC: | |
1283 | qpn_context = inbox->buf; | |
1284 | qpn_context->base_qpn = | |
1285 | cpu_to_be32(port_info->base_qpn); | |
1286 | qpn_context->n_mac = 0x7; | |
1287 | promisc = be32_to_cpu(qpn_context->promisc) >> | |
1288 | SET_PORT_PROMISC_SHIFT; | |
1289 | qpn_context->promisc = cpu_to_be32( | |
1290 | promisc << SET_PORT_PROMISC_SHIFT | | |
1291 | port_info->base_qpn); | |
1292 | promisc = be32_to_cpu(qpn_context->mcast) >> | |
1293 | SET_PORT_MC_PROMISC_SHIFT; | |
1294 | qpn_context->mcast = cpu_to_be32( | |
1295 | promisc << SET_PORT_MC_PROMISC_SHIFT | | |
1296 | port_info->base_qpn); | |
1297 | break; | |
1298 | case MLX4_SET_PORT_GENERAL: | |
1299 | gen_context = inbox->buf; | |
1300 | /* Mtu is configured as the max MTU among all the | |
1301 | * the functions on the port. */ | |
1302 | mtu = be16_to_cpu(gen_context->mtu); | |
c59fec20 EE |
1303 | mtu = min_t(int, mtu, dev->caps.eth_mtu_cap[port] + |
1304 | ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN); | |
ffe455ad EE |
1305 | prev_mtu = slave_st->mtu[port]; |
1306 | slave_st->mtu[port] = mtu; | |
1307 | if (mtu > master->max_mtu[port]) | |
1308 | master->max_mtu[port] = mtu; | |
1309 | if (mtu < prev_mtu && prev_mtu == | |
1310 | master->max_mtu[port]) { | |
1311 | slave_st->mtu[port] = mtu; | |
1312 | master->max_mtu[port] = mtu; | |
1313 | for (i = 0; i < dev->num_slaves; i++) { | |
1314 | master->max_mtu[port] = | |
1315 | max(master->max_mtu[port], | |
1316 | master->slave_state[i].mtu[port]); | |
1317 | } | |
1318 | } | |
1319 | ||
1320 | gen_context->mtu = cpu_to_be16(master->max_mtu[port]); | |
2a500090 EE |
1321 | /* Slave cannot change Global Pause configuration */ |
1322 | if (slave != mlx4_master_func_num(dev) && | |
1323 | ((gen_context->pptx != master->pptx) || | |
1324 | (gen_context->pprx != master->pprx))) { | |
1325 | gen_context->pptx = master->pptx; | |
1326 | gen_context->pprx = master->pprx; | |
1327 | mlx4_warn(dev, | |
1328 | "denying Global Pause change for slave:%d\n", | |
1329 | slave); | |
1330 | } else { | |
1331 | master->pptx = gen_context->pptx; | |
1332 | master->pprx = gen_context->pprx; | |
1333 | } | |
ffe455ad | 1334 | break; |
9cd59352 | 1335 | case MLX4_SET_PORT_GID_TABLE: |
b6ffaeff JM |
1336 | /* change to MULTIPLE entries: number of guest's gids |
1337 | * need a FOR-loop here over number of gids the guest has. | |
1338 | * 1. Check no duplicates in gids passed by slave | |
1339 | */ | |
449fc488 MB |
1340 | num_gids = mlx4_get_slave_num_gids(dev, slave, port); |
1341 | base = mlx4_get_base_gid_ix(dev, slave, port); | |
b6ffaeff JM |
1342 | gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); |
1343 | for (i = 0; i < num_gids; gid_entry_mbox++, i++) { | |
1344 | if (!memcmp(gid_entry_mbox->raw, zgid_entry.raw, | |
1345 | sizeof(zgid_entry))) | |
1346 | continue; | |
1347 | gid_entry_mb1 = gid_entry_mbox + 1; | |
1348 | for (j = i + 1; j < num_gids; gid_entry_mb1++, j++) { | |
1349 | if (!memcmp(gid_entry_mb1->raw, | |
1350 | zgid_entry.raw, sizeof(zgid_entry))) | |
1351 | continue; | |
1352 | if (!memcmp(gid_entry_mb1->raw, gid_entry_mbox->raw, | |
1353 | sizeof(gid_entry_mbox->raw))) { | |
1354 | /* found duplicate */ | |
1355 | return -EINVAL; | |
9cd59352 JM |
1356 | } |
1357 | } | |
1358 | } | |
b6ffaeff JM |
1359 | |
1360 | /* 2. Check that do not have duplicates in OTHER | |
1361 | * entries in the port GID table | |
1362 | */ | |
111c6094 JM |
1363 | |
1364 | mutex_lock(&(priv->port[port].gid_table.mutex)); | |
9cd59352 | 1365 | for (i = 0; i < MLX4_ROCE_MAX_GIDS; i++) { |
b6ffaeff JM |
1366 | if (i >= base && i < base + num_gids) |
1367 | continue; /* don't compare to slave's current gids */ | |
111c6094 | 1368 | gid_entry_tbl = &priv->port[port].gid_table.roce_gids[i]; |
b6ffaeff JM |
1369 | if (!memcmp(gid_entry_tbl->raw, zgid_entry.raw, sizeof(zgid_entry))) |
1370 | continue; | |
1371 | gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); | |
1372 | for (j = 0; j < num_gids; gid_entry_mbox++, j++) { | |
1373 | if (!memcmp(gid_entry_mbox->raw, zgid_entry.raw, | |
1374 | sizeof(zgid_entry))) | |
1375 | continue; | |
1376 | if (!memcmp(gid_entry_mbox->raw, gid_entry_tbl->raw, | |
1377 | sizeof(gid_entry_tbl->raw))) { | |
1378 | /* found duplicate */ | |
1a91de28 | 1379 | mlx4_warn(dev, "requested gid entry for slave:%d is a duplicate of gid at index %d\n", |
b6ffaeff | 1380 | slave, i); |
111c6094 | 1381 | mutex_unlock(&(priv->port[port].gid_table.mutex)); |
b6ffaeff JM |
1382 | return -EINVAL; |
1383 | } | |
1384 | } | |
9cd59352 | 1385 | } |
b6ffaeff JM |
1386 | |
1387 | /* insert slave GIDs with memcpy, starting at slave's base index */ | |
1388 | gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); | |
1389 | for (i = 0, offset = base; i < num_gids; gid_entry_mbox++, offset++, i++) | |
111c6094 JM |
1390 | memcpy(priv->port[port].gid_table.roce_gids[offset].raw, |
1391 | gid_entry_mbox->raw, MLX4_ROCE_GID_ENTRY_SIZE); | |
b6ffaeff JM |
1392 | |
1393 | /* Now, copy roce port gids table to current mailbox for passing to FW */ | |
1394 | gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); | |
1395 | for (i = 0; i < MLX4_ROCE_MAX_GIDS; gid_entry_mbox++, i++) | |
111c6094 JM |
1396 | memcpy(gid_entry_mbox->raw, |
1397 | priv->port[port].gid_table.roce_gids[i].raw, | |
1398 | MLX4_ROCE_GID_ENTRY_SIZE); | |
1399 | ||
1400 | err = mlx4_cmd(dev, inbox->dma, in_mod & 0xffff, op_mod, | |
1401 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
1402 | MLX4_CMD_NATIVE); | |
1403 | mutex_unlock(&(priv->port[port].gid_table.mutex)); | |
1404 | return err; | |
ffe455ad | 1405 | } |
111c6094 JM |
1406 | |
1407 | return mlx4_cmd(dev, inbox->dma, in_mod & 0xffff, op_mod, | |
ffe455ad EE |
1408 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, |
1409 | MLX4_CMD_NATIVE); | |
1410 | } | |
1411 | ||
51af33cf IS |
1412 | /* Slaves are not allowed to SET_PORT beacon (LED) blink */ |
1413 | if (op_mod == MLX4_SET_PORT_BEACON_OPCODE) { | |
1414 | mlx4_warn(dev, "denying SET_PORT Beacon slave:%d\n", slave); | |
1415 | return -EPERM; | |
1416 | } | |
1417 | ||
ffe455ad EE |
1418 | /* For IB, we only consider: |
1419 | * - The capability mask, which is set to the aggregate of all | |
1420 | * slave function capabilities | |
1421 | * - The QKey violatin counter - reset according to each request. | |
1422 | */ | |
1423 | ||
1424 | if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { | |
1425 | reset_qkey_viols = (*(u8 *) inbox->buf) & 0x40; | |
1426 | new_cap_mask = ((__be32 *) inbox->buf)[2]; | |
1427 | } else { | |
1428 | reset_qkey_viols = ((u8 *) inbox->buf)[3] & 0x1; | |
1429 | new_cap_mask = ((__be32 *) inbox->buf)[1]; | |
1430 | } | |
1431 | ||
efcd235d JM |
1432 | /* slave may not set the IS_SM capability for the port */ |
1433 | if (slave != mlx4_master_func_num(dev) && | |
1434 | (be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_IS_SM)) | |
1435 | return -EINVAL; | |
1436 | ||
1437 | /* No DEV_MGMT in multifunc mode */ | |
1438 | if (mlx4_is_mfunc(dev) && | |
1439 | (be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_DEV_MGMT_SUP)) | |
1440 | return -EINVAL; | |
1441 | ||
ffe455ad EE |
1442 | agg_cap_mask = 0; |
1443 | slave_cap_mask = | |
1444 | priv->mfunc.master.slave_state[slave].ib_cap_mask[port]; | |
1445 | priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = new_cap_mask; | |
1446 | for (i = 0; i < dev->num_slaves; i++) | |
1447 | agg_cap_mask |= | |
1448 | priv->mfunc.master.slave_state[i].ib_cap_mask[port]; | |
1449 | ||
1450 | /* only clear mailbox for guests. Master may be setting | |
1451 | * MTU or PKEY table size | |
1452 | */ | |
1453 | if (slave != dev->caps.function) | |
1454 | memset(inbox->buf, 0, 256); | |
1455 | if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { | |
edc4a67e | 1456 | *(u8 *) inbox->buf |= !!reset_qkey_viols << 6; |
ffe455ad EE |
1457 | ((__be32 *) inbox->buf)[2] = agg_cap_mask; |
1458 | } else { | |
edc4a67e | 1459 | ((u8 *) inbox->buf)[3] |= !!reset_qkey_viols; |
ffe455ad EE |
1460 | ((__be32 *) inbox->buf)[1] = agg_cap_mask; |
1461 | } | |
1462 | ||
1463 | err = mlx4_cmd(dev, inbox->dma, port, is_eth, MLX4_CMD_SET_PORT, | |
1464 | MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); | |
1465 | if (err) | |
1466 | priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = | |
1467 | slave_cap_mask; | |
1468 | return err; | |
1469 | } | |
1470 | ||
1471 | int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave, | |
1472 | struct mlx4_vhcr *vhcr, | |
1473 | struct mlx4_cmd_mailbox *inbox, | |
1474 | struct mlx4_cmd_mailbox *outbox, | |
1475 | struct mlx4_cmd_info *cmd) | |
1476 | { | |
449fc488 MB |
1477 | int port = mlx4_slave_convert_port( |
1478 | dev, slave, vhcr->in_modifier & 0xFF); | |
1479 | ||
1480 | if (port < 0) | |
1481 | return -EINVAL; | |
1482 | ||
1483 | vhcr->in_modifier = (vhcr->in_modifier & ~0xFF) | | |
1484 | (port & 0xFF); | |
1485 | ||
ffe455ad EE |
1486 | return mlx4_common_set_port(dev, slave, vhcr->in_modifier, |
1487 | vhcr->op_modifier, inbox); | |
1488 | } | |
1489 | ||
096335b3 OG |
1490 | /* bit locations for set port command with zero op modifier */ |
1491 | enum { | |
1492 | MLX4_SET_PORT_VL_CAP = 4, /* bits 7:4 */ | |
1493 | MLX4_SET_PORT_MTU_CAP = 12, /* bits 15:12 */ | |
6634961c | 1494 | MLX4_CHANGE_PORT_PKEY_TBL_SZ = 20, |
096335b3 OG |
1495 | MLX4_CHANGE_PORT_VL_CAP = 21, |
1496 | MLX4_CHANGE_PORT_MTU_CAP = 22, | |
1497 | }; | |
1498 | ||
6634961c | 1499 | int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz) |
7ff93f8b YP |
1500 | { |
1501 | struct mlx4_cmd_mailbox *mailbox; | |
6634961c | 1502 | int err, vl_cap, pkey_tbl_flag = 0; |
7ff93f8b | 1503 | |
352b09ed RD |
1504 | if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) |
1505 | return 0; | |
1506 | ||
7ff93f8b YP |
1507 | mailbox = mlx4_alloc_cmd_mailbox(dev); |
1508 | if (IS_ERR(mailbox)) | |
1509 | return PTR_ERR(mailbox); | |
1510 | ||
793730bf | 1511 | ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port]; |
096335b3 | 1512 | |
6634961c JM |
1513 | if (pkey_tbl_sz >= 0 && mlx4_is_master(dev)) { |
1514 | pkey_tbl_flag = 1; | |
1515 | ((__be16 *) mailbox->buf)[20] = cpu_to_be16(pkey_tbl_sz); | |
1516 | } | |
1517 | ||
096335b3 OG |
1518 | /* IB VL CAP enum isn't used by the firmware, just numerical values */ |
1519 | for (vl_cap = 8; vl_cap >= 1; vl_cap >>= 1) { | |
1520 | ((__be32 *) mailbox->buf)[0] = cpu_to_be32( | |
1521 | (1 << MLX4_CHANGE_PORT_MTU_CAP) | | |
1522 | (1 << MLX4_CHANGE_PORT_VL_CAP) | | |
6634961c | 1523 | (pkey_tbl_flag << MLX4_CHANGE_PORT_PKEY_TBL_SZ) | |
096335b3 OG |
1524 | (dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) | |
1525 | (vl_cap << MLX4_SET_PORT_VL_CAP)); | |
a130b590 IS |
1526 | err = mlx4_cmd(dev, mailbox->dma, port, |
1527 | MLX4_SET_PORT_IB_OPCODE, MLX4_CMD_SET_PORT, | |
1528 | MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); | |
096335b3 OG |
1529 | if (err != -ENOMEM) |
1530 | break; | |
1531 | } | |
7ff93f8b YP |
1532 | |
1533 | mlx4_free_cmd_mailbox(dev, mailbox); | |
1534 | return err; | |
1535 | } | |
ffe455ad | 1536 | |
1da494cb MS |
1537 | #define SET_PORT_ROCE_2_FLAGS 0x10 |
1538 | #define MLX4_SET_PORT_ROCE_V1_V2 0x2 | |
cb9ffb76 | 1539 | int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, |
ffe455ad EE |
1540 | u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx) |
1541 | { | |
1542 | struct mlx4_cmd_mailbox *mailbox; | |
1543 | struct mlx4_set_port_general_context *context; | |
1544 | int err; | |
1545 | u32 in_mod; | |
1546 | ||
1547 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
1548 | if (IS_ERR(mailbox)) | |
1549 | return PTR_ERR(mailbox); | |
1550 | context = mailbox->buf; | |
ffe455ad EE |
1551 | context->flags = SET_PORT_GEN_ALL_VALID; |
1552 | context->mtu = cpu_to_be16(mtu); | |
1553 | context->pptx = (pptx * (!pfctx)) << 7; | |
1554 | context->pfctx = pfctx; | |
1555 | context->pprx = (pprx * (!pfcrx)) << 7; | |
1556 | context->pfcrx = pfcrx; | |
1557 | ||
1da494cb MS |
1558 | if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ROCE_V1_V2) { |
1559 | context->flags |= SET_PORT_ROCE_2_FLAGS; | |
1560 | context->roce_mode |= | |
1561 | MLX4_SET_PORT_ROCE_V1_V2 << 4; | |
1562 | } | |
ffe455ad | 1563 | in_mod = MLX4_SET_PORT_GENERAL << 8 | port; |
a130b590 IS |
1564 | err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, |
1565 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
1566 | MLX4_CMD_WRAPPED); | |
ffe455ad EE |
1567 | |
1568 | mlx4_free_cmd_mailbox(dev, mailbox); | |
1569 | return err; | |
1570 | } | |
1571 | EXPORT_SYMBOL(mlx4_SET_PORT_general); | |
1572 | ||
cb9ffb76 | 1573 | int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, |
ffe455ad EE |
1574 | u8 promisc) |
1575 | { | |
1576 | struct mlx4_cmd_mailbox *mailbox; | |
1577 | struct mlx4_set_port_rqp_calc_context *context; | |
1578 | int err; | |
1579 | u32 in_mod; | |
1580 | u32 m_promisc = (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) ? | |
1581 | MCAST_DIRECT : MCAST_DEFAULT; | |
1582 | ||
c96d97f4 | 1583 | if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) |
ffe455ad EE |
1584 | return 0; |
1585 | ||
1586 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
1587 | if (IS_ERR(mailbox)) | |
1588 | return PTR_ERR(mailbox); | |
1589 | context = mailbox->buf; | |
ffe455ad EE |
1590 | context->base_qpn = cpu_to_be32(base_qpn); |
1591 | context->n_mac = dev->caps.log_num_macs; | |
1592 | context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT | | |
1593 | base_qpn); | |
1594 | context->mcast = cpu_to_be32(m_promisc << SET_PORT_MC_PROMISC_SHIFT | | |
1595 | base_qpn); | |
1596 | context->intra_no_vlan = 0; | |
1597 | context->no_vlan = MLX4_NO_VLAN_IDX; | |
1598 | context->intra_vlan_miss = 0; | |
1599 | context->vlan_miss = MLX4_VLAN_MISS_IDX; | |
1600 | ||
1601 | in_mod = MLX4_SET_PORT_RQP_CALC << 8 | port; | |
a130b590 IS |
1602 | err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, |
1603 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
1604 | MLX4_CMD_WRAPPED); | |
ffe455ad EE |
1605 | |
1606 | mlx4_free_cmd_mailbox(dev, mailbox); | |
1607 | return err; | |
1608 | } | |
1609 | EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc); | |
1610 | ||
78500b8c MM |
1611 | int mlx4_SET_PORT_fcs_check(struct mlx4_dev *dev, u8 port, u8 ignore_fcs_value) |
1612 | { | |
1613 | struct mlx4_cmd_mailbox *mailbox; | |
1614 | struct mlx4_set_port_general_context *context; | |
1615 | u32 in_mod; | |
1616 | int err; | |
1617 | ||
1618 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
1619 | if (IS_ERR(mailbox)) | |
1620 | return PTR_ERR(mailbox); | |
1621 | context = mailbox->buf; | |
1622 | context->v_ignore_fcs |= MLX4_FLAG_V_IGNORE_FCS_MASK; | |
1623 | if (ignore_fcs_value) | |
1624 | context->ignore_fcs |= MLX4_IGNORE_FCS_MASK; | |
1625 | else | |
1626 | context->ignore_fcs &= ~MLX4_IGNORE_FCS_MASK; | |
1627 | ||
1628 | in_mod = MLX4_SET_PORT_GENERAL << 8 | port; | |
1629 | err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT, | |
1630 | MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); | |
1631 | ||
1632 | mlx4_free_cmd_mailbox(dev, mailbox); | |
1633 | return err; | |
1634 | } | |
1635 | EXPORT_SYMBOL(mlx4_SET_PORT_fcs_check); | |
1636 | ||
7ffdf726 OG |
1637 | enum { |
1638 | VXLAN_ENABLE_MODIFY = 1 << 7, | |
1639 | VXLAN_STEERING_MODIFY = 1 << 6, | |
1640 | ||
1641 | VXLAN_ENABLE = 1 << 7, | |
1642 | }; | |
1643 | ||
1644 | struct mlx4_set_port_vxlan_context { | |
1645 | u32 reserved1; | |
1646 | u8 modify_flags; | |
1647 | u8 reserved2; | |
1648 | u8 enable_flags; | |
1649 | u8 steering; | |
1650 | }; | |
1651 | ||
1b136de1 | 1652 | int mlx4_SET_PORT_VXLAN(struct mlx4_dev *dev, u8 port, u8 steering, int enable) |
7ffdf726 OG |
1653 | { |
1654 | int err; | |
1655 | u32 in_mod; | |
1656 | struct mlx4_cmd_mailbox *mailbox; | |
1657 | struct mlx4_set_port_vxlan_context *context; | |
1658 | ||
1659 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
1660 | if (IS_ERR(mailbox)) | |
1661 | return PTR_ERR(mailbox); | |
1662 | context = mailbox->buf; | |
1663 | memset(context, 0, sizeof(*context)); | |
1664 | ||
1665 | context->modify_flags = VXLAN_ENABLE_MODIFY | VXLAN_STEERING_MODIFY; | |
1b136de1 OG |
1666 | if (enable) |
1667 | context->enable_flags = VXLAN_ENABLE; | |
7ffdf726 OG |
1668 | context->steering = steering; |
1669 | ||
1670 | in_mod = MLX4_SET_PORT_VXLAN << 8 | port; | |
a130b590 IS |
1671 | err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, |
1672 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
1673 | MLX4_CMD_NATIVE); | |
7ffdf726 OG |
1674 | |
1675 | mlx4_free_cmd_mailbox(dev, mailbox); | |
1676 | return err; | |
1677 | } | |
1678 | EXPORT_SYMBOL(mlx4_SET_PORT_VXLAN); | |
1679 | ||
51af33cf IS |
1680 | int mlx4_SET_PORT_BEACON(struct mlx4_dev *dev, u8 port, u16 time) |
1681 | { | |
1682 | int err; | |
1683 | struct mlx4_cmd_mailbox *mailbox; | |
1684 | ||
1685 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
1686 | if (IS_ERR(mailbox)) | |
1687 | return PTR_ERR(mailbox); | |
1688 | ||
1689 | *((__be32 *)mailbox->buf) = cpu_to_be32(time); | |
1690 | ||
1691 | err = mlx4_cmd(dev, mailbox->dma, port, MLX4_SET_PORT_BEACON_OPCODE, | |
1692 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
1693 | MLX4_CMD_NATIVE); | |
1694 | ||
1695 | mlx4_free_cmd_mailbox(dev, mailbox); | |
1696 | return err; | |
1697 | } | |
1698 | EXPORT_SYMBOL(mlx4_SET_PORT_BEACON); | |
1699 | ||
ffe455ad EE |
1700 | int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave, |
1701 | struct mlx4_vhcr *vhcr, | |
1702 | struct mlx4_cmd_mailbox *inbox, | |
1703 | struct mlx4_cmd_mailbox *outbox, | |
1704 | struct mlx4_cmd_info *cmd) | |
1705 | { | |
1706 | int err = 0; | |
1707 | ||
1708 | return err; | |
1709 | } | |
1710 | ||
1711 | int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, | |
1712 | u64 mac, u64 clear, u8 mode) | |
1713 | { | |
1714 | return mlx4_cmd(dev, (mac | (clear << 63)), port, mode, | |
1715 | MLX4_CMD_SET_MCAST_FLTR, MLX4_CMD_TIME_CLASS_B, | |
1716 | MLX4_CMD_WRAPPED); | |
1717 | } | |
1718 | EXPORT_SYMBOL(mlx4_SET_MCAST_FLTR); | |
1719 | ||
1720 | int mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave, | |
1721 | struct mlx4_vhcr *vhcr, | |
1722 | struct mlx4_cmd_mailbox *inbox, | |
1723 | struct mlx4_cmd_mailbox *outbox, | |
1724 | struct mlx4_cmd_info *cmd) | |
1725 | { | |
1726 | int err = 0; | |
1727 | ||
1728 | return err; | |
1729 | } | |
1730 | ||
1731 | int mlx4_common_dump_eth_stats(struct mlx4_dev *dev, int slave, | |
1732 | u32 in_mod, struct mlx4_cmd_mailbox *outbox) | |
1733 | { | |
1734 | return mlx4_cmd_box(dev, 0, outbox->dma, in_mod, 0, | |
1735 | MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B, | |
1736 | MLX4_CMD_NATIVE); | |
1737 | } | |
1738 | ||
1739 | int mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave, | |
1740 | struct mlx4_vhcr *vhcr, | |
1741 | struct mlx4_cmd_mailbox *inbox, | |
1742 | struct mlx4_cmd_mailbox *outbox, | |
1743 | struct mlx4_cmd_info *cmd) | |
1744 | { | |
35fb9afb EE |
1745 | if (slave != dev->caps.function) |
1746 | return 0; | |
ffe455ad EE |
1747 | return mlx4_common_dump_eth_stats(dev, slave, |
1748 | vhcr->in_modifier, outbox); | |
1749 | } | |
93ece0c1 | 1750 | |
9cd59352 JM |
1751 | int mlx4_get_slave_from_roce_gid(struct mlx4_dev *dev, int port, u8 *gid, |
1752 | int *slave_id) | |
6ee51a4e JM |
1753 | { |
1754 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1755 | int i, found_ix = -1; | |
b6ffaeff | 1756 | int vf_gids = MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS; |
449fc488 MB |
1757 | struct mlx4_slaves_pport slaves_pport; |
1758 | unsigned num_vfs; | |
1759 | int slave_gid; | |
6ee51a4e JM |
1760 | |
1761 | if (!mlx4_is_mfunc(dev)) | |
1762 | return -EINVAL; | |
1763 | ||
449fc488 | 1764 | slaves_pport = mlx4_phys_to_slaves_pport(dev, port); |
872bf2fb YH |
1765 | num_vfs = bitmap_weight(slaves_pport.slaves, |
1766 | dev->persist->num_vfs + 1) - 1; | |
449fc488 | 1767 | |
6ee51a4e | 1768 | for (i = 0; i < MLX4_ROCE_MAX_GIDS; i++) { |
111c6094 JM |
1769 | if (!memcmp(priv->port[port].gid_table.roce_gids[i].raw, gid, |
1770 | MLX4_ROCE_GID_ENTRY_SIZE)) { | |
6ee51a4e JM |
1771 | found_ix = i; |
1772 | break; | |
1773 | } | |
1774 | } | |
1775 | ||
b6ffaeff | 1776 | if (found_ix >= 0) { |
0254bc82 MB |
1777 | /* Calculate a slave_gid which is the slave number in the gid |
1778 | * table and not a globally unique slave number. | |
1779 | */ | |
b6ffaeff | 1780 | if (found_ix < MLX4_ROCE_PF_GIDS) |
449fc488 MB |
1781 | slave_gid = 0; |
1782 | else if (found_ix < MLX4_ROCE_PF_GIDS + (vf_gids % num_vfs) * | |
1783 | (vf_gids / num_vfs + 1)) | |
1784 | slave_gid = ((found_ix - MLX4_ROCE_PF_GIDS) / | |
1785 | (vf_gids / num_vfs + 1)) + 1; | |
b6ffaeff | 1786 | else |
449fc488 | 1787 | slave_gid = |
b6ffaeff | 1788 | ((found_ix - MLX4_ROCE_PF_GIDS - |
449fc488 MB |
1789 | ((vf_gids % num_vfs) * ((vf_gids / num_vfs + 1)))) / |
1790 | (vf_gids / num_vfs)) + vf_gids % num_vfs + 1; | |
1791 | ||
0254bc82 | 1792 | /* Calculate the globally unique slave id */ |
449fc488 MB |
1793 | if (slave_gid) { |
1794 | struct mlx4_active_ports exclusive_ports; | |
1795 | struct mlx4_active_ports actv_ports; | |
1796 | struct mlx4_slaves_pport slaves_pport_actv; | |
1797 | unsigned max_port_p_one; | |
0254bc82 MB |
1798 | int num_vfs_before = 0; |
1799 | int candidate_slave_gid; | |
449fc488 | 1800 | |
0254bc82 | 1801 | /* Calculate how many VFs are on the previous port, if exists */ |
449fc488 MB |
1802 | for (i = 1; i < port; i++) { |
1803 | bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); | |
0254bc82 | 1804 | set_bit(i - 1, exclusive_ports.ports); |
449fc488 MB |
1805 | slaves_pport_actv = |
1806 | mlx4_phys_to_slaves_pport_actv( | |
1807 | dev, &exclusive_ports); | |
0254bc82 | 1808 | num_vfs_before += bitmap_weight( |
449fc488 | 1809 | slaves_pport_actv.slaves, |
872bf2fb | 1810 | dev->persist->num_vfs + 1); |
449fc488 MB |
1811 | } |
1812 | ||
0254bc82 MB |
1813 | /* candidate_slave_gid isn't necessarily the correct slave, but |
1814 | * it has the same number of ports and is assigned to the same | |
1815 | * ports as the real slave we're looking for. On dual port VF, | |
1816 | * slave_gid = [single port VFs on port <port>] + | |
1817 | * [offset of the current slave from the first dual port VF] + | |
1818 | * 1 (for the PF). | |
1819 | */ | |
1820 | candidate_slave_gid = slave_gid + num_vfs_before; | |
1821 | ||
1822 | actv_ports = mlx4_get_active_ports(dev, candidate_slave_gid); | |
449fc488 MB |
1823 | max_port_p_one = find_first_bit( |
1824 | actv_ports.ports, dev->caps.num_ports) + | |
1825 | bitmap_weight(actv_ports.ports, | |
1826 | dev->caps.num_ports) + 1; | |
1827 | ||
0254bc82 | 1828 | /* Calculate the real slave number */ |
449fc488 MB |
1829 | for (i = 1; i < max_port_p_one; i++) { |
1830 | if (i == port) | |
1831 | continue; | |
1832 | bitmap_zero(exclusive_ports.ports, | |
1833 | dev->caps.num_ports); | |
1834 | set_bit(i - 1, exclusive_ports.ports); | |
1835 | slaves_pport_actv = | |
1836 | mlx4_phys_to_slaves_pport_actv( | |
1837 | dev, &exclusive_ports); | |
1838 | slave_gid += bitmap_weight( | |
1839 | slaves_pport_actv.slaves, | |
872bf2fb | 1840 | dev->persist->num_vfs + 1); |
449fc488 MB |
1841 | } |
1842 | } | |
1843 | *slave_id = slave_gid; | |
b6ffaeff | 1844 | } |
6ee51a4e JM |
1845 | |
1846 | return (found_ix >= 0) ? 0 : -EINVAL; | |
1847 | } | |
1848 | EXPORT_SYMBOL(mlx4_get_slave_from_roce_gid); | |
1849 | ||
9cd59352 JM |
1850 | int mlx4_get_roce_gid_from_slave(struct mlx4_dev *dev, int port, int slave_id, |
1851 | u8 *gid) | |
6ee51a4e JM |
1852 | { |
1853 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1854 | ||
1855 | if (!mlx4_is_master(dev)) | |
1856 | return -EINVAL; | |
1857 | ||
111c6094 JM |
1858 | memcpy(gid, priv->port[port].gid_table.roce_gids[slave_id].raw, |
1859 | MLX4_ROCE_GID_ENTRY_SIZE); | |
6ee51a4e JM |
1860 | return 0; |
1861 | } | |
1862 | EXPORT_SYMBOL(mlx4_get_roce_gid_from_slave); | |
32a173c7 SM |
1863 | |
1864 | /* Cable Module Info */ | |
1865 | #define MODULE_INFO_MAX_READ 48 | |
1866 | ||
1867 | #define I2C_ADDR_LOW 0x50 | |
1868 | #define I2C_ADDR_HIGH 0x51 | |
1869 | #define I2C_PAGE_SIZE 256 | |
1870 | ||
1871 | /* Module Info Data */ | |
1872 | struct mlx4_cable_info { | |
1873 | u8 i2c_addr; | |
1874 | u8 page_num; | |
1875 | __be16 dev_mem_address; | |
1876 | __be16 reserved1; | |
1877 | __be16 size; | |
1878 | __be32 reserved2[2]; | |
1879 | u8 data[MODULE_INFO_MAX_READ]; | |
1880 | }; | |
1881 | ||
1882 | enum cable_info_err { | |
1883 | CABLE_INF_INV_PORT = 0x1, | |
1884 | CABLE_INF_OP_NOSUP = 0x2, | |
1885 | CABLE_INF_NOT_CONN = 0x3, | |
1886 | CABLE_INF_NO_EEPRM = 0x4, | |
1887 | CABLE_INF_PAGE_ERR = 0x5, | |
1888 | CABLE_INF_INV_ADDR = 0x6, | |
1889 | CABLE_INF_I2C_ADDR = 0x7, | |
1890 | CABLE_INF_QSFP_VIO = 0x8, | |
1891 | CABLE_INF_I2C_BUSY = 0x9, | |
1892 | }; | |
1893 | ||
1894 | #define MAD_STATUS_2_CABLE_ERR(mad_status) ((mad_status >> 8) & 0xFF) | |
1895 | ||
1896 | static inline const char *cable_info_mad_err_str(u16 mad_status) | |
1897 | { | |
1898 | u8 err = MAD_STATUS_2_CABLE_ERR(mad_status); | |
1899 | ||
1900 | switch (err) { | |
1901 | case CABLE_INF_INV_PORT: | |
1902 | return "invalid port selected"; | |
1903 | case CABLE_INF_OP_NOSUP: | |
1904 | return "operation not supported for this port (the port is of type CX4 or internal)"; | |
1905 | case CABLE_INF_NOT_CONN: | |
1906 | return "cable is not connected"; | |
1907 | case CABLE_INF_NO_EEPRM: | |
1908 | return "the connected cable has no EPROM (passive copper cable)"; | |
1909 | case CABLE_INF_PAGE_ERR: | |
1910 | return "page number is greater than 15"; | |
1911 | case CABLE_INF_INV_ADDR: | |
1912 | return "invalid device_address or size (that is, size equals 0 or address+size is greater than 256)"; | |
1913 | case CABLE_INF_I2C_ADDR: | |
1914 | return "invalid I2C slave address"; | |
1915 | case CABLE_INF_QSFP_VIO: | |
1916 | return "at least one cable violates the QSFP specification and ignores the modsel signal"; | |
1917 | case CABLE_INF_I2C_BUSY: | |
1918 | return "I2C bus is constantly busy"; | |
1919 | } | |
1920 | return "Unknown Error"; | |
1921 | } | |
1922 | ||
1923 | /** | |
1924 | * mlx4_get_module_info - Read cable module eeprom data | |
1925 | * @dev: mlx4_dev. | |
1926 | * @port: port number. | |
1927 | * @offset: byte offset in eeprom to start reading data from. | |
1928 | * @size: num of bytes to read. | |
1929 | * @data: output buffer to put the requested data into. | |
1930 | * | |
1931 | * Reads cable module eeprom data, puts the outcome data into | |
1932 | * data pointer paramer. | |
1933 | * Returns num of read bytes on success or a negative error | |
1934 | * code. | |
1935 | */ | |
1936 | int mlx4_get_module_info(struct mlx4_dev *dev, u8 port, | |
1937 | u16 offset, u16 size, u8 *data) | |
1938 | { | |
1939 | struct mlx4_cmd_mailbox *inbox, *outbox; | |
1940 | struct mlx4_mad_ifc *inmad, *outmad; | |
1941 | struct mlx4_cable_info *cable_info; | |
1942 | u16 i2c_addr; | |
1943 | int ret; | |
1944 | ||
1945 | if (size > MODULE_INFO_MAX_READ) | |
1946 | size = MODULE_INFO_MAX_READ; | |
1947 | ||
1948 | inbox = mlx4_alloc_cmd_mailbox(dev); | |
1949 | if (IS_ERR(inbox)) | |
1950 | return PTR_ERR(inbox); | |
1951 | ||
1952 | outbox = mlx4_alloc_cmd_mailbox(dev); | |
1953 | if (IS_ERR(outbox)) { | |
1954 | mlx4_free_cmd_mailbox(dev, inbox); | |
1955 | return PTR_ERR(outbox); | |
1956 | } | |
1957 | ||
1958 | inmad = (struct mlx4_mad_ifc *)(inbox->buf); | |
1959 | outmad = (struct mlx4_mad_ifc *)(outbox->buf); | |
1960 | ||
1961 | inmad->method = 0x1; /* Get */ | |
1962 | inmad->class_version = 0x1; | |
1963 | inmad->mgmt_class = 0x1; | |
1964 | inmad->base_version = 0x1; | |
1965 | inmad->attr_id = cpu_to_be16(0xFF60); /* Module Info */ | |
1966 | ||
1967 | if (offset < I2C_PAGE_SIZE && offset + size > I2C_PAGE_SIZE) | |
1968 | /* Cross pages reads are not allowed | |
1969 | * read until offset 256 in low page | |
1970 | */ | |
1971 | size -= offset + size - I2C_PAGE_SIZE; | |
1972 | ||
1973 | i2c_addr = I2C_ADDR_LOW; | |
1974 | if (offset >= I2C_PAGE_SIZE) { | |
1975 | /* Reset offset to high page */ | |
1976 | i2c_addr = I2C_ADDR_HIGH; | |
1977 | offset -= I2C_PAGE_SIZE; | |
1978 | } | |
1979 | ||
1980 | cable_info = (struct mlx4_cable_info *)inmad->data; | |
1981 | cable_info->dev_mem_address = cpu_to_be16(offset); | |
1982 | cable_info->page_num = 0; | |
1983 | cable_info->i2c_addr = i2c_addr; | |
1984 | cable_info->size = cpu_to_be16(size); | |
1985 | ||
1986 | ret = mlx4_cmd_box(dev, inbox->dma, outbox->dma, port, 3, | |
1987 | MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C, | |
1988 | MLX4_CMD_NATIVE); | |
1989 | if (ret) | |
1990 | goto out; | |
1991 | ||
1992 | if (be16_to_cpu(outmad->status)) { | |
1993 | /* Mad returned with bad status */ | |
1994 | ret = be16_to_cpu(outmad->status); | |
1995 | mlx4_warn(dev, | |
1996 | "MLX4_CMD_MAD_IFC Get Module info attr(%x) port(%d) i2c_addr(%x) offset(%d) size(%d): Response Mad Status(%x) - %s\n", | |
1997 | 0xFF60, port, i2c_addr, offset, size, | |
1998 | ret, cable_info_mad_err_str(ret)); | |
1999 | ||
2000 | if (i2c_addr == I2C_ADDR_HIGH && | |
2001 | MAD_STATUS_2_CABLE_ERR(ret) == CABLE_INF_I2C_ADDR) | |
2002 | /* Some SFP cables do not support i2c slave | |
2003 | * address 0x51 (high page), abort silently. | |
2004 | */ | |
2005 | ret = 0; | |
2006 | else | |
2007 | ret = -ret; | |
2008 | goto out; | |
2009 | } | |
2010 | cable_info = (struct mlx4_cable_info *)outmad->data; | |
2011 | memcpy(data, cable_info->data, size); | |
2012 | ret = size; | |
2013 | out: | |
2014 | mlx4_free_cmd_mailbox(dev, inbox); | |
2015 | mlx4_free_cmd_mailbox(dev, outbox); | |
2016 | return ret; | |
2017 | } | |
2018 | EXPORT_SYMBOL(mlx4_get_module_info); | |
af7d5185 RS |
2019 | |
2020 | int mlx4_max_tc(struct mlx4_dev *dev) | |
2021 | { | |
2022 | u8 num_tc = dev->caps.max_tc_eth; | |
2023 | ||
2024 | if (!num_tc) | |
564ed9b1 | 2025 | num_tc = MLX4_TC_MAX_NUMBER; |
af7d5185 RS |
2026 | |
2027 | return num_tc; | |
2028 | } | |
2029 | EXPORT_SYMBOL(mlx4_max_tc); |