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Merge remote-tracking branch 'iommu/next'
[deliverable/linux.git] / drivers / net / ethernet / mellanox / mlxsw / spectrum.c
CommitLineData
56ade8fe
JP		 1/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/module.h>
39#include <linux/types.h>
40#include <linux/netdevice.h>
41#include <linux/etherdevice.h>
42#include <linux/ethtool.h>
43#include <linux/slab.h>
44#include <linux/device.h>
45#include <linux/skbuff.h>
46#include <linux/if_vlan.h>
47#include <linux/if_bridge.h>
48#include <linux/workqueue.h>
49#include <linux/jiffies.h>
50#include <linux/bitops.h>
7f71eb46 51#include <linux/list.h>
80bedf1a 52#include <linux/notifier.h>
90183b98 53#include <linux/dcbnl.h>
99724c18 54#include <linux/inetdevice.h>
56ade8fe
JP		 55#include <net/switchdev.h>
56#include <generated/utsrelease.h>
763b4b70
YG		 57#include <net/pkt_cls.h>
58#include <net/tc_act/tc_mirred.h>
e7322638 59#include <net/netevent.h>
56ade8fe
JP		 60
61#include "spectrum.h"
62#include "core.h"
63#include "reg.h"
64#include "port.h"
65#include "trap.h"
66#include "txheader.h"
67
68static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum";
69static const char mlxsw_sp_driver_version[] = "1.0";
70
71/* tx_hdr_version
72 * Tx header version.
73 * Must be set to 1.
74 */
75MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4);
76
77/* tx_hdr_ctl
78 * Packet control type.
79 * 0 - Ethernet control (e.g. EMADs, LACP)
80 * 1 - Ethernet data
81 */
82MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2);
83
84/* tx_hdr_proto
85 * Packet protocol type. Must be set to 1 (Ethernet).
86 */
87MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3);
88
89/* tx_hdr_rx_is_router
90 * Packet is sent from the router. Valid for data packets only.
91 */
92MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1);
93
94/* tx_hdr_fid_valid
95 * Indicates if the 'fid' field is valid and should be used for
96 * forwarding lookup. Valid for data packets only.
97 */
98MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1);
99
100/* tx_hdr_swid
101 * Switch partition ID. Must be set to 0.
102 */
103MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3);
104
105/* tx_hdr_control_tclass
106 * Indicates if the packet should use the control TClass and not one
107 * of the data TClasses.
108 */
109MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1);
110
111/* tx_hdr_etclass
112 * Egress TClass to be used on the egress device on the egress port.
113 */
114MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4);
115
116/* tx_hdr_port_mid
117 * Destination local port for unicast packets.
118 * Destination multicast ID for multicast packets.
119 *
120 * Control packets are directed to a specific egress port, while data
121 * packets are transmitted through the CPU port (0) into the switch partition,
122 * where forwarding rules are applied.
123 */
124MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16);
125
126/* tx_hdr_fid
127 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is
128 * set, otherwise calculated based on the packet's VID using VID to FID mapping.
129 * Valid for data packets only.
130 */
131MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16);
132
133/* tx_hdr_type
134 * 0 - Data packets
135 * 6 - Control packets
136 */
137MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4);
138
763b4b70
YG		 139static bool mlxsw_sp_port_dev_check(const struct net_device *dev);
140
56ade8fe
JP		 141static void mlxsw_sp_txhdr_construct(struct sk_buff *skb,
142 const struct mlxsw_tx_info *tx_info)
143{
144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN);
145
146 memset(txhdr, 0, MLXSW_TXHDR_LEN);
147
148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1);
149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL);
150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH);
151 mlxsw_tx_hdr_swid_set(txhdr, 0);
152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1);
153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port);
154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL);
155}
156
157static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp)
158{
159 char spad_pl[MLXSW_REG_SPAD_LEN];
160 int err;
161
162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl);
163 if (err)
164 return err;
165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac);
166 return 0;
167}
168
763b4b70
YG		 169static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp)
170{
171 struct mlxsw_resources *resources;
172 int i;
173
174 resources = mlxsw_core_resources_get(mlxsw_sp->core);
175 if (!resources->max_span_valid)
176 return -EIO;
177
178 mlxsw_sp->span.entries_count = resources->max_span;
179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count,
180 sizeof(struct mlxsw_sp_span_entry),
181 GFP_KERNEL);
182 if (!mlxsw_sp->span.entries)
183 return -ENOMEM;
184
185 for (i = 0; i < mlxsw_sp->span.entries_count; i++)
186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list);
187
188 return 0;
189}
190
191static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp)
192{
193 int i;
194
195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
197
198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list));
199 }
200 kfree(mlxsw_sp->span.entries);
201}
202
203static struct mlxsw_sp_span_entry *
204mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port)
205{
206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
207 struct mlxsw_sp_span_entry *span_entry;
208 char mpat_pl[MLXSW_REG_MPAT_LEN];
209 u8 local_port = port->local_port;
210 int index;
211 int i;
212 int err;
213
214 /* find a free entry to use */
215 index = -1;
216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
217 if (!mlxsw_sp->span.entries[i].used) {
218 index = i;
219 span_entry = &mlxsw_sp->span.entries[i];
220 break;
221 }
222 }
223 if (index < 0)
224 return NULL;
225
226 /* create a new port analayzer entry for local_port */
227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true);
228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
229 if (err)
230 return NULL;
231
232 span_entry->used = true;
233 span_entry->id = index;
234 span_entry->ref_count = 0;
235 span_entry->local_port = local_port;
236 return span_entry;
237}
238
239static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp,
240 struct mlxsw_sp_span_entry *span_entry)
241{
242 u8 local_port = span_entry->local_port;
243 char mpat_pl[MLXSW_REG_MPAT_LEN];
244 int pa_id = span_entry->id;
245
246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false);
247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl);
248 span_entry->used = false;
249}
250
251struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port)
252{
253 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
254 int i;
255
256 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
257 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
258
259 if (curr->used && curr->local_port == port->local_port)
260 return curr;
261 }
262 return NULL;
263}
264
265struct mlxsw_sp_span_entry *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port)
266{
267 struct mlxsw_sp_span_entry *span_entry;
268
269 span_entry = mlxsw_sp_span_entry_find(port);
270 if (span_entry) {
271 span_entry->ref_count++;
272 return span_entry;
273 }
274
275 return mlxsw_sp_span_entry_create(port);
276}
277
278static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp,
279 struct mlxsw_sp_span_entry *span_entry)
280{
281 if (--span_entry->ref_count == 0)
282 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry);
283 return 0;
284}
285
286static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port)
287{
288 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
289 struct mlxsw_sp_span_inspected_port *p;
290 int i;
291
292 for (i = 0; i < mlxsw_sp->span.entries_count; i++) {
293 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i];
294
295 list_for_each_entry(p, &curr->bound_ports_list, list)
296 if (p->local_port == port->local_port &&
297 p->type == MLXSW_SP_SPAN_EGRESS)
298 return true;
299 }
300
301 return false;
302}
303
304static int mlxsw_sp_span_mtu_to_buffsize(int mtu)
305{
306 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1;
307}
308
309static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu)
310{
311 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
312 char sbib_pl[MLXSW_REG_SBIB_LEN];
313 int err;
314
315 /* If port is egress mirrored, the shared buffer size should be
316 * updated according to the mtu value
317 */
318 if (mlxsw_sp_span_is_egress_mirror(port)) {
319 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
320 mlxsw_sp_span_mtu_to_buffsize(mtu));
321 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
322 if (err) {
323 netdev_err(port->dev, "Could not update shared buffer for mirroring\n");
324 return err;
325 }
326 }
327
328 return 0;
329}
330
331static struct mlxsw_sp_span_inspected_port *
332mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port,
333 struct mlxsw_sp_span_entry *span_entry)
334{
335 struct mlxsw_sp_span_inspected_port *p;
336
337 list_for_each_entry(p, &span_entry->bound_ports_list, list)
338 if (port->local_port == p->local_port)
339 return p;
340 return NULL;
341}
342
343static int
344mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port,
345 struct mlxsw_sp_span_entry *span_entry,
346 enum mlxsw_sp_span_type type)
347{
348 struct mlxsw_sp_span_inspected_port *inspected_port;
349 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
350 char mpar_pl[MLXSW_REG_MPAR_LEN];
351 char sbib_pl[MLXSW_REG_SBIB_LEN];
352 int pa_id = span_entry->id;
353 int err;
354
355 /* if it is an egress SPAN, bind a shared buffer to it */
356 if (type == MLXSW_SP_SPAN_EGRESS) {
357 mlxsw_reg_sbib_pack(sbib_pl, port->local_port,
358 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu));
359 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
360 if (err) {
361 netdev_err(port->dev, "Could not create shared buffer for mirroring\n");
362 return err;
363 }
364 }
365
366 /* bind the port to the SPAN entry */
367 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, true, pa_id);
368 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
369 if (err)
370 goto err_mpar_reg_write;
371
372 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL);
373 if (!inspected_port) {
374 err = -ENOMEM;
375 goto err_inspected_port_alloc;
376 }
377 inspected_port->local_port = port->local_port;
378 inspected_port->type = type;
379 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list);
380
381 return 0;
382
383err_mpar_reg_write:
384err_inspected_port_alloc:
385 if (type == MLXSW_SP_SPAN_EGRESS) {
386 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
387 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
388 }
389 return err;
390}
391
392static void
393mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port,
394 struct mlxsw_sp_span_entry *span_entry,
395 enum mlxsw_sp_span_type type)
396{
397 struct mlxsw_sp_span_inspected_port *inspected_port;
398 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp;
399 char mpar_pl[MLXSW_REG_MPAR_LEN];
400 char sbib_pl[MLXSW_REG_SBIB_LEN];
401 int pa_id = span_entry->id;
402
403 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry);
404 if (!inspected_port)
405 return;
406
407 /* remove the inspected port */
408 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, type, false, pa_id);
409 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl);
410
411 /* remove the SBIB buffer if it was egress SPAN */
412 if (type == MLXSW_SP_SPAN_EGRESS) {
413 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0);
414 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl);
415 }
416
417 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
418
419 list_del(&inspected_port->list);
420 kfree(inspected_port);
421}
422
423static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from,
424 struct mlxsw_sp_port *to,
425 enum mlxsw_sp_span_type type)
426{
427 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp;
428 struct mlxsw_sp_span_entry *span_entry;
429 int err;
430
431 span_entry = mlxsw_sp_span_entry_get(to);
432 if (!span_entry)
433 return -ENOENT;
434
435 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n",
436 span_entry->id);
437
438 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type);
439 if (err)
440 goto err_port_bind;
441
442 return 0;
443
444err_port_bind:
445 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry);
446 return err;
447}
448
449static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from,
450 struct mlxsw_sp_port *to,
451 enum mlxsw_sp_span_type type)
452{
453 struct mlxsw_sp_span_entry *span_entry;
454
455 span_entry = mlxsw_sp_span_entry_find(to);
456 if (!span_entry) {
457 netdev_err(from->dev, "no span entry found\n");
458 return;
459 }
460
461 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n",
462 span_entry->id);
463 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type);
464}
465
56ade8fe
JP		 466static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port,
467 bool is_up)
468{
469 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
470 char paos_pl[MLXSW_REG_PAOS_LEN];
471
472 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port,
473 is_up ? MLXSW_PORT_ADMIN_STATUS_UP :
474 MLXSW_PORT_ADMIN_STATUS_DOWN);
475 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl);
476}
477
56ade8fe
JP		 478static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port,
479 unsigned char *addr)
480{
481 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
482 char ppad_pl[MLXSW_REG_PPAD_LEN];
483
484 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port);
485 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr);
486 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl);
487}
488
489static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port)
490{
491 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
492 unsigned char *addr = mlxsw_sp_port->dev->dev_addr;
493
494 ether_addr_copy(addr, mlxsw_sp->base_mac);
495 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port;
496 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr);
497}
498
56ade8fe
JP		 499static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu)
500{
501 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
502 char pmtu_pl[MLXSW_REG_PMTU_LEN];
503 int max_mtu;
504 int err;
505
506 mtu += MLXSW_TXHDR_LEN + ETH_HLEN;
507 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0);
508 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
509 if (err)
510 return err;
511 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl);
512
513 if (mtu > max_mtu)
514 return -EINVAL;
515
516 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu);
517 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl);
518}
519
be94535f
IS		 520static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port,
521 u8 swid)
56ade8fe 522{
56ade8fe
JP		 523 char pspa_pl[MLXSW_REG_PSPA_LEN];
524
be94535f 525 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port);
56ade8fe
JP		 526 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl);
527}
528
be94535f
IS		 529static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid)
530{
531 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
532
533 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port,
534 swid);
535}
536
56ade8fe
JP		 537static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port,
538 bool enable)
539{
540 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
541 char svpe_pl[MLXSW_REG_SVPE_LEN];
542
543 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable);
544 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl);
545}
546
547int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port,
548 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid,
549 u16 vid)
550{
551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
552 char svfa_pl[MLXSW_REG_SVFA_LEN];
553
554 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid,
555 fid, vid);
556 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
557}
558
584d73df
IS		 559int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
560 u16 vid_begin, u16 vid_end,
561 bool learn_enable)
56ade8fe
JP		 562{
563 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
564 char *spvmlr_pl;
565 int err;
566
567 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL);
568 if (!spvmlr_pl)
569 return -ENOMEM;
584d73df
IS		 570 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin,
571 vid_end, learn_enable);
56ade8fe
JP		 572 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl);
573 kfree(spvmlr_pl);
574 return err;
575}
576
584d73df
IS		 577static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port,
578 u16 vid, bool learn_enable)
579{
580 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid,
581 learn_enable);
582}
583
56ade8fe
JP		 584static int
585mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port)
586{
587 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
588 char sspr_pl[MLXSW_REG_SSPR_LEN];
589
590 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port);
591 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl);
592}
593
d664b41e
IS		 594static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp,
595 u8 local_port, u8 *p_module,
596 u8 *p_width, u8 *p_lane)
56ade8fe 597{
56ade8fe
JP		 598 char pmlp_pl[MLXSW_REG_PMLP_LEN];
599 int err;
600
558c2d5e 601 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
56ade8fe
JP		 602 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
603 if (err)
604 return err;
558c2d5e
IS		 605 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0);
606 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl);
2bf9a586 607 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0);
56ade8fe
JP		 608 return 0;
609}
610
18f1e70c
IS		 611static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port,
612 u8 module, u8 width, u8 lane)
613{
614 char pmlp_pl[MLXSW_REG_PMLP_LEN];
615 int i;
616
617 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
618 mlxsw_reg_pmlp_width_set(pmlp_pl, width);
619 for (i = 0; i < width; i++) {
620 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module);
621 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */
622 }
623
624 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
625}
626
3e9b27b8
IS		 627static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port)
628{
629 char pmlp_pl[MLXSW_REG_PMLP_LEN];
630
631 mlxsw_reg_pmlp_pack(pmlp_pl, local_port);
632 mlxsw_reg_pmlp_width_set(pmlp_pl, 0);
633 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl);
634}
635
56ade8fe
JP		 636static int mlxsw_sp_port_open(struct net_device *dev)
637{
638 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
639 int err;
640
641 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
642 if (err)
643 return err;
644 netif_start_queue(dev);
645 return 0;
646}
647
648static int mlxsw_sp_port_stop(struct net_device *dev)
649{
650 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
651
652 netif_stop_queue(dev);
653 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
654}
655
656static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb,
657 struct net_device *dev)
658{
659 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
660 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
661 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
662 const struct mlxsw_tx_info tx_info = {
663 .local_port = mlxsw_sp_port->local_port,
664 .is_emad = false,
665 };
666 u64 len;
667 int err;
668
307c2431 669 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info))
56ade8fe
JP		 670 return NETDEV_TX_BUSY;
671
672 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) {
673 struct sk_buff *skb_orig = skb;
674
675 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN);
676 if (!skb) {
677 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
678 dev_kfree_skb_any(skb_orig);
679 return NETDEV_TX_OK;
680 }
681 }
682
683 if (eth_skb_pad(skb)) {
684 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
685 return NETDEV_TX_OK;
686 }
687
688 mlxsw_sp_txhdr_construct(skb, &tx_info);
63dcdd35
NF		 689 /* TX header is consumed by HW on the way so we shouldn't count its
690 * bytes as being sent.
691 */
692 len = skb->len - MLXSW_TXHDR_LEN;
693
56ade8fe
JP		 694 /* Due to a race we might fail here because of a full queue. In that
695 * unlikely case we simply drop the packet.
696 */
307c2431 697 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info);
56ade8fe
JP		 698
699 if (!err) {
700 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
701 u64_stats_update_begin(&pcpu_stats->syncp);
702 pcpu_stats->tx_packets++;
703 pcpu_stats->tx_bytes += len;
704 u64_stats_update_end(&pcpu_stats->syncp);
705 } else {
706 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped);
707 dev_kfree_skb_any(skb);
708 }
709 return NETDEV_TX_OK;
710}
711
c5b9b518
JP		 712static void mlxsw_sp_set_rx_mode(struct net_device *dev)
713{
714}
715
56ade8fe
JP		 716static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p)
717{
718 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
719 struct sockaddr *addr = p;
720 int err;
721
722 if (!is_valid_ether_addr(addr->sa_data))
723 return -EADDRNOTAVAIL;
724
725 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data);
726 if (err)
727 return err;
728 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
729 return 0;
730}
731
9f7ec052 732static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu,
d81a6bdb 733 bool pause_en, bool pfc_en, u16 delay)
ff6551ec 734{
ff6551ec 735 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu);
8e8dfe9f 736
d81a6bdb
IS		 737 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) :
738 MLXSW_SP_PAUSE_DELAY;
9f7ec052 739
d81a6bdb 740 if (pause_en || pfc_en)
9f7ec052 741 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index,
d81a6bdb
IS		 742 pg_size + delay, pg_size);
743 else
9f7ec052 744 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size);
8e8dfe9f
IS		 745}
746
747int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu,
d81a6bdb
IS		 748 u8 *prio_tc, bool pause_en,
749 struct ieee_pfc *my_pfc)
8e8dfe9f
IS		 750{
751 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
d81a6bdb
IS		 752 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0;
753 u16 delay = !!my_pfc ? my_pfc->delay : 0;
ff6551ec 754 char pbmc_pl[MLXSW_REG_PBMC_LEN];
8e8dfe9f 755 int i, j, err;
ff6551ec
IS		 756
757 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0);
758 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
759 if (err)
760 return err;
8e8dfe9f
IS		 761
762 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
763 bool configure = false;
d81a6bdb 764 bool pfc = false;
8e8dfe9f
IS		 765
766 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) {
767 if (prio_tc[j] == i) {
d81a6bdb 768 pfc = pfc_en & BIT(j);
8e8dfe9f
IS		 769 configure = true;
770 break;
771 }
772 }
773
774 if (!configure)
775 continue;
d81a6bdb 776 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay);
8e8dfe9f
IS		 777 }
778
ff6551ec
IS		 779 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl);
780}
781
8e8dfe9f 782static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port,
9f7ec052 783 int mtu, bool pause_en)
8e8dfe9f
IS		 784{
785 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0};
786 bool dcb_en = !!mlxsw_sp_port->dcb.ets;
d81a6bdb 787 struct ieee_pfc *my_pfc;
8e8dfe9f
IS		 788 u8 *prio_tc;
789
790 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc;
d81a6bdb 791 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL;
8e8dfe9f 792
9f7ec052 793 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc,
d81a6bdb 794 pause_en, my_pfc);
8e8dfe9f
IS		 795}
796
56ade8fe
JP		 797static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu)
798{
799 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
9f7ec052 800 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
56ade8fe
JP		 801 int err;
802
9f7ec052 803 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en);
56ade8fe
JP		 804 if (err)
805 return err;
763b4b70
YG		 806 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu);
807 if (err)
808 goto err_span_port_mtu_update;
ff6551ec
IS		 809 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu);
810 if (err)
811 goto err_port_mtu_set;
56ade8fe
JP		 812 dev->mtu = mtu;
813 return 0;
ff6551ec
IS		 814
815err_port_mtu_set:
763b4b70
YG		 816 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu);
817err_span_port_mtu_update:
9f7ec052 818 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
ff6551ec 819 return err;
56ade8fe
JP		 820}
821
822static struct rtnl_link_stats64 *
823mlxsw_sp_port_get_stats64(struct net_device *dev,
824 struct rtnl_link_stats64 *stats)
825{
826 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
827 struct mlxsw_sp_port_pcpu_stats *p;
828 u64 rx_packets, rx_bytes, tx_packets, tx_bytes;
829 u32 tx_dropped = 0;
830 unsigned int start;
831 int i;
832
833 for_each_possible_cpu(i) {
834 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i);
835 do {
836 start = u64_stats_fetch_begin_irq(&p->syncp);
837 rx_packets = p->rx_packets;
838 rx_bytes = p->rx_bytes;
839 tx_packets = p->tx_packets;
840 tx_bytes = p->tx_bytes;
841 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
842
843 stats->rx_packets += rx_packets;
844 stats->rx_bytes += rx_bytes;
845 stats->tx_packets += tx_packets;
846 stats->tx_bytes += tx_bytes;
847 /* tx_dropped is u32, updated without syncp protection. */
848 tx_dropped += p->tx_dropped;
849 }
850 stats->tx_dropped = tx_dropped;
851 return stats;
852}
853
854int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin,
855 u16 vid_end, bool is_member, bool untagged)
856{
857 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
858 char *spvm_pl;
859 int err;
860
861 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL);
862 if (!spvm_pl)
863 return -ENOMEM;
864
865 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin,
866 vid_end, is_member, untagged);
867 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl);
868 kfree(spvm_pl);
869 return err;
870}
871
872static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
873{
874 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
875 u16 vid, last_visited_vid;
876 int err;
877
878 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
879 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid,
880 vid);
881 if (err) {
882 last_visited_vid = vid;
883 goto err_port_vid_to_fid_set;
884 }
885 }
886
887 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true);
888 if (err) {
889 last_visited_vid = VLAN_N_VID;
890 goto err_port_vid_to_fid_set;
891 }
892
893 return 0;
894
895err_port_vid_to_fid_set:
896 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
897 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid,
898 vid);
899 return err;
900}
901
902static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port)
903{
904 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
905 u16 vid;
906 int err;
907
908 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false);
909 if (err)
910 return err;
911
912 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
913 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false,
914 vid, vid);
915 if (err)
916 return err;
917 }
918
919 return 0;
920}
921
7f71eb46 922static struct mlxsw_sp_port *
0355b59f 923mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
7f71eb46
IS		 924{
925 struct mlxsw_sp_port *mlxsw_sp_vport;
926
927 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL);
928 if (!mlxsw_sp_vport)
929 return NULL;
930
931 /* dev will be set correctly after the VLAN device is linked
932 * with the real device. In case of bridge SELF invocation, dev
933 * will remain as is.
934 */
935 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
936 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
937 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port;
938 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING;
272c4470
IS		 939 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged;
940 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id;
0355b59f 941 mlxsw_sp_vport->vport.vid = vid;
7f71eb46
IS		 942
943 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list);
944
945 return mlxsw_sp_vport;
946}
947
948static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport)
949{
950 list_del(&mlxsw_sp_vport->vport.list);
951 kfree(mlxsw_sp_vport);
952}
953
05978481
IS		 954static int mlxsw_sp_port_add_vid(struct net_device *dev,
955 __be16 __always_unused proto, u16 vid)
56ade8fe
JP		 956{
957 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
7f71eb46 958 struct mlxsw_sp_port *mlxsw_sp_vport;
52697a9e 959 bool untagged = vid == 1;
56ade8fe
JP		 960 int err;
961
962 /* VLAN 0 is added to HW filter when device goes up, but it is
963 * reserved in our case, so simply return.
964 */
965 if (!vid)
966 return 0;
967
fa66d7e3 968 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid))
56ade8fe 969 return 0;
56ade8fe 970
0355b59f 971 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid);
fa66d7e3 972 if (!mlxsw_sp_vport)
0355b59f 973 return -ENOMEM;
56ade8fe 974
56ade8fe
JP		 975 /* When adding the first VLAN interface on a bridged port we need to
976 * transition all the active 802.1Q bridge VLANs to use explicit
977 * {Port, VID} to FID mappings and set the port's mode to Virtual mode.
978 */
7f71eb46 979 if (list_is_singular(&mlxsw_sp_port->vports_list)) {
56ade8fe 980 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port);
fa66d7e3 981 if (err)
7f71eb46 982 goto err_port_vp_mode_trans;
56ade8fe
JP		 983 }
984
52697a9e 985 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged);
fa66d7e3 986 if (err)
56ade8fe 987 goto err_port_add_vid;
56ade8fe 988
56ade8fe
JP		 989 return 0;
990
56ade8fe 991err_port_add_vid:
7f71eb46
IS		 992 if (list_is_singular(&mlxsw_sp_port->vports_list))
993 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
994err_port_vp_mode_trans:
7f71eb46 995 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
56ade8fe
JP		 996 return err;
997}
998
32d863fb
IS		 999static int mlxsw_sp_port_kill_vid(struct net_device *dev,
1000 __be16 __always_unused proto, u16 vid)
56ade8fe
JP		 1001{
1002 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
7f71eb46 1003 struct mlxsw_sp_port *mlxsw_sp_vport;
1c800759 1004 struct mlxsw_sp_fid *f;
56ade8fe
JP		 1005
1006 /* VLAN 0 is removed from HW filter when device goes down, but
1007 * it is reserved in our case, so simply return.
1008 */
1009 if (!vid)
1010 return 0;
1011
7f71eb46 1012 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
7a35583e 1013 if (WARN_ON(!mlxsw_sp_vport))
56ade8fe 1014 return 0;
56ade8fe 1015
7a35583e 1016 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false);
56ade8fe 1017
1c800759
IS		 1018 /* Drop FID reference. If this was the last reference the
1019 * resources will be freed.
1020 */
1021 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
1022 if (f && !WARN_ON(!f->leave))
1023 f->leave(mlxsw_sp_vport);
56ade8fe
JP		 1024
1025 /* When removing the last VLAN interface on a bridged port we need to
1026 * transition all active 802.1Q bridge VLANs to use VID to FID
1027 * mappings and set port's mode to VLAN mode.
1028 */
7a35583e
IS		 1029 if (list_is_singular(&mlxsw_sp_port->vports_list))
1030 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port);
56ade8fe 1031
7f71eb46
IS		 1032 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport);
1033
56ade8fe
JP		 1034 return 0;
1035}
1036
2bf9a586
IS		 1037static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name,
1038 size_t len)
1039{
1040 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
d664b41e
IS		 1041 u8 module = mlxsw_sp_port->mapping.module;
1042 u8 width = mlxsw_sp_port->mapping.width;
1043 u8 lane = mlxsw_sp_port->mapping.lane;
2bf9a586
IS		 1044 int err;
1045
2bf9a586
IS		 1046 if (!mlxsw_sp_port->split)
1047 err = snprintf(name, len, "p%d", module + 1);
1048 else
1049 err = snprintf(name, len, "p%ds%d", module + 1,
1050 lane / width);
1051
1052 if (err >= len)
1053 return -EINVAL;
1054
1055 return 0;
1056}
1057
763b4b70
YG		 1058static struct mlxsw_sp_port_mall_tc_entry *
1059mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port,
1060 unsigned long cookie) {
1061 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1062
1063 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list)
1064 if (mall_tc_entry->cookie == cookie)
1065 return mall_tc_entry;
1066
1067 return NULL;
1068}
1069
1070static int
1071mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port,
1072 struct tc_cls_matchall_offload *cls,
1073 const struct tc_action *a,
1074 bool ingress)
1075{
1076 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1077 struct net *net = dev_net(mlxsw_sp_port->dev);
1078 enum mlxsw_sp_span_type span_type;
1079 struct mlxsw_sp_port *to_port;
1080 struct net_device *to_dev;
1081 int ifindex;
1082 int err;
1083
1084 ifindex = tcf_mirred_ifindex(a);
1085 to_dev = __dev_get_by_index(net, ifindex);
1086 if (!to_dev) {
1087 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n");
1088 return -EINVAL;
1089 }
1090
1091 if (!mlxsw_sp_port_dev_check(to_dev)) {
1092 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port");
1093 return -ENOTSUPP;
1094 }
1095 to_port = netdev_priv(to_dev);
1096
1097 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL);
1098 if (!mall_tc_entry)
1099 return -ENOMEM;
1100
1101 mall_tc_entry->cookie = cls->cookie;
1102 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR;
1103 mall_tc_entry->mirror.to_local_port = to_port->local_port;
1104 mall_tc_entry->mirror.ingress = ingress;
1105 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list);
1106
1107 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1108 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type);
1109 if (err)
1110 goto err_mirror_add;
1111 return 0;
1112
1113err_mirror_add:
1114 list_del(&mall_tc_entry->list);
1115 kfree(mall_tc_entry);
1116 return err;
1117}
1118
1119static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1120 __be16 protocol,
1121 struct tc_cls_matchall_offload *cls,
1122 bool ingress)
1123{
763b4b70 1124 const struct tc_action *a;
22dc13c8 1125 LIST_HEAD(actions);
763b4b70
YG		 1126 int err;
1127
86cb13e4 1128 if (!tc_single_action(cls->exts)) {
763b4b70
YG		 1129 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n");
1130 return -ENOTSUPP;
1131 }
1132
22dc13c8
WC		 1133 tcf_exts_to_list(cls->exts, &actions);
1134 list_for_each_entry(a, &actions, list) {
86cb13e4
IS		 1135 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL))
1136 return -ENOTSUPP;
1137
763b4b70
YG		 1138 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls,
1139 a, ingress);
1140 if (err)
1141 return err;
763b4b70
YG		 1142 }
1143
1144 return 0;
1145}
1146
1147static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port,
1148 struct tc_cls_matchall_offload *cls)
1149{
1150 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1151 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry;
1152 enum mlxsw_sp_span_type span_type;
1153 struct mlxsw_sp_port *to_port;
1154
1155 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port,
1156 cls->cookie);
1157 if (!mall_tc_entry) {
1158 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n");
1159 return;
1160 }
1161
1162 switch (mall_tc_entry->type) {
1163 case MLXSW_SP_PORT_MALL_MIRROR:
1164 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port];
1165 span_type = mall_tc_entry->mirror.ingress ?
1166 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS;
1167
1168 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type);
1169 break;
1170 default:
1171 WARN_ON(1);
1172 }
1173
1174 list_del(&mall_tc_entry->list);
1175 kfree(mall_tc_entry);
1176}
1177
1178static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle,
1179 __be16 proto, struct tc_to_netdev *tc)
1180{
1181 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1182 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS);
1183
1184 if (tc->type == TC_SETUP_MATCHALL) {
1185 switch (tc->cls_mall->command) {
1186 case TC_CLSMATCHALL_REPLACE:
1187 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port,
1188 proto,
1189 tc->cls_mall,
1190 ingress);
1191 case TC_CLSMATCHALL_DESTROY:
1192 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port,
1193 tc->cls_mall);
1194 return 0;
1195 default:
1196 return -EINVAL;
1197 }
1198 }
1199
1200 return -ENOTSUPP;
1201}
1202
56ade8fe
JP		 1203static const struct net_device_ops mlxsw_sp_port_netdev_ops = {
1204 .ndo_open = mlxsw_sp_port_open,
1205 .ndo_stop = mlxsw_sp_port_stop,
1206 .ndo_start_xmit = mlxsw_sp_port_xmit,
763b4b70 1207 .ndo_setup_tc = mlxsw_sp_setup_tc,
c5b9b518 1208 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode,
56ade8fe
JP		 1209 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address,
1210 .ndo_change_mtu = mlxsw_sp_port_change_mtu,
1211 .ndo_get_stats64 = mlxsw_sp_port_get_stats64,
1212 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid,
1213 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid,
6cf3c971
JP		 1214 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct,
1215 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy,
56ade8fe
JP		 1216 .ndo_fdb_add = switchdev_port_fdb_add,
1217 .ndo_fdb_del = switchdev_port_fdb_del,
1218 .ndo_fdb_dump = switchdev_port_fdb_dump,
1219 .ndo_bridge_setlink = switchdev_port_bridge_setlink,
1220 .ndo_bridge_getlink = switchdev_port_bridge_getlink,
1221 .ndo_bridge_dellink = switchdev_port_bridge_dellink,
2bf9a586 1222 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name,
56ade8fe
JP		 1223};
1224
1225static void mlxsw_sp_port_get_drvinfo(struct net_device *dev,
1226 struct ethtool_drvinfo *drvinfo)
1227{
1228 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1229 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1230
1231 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver));
1232 strlcpy(drvinfo->version, mlxsw_sp_driver_version,
1233 sizeof(drvinfo->version));
1234 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
1235 "%d.%d.%d",
1236 mlxsw_sp->bus_info->fw_rev.major,
1237 mlxsw_sp->bus_info->fw_rev.minor,
1238 mlxsw_sp->bus_info->fw_rev.subminor);
1239 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name,
1240 sizeof(drvinfo->bus_info));
1241}
1242
9f7ec052
IS		 1243static void mlxsw_sp_port_get_pauseparam(struct net_device *dev,
1244 struct ethtool_pauseparam *pause)
1245{
1246 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1247
1248 pause->rx_pause = mlxsw_sp_port->link.rx_pause;
1249 pause->tx_pause = mlxsw_sp_port->link.tx_pause;
1250}
1251
1252static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port,
1253 struct ethtool_pauseparam *pause)
1254{
1255 char pfcc_pl[MLXSW_REG_PFCC_LEN];
1256
1257 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port);
1258 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause);
1259 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause);
1260
1261 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc),
1262 pfcc_pl);
1263}
1264
1265static int mlxsw_sp_port_set_pauseparam(struct net_device *dev,
1266 struct ethtool_pauseparam *pause)
1267{
1268 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1269 bool pause_en = pause->tx_pause || pause->rx_pause;
1270 int err;
1271
d81a6bdb
IS		 1272 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) {
1273 netdev_err(dev, "PFC already enabled on port\n");
1274 return -EINVAL;
1275 }
1276
9f7ec052
IS		 1277 if (pause->autoneg) {
1278 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n");
1279 return -EINVAL;
1280 }
1281
1282 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1283 if (err) {
1284 netdev_err(dev, "Failed to configure port's headroom\n");
1285 return err;
1286 }
1287
1288 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause);
1289 if (err) {
1290 netdev_err(dev, "Failed to set PAUSE parameters\n");
1291 goto err_port_pause_configure;
1292 }
1293
1294 mlxsw_sp_port->link.rx_pause = pause->rx_pause;
1295 mlxsw_sp_port->link.tx_pause = pause->tx_pause;
1296
1297 return 0;
1298
1299err_port_pause_configure:
1300 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port);
1301 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en);
1302 return err;
1303}
1304
56ade8fe
JP		 1305struct mlxsw_sp_port_hw_stats {
1306 char str[ETH_GSTRING_LEN];
1307 u64 (*getter)(char *payload);
1308};
1309
7ed674bc 1310static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = {
56ade8fe
JP		 1311 {
1312 .str = "a_frames_transmitted_ok",
1313 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get,
1314 },
1315 {
1316 .str = "a_frames_received_ok",
1317 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get,
1318 },
1319 {
1320 .str = "a_frame_check_sequence_errors",
1321 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get,
1322 },
1323 {
1324 .str = "a_alignment_errors",
1325 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get,
1326 },
1327 {
1328 .str = "a_octets_transmitted_ok",
1329 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get,
1330 },
1331 {
1332 .str = "a_octets_received_ok",
1333 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get,
1334 },
1335 {
1336 .str = "a_multicast_frames_xmitted_ok",
1337 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get,
1338 },
1339 {
1340 .str = "a_broadcast_frames_xmitted_ok",
1341 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get,
1342 },
1343 {
1344 .str = "a_multicast_frames_received_ok",
1345 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get,
1346 },
1347 {
1348 .str = "a_broadcast_frames_received_ok",
1349 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get,
1350 },
1351 {
1352 .str = "a_in_range_length_errors",
1353 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get,
1354 },
1355 {
1356 .str = "a_out_of_range_length_field",
1357 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get,
1358 },
1359 {
1360 .str = "a_frame_too_long_errors",
1361 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get,
1362 },
1363 {
1364 .str = "a_symbol_error_during_carrier",
1365 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get,
1366 },
1367 {
1368 .str = "a_mac_control_frames_transmitted",
1369 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get,
1370 },
1371 {
1372 .str = "a_mac_control_frames_received",
1373 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get,
1374 },
1375 {
1376 .str = "a_unsupported_opcodes_received",
1377 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get,
1378 },
1379 {
1380 .str = "a_pause_mac_ctrl_frames_received",
1381 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get,
1382 },
1383 {
1384 .str = "a_pause_mac_ctrl_frames_xmitted",
1385 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get,
1386 },
1387};
1388
1389#define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats)
1390
7ed674bc
IS		 1391static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = {
1392 {
1393 .str = "rx_octets_prio",
1394 .getter = mlxsw_reg_ppcnt_rx_octets_get,
1395 },
1396 {
1397 .str = "rx_frames_prio",
1398 .getter = mlxsw_reg_ppcnt_rx_frames_get,
1399 },
1400 {
1401 .str = "tx_octets_prio",
1402 .getter = mlxsw_reg_ppcnt_tx_octets_get,
1403 },
1404 {
1405 .str = "tx_frames_prio",
1406 .getter = mlxsw_reg_ppcnt_tx_frames_get,
1407 },
1408 {
1409 .str = "rx_pause_prio",
1410 .getter = mlxsw_reg_ppcnt_rx_pause_get,
1411 },
1412 {
1413 .str = "rx_pause_duration_prio",
1414 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get,
1415 },
1416 {
1417 .str = "tx_pause_prio",
1418 .getter = mlxsw_reg_ppcnt_tx_pause_get,
1419 },
1420 {
1421 .str = "tx_pause_duration_prio",
1422 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get,
1423 },
1424};
1425
1426#define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats)
1427
df4750e8
IS		 1428static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl)
1429{
1430 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl);
1431
1432 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue);
1433}
1434
1435static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = {
1436 {
1437 .str = "tc_transmit_queue_tc",
1438 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get,
1439 },
1440 {
1441 .str = "tc_no_buffer_discard_uc_tc",
1442 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get,
1443 },
1444};
1445
1446#define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats)
1447
7ed674bc 1448#define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \
df4750e8
IS		 1449 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \
1450 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \
7ed674bc
IS		 1451 IEEE_8021QAZ_MAX_TCS)
1452
1453static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio)
1454{
1455 int i;
1456
1457 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) {
1458 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1459 mlxsw_sp_port_hw_prio_stats[i].str, prio);
1460 *p += ETH_GSTRING_LEN;
1461 }
1462}
1463
df4750e8
IS		 1464static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc)
1465{
1466 int i;
1467
1468 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) {
1469 snprintf(*p, ETH_GSTRING_LEN, "%s_%d",
1470 mlxsw_sp_port_hw_tc_stats[i].str, tc);
1471 *p += ETH_GSTRING_LEN;
1472 }
1473}
1474
56ade8fe
JP		 1475static void mlxsw_sp_port_get_strings(struct net_device *dev,
1476 u32 stringset, u8 *data)
1477{
1478 u8 *p = data;
1479 int i;
1480
1481 switch (stringset) {
1482 case ETH_SS_STATS:
1483 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) {
1484 memcpy(p, mlxsw_sp_port_hw_stats[i].str,
1485 ETH_GSTRING_LEN);
1486 p += ETH_GSTRING_LEN;
1487 }
7ed674bc
IS		 1488
1489 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1490 mlxsw_sp_port_get_prio_strings(&p, i);
1491
df4750e8
IS		 1492 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
1493 mlxsw_sp_port_get_tc_strings(&p, i);
1494
56ade8fe
JP		 1495 break;
1496 }
1497}
1498
3a66ee38
IS		 1499static int mlxsw_sp_port_set_phys_id(struct net_device *dev,
1500 enum ethtool_phys_id_state state)
1501{
1502 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1503 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1504 char mlcr_pl[MLXSW_REG_MLCR_LEN];
1505 bool active;
1506
1507 switch (state) {
1508 case ETHTOOL_ID_ACTIVE:
1509 active = true;
1510 break;
1511 case ETHTOOL_ID_INACTIVE:
1512 active = false;
1513 break;
1514 default:
1515 return -EOPNOTSUPP;
1516 }
1517
1518 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active);
1519 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl);
1520}
1521
7ed674bc
IS		 1522static int
1523mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats,
1524 int *p_len, enum mlxsw_reg_ppcnt_grp grp)
1525{
1526 switch (grp) {
1527 case MLXSW_REG_PPCNT_IEEE_8023_CNT:
1528 *p_hw_stats = mlxsw_sp_port_hw_stats;
1529 *p_len = MLXSW_SP_PORT_HW_STATS_LEN;
1530 break;
1531 case MLXSW_REG_PPCNT_PRIO_CNT:
1532 *p_hw_stats = mlxsw_sp_port_hw_prio_stats;
1533 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1534 break;
df4750e8
IS		 1535 case MLXSW_REG_PPCNT_TC_CNT:
1536 *p_hw_stats = mlxsw_sp_port_hw_tc_stats;
1537 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN;
1538 break;
7ed674bc
IS		 1539 default:
1540 WARN_ON(1);
1541 return -ENOTSUPP;
1542 }
1543 return 0;
1544}
1545
1546static void __mlxsw_sp_port_get_stats(struct net_device *dev,
1547 enum mlxsw_reg_ppcnt_grp grp, int prio,
1548 u64 *data, int data_index)
56ade8fe
JP		 1549{
1550 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1551 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
7ed674bc 1552 struct mlxsw_sp_port_hw_stats *hw_stats;
56ade8fe 1553 char ppcnt_pl[MLXSW_REG_PPCNT_LEN];
7ed674bc 1554 int i, len;
56ade8fe
JP		 1555 int err;
1556
7ed674bc
IS		 1557 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp);
1558 if (err)
1559 return;
1560 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio);
56ade8fe 1561 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl);
7ed674bc
IS		 1562 for (i = 0; i < len; i++)
1563 data[data_index + i] = !err ? hw_stats[i].getter(ppcnt_pl) : 0;
1564}
1565
1566static void mlxsw_sp_port_get_stats(struct net_device *dev,
1567 struct ethtool_stats *stats, u64 *data)
1568{
1569 int i, data_index = 0;
1570
1571 /* IEEE 802.3 Counters */
1572 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0,
1573 data, data_index);
1574 data_index = MLXSW_SP_PORT_HW_STATS_LEN;
1575
1576 /* Per-Priority Counters */
1577 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1578 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i,
1579 data, data_index);
1580 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN;
1581 }
df4750e8
IS		 1582
1583 /* Per-TC Counters */
1584 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
1585 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i,
1586 data, data_index);
1587 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN;
1588 }
56ade8fe
JP		 1589}
1590
1591static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset)
1592{
1593 switch (sset) {
1594 case ETH_SS_STATS:
7ed674bc 1595 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN;
56ade8fe
JP		 1596 default:
1597 return -EOPNOTSUPP;
1598 }
1599}
1600
1601struct mlxsw_sp_port_link_mode {
1602 u32 mask;
1603 u32 supported;
1604 u32 advertised;
1605 u32 speed;
1606};
1607
1608static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = {
1609 {
1610 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T,
1611 .supported = SUPPORTED_100baseT_Full,
1612 .advertised = ADVERTISED_100baseT_Full,
1613 .speed = 100,
1614 },
1615 {
1616 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_TX,
1617 .speed = 100,
1618 },
1619 {
1620 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII |
1621 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX,
1622 .supported = SUPPORTED_1000baseKX_Full,
1623 .advertised = ADVERTISED_1000baseKX_Full,
1624 .speed = 1000,
1625 },
1626 {
1627 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T,
1628 .supported = SUPPORTED_10000baseT_Full,
1629 .advertised = ADVERTISED_10000baseT_Full,
1630 .speed = 10000,
1631 },
1632 {
1633 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 |
1634 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4,
1635 .supported = SUPPORTED_10000baseKX4_Full,
1636 .advertised = ADVERTISED_10000baseKX4_Full,
1637 .speed = 10000,
1638 },
1639 {
1640 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1641 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1642 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1643 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR,
1644 .supported = SUPPORTED_10000baseKR_Full,
1645 .advertised = ADVERTISED_10000baseKR_Full,
1646 .speed = 10000,
1647 },
1648 {
1649 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2,
1650 .supported = SUPPORTED_20000baseKR2_Full,
1651 .advertised = ADVERTISED_20000baseKR2_Full,
1652 .speed = 20000,
1653 },
1654 {
1655 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4,
1656 .supported = SUPPORTED_40000baseCR4_Full,
1657 .advertised = ADVERTISED_40000baseCR4_Full,
1658 .speed = 40000,
1659 },
1660 {
1661 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4,
1662 .supported = SUPPORTED_40000baseKR4_Full,
1663 .advertised = ADVERTISED_40000baseKR4_Full,
1664 .speed = 40000,
1665 },
1666 {
1667 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4,
1668 .supported = SUPPORTED_40000baseSR4_Full,
1669 .advertised = ADVERTISED_40000baseSR4_Full,
1670 .speed = 40000,
1671 },
1672 {
1673 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4,
1674 .supported = SUPPORTED_40000baseLR4_Full,
1675 .advertised = ADVERTISED_40000baseLR4_Full,
1676 .speed = 40000,
1677 },
1678 {
1679 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR |
1680 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR |
1681 MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR,
1682 .speed = 25000,
1683 },
1684 {
1685 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR4 |
1686 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2 |
1687 MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2,
1688 .speed = 50000,
1689 },
1690 {
1691 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4,
1692 .supported = SUPPORTED_56000baseKR4_Full,
1693 .advertised = ADVERTISED_56000baseKR4_Full,
1694 .speed = 56000,
1695 },
1696 {
1697 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4 |
1698 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1699 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1700 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4,
1701 .speed = 100000,
1702 },
1703};
1704
1705#define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode)
1706
1707static u32 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto)
1708{
1709 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1710 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1711 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1712 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1713 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1714 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1715 return SUPPORTED_FIBRE;
1716
1717 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1718 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1719 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1720 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 |
1721 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX))
1722 return SUPPORTED_Backplane;
1723 return 0;
1724}
1725
1726static u32 mlxsw_sp_from_ptys_supported_link(u32 ptys_eth_proto)
1727{
1728 u32 modes = 0;
1729 int i;
1730
1731 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1732 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1733 modes |= mlxsw_sp_port_link_mode[i].supported;
1734 }
1735 return modes;
1736}
1737
1738static u32 mlxsw_sp_from_ptys_advert_link(u32 ptys_eth_proto)
1739{
1740 u32 modes = 0;
1741 int i;
1742
1743 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1744 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask)
1745 modes |= mlxsw_sp_port_link_mode[i].advertised;
1746 }
1747 return modes;
1748}
1749
1750static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto,
1751 struct ethtool_cmd *cmd)
1752{
1753 u32 speed = SPEED_UNKNOWN;
1754 u8 duplex = DUPLEX_UNKNOWN;
1755 int i;
1756
1757 if (!carrier_ok)
1758 goto out;
1759
1760 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1761 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) {
1762 speed = mlxsw_sp_port_link_mode[i].speed;
1763 duplex = DUPLEX_FULL;
1764 break;
1765 }
1766 }
1767out:
1768 ethtool_cmd_speed_set(cmd, speed);
1769 cmd->duplex = duplex;
1770}
1771
1772static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto)
1773{
1774 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR |
1775 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 |
1776 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 |
1777 MLXSW_REG_PTYS_ETH_SPEED_SGMII))
1778 return PORT_FIBRE;
1779
1780 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR |
1781 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 |
1782 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4))
1783 return PORT_DA;
1784
1785 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR |
1786 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 |
1787 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 |
1788 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4))
1789 return PORT_NONE;
1790
1791 return PORT_OTHER;
1792}
1793
1794static int mlxsw_sp_port_get_settings(struct net_device *dev,
1795 struct ethtool_cmd *cmd)
1796{
1797 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1798 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1799 char ptys_pl[MLXSW_REG_PTYS_LEN];
1800 u32 eth_proto_cap;
1801 u32 eth_proto_admin;
1802 u32 eth_proto_oper;
1803 int err;
1804
1805 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1806 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1807 if (err) {
1808 netdev_err(dev, "Failed to get proto");
1809 return err;
1810 }
1811 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap,
1812 &eth_proto_admin, &eth_proto_oper);
1813
1814 cmd->supported = mlxsw_sp_from_ptys_supported_port(eth_proto_cap) |
1815 mlxsw_sp_from_ptys_supported_link(eth_proto_cap) |
c3f15768
IS		 1816 SUPPORTED_Pause | SUPPORTED_Asym_Pause |
1817 SUPPORTED_Autoneg;
56ade8fe
JP		 1818 cmd->advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_admin);
1819 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev),
1820 eth_proto_oper, cmd);
1821
1822 eth_proto_oper = eth_proto_oper ? eth_proto_oper : eth_proto_cap;
1823 cmd->port = mlxsw_sp_port_connector_port(eth_proto_oper);
1824 cmd->lp_advertising = mlxsw_sp_from_ptys_advert_link(eth_proto_oper);
1825
1826 cmd->transceiver = XCVR_INTERNAL;
1827 return 0;
1828}
1829
1830static u32 mlxsw_sp_to_ptys_advert_link(u32 advertising)
1831{
1832 u32 ptys_proto = 0;
1833 int i;
1834
1835 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1836 if (advertising & mlxsw_sp_port_link_mode[i].advertised)
1837 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1838 }
1839 return ptys_proto;
1840}
1841
1842static u32 mlxsw_sp_to_ptys_speed(u32 speed)
1843{
1844 u32 ptys_proto = 0;
1845 int i;
1846
1847 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1848 if (speed == mlxsw_sp_port_link_mode[i].speed)
1849 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1850 }
1851 return ptys_proto;
1852}
1853
18f1e70c
IS		 1854static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed)
1855{
1856 u32 ptys_proto = 0;
1857 int i;
1858
1859 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) {
1860 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed)
1861 ptys_proto |= mlxsw_sp_port_link_mode[i].mask;
1862 }
1863 return ptys_proto;
1864}
1865
56ade8fe
JP		 1866static int mlxsw_sp_port_set_settings(struct net_device *dev,
1867 struct ethtool_cmd *cmd)
1868{
1869 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1870 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1871 char ptys_pl[MLXSW_REG_PTYS_LEN];
1872 u32 speed;
1873 u32 eth_proto_new;
1874 u32 eth_proto_cap;
1875 u32 eth_proto_admin;
56ade8fe
JP		 1876 int err;
1877
1878 speed = ethtool_cmd_speed(cmd);
1879
1880 eth_proto_new = cmd->autoneg == AUTONEG_ENABLE ?
1881 mlxsw_sp_to_ptys_advert_link(cmd->advertising) :
1882 mlxsw_sp_to_ptys_speed(speed);
1883
1884 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0);
1885 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1886 if (err) {
1887 netdev_err(dev, "Failed to get proto");
1888 return err;
1889 }
1890 mlxsw_reg_ptys_unpack(ptys_pl, &eth_proto_cap, &eth_proto_admin, NULL);
1891
1892 eth_proto_new = eth_proto_new & eth_proto_cap;
1893 if (!eth_proto_new) {
1894 netdev_err(dev, "Not supported proto admin requested");
1895 return -EINVAL;
1896 }
1897 if (eth_proto_new == eth_proto_admin)
1898 return 0;
1899
1900 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new);
1901 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1902 if (err) {
1903 netdev_err(dev, "Failed to set proto admin");
1904 return err;
1905 }
1906
6277d46b 1907 if (!netif_running(dev))
56ade8fe
JP		 1908 return 0;
1909
1910 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
1911 if (err) {
1912 netdev_err(dev, "Failed to set admin status");
1913 return err;
1914 }
1915
1916 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true);
1917 if (err) {
1918 netdev_err(dev, "Failed to set admin status");
1919 return err;
1920 }
1921
1922 return 0;
1923}
1924
1925static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = {
1926 .get_drvinfo = mlxsw_sp_port_get_drvinfo,
1927 .get_link = ethtool_op_get_link,
9f7ec052
IS		 1928 .get_pauseparam = mlxsw_sp_port_get_pauseparam,
1929 .set_pauseparam = mlxsw_sp_port_set_pauseparam,
56ade8fe 1930 .get_strings = mlxsw_sp_port_get_strings,
3a66ee38 1931 .set_phys_id = mlxsw_sp_port_set_phys_id,
56ade8fe
JP		 1932 .get_ethtool_stats = mlxsw_sp_port_get_stats,
1933 .get_sset_count = mlxsw_sp_port_get_sset_count,
1934 .get_settings = mlxsw_sp_port_get_settings,
1935 .set_settings = mlxsw_sp_port_set_settings,
1936};
1937
18f1e70c
IS		 1938static int
1939mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width)
1940{
1941 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1942 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width;
1943 char ptys_pl[MLXSW_REG_PTYS_LEN];
1944 u32 eth_proto_admin;
1945
1946 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed);
1947 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port,
1948 eth_proto_admin);
1949 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl);
1950}
1951
8e8dfe9f
IS		 1952int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port,
1953 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index,
1954 bool dwrr, u8 dwrr_weight)
90183b98
IS		 1955{
1956 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1957 char qeec_pl[MLXSW_REG_QEEC_LEN];
1958
1959 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1960 next_index);
1961 mlxsw_reg_qeec_de_set(qeec_pl, true);
1962 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr);
1963 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight);
1964 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1965}
1966
cc7cf517
IS		 1967int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port,
1968 enum mlxsw_reg_qeec_hr hr, u8 index,
1969 u8 next_index, u32 maxrate)
90183b98
IS		 1970{
1971 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1972 char qeec_pl[MLXSW_REG_QEEC_LEN];
1973
1974 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index,
1975 next_index);
1976 mlxsw_reg_qeec_mase_set(qeec_pl, true);
1977 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate);
1978 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl);
1979}
1980
8e8dfe9f
IS		 1981int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port,
1982 u8 switch_prio, u8 tclass)
90183b98
IS		 1983{
1984 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1985 char qtct_pl[MLXSW_REG_QTCT_LEN];
1986
1987 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio,
1988 tclass);
1989 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl);
1990}
1991
1992static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port)
1993{
1994 int err, i;
1995
1996 /* Setup the elements hierarcy, so that each TC is linked to
1997 * one subgroup, which are all member in the same group.
1998 */
1999 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2000 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false,
2001 0);
2002 if (err)
2003 return err;
2004 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2005 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2006 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i,
2007 0, false, 0);
2008 if (err)
2009 return err;
2010 }
2011 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2012 err = mlxsw_sp_port_ets_set(mlxsw_sp_port,
2013 MLXSW_REG_QEEC_HIERARCY_TC, i, i,
2014 false, 0);
2015 if (err)
2016 return err;
2017 }
2018
2019 /* Make sure the max shaper is disabled in all hierarcies that
2020 * support it.
2021 */
2022 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2023 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0,
2024 MLXSW_REG_QEEC_MAS_DIS);
2025 if (err)
2026 return err;
2027 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2028 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2029 MLXSW_REG_QEEC_HIERARCY_SUBGROUP,
2030 i, 0,
2031 MLXSW_REG_QEEC_MAS_DIS);
2032 if (err)
2033 return err;
2034 }
2035 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2036 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port,
2037 MLXSW_REG_QEEC_HIERARCY_TC,
2038 i, i,
2039 MLXSW_REG_QEEC_MAS_DIS);
2040 if (err)
2041 return err;
2042 }
2043
2044 /* Map all priorities to traffic class 0. */
2045 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
2046 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0);
2047 if (err)
2048 return err;
2049 }
2050
2051 return 0;
2052}
2053
05978481
IS		 2054static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port)
2055{
2056 mlxsw_sp_port->pvid = 1;
2057
2058 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1);
2059}
2060
2061static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port)
2062{
2063 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1);
2064}
2065
be94535f 2066static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port,
d664b41e 2067 bool split, u8 module, u8 width, u8 lane)
56ade8fe
JP		 2068{
2069 struct mlxsw_sp_port *mlxsw_sp_port;
2070 struct net_device *dev;
bd40e9d6 2071 size_t bytes;
56ade8fe
JP		 2072 int err;
2073
2074 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port));
2075 if (!dev)
2076 return -ENOMEM;
2077 mlxsw_sp_port = netdev_priv(dev);
2078 mlxsw_sp_port->dev = dev;
2079 mlxsw_sp_port->mlxsw_sp = mlxsw_sp;
2080 mlxsw_sp_port->local_port = local_port;
18f1e70c 2081 mlxsw_sp_port->split = split;
d664b41e
IS		 2082 mlxsw_sp_port->mapping.module = module;
2083 mlxsw_sp_port->mapping.width = width;
2084 mlxsw_sp_port->mapping.lane = lane;
bd40e9d6
IS		 2085 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE);
2086 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL);
2087 if (!mlxsw_sp_port->active_vlans) {
2088 err = -ENOMEM;
2089 goto err_port_active_vlans_alloc;
2090 }
fc1273af
ER		 2091 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL);
2092 if (!mlxsw_sp_port->untagged_vlans) {
2093 err = -ENOMEM;
2094 goto err_port_untagged_vlans_alloc;
2095 }
7f71eb46 2096 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list);
763b4b70 2097 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list);
56ade8fe
JP		 2098
2099 mlxsw_sp_port->pcpu_stats =
2100 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats);
2101 if (!mlxsw_sp_port->pcpu_stats) {
2102 err = -ENOMEM;
2103 goto err_alloc_stats;
2104 }
2105
2106 dev->netdev_ops = &mlxsw_sp_port_netdev_ops;
2107 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops;
2108
3247ff2b
IS		 2109 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0);
2110 if (err) {
2111 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n",
2112 mlxsw_sp_port->local_port);
2113 goto err_port_swid_set;
2114 }
2115
56ade8fe
JP		 2116 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port);
2117 if (err) {
2118 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n",
2119 mlxsw_sp_port->local_port);
2120 goto err_dev_addr_init;
2121 }
2122
2123 netif_carrier_off(dev);
2124
2125 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG |
763b4b70
YG		 2126 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC;
2127 dev->hw_features |= NETIF_F_HW_TC;
56ade8fe
JP		 2128
2129 /* Each packet needs to have a Tx header (metadata) on top all other
2130 * headers.
2131 */
2132 dev->hard_header_len += MLXSW_TXHDR_LEN;
2133
56ade8fe
JP		 2134 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port);
2135 if (err) {
2136 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n",
2137 mlxsw_sp_port->local_port);
2138 goto err_port_system_port_mapping_set;
2139 }
2140
18f1e70c
IS		 2141 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width);
2142 if (err) {
2143 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n",
2144 mlxsw_sp_port->local_port);
2145 goto err_port_speed_by_width_set;
2146 }
2147
56ade8fe
JP		 2148 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN);
2149 if (err) {
2150 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n",
2151 mlxsw_sp_port->local_port);
2152 goto err_port_mtu_set;
2153 }
2154
2155 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false);
2156 if (err)
2157 goto err_port_admin_status_set;
2158
2159 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port);
2160 if (err) {
2161 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n",
2162 mlxsw_sp_port->local_port);
2163 goto err_port_buffers_init;
2164 }
2165
90183b98
IS		 2166 err = mlxsw_sp_port_ets_init(mlxsw_sp_port);
2167 if (err) {
2168 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n",
2169 mlxsw_sp_port->local_port);
2170 goto err_port_ets_init;
2171 }
2172
f00817df
IS		 2173 /* ETS and buffers must be initialized before DCB. */
2174 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port);
2175 if (err) {
2176 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n",
2177 mlxsw_sp_port->local_port);
2178 goto err_port_dcb_init;
2179 }
2180
05978481
IS		 2181 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port);
2182 if (err) {
2183 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n",
2184 mlxsw_sp_port->local_port);
2185 goto err_port_pvid_vport_create;
2186 }
2187
56ade8fe 2188 mlxsw_sp_port_switchdev_init(mlxsw_sp_port);
2f25844c 2189 mlxsw_sp->ports[local_port] = mlxsw_sp_port;
56ade8fe
JP		 2190 err = register_netdev(dev);
2191 if (err) {
2192 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n",
2193 mlxsw_sp_port->local_port);
2194 goto err_register_netdev;
2195 }
2196
932762b6
JP		 2197 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port,
2198 mlxsw_sp_port->local_port, dev,
2199 mlxsw_sp_port->split, module);
2200 if (err) {
2201 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n",
2202 mlxsw_sp_port->local_port);
2203 goto err_core_port_init;
2204 }
c4745500 2205
56ade8fe
JP		 2206 return 0;
2207
932762b6 2208err_core_port_init:
56ade8fe
JP		 2209 unregister_netdev(dev);
2210err_register_netdev:
2f25844c 2211 mlxsw_sp->ports[local_port] = NULL;
0583272d 2212 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
05978481
IS		 2213 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
2214err_port_pvid_vport_create:
4de34eb5 2215 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
f00817df 2216err_port_dcb_init:
90183b98 2217err_port_ets_init:
56ade8fe
JP		 2218err_port_buffers_init:
2219err_port_admin_status_set:
2220err_port_mtu_set:
18f1e70c 2221err_port_speed_by_width_set:
56ade8fe 2222err_port_system_port_mapping_set:
56ade8fe 2223err_dev_addr_init:
3247ff2b
IS		 2224 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2225err_port_swid_set:
56ade8fe
JP		 2226 free_percpu(mlxsw_sp_port->pcpu_stats);
2227err_alloc_stats:
fc1273af
ER		 2228 kfree(mlxsw_sp_port->untagged_vlans);
2229err_port_untagged_vlans_alloc:
bd40e9d6
IS		 2230 kfree(mlxsw_sp_port->active_vlans);
2231err_port_active_vlans_alloc:
56ade8fe
JP		 2232 free_netdev(dev);
2233 return err;
2234}
2235
56ade8fe
JP		 2236static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port)
2237{
2238 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2239
2240 if (!mlxsw_sp_port)
2241 return;
932762b6 2242 mlxsw_core_port_fini(&mlxsw_sp_port->core_port);
56ade8fe 2243 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */
2f25844c 2244 mlxsw_sp->ports[local_port] = NULL;
0583272d 2245 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port);
05978481 2246 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port);
f00817df 2247 mlxsw_sp_port_dcb_fini(mlxsw_sp_port);
3e9b27b8
IS		 2248 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT);
2249 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port);
56ade8fe 2250 free_percpu(mlxsw_sp_port->pcpu_stats);
fc1273af 2251 kfree(mlxsw_sp_port->untagged_vlans);
bd40e9d6 2252 kfree(mlxsw_sp_port->active_vlans);
32d863fb 2253 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list));
56ade8fe
JP		 2254 free_netdev(mlxsw_sp_port->dev);
2255}
2256
2257static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp)
2258{
2259 int i;
2260
2261 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
2262 mlxsw_sp_port_remove(mlxsw_sp, i);
2263 kfree(mlxsw_sp->ports);
2264}
2265
2266static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp)
2267{
d664b41e 2268 u8 module, width, lane;
56ade8fe
JP		 2269 size_t alloc_size;
2270 int i;
2271 int err;
2272
2273 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS;
2274 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL);
2275 if (!mlxsw_sp->ports)
2276 return -ENOMEM;
2277
2278 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) {
558c2d5e 2279 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module,
d664b41e 2280 &width, &lane);
558c2d5e
IS		 2281 if (err)
2282 goto err_port_module_info_get;
2283 if (!width)
2284 continue;
2285 mlxsw_sp->port_to_module[i] = module;
d664b41e
IS		 2286 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width,
2287 lane);
56ade8fe
JP		 2288 if (err)
2289 goto err_port_create;
2290 }
2291 return 0;
2292
2293err_port_create:
558c2d5e 2294err_port_module_info_get:
56ade8fe
JP		 2295 for (i--; i >= 1; i--)
2296 mlxsw_sp_port_remove(mlxsw_sp, i);
2297 kfree(mlxsw_sp->ports);
2298 return err;
2299}
2300
18f1e70c
IS		 2301static u8 mlxsw_sp_cluster_base_port_get(u8 local_port)
2302{
2303 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX;
2304
2305 return local_port - offset;
2306}
2307
be94535f
IS		 2308static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port,
2309 u8 module, unsigned int count)
2310{
2311 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count;
2312 int err, i;
2313
2314 for (i = 0; i < count; i++) {
2315 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module,
2316 width, i * width);
2317 if (err)
2318 goto err_port_module_map;
2319 }
2320
2321 for (i = 0; i < count; i++) {
2322 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0);
2323 if (err)
2324 goto err_port_swid_set;
2325 }
2326
2327 for (i = 0; i < count; i++) {
2328 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true,
d664b41e 2329 module, width, i * width);
be94535f
IS		 2330 if (err)
2331 goto err_port_create;
2332 }
2333
2334 return 0;
2335
2336err_port_create:
2337 for (i--; i >= 0; i--)
2338 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2339 i = count;
2340err_port_swid_set:
2341 for (i--; i >= 0; i--)
2342 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i,
2343 MLXSW_PORT_SWID_DISABLED_PORT);
2344 i = count;
2345err_port_module_map:
2346 for (i--; i >= 0; i--)
2347 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i);
2348 return err;
2349}
2350
2351static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp,
2352 u8 base_port, unsigned int count)
2353{
2354 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH;
2355 int i;
2356
2357 /* Split by four means we need to re-create two ports, otherwise
2358 * only one.
2359 */
2360 count = count / 2;
2361
2362 for (i = 0; i < count; i++) {
2363 local_port = base_port + i * 2;
2364 module = mlxsw_sp->port_to_module[local_port];
2365
2366 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width,
2367 0);
2368 }
2369
2370 for (i = 0; i < count; i++)
2371 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0);
2372
2373 for (i = 0; i < count; i++) {
2374 local_port = base_port + i * 2;
2375 module = mlxsw_sp->port_to_module[local_port];
2376
2377 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module,
d664b41e 2378 width, 0);
be94535f
IS		 2379 }
2380}
2381
b2f10571
JP		 2382static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port,
2383 unsigned int count)
18f1e70c 2384{
b2f10571 2385 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
18f1e70c 2386 struct mlxsw_sp_port *mlxsw_sp_port;
18f1e70c
IS		 2387 u8 module, cur_width, base_port;
2388 int i;
2389 int err;
2390
2391 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2392 if (!mlxsw_sp_port) {
2393 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2394 local_port);
2395 return -EINVAL;
2396 }
2397
d664b41e
IS		 2398 module = mlxsw_sp_port->mapping.module;
2399 cur_width = mlxsw_sp_port->mapping.width;
2400
18f1e70c
IS		 2401 if (count != 2 && count != 4) {
2402 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n");
2403 return -EINVAL;
2404 }
2405
18f1e70c
IS		 2406 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) {
2407 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n");
2408 return -EINVAL;
2409 }
2410
2411 /* Make sure we have enough slave (even) ports for the split. */
2412 if (count == 2) {
2413 base_port = local_port;
2414 if (mlxsw_sp->ports[base_port + 1]) {
2415 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2416 return -EINVAL;
2417 }
2418 } else {
2419 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2420 if (mlxsw_sp->ports[base_port + 1] ||
2421 mlxsw_sp->ports[base_port + 3]) {
2422 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n");
2423 return -EINVAL;
2424 }
2425 }
2426
2427 for (i = 0; i < count; i++)
2428 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2429
be94535f
IS		 2430 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count);
2431 if (err) {
2432 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n");
2433 goto err_port_split_create;
18f1e70c
IS		 2434 }
2435
2436 return 0;
2437
be94535f
IS		 2438err_port_split_create:
2439 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
18f1e70c
IS		 2440 return err;
2441}
2442
b2f10571 2443static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port)
18f1e70c 2444{
b2f10571 2445 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
18f1e70c 2446 struct mlxsw_sp_port *mlxsw_sp_port;
d664b41e 2447 u8 cur_width, base_port;
18f1e70c
IS		 2448 unsigned int count;
2449 int i;
18f1e70c
IS		 2450
2451 mlxsw_sp_port = mlxsw_sp->ports[local_port];
2452 if (!mlxsw_sp_port) {
2453 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n",
2454 local_port);
2455 return -EINVAL;
2456 }
2457
2458 if (!mlxsw_sp_port->split) {
2459 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n");
2460 return -EINVAL;
2461 }
2462
d664b41e 2463 cur_width = mlxsw_sp_port->mapping.width;
18f1e70c
IS		 2464 count = cur_width == 1 ? 4 : 2;
2465
2466 base_port = mlxsw_sp_cluster_base_port_get(local_port);
2467
2468 /* Determine which ports to remove. */
2469 if (count == 2 && local_port >= base_port + 2)
2470 base_port = base_port + 2;
2471
2472 for (i = 0; i < count; i++)
2473 mlxsw_sp_port_remove(mlxsw_sp, base_port + i);
2474
be94535f 2475 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count);
18f1e70c
IS		 2476
2477 return 0;
2478}
2479
56ade8fe
JP		 2480static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg,
2481 char *pude_pl, void *priv)
2482{
2483 struct mlxsw_sp *mlxsw_sp = priv;
2484 struct mlxsw_sp_port *mlxsw_sp_port;
2485 enum mlxsw_reg_pude_oper_status status;
2486 u8 local_port;
2487
2488 local_port = mlxsw_reg_pude_local_port_get(pude_pl);
2489 mlxsw_sp_port = mlxsw_sp->ports[local_port];
bbf2a475 2490 if (!mlxsw_sp_port)
56ade8fe 2491 return;
56ade8fe
JP		 2492
2493 status = mlxsw_reg_pude_oper_status_get(pude_pl);
2494 if (status == MLXSW_PORT_OPER_STATUS_UP) {
2495 netdev_info(mlxsw_sp_port->dev, "link up\n");
2496 netif_carrier_on(mlxsw_sp_port->dev);
2497 } else {
2498 netdev_info(mlxsw_sp_port->dev, "link down\n");
2499 netif_carrier_off(mlxsw_sp_port->dev);
2500 }
2501}
2502
2503static struct mlxsw_event_listener mlxsw_sp_pude_event = {
2504 .func = mlxsw_sp_pude_event_func,
2505 .trap_id = MLXSW_TRAP_ID_PUDE,
2506};
2507
2508static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp,
2509 enum mlxsw_event_trap_id trap_id)
2510{
2511 struct mlxsw_event_listener *el;
2512 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2513 int err;
2514
2515 switch (trap_id) {
2516 case MLXSW_TRAP_ID_PUDE:
2517 el = &mlxsw_sp_pude_event;
2518 break;
2519 }
2520 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp);
2521 if (err)
2522 return err;
2523
2524 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id);
2525 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2526 if (err)
2527 goto err_event_trap_set;
2528
2529 return 0;
2530
2531err_event_trap_set:
2532 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2533 return err;
2534}
2535
2536static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp,
2537 enum mlxsw_event_trap_id trap_id)
2538{
2539 struct mlxsw_event_listener *el;
2540
2541 switch (trap_id) {
2542 case MLXSW_TRAP_ID_PUDE:
2543 el = &mlxsw_sp_pude_event;
2544 break;
2545 }
2546 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp);
2547}
2548
2549static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port,
2550 void *priv)
2551{
2552 struct mlxsw_sp *mlxsw_sp = priv;
2553 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port];
2554 struct mlxsw_sp_port_pcpu_stats *pcpu_stats;
2555
2556 if (unlikely(!mlxsw_sp_port)) {
2557 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n",
2558 local_port);
2559 return;
2560 }
2561
2562 skb->dev = mlxsw_sp_port->dev;
2563
2564 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats);
2565 u64_stats_update_begin(&pcpu_stats->syncp);
2566 pcpu_stats->rx_packets++;
2567 pcpu_stats->rx_bytes += skb->len;
2568 u64_stats_update_end(&pcpu_stats->syncp);
2569
2570 skb->protocol = eth_type_trans(skb, skb->dev);
2571 netif_receive_skb(skb);
2572}
2573
1c6c6d22
IS		 2574static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port,
2575 void *priv)
2576{
2577 skb->offload_fwd_mark = 1;
2578 return mlxsw_sp_rx_listener_func(skb, local_port, priv);
2579}
2580
63a81141
IS		 2581#define MLXSW_SP_RXL(_func, _trap_id, _action) \
2582 { \
2583 .func = _func, \
2584 .local_port = MLXSW_PORT_DONT_CARE, \
2585 .trap_id = MLXSW_TRAP_ID_##_trap_id, \
2586 .action = MLXSW_REG_HPKT_ACTION_##_action, \
93393b33
IS		 2587 }
2588
56ade8fe 2589static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = {
63a81141 2590 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU),
56ade8fe 2591 /* Traps for specific L2 packet types, not trapped as FDB MC */
63a81141
IS		 2592 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU),
2593 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU),
2594 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU),
2595 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU),
2596 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU),
2597 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU),
2598 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU),
1c6c6d22
IS		 2599 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU),
2600 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU),
63a81141
IS		 2601 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU),
2602 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU),
2603 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU),
2604 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU),
1c6c6d22
IS		 2605 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU),
2606 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU),
93393b33 2607 /* L3 traps */
63a81141
IS		 2608 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU),
2609 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU),
2610 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU),
1c6c6d22 2611 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU),
63a81141
IS		 2612 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU),
2613 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU),
2614 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU),
56ade8fe
JP		 2615};
2616
2617static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp)
2618{
2619 char htgt_pl[MLXSW_REG_HTGT_LEN];
2620 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2621 int i;
2622 int err;
2623
2624 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX);
2625 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2626 if (err)
2627 return err;
2628
2629 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL);
2630 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl);
2631 if (err)
2632 return err;
2633
2634 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
2635 err = mlxsw_core_rx_listener_register(mlxsw_sp->core,
2636 &mlxsw_sp_rx_listener[i],
2637 mlxsw_sp);
2638 if (err)
2639 goto err_rx_listener_register;
2640
63a81141 2641 mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action,
56ade8fe
JP		 2642 mlxsw_sp_rx_listener[i].trap_id);
2643 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2644 if (err)
2645 goto err_rx_trap_set;
2646 }
2647 return 0;
2648
2649err_rx_trap_set:
2650 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2651 &mlxsw_sp_rx_listener[i],
2652 mlxsw_sp);
2653err_rx_listener_register:
2654 for (i--; i >= 0; i--) {
10f00aa1 2655 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
56ade8fe
JP		 2656 mlxsw_sp_rx_listener[i].trap_id);
2657 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2658
2659 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2660 &mlxsw_sp_rx_listener[i],
2661 mlxsw_sp);
2662 }
2663 return err;
2664}
2665
2666static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp)
2667{
2668 char hpkt_pl[MLXSW_REG_HPKT_LEN];
2669 int i;
2670
2671 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) {
10f00aa1 2672 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD,
56ade8fe
JP		 2673 mlxsw_sp_rx_listener[i].trap_id);
2674 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl);
2675
2676 mlxsw_core_rx_listener_unregister(mlxsw_sp->core,
2677 &mlxsw_sp_rx_listener[i],
2678 mlxsw_sp);
2679 }
2680}
2681
2682static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core,
2683 enum mlxsw_reg_sfgc_type type,
2684 enum mlxsw_reg_sfgc_bridge_type bridge_type)
2685{
2686 enum mlxsw_flood_table_type table_type;
2687 enum mlxsw_sp_flood_table flood_table;
2688 char sfgc_pl[MLXSW_REG_SFGC_LEN];
2689
19ae6124 2690 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID)
56ade8fe 2691 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
19ae6124 2692 else
56ade8fe 2693 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
19ae6124
IS		 2694
2695 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST)
2696 flood_table = MLXSW_SP_FLOOD_TABLE_UC;
2697 else
2698 flood_table = MLXSW_SP_FLOOD_TABLE_BM;
56ade8fe
JP		 2699
2700 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type,
2701 flood_table);
2702 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl);
2703}
2704
2705static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp)
2706{
2707 int type, err;
2708
56ade8fe
JP		 2709 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) {
2710 if (type == MLXSW_REG_SFGC_TYPE_RESERVED)
2711 continue;
2712
2713 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2714 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID);
2715 if (err)
2716 return err;
56ade8fe
JP		 2717
2718 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type,
2719 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID);
2720 if (err)
2721 return err;
2722 }
2723
2724 return 0;
2725}
2726
0d65fc13
JP		 2727static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp)
2728{
2729 char slcr_pl[MLXSW_REG_SLCR_LEN];
2730
2731 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC |
2732 MLXSW_REG_SLCR_LAG_HASH_DMAC |
2733 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE |
2734 MLXSW_REG_SLCR_LAG_HASH_VLANID |
2735 MLXSW_REG_SLCR_LAG_HASH_SIP |
2736 MLXSW_REG_SLCR_LAG_HASH_DIP |
2737 MLXSW_REG_SLCR_LAG_HASH_SPORT |
2738 MLXSW_REG_SLCR_LAG_HASH_DPORT |
2739 MLXSW_REG_SLCR_LAG_HASH_IPPROTO);
2740 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl);
2741}
2742
b2f10571 2743static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core,
56ade8fe
JP		 2744 const struct mlxsw_bus_info *mlxsw_bus_info)
2745{
b2f10571 2746 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
56ade8fe
JP		 2747 int err;
2748
2749 mlxsw_sp->core = mlxsw_core;
2750 mlxsw_sp->bus_info = mlxsw_bus_info;
14d39461 2751 INIT_LIST_HEAD(&mlxsw_sp->fids);
3ba2ebf4 2752 INIT_LIST_HEAD(&mlxsw_sp->vfids.list);
3a49b4fd 2753 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list);
56ade8fe
JP		 2754
2755 err = mlxsw_sp_base_mac_get(mlxsw_sp);
2756 if (err) {
2757 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n");
2758 return err;
2759 }
2760
56ade8fe
JP		 2761 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
2762 if (err) {
2763 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n");
bbf2a475 2764 return err;
56ade8fe
JP		 2765 }
2766
2767 err = mlxsw_sp_traps_init(mlxsw_sp);
2768 if (err) {
2769 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n");
2770 goto err_rx_listener_register;
2771 }
2772
2773 err = mlxsw_sp_flood_init(mlxsw_sp);
2774 if (err) {
2775 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n");
2776 goto err_flood_init;
2777 }
2778
2779 err = mlxsw_sp_buffers_init(mlxsw_sp);
2780 if (err) {
2781 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n");
2782 goto err_buffers_init;
2783 }
2784
0d65fc13
JP		 2785 err = mlxsw_sp_lag_init(mlxsw_sp);
2786 if (err) {
2787 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n");
2788 goto err_lag_init;
2789 }
2790
56ade8fe
JP		 2791 err = mlxsw_sp_switchdev_init(mlxsw_sp);
2792 if (err) {
2793 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n");
2794 goto err_switchdev_init;
2795 }
2796
464dce18
IS		 2797 err = mlxsw_sp_router_init(mlxsw_sp);
2798 if (err) {
2799 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n");
2800 goto err_router_init;
2801 }
2802
763b4b70
YG		 2803 err = mlxsw_sp_span_init(mlxsw_sp);
2804 if (err) {
2805 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n");
2806 goto err_span_init;
2807 }
2808
bbf2a475
IS		 2809 err = mlxsw_sp_ports_create(mlxsw_sp);
2810 if (err) {
2811 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n");
2812 goto err_ports_create;
2813 }
2814
56ade8fe
JP		 2815 return 0;
2816
bbf2a475 2817err_ports_create:
763b4b70
YG		 2818 mlxsw_sp_span_fini(mlxsw_sp);
2819err_span_init:
464dce18
IS		 2820 mlxsw_sp_router_fini(mlxsw_sp);
2821err_router_init:
bbf2a475 2822 mlxsw_sp_switchdev_fini(mlxsw_sp);
56ade8fe 2823err_switchdev_init:
0d65fc13 2824err_lag_init:
0f433fa0 2825 mlxsw_sp_buffers_fini(mlxsw_sp);
56ade8fe
JP		 2826err_buffers_init:
2827err_flood_init:
2828 mlxsw_sp_traps_fini(mlxsw_sp);
2829err_rx_listener_register:
2830 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
56ade8fe
JP		 2831 return err;
2832}
2833
b2f10571 2834static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core)
56ade8fe 2835{
b2f10571 2836 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core);
fa3054f5 2837 int i;
56ade8fe 2838
bbf2a475 2839 mlxsw_sp_ports_remove(mlxsw_sp);
763b4b70 2840 mlxsw_sp_span_fini(mlxsw_sp);
464dce18 2841 mlxsw_sp_router_fini(mlxsw_sp);
56ade8fe 2842 mlxsw_sp_switchdev_fini(mlxsw_sp);
5113bfdb 2843 mlxsw_sp_buffers_fini(mlxsw_sp);
56ade8fe
JP		 2844 mlxsw_sp_traps_fini(mlxsw_sp);
2845 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE);
3ba2ebf4 2846 WARN_ON(!list_empty(&mlxsw_sp->vfids.list));
14d39461 2847 WARN_ON(!list_empty(&mlxsw_sp->fids));
fa3054f5
IS		 2848 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
2849 WARN_ON_ONCE(mlxsw_sp->rifs[i]);
56ade8fe
JP		 2850}
2851
2852static struct mlxsw_config_profile mlxsw_sp_config_profile = {
2853 .used_max_vepa_channels = 1,
2854 .max_vepa_channels = 0,
2855 .used_max_lag = 1,
0d65fc13 2856 .max_lag = MLXSW_SP_LAG_MAX,
56ade8fe 2857 .used_max_port_per_lag = 1,
0d65fc13 2858 .max_port_per_lag = MLXSW_SP_PORT_PER_LAG_MAX,
56ade8fe 2859 .used_max_mid = 1,
53ae6283 2860 .max_mid = MLXSW_SP_MID_MAX,
56ade8fe
JP		 2861 .used_max_pgt = 1,
2862 .max_pgt = 0,
2863 .used_max_system_port = 1,
2864 .max_system_port = 64,
2865 .used_max_vlan_groups = 1,
2866 .max_vlan_groups = 127,
2867 .used_max_regions = 1,
2868 .max_regions = 400,
2869 .used_flood_tables = 1,
2870 .used_flood_mode = 1,
2871 .flood_mode = 3,
2872 .max_fid_offset_flood_tables = 2,
2873 .fid_offset_flood_table_size = VLAN_N_VID - 1,
19ae6124
IS		 2874 .max_fid_flood_tables = 2,
2875 .fid_flood_table_size = MLXSW_SP_VFID_MAX,
56ade8fe
JP		 2876 .used_max_ib_mc = 1,
2877 .max_ib_mc = 0,
2878 .used_max_pkey = 1,
2879 .max_pkey = 0,
c6022427
JP		 2880 .used_kvd_sizes = 1,
2881 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE,
2882 .kvd_hash_single_size = MLXSW_SP_KVD_HASH_SINGLE_SIZE,
2883 .kvd_hash_double_size = MLXSW_SP_KVD_HASH_DOUBLE_SIZE,
56ade8fe
JP		 2884 .swid_config = {
2885 {
2886 .used_type = 1,
2887 .type = MLXSW_PORT_SWID_TYPE_ETH,
2888 }
2889 },
57d316ba 2890 .resource_query_enable = 1,
56ade8fe
JP		 2891};
2892
2893static struct mlxsw_driver mlxsw_sp_driver = {
2d0ed39f
JP		 2894 .kind = MLXSW_DEVICE_KIND_SPECTRUM,
2895 .owner = THIS_MODULE,
2896 .priv_size = sizeof(struct mlxsw_sp),
2897 .init = mlxsw_sp_init,
2898 .fini = mlxsw_sp_fini,
2899 .port_split = mlxsw_sp_port_split,
2900 .port_unsplit = mlxsw_sp_port_unsplit,
2901 .sb_pool_get = mlxsw_sp_sb_pool_get,
2902 .sb_pool_set = mlxsw_sp_sb_pool_set,
2903 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get,
2904 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set,
2905 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get,
2906 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set,
2907 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot,
2908 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear,
2909 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get,
2910 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get,
2911 .txhdr_construct = mlxsw_sp_txhdr_construct,
2912 .txhdr_len = MLXSW_TXHDR_LEN,
2913 .profile = &mlxsw_sp_config_profile,
56ade8fe
JP		 2914};
2915
7ce856aa
JP		 2916static bool mlxsw_sp_port_dev_check(const struct net_device *dev)
2917{
2918 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops;
2919}
2920
2921static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev)
2922{
2923 struct net_device *lower_dev;
2924 struct list_head *iter;
2925
2926 if (mlxsw_sp_port_dev_check(dev))
2927 return netdev_priv(dev);
2928
2929 netdev_for_each_all_lower_dev(dev, lower_dev, iter) {
2930 if (mlxsw_sp_port_dev_check(lower_dev))
2931 return netdev_priv(lower_dev);
2932 }
2933 return NULL;
2934}
2935
2936static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev)
2937{
2938 struct mlxsw_sp_port *mlxsw_sp_port;
2939
2940 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev);
2941 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL;
2942}
2943
2944static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev)
2945{
2946 struct net_device *lower_dev;
2947 struct list_head *iter;
2948
2949 if (mlxsw_sp_port_dev_check(dev))
2950 return netdev_priv(dev);
2951
2952 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) {
2953 if (mlxsw_sp_port_dev_check(lower_dev))
2954 return netdev_priv(lower_dev);
2955 }
2956 return NULL;
2957}
2958
2959struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev)
2960{
2961 struct mlxsw_sp_port *mlxsw_sp_port;
2962
2963 rcu_read_lock();
2964 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev);
2965 if (mlxsw_sp_port)
2966 dev_hold(mlxsw_sp_port->dev);
2967 rcu_read_unlock();
2968 return mlxsw_sp_port;
2969}
2970
2971void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port)
2972{
2973 dev_put(mlxsw_sp_port->dev);
2974}
2975
99724c18
IS		 2976static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r,
2977 unsigned long event)
2978{
2979 switch (event) {
2980 case NETDEV_UP:
2981 if (!r)
2982 return true;
2983 r->ref_count++;
2984 return false;
2985 case NETDEV_DOWN:
2986 if (r && --r->ref_count == 0)
2987 return true;
2988 /* It is possible we already removed the RIF ourselves
2989 * if it was assigned to a netdev that is now a bridge
2990 * or LAG slave.
2991 */
2992 return false;
2993 }
2994
2995 return false;
2996}
2997
2998static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp)
2999{
3000 int i;
3001
3002 for (i = 0; i < MLXSW_SP_RIF_MAX; i++)
3003 if (!mlxsw_sp->rifs[i])
3004 return i;
3005
3006 return MLXSW_SP_RIF_MAX;
3007}
3008
3009static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport,
3010 bool *p_lagged, u16 *p_system_port)
3011{
3012 u8 local_port = mlxsw_sp_vport->local_port;
3013
3014 *p_lagged = mlxsw_sp_vport->lagged;
3015 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port;
3016}
3017
3018static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport,
3019 struct net_device *l3_dev, u16 rif,
3020 bool create)
3021{
3022 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3023 bool lagged = mlxsw_sp_vport->lagged;
3024 char ritr_pl[MLXSW_REG_RITR_LEN];
3025 u16 system_port;
3026
3027 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif,
3028 l3_dev->mtu, l3_dev->dev_addr);
3029
3030 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port);
3031 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port,
3032 mlxsw_sp_vport_vid_get(mlxsw_sp_vport));
3033
3034 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3035}
3036
3037static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
3038
3039static struct mlxsw_sp_fid *
3040mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev)
3041{
3042 struct mlxsw_sp_fid *f;
3043
3044 f = kzalloc(sizeof(*f), GFP_KERNEL);
3045 if (!f)
3046 return NULL;
3047
3048 f->leave = mlxsw_sp_vport_rif_sp_leave;
3049 f->ref_count = 0;
3050 f->dev = l3_dev;
3051 f->fid = fid;
3052
3053 return f;
3054}
3055
3056static struct mlxsw_sp_rif *
3057mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f)
3058{
3059 struct mlxsw_sp_rif *r;
3060
3061 r = kzalloc(sizeof(*r), GFP_KERNEL);
3062 if (!r)
3063 return NULL;
3064
3065 ether_addr_copy(r->addr, l3_dev->dev_addr);
3066 r->mtu = l3_dev->mtu;
3067 r->ref_count = 1;
3068 r->dev = l3_dev;
3069 r->rif = rif;
3070 r->f = f;
3071
3072 return r;
3073}
3074
3075static struct mlxsw_sp_rif *
3076mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport,
3077 struct net_device *l3_dev)
3078{
3079 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3080 struct mlxsw_sp_fid *f;
3081 struct mlxsw_sp_rif *r;
3082 u16 fid, rif;
3083 int err;
3084
3085 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3086 if (rif == MLXSW_SP_RIF_MAX)
3087 return ERR_PTR(-ERANGE);
3088
3089 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true);
3090 if (err)
3091 return ERR_PTR(err);
3092
3093 fid = mlxsw_sp_rif_sp_to_fid(rif);
3094 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true);
3095 if (err)
3096 goto err_rif_fdb_op;
3097
3098 f = mlxsw_sp_rfid_alloc(fid, l3_dev);
3099 if (!f) {
3100 err = -ENOMEM;
3101 goto err_rfid_alloc;
3102 }
3103
3104 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3105 if (!r) {
3106 err = -ENOMEM;
3107 goto err_rif_alloc;
3108 }
3109
3110 f->r = r;
3111 mlxsw_sp->rifs[rif] = r;
3112
3113 return r;
3114
3115err_rif_alloc:
3116 kfree(f);
3117err_rfid_alloc:
3118 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3119err_rif_fdb_op:
3120 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3121 return ERR_PTR(err);
3122}
3123
3124static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport,
3125 struct mlxsw_sp_rif *r)
3126{
3127 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3128 struct net_device *l3_dev = r->dev;
3129 struct mlxsw_sp_fid *f = r->f;
3130 u16 fid = f->fid;
3131 u16 rif = r->rif;
3132
3133 mlxsw_sp->rifs[rif] = NULL;
3134 f->r = NULL;
3135
3136 kfree(r);
3137
3138 kfree(f);
3139
3140 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false);
3141
3142 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false);
3143}
3144
3145static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport,
3146 struct net_device *l3_dev)
3147{
3148 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp;
3149 struct mlxsw_sp_rif *r;
3150
3151 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev);
3152 if (!r) {
3153 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev);
3154 if (IS_ERR(r))
3155 return PTR_ERR(r);
3156 }
3157
3158 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f);
3159 r->f->ref_count++;
3160
3161 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid);
3162
3163 return 0;
3164}
3165
3166static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
3167{
3168 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3169
3170 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
3171
3172 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
3173 if (--f->ref_count == 0)
3174 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r);
3175}
3176
3177static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev,
3178 struct net_device *port_dev,
3179 unsigned long event, u16 vid)
3180{
3181 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev);
3182 struct mlxsw_sp_port *mlxsw_sp_vport;
3183
3184 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
3185 if (WARN_ON(!mlxsw_sp_vport))
3186 return -EINVAL;
3187
3188 switch (event) {
3189 case NETDEV_UP:
3190 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev);
3191 case NETDEV_DOWN:
3192 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport);
3193 break;
3194 }
3195
3196 return 0;
3197}
3198
3199static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev,
3200 unsigned long event)
3201{
3202 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev))
3203 return 0;
3204
3205 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1);
3206}
3207
3208static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev,
3209 struct net_device *lag_dev,
3210 unsigned long event, u16 vid)
3211{
3212 struct net_device *port_dev;
3213 struct list_head *iter;
3214 int err;
3215
3216 netdev_for_each_lower_dev(lag_dev, port_dev, iter) {
3217 if (mlxsw_sp_port_dev_check(port_dev)) {
3218 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev,
3219 event, vid);
3220 if (err)
3221 return err;
3222 }
3223 }
3224
3225 return 0;
3226}
3227
3228static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev,
3229 unsigned long event)
3230{
3231 if (netif_is_bridge_port(lag_dev))
3232 return 0;
3233
3234 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1);
3235}
3236
99f44bb3
IS		 3237static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp,
3238 struct net_device *l3_dev)
3239{
3240 u16 fid;
3241
3242 if (is_vlan_dev(l3_dev))
3243 fid = vlan_dev_vlan_id(l3_dev);
3244 else if (mlxsw_sp->master_bridge.dev == l3_dev)
3245 fid = 1;
3246 else
3247 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev);
3248
3249 return mlxsw_sp_fid_find(mlxsw_sp, fid);
3250}
3251
f888f587
IS		 3252static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid)
3253{
3254 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID :
3255 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
3256}
3257
3258static u16 mlxsw_sp_flood_table_index_get(u16 fid)
3259{
3260 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid;
3261}
3262
3263static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid,
3264 bool set)
3265{
3266 enum mlxsw_flood_table_type table_type;
3267 char *sftr_pl;
3268 u16 index;
3269 int err;
3270
3271 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
3272 if (!sftr_pl)
3273 return -ENOMEM;
3274
3275 table_type = mlxsw_sp_flood_table_type_get(fid);
3276 index = mlxsw_sp_flood_table_index_get(fid);
3277 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type,
3278 1, MLXSW_PORT_ROUTER_PORT, set);
3279 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
3280
3281 kfree(sftr_pl);
3282 return err;
3283}
3284
99f44bb3
IS		 3285static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid)
3286{
3287 if (mlxsw_sp_fid_is_vfid(fid))
3288 return MLXSW_REG_RITR_FID_IF;
3289 else
3290 return MLXSW_REG_RITR_VLAN_IF;
3291}
3292
3293static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp,
3294 struct net_device *l3_dev,
3295 u16 fid, u16 rif,
3296 bool create)
3297{
3298 enum mlxsw_reg_ritr_if_type rif_type;
3299 char ritr_pl[MLXSW_REG_RITR_LEN];
3300
3301 rif_type = mlxsw_sp_rif_type_get(fid);
3302 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu,
3303 l3_dev->dev_addr);
3304 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid);
3305
3306 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3307}
3308
3309static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp,
3310 struct net_device *l3_dev,
3311 struct mlxsw_sp_fid *f)
3312{
3313 struct mlxsw_sp_rif *r;
3314 u16 rif;
3315 int err;
3316
3317 rif = mlxsw_sp_avail_rif_get(mlxsw_sp);
3318 if (rif == MLXSW_SP_RIF_MAX)
3319 return -ERANGE;
3320
f888f587 3321 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true);
99f44bb3
IS		 3322 if (err)
3323 return err;
3324
f888f587
IS		 3325 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true);
3326 if (err)
3327 goto err_rif_bridge_op;
3328
99f44bb3
IS		 3329 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true);
3330 if (err)
3331 goto err_rif_fdb_op;
3332
3333 r = mlxsw_sp_rif_alloc(rif, l3_dev, f);
3334 if (!r) {
3335 err = -ENOMEM;
3336 goto err_rif_alloc;
3337 }
3338
3339 f->r = r;
3340 mlxsw_sp->rifs[rif] = r;
3341
3342 netdev_dbg(l3_dev, "RIF=%d created\n", rif);
3343
3344 return 0;
3345
3346err_rif_alloc:
3347 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3348err_rif_fdb_op:
3349 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
f888f587
IS		 3350err_rif_bridge_op:
3351 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
99f44bb3
IS		 3352 return err;
3353}
3354
3355void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp,
3356 struct mlxsw_sp_rif *r)
3357{
3358 struct net_device *l3_dev = r->dev;
3359 struct mlxsw_sp_fid *f = r->f;
3360 u16 rif = r->rif;
3361
3362 mlxsw_sp->rifs[rif] = NULL;
3363 f->r = NULL;
3364
3365 kfree(r);
3366
3367 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false);
3368
3369 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false);
3370
f888f587
IS		 3371 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false);
3372
99f44bb3
IS		 3373 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif);
3374}
3375
3376static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev,
3377 struct net_device *br_dev,
3378 unsigned long event)
3379{
3380 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev);
3381 struct mlxsw_sp_fid *f;
3382
3383 /* FID can either be an actual FID if the L3 device is the
3384 * VLAN-aware bridge or a VLAN device on top. Otherwise, the
3385 * L3 device is a VLAN-unaware bridge and we get a vFID.
3386 */
3387 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev);
3388 if (WARN_ON(!f))
3389 return -EINVAL;
3390
3391 switch (event) {
3392 case NETDEV_UP:
3393 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f);
3394 case NETDEV_DOWN:
3395 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
3396 break;
3397 }
3398
3399 return 0;
3400}
3401
99724c18
IS		 3402static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev,
3403 unsigned long event)
3404{
3405 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
99f44bb3 3406 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev);
99724c18
IS		 3407 u16 vid = vlan_dev_vlan_id(vlan_dev);
3408
3409 if (mlxsw_sp_port_dev_check(real_dev))
3410 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event,
3411 vid);
3412 else if (netif_is_lag_master(real_dev))
3413 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event,
3414 vid);
99f44bb3
IS		 3415 else if (netif_is_bridge_master(real_dev) &&
3416 mlxsw_sp->master_bridge.dev == real_dev)
3417 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev,
3418 event);
99724c18
IS		 3419
3420 return 0;
3421}
3422
3423static int mlxsw_sp_inetaddr_event(struct notifier_block *unused,
3424 unsigned long event, void *ptr)
3425{
3426 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
3427 struct net_device *dev = ifa->ifa_dev->dev;
3428 struct mlxsw_sp *mlxsw_sp;
3429 struct mlxsw_sp_rif *r;
3430 int err = 0;
3431
3432 mlxsw_sp = mlxsw_sp_lower_get(dev);
3433 if (!mlxsw_sp)
3434 goto out;
3435
3436 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3437 if (!mlxsw_sp_rif_should_config(r, event))
3438 goto out;
3439
3440 if (mlxsw_sp_port_dev_check(dev))
3441 err = mlxsw_sp_inetaddr_port_event(dev, event);
3442 else if (netif_is_lag_master(dev))
3443 err = mlxsw_sp_inetaddr_lag_event(dev, event);
99f44bb3
IS		 3444 else if (netif_is_bridge_master(dev))
3445 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event);
99724c18
IS		 3446 else if (is_vlan_dev(dev))
3447 err = mlxsw_sp_inetaddr_vlan_event(dev, event);
3448
3449out:
3450 return notifier_from_errno(err);
3451}
3452
6e095fd4
IS		 3453static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif,
3454 const char *mac, int mtu)
3455{
3456 char ritr_pl[MLXSW_REG_RITR_LEN];
3457 int err;
3458
3459 mlxsw_reg_ritr_rif_pack(ritr_pl, rif);
3460 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3461 if (err)
3462 return err;
3463
3464 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu);
3465 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac);
3466 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE);
3467 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl);
3468}
3469
3470static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev)
3471{
3472 struct mlxsw_sp *mlxsw_sp;
3473 struct mlxsw_sp_rif *r;
3474 int err;
3475
3476 mlxsw_sp = mlxsw_sp_lower_get(dev);
3477 if (!mlxsw_sp)
3478 return 0;
3479
3480 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev);
3481 if (!r)
3482 return 0;
3483
3484 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false);
3485 if (err)
3486 return err;
3487
3488 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu);
3489 if (err)
3490 goto err_rif_edit;
3491
3492 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true);
3493 if (err)
3494 goto err_rif_fdb_op;
3495
3496 ether_addr_copy(r->addr, dev->dev_addr);
3497 r->mtu = dev->mtu;
3498
3499 netdev_dbg(dev, "Updated RIF=%d\n", r->rif);
3500
3501 return 0;
3502
3503err_rif_fdb_op:
3504 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu);
3505err_rif_edit:
3506 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true);
3507 return err;
3508}
3509
fe3f6d14
IS		 3510static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port,
3511 u16 fid)
3512{
3513 if (mlxsw_sp_fid_is_vfid(fid))
3514 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid);
3515 else
3516 return test_bit(fid, lag_port->active_vlans);
3517}
3518
3519static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port,
3520 u16 fid)
039c49a6
IS		 3521{
3522 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
fe3f6d14
IS		 3523 u8 local_port = mlxsw_sp_port->local_port;
3524 u16 lag_id = mlxsw_sp_port->lag_id;
3525 int i, count = 0;
039c49a6 3526
fe3f6d14
IS		 3527 if (!mlxsw_sp_port->lagged)
3528 return true;
039c49a6 3529
fe3f6d14
IS		 3530 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3531 struct mlxsw_sp_port *lag_port;
3532
3533 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
3534 if (!lag_port || lag_port->local_port == local_port)
3535 continue;
3536 if (mlxsw_sp_lag_port_fid_member(lag_port, fid))
3537 count++;
3538 }
3539
3540 return !count;
039c49a6
IS		 3541}
3542
3543static int
3544mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3545 u16 fid)
3546{
3547 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3548 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3549
3550 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID);
3551 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3552 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl,
3553 mlxsw_sp_port->local_port);
3554
22305378
IS		 3555 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n",
3556 mlxsw_sp_port->local_port, fid);
3557
039c49a6
IS		 3558 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3559}
3560
039c49a6
IS		 3561static int
3562mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port,
3563 u16 fid)
3564{
3565 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3566 char sfdf_pl[MLXSW_REG_SFDF_LEN];
3567
3568 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID);
3569 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid);
3570 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id);
3571
22305378
IS		 3572 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n",
3573 mlxsw_sp_port->lag_id, fid);
3574
039c49a6
IS		 3575 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl);
3576}
3577
fe3f6d14 3578int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
039c49a6 3579{
fe3f6d14
IS		 3580 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid))
3581 return 0;
039c49a6 3582
fe3f6d14
IS		 3583 if (mlxsw_sp_port->lagged)
3584 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port,
039c49a6
IS		 3585 fid);
3586 else
fe3f6d14 3587 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid);
039c49a6
IS		 3588}
3589
701b186e
IS		 3590static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp)
3591{
3592 struct mlxsw_sp_fid *f, *tmp;
3593
3594 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list)
3595 if (--f->ref_count == 0)
3596 mlxsw_sp_fid_destroy(mlxsw_sp, f);
3597 else
3598 WARN_ON_ONCE(1);
3599}
3600
7117a570
IS		 3601static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp,
3602 struct net_device *br_dev)
3603{
3604 return !mlxsw_sp->master_bridge.dev ||
3605 mlxsw_sp->master_bridge.dev == br_dev;
3606}
3607
3608static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp,
3609 struct net_device *br_dev)
3610{
3611 mlxsw_sp->master_bridge.dev = br_dev;
3612 mlxsw_sp->master_bridge.ref_count++;
3613}
3614
3615static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp)
3616{
701b186e 3617 if (--mlxsw_sp->master_bridge.ref_count == 0) {
7117a570 3618 mlxsw_sp->master_bridge.dev = NULL;
701b186e
IS		 3619 /* It's possible upper VLAN devices are still holding
3620 * references to underlying FIDs. Drop the reference
3621 * and release the resources if it was the last one.
3622 * If it wasn't, then something bad happened.
3623 */
3624 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp);
3625 }
7117a570
IS		 3626}
3627
3628static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port,
3629 struct net_device *br_dev)
56ade8fe
JP		 3630{
3631 struct net_device *dev = mlxsw_sp_port->dev;
3632 int err;
3633
3634 /* When port is not bridged untagged packets are tagged with
3635 * PVID=VID=1, thereby creating an implicit VLAN interface in
3636 * the device. Remove it and let bridge code take care of its
3637 * own VLANs.
3638 */
3639 err = mlxsw_sp_port_kill_vid(dev, 0, 1);
6c72a3d0
IS		 3640 if (err)
3641 return err;
56ade8fe 3642
7117a570
IS		 3643 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev);
3644
6c72a3d0
IS		 3645 mlxsw_sp_port->learning = 1;
3646 mlxsw_sp_port->learning_sync = 1;
3647 mlxsw_sp_port->uc_flood = 1;
3648 mlxsw_sp_port->bridged = 1;
3649
3650 return 0;
56ade8fe
JP		 3651}
3652
fe3f6d14 3653static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port)
56ade8fe
JP		 3654{
3655 struct net_device *dev = mlxsw_sp_port->dev;
5a8f4525 3656
28a01d2d
IS		 3657 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
3658
7117a570
IS		 3659 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp);
3660
6c72a3d0
IS		 3661 mlxsw_sp_port->learning = 0;
3662 mlxsw_sp_port->learning_sync = 0;
3663 mlxsw_sp_port->uc_flood = 0;
5a8f4525 3664 mlxsw_sp_port->bridged = 0;
56ade8fe
JP		 3665
3666 /* Add implicit VLAN interface in the device, so that untagged
3667 * packets will be classified to the default vFID.
3668 */
82e6db03 3669 mlxsw_sp_port_add_vid(dev, 0, 1);
56ade8fe
JP		 3670}
3671
0d65fc13
JP		 3672static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3673{
3674 char sldr_pl[MLXSW_REG_SLDR_LEN];
3675
3676 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id);
3677 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3678}
3679
3680static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id)
3681{
3682 char sldr_pl[MLXSW_REG_SLDR_LEN];
3683
3684 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id);
3685 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3686}
3687
3688static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3689 u16 lag_id, u8 port_index)
3690{
3691 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3692 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3693
3694 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port,
3695 lag_id, port_index);
3696 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3697}
3698
3699static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3700 u16 lag_id)
3701{
3702 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3703 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3704
3705 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port,
3706 lag_id);
3707 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3708}
3709
3710static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port,
3711 u16 lag_id)
3712{
3713 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3714 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3715
3716 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port,
3717 lag_id);
3718 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3719}
3720
3721static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port,
3722 u16 lag_id)
3723{
3724 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3725 char slcor_pl[MLXSW_REG_SLCOR_LEN];
3726
3727 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port,
3728 lag_id);
3729 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl);
3730}
3731
3732static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3733 struct net_device *lag_dev,
3734 u16 *p_lag_id)
3735{
3736 struct mlxsw_sp_upper *lag;
3737 int free_lag_id = -1;
3738 int i;
3739
3740 for (i = 0; i < MLXSW_SP_LAG_MAX; i++) {
3741 lag = mlxsw_sp_lag_get(mlxsw_sp, i);
3742 if (lag->ref_count) {
3743 if (lag->dev == lag_dev) {
3744 *p_lag_id = i;
3745 return 0;
3746 }
3747 } else if (free_lag_id < 0) {
3748 free_lag_id = i;
3749 }
3750 }
3751 if (free_lag_id < 0)
3752 return -EBUSY;
3753 *p_lag_id = free_lag_id;
3754 return 0;
3755}
3756
3757static bool
3758mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp,
3759 struct net_device *lag_dev,
3760 struct netdev_lag_upper_info *lag_upper_info)
3761{
3762 u16 lag_id;
3763
3764 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0)
3765 return false;
3766 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH)
3767 return false;
3768 return true;
3769}
3770
3771static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp,
3772 u16 lag_id, u8 *p_port_index)
3773{
3774 int i;
3775
3776 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
3777 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) {
3778 *p_port_index = i;
3779 return 0;
3780 }
3781 }
3782 return -EBUSY;
3783}
3784
86bf95b3
IS		 3785static void
3786mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3787 u16 lag_id)
3788{
3789 struct mlxsw_sp_port *mlxsw_sp_vport;
11943ff4 3790 struct mlxsw_sp_fid *f;
86bf95b3
IS		 3791
3792 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3793 if (WARN_ON(!mlxsw_sp_vport))
3794 return;
3795
11943ff4
IS		 3796 /* If vPort is assigned a RIF, then leave it since it's no
3797 * longer valid.
3798 */
3799 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3800 if (f)
3801 f->leave(mlxsw_sp_vport);
3802
86bf95b3
IS		 3803 mlxsw_sp_vport->lag_id = lag_id;
3804 mlxsw_sp_vport->lagged = 1;
3805}
3806
3807static void
3808mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port)
3809{
3810 struct mlxsw_sp_port *mlxsw_sp_vport;
11943ff4 3811 struct mlxsw_sp_fid *f;
86bf95b3
IS		 3812
3813 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1);
3814 if (WARN_ON(!mlxsw_sp_vport))
3815 return;
3816
11943ff4
IS		 3817 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
3818 if (f)
3819 f->leave(mlxsw_sp_vport);
3820
86bf95b3
IS		 3821 mlxsw_sp_vport->lagged = 0;
3822}
3823
0d65fc13
JP		 3824static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port,
3825 struct net_device *lag_dev)
3826{
3827 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3828 struct mlxsw_sp_upper *lag;
3829 u16 lag_id;
3830 u8 port_index;
3831 int err;
3832
3833 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id);
3834 if (err)
3835 return err;
3836 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3837 if (!lag->ref_count) {
3838 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id);
3839 if (err)
3840 return err;
3841 lag->dev = lag_dev;
3842 }
3843
3844 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index);
3845 if (err)
3846 return err;
3847 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index);
3848 if (err)
3849 goto err_col_port_add;
3850 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id);
3851 if (err)
3852 goto err_col_port_enable;
3853
3854 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index,
3855 mlxsw_sp_port->local_port);
3856 mlxsw_sp_port->lag_id = lag_id;
3857 mlxsw_sp_port->lagged = 1;
3858 lag->ref_count++;
86bf95b3
IS		 3859
3860 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id);
3861
0d65fc13
JP		 3862 return 0;
3863
51554db2
IS		 3864err_col_port_enable:
3865 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
0d65fc13
JP		 3866err_col_port_add:
3867 if (!lag->ref_count)
3868 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
0d65fc13
JP		 3869 return err;
3870}
3871
82e6db03
IS		 3872static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port,
3873 struct net_device *lag_dev)
0d65fc13
JP		 3874{
3875 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
0d65fc13 3876 u16 lag_id = mlxsw_sp_port->lag_id;
1c800759 3877 struct mlxsw_sp_upper *lag;
0d65fc13
JP		 3878
3879 if (!mlxsw_sp_port->lagged)
82e6db03 3880 return;
0d65fc13
JP		 3881 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id);
3882 WARN_ON(lag->ref_count == 0);
3883
82e6db03
IS		 3884 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id);
3885 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id);
0d65fc13 3886
4dc236c3
IS		 3887 if (mlxsw_sp_port->bridged) {
3888 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port);
fe3f6d14 3889 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
4dc236c3
IS		 3890 }
3891
fe3f6d14 3892 if (lag->ref_count == 1)
82e6db03 3893 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id);
0d65fc13
JP		 3894
3895 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id,
3896 mlxsw_sp_port->local_port);
3897 mlxsw_sp_port->lagged = 0;
3898 lag->ref_count--;
86bf95b3
IS		 3899
3900 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port);
0d65fc13
JP		 3901}
3902
74581206
JP		 3903static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port,
3904 u16 lag_id)
3905{
3906 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3907 char sldr_pl[MLXSW_REG_SLDR_LEN];
3908
3909 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id,
3910 mlxsw_sp_port->local_port);
3911 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3912}
3913
3914static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port,
3915 u16 lag_id)
3916{
3917 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3918 char sldr_pl[MLXSW_REG_SLDR_LEN];
3919
3920 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id,
3921 mlxsw_sp_port->local_port);
3922 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl);
3923}
3924
3925static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port,
3926 bool lag_tx_enabled)
3927{
3928 if (lag_tx_enabled)
3929 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port,
3930 mlxsw_sp_port->lag_id);
3931 else
3932 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port,
3933 mlxsw_sp_port->lag_id);
3934}
3935
3936static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port,
3937 struct netdev_lag_lower_state_info *info)
3938{
3939 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled);
3940}
3941
9589a7b5
IS		 3942static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port,
3943 struct net_device *vlan_dev)
3944{
3945 struct mlxsw_sp_port *mlxsw_sp_vport;
3946 u16 vid = vlan_dev_vlan_id(vlan_dev);
3947
3948 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
423b937e 3949 if (WARN_ON(!mlxsw_sp_vport))
9589a7b5 3950 return -EINVAL;
9589a7b5
IS		 3951
3952 mlxsw_sp_vport->dev = vlan_dev;
3953
3954 return 0;
3955}
3956
82e6db03
IS		 3957static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port,
3958 struct net_device *vlan_dev)
9589a7b5
IS		 3959{
3960 struct mlxsw_sp_port *mlxsw_sp_vport;
3961 u16 vid = vlan_dev_vlan_id(vlan_dev);
3962
3963 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
423b937e 3964 if (WARN_ON(!mlxsw_sp_vport))
82e6db03 3965 return;
9589a7b5
IS		 3966
3967 mlxsw_sp_vport->dev = mlxsw_sp_port->dev;
9589a7b5
IS		 3968}
3969
74581206
JP		 3970static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev,
3971 unsigned long event, void *ptr)
56ade8fe 3972{
56ade8fe
JP		 3973 struct netdev_notifier_changeupper_info *info;
3974 struct mlxsw_sp_port *mlxsw_sp_port;
3975 struct net_device *upper_dev;
3976 struct mlxsw_sp *mlxsw_sp;
80bedf1a 3977 int err = 0;
56ade8fe 3978
56ade8fe
JP		 3979 mlxsw_sp_port = netdev_priv(dev);
3980 mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3981 info = ptr;
3982
3983 switch (event) {
3984 case NETDEV_PRECHANGEUPPER:
3985 upper_dev = info->upper_dev;
59fe9b3f
IS		 3986 if (!is_vlan_dev(upper_dev) &&
3987 !netif_is_lag_master(upper_dev) &&
3988 !netif_is_bridge_master(upper_dev))
3989 return -EINVAL;
6ec43904 3990 if (!info->linking)
0d65fc13 3991 break;
56ade8fe 3992 /* HW limitation forbids to put ports to multiple bridges. */
0d65fc13 3993 if (netif_is_bridge_master(upper_dev) &&
56ade8fe 3994 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev))
80bedf1a 3995 return -EINVAL;
0d65fc13
JP		 3996 if (netif_is_lag_master(upper_dev) &&
3997 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev,
3998 info->upper_info))
80bedf1a 3999 return -EINVAL;
6ec43904
IS		 4000 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev))
4001 return -EINVAL;
4002 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) &&
4003 !netif_is_lag_master(vlan_dev_real_dev(upper_dev)))
4004 return -EINVAL;
56ade8fe
JP		 4005 break;
4006 case NETDEV_CHANGEUPPER:
4007 upper_dev = info->upper_dev;
9589a7b5 4008 if (is_vlan_dev(upper_dev)) {
80bedf1a 4009 if (info->linking)
9589a7b5
IS		 4010 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port,
4011 upper_dev);
80bedf1a 4012 else
82e6db03
IS		 4013 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port,
4014 upper_dev);
9589a7b5 4015 } else if (netif_is_bridge_master(upper_dev)) {
7117a570
IS		 4016 if (info->linking)
4017 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port,
4018 upper_dev);
4019 else
fe3f6d14 4020 mlxsw_sp_port_bridge_leave(mlxsw_sp_port);
0d65fc13 4021 } else if (netif_is_lag_master(upper_dev)) {
80bedf1a 4022 if (info->linking)
0d65fc13
JP		 4023 err = mlxsw_sp_port_lag_join(mlxsw_sp_port,
4024 upper_dev);
80bedf1a 4025 else
82e6db03
IS		 4026 mlxsw_sp_port_lag_leave(mlxsw_sp_port,
4027 upper_dev);
59fe9b3f
IS		 4028 } else {
4029 err = -EINVAL;
4030 WARN_ON(1);
56ade8fe
JP		 4031 }
4032 break;
4033 }
4034
80bedf1a 4035 return err;
56ade8fe
JP		 4036}
4037
74581206
JP		 4038static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev,
4039 unsigned long event, void *ptr)
4040{
4041 struct netdev_notifier_changelowerstate_info *info;
4042 struct mlxsw_sp_port *mlxsw_sp_port;
4043 int err;
4044
4045 mlxsw_sp_port = netdev_priv(dev);
4046 info = ptr;
4047
4048 switch (event) {
4049 case NETDEV_CHANGELOWERSTATE:
4050 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) {
4051 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port,
4052 info->lower_state_info);
4053 if (err)
4054 netdev_err(dev, "Failed to reflect link aggregation lower state change\n");
4055 }
4056 break;
4057 }
4058
80bedf1a 4059 return 0;
74581206
JP		 4060}
4061
4062static int mlxsw_sp_netdevice_port_event(struct net_device *dev,
4063 unsigned long event, void *ptr)
4064{
4065 switch (event) {
4066 case NETDEV_PRECHANGEUPPER:
4067 case NETDEV_CHANGEUPPER:
4068 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr);
4069 case NETDEV_CHANGELOWERSTATE:
4070 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr);
4071 }
4072
80bedf1a 4073 return 0;
74581206
JP		 4074}
4075
0d65fc13
JP		 4076static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev,
4077 unsigned long event, void *ptr)
4078{
4079 struct net_device *dev;
4080 struct list_head *iter;
4081 int ret;
4082
4083 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4084 if (mlxsw_sp_port_dev_check(dev)) {
4085 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr);
80bedf1a 4086 if (ret)
0d65fc13
JP		 4087 return ret;
4088 }
4089 }
4090
80bedf1a 4091 return 0;
0d65fc13
JP		 4092}
4093
701b186e
IS		 4094static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp,
4095 struct net_device *vlan_dev)
26f0e7fb 4096{
701b186e 4097 u16 fid = vlan_dev_vlan_id(vlan_dev);
d0ec875a 4098 struct mlxsw_sp_fid *f;
26f0e7fb 4099
701b186e
IS		 4100 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
4101 if (!f) {
4102 f = mlxsw_sp_fid_create(mlxsw_sp, fid);
4103 if (IS_ERR(f))
4104 return PTR_ERR(f);
26f0e7fb
IS		 4105 }
4106
701b186e
IS		 4107 f->ref_count++;
4108
4109 return 0;
4110}
4111
4112static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp,
4113 struct net_device *vlan_dev)
4114{
4115 u16 fid = vlan_dev_vlan_id(vlan_dev);
4116 struct mlxsw_sp_fid *f;
4117
4118 f = mlxsw_sp_fid_find(mlxsw_sp, fid);
99f44bb3
IS		 4119 if (f && f->r)
4120 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
701b186e
IS		 4121 if (f && --f->ref_count == 0)
4122 mlxsw_sp_fid_destroy(mlxsw_sp, f);
4123}
4124
4125static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev,
4126 unsigned long event, void *ptr)
4127{
4128 struct netdev_notifier_changeupper_info *info;
4129 struct net_device *upper_dev;
4130 struct mlxsw_sp *mlxsw_sp;
4131 int err;
4132
4133 mlxsw_sp = mlxsw_sp_lower_get(br_dev);
4134 if (!mlxsw_sp)
4135 return 0;
4136 if (br_dev != mlxsw_sp->master_bridge.dev)
4137 return 0;
4138
4139 info = ptr;
4140
4141 switch (event) {
4142 case NETDEV_CHANGEUPPER:
4143 upper_dev = info->upper_dev;
4144 if (!is_vlan_dev(upper_dev))
4145 break;
4146 if (info->linking) {
4147 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp,
4148 upper_dev);
4149 if (err)
4150 return err;
4151 } else {
4152 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev);
4153 }
4154 break;
4155 }
4156
4157 return 0;
26f0e7fb
IS		 4158}
4159
3ba2ebf4 4160static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp)
26f0e7fb 4161{
3ba2ebf4 4162 return find_first_zero_bit(mlxsw_sp->vfids.mapped,
99724c18 4163 MLXSW_SP_VFID_MAX);
26f0e7fb
IS		 4164}
4165
99724c18 4166static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
26f0e7fb 4167{
99724c18 4168 char sfmr_pl[MLXSW_REG_SFMR_LEN];
26f0e7fb 4169
99724c18
IS		 4170 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0);
4171 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
26f0e7fb
IS		 4172}
4173
3ba2ebf4 4174static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport);
1c800759 4175
3ba2ebf4
IS		 4176static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp,
4177 struct net_device *br_dev)
26f0e7fb
IS		 4178{
4179 struct device *dev = mlxsw_sp->bus_info->dev;
d0ec875a 4180 struct mlxsw_sp_fid *f;
c7e920b5 4181 u16 vfid, fid;
26f0e7fb
IS		 4182 int err;
4183
3ba2ebf4 4184 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp);
c7e920b5 4185 if (vfid == MLXSW_SP_VFID_MAX) {
26f0e7fb
IS		 4186 dev_err(dev, "No available vFIDs\n");
4187 return ERR_PTR(-ERANGE);
4188 }
4189
c7e920b5
IS		 4190 fid = mlxsw_sp_vfid_to_fid(vfid);
4191 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true);
26f0e7fb 4192 if (err) {
c7e920b5 4193 dev_err(dev, "Failed to create FID=%d\n", fid);
26f0e7fb
IS		 4194 return ERR_PTR(err);
4195 }
4196
c7e920b5
IS		 4197 f = kzalloc(sizeof(*f), GFP_KERNEL);
4198 if (!f)
26f0e7fb
IS		 4199 goto err_allocate_vfid;
4200
3ba2ebf4 4201 f->leave = mlxsw_sp_vport_vfid_leave;
d0ec875a
IS		 4202 f->fid = fid;
4203 f->dev = br_dev;
26f0e7fb 4204
3ba2ebf4
IS		 4205 list_add(&f->list, &mlxsw_sp->vfids.list);
4206 set_bit(vfid, mlxsw_sp->vfids.mapped);
26f0e7fb 4207
c7e920b5 4208 return f;
26f0e7fb
IS		 4209
4210err_allocate_vfid:
c7e920b5 4211 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
26f0e7fb
IS		 4212 return ERR_PTR(-ENOMEM);
4213}
4214
3ba2ebf4
IS		 4215static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp,
4216 struct mlxsw_sp_fid *f)
26f0e7fb 4217{
d0ec875a 4218 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid);
99f44bb3 4219 u16 fid = f->fid;
26f0e7fb 4220
3ba2ebf4 4221 clear_bit(vfid, mlxsw_sp->vfids.mapped);
d0ec875a 4222 list_del(&f->list);
26f0e7fb 4223
99f44bb3
IS		 4224 if (f->r)
4225 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r);
26f0e7fb 4226
d0ec875a 4227 kfree(f);
99f44bb3
IS		 4228
4229 mlxsw_sp_vfid_op(mlxsw_sp, fid, false);
26f0e7fb
IS		 4230}
4231
99724c18
IS		 4232static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
4233 bool valid)
4234{
4235 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
4236 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4237
4238 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid,
4239 vid);
4240}
4241
3ba2ebf4
IS		 4242static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4243 struct net_device *br_dev)
26f0e7fb 4244{
0355b59f 4245 struct mlxsw_sp_fid *f;
26f0e7fb
IS		 4246 int err;
4247
3ba2ebf4 4248 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev);
0355b59f 4249 if (!f) {
3ba2ebf4 4250 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev);
0355b59f
IS		 4251 if (IS_ERR(f))
4252 return PTR_ERR(f);
26f0e7fb
IS		 4253 }
4254
0355b59f
IS		 4255 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true);
4256 if (err)
4257 goto err_vport_flood_set;
26f0e7fb 4258
0355b59f
IS		 4259 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true);
4260 if (err)
9c4d4423 4261 goto err_vport_fid_map;
26f0e7fb 4262
41b996cc 4263 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f);
0355b59f 4264 f->ref_count++;
6a9863a6 4265
22305378
IS		 4266 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid);
4267
0355b59f 4268 return 0;
039c49a6 4269
0355b59f
IS		 4270err_vport_fid_map:
4271 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4272err_vport_flood_set:
d0ec875a 4273 if (!f->ref_count)
3ba2ebf4 4274 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
0355b59f
IS		 4275 return err;
4276}
26f0e7fb 4277
3ba2ebf4 4278static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
0355b59f 4279{
41b996cc 4280 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
26f0e7fb 4281
22305378
IS		 4282 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid);
4283
0355b59f 4284 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false);
26f0e7fb 4285
0355b59f
IS		 4286 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false);
4287
fe3f6d14
IS		 4288 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid);
4289
41b996cc 4290 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL);
0355b59f 4291 if (--f->ref_count == 0)
3ba2ebf4 4292 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f);
26f0e7fb
IS		 4293}
4294
4295static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport,
4296 struct net_device *br_dev)
4297{
99724c18 4298 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport);
26f0e7fb
IS		 4299 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
4300 struct net_device *dev = mlxsw_sp_vport->dev;
26f0e7fb
IS		 4301 int err;
4302
99724c18
IS		 4303 if (f && !WARN_ON(!f->leave))
4304 f->leave(mlxsw_sp_vport);
26f0e7fb 4305
3ba2ebf4 4306 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev);
26f0e7fb 4307 if (err) {
0355b59f 4308 netdev_err(dev, "Failed to join vFID\n");
99724c18 4309 return err;
26f0e7fb
IS		 4310 }
4311
4312 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true);
4313 if (err) {
4314 netdev_err(dev, "Failed to enable learning\n");
4315 goto err_port_vid_learning_set;
4316 }
4317
26f0e7fb
IS		 4318 mlxsw_sp_vport->learning = 1;
4319 mlxsw_sp_vport->learning_sync = 1;
4320 mlxsw_sp_vport->uc_flood = 1;
4321 mlxsw_sp_vport->bridged = 1;
4322
4323 return 0;
4324
26f0e7fb 4325err_port_vid_learning_set:
3ba2ebf4 4326 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
26f0e7fb
IS		 4327 return err;
4328}
4329
fe3f6d14 4330static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport)
0355b59f
IS		 4331{
4332 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
0355b59f
IS		 4333
4334 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false);
4335
3ba2ebf4 4336 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport);
0355b59f 4337
0355b59f
IS		 4338 mlxsw_sp_vport->learning = 0;
4339 mlxsw_sp_vport->learning_sync = 0;
4340 mlxsw_sp_vport->uc_flood = 0;
4341 mlxsw_sp_vport->bridged = 0;
4342}
4343
26f0e7fb
IS		 4344static bool
4345mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port,
4346 const struct net_device *br_dev)
4347{
4348 struct mlxsw_sp_port *mlxsw_sp_vport;
4349
4350 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list,
4351 vport.list) {
3ba2ebf4 4352 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport);
56918b6b
IS		 4353
4354 if (dev && dev == br_dev)
26f0e7fb
IS		 4355 return false;
4356 }
4357
4358 return true;
4359}
4360
4361static int mlxsw_sp_netdevice_vport_event(struct net_device *dev,
4362 unsigned long event, void *ptr,
4363 u16 vid)
4364{
4365 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
4366 struct netdev_notifier_changeupper_info *info = ptr;
4367 struct mlxsw_sp_port *mlxsw_sp_vport;
4368 struct net_device *upper_dev;
80bedf1a 4369 int err = 0;
26f0e7fb
IS		 4370
4371 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
4372
4373 switch (event) {
4374 case NETDEV_PRECHANGEUPPER:
4375 upper_dev = info->upper_dev;
26f0e7fb 4376 if (!netif_is_bridge_master(upper_dev))
80bedf1a 4377 return -EINVAL;
ddbe993d
IS		 4378 if (!info->linking)
4379 break;
26f0e7fb
IS		 4380 /* We can't have multiple VLAN interfaces configured on
4381 * the same port and being members in the same bridge.
4382 */
4383 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port,
4384 upper_dev))
80bedf1a 4385 return -EINVAL;
26f0e7fb
IS		 4386 break;
4387 case NETDEV_CHANGEUPPER:
4388 upper_dev = info->upper_dev;
26f0e7fb 4389 if (info->linking) {
423b937e 4390 if (WARN_ON(!mlxsw_sp_vport))
80bedf1a 4391 return -EINVAL;
26f0e7fb
IS		 4392 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport,
4393 upper_dev);
26f0e7fb 4394 } else {
26f0e7fb 4395 if (!mlxsw_sp_vport)
80bedf1a 4396 return 0;
fe3f6d14 4397 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport);
26f0e7fb
IS		 4398 }
4399 }
4400
80bedf1a 4401 return err;
26f0e7fb
IS		 4402}
4403
272c4470
IS		 4404static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev,
4405 unsigned long event, void *ptr,
4406 u16 vid)
4407{
4408 struct net_device *dev;
4409 struct list_head *iter;
4410 int ret;
4411
4412 netdev_for_each_lower_dev(lag_dev, dev, iter) {
4413 if (mlxsw_sp_port_dev_check(dev)) {
4414 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr,
4415 vid);
80bedf1a 4416 if (ret)
272c4470
IS		 4417 return ret;
4418 }
4419 }
4420
80bedf1a 4421 return 0;
272c4470
IS		 4422}
4423
26f0e7fb
IS		 4424static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev,
4425 unsigned long event, void *ptr)
4426{
4427 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev);
4428 u16 vid = vlan_dev_vlan_id(vlan_dev);
4429
272c4470
IS		 4430 if (mlxsw_sp_port_dev_check(real_dev))
4431 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr,
4432 vid);
4433 else if (netif_is_lag_master(real_dev))
4434 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr,
4435 vid);
26f0e7fb 4436
80bedf1a 4437 return 0;
26f0e7fb
IS		 4438}
4439
0d65fc13
JP		 4440static int mlxsw_sp_netdevice_event(struct notifier_block *unused,
4441 unsigned long event, void *ptr)
4442{
4443 struct net_device *dev = netdev_notifier_info_to_dev(ptr);
80bedf1a 4444 int err = 0;
0d65fc13 4445
6e095fd4
IS		 4446 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU)
4447 err = mlxsw_sp_netdevice_router_port_event(dev);
4448 else if (mlxsw_sp_port_dev_check(dev))
80bedf1a
IS		 4449 err = mlxsw_sp_netdevice_port_event(dev, event, ptr);
4450 else if (netif_is_lag_master(dev))
4451 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr);
701b186e
IS		 4452 else if (netif_is_bridge_master(dev))
4453 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr);
80bedf1a
IS		 4454 else if (is_vlan_dev(dev))
4455 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr);
26f0e7fb 4456
80bedf1a 4457 return notifier_from_errno(err);
0d65fc13
JP		 4458}
4459
56ade8fe
JP		 4460static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = {
4461 .notifier_call = mlxsw_sp_netdevice_event,
4462};
4463
99724c18
IS		 4464static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = {
4465 .notifier_call = mlxsw_sp_inetaddr_event,
4466 .priority = 10, /* Must be called before FIB notifier block */
4467};
4468
e7322638
JP		 4469static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = {
4470 .notifier_call = mlxsw_sp_router_netevent_event,
4471};
4472
56ade8fe
JP		 4473static int __init mlxsw_sp_module_init(void)
4474{
4475 int err;
4476
4477 register_netdevice_notifier(&mlxsw_sp_netdevice_nb);
99724c18 4478 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
e7322638
JP		 4479 register_netevent_notifier(&mlxsw_sp_router_netevent_nb);
4480
56ade8fe
JP		 4481 err = mlxsw_core_driver_register(&mlxsw_sp_driver);
4482 if (err)
4483 goto err_core_driver_register;
4484 return 0;
4485
4486err_core_driver_register:
e7322638 4487 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
de7d6295 4488 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
56ade8fe
JP		 4489 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4490 return err;
4491}
4492
4493static void __exit mlxsw_sp_module_exit(void)
4494{
4495 mlxsw_core_driver_unregister(&mlxsw_sp_driver);
e7322638 4496 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb);
99724c18 4497 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb);
56ade8fe
JP		 4498 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb);
4499}
4500
4501module_init(mlxsw_sp_module_init);
4502module_exit(mlxsw_sp_module_exit);
4503
4504MODULE_LICENSE("Dual BSD/GPL");
4505MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
4506MODULE_DESCRIPTION("Mellanox Spectrum driver");
4507MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM);
Linux kernel - Deliverables
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