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Merge remote-tracking branch 'xen-tip/linux-next'
[deliverable/linux.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
CommitLineData
e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
f9f082a9 27#include <net/udp_tunnel.h>
e712d52b
YM		 28#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
5abd7e92
YM		 42static char version[] =
43 "QLogic FastLinQ 4xxxx Ethernet Driver qede " DRV_MODULE_VERSION "\n";
e712d52b 44
5abd7e92 45MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx Ethernet Driver");
e712d52b
YM		 46MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
0e7441d7 56#define CHIP_NUM_57980S_10 0x1666
e712d52b
YM		 57#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
fefb0202 61#define CHIP_NUM_57980S_IOV 0x1664
e712d52b
YM		 62
63#ifndef PCI_DEVICE_ID_NX2_57980E
64#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
65#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
66#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
67#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
68#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
69#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
fefb0202 70#define PCI_DEVICE_ID_57980S_IOV CHIP_NUM_57980S_IOV
e712d52b
YM		 71#endif
72
fefb0202
YM		 73enum qede_pci_private {
74 QEDE_PRIVATE_PF,
75 QEDE_PRIVATE_VF
76};
77
e712d52b 78static const struct pci_device_id qede_pci_tbl[] = {
fefb0202
YM		 79 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), QEDE_PRIVATE_PF},
80 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), QEDE_PRIVATE_PF},
81 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), QEDE_PRIVATE_PF},
82 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), QEDE_PRIVATE_PF},
83 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), QEDE_PRIVATE_PF},
84 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), QEDE_PRIVATE_PF},
14b84e86 85#ifdef CONFIG_QED_SRIOV
fefb0202 86 {PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_IOV), QEDE_PRIVATE_VF},
14b84e86 87#endif
e712d52b
YM		 88 { 0 }
89};
90
91MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
92
93static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
94
95#define TX_TIMEOUT (5 * HZ)
96
97static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 98static int qede_alloc_rx_buffer(struct qede_dev *edev,
99 struct qede_rx_queue *rxq);
a2ec6172 100static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b 101
fefb0202 102#ifdef CONFIG_QED_SRIOV
08feecd7
YM		 103static int qede_set_vf_vlan(struct net_device *ndev, int vf, u16 vlan, u8 qos)
104{
105 struct qede_dev *edev = netdev_priv(ndev);
106
107 if (vlan > 4095) {
108 DP_NOTICE(edev, "Illegal vlan value %d\n", vlan);
109 return -EINVAL;
110 }
111
112 DP_VERBOSE(edev, QED_MSG_IOV, "Setting Vlan 0x%04x to VF [%d]\n",
113 vlan, vf);
114
115 return edev->ops->iov->set_vlan(edev->cdev, vlan, vf);
116}
117
eff16960
YM		 118static int qede_set_vf_mac(struct net_device *ndev, int vfidx, u8 *mac)
119{
120 struct qede_dev *edev = netdev_priv(ndev);
121
122 DP_VERBOSE(edev, QED_MSG_IOV,
123 "Setting MAC %02x:%02x:%02x:%02x:%02x:%02x to VF [%d]\n",
124 mac[0], mac[1], mac[2], mac[3], mac[4], mac[5], vfidx);
125
126 if (!is_valid_ether_addr(mac)) {
127 DP_VERBOSE(edev, QED_MSG_IOV, "MAC address isn't valid\n");
128 return -EINVAL;
129 }
130
131 return edev->ops->iov->set_mac(edev->cdev, mac, vfidx);
132}
133
fefb0202
YM		 134static int qede_sriov_configure(struct pci_dev *pdev, int num_vfs_param)
135{
136 struct qede_dev *edev = netdev_priv(pci_get_drvdata(pdev));
831bfb0e
YM		 137 struct qed_dev_info *qed_info = &edev->dev_info.common;
138 int rc;
fefb0202
YM		 139
140 DP_VERBOSE(edev, QED_MSG_IOV, "Requested %d VFs\n", num_vfs_param);
141
831bfb0e
YM		 142 rc = edev->ops->iov->configure(edev->cdev, num_vfs_param);
143
144 /* Enable/Disable Tx switching for PF */
145 if ((rc == num_vfs_param) && netif_running(edev->ndev) &&
146 qed_info->mf_mode != QED_MF_NPAR && qed_info->tx_switching) {
147 struct qed_update_vport_params params;
148
149 memset(&params, 0, sizeof(params));
150 params.vport_id = 0;
151 params.update_tx_switching_flg = 1;
152 params.tx_switching_flg = num_vfs_param ? 1 : 0;
153 edev->ops->vport_update(edev->cdev, &params);
154 }
155
156 return rc;
fefb0202
YM		 157}
158#endif
159
e712d52b
YM		 160static struct pci_driver qede_pci_driver = {
161 .name = "qede",
162 .id_table = qede_pci_tbl,
163 .probe = qede_probe,
164 .remove = qede_remove,
fefb0202
YM		 165#ifdef CONFIG_QED_SRIOV
166 .sriov_configure = qede_sriov_configure,
167#endif
e712d52b
YM		 168};
169
eff16960
YM		 170static void qede_force_mac(void *dev, u8 *mac)
171{
172 struct qede_dev *edev = dev;
173
174 ether_addr_copy(edev->ndev->dev_addr, mac);
175 ether_addr_copy(edev->primary_mac, mac);
176}
177
a2ec6172
SK		 178static struct qed_eth_cb_ops qede_ll_ops = {
179 {
180 .link_update = qede_link_update,
181 },
eff16960 182 .force_mac = qede_force_mac,
a2ec6172
SK		 183};
184
2950219d
YM		 185static int qede_netdev_event(struct notifier_block *this, unsigned long event,
186 void *ptr)
187{
188 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
189 struct ethtool_drvinfo drvinfo;
190 struct qede_dev *edev;
191
192 /* Currently only support name change */
193 if (event != NETDEV_CHANGENAME)
194 goto done;
195
196 /* Check whether this is a qede device */
197 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
198 goto done;
199
200 memset(&drvinfo, 0, sizeof(drvinfo));
201 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
202 if (strcmp(drvinfo.driver, "qede"))
203 goto done;
204 edev = netdev_priv(ndev);
205
206 /* Notify qed of the name change */
207 if (!edev->ops || !edev->ops->common)
208 goto done;
209 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
210 "qede");
211
212done:
213 return NOTIFY_DONE;
214}
215
216static struct notifier_block qede_netdev_notifier = {
217 .notifier_call = qede_netdev_event,
218};
219
e712d52b
YM		 220static
221int __init qede_init(void)
222{
223 int ret;
e712d52b 224
525ef5c0 225 pr_info("qede_init: %s\n", version);
e712d52b 226
95114344 227 qed_ops = qed_get_eth_ops();
e712d52b
YM		 228 if (!qed_ops) {
229 pr_notice("Failed to get qed ethtool operations\n");
230 return -EINVAL;
231 }
232
2950219d
YM		 233 /* Must register notifier before pci ops, since we might miss
234 * interface rename after pci probe and netdev registeration.
235 */
236 ret = register_netdevice_notifier(&qede_netdev_notifier);
237 if (ret) {
238 pr_notice("Failed to register netdevice_notifier\n");
239 qed_put_eth_ops();
240 return -EINVAL;
241 }
242
e712d52b
YM		 243 ret = pci_register_driver(&qede_pci_driver);
244 if (ret) {
245 pr_notice("Failed to register driver\n");
2950219d 246 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 247 qed_put_eth_ops();
248 return -EINVAL;
249 }
250
251 return 0;
252}
253
254static void __exit qede_cleanup(void)
255{
525ef5c0
YM		 256 if (debug & QED_LOG_INFO_MASK)
257 pr_info("qede_cleanup called\n");
e712d52b 258
2950219d 259 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 260 pci_unregister_driver(&qede_pci_driver);
261 qed_put_eth_ops();
262}
263
264module_init(qede_init);
265module_exit(qede_cleanup);
266
2950219d
YM		 267/* -------------------------------------------------------------------------
268 * START OF FAST-PATH
269 * -------------------------------------------------------------------------
270 */
271
272/* Unmap the data and free skb */
273static int qede_free_tx_pkt(struct qede_dev *edev,
1a635e48 274 struct qede_tx_queue *txq, int *len)
2950219d
YM		 275{
276 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
277 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
278 struct eth_tx_1st_bd *first_bd;
279 struct eth_tx_bd *tx_data_bd;
280 int bds_consumed = 0;
281 int nbds;
282 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
283 int i, split_bd_len = 0;
284
285 if (unlikely(!skb)) {
286 DP_ERR(edev,
287 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
288 idx, txq->sw_tx_cons, txq->sw_tx_prod);
289 return -1;
290 }
291
292 *len = skb->len;
293
294 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
295
296 bds_consumed++;
297
298 nbds = first_bd->data.nbds;
299
300 if (data_split) {
301 struct eth_tx_bd *split = (struct eth_tx_bd *)
302 qed_chain_consume(&txq->tx_pbl);
303 split_bd_len = BD_UNMAP_LEN(split);
304 bds_consumed++;
305 }
306 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
307 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
308
309 /* Unmap the data of the skb frags */
310 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
311 tx_data_bd = (struct eth_tx_bd *)
312 qed_chain_consume(&txq->tx_pbl);
313 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
314 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
315 }
316
317 while (bds_consumed++ < nbds)
318 qed_chain_consume(&txq->tx_pbl);
319
320 /* Free skb */
321 dev_kfree_skb_any(skb);
322 txq->sw_tx_ring[idx].skb = NULL;
323 txq->sw_tx_ring[idx].flags = 0;
324
325 return 0;
326}
327
328/* Unmap the data and free skb when mapping failed during start_xmit */
329static void qede_free_failed_tx_pkt(struct qede_dev *edev,
330 struct qede_tx_queue *txq,
331 struct eth_tx_1st_bd *first_bd,
1a635e48 332 int nbd, bool data_split)
2950219d
YM		 333{
334 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
335 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
336 struct eth_tx_bd *tx_data_bd;
337 int i, split_bd_len = 0;
338
339 /* Return prod to its position before this skb was handled */
340 qed_chain_set_prod(&txq->tx_pbl,
1a635e48 341 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
2950219d
YM		 342
343 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
344
345 if (data_split) {
346 struct eth_tx_bd *split = (struct eth_tx_bd *)
347 qed_chain_produce(&txq->tx_pbl);
348 split_bd_len = BD_UNMAP_LEN(split);
349 nbd--;
350 }
351
352 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
353 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
354
355 /* Unmap the data of the skb frags */
356 for (i = 0; i < nbd; i++) {
357 tx_data_bd = (struct eth_tx_bd *)
358 qed_chain_produce(&txq->tx_pbl);
359 if (tx_data_bd->nbytes)
360 dma_unmap_page(&edev->pdev->dev,
361 BD_UNMAP_ADDR(tx_data_bd),
362 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
363 }
364
365 /* Return again prod to its position before this skb was handled */
366 qed_chain_set_prod(&txq->tx_pbl,
1a635e48 367 le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
2950219d
YM		 368
369 /* Free skb */
370 dev_kfree_skb_any(skb);
371 txq->sw_tx_ring[idx].skb = NULL;
372 txq->sw_tx_ring[idx].flags = 0;
373}
374
375static u32 qede_xmit_type(struct qede_dev *edev,
1a635e48 376 struct sk_buff *skb, int *ipv6_ext)
2950219d
YM		 377{
378 u32 rc = XMIT_L4_CSUM;
379 __be16 l3_proto;
380
381 if (skb->ip_summed != CHECKSUM_PARTIAL)
382 return XMIT_PLAIN;
383
384 l3_proto = vlan_get_protocol(skb);
385 if (l3_proto == htons(ETH_P_IPV6) &&
386 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
387 *ipv6_ext = 1;
388
14db81de
MC		 389 if (skb->encapsulation)
390 rc |= XMIT_ENC;
391
2950219d
YM		 392 if (skb_is_gso(skb))
393 rc |= XMIT_LSO;
394
395 return rc;
396}
397
398static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
399 struct eth_tx_2nd_bd *second_bd,
400 struct eth_tx_3rd_bd *third_bd)
401{
402 u8 l4_proto;
fc48b7a6 403 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 404
fc48b7a6 405 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 406
fc48b7a6 407 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 408 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
409 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
410
fc48b7a6 411 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 412 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
413
414 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
415 l4_proto = ipv6_hdr(skb)->nexthdr;
416 else
417 l4_proto = ip_hdr(skb)->protocol;
418
419 if (l4_proto == IPPROTO_UDP)
fc48b7a6 420 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 421
fc48b7a6 422 if (third_bd)
2950219d 423 third_bd->data.bitfields |=
fc48b7a6
YM		 424 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
425 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
426 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 427
fc48b7a6 428 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 429 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
430}
431
432static int map_frag_to_bd(struct qede_dev *edev,
1a635e48 433 skb_frag_t *frag, struct eth_tx_bd *bd)
2950219d
YM		 434{
435 dma_addr_t mapping;
436
437 /* Map skb non-linear frag data for DMA */
438 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
1a635e48 439 skb_frag_size(frag), DMA_TO_DEVICE);
2950219d
YM		 440 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
441 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
442 return -ENOMEM;
443 }
444
445 /* Setup the data pointer of the frag data */
446 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
447
448 return 0;
449}
450
14db81de
MC		 451static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
452{
453 if (is_encap_pkt)
454 return (skb_inner_transport_header(skb) +
455 inner_tcp_hdrlen(skb) - skb->data);
456 else
457 return (skb_transport_header(skb) +
458 tcp_hdrlen(skb) - skb->data);
459}
460
b1199b10
YM		 461/* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
462#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
463static bool qede_pkt_req_lin(struct qede_dev *edev, struct sk_buff *skb,
464 u8 xmit_type)
465{
466 int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
467
468 if (xmit_type & XMIT_LSO) {
469 int hlen;
470
14db81de 471 hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
b1199b10
YM		 472
473 /* linear payload would require its own BD */
474 if (skb_headlen(skb) > hlen)
475 allowed_frags--;
476 }
477
478 return (skb_shinfo(skb)->nr_frags > allowed_frags);
479}
480#endif
481
312e0676
MC		 482static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
483{
484 /* wmb makes sure that the BDs data is updated before updating the
485 * producer, otherwise FW may read old data from the BDs.
486 */
487 wmb();
488 barrier();
489 writel(txq->tx_db.raw, txq->doorbell_addr);
490
491 /* mmiowb is needed to synchronize doorbell writes from more than one
492 * processor. It guarantees that the write arrives to the device before
493 * the queue lock is released and another start_xmit is called (possibly
494 * on another CPU). Without this barrier, the next doorbell can bypass
495 * this doorbell. This is applicable to IA64/Altix systems.
496 */
497 mmiowb();
498}
499
2950219d 500/* Main transmit function */
1a635e48
YM		 501static netdev_tx_t qede_start_xmit(struct sk_buff *skb,
502 struct net_device *ndev)
2950219d
YM		 503{
504 struct qede_dev *edev = netdev_priv(ndev);
505 struct netdev_queue *netdev_txq;
506 struct qede_tx_queue *txq;
507 struct eth_tx_1st_bd *first_bd;
508 struct eth_tx_2nd_bd *second_bd = NULL;
509 struct eth_tx_3rd_bd *third_bd = NULL;
510 struct eth_tx_bd *tx_data_bd = NULL;
511 u16 txq_index;
512 u8 nbd = 0;
513 dma_addr_t mapping;
514 int rc, frag_idx = 0, ipv6_ext = 0;
515 u8 xmit_type;
516 u16 idx;
517 u16 hlen;
810810ff 518 bool data_split = false;
2950219d
YM		 519
520 /* Get tx-queue context and netdev index */
521 txq_index = skb_get_queue_mapping(skb);
9a4d7e86 522 WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
2950219d
YM		 523 txq = QEDE_TX_QUEUE(edev, txq_index);
524 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
525
1a635e48 526 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
2950219d
YM		 527
528 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
529
b1199b10
YM		 530#if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
531 if (qede_pkt_req_lin(edev, skb, xmit_type)) {
532 if (skb_linearize(skb)) {
533 DP_NOTICE(edev,
534 "SKB linearization failed - silently dropping this SKB\n");
535 dev_kfree_skb_any(skb);
536 return NETDEV_TX_OK;
537 }
538 }
539#endif
540
2950219d
YM		 541 /* Fill the entry in the SW ring and the BDs in the FW ring */
542 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
543 txq->sw_tx_ring[idx].skb = skb;
544 first_bd = (struct eth_tx_1st_bd *)
545 qed_chain_produce(&txq->tx_pbl);
546 memset(first_bd, 0, sizeof(*first_bd));
547 first_bd->data.bd_flags.bitfields =
548 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
549
550 /* Map skb linear data for DMA and set in the first BD */
551 mapping = dma_map_single(&edev->pdev->dev, skb->data,
552 skb_headlen(skb), DMA_TO_DEVICE);
553 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
554 DP_NOTICE(edev, "SKB mapping failed\n");
555 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
312e0676 556 qede_update_tx_producer(txq);
2950219d
YM		 557 return NETDEV_TX_OK;
558 }
559 nbd++;
560 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
561
562 /* In case there is IPv6 with extension headers or LSO we need 2nd and
563 * 3rd BDs.
564 */
565 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
566 second_bd = (struct eth_tx_2nd_bd *)
567 qed_chain_produce(&txq->tx_pbl);
568 memset(second_bd, 0, sizeof(*second_bd));
569
570 nbd++;
571 third_bd = (struct eth_tx_3rd_bd *)
572 qed_chain_produce(&txq->tx_pbl);
573 memset(third_bd, 0, sizeof(*third_bd));
574
575 nbd++;
576 /* We need to fill in additional data in second_bd... */
577 tx_data_bd = (struct eth_tx_bd *)second_bd;
578 }
579
580 if (skb_vlan_tag_present(skb)) {
581 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
582 first_bd->data.bd_flags.bitfields |=
583 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
584 }
585
586 /* Fill the parsing flags & params according to the requested offload */
587 if (xmit_type & XMIT_L4_CSUM) {
588 /* We don't re-calculate IP checksum as it is already done by
589 * the upper stack
590 */
591 first_bd->data.bd_flags.bitfields |=
592 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
593
14db81de
MC		 594 if (xmit_type & XMIT_ENC) {
595 first_bd->data.bd_flags.bitfields |=
596 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
351a4ded
YM		 597 first_bd->data.bitfields |=
598 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
14db81de 599 }
fc48b7a6 600
d8c2c7e3
YM		 601 /* Legacy FW had flipped behavior in regard to this bit -
602 * I.e., needed to set to prevent FW from touching encapsulated
603 * packets when it didn't need to.
604 */
605 if (unlikely(txq->is_legacy))
606 first_bd->data.bitfields ^=
607 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
608
2950219d
YM		 609 /* If the packet is IPv6 with extension header, indicate that
610 * to FW and pass few params, since the device cracker doesn't
611 * support parsing IPv6 with extension header/s.
612 */
613 if (unlikely(ipv6_ext))
614 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
615 }
616
617 if (xmit_type & XMIT_LSO) {
618 first_bd->data.bd_flags.bitfields |=
619 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
620 third_bd->data.lso_mss =
621 cpu_to_le16(skb_shinfo(skb)->gso_size);
622
14db81de
MC		 623 if (unlikely(xmit_type & XMIT_ENC)) {
624 first_bd->data.bd_flags.bitfields |=
625 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
626 hlen = qede_get_skb_hlen(skb, true);
627 } else {
628 first_bd->data.bd_flags.bitfields |=
629 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
630 hlen = qede_get_skb_hlen(skb, false);
631 }
2950219d
YM		 632
633 /* @@@TBD - if will not be removed need to check */
634 third_bd->data.bitfields |=
fc48b7a6 635 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 636
637 /* Make life easier for FW guys who can't deal with header and
638 * data on same BD. If we need to split, use the second bd...
639 */
640 if (unlikely(skb_headlen(skb) > hlen)) {
641 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
642 "TSO split header size is %d (%x:%x)\n",
643 first_bd->nbytes, first_bd->addr.hi,
644 first_bd->addr.lo);
645
646 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
647 le32_to_cpu(first_bd->addr.lo)) +
648 hlen;
649
650 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
651 le16_to_cpu(first_bd->nbytes) -
652 hlen);
653
654 /* this marks the BD as one that has no
655 * individual mapping
656 */
657 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
658
659 first_bd->nbytes = cpu_to_le16(hlen);
660
661 tx_data_bd = (struct eth_tx_bd *)third_bd;
662 data_split = true;
663 }
351a4ded
YM		 664 } else {
665 first_bd->data.bitfields |=
666 (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
667 ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
2950219d
YM		 668 }
669
670 /* Handle fragmented skb */
671 /* special handle for frags inside 2nd and 3rd bds.. */
672 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
673 rc = map_frag_to_bd(edev,
674 &skb_shinfo(skb)->frags[frag_idx],
675 tx_data_bd);
676 if (rc) {
677 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
678 data_split);
312e0676 679 qede_update_tx_producer(txq);
2950219d
YM		 680 return NETDEV_TX_OK;
681 }
682
683 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
684 tx_data_bd = (struct eth_tx_bd *)third_bd;
685 else
686 tx_data_bd = NULL;
687
688 frag_idx++;
689 }
690
691 /* map last frags into 4th, 5th .... */
692 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
693 tx_data_bd = (struct eth_tx_bd *)
694 qed_chain_produce(&txq->tx_pbl);
695
696 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
697
698 rc = map_frag_to_bd(edev,
699 &skb_shinfo(skb)->frags[frag_idx],
700 tx_data_bd);
701 if (rc) {
702 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
703 data_split);
312e0676 704 qede_update_tx_producer(txq);
2950219d
YM		 705 return NETDEV_TX_OK;
706 }
707 }
708
709 /* update the first BD with the actual num BDs */
710 first_bd->data.nbds = nbd;
711
712 netdev_tx_sent_queue(netdev_txq, skb->len);
713
714 skb_tx_timestamp(skb);
715
716 /* Advance packet producer only before sending the packet since mapping
717 * of pages may fail.
718 */
719 txq->sw_tx_prod++;
720
721 /* 'next page' entries are counted in the producer value */
722 txq->tx_db.data.bd_prod =
723 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
724
039a3927 725 if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
312e0676 726 qede_update_tx_producer(txq);
2950219d
YM		 727
728 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
729 < (MAX_SKB_FRAGS + 1))) {
039a3927
YM		 730 if (skb->xmit_more)
731 qede_update_tx_producer(txq);
732
2950219d 733 netif_tx_stop_queue(netdev_txq);
68db9ec2 734 txq->stopped_cnt++;
2950219d
YM		 735 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
736 "Stop queue was called\n");
737 /* paired memory barrier is in qede_tx_int(), we have to keep
738 * ordering of set_bit() in netif_tx_stop_queue() and read of
739 * fp->bd_tx_cons
740 */
741 smp_mb();
742
743 if (qed_chain_get_elem_left(&txq->tx_pbl)
744 >= (MAX_SKB_FRAGS + 1) &&
745 (edev->state == QEDE_STATE_OPEN)) {
746 netif_tx_wake_queue(netdev_txq);
747 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
748 "Wake queue was called\n");
749 }
750 }
751
752 return NETDEV_TX_OK;
753}
754
16f46bf0 755int qede_txq_has_work(struct qede_tx_queue *txq)
2950219d
YM		 756{
757 u16 hw_bd_cons;
758
759 /* Tell compiler that consumer and producer can change */
760 barrier();
761 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
762 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
763 return 0;
764
765 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
766}
767
1a635e48 768static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
2950219d
YM		 769{
770 struct netdev_queue *netdev_txq;
771 u16 hw_bd_cons;
772 unsigned int pkts_compl = 0, bytes_compl = 0;
773 int rc;
774
775 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
776
777 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
778 barrier();
779
780 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
781 int len = 0;
782
783 rc = qede_free_tx_pkt(edev, txq, &len);
784 if (rc) {
785 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
786 hw_bd_cons,
787 qed_chain_get_cons_idx(&txq->tx_pbl));
788 break;
789 }
790
791 bytes_compl += len;
792 pkts_compl++;
793 txq->sw_tx_cons++;
68db9ec2 794 txq->xmit_pkts++;
2950219d
YM		 795 }
796
797 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
798
799 /* Need to make the tx_bd_cons update visible to start_xmit()
800 * before checking for netif_tx_queue_stopped(). Without the
801 * memory barrier, there is a small possibility that
802 * start_xmit() will miss it and cause the queue to be stopped
803 * forever.
804 * On the other hand we need an rmb() here to ensure the proper
805 * ordering of bit testing in the following
806 * netif_tx_queue_stopped(txq) call.
807 */
808 smp_mb();
809
810 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
811 /* Taking tx_lock is needed to prevent reenabling the queue
812 * while it's empty. This could have happen if rx_action() gets
813 * suspended in qede_tx_int() after the condition before
814 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
815 *
816 * stops the queue->sees fresh tx_bd_cons->releases the queue->
817 * sends some packets consuming the whole queue again->
818 * stops the queue
819 */
820
821 __netif_tx_lock(netdev_txq, smp_processor_id());
822
823 if ((netif_tx_queue_stopped(netdev_txq)) &&
824 (edev->state == QEDE_STATE_OPEN) &&
825 (qed_chain_get_elem_left(&txq->tx_pbl)
826 >= (MAX_SKB_FRAGS + 1))) {
827 netif_tx_wake_queue(netdev_txq);
828 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
829 "Wake queue was called\n");
830 }
831
832 __netif_tx_unlock(netdev_txq);
833 }
834
835 return 0;
836}
837
16f46bf0 838bool qede_has_rx_work(struct qede_rx_queue *rxq)
2950219d
YM		 839{
840 u16 hw_comp_cons, sw_comp_cons;
841
842 /* Tell compiler that status block fields can change */
843 barrier();
844
845 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
846 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
847
848 return hw_comp_cons != sw_comp_cons;
849}
850
851static bool qede_has_tx_work(struct qede_fastpath *fp)
852{
853 u8 tc;
854
855 for (tc = 0; tc < fp->edev->num_tc; tc++)
856 if (qede_txq_has_work(&fp->txqs[tc]))
857 return true;
858 return false;
859}
860
f86af2df
MC		 861static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
862{
863 qed_chain_consume(&rxq->rx_bd_ring);
864 rxq->sw_rx_cons++;
865}
866
fc48b7a6
YM		 867/* This function reuses the buffer(from an offset) from
868 * consumer index to producer index in the bd ring
2950219d 869 */
fc48b7a6
YM		 870static inline void qede_reuse_page(struct qede_dev *edev,
871 struct qede_rx_queue *rxq,
872 struct sw_rx_data *curr_cons)
2950219d 873{
2950219d 874 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 875 struct sw_rx_data *curr_prod;
876 dma_addr_t new_mapping;
2950219d 877
fc48b7a6
YM		 878 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
879 *curr_prod = *curr_cons;
2950219d 880
fc48b7a6
YM		 881 new_mapping = curr_prod->mapping + curr_prod->page_offset;
882
883 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
884 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 885
2950219d 886 rxq->sw_rx_prod++;
fc48b7a6
YM		 887 curr_cons->data = NULL;
888}
889
f86af2df
MC		 890/* In case of allocation failures reuse buffers
891 * from consumer index to produce buffers for firmware
892 */
16f46bf0
SRK		 893void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq,
894 struct qede_dev *edev, u8 count)
f86af2df
MC		 895{
896 struct sw_rx_data *curr_cons;
897
898 for (; count > 0; count--) {
899 curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
900 qede_reuse_page(edev, rxq, curr_cons);
901 qede_rx_bd_ring_consume(rxq);
902 }
903}
904
fc48b7a6
YM		 905static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
906 struct qede_rx_queue *rxq,
907 struct sw_rx_data *curr_cons)
908{
909 /* Move to the next segment in the page */
910 curr_cons->page_offset += rxq->rx_buf_seg_size;
911
912 if (curr_cons->page_offset == PAGE_SIZE) {
f86af2df
MC		 913 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
914 /* Since we failed to allocate new buffer
915 * current buffer can be used again.
916 */
917 curr_cons->page_offset -= rxq->rx_buf_seg_size;
918
fc48b7a6 919 return -ENOMEM;
f86af2df 920 }
fc48b7a6
YM		 921
922 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
923 PAGE_SIZE, DMA_FROM_DEVICE);
924 } else {
925 /* Increment refcount of the page as we don't want
926 * network stack to take the ownership of the page
927 * which can be recycled multiple times by the driver.
928 */
6d061f9f 929 page_ref_inc(curr_cons->data);
fc48b7a6
YM		 930 qede_reuse_page(edev, rxq, curr_cons);
931 }
932
933 return 0;
2950219d
YM		 934}
935
936static inline void qede_update_rx_prod(struct qede_dev *edev,
937 struct qede_rx_queue *rxq)
938{
939 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
940 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
941 struct eth_rx_prod_data rx_prods = {0};
942
943 /* Update producers */
944 rx_prods.bd_prod = cpu_to_le16(bd_prod);
945 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
946
947 /* Make sure that the BD and SGE data is updated before updating the
948 * producers since FW might read the BD/SGE right after the producer
949 * is updated.
950 */
951 wmb();
952
953 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
954 (u32 *)&rx_prods);
955
956 /* mmiowb is needed to synchronize doorbell writes from more than one
957 * processor. It guarantees that the write arrives to the device before
958 * the napi lock is released and another qede_poll is called (possibly
959 * on another CPU). Without this barrier, the next doorbell can bypass
960 * this doorbell. This is applicable to IA64/Altix systems.
961 */
962 mmiowb();
963}
964
965static u32 qede_get_rxhash(struct qede_dev *edev,
966 u8 bitfields,
1a635e48 967 __le32 rss_hash, enum pkt_hash_types *rxhash_type)
2950219d
YM		 968{
969 enum rss_hash_type htype;
970
971 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
972
973 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
974 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
975 (htype == RSS_HASH_TYPE_IPV6)) ?
976 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
977 return le32_to_cpu(rss_hash);
978 }
979 *rxhash_type = PKT_HASH_TYPE_NONE;
980 return 0;
981}
982
983static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
984{
985 skb_checksum_none_assert(skb);
986
987 if (csum_flag & QEDE_CSUM_UNNECESSARY)
988 skb->ip_summed = CHECKSUM_UNNECESSARY;
14db81de
MC		 989
990 if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY)
991 skb->csum_level = 1;
2950219d
YM		 992}
993
994static inline void qede_skb_receive(struct qede_dev *edev,
995 struct qede_fastpath *fp,
1a635e48 996 struct sk_buff *skb, u16 vlan_tag)
2950219d
YM		 997{
998 if (vlan_tag)
1a635e48 999 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
2950219d
YM		 1000
1001 napi_gro_receive(&fp->napi, skb);
1002}
1003
55482edc
MC		 1004static void qede_set_gro_params(struct qede_dev *edev,
1005 struct sk_buff *skb,
1006 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1007{
1008 u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
1009
1010 if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
1011 PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
1012 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
1013 else
1014 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
1015
1016 skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
1017 cqe->header_len;
1018}
1019
1020static int qede_fill_frag_skb(struct qede_dev *edev,
1021 struct qede_rx_queue *rxq,
1a635e48 1022 u8 tpa_agg_index, u16 len_on_bd)
55482edc
MC		 1023{
1024 struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
1025 NUM_RX_BDS_MAX];
1026 struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
1027 struct sk_buff *skb = tpa_info->skb;
1028
1029 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1030 goto out;
1031
1032 /* Add one frag and update the appropriate fields in the skb */
1033 skb_fill_page_desc(skb, tpa_info->frag_id++,
1034 current_bd->data, current_bd->page_offset,
1035 len_on_bd);
1036
1037 if (unlikely(qede_realloc_rx_buffer(edev, rxq, current_bd))) {
f86af2df
MC		 1038 /* Incr page ref count to reuse on allocation failure
1039 * so that it doesn't get freed while freeing SKB.
1040 */
0139aa7b 1041 page_ref_inc(current_bd->data);
55482edc
MC		 1042 goto out;
1043 }
1044
1045 qed_chain_consume(&rxq->rx_bd_ring);
1046 rxq->sw_rx_cons++;
1047
1048 skb->data_len += len_on_bd;
1049 skb->truesize += rxq->rx_buf_seg_size;
1050 skb->len += len_on_bd;
1051
1052 return 0;
1053
1054out:
f86af2df
MC		 1055 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1056 qede_recycle_rx_bd_ring(rxq, edev, 1);
55482edc
MC		 1057 return -ENOMEM;
1058}
1059
1060static void qede_tpa_start(struct qede_dev *edev,
1061 struct qede_rx_queue *rxq,
1062 struct eth_fast_path_rx_tpa_start_cqe *cqe)
1063{
1064 struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1065 struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
1066 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
1067 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
1068 dma_addr_t mapping = tpa_info->replace_buf_mapping;
1069 struct sw_rx_data *sw_rx_data_cons;
1070 struct sw_rx_data *sw_rx_data_prod;
1071 enum pkt_hash_types rxhash_type;
1072 u32 rxhash;
1073
1074 sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
1075 sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
1076
1077 /* Use pre-allocated replacement buffer - we can't release the agg.
1078 * start until its over and we don't want to risk allocation failing
1079 * here, so re-allocate when aggregation will be over.
1080 */
09ec8e7f 1081 sw_rx_data_prod->mapping = replace_buf->mapping;
55482edc
MC		 1082
1083 sw_rx_data_prod->data = replace_buf->data;
1084 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1085 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1086 sw_rx_data_prod->page_offset = replace_buf->page_offset;
1087
1088 rxq->sw_rx_prod++;
1089
1090 /* move partial skb from cons to pool (don't unmap yet)
1091 * save mapping, incase we drop the packet later on.
1092 */
1093 tpa_info->start_buf = *sw_rx_data_cons;
1094 mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
1095 le32_to_cpu(rx_bd_cons->addr.lo));
1096
1097 tpa_info->start_buf_mapping = mapping;
1098 rxq->sw_rx_cons++;
1099
1100 /* set tpa state to start only if we are able to allocate skb
1101 * for this aggregation, otherwise mark as error and aggregation will
1102 * be dropped
1103 */
1104 tpa_info->skb = netdev_alloc_skb(edev->ndev,
1105 le16_to_cpu(cqe->len_on_first_bd));
1106 if (unlikely(!tpa_info->skb)) {
f86af2df 1107 DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
55482edc 1108 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
f86af2df 1109 goto cons_buf;
55482edc
MC		 1110 }
1111
1112 skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
1113 memcpy(&tpa_info->start_cqe, cqe, sizeof(tpa_info->start_cqe));
1114
1115 /* Start filling in the aggregation info */
1116 tpa_info->frag_id = 0;
1117 tpa_info->agg_state = QEDE_AGG_STATE_START;
1118
1119 rxhash = qede_get_rxhash(edev, cqe->bitfields,
1120 cqe->rss_hash, &rxhash_type);
1121 skb_set_hash(tpa_info->skb, rxhash, rxhash_type);
1122 if ((le16_to_cpu(cqe->pars_flags.flags) >>
1123 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
1124 PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
1125 tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
1126 else
1127 tpa_info->vlan_tag = 0;
1128
1129 /* This is needed in order to enable forwarding support */
1130 qede_set_gro_params(edev, tpa_info->skb, cqe);
1131
f86af2df 1132cons_buf: /* We still need to handle bd_len_list to consume buffers */
55482edc
MC		 1133 if (likely(cqe->ext_bd_len_list[0]))
1134 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1135 le16_to_cpu(cqe->ext_bd_len_list[0]));
1136
1137 if (unlikely(cqe->ext_bd_len_list[1])) {
1138 DP_ERR(edev,
1139 "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
1140 tpa_info->agg_state = QEDE_AGG_STATE_ERROR;
1141 }
1142}
1143
88f09bd5 1144#ifdef CONFIG_INET
55482edc
MC		 1145static void qede_gro_ip_csum(struct sk_buff *skb)
1146{
1147 const struct iphdr *iph = ip_hdr(skb);
1148 struct tcphdr *th;
1149
55482edc
MC		 1150 skb_set_transport_header(skb, sizeof(struct iphdr));
1151 th = tcp_hdr(skb);
1152
1153 th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
1154 iph->saddr, iph->daddr, 0);
1155
1156 tcp_gro_complete(skb);
1157}
1158
1159static void qede_gro_ipv6_csum(struct sk_buff *skb)
1160{
1161 struct ipv6hdr *iph = ipv6_hdr(skb);
1162 struct tcphdr *th;
1163
55482edc
MC		 1164 skb_set_transport_header(skb, sizeof(struct ipv6hdr));
1165 th = tcp_hdr(skb);
1166
1167 th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
1168 &iph->saddr, &iph->daddr, 0);
1169 tcp_gro_complete(skb);
1170}
88f09bd5 1171#endif
55482edc
MC		 1172
1173static void qede_gro_receive(struct qede_dev *edev,
1174 struct qede_fastpath *fp,
1175 struct sk_buff *skb,
1176 u16 vlan_tag)
1177{
ee2fa8e6
MC		 1178 /* FW can send a single MTU sized packet from gro flow
1179 * due to aggregation timeout/last segment etc. which
1180 * is not expected to be a gro packet. If a skb has zero
1181 * frags then simply push it in the stack as non gso skb.
1182 */
1183 if (unlikely(!skb->data_len)) {
1184 skb_shinfo(skb)->gso_type = 0;
1185 skb_shinfo(skb)->gso_size = 0;
1186 goto send_skb;
1187 }
1188
88f09bd5 1189#ifdef CONFIG_INET
55482edc 1190 if (skb_shinfo(skb)->gso_size) {
aad94c04
MC		 1191 skb_set_network_header(skb, 0);
1192
55482edc
MC		 1193 switch (skb->protocol) {
1194 case htons(ETH_P_IP):
1195 qede_gro_ip_csum(skb);
1196 break;
1197 case htons(ETH_P_IPV6):
1198 qede_gro_ipv6_csum(skb);
1199 break;
1200 default:
1201 DP_ERR(edev,
1202 "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
1203 ntohs(skb->protocol));
1204 }
1205 }
88f09bd5 1206#endif
ee2fa8e6
MC		 1207
1208send_skb:
9a4d7e86 1209 skb_record_rx_queue(skb, fp->rxq->rxq_id);
55482edc
MC		 1210 qede_skb_receive(edev, fp, skb, vlan_tag);
1211}
1212
1213static inline void qede_tpa_cont(struct qede_dev *edev,
1214 struct qede_rx_queue *rxq,
1215 struct eth_fast_path_rx_tpa_cont_cqe *cqe)
1216{
1217 int i;
1218
1219 for (i = 0; cqe->len_list[i]; i++)
1220 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1221 le16_to_cpu(cqe->len_list[i]));
1222
1223 if (unlikely(i > 1))
1224 DP_ERR(edev,
1225 "Strange - TPA cont with more than a single len_list entry\n");
1226}
1227
1228static void qede_tpa_end(struct qede_dev *edev,
1229 struct qede_fastpath *fp,
1230 struct eth_fast_path_rx_tpa_end_cqe *cqe)
1231{
1232 struct qede_rx_queue *rxq = fp->rxq;
1233 struct qede_agg_info *tpa_info;
1234 struct sk_buff *skb;
1235 int i;
1236
1237 tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
1238 skb = tpa_info->skb;
1239
1240 for (i = 0; cqe->len_list[i]; i++)
1241 qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
1242 le16_to_cpu(cqe->len_list[i]));
1243 if (unlikely(i > 1))
1244 DP_ERR(edev,
1245 "Strange - TPA emd with more than a single len_list entry\n");
1246
1247 if (unlikely(tpa_info->agg_state != QEDE_AGG_STATE_START))
1248 goto err;
1249
1250 /* Sanity */
1251 if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
1252 DP_ERR(edev,
1253 "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
1254 cqe->num_of_bds, tpa_info->frag_id);
1255 if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
1256 DP_ERR(edev,
1257 "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
1258 le16_to_cpu(cqe->total_packet_len), skb->len);
1259
1260 memcpy(skb->data,
1261 page_address(tpa_info->start_buf.data) +
1262 tpa_info->start_cqe.placement_offset +
1263 tpa_info->start_buf.page_offset,
1264 le16_to_cpu(tpa_info->start_cqe.len_on_first_bd));
1265
1266 /* Recycle [mapped] start buffer for the next replacement */
1267 tpa_info->replace_buf = tpa_info->start_buf;
1268 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1269
1270 /* Finalize the SKB */
1271 skb->protocol = eth_type_trans(skb, edev->ndev);
1272 skb->ip_summed = CHECKSUM_UNNECESSARY;
1273
1274 /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
1275 * to skb_shinfo(skb)->gso_segs
1276 */
1277 NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
1278
1279 qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
1280
1281 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1282
1283 return;
1284err:
1285 /* The BD starting the aggregation is still mapped; Re-use it for
1286 * future aggregations [as replacement buffer]
1287 */
1288 memcpy(&tpa_info->replace_buf, &tpa_info->start_buf,
1289 sizeof(struct sw_rx_data));
1290 tpa_info->replace_buf_mapping = tpa_info->start_buf_mapping;
1291 tpa_info->start_buf.data = NULL;
1292 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
1293 dev_kfree_skb_any(tpa_info->skb);
1294 tpa_info->skb = NULL;
1295}
1296
14db81de
MC		 1297static bool qede_tunn_exist(u16 flag)
1298{
1299 return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
1300 PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
1301}
1302
1303static u8 qede_check_tunn_csum(u16 flag)
1304{
1305 u16 csum_flag = 0;
1306 u8 tcsum = 0;
1307
1308 if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
1309 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
1310 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
1311 PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
1312
1313 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1314 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
1315 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1316 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1317 tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
1318 }
1319
1320 csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
1321 PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
1322 PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1323 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1324
1325 if (csum_flag & flag)
1326 return QEDE_CSUM_ERROR;
1327
1328 return QEDE_CSUM_UNNECESSARY | tcsum;
1329}
1330
1331static u8 qede_check_notunn_csum(u16 flag)
2950219d
YM		 1332{
1333 u16 csum_flag = 0;
1334 u8 csum = 0;
1335
14db81de
MC		 1336 if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
1337 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
2950219d
YM		 1338 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
1339 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
1340 csum = QEDE_CSUM_UNNECESSARY;
1341 }
1342
1343 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
1344 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
1345
1346 if (csum_flag & flag)
1347 return QEDE_CSUM_ERROR;
1348
1349 return csum;
1350}
1351
14db81de
MC		 1352static u8 qede_check_csum(u16 flag)
1353{
1354 if (!qede_tunn_exist(flag))
1355 return qede_check_notunn_csum(flag);
1356 else
1357 return qede_check_tunn_csum(flag);
1358}
1359
c72a6125
MC		 1360static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
1361 u16 flag)
1362{
1363 u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
1364
1365 if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
1366 ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
1367 (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
1368 PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
1369 return true;
1370
1371 return false;
1372}
1373
2950219d
YM		 1374static int qede_rx_int(struct qede_fastpath *fp, int budget)
1375{
1376 struct qede_dev *edev = fp->edev;
1377 struct qede_rx_queue *rxq = fp->rxq;
1378
1379 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
1380 int rx_pkt = 0;
1381 u8 csum_flag;
1382
1383 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
1384 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1385
1386 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
1387 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
1388 * read before it is written by FW, then FW writes CQE and SB, and then
1389 * the CPU reads the hw_comp_cons, it will use an old CQE.
1390 */
1391 rmb();
1392
1393 /* Loop to complete all indicated BDs */
1394 while (sw_comp_cons != hw_comp_cons) {
1395 struct eth_fast_path_rx_reg_cqe *fp_cqe;
1396 enum pkt_hash_types rxhash_type;
1397 enum eth_rx_cqe_type cqe_type;
1398 struct sw_rx_data *sw_rx_data;
1399 union eth_rx_cqe *cqe;
1400 struct sk_buff *skb;
fc48b7a6
YM		 1401 struct page *data;
1402 __le16 flags;
2950219d
YM		 1403 u16 len, pad;
1404 u32 rx_hash;
2950219d
YM		 1405
1406 /* Get the CQE from the completion ring */
1407 cqe = (union eth_rx_cqe *)
1408 qed_chain_consume(&rxq->rx_comp_ring);
1409 cqe_type = cqe->fast_path_regular.type;
1410
1411 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
1412 edev->ops->eth_cqe_completion(
9a4d7e86 1413 edev->cdev, fp->id,
2950219d
YM		 1414 (struct eth_slow_path_rx_cqe *)cqe);
1415 goto next_cqe;
1416 }
1417
55482edc
MC		 1418 if (cqe_type != ETH_RX_CQE_TYPE_REGULAR) {
1419 switch (cqe_type) {
1420 case ETH_RX_CQE_TYPE_TPA_START:
1421 qede_tpa_start(edev, rxq,
1422 &cqe->fast_path_tpa_start);
1423 goto next_cqe;
1424 case ETH_RX_CQE_TYPE_TPA_CONT:
1425 qede_tpa_cont(edev, rxq,
1426 &cqe->fast_path_tpa_cont);
1427 goto next_cqe;
1428 case ETH_RX_CQE_TYPE_TPA_END:
1429 qede_tpa_end(edev, fp,
1430 &cqe->fast_path_tpa_end);
1431 goto next_rx_only;
1432 default:
1433 break;
1434 }
1435 }
1436
2950219d
YM		 1437 /* Get the data from the SW ring */
1438 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1439 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
1440 data = sw_rx_data->data;
1441
1442 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 1443 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 1444 pad = fp_cqe->placement_offset;
fc48b7a6 1445 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 1446
fc48b7a6
YM		 1447 /* If this is an error packet then drop it */
1448 parse_flag = le16_to_cpu(flags);
2950219d 1449
fc48b7a6
YM		 1450 csum_flag = qede_check_csum(parse_flag);
1451 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
c72a6125
MC		 1452 if (qede_pkt_is_ip_fragmented(&cqe->fast_path_regular,
1453 parse_flag)) {
1454 rxq->rx_ip_frags++;
1455 goto alloc_skb;
1456 }
1457
fc48b7a6
YM		 1458 DP_NOTICE(edev,
1459 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
1460 sw_comp_cons, parse_flag);
1461 rxq->rx_hw_errors++;
f86af2df
MC		 1462 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
1463 goto next_cqe;
fc48b7a6 1464 }
2950219d 1465
c72a6125 1466alloc_skb:
fc48b7a6
YM		 1467 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
1468 if (unlikely(!skb)) {
2950219d 1469 DP_NOTICE(edev,
525ef5c0 1470 "skb allocation failed, dropping incoming packet\n");
f86af2df 1471 qede_recycle_rx_bd_ring(rxq, edev, fp_cqe->bd_num);
2950219d 1472 rxq->rx_alloc_errors++;
f86af2df 1473 goto next_cqe;
fc48b7a6
YM		 1474 }
1475
1476 /* Copy data into SKB */
3d789994 1477 if (len + pad <= edev->rx_copybreak) {
fc48b7a6
YM		 1478 memcpy(skb_put(skb, len),
1479 page_address(data) + pad +
1480 sw_rx_data->page_offset, len);
1481 qede_reuse_page(edev, rxq, sw_rx_data);
1482 } else {
1483 struct skb_frag_struct *frag;
1484 unsigned int pull_len;
1485 unsigned char *va;
1486
1487 frag = &skb_shinfo(skb)->frags[0];
1488
1489 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
1490 pad + sw_rx_data->page_offset,
1491 len, rxq->rx_buf_seg_size);
1492
1493 va = skb_frag_address(frag);
1494 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
1495
1496 /* Align the pull_len to optimize memcpy */
1497 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
1498
1499 skb_frag_size_sub(frag, pull_len);
1500 frag->page_offset += pull_len;
1501 skb->data_len -= pull_len;
1502 skb->tail += pull_len;
1503
1504 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
1505 sw_rx_data))) {
1506 DP_ERR(edev, "Failed to allocate rx buffer\n");
f86af2df
MC		 1507 /* Incr page ref count to reuse on allocation
1508 * failure so that it doesn't get freed while
1509 * freeing SKB.
1510 */
1511
0139aa7b 1512 page_ref_inc(sw_rx_data->data);
fc48b7a6 1513 rxq->rx_alloc_errors++;
f86af2df
MC		 1514 qede_recycle_rx_bd_ring(rxq, edev,
1515 fp_cqe->bd_num);
1516 dev_kfree_skb_any(skb);
fc48b7a6
YM		 1517 goto next_cqe;
1518 }
2950219d
YM		 1519 }
1520
f86af2df
MC		 1521 qede_rx_bd_ring_consume(rxq);
1522
fc48b7a6
YM		 1523 if (fp_cqe->bd_num != 1) {
1524 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
1525 u8 num_frags;
1526
1527 pkt_len -= len;
1528
1529 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
1530 num_frags--) {
1531 u16 cur_size = pkt_len > rxq->rx_buf_size ?
1532 rxq->rx_buf_size : pkt_len;
f86af2df
MC		 1533 if (unlikely(!cur_size)) {
1534 DP_ERR(edev,
1535 "Still got %d BDs for mapping jumbo, but length became 0\n",
1536 num_frags);
1537 qede_recycle_rx_bd_ring(rxq, edev,
1538 num_frags);
1539 dev_kfree_skb_any(skb);
1540 goto next_cqe;
1541 }
fc48b7a6 1542
f86af2df
MC		 1543 if (unlikely(qede_alloc_rx_buffer(edev, rxq))) {
1544 qede_recycle_rx_bd_ring(rxq, edev,
1545 num_frags);
1546 dev_kfree_skb_any(skb);
fc48b7a6 1547 goto next_cqe;
f86af2df 1548 }
fc48b7a6 1549
fc48b7a6
YM		 1550 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
1551 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
f86af2df
MC		 1552 qede_rx_bd_ring_consume(rxq);
1553
fc48b7a6
YM		 1554 dma_unmap_page(&edev->pdev->dev,
1555 sw_rx_data->mapping,
1556 PAGE_SIZE, DMA_FROM_DEVICE);
1557
1558 skb_fill_page_desc(skb,
1559 skb_shinfo(skb)->nr_frags++,
1560 sw_rx_data->data, 0,
1561 cur_size);
1562
1563 skb->truesize += PAGE_SIZE;
1564 skb->data_len += cur_size;
1565 skb->len += cur_size;
1566 pkt_len -= cur_size;
1567 }
2950219d 1568
f86af2df 1569 if (unlikely(pkt_len))
fc48b7a6
YM		 1570 DP_ERR(edev,
1571 "Mapped all BDs of jumbo, but still have %d bytes\n",
1572 pkt_len);
1573 }
2950219d
YM		 1574
1575 skb->protocol = eth_type_trans(skb, edev->ndev);
1576
1577 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1a635e48 1578 fp_cqe->rss_hash, &rxhash_type);
2950219d
YM		 1579
1580 skb_set_hash(skb, rx_hash, rxhash_type);
1581
1582 qede_set_skb_csum(skb, csum_flag);
1583
9a4d7e86 1584 skb_record_rx_queue(skb, fp->rxq->rxq_id);
2950219d
YM		 1585
1586 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
55482edc 1587next_rx_only:
2950219d
YM		 1588 rx_pkt++;
1589
1590next_cqe: /* don't consume bd rx buffer */
1591 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1592 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1593 /* CR TPA - revisit how to handle budget in TPA perhaps
1594 * increase on "end"
1595 */
1596 if (rx_pkt == budget)
1597 break;
1598 } /* repeat while sw_comp_cons != hw_comp_cons... */
1599
1600 /* Update producers */
1601 qede_update_rx_prod(edev, rxq);
1602
68db9ec2
SRK		 1603 rxq->rcv_pkts += rx_pkt;
1604
2950219d
YM		 1605 return rx_pkt;
1606}
1607
1608static int qede_poll(struct napi_struct *napi, int budget)
1609{
2950219d 1610 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
c774169d 1611 napi);
2950219d 1612 struct qede_dev *edev = fp->edev;
c774169d
MC		 1613 int rx_work_done = 0;
1614 u8 tc;
2950219d 1615
c774169d 1616 for (tc = 0; tc < edev->num_tc; tc++)
9a4d7e86
SRK		 1617 if (likely(fp->type & QEDE_FASTPATH_TX) &&
1618 qede_txq_has_work(&fp->txqs[tc]))
c774169d
MC		 1619 qede_tx_int(edev, &fp->txqs[tc]);
1620
9a4d7e86
SRK		 1621 rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
1622 qede_has_rx_work(fp->rxq)) ?
c774169d
MC		 1623 qede_rx_int(fp, budget) : 0;
1624 if (rx_work_done < budget) {
1625 qed_sb_update_sb_idx(fp->sb_info);
1626 /* *_has_*_work() reads the status block,
1627 * thus we need to ensure that status block indices
1628 * have been actually read (qed_sb_update_sb_idx)
1629 * prior to this check (*_has_*_work) so that
1630 * we won't write the "newer" value of the status block
1631 * to HW (if there was a DMA right after
1632 * qede_has_rx_work and if there is no rmb, the memory
1633 * reading (qed_sb_update_sb_idx) may be postponed
1634 * to right before *_ack_sb). In this case there
1635 * will never be another interrupt until there is
1636 * another update of the status block, while there
1637 * is still unhandled work.
1638 */
1639 rmb();
2950219d
YM		 1640
1641 /* Fall out from the NAPI loop if needed */
9a4d7e86
SRK		 1642 if (!((likely(fp->type & QEDE_FASTPATH_RX) &&
1643 qede_has_rx_work(fp->rxq)) ||
1644 (likely(fp->type & QEDE_FASTPATH_TX) &&
1645 qede_has_tx_work(fp)))) {
c774169d
MC		 1646 napi_complete(napi);
1647
1648 /* Update and reenable interrupts */
1649 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1650 1 /*update*/);
1651 } else {
1652 rx_work_done = budget;
2950219d
YM		 1653 }
1654 }
1655
c774169d 1656 return rx_work_done;
2950219d
YM		 1657}
1658
1659static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1660{
1661 struct qede_fastpath *fp = fp_cookie;
1662
1663 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1664
1665 napi_schedule_irqoff(&fp->napi);
1666 return IRQ_HANDLED;
1667}
1668
1669/* -------------------------------------------------------------------------
1670 * END OF FAST-PATH
1671 * -------------------------------------------------------------------------
1672 */
1673
1674static int qede_open(struct net_device *ndev);
1675static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1676static int qede_set_mac_addr(struct net_device *ndev, void *p);
1677static void qede_set_rx_mode(struct net_device *ndev);
1678static void qede_config_rx_mode(struct net_device *ndev);
1679
1680static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1681 enum qed_filter_xcast_params_type opcode,
1682 unsigned char mac[ETH_ALEN])
1683{
1684 struct qed_filter_params filter_cmd;
1685
1686 memset(&filter_cmd, 0, sizeof(filter_cmd));
1687 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1688 filter_cmd.filter.ucast.type = opcode;
1689 filter_cmd.filter.ucast.mac_valid = 1;
1690 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1691
1692 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1693}
1694
7c1bfcad
SRK		 1695static int qede_set_ucast_rx_vlan(struct qede_dev *edev,
1696 enum qed_filter_xcast_params_type opcode,
1697 u16 vid)
1698{
1699 struct qed_filter_params filter_cmd;
1700
1701 memset(&filter_cmd, 0, sizeof(filter_cmd));
1702 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1703 filter_cmd.filter.ucast.type = opcode;
1704 filter_cmd.filter.ucast.vlan_valid = 1;
1705 filter_cmd.filter.ucast.vlan = vid;
1706
1707 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1708}
1709
133fac0e
SK		 1710void qede_fill_by_demand_stats(struct qede_dev *edev)
1711{
1712 struct qed_eth_stats stats;
1713
1714 edev->ops->get_vport_stats(edev->cdev, &stats);
1715 edev->stats.no_buff_discards = stats.no_buff_discards;
1a5a366f
SRK		 1716 edev->stats.packet_too_big_discard = stats.packet_too_big_discard;
1717 edev->stats.ttl0_discard = stats.ttl0_discard;
133fac0e
SK		 1718 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1719 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1720 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1721 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1722 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1723 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1724 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1725 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1726
1727 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1728 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1729 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1730 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1731 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1732 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1733 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1734 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1735 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1736 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1737 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1738 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1739
1740 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
d4967cf3
YM		 1741 edev->stats.rx_65_to_127_byte_packets = stats.rx_65_to_127_byte_packets;
1742 edev->stats.rx_128_to_255_byte_packets =
1743 stats.rx_128_to_255_byte_packets;
1744 edev->stats.rx_256_to_511_byte_packets =
1745 stats.rx_256_to_511_byte_packets;
1746 edev->stats.rx_512_to_1023_byte_packets =
1747 stats.rx_512_to_1023_byte_packets;
1748 edev->stats.rx_1024_to_1518_byte_packets =
1749 stats.rx_1024_to_1518_byte_packets;
1750 edev->stats.rx_1519_to_1522_byte_packets =
1751 stats.rx_1519_to_1522_byte_packets;
1752 edev->stats.rx_1519_to_2047_byte_packets =
1753 stats.rx_1519_to_2047_byte_packets;
1754 edev->stats.rx_2048_to_4095_byte_packets =
1755 stats.rx_2048_to_4095_byte_packets;
1756 edev->stats.rx_4096_to_9216_byte_packets =
1757 stats.rx_4096_to_9216_byte_packets;
1758 edev->stats.rx_9217_to_16383_byte_packets =
1759 stats.rx_9217_to_16383_byte_packets;
133fac0e
SK		 1760 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1761 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1762 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1763 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1764 edev->stats.rx_align_errors = stats.rx_align_errors;
1765 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1766 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1767 edev->stats.rx_jabbers = stats.rx_jabbers;
1768 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1769 edev->stats.rx_fragments = stats.rx_fragments;
1770 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1771 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1772 edev->stats.tx_128_to_255_byte_packets =
1773 stats.tx_128_to_255_byte_packets;
1774 edev->stats.tx_256_to_511_byte_packets =
1775 stats.tx_256_to_511_byte_packets;
1776 edev->stats.tx_512_to_1023_byte_packets =
1777 stats.tx_512_to_1023_byte_packets;
1778 edev->stats.tx_1024_to_1518_byte_packets =
1779 stats.tx_1024_to_1518_byte_packets;
1780 edev->stats.tx_1519_to_2047_byte_packets =
1781 stats.tx_1519_to_2047_byte_packets;
1782 edev->stats.tx_2048_to_4095_byte_packets =
1783 stats.tx_2048_to_4095_byte_packets;
1784 edev->stats.tx_4096_to_9216_byte_packets =
1785 stats.tx_4096_to_9216_byte_packets;
1786 edev->stats.tx_9217_to_16383_byte_packets =
1787 stats.tx_9217_to_16383_byte_packets;
1788 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1789 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1790 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1791 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1792 edev->stats.brb_truncates = stats.brb_truncates;
1793 edev->stats.brb_discards = stats.brb_discards;
1794 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1795}
1796
1a635e48
YM		 1797static
1798struct rtnl_link_stats64 *qede_get_stats64(struct net_device *dev,
1799 struct rtnl_link_stats64 *stats)
133fac0e
SK		 1800{
1801 struct qede_dev *edev = netdev_priv(dev);
1802
1803 qede_fill_by_demand_stats(edev);
1804
1805 stats->rx_packets = edev->stats.rx_ucast_pkts +
1806 edev->stats.rx_mcast_pkts +
1807 edev->stats.rx_bcast_pkts;
1808 stats->tx_packets = edev->stats.tx_ucast_pkts +
1809 edev->stats.tx_mcast_pkts +
1810 edev->stats.tx_bcast_pkts;
1811
1812 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1813 edev->stats.rx_mcast_bytes +
1814 edev->stats.rx_bcast_bytes;
1815
1816 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1817 edev->stats.tx_mcast_bytes +
1818 edev->stats.tx_bcast_bytes;
1819
1820 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1821 stats->multicast = edev->stats.rx_mcast_pkts +
1822 edev->stats.rx_bcast_pkts;
1823
1824 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1825
1826 stats->collisions = edev->stats.tx_total_collisions;
1827 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1828 stats->rx_frame_errors = edev->stats.rx_align_errors;
1829
1830 return stats;
1831}
1832
733def6a 1833#ifdef CONFIG_QED_SRIOV
73390ac9
YM		 1834static int qede_get_vf_config(struct net_device *dev, int vfidx,
1835 struct ifla_vf_info *ivi)
1836{
1837 struct qede_dev *edev = netdev_priv(dev);
1838
1839 if (!edev->ops)
1840 return -EINVAL;
1841
1842 return edev->ops->iov->get_config(edev->cdev, vfidx, ivi);
1843}
1844
733def6a
YM		 1845static int qede_set_vf_rate(struct net_device *dev, int vfidx,
1846 int min_tx_rate, int max_tx_rate)
1847{
1848 struct qede_dev *edev = netdev_priv(dev);
1849
be7b6d64 1850 return edev->ops->iov->set_rate(edev->cdev, vfidx, min_tx_rate,
733def6a
YM		 1851 max_tx_rate);
1852}
1853
6ddc7608
YM		 1854static int qede_set_vf_spoofchk(struct net_device *dev, int vfidx, bool val)
1855{
1856 struct qede_dev *edev = netdev_priv(dev);
1857
1858 if (!edev->ops)
1859 return -EINVAL;
1860
1861 return edev->ops->iov->set_spoof(edev->cdev, vfidx, val);
1862}
1863
733def6a
YM		 1864static int qede_set_vf_link_state(struct net_device *dev, int vfidx,
1865 int link_state)
1866{
1867 struct qede_dev *edev = netdev_priv(dev);
1868
1869 if (!edev->ops)
1870 return -EINVAL;
1871
1872 return edev->ops->iov->set_link_state(edev->cdev, vfidx, link_state);
1873}
1874#endif
1875
7c1bfcad
SRK		 1876static void qede_config_accept_any_vlan(struct qede_dev *edev, bool action)
1877{
1878 struct qed_update_vport_params params;
1879 int rc;
1880
1881 /* Proceed only if action actually needs to be performed */
1882 if (edev->accept_any_vlan == action)
1883 return;
1884
1885 memset(&params, 0, sizeof(params));
1886
1887 params.vport_id = 0;
1888 params.accept_any_vlan = action;
1889 params.update_accept_any_vlan_flg = 1;
1890
1891 rc = edev->ops->vport_update(edev->cdev, &params);
1892 if (rc) {
1893 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
1894 action ? "enable" : "disable");
1895 } else {
1896 DP_INFO(edev, "%s accept-any-vlan\n",
1897 action ? "enabled" : "disabled");
1898 edev->accept_any_vlan = action;
1899 }
1900}
1901
1902static int qede_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
1903{
1904 struct qede_dev *edev = netdev_priv(dev);
1905 struct qede_vlan *vlan, *tmp;
1906 int rc;
1907
1908 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan 0x%04x\n", vid);
1909
1910 vlan = kzalloc(sizeof(*vlan), GFP_KERNEL);
1911 if (!vlan) {
1912 DP_INFO(edev, "Failed to allocate struct for vlan\n");
1913 return -ENOMEM;
1914 }
1915 INIT_LIST_HEAD(&vlan->list);
1916 vlan->vid = vid;
1917 vlan->configured = false;
1918
1919 /* Verify vlan isn't already configured */
1920 list_for_each_entry(tmp, &edev->vlan_list, list) {
1921 if (tmp->vid == vlan->vid) {
1922 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
1923 "vlan already configured\n");
1924 kfree(vlan);
1925 return -EEXIST;
1926 }
1927 }
1928
1929 /* If interface is down, cache this VLAN ID and return */
1930 if (edev->state != QEDE_STATE_OPEN) {
1931 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1932 "Interface is down, VLAN %d will be configured when interface is up\n",
1933 vid);
1934 if (vid != 0)
1935 edev->non_configured_vlans++;
1936 list_add(&vlan->list, &edev->vlan_list);
1937
1938 return 0;
1939 }
1940
1941 /* Check for the filter limit.
1942 * Note - vlan0 has a reserved filter and can be added without
1943 * worrying about quota
1944 */
1945 if ((edev->configured_vlans < edev->dev_info.num_vlan_filters) ||
1946 (vlan->vid == 0)) {
1947 rc = qede_set_ucast_rx_vlan(edev,
1948 QED_FILTER_XCAST_TYPE_ADD,
1949 vlan->vid);
1950 if (rc) {
1951 DP_ERR(edev, "Failed to configure VLAN %d\n",
1952 vlan->vid);
1953 kfree(vlan);
1954 return -EINVAL;
1955 }
1956 vlan->configured = true;
1957
1958 /* vlan0 filter isn't consuming out of our quota */
1959 if (vlan->vid != 0)
1960 edev->configured_vlans++;
1961 } else {
1962 /* Out of quota; Activate accept-any-VLAN mode */
1963 if (!edev->non_configured_vlans)
1964 qede_config_accept_any_vlan(edev, true);
1965
1966 edev->non_configured_vlans++;
1967 }
1968
1969 list_add(&vlan->list, &edev->vlan_list);
1970
1971 return 0;
1972}
1973
1974static void qede_del_vlan_from_list(struct qede_dev *edev,
1975 struct qede_vlan *vlan)
1976{
1977 /* vlan0 filter isn't consuming out of our quota */
1978 if (vlan->vid != 0) {
1979 if (vlan->configured)
1980 edev->configured_vlans--;
1981 else
1982 edev->non_configured_vlans--;
1983 }
1984
1985 list_del(&vlan->list);
1986 kfree(vlan);
1987}
1988
1989static int qede_configure_vlan_filters(struct qede_dev *edev)
1990{
1991 int rc = 0, real_rc = 0, accept_any_vlan = 0;
1992 struct qed_dev_eth_info *dev_info;
1993 struct qede_vlan *vlan = NULL;
1994
1995 if (list_empty(&edev->vlan_list))
1996 return 0;
1997
1998 dev_info = &edev->dev_info;
1999
2000 /* Configure non-configured vlans */
2001 list_for_each_entry(vlan, &edev->vlan_list, list) {
2002 if (vlan->configured)
2003 continue;
2004
2005 /* We have used all our credits, now enable accept_any_vlan */
2006 if ((vlan->vid != 0) &&
2007 (edev->configured_vlans == dev_info->num_vlan_filters)) {
2008 accept_any_vlan = 1;
2009 continue;
2010 }
2011
2012 DP_VERBOSE(edev, NETIF_MSG_IFUP, "Adding vlan %d\n", vlan->vid);
2013
2014 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_ADD,
2015 vlan->vid);
2016 if (rc) {
2017 DP_ERR(edev, "Failed to configure VLAN %u\n",
2018 vlan->vid);
2019 real_rc = rc;
2020 continue;
2021 }
2022
2023 vlan->configured = true;
2024 /* vlan0 filter doesn't consume our VLAN filter's quota */
2025 if (vlan->vid != 0) {
2026 edev->non_configured_vlans--;
2027 edev->configured_vlans++;
2028 }
2029 }
2030
2031 /* enable accept_any_vlan mode if we have more VLANs than credits,
2032 * or remove accept_any_vlan mode if we've actually removed
2033 * a non-configured vlan, and all remaining vlans are truly configured.
2034 */
2035
2036 if (accept_any_vlan)
2037 qede_config_accept_any_vlan(edev, true);
2038 else if (!edev->non_configured_vlans)
2039 qede_config_accept_any_vlan(edev, false);
2040
2041 return real_rc;
2042}
2043
2044static int qede_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
2045{
2046 struct qede_dev *edev = netdev_priv(dev);
2047 struct qede_vlan *vlan = NULL;
2048 int rc;
2049
2050 DP_VERBOSE(edev, NETIF_MSG_IFDOWN, "Removing vlan 0x%04x\n", vid);
2051
2052 /* Find whether entry exists */
2053 list_for_each_entry(vlan, &edev->vlan_list, list)
2054 if (vlan->vid == vid)
2055 break;
2056
2057 if (!vlan || (vlan->vid != vid)) {
2058 DP_VERBOSE(edev, (NETIF_MSG_IFUP | NETIF_MSG_IFDOWN),
2059 "Vlan isn't configured\n");
2060 return 0;
2061 }
2062
2063 if (edev->state != QEDE_STATE_OPEN) {
2064 /* As interface is already down, we don't have a VPORT
2065 * instance to remove vlan filter. So just update vlan list
2066 */
2067 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
2068 "Interface is down, removing VLAN from list only\n");
2069 qede_del_vlan_from_list(edev, vlan);
2070 return 0;
2071 }
2072
2073 /* Remove vlan */
c524e2f5
YM		 2074 if (vlan->configured) {
2075 rc = qede_set_ucast_rx_vlan(edev, QED_FILTER_XCAST_TYPE_DEL,
2076 vid);
2077 if (rc) {
2078 DP_ERR(edev, "Failed to remove VLAN %d\n", vid);
2079 return -EINVAL;
2080 }
7c1bfcad
SRK		 2081 }
2082
2083 qede_del_vlan_from_list(edev, vlan);
2084
2085 /* We have removed a VLAN - try to see if we can
2086 * configure non-configured VLAN from the list.
2087 */
2088 rc = qede_configure_vlan_filters(edev);
2089
2090 return rc;
2091}
2092
2093static void qede_vlan_mark_nonconfigured(struct qede_dev *edev)
2094{
2095 struct qede_vlan *vlan = NULL;
2096
2097 if (list_empty(&edev->vlan_list))
2098 return;
2099
2100 list_for_each_entry(vlan, &edev->vlan_list, list) {
2101 if (!vlan->configured)
2102 continue;
2103
2104 vlan->configured = false;
2105
2106 /* vlan0 filter isn't consuming out of our quota */
2107 if (vlan->vid != 0) {
2108 edev->non_configured_vlans++;
2109 edev->configured_vlans--;
2110 }
2111
2112 DP_VERBOSE(edev, NETIF_MSG_IFDOWN,
1a635e48 2113 "marked vlan %d as non-configured\n", vlan->vid);
7c1bfcad
SRK		 2114 }
2115
2116 edev->accept_any_vlan = false;
2117}
2118
9438451e 2119static int qede_set_features(struct net_device *dev, netdev_features_t features)
ce2b885c
YM		 2120{
2121 struct qede_dev *edev = netdev_priv(dev);
2122 netdev_features_t changes = features ^ dev->features;
2123 bool need_reload = false;
2124
2125 /* No action needed if hardware GRO is disabled during driver load */
2126 if (changes & NETIF_F_GRO) {
2127 if (dev->features & NETIF_F_GRO)
2128 need_reload = !edev->gro_disable;
2129 else
2130 need_reload = edev->gro_disable;
2131 }
2132
2133 if (need_reload && netif_running(edev->ndev)) {
2134 dev->features = features;
2135 qede_reload(edev, NULL, NULL);
2136 return 1;
2137 }
2138
2139 return 0;
2140}
2141
f9f082a9
AD		 2142static void qede_udp_tunnel_add(struct net_device *dev,
2143 struct udp_tunnel_info *ti)
b18e170c
MC		 2144{
2145 struct qede_dev *edev = netdev_priv(dev);
f9f082a9 2146 u16 t_port = ntohs(ti->port);
b18e170c 2147
f9f082a9
AD		 2148 switch (ti->type) {
2149 case UDP_TUNNEL_TYPE_VXLAN:
2150 if (edev->vxlan_dst_port)
2151 return;
b18e170c 2152
f9f082a9 2153 edev->vxlan_dst_port = t_port;
b18e170c 2154
525ef5c0 2155 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added vxlan port=%d\n",
f9f082a9 2156 t_port);
b18e170c 2157
f9f082a9
AD		 2158 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2159 break;
2160 case UDP_TUNNEL_TYPE_GENEVE:
2161 if (edev->geneve_dst_port)
2162 return;
b18e170c 2163
f9f082a9 2164 edev->geneve_dst_port = t_port;
b18e170c 2165
525ef5c0 2166 DP_VERBOSE(edev, QED_MSG_DEBUG, "Added geneve port=%d\n",
f9f082a9
AD		 2167 t_port);
2168 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2169 break;
2170 default:
b18e170c 2171 return;
f9f082a9 2172 }
b18e170c 2173
b18e170c
MC		 2174 schedule_delayed_work(&edev->sp_task, 0);
2175}
b18e170c 2176
f9f082a9
AD		 2177static void qede_udp_tunnel_del(struct net_device *dev,
2178 struct udp_tunnel_info *ti)
9a109dd0
MC		 2179{
2180 struct qede_dev *edev = netdev_priv(dev);
f9f082a9 2181 u16 t_port = ntohs(ti->port);
9a109dd0 2182
f9f082a9
AD		 2183 switch (ti->type) {
2184 case UDP_TUNNEL_TYPE_VXLAN:
2185 if (t_port != edev->vxlan_dst_port)
2186 return;
9a109dd0 2187
f9f082a9 2188 edev->vxlan_dst_port = 0;
9a109dd0 2189
525ef5c0 2190 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted vxlan port=%d\n",
f9f082a9 2191 t_port);
9a109dd0 2192
f9f082a9
AD		 2193 set_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags);
2194 break;
2195 case UDP_TUNNEL_TYPE_GENEVE:
2196 if (t_port != edev->geneve_dst_port)
2197 return;
9a109dd0 2198
f9f082a9 2199 edev->geneve_dst_port = 0;
9a109dd0 2200
525ef5c0 2201 DP_VERBOSE(edev, QED_MSG_DEBUG, "Deleted geneve port=%d\n",
f9f082a9
AD		 2202 t_port);
2203 set_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags);
2204 break;
2205 default:
2206 return;
2207 }
9a109dd0 2208
9a109dd0
MC		 2209 schedule_delayed_work(&edev->sp_task, 0);
2210}
9a109dd0 2211
2950219d
YM		 2212static const struct net_device_ops qede_netdev_ops = {
2213 .ndo_open = qede_open,
2214 .ndo_stop = qede_close,
2215 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 2216 .ndo_set_rx_mode = qede_set_rx_mode,
2217 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 2218 .ndo_validate_addr = eth_validate_addr,
133fac0e 2219 .ndo_change_mtu = qede_change_mtu,
08feecd7 2220#ifdef CONFIG_QED_SRIOV
eff16960 2221 .ndo_set_vf_mac = qede_set_vf_mac,
08feecd7
YM		 2222 .ndo_set_vf_vlan = qede_set_vf_vlan,
2223#endif
7c1bfcad
SRK		 2224 .ndo_vlan_rx_add_vid = qede_vlan_rx_add_vid,
2225 .ndo_vlan_rx_kill_vid = qede_vlan_rx_kill_vid,
ce2b885c 2226 .ndo_set_features = qede_set_features,
133fac0e 2227 .ndo_get_stats64 = qede_get_stats64,
733def6a
YM		 2228#ifdef CONFIG_QED_SRIOV
2229 .ndo_set_vf_link_state = qede_set_vf_link_state,
6ddc7608 2230 .ndo_set_vf_spoofchk = qede_set_vf_spoofchk,
73390ac9 2231 .ndo_get_vf_config = qede_get_vf_config,
733def6a
YM		 2232 .ndo_set_vf_rate = qede_set_vf_rate,
2233#endif
f9f082a9
AD		 2234 .ndo_udp_tunnel_add = qede_udp_tunnel_add,
2235 .ndo_udp_tunnel_del = qede_udp_tunnel_del,
2950219d
YM		 2236};
2237
e712d52b
YM		 2238/* -------------------------------------------------------------------------
2239 * START OF PROBE / REMOVE
2240 * -------------------------------------------------------------------------
2241 */
2242
2243static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
2244 struct pci_dev *pdev,
2245 struct qed_dev_eth_info *info,
1a635e48 2246 u32 dp_module, u8 dp_level)
e712d52b
YM		 2247{
2248 struct net_device *ndev;
2249 struct qede_dev *edev;
2250
2251 ndev = alloc_etherdev_mqs(sizeof(*edev),
1a635e48 2252 info->num_queues, info->num_queues);
e712d52b
YM		 2253 if (!ndev) {
2254 pr_err("etherdev allocation failed\n");
2255 return NULL;
2256 }
2257
2258 edev = netdev_priv(ndev);
2259 edev->ndev = ndev;
2260 edev->cdev = cdev;
2261 edev->pdev = pdev;
2262 edev->dp_module = dp_module;
2263 edev->dp_level = dp_level;
2264 edev->ops = qed_ops;
2950219d
YM		 2265 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
2266 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b 2267
525ef5c0
YM		 2268 DP_INFO(edev, "Allocated netdev with %d tx queues and %d rx queues\n",
2269 info->num_queues, info->num_queues);
2270
e712d52b
YM		 2271 SET_NETDEV_DEV(ndev, &pdev->dev);
2272
133fac0e 2273 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 2274 memcpy(&edev->dev_info, info, sizeof(*info));
2275
2276 edev->num_tc = edev->dev_info.num_tc;
2277
7c1bfcad
SRK		 2278 INIT_LIST_HEAD(&edev->vlan_list);
2279
e712d52b
YM		 2280 return edev;
2281}
2282
2283static void qede_init_ndev(struct qede_dev *edev)
2284{
2285 struct net_device *ndev = edev->ndev;
2286 struct pci_dev *pdev = edev->pdev;
2287 u32 hw_features;
2288
2289 pci_set_drvdata(pdev, ndev);
2290
2291 ndev->mem_start = edev->dev_info.common.pci_mem_start;
2292 ndev->base_addr = ndev->mem_start;
2293 ndev->mem_end = edev->dev_info.common.pci_mem_end;
2294 ndev->irq = edev->dev_info.common.pci_irq;
2295
2296 ndev->watchdog_timeo = TX_TIMEOUT;
2297
2950219d
YM		 2298 ndev->netdev_ops = &qede_netdev_ops;
2299
133fac0e
SK		 2300 qede_set_ethtool_ops(ndev);
2301
e712d52b
YM		 2302 /* user-changeble features */
2303 hw_features = NETIF_F_GRO | NETIF_F_SG |
2304 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2305 NETIF_F_TSO | NETIF_F_TSO6;
2306
14db81de
MC		 2307 /* Encap features*/
2308 hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
2309 NETIF_F_TSO_ECN;
2310 ndev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
2311 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO_ECN |
2312 NETIF_F_TSO6 | NETIF_F_GSO_GRE |
2313 NETIF_F_GSO_UDP_TUNNEL | NETIF_F_RXCSUM;
2314
e712d52b
YM		 2315 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2316 NETIF_F_HIGHDMA;
2317 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
2318 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
7c1bfcad 2319 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_TX;
e712d52b
YM		 2320
2321 ndev->hw_features = hw_features;
2322
2323 /* Set network device HW mac */
2324 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
2325}
2326
2327/* This function converts from 32b param to two params of level and module
2328 * Input 32b decoding:
2329 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
2330 * 'happy' flow, e.g. memory allocation failed.
2331 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
2332 * and provide important parameters.
2333 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
2334 * module. VERBOSE prints are for tracking the specific flow in low level.
2335 *
2336 * Notice that the level should be that of the lowest required logs.
2337 */
133fac0e 2338void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 2339{
2340 *p_dp_level = QED_LEVEL_NOTICE;
2341 *p_dp_module = 0;
2342
2343 if (debug & QED_LOG_VERBOSE_MASK) {
2344 *p_dp_level = QED_LEVEL_VERBOSE;
2345 *p_dp_module = (debug & 0x3FFFFFFF);
2346 } else if (debug & QED_LOG_INFO_MASK) {
2347 *p_dp_level = QED_LEVEL_INFO;
2348 } else if (debug & QED_LOG_NOTICE_MASK) {
2349 *p_dp_level = QED_LEVEL_NOTICE;
2350 }
2351}
2352
2950219d
YM		 2353static void qede_free_fp_array(struct qede_dev *edev)
2354{
2355 if (edev->fp_array) {
2356 struct qede_fastpath *fp;
2357 int i;
2358
9a4d7e86 2359 for_each_queue(i) {
2950219d
YM		 2360 fp = &edev->fp_array[i];
2361
2362 kfree(fp->sb_info);
2363 kfree(fp->rxq);
2364 kfree(fp->txqs);
2365 }
2366 kfree(edev->fp_array);
2367 }
9a4d7e86
SRK		 2368
2369 edev->num_queues = 0;
2370 edev->fp_num_tx = 0;
2371 edev->fp_num_rx = 0;
2950219d
YM		 2372}
2373
2374static int qede_alloc_fp_array(struct qede_dev *edev)
2375{
9a4d7e86 2376 u8 fp_combined, fp_rx = edev->fp_num_rx;
2950219d
YM		 2377 struct qede_fastpath *fp;
2378 int i;
2379
9a4d7e86 2380 edev->fp_array = kcalloc(QEDE_QUEUE_CNT(edev),
2950219d
YM		 2381 sizeof(*edev->fp_array), GFP_KERNEL);
2382 if (!edev->fp_array) {
2383 DP_NOTICE(edev, "fp array allocation failed\n");
2384 goto err;
2385 }
2386
9a4d7e86
SRK		 2387 fp_combined = QEDE_QUEUE_CNT(edev) - fp_rx - edev->fp_num_tx;
2388
2389 /* Allocate the FP elements for Rx queues followed by combined and then
2390 * the Tx. This ordering should be maintained so that the respective
2391 * queues (Rx or Tx) will be together in the fastpath array and the
2392 * associated ids will be sequential.
2393 */
2394 for_each_queue(i) {
2950219d
YM		 2395 fp = &edev->fp_array[i];
2396
2397 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
2398 if (!fp->sb_info) {
2399 DP_NOTICE(edev, "sb info struct allocation failed\n");
2400 goto err;
2401 }
2402
9a4d7e86
SRK		 2403 if (fp_rx) {
2404 fp->type = QEDE_FASTPATH_RX;
2405 fp_rx--;
2406 } else if (fp_combined) {
2407 fp->type = QEDE_FASTPATH_COMBINED;
2408 fp_combined--;
2409 } else {
2410 fp->type = QEDE_FASTPATH_TX;
2950219d
YM		 2411 }
2412
9a4d7e86
SRK		 2413 if (fp->type & QEDE_FASTPATH_TX) {
2414 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs),
2415 GFP_KERNEL);
2416 if (!fp->txqs) {
2417 DP_NOTICE(edev,
2418 "TXQ array allocation failed\n");
2419 goto err;
2420 }
2421 }
2422
2423 if (fp->type & QEDE_FASTPATH_RX) {
2424 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
2425 if (!fp->rxq) {
2426 DP_NOTICE(edev,
2427 "RXQ struct allocation failed\n");
2428 goto err;
2429 }
2950219d
YM		 2430 }
2431 }
2432
2433 return 0;
2434err:
2435 qede_free_fp_array(edev);
2436 return -ENOMEM;
2437}
2438
0d8e0aa0
SK		 2439static void qede_sp_task(struct work_struct *work)
2440{
2441 struct qede_dev *edev = container_of(work, struct qede_dev,
2442 sp_task.work);
b18e170c
MC		 2443 struct qed_dev *cdev = edev->cdev;
2444
0d8e0aa0
SK		 2445 mutex_lock(&edev->qede_lock);
2446
2447 if (edev->state == QEDE_STATE_OPEN) {
2448 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
2449 qede_config_rx_mode(edev->ndev);
2450 }
2451
b18e170c
MC		 2452 if (test_and_clear_bit(QEDE_SP_VXLAN_PORT_CONFIG, &edev->sp_flags)) {
2453 struct qed_tunn_params tunn_params;
2454
2455 memset(&tunn_params, 0, sizeof(tunn_params));
2456 tunn_params.update_vxlan_port = 1;
2457 tunn_params.vxlan_port = edev->vxlan_dst_port;
2458 qed_ops->tunn_config(cdev, &tunn_params);
2459 }
2460
9a109dd0
MC		 2461 if (test_and_clear_bit(QEDE_SP_GENEVE_PORT_CONFIG, &edev->sp_flags)) {
2462 struct qed_tunn_params tunn_params;
2463
2464 memset(&tunn_params, 0, sizeof(tunn_params));
2465 tunn_params.update_geneve_port = 1;
2466 tunn_params.geneve_port = edev->geneve_dst_port;
2467 qed_ops->tunn_config(cdev, &tunn_params);
2468 }
2469
0d8e0aa0
SK		 2470 mutex_unlock(&edev->qede_lock);
2471}
2472
e712d52b
YM		 2473static void qede_update_pf_params(struct qed_dev *cdev)
2474{
2475 struct qed_pf_params pf_params;
2476
8e0ddc04 2477 /* 64 rx + 64 tx */
e712d52b 2478 memset(&pf_params, 0, sizeof(struct qed_pf_params));
8e0ddc04 2479 pf_params.eth_pf_params.num_cons = 128;
e712d52b
YM		 2480 qed_ops->common->update_pf_params(cdev, &pf_params);
2481}
2482
2483enum qede_probe_mode {
2484 QEDE_PROBE_NORMAL,
2485};
2486
2487static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1408cc1f 2488 bool is_vf, enum qede_probe_mode mode)
e712d52b 2489{
1408cc1f 2490 struct qed_probe_params probe_params;
1a635e48 2491 struct qed_slowpath_params sp_params;
e712d52b
YM		 2492 struct qed_dev_eth_info dev_info;
2493 struct qede_dev *edev;
2494 struct qed_dev *cdev;
2495 int rc;
2496
2497 if (unlikely(dp_level & QED_LEVEL_INFO))
2498 pr_notice("Starting qede probe\n");
2499
1408cc1f
YM		 2500 memset(&probe_params, 0, sizeof(probe_params));
2501 probe_params.protocol = QED_PROTOCOL_ETH;
2502 probe_params.dp_module = dp_module;
2503 probe_params.dp_level = dp_level;
2504 probe_params.is_vf = is_vf;
2505 cdev = qed_ops->common->probe(pdev, &probe_params);
e712d52b
YM		 2506 if (!cdev) {
2507 rc = -ENODEV;
2508 goto err0;
2509 }
2510
2511 qede_update_pf_params(cdev);
2512
2513 /* Start the Slowpath-process */
1a635e48
YM		 2514 memset(&sp_params, 0, sizeof(sp_params));
2515 sp_params.int_mode = QED_INT_MODE_MSIX;
2516 sp_params.drv_major = QEDE_MAJOR_VERSION;
2517 sp_params.drv_minor = QEDE_MINOR_VERSION;
2518 sp_params.drv_rev = QEDE_REVISION_VERSION;
2519 sp_params.drv_eng = QEDE_ENGINEERING_VERSION;
2520 strlcpy(sp_params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
2521 rc = qed_ops->common->slowpath_start(cdev, &sp_params);
e712d52b
YM		 2522 if (rc) {
2523 pr_notice("Cannot start slowpath\n");
2524 goto err1;
2525 }
2526
2527 /* Learn information crucial for qede to progress */
2528 rc = qed_ops->fill_dev_info(cdev, &dev_info);
2529 if (rc)
2530 goto err2;
2531
2532 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
2533 dp_level);
2534 if (!edev) {
2535 rc = -ENOMEM;
2536 goto err2;
2537 }
2538
fefb0202
YM		 2539 if (is_vf)
2540 edev->flags |= QEDE_FLAG_IS_VF;
2541
e712d52b
YM		 2542 qede_init_ndev(edev);
2543
2950219d
YM		 2544 rc = register_netdev(edev->ndev);
2545 if (rc) {
2546 DP_NOTICE(edev, "Cannot register net-device\n");
2547 goto err3;
2548 }
2549
e712d52b
YM		 2550 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
2551
a2ec6172
SK		 2552 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
2553
489e45ae 2554#ifdef CONFIG_DCB
5fe118c9
SRK		 2555 if (!IS_VF(edev))
2556 qede_set_dcbnl_ops(edev->ndev);
489e45ae
SRK		 2557#endif
2558
0d8e0aa0
SK		 2559 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
2560 mutex_init(&edev->qede_lock);
3d789994 2561 edev->rx_copybreak = QEDE_RX_HDR_SIZE;
0d8e0aa0 2562
e712d52b
YM		 2563 DP_INFO(edev, "Ending successfully qede probe\n");
2564
2565 return 0;
2566
2950219d
YM		 2567err3:
2568 free_netdev(edev->ndev);
e712d52b
YM		 2569err2:
2570 qed_ops->common->slowpath_stop(cdev);
2571err1:
2572 qed_ops->common->remove(cdev);
2573err0:
2574 return rc;
2575}
2576
2577static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2578{
fefb0202 2579 bool is_vf = false;
e712d52b
YM		 2580 u32 dp_module = 0;
2581 u8 dp_level = 0;
2582
fefb0202
YM		 2583 switch ((enum qede_pci_private)id->driver_data) {
2584 case QEDE_PRIVATE_VF:
2585 if (debug & QED_LOG_VERBOSE_MASK)
2586 dev_err(&pdev->dev, "Probing a VF\n");
2587 is_vf = true;
2588 break;
2589 default:
2590 if (debug & QED_LOG_VERBOSE_MASK)
2591 dev_err(&pdev->dev, "Probing a PF\n");
2592 }
2593
e712d52b
YM		 2594 qede_config_debug(debug, &dp_module, &dp_level);
2595
fefb0202 2596 return __qede_probe(pdev, dp_module, dp_level, is_vf,
e712d52b
YM		 2597 QEDE_PROBE_NORMAL);
2598}
2599
2600enum qede_remove_mode {
2601 QEDE_REMOVE_NORMAL,
2602};
2603
2604static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
2605{
2606 struct net_device *ndev = pci_get_drvdata(pdev);
2607 struct qede_dev *edev = netdev_priv(ndev);
2608 struct qed_dev *cdev = edev->cdev;
2609
2610 DP_INFO(edev, "Starting qede_remove\n");
2611
0d8e0aa0 2612 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 2613 unregister_netdev(ndev);
2614
e712d52b
YM		 2615 edev->ops->common->set_power_state(cdev, PCI_D0);
2616
2617 pci_set_drvdata(pdev, NULL);
2618
2619 free_netdev(ndev);
2620
2621 /* Use global ops since we've freed edev */
2622 qed_ops->common->slowpath_stop(cdev);
2623 qed_ops->common->remove(cdev);
2624
525ef5c0 2625 dev_info(&pdev->dev, "Ending qede_remove successfully\n");
e712d52b
YM		 2626}
2627
2628static void qede_remove(struct pci_dev *pdev)
2629{
2630 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
2631}
2950219d
YM		 2632
2633/* -------------------------------------------------------------------------
2634 * START OF LOAD / UNLOAD
2635 * -------------------------------------------------------------------------
2636 */
2637
2638static int qede_set_num_queues(struct qede_dev *edev)
2639{
2640 int rc;
2641 u16 rss_num;
2642
2643 /* Setup queues according to possible resources*/
9a4d7e86
SRK		 2644 if (edev->req_queues)
2645 rss_num = edev->req_queues;
8edf049d
SK		 2646 else
2647 rss_num = netif_get_num_default_rss_queues() *
2648 edev->dev_info.common.num_hwfns;
2950219d
YM		 2649
2650 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
2651
2652 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
2653 if (rc > 0) {
2654 /* Managed to request interrupts for our queues */
9a4d7e86 2655 edev->num_queues = rc;
2950219d 2656 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
9a4d7e86 2657 QEDE_QUEUE_CNT(edev), rss_num);
2950219d
YM		 2658 rc = 0;
2659 }
9a4d7e86
SRK		 2660
2661 edev->fp_num_tx = edev->req_num_tx;
2662 edev->fp_num_rx = edev->req_num_rx;
2663
2950219d
YM		 2664 return rc;
2665}
2666
2667static void qede_free_mem_sb(struct qede_dev *edev,
2668 struct qed_sb_info *sb_info)
2669{
2670 if (sb_info->sb_virt)
2671 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
2672 (void *)sb_info->sb_virt, sb_info->sb_phys);
2673}
2674
2675/* This function allocates fast-path status block memory */
2676static int qede_alloc_mem_sb(struct qede_dev *edev,
1a635e48 2677 struct qed_sb_info *sb_info, u16 sb_id)
2950219d
YM		 2678{
2679 struct status_block *sb_virt;
2680 dma_addr_t sb_phys;
2681 int rc;
2682
2683 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1a635e48 2684 sizeof(*sb_virt), &sb_phys, GFP_KERNEL);
2950219d
YM		 2685 if (!sb_virt) {
2686 DP_ERR(edev, "Status block allocation failed\n");
2687 return -ENOMEM;
2688 }
2689
2690 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
2691 sb_virt, sb_phys, sb_id,
2692 QED_SB_TYPE_L2_QUEUE);
2693 if (rc) {
2694 DP_ERR(edev, "Status block initialization failed\n");
2695 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
2696 sb_virt, sb_phys);
2697 return rc;
2698 }
2699
2700 return 0;
2701}
2702
2703static void qede_free_rx_buffers(struct qede_dev *edev,
2704 struct qede_rx_queue *rxq)
2705{
2706 u16 i;
2707
2708 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
2709 struct sw_rx_data *rx_buf;
fc48b7a6 2710 struct page *data;
2950219d
YM		 2711
2712 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
2713 data = rx_buf->data;
2714
fc48b7a6 2715 dma_unmap_page(&edev->pdev->dev,
1a635e48 2716 rx_buf->mapping, PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 2717
2718 rx_buf->data = NULL;
fc48b7a6 2719 __free_page(data);
2950219d
YM		 2720 }
2721}
2722
1a635e48
YM		 2723static void qede_free_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
2724{
55482edc
MC		 2725 int i;
2726
2727 if (edev->gro_disable)
2728 return;
2729
2730 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2731 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2732 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2733
f86af2df 2734 if (replace_buf->data) {
55482edc 2735 dma_unmap_page(&edev->pdev->dev,
09ec8e7f 2736 replace_buf->mapping,
55482edc
MC		 2737 PAGE_SIZE, DMA_FROM_DEVICE);
2738 __free_page(replace_buf->data);
2739 }
2740 }
2741}
2742
1a635e48 2743static void qede_free_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
2950219d 2744{
55482edc
MC		 2745 qede_free_sge_mem(edev, rxq);
2746
2950219d
YM		 2747 /* Free rx buffers */
2748 qede_free_rx_buffers(edev, rxq);
2749
2750 /* Free the parallel SW ring */
2751 kfree(rxq->sw_rx_ring);
2752
2753 /* Free the real RQ ring used by FW */
2754 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
2755 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
2756}
2757
2758static int qede_alloc_rx_buffer(struct qede_dev *edev,
2759 struct qede_rx_queue *rxq)
2760{
2761 struct sw_rx_data *sw_rx_data;
2762 struct eth_rx_bd *rx_bd;
2763 dma_addr_t mapping;
fc48b7a6 2764 struct page *data;
2950219d 2765
fc48b7a6 2766 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 2767 if (unlikely(!data)) {
fc48b7a6 2768 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 2769 return -ENOMEM;
2770 }
2771
fc48b7a6
YM		 2772 /* Map the entire page as it would be used
2773 * for multiple RX buffer segment size mapping.
2774 */
2775 mapping = dma_map_page(&edev->pdev->dev, data, 0,
2776 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 2777 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 2778 __free_page(data);
2950219d
YM		 2779 DP_NOTICE(edev, "Failed to map Rx buffer\n");
2780 return -ENOMEM;
2781 }
2782
2783 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 2784 sw_rx_data->page_offset = 0;
2950219d 2785 sw_rx_data->data = data;
fc48b7a6 2786 sw_rx_data->mapping = mapping;
2950219d
YM		 2787
2788 /* Advance PROD and get BD pointer */
2789 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
2790 WARN_ON(!rx_bd);
2791 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
2792 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
2793
2794 rxq->sw_rx_prod++;
2795
2796 return 0;
2797}
2798
1a635e48 2799static int qede_alloc_sge_mem(struct qede_dev *edev, struct qede_rx_queue *rxq)
55482edc
MC		 2800{
2801 dma_addr_t mapping;
2802 int i;
2803
2804 if (edev->gro_disable)
2805 return 0;
2806
2807 if (edev->ndev->mtu > PAGE_SIZE) {
2808 edev->gro_disable = 1;
2809 return 0;
2810 }
2811
2812 for (i = 0; i < ETH_TPA_MAX_AGGS_NUM; i++) {
2813 struct qede_agg_info *tpa_info = &rxq->tpa_info[i];
2814 struct sw_rx_data *replace_buf = &tpa_info->replace_buf;
2815
2816 replace_buf->data = alloc_pages(GFP_ATOMIC, 0);
2817 if (unlikely(!replace_buf->data)) {
2818 DP_NOTICE(edev,
2819 "Failed to allocate TPA skb pool [replacement buffer]\n");
2820 goto err;
2821 }
2822
2823 mapping = dma_map_page(&edev->pdev->dev, replace_buf->data, 0,
2824 rxq->rx_buf_size, DMA_FROM_DEVICE);
2825 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
2826 DP_NOTICE(edev,
2827 "Failed to map TPA replacement buffer\n");
2828 goto err;
2829 }
2830
09ec8e7f 2831 replace_buf->mapping = mapping;
55482edc
MC		 2832 tpa_info->replace_buf.page_offset = 0;
2833
2834 tpa_info->replace_buf_mapping = mapping;
2835 tpa_info->agg_state = QEDE_AGG_STATE_NONE;
2836 }
2837
2838 return 0;
2839err:
2840 qede_free_sge_mem(edev, rxq);
2841 edev->gro_disable = 1;
2842 return -ENOMEM;
2843}
2844
2950219d 2845/* This function allocates all memory needed per Rx queue */
1a635e48 2846static int qede_alloc_mem_rxq(struct qede_dev *edev, struct qede_rx_queue *rxq)
2950219d 2847{
f86af2df 2848 int i, rc, size;
2950219d
YM		 2849
2850 rxq->num_rx_buffers = edev->q_num_rx_buffers;
2851
1a635e48
YM		 2852 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD + edev->ndev->mtu;
2853
fc48b7a6
YM		 2854 if (rxq->rx_buf_size > PAGE_SIZE)
2855 rxq->rx_buf_size = PAGE_SIZE;
2856
2857 /* Segment size to spilt a page in multiple equal parts */
2858 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 2859
2860 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 2861 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 2862 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
2863 if (!rxq->sw_rx_ring) {
2864 DP_ERR(edev, "Rx buffers ring allocation failed\n");
f86af2df 2865 rc = -ENOMEM;
2950219d
YM		 2866 goto err;
2867 }
2868
2869 /* Allocate FW Rx ring */
2870 rc = edev->ops->common->chain_alloc(edev->cdev,
2871 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2872 QED_CHAIN_MODE_NEXT_PTR,
a91eb52a 2873 QED_CHAIN_CNT_TYPE_U16,
fc48b7a6 2874 RX_RING_SIZE,
2950219d
YM		 2875 sizeof(struct eth_rx_bd),
2876 &rxq->rx_bd_ring);
2877
2878 if (rc)
2879 goto err;
2880
2881 /* Allocate FW completion ring */
2882 rc = edev->ops->common->chain_alloc(edev->cdev,
2883 QED_CHAIN_USE_TO_CONSUME,
2884 QED_CHAIN_MODE_PBL,
a91eb52a 2885 QED_CHAIN_CNT_TYPE_U16,
fc48b7a6 2886 RX_RING_SIZE,
2950219d
YM		 2887 sizeof(union eth_rx_cqe),
2888 &rxq->rx_comp_ring);
2889 if (rc)
2890 goto err;
2891
2892 /* Allocate buffers for the Rx ring */
2893 for (i = 0; i < rxq->num_rx_buffers; i++) {
2894 rc = qede_alloc_rx_buffer(edev, rxq);
f86af2df
MC		 2895 if (rc) {
2896 DP_ERR(edev,
2897 "Rx buffers allocation failed at index %d\n", i);
2898 goto err;
2899 }
2950219d
YM		 2900 }
2901
f86af2df 2902 rc = qede_alloc_sge_mem(edev, rxq);
2950219d 2903err:
f86af2df 2904 return rc;
2950219d
YM		 2905}
2906
1a635e48 2907static void qede_free_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
2950219d
YM		 2908{
2909 /* Free the parallel SW ring */
2910 kfree(txq->sw_tx_ring);
2911
2912 /* Free the real RQ ring used by FW */
2913 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
2914}
2915
2916/* This function allocates all memory needed per Tx queue */
1a635e48 2917static int qede_alloc_mem_txq(struct qede_dev *edev, struct qede_tx_queue *txq)
2950219d
YM		 2918{
2919 int size, rc;
2920 union eth_tx_bd_types *p_virt;
2921
2922 txq->num_tx_buffers = edev->q_num_tx_buffers;
2923
2924 /* Allocate the parallel driver ring for Tx buffers */
2925 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
2926 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
2927 if (!txq->sw_tx_ring) {
2928 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
2929 goto err;
2930 }
2931
2932 rc = edev->ops->common->chain_alloc(edev->cdev,
2933 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
2934 QED_CHAIN_MODE_PBL,
a91eb52a 2935 QED_CHAIN_CNT_TYPE_U16,
2950219d 2936 NUM_TX_BDS_MAX,
a91eb52a 2937 sizeof(*p_virt), &txq->tx_pbl);
2950219d
YM		 2938 if (rc)
2939 goto err;
2940
2941 return 0;
2942
2943err:
2944 qede_free_mem_txq(edev, txq);
2945 return -ENOMEM;
2946}
2947
2948/* This function frees all memory of a single fp */
1a635e48 2949static void qede_free_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
2950219d
YM		 2950{
2951 int tc;
2952
2953 qede_free_mem_sb(edev, fp->sb_info);
2954
9a4d7e86
SRK		 2955 if (fp->type & QEDE_FASTPATH_RX)
2956 qede_free_mem_rxq(edev, fp->rxq);
2950219d 2957
9a4d7e86
SRK		 2958 if (fp->type & QEDE_FASTPATH_TX)
2959 for (tc = 0; tc < edev->num_tc; tc++)
2960 qede_free_mem_txq(edev, &fp->txqs[tc]);
2950219d
YM		 2961}
2962
2963/* This function allocates all memory needed for a single fp (i.e. an entity
9a4d7e86 2964 * which contains status block, one rx queue and/or multiple per-TC tx queues.
2950219d 2965 */
1a635e48 2966static int qede_alloc_mem_fp(struct qede_dev *edev, struct qede_fastpath *fp)
2950219d
YM		 2967{
2968 int rc, tc;
2969
9a4d7e86 2970 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->id);
2950219d
YM		 2971 if (rc)
2972 goto err;
2973
9a4d7e86
SRK		 2974 if (fp->type & QEDE_FASTPATH_RX) {
2975 rc = qede_alloc_mem_rxq(edev, fp->rxq);
2950219d
YM		 2976 if (rc)
2977 goto err;
2978 }
2979
9a4d7e86
SRK		 2980 if (fp->type & QEDE_FASTPATH_TX) {
2981 for (tc = 0; tc < edev->num_tc; tc++) {
2982 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
2983 if (rc)
2984 goto err;
2985 }
2986 }
2987
2950219d 2988 return 0;
2950219d 2989err:
f86af2df 2990 return rc;
2950219d
YM		 2991}
2992
2993static void qede_free_mem_load(struct qede_dev *edev)
2994{
2995 int i;
2996
9a4d7e86 2997 for_each_queue(i) {
2950219d
YM		 2998 struct qede_fastpath *fp = &edev->fp_array[i];
2999
3000 qede_free_mem_fp(edev, fp);
3001 }
3002}
3003
3004/* This function allocates all qede memory at NIC load. */
3005static int qede_alloc_mem_load(struct qede_dev *edev)
3006{
9a4d7e86 3007 int rc = 0, queue_id;
2950219d 3008
9a4d7e86
SRK		 3009 for (queue_id = 0; queue_id < QEDE_QUEUE_CNT(edev); queue_id++) {
3010 struct qede_fastpath *fp = &edev->fp_array[queue_id];
2950219d
YM		 3011
3012 rc = qede_alloc_mem_fp(edev, fp);
f86af2df 3013 if (rc) {
2950219d 3014 DP_ERR(edev,
f86af2df 3015 "Failed to allocate memory for fastpath - rss id = %d\n",
9a4d7e86 3016 queue_id);
f86af2df
MC		 3017 qede_free_mem_load(edev);
3018 return rc;
2950219d 3019 }
2950219d
YM		 3020 }
3021
3022 return 0;
3023}
3024
3025/* This function inits fp content and resets the SB, RXQ and TXQ structures */
3026static void qede_init_fp(struct qede_dev *edev)
3027{
9a4d7e86 3028 int queue_id, rxq_index = 0, txq_index = 0, tc;
2950219d
YM		 3029 struct qede_fastpath *fp;
3030
9a4d7e86
SRK		 3031 for_each_queue(queue_id) {
3032 fp = &edev->fp_array[queue_id];
2950219d
YM		 3033
3034 fp->edev = edev;
9a4d7e86 3035 fp->id = queue_id;
2950219d
YM		 3036
3037 memset((void *)&fp->napi, 0, sizeof(fp->napi));
3038
3039 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
3040
9a4d7e86
SRK		 3041 if (fp->type & QEDE_FASTPATH_RX) {
3042 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
3043 fp->rxq->rxq_id = rxq_index++;
3044 }
2950219d 3045
9a4d7e86
SRK		 3046 if (fp->type & QEDE_FASTPATH_TX) {
3047 memset((void *)fp->txqs, 0,
3048 (edev->num_tc * sizeof(*fp->txqs)));
3049 for (tc = 0; tc < edev->num_tc; tc++) {
3050 fp->txqs[tc].index = txq_index +
3051 tc * QEDE_TSS_COUNT(edev);
3052 if (edev->dev_info.is_legacy)
3053 fp->txqs[tc].is_legacy = true;
3054 }
3055 txq_index++;
2950219d
YM		 3056 }
3057
3058 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
9a4d7e86 3059 edev->ndev->name, queue_id);
2950219d 3060 }
55482edc
MC		 3061
3062 edev->gro_disable = !(edev->ndev->features & NETIF_F_GRO);
2950219d
YM		 3063}
3064
3065static int qede_set_real_num_queues(struct qede_dev *edev)
3066{
3067 int rc = 0;
3068
9a4d7e86 3069 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_COUNT(edev));
2950219d
YM		 3070 if (rc) {
3071 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
3072 return rc;
3073 }
9a4d7e86
SRK		 3074
3075 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_COUNT(edev));
2950219d
YM		 3076 if (rc) {
3077 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
3078 return rc;
3079 }
3080
3081 return 0;
3082}
3083
3084static void qede_napi_disable_remove(struct qede_dev *edev)
3085{
3086 int i;
3087
9a4d7e86 3088 for_each_queue(i) {
2950219d
YM		 3089 napi_disable(&edev->fp_array[i].napi);
3090
3091 netif_napi_del(&edev->fp_array[i].napi);
3092 }
3093}
3094
3095static void qede_napi_add_enable(struct qede_dev *edev)
3096{
3097 int i;
3098
3099 /* Add NAPI objects */
9a4d7e86 3100 for_each_queue(i) {
2950219d
YM		 3101 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
3102 qede_poll, NAPI_POLL_WEIGHT);
3103 napi_enable(&edev->fp_array[i].napi);
3104 }
3105}
3106
3107static void qede_sync_free_irqs(struct qede_dev *edev)
3108{
3109 int i;
3110
3111 for (i = 0; i < edev->int_info.used_cnt; i++) {
3112 if (edev->int_info.msix_cnt) {
3113 synchronize_irq(edev->int_info.msix[i].vector);
3114 free_irq(edev->int_info.msix[i].vector,
3115 &edev->fp_array[i]);
3116 } else {
3117 edev->ops->common->simd_handler_clean(edev->cdev, i);
3118 }
3119 }
3120
3121 edev->int_info.used_cnt = 0;
3122}
3123
3124static int qede_req_msix_irqs(struct qede_dev *edev)
3125{
3126 int i, rc;
3127
3128 /* Sanitize number of interrupts == number of prepared RSS queues */
9a4d7e86 3129 if (QEDE_QUEUE_CNT(edev) > edev->int_info.msix_cnt) {
2950219d
YM		 3130 DP_ERR(edev,
3131 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
9a4d7e86 3132 QEDE_QUEUE_CNT(edev), edev->int_info.msix_cnt);
2950219d
YM		 3133 return -EINVAL;
3134 }
3135
9a4d7e86 3136 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++) {
2950219d
YM		 3137 rc = request_irq(edev->int_info.msix[i].vector,
3138 qede_msix_fp_int, 0, edev->fp_array[i].name,
3139 &edev->fp_array[i]);
3140 if (rc) {
3141 DP_ERR(edev, "Request fp %d irq failed\n", i);
3142 qede_sync_free_irqs(edev);
3143 return rc;
3144 }
3145 DP_VERBOSE(edev, NETIF_MSG_INTR,
3146 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
3147 edev->fp_array[i].name, i,
3148 &edev->fp_array[i]);
3149 edev->int_info.used_cnt++;
3150 }
3151
3152 return 0;
3153}
3154
3155static void qede_simd_fp_handler(void *cookie)
3156{
3157 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
3158
3159 napi_schedule_irqoff(&fp->napi);
3160}
3161
3162static int qede_setup_irqs(struct qede_dev *edev)
3163{
3164 int i, rc = 0;
3165
3166 /* Learn Interrupt configuration */
3167 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
3168 if (rc)
3169 return rc;
3170
3171 if (edev->int_info.msix_cnt) {
3172 rc = qede_req_msix_irqs(edev);
3173 if (rc)
3174 return rc;
3175 edev->ndev->irq = edev->int_info.msix[0].vector;
3176 } else {
3177 const struct qed_common_ops *ops;
3178
3179 /* qed should learn receive the RSS ids and callbacks */
3180 ops = edev->ops->common;
9a4d7e86 3181 for (i = 0; i < QEDE_QUEUE_CNT(edev); i++)
2950219d
YM		 3182 ops->simd_handler_config(edev->cdev,
3183 &edev->fp_array[i], i,
3184 qede_simd_fp_handler);
9a4d7e86 3185 edev->int_info.used_cnt = QEDE_QUEUE_CNT(edev);
2950219d
YM		 3186 }
3187 return 0;
3188}
3189
3190static int qede_drain_txq(struct qede_dev *edev,
1a635e48 3191 struct qede_tx_queue *txq, bool allow_drain)
2950219d
YM		 3192{
3193 int rc, cnt = 1000;
3194
3195 while (txq->sw_tx_cons != txq->sw_tx_prod) {
3196 if (!cnt) {
3197 if (allow_drain) {
3198 DP_NOTICE(edev,
3199 "Tx queue[%d] is stuck, requesting MCP to drain\n",
3200 txq->index);
3201 rc = edev->ops->common->drain(edev->cdev);
3202 if (rc)
3203 return rc;
3204 return qede_drain_txq(edev, txq, false);
3205 }
3206 DP_NOTICE(edev,
3207 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
3208 txq->index, txq->sw_tx_prod,
3209 txq->sw_tx_cons);
3210 return -ENODEV;
3211 }
3212 cnt--;
3213 usleep_range(1000, 2000);
3214 barrier();
3215 }
3216
3217 /* FW finished processing, wait for HW to transmit all tx packets */
3218 usleep_range(1000, 2000);
3219
3220 return 0;
3221}
3222
3223static int qede_stop_queues(struct qede_dev *edev)
3224{
3225 struct qed_update_vport_params vport_update_params;
3226 struct qed_dev *cdev = edev->cdev;
3227 int rc, tc, i;
3228
3229 /* Disable the vport */
3230 memset(&vport_update_params, 0, sizeof(vport_update_params));
3231 vport_update_params.vport_id = 0;
3232 vport_update_params.update_vport_active_flg = 1;
3233 vport_update_params.vport_active_flg = 0;
3234 vport_update_params.update_rss_flg = 0;
3235
3236 rc = edev->ops->vport_update(cdev, &vport_update_params);
3237 if (rc) {
3238 DP_ERR(edev, "Failed to update vport\n");
3239 return rc;
3240 }
3241
3242 /* Flush Tx queues. If needed, request drain from MCP */
9a4d7e86 3243 for_each_queue(i) {
2950219d
YM		 3244 struct qede_fastpath *fp = &edev->fp_array[i];
3245
9a4d7e86
SRK		 3246 if (fp->type & QEDE_FASTPATH_TX) {
3247 for (tc = 0; tc < edev->num_tc; tc++) {
3248 struct qede_tx_queue *txq = &fp->txqs[tc];
2950219d 3249
9a4d7e86
SRK		 3250 rc = qede_drain_txq(edev, txq, true);
3251 if (rc)
3252 return rc;
3253 }
2950219d
YM		 3254 }
3255 }
3256
9a4d7e86
SRK		 3257 /* Stop all Queues in reverse order */
3258 for (i = QEDE_QUEUE_CNT(edev) - 1; i >= 0; i--) {
2950219d
YM		 3259 struct qed_stop_rxq_params rx_params;
3260
9a4d7e86
SRK		 3261 /* Stop the Tx Queue(s) */
3262 if (edev->fp_array[i].type & QEDE_FASTPATH_TX) {
3263 for (tc = 0; tc < edev->num_tc; tc++) {
3264 struct qed_stop_txq_params tx_params;
3265 u8 val;
3266
3267 tx_params.rss_id = i;
3268 val = edev->fp_array[i].txqs[tc].index;
3269 tx_params.tx_queue_id = val;
3270 rc = edev->ops->q_tx_stop(cdev, &tx_params);
3271 if (rc) {
3272 DP_ERR(edev, "Failed to stop TXQ #%d\n",
3273 tx_params.tx_queue_id);
3274 return rc;
3275 }
2950219d
YM		 3276 }
3277 }
3278
9a4d7e86
SRK		 3279 /* Stop the Rx Queue */
3280 if (edev->fp_array[i].type & QEDE_FASTPATH_RX) {
3281 memset(&rx_params, 0, sizeof(rx_params));
3282 rx_params.rss_id = i;
3283 rx_params.rx_queue_id = edev->fp_array[i].rxq->rxq_id;
2950219d 3284
9a4d7e86
SRK		 3285 rc = edev->ops->q_rx_stop(cdev, &rx_params);
3286 if (rc) {
3287 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
3288 return rc;
3289 }
2950219d
YM		 3290 }
3291 }
3292
3293 /* Stop the vport */
3294 rc = edev->ops->vport_stop(cdev, 0);
3295 if (rc)
3296 DP_ERR(edev, "Failed to stop VPORT\n");
3297
3298 return rc;
3299}
3300
a0d26d5a 3301static int qede_start_queues(struct qede_dev *edev, bool clear_stats)
2950219d
YM		 3302{
3303 int rc, tc, i;
088c8618 3304 int vlan_removal_en = 1;
2950219d 3305 struct qed_dev *cdev = edev->cdev;
2950219d
YM		 3306 struct qed_update_vport_params vport_update_params;
3307 struct qed_queue_start_common_params q_params;
fefb0202 3308 struct qed_dev_info *qed_info = &edev->dev_info.common;
088c8618 3309 struct qed_start_vport_params start = {0};
961acdea 3310 bool reset_rss_indir = false;
2950219d 3311
9a4d7e86 3312 if (!edev->num_queues) {
2950219d
YM		 3313 DP_ERR(edev,
3314 "Cannot update V-VPORT as active as there are no Rx queues\n");
3315 return -EINVAL;
3316 }
3317
55482edc 3318 start.gro_enable = !edev->gro_disable;
088c8618
MC		 3319 start.mtu = edev->ndev->mtu;
3320 start.vport_id = 0;
3321 start.drop_ttl0 = true;
3322 start.remove_inner_vlan = vlan_removal_en;
7f7a144f 3323 start.clear_stats = clear_stats;
088c8618
MC		 3324
3325 rc = edev->ops->vport_start(cdev, &start);
2950219d
YM		 3326
3327 if (rc) {
3328 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
3329 return rc;
3330 }
3331
3332 DP_VERBOSE(edev, NETIF_MSG_IFUP,
3333 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
088c8618 3334 start.vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2950219d 3335
9a4d7e86 3336 for_each_queue(i) {
2950219d 3337 struct qede_fastpath *fp = &edev->fp_array[i];
9a4d7e86
SRK		 3338 dma_addr_t p_phys_table;
3339 u32 page_cnt;
2950219d 3340
9a4d7e86
SRK		 3341 if (fp->type & QEDE_FASTPATH_RX) {
3342 struct qede_rx_queue *rxq = fp->rxq;
3343 __le16 *val;
2950219d 3344
9a4d7e86
SRK		 3345 memset(&q_params, 0, sizeof(q_params));
3346 q_params.rss_id = i;
3347 q_params.queue_id = rxq->rxq_id;
3348 q_params.vport_id = 0;
3349 q_params.sb = fp->sb_info->igu_sb_id;
3350 q_params.sb_idx = RX_PI;
3351
3352 p_phys_table =
3353 qed_chain_get_pbl_phys(&rxq->rx_comp_ring);
3354 page_cnt = qed_chain_get_page_cnt(&rxq->rx_comp_ring);
3355
3356 rc = edev->ops->q_rx_start(cdev, &q_params,
3357 rxq->rx_buf_size,
3358 rxq->rx_bd_ring.p_phys_addr,
3359 p_phys_table,
3360 page_cnt,
3361 &rxq->hw_rxq_prod_addr);
3362 if (rc) {
3363 DP_ERR(edev, "Start RXQ #%d failed %d\n", i,
3364 rc);
3365 return rc;
3366 }
3367
3368 val = &fp->sb_info->sb_virt->pi_array[RX_PI];
3369 rxq->hw_cons_ptr = val;
3370
3371 qede_update_rx_prod(edev, rxq);
3372 }
3373
3374 if (!(fp->type & QEDE_FASTPATH_TX))
3375 continue;
2950219d
YM		 3376
3377 for (tc = 0; tc < edev->num_tc; tc++) {
3378 struct qede_tx_queue *txq = &fp->txqs[tc];
9a4d7e86
SRK		 3379
3380 p_phys_table = qed_chain_get_pbl_phys(&txq->tx_pbl);
3381 page_cnt = qed_chain_get_page_cnt(&txq->tx_pbl);
2950219d
YM		 3382
3383 memset(&q_params, 0, sizeof(q_params));
3384 q_params.rss_id = i;
9a4d7e86 3385 q_params.queue_id = txq->index;
2950219d
YM		 3386 q_params.vport_id = 0;
3387 q_params.sb = fp->sb_info->igu_sb_id;
3388 q_params.sb_idx = TX_PI(tc);
3389
3390 rc = edev->ops->q_tx_start(cdev, &q_params,
9a4d7e86 3391 p_phys_table, page_cnt,
2950219d
YM		 3392 &txq->doorbell_addr);
3393 if (rc) {
3394 DP_ERR(edev, "Start TXQ #%d failed %d\n",
9a4d7e86 3395 txq->index, rc);
2950219d
YM		 3396 return rc;
3397 }
3398
3399 txq->hw_cons_ptr =
3400 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
3401 SET_FIELD(txq->tx_db.data.params,
3402 ETH_DB_DATA_DEST, DB_DEST_XCM);
3403 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
3404 DB_AGG_CMD_SET);
3405 SET_FIELD(txq->tx_db.data.params,
3406 ETH_DB_DATA_AGG_VAL_SEL,
3407 DQ_XCM_ETH_TX_BD_PROD_CMD);
3408
3409 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
3410 }
3411 }
3412
3413 /* Prepare and send the vport enable */
3414 memset(&vport_update_params, 0, sizeof(vport_update_params));
088c8618 3415 vport_update_params.vport_id = start.vport_id;
2950219d
YM		 3416 vport_update_params.update_vport_active_flg = 1;
3417 vport_update_params.vport_active_flg = 1;
3418
831bfb0e
YM		 3419 if ((qed_info->mf_mode == QED_MF_NPAR || pci_num_vf(edev->pdev)) &&
3420 qed_info->tx_switching) {
3421 vport_update_params.update_tx_switching_flg = 1;
3422 vport_update_params.tx_switching_flg = 1;
3423 }
3424
2950219d 3425 /* Fill struct with RSS params */
9a4d7e86 3426 if (QEDE_RSS_COUNT(edev) > 1) {
2950219d 3427 vport_update_params.update_rss_flg = 1;
961acdea
SRK		 3428
3429 /* Need to validate current RSS config uses valid entries */
3430 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3431 if (edev->rss_params.rss_ind_table[i] >=
9a4d7e86 3432 QEDE_RSS_COUNT(edev)) {
961acdea
SRK		 3433 reset_rss_indir = true;
3434 break;
3435 }
3436 }
3437
3438 if (!(edev->rss_params_inited & QEDE_RSS_INDIR_INITED) ||
3439 reset_rss_indir) {
3440 u16 val;
3441
3442 for (i = 0; i < QED_RSS_IND_TABLE_SIZE; i++) {
3443 u16 indir_val;
3444
9a4d7e86 3445 val = QEDE_RSS_COUNT(edev);
961acdea
SRK		 3446 indir_val = ethtool_rxfh_indir_default(i, val);
3447 edev->rss_params.rss_ind_table[i] = indir_val;
3448 }
3449 edev->rss_params_inited |= QEDE_RSS_INDIR_INITED;
3450 }
3451
3452 if (!(edev->rss_params_inited & QEDE_RSS_KEY_INITED)) {
3453 netdev_rss_key_fill(edev->rss_params.rss_key,
3454 sizeof(edev->rss_params.rss_key));
3455 edev->rss_params_inited |= QEDE_RSS_KEY_INITED;
3456 }
3457
3458 if (!(edev->rss_params_inited & QEDE_RSS_CAPS_INITED)) {
3459 edev->rss_params.rss_caps = QED_RSS_IPV4 |
3460 QED_RSS_IPV6 |
3461 QED_RSS_IPV4_TCP |
3462 QED_RSS_IPV6_TCP;
3463 edev->rss_params_inited |= QEDE_RSS_CAPS_INITED;
3464 }
3465
3466 memcpy(&vport_update_params.rss_params, &edev->rss_params,
3467 sizeof(vport_update_params.rss_params));
2950219d 3468 } else {
961acdea
SRK		 3469 memset(&vport_update_params.rss_params, 0,
3470 sizeof(vport_update_params.rss_params));
2950219d 3471 }
2950219d
YM		 3472
3473 rc = edev->ops->vport_update(cdev, &vport_update_params);
3474 if (rc) {
3475 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
3476 return rc;
3477 }
3478
3479 return 0;
3480}
3481
0d8e0aa0
SK		 3482static int qede_set_mcast_rx_mac(struct qede_dev *edev,
3483 enum qed_filter_xcast_params_type opcode,
3484 unsigned char *mac, int num_macs)
3485{
3486 struct qed_filter_params filter_cmd;
3487 int i;
3488
3489 memset(&filter_cmd, 0, sizeof(filter_cmd));
3490 filter_cmd.type = QED_FILTER_TYPE_MCAST;
3491 filter_cmd.filter.mcast.type = opcode;
3492 filter_cmd.filter.mcast.num = num_macs;
3493
3494 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
3495 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
3496
3497 return edev->ops->filter_config(edev->cdev, &filter_cmd);
3498}
3499
2950219d
YM		 3500enum qede_unload_mode {
3501 QEDE_UNLOAD_NORMAL,
3502};
3503
3504static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
3505{
a2ec6172 3506 struct qed_link_params link_params;
2950219d
YM		 3507 int rc;
3508
3509 DP_INFO(edev, "Starting qede unload\n");
3510
0d8e0aa0
SK		 3511 mutex_lock(&edev->qede_lock);
3512 edev->state = QEDE_STATE_CLOSED;
3513
2950219d
YM		 3514 /* Close OS Tx */
3515 netif_tx_disable(edev->ndev);
3516 netif_carrier_off(edev->ndev);
3517
a2ec6172
SK		 3518 /* Reset the link */
3519 memset(&link_params, 0, sizeof(link_params));
3520 link_params.link_up = false;
3521 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 3522 rc = qede_stop_queues(edev);
3523 if (rc) {
3524 qede_sync_free_irqs(edev);
3525 goto out;
3526 }
3527
3528 DP_INFO(edev, "Stopped Queues\n");
3529
7c1bfcad 3530 qede_vlan_mark_nonconfigured(edev);
2950219d
YM		 3531 edev->ops->fastpath_stop(edev->cdev);
3532
3533 /* Release the interrupts */
3534 qede_sync_free_irqs(edev);
3535 edev->ops->common->set_fp_int(edev->cdev, 0);
3536
3537 qede_napi_disable_remove(edev);
3538
3539 qede_free_mem_load(edev);
3540 qede_free_fp_array(edev);
3541
3542out:
3543 mutex_unlock(&edev->qede_lock);
3544 DP_INFO(edev, "Ending qede unload\n");
3545}
3546
3547enum qede_load_mode {
3548 QEDE_LOAD_NORMAL,
a0d26d5a 3549 QEDE_LOAD_RELOAD,
2950219d
YM		 3550};
3551
3552static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
3553{
a2ec6172
SK		 3554 struct qed_link_params link_params;
3555 struct qed_link_output link_output;
2950219d
YM		 3556 int rc;
3557
3558 DP_INFO(edev, "Starting qede load\n");
3559
3560 rc = qede_set_num_queues(edev);
3561 if (rc)
3562 goto err0;
3563
3564 rc = qede_alloc_fp_array(edev);
3565 if (rc)
3566 goto err0;
3567
3568 qede_init_fp(edev);
3569
3570 rc = qede_alloc_mem_load(edev);
3571 if (rc)
3572 goto err1;
3573 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
9a4d7e86 3574 QEDE_QUEUE_CNT(edev), edev->num_tc);
2950219d
YM		 3575
3576 rc = qede_set_real_num_queues(edev);
3577 if (rc)
3578 goto err2;
3579
3580 qede_napi_add_enable(edev);
3581 DP_INFO(edev, "Napi added and enabled\n");
3582
3583 rc = qede_setup_irqs(edev);
3584 if (rc)
3585 goto err3;
3586 DP_INFO(edev, "Setup IRQs succeeded\n");
3587
a0d26d5a 3588 rc = qede_start_queues(edev, mode != QEDE_LOAD_RELOAD);
2950219d
YM		 3589 if (rc)
3590 goto err4;
3591 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
3592
3593 /* Add primary mac and set Rx filters */
3594 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
3595
0d8e0aa0
SK		 3596 mutex_lock(&edev->qede_lock);
3597 edev->state = QEDE_STATE_OPEN;
3598 mutex_unlock(&edev->qede_lock);
a2ec6172 3599
7c1bfcad
SRK		 3600 /* Program un-configured VLANs */
3601 qede_configure_vlan_filters(edev);
3602
a2ec6172
SK		 3603 /* Ask for link-up using current configuration */
3604 memset(&link_params, 0, sizeof(link_params));
3605 link_params.link_up = true;
3606 edev->ops->common->set_link(edev->cdev, &link_params);
3607
3608 /* Query whether link is already-up */
3609 memset(&link_output, 0, sizeof(link_output));
3610 edev->ops->common->get_link(edev->cdev, &link_output);
3611 qede_link_update(edev, &link_output);
3612
2950219d
YM		 3613 DP_INFO(edev, "Ending successfully qede load\n");
3614
3615 return 0;
3616
3617err4:
3618 qede_sync_free_irqs(edev);
3619 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
3620err3:
3621 qede_napi_disable_remove(edev);
3622err2:
3623 qede_free_mem_load(edev);
3624err1:
3625 edev->ops->common->set_fp_int(edev->cdev, 0);
3626 qede_free_fp_array(edev);
9a4d7e86
SRK		 3627 edev->num_queues = 0;
3628 edev->fp_num_tx = 0;
3629 edev->fp_num_rx = 0;
2950219d
YM		 3630err0:
3631 return rc;
3632}
3633
133fac0e
SK		 3634void qede_reload(struct qede_dev *edev,
3635 void (*func)(struct qede_dev *, union qede_reload_args *),
3636 union qede_reload_args *args)
3637{
3638 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3639 /* Call function handler to update parameters
3640 * needed for function load.
3641 */
3642 if (func)
3643 func(edev, args);
3644
a0d26d5a 3645 qede_load(edev, QEDE_LOAD_RELOAD);
133fac0e
SK		 3646
3647 mutex_lock(&edev->qede_lock);
3648 qede_config_rx_mode(edev->ndev);
3649 mutex_unlock(&edev->qede_lock);
3650}
3651
2950219d
YM		 3652/* called with rtnl_lock */
3653static int qede_open(struct net_device *ndev)
3654{
3655 struct qede_dev *edev = netdev_priv(ndev);
b18e170c 3656 int rc;
2950219d
YM		 3657
3658 netif_carrier_off(ndev);
3659
3660 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
3661
b18e170c
MC		 3662 rc = qede_load(edev, QEDE_LOAD_NORMAL);
3663
3664 if (rc)
3665 return rc;
3666
f9f082a9
AD		 3667 udp_tunnel_get_rx_info(ndev);
3668
b18e170c 3669 return 0;
2950219d
YM		 3670}
3671
3672static int qede_close(struct net_device *ndev)
3673{
3674 struct qede_dev *edev = netdev_priv(ndev);
3675
3676 qede_unload(edev, QEDE_UNLOAD_NORMAL);
3677
3678 return 0;
3679}
0d8e0aa0 3680
a2ec6172
SK		 3681static void qede_link_update(void *dev, struct qed_link_output *link)
3682{
3683 struct qede_dev *edev = dev;
3684
3685 if (!netif_running(edev->ndev)) {
3686 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
3687 return;
3688 }
3689
3690 if (link->link_up) {
8e025ae2
YM		 3691 if (!netif_carrier_ok(edev->ndev)) {
3692 DP_NOTICE(edev, "Link is up\n");
3693 netif_tx_start_all_queues(edev->ndev);
3694 netif_carrier_on(edev->ndev);
3695 }
a2ec6172 3696 } else {
8e025ae2
YM		 3697 if (netif_carrier_ok(edev->ndev)) {
3698 DP_NOTICE(edev, "Link is down\n");
3699 netif_tx_disable(edev->ndev);
3700 netif_carrier_off(edev->ndev);
3701 }
a2ec6172
SK		 3702 }
3703}
3704
0d8e0aa0
SK		 3705static int qede_set_mac_addr(struct net_device *ndev, void *p)
3706{
3707 struct qede_dev *edev = netdev_priv(ndev);
3708 struct sockaddr *addr = p;
3709 int rc;
3710
3711 ASSERT_RTNL(); /* @@@TBD To be removed */
3712
3713 DP_INFO(edev, "Set_mac_addr called\n");
3714
3715 if (!is_valid_ether_addr(addr->sa_data)) {
3716 DP_NOTICE(edev, "The MAC address is not valid\n");
3717 return -EFAULT;
3718 }
3719
eff16960
YM		 3720 if (!edev->ops->check_mac(edev->cdev, addr->sa_data)) {
3721 DP_NOTICE(edev, "qed prevents setting MAC\n");
3722 return -EINVAL;
3723 }
3724
0d8e0aa0
SK		 3725 ether_addr_copy(ndev->dev_addr, addr->sa_data);
3726
3727 if (!netif_running(ndev)) {
3728 DP_NOTICE(edev, "The device is currently down\n");
3729 return 0;
3730 }
3731
3732 /* Remove the previous primary mac */
3733 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3734 edev->primary_mac);
3735 if (rc)
3736 return rc;
3737
3738 /* Add MAC filter according to the new unicast HW MAC address */
3739 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
3740 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3741 edev->primary_mac);
3742}
3743
3744static int
3745qede_configure_mcast_filtering(struct net_device *ndev,
3746 enum qed_filter_rx_mode_type *accept_flags)
3747{
3748 struct qede_dev *edev = netdev_priv(ndev);
3749 unsigned char *mc_macs, *temp;
3750 struct netdev_hw_addr *ha;
3751 int rc = 0, mc_count;
3752 size_t size;
3753
3754 size = 64 * ETH_ALEN;
3755
3756 mc_macs = kzalloc(size, GFP_KERNEL);
3757 if (!mc_macs) {
3758 DP_NOTICE(edev,
3759 "Failed to allocate memory for multicast MACs\n");
3760 rc = -ENOMEM;
3761 goto exit;
3762 }
3763
3764 temp = mc_macs;
3765
3766 /* Remove all previously configured MAC filters */
3767 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
3768 mc_macs, 1);
3769 if (rc)
3770 goto exit;
3771
3772 netif_addr_lock_bh(ndev);
3773
3774 mc_count = netdev_mc_count(ndev);
3775 if (mc_count < 64) {
3776 netdev_for_each_mc_addr(ha, ndev) {
3777 ether_addr_copy(temp, ha->addr);
3778 temp += ETH_ALEN;
3779 }
3780 }
3781
3782 netif_addr_unlock_bh(ndev);
3783
3784 /* Check for all multicast @@@TBD resource allocation */
3785 if ((ndev->flags & IFF_ALLMULTI) ||
3786 (mc_count > 64)) {
3787 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
3788 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
3789 } else {
3790 /* Add all multicast MAC filters */
3791 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
3792 mc_macs, mc_count);
3793 }
3794
3795exit:
3796 kfree(mc_macs);
3797 return rc;
3798}
3799
3800static void qede_set_rx_mode(struct net_device *ndev)
3801{
3802 struct qede_dev *edev = netdev_priv(ndev);
3803
3804 DP_INFO(edev, "qede_set_rx_mode called\n");
3805
3806 if (edev->state != QEDE_STATE_OPEN) {
3807 DP_INFO(edev,
3808 "qede_set_rx_mode called while interface is down\n");
3809 } else {
3810 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
3811 schedule_delayed_work(&edev->sp_task, 0);
3812 }
3813}
3814
3815/* Must be called with qede_lock held */
3816static void qede_config_rx_mode(struct net_device *ndev)
3817{
3818 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
3819 struct qede_dev *edev = netdev_priv(ndev);
3820 struct qed_filter_params rx_mode;
3821 unsigned char *uc_macs, *temp;
3822 struct netdev_hw_addr *ha;
3823 int rc, uc_count;
3824 size_t size;
3825
3826 netif_addr_lock_bh(ndev);
3827
3828 uc_count = netdev_uc_count(ndev);
3829 size = uc_count * ETH_ALEN;
3830
3831 uc_macs = kzalloc(size, GFP_ATOMIC);
3832 if (!uc_macs) {
3833 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
3834 netif_addr_unlock_bh(ndev);
3835 return;
3836 }
3837
3838 temp = uc_macs;
3839 netdev_for_each_uc_addr(ha, ndev) {
3840 ether_addr_copy(temp, ha->addr);
3841 temp += ETH_ALEN;
3842 }
3843
3844 netif_addr_unlock_bh(ndev);
3845
3846 /* Configure the struct for the Rx mode */
3847 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
3848 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
3849
3850 /* Remove all previous unicast secondary macs and multicast macs
3851 * (configrue / leave the primary mac)
3852 */
3853 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
3854 edev->primary_mac);
3855 if (rc)
3856 goto out;
3857
3858 /* Check for promiscuous */
3859 if ((ndev->flags & IFF_PROMISC) ||
3860 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
3861 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
3862 } else {
3863 /* Add MAC filters according to the unicast secondary macs */
3864 int i;
3865
3866 temp = uc_macs;
3867 for (i = 0; i < uc_count; i++) {
3868 rc = qede_set_ucast_rx_mac(edev,
3869 QED_FILTER_XCAST_TYPE_ADD,
3870 temp);
3871 if (rc)
3872 goto out;
3873
3874 temp += ETH_ALEN;
3875 }
3876
3877 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
3878 if (rc)
3879 goto out;
3880 }
3881
7c1bfcad
SRK		 3882 /* take care of VLAN mode */
3883 if (ndev->flags & IFF_PROMISC) {
3884 qede_config_accept_any_vlan(edev, true);
3885 } else if (!edev->non_configured_vlans) {
3886 /* It's possible that accept_any_vlan mode is set due to a
3887 * previous setting of IFF_PROMISC. If vlan credits are
3888 * sufficient, disable accept_any_vlan.
3889 */
3890 qede_config_accept_any_vlan(edev, false);
3891 }
3892
0d8e0aa0
SK		 3893 rx_mode.filter.accept_flags = accept_flags;
3894 edev->ops->filter_config(edev->cdev, &rx_mode);
3895out:
3896 kfree(uc_macs);
3897}
Linux kernel - Deliverables
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