Commit | Line | Data |
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afd4aea0 | 1 | /**************************************************************************** |
f7a6d2c4 BH |
2 | * Driver for Solarflare network controllers and boards |
3 | * Copyright 2008-2013 Solarflare Communications Inc. | |
afd4aea0 BH |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation, incorporated herein by reference. | |
8 | */ | |
9 | ||
10 | #include <linux/delay.h> | |
42ca087f | 11 | #include <linux/moduleparam.h> |
84567995 | 12 | #include <linux/atomic.h> |
afd4aea0 BH |
13 | #include "net_driver.h" |
14 | #include "nic.h" | |
15 | #include "io.h" | |
8b8a95a1 | 16 | #include "farch_regs.h" |
afd4aea0 BH |
17 | #include "mcdi_pcol.h" |
18 | #include "phy.h" | |
19 | ||
20 | /************************************************************************** | |
21 | * | |
22 | * Management-Controller-to-Driver Interface | |
23 | * | |
24 | ************************************************************************** | |
25 | */ | |
26 | ||
ebf98e79 | 27 | #define MCDI_RPC_TIMEOUT (10 * HZ) |
afd4aea0 | 28 | |
3f713bf4 BH |
29 | /* A reboot/assertion causes the MCDI status word to be set after the |
30 | * command word is set or a REBOOT event is sent. If we notice a reboot | |
b2d32f03 | 31 | * via these mechanisms then wait 250ms for the status word to be set. |
d36a08b4 | 32 | */ |
3f713bf4 | 33 | #define MCDI_STATUS_DELAY_US 100 |
b2d32f03 | 34 | #define MCDI_STATUS_DELAY_COUNT 2500 |
3f713bf4 BH |
35 | #define MCDI_STATUS_SLEEP_MS \ |
36 | (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000) | |
afd4aea0 BH |
37 | |
38 | #define SEQ_MASK \ | |
39 | EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ)) | |
40 | ||
cade715f BH |
41 | struct efx_mcdi_async_param { |
42 | struct list_head list; | |
43 | unsigned int cmd; | |
44 | size_t inlen; | |
45 | size_t outlen; | |
1e0b8120 | 46 | bool quiet; |
cade715f BH |
47 | efx_mcdi_async_completer *complete; |
48 | unsigned long cookie; | |
49 | /* followed by request/response buffer */ | |
50 | }; | |
51 | ||
52 | static void efx_mcdi_timeout_async(unsigned long context); | |
4c75b43a BH |
53 | static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, |
54 | bool *was_attached_out); | |
5731d7b3 | 55 | static bool efx_mcdi_poll_once(struct efx_nic *efx); |
e283546c | 56 | static void efx_mcdi_abandon(struct efx_nic *efx); |
afd4aea0 | 57 | |
42ca087f EC |
58 | #ifdef CONFIG_SFC_MCDI_LOGGING |
59 | static bool mcdi_logging_default; | |
60 | module_param(mcdi_logging_default, bool, 0644); | |
61 | MODULE_PARM_DESC(mcdi_logging_default, | |
62 | "Enable MCDI logging on newly-probed functions"); | |
63 | #endif | |
64 | ||
f073dde0 | 65 | int efx_mcdi_init(struct efx_nic *efx) |
afd4aea0 BH |
66 | { |
67 | struct efx_mcdi_iface *mcdi; | |
4c75b43a | 68 | bool already_attached; |
75aba2a5 | 69 | int rc = -ENOMEM; |
afd4aea0 | 70 | |
f3ad5003 BH |
71 | efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL); |
72 | if (!efx->mcdi) | |
75aba2a5 | 73 | goto fail; |
f3ad5003 | 74 | |
afd4aea0 | 75 | mcdi = efx_mcdi(efx); |
cade715f | 76 | mcdi->efx = efx; |
75aba2a5 EC |
77 | #ifdef CONFIG_SFC_MCDI_LOGGING |
78 | /* consuming code assumes buffer is page-sized */ | |
79 | mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL); | |
80 | if (!mcdi->logging_buffer) | |
81 | goto fail1; | |
42ca087f | 82 | mcdi->logging_enabled = mcdi_logging_default; |
75aba2a5 | 83 | #endif |
afd4aea0 | 84 | init_waitqueue_head(&mcdi->wq); |
acd43a90 | 85 | init_waitqueue_head(&mcdi->proxy_rx_wq); |
afd4aea0 | 86 | spin_lock_init(&mcdi->iface_lock); |
251111d9 | 87 | mcdi->state = MCDI_STATE_QUIESCENT; |
afd4aea0 | 88 | mcdi->mode = MCDI_MODE_POLL; |
cade715f BH |
89 | spin_lock_init(&mcdi->async_lock); |
90 | INIT_LIST_HEAD(&mcdi->async_list); | |
91 | setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async, | |
92 | (unsigned long)mcdi); | |
afd4aea0 BH |
93 | |
94 | (void) efx_mcdi_poll_reboot(efx); | |
d36a08b4 | 95 | mcdi->new_epoch = true; |
f073dde0 BH |
96 | |
97 | /* Recover from a failed assertion before probing */ | |
4c75b43a BH |
98 | rc = efx_mcdi_handle_assertion(efx); |
99 | if (rc) | |
75aba2a5 | 100 | goto fail2; |
4c75b43a BH |
101 | |
102 | /* Let the MC (and BMC, if this is a LOM) know that the driver | |
103 | * is loaded. We should do this before we reset the NIC. | |
104 | */ | |
105 | rc = efx_mcdi_drv_attach(efx, true, &already_attached); | |
106 | if (rc) { | |
107 | netif_err(efx, probe, efx->net_dev, | |
108 | "Unable to register driver with MCPU\n"); | |
75aba2a5 | 109 | goto fail2; |
4c75b43a BH |
110 | } |
111 | if (already_attached) | |
112 | /* Not a fatal error */ | |
113 | netif_err(efx, probe, efx->net_dev, | |
114 | "Host already registered with MCPU\n"); | |
115 | ||
0bcf4a64 BH |
116 | if (efx->mcdi->fn_flags & |
117 | (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY)) | |
118 | efx->primary = efx; | |
119 | ||
4c75b43a | 120 | return 0; |
75aba2a5 EC |
121 | fail2: |
122 | #ifdef CONFIG_SFC_MCDI_LOGGING | |
123 | free_page((unsigned long)mcdi->logging_buffer); | |
124 | fail1: | |
125 | #endif | |
126 | kfree(efx->mcdi); | |
127 | efx->mcdi = NULL; | |
128 | fail: | |
129 | return rc; | |
afd4aea0 BH |
130 | } |
131 | ||
f3ad5003 BH |
132 | void efx_mcdi_fini(struct efx_nic *efx) |
133 | { | |
4c75b43a BH |
134 | if (!efx->mcdi) |
135 | return; | |
136 | ||
137 | BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT); | |
138 | ||
139 | /* Relinquish the device (back to the BMC, if this is a LOM) */ | |
140 | efx_mcdi_drv_attach(efx, false, NULL); | |
141 | ||
75aba2a5 EC |
142 | #ifdef CONFIG_SFC_MCDI_LOGGING |
143 | free_page((unsigned long)efx->mcdi->iface.logging_buffer); | |
144 | #endif | |
145 | ||
f3ad5003 BH |
146 | kfree(efx->mcdi); |
147 | } | |
148 | ||
2f4bcdcc BH |
149 | static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd, |
150 | const efx_dword_t *inbuf, size_t inlen) | |
afd4aea0 BH |
151 | { |
152 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
75aba2a5 EC |
153 | #ifdef CONFIG_SFC_MCDI_LOGGING |
154 | char *buf = mcdi->logging_buffer; /* page-sized */ | |
155 | #endif | |
df2cd8af BH |
156 | efx_dword_t hdr[2]; |
157 | size_t hdr_len; | |
afd4aea0 BH |
158 | u32 xflags, seqno; |
159 | ||
251111d9 | 160 | BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT); |
afd4aea0 | 161 | |
2f4bcdcc BH |
162 | /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */ |
163 | spin_lock_bh(&mcdi->iface_lock); | |
164 | ++mcdi->seqno; | |
165 | spin_unlock_bh(&mcdi->iface_lock); | |
166 | ||
afd4aea0 BH |
167 | seqno = mcdi->seqno & SEQ_MASK; |
168 | xflags = 0; | |
169 | if (mcdi->mode == MCDI_MODE_EVENTS) | |
170 | xflags |= MCDI_HEADER_XFLAGS_EVREQ; | |
171 | ||
df2cd8af BH |
172 | if (efx->type->mcdi_max_ver == 1) { |
173 | /* MCDI v1 */ | |
d36a08b4 | 174 | EFX_POPULATE_DWORD_7(hdr[0], |
df2cd8af BH |
175 | MCDI_HEADER_RESPONSE, 0, |
176 | MCDI_HEADER_RESYNC, 1, | |
177 | MCDI_HEADER_CODE, cmd, | |
178 | MCDI_HEADER_DATALEN, inlen, | |
179 | MCDI_HEADER_SEQ, seqno, | |
d36a08b4 DP |
180 | MCDI_HEADER_XFLAGS, xflags, |
181 | MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); | |
df2cd8af BH |
182 | hdr_len = 4; |
183 | } else { | |
184 | /* MCDI v2 */ | |
185 | BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2); | |
d36a08b4 | 186 | EFX_POPULATE_DWORD_7(hdr[0], |
df2cd8af BH |
187 | MCDI_HEADER_RESPONSE, 0, |
188 | MCDI_HEADER_RESYNC, 1, | |
189 | MCDI_HEADER_CODE, MC_CMD_V2_EXTN, | |
190 | MCDI_HEADER_DATALEN, 0, | |
191 | MCDI_HEADER_SEQ, seqno, | |
d36a08b4 DP |
192 | MCDI_HEADER_XFLAGS, xflags, |
193 | MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); | |
df2cd8af BH |
194 | EFX_POPULATE_DWORD_2(hdr[1], |
195 | MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd, | |
196 | MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen); | |
197 | hdr_len = 8; | |
198 | } | |
afd4aea0 | 199 | |
75aba2a5 | 200 | #ifdef CONFIG_SFC_MCDI_LOGGING |
e7fef9b4 | 201 | if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) { |
75aba2a5 EC |
202 | int bytes = 0; |
203 | int i; | |
204 | /* Lengths should always be a whole number of dwords, so scream | |
205 | * if they're not. | |
206 | */ | |
207 | WARN_ON_ONCE(hdr_len % 4); | |
208 | WARN_ON_ONCE(inlen % 4); | |
209 | ||
210 | /* We own the logging buffer, as only one MCDI can be in | |
211 | * progress on a NIC at any one time. So no need for locking. | |
212 | */ | |
213 | for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++) | |
214 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, | |
215 | " %08x", le32_to_cpu(hdr[i].u32[0])); | |
216 | ||
217 | for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++) | |
218 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, | |
219 | " %08x", le32_to_cpu(inbuf[i].u32[0])); | |
220 | ||
221 | netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf); | |
222 | } | |
223 | #endif | |
224 | ||
df2cd8af | 225 | efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen); |
2f4bcdcc BH |
226 | |
227 | mcdi->new_epoch = false; | |
afd4aea0 BH |
228 | } |
229 | ||
5bc283e5 BH |
230 | static int efx_mcdi_errno(unsigned int mcdi_err) |
231 | { | |
232 | switch (mcdi_err) { | |
233 | case 0: | |
234 | return 0; | |
235 | #define TRANSLATE_ERROR(name) \ | |
236 | case MC_CMD_ERR_ ## name: \ | |
237 | return -name; | |
df2cd8af | 238 | TRANSLATE_ERROR(EPERM); |
5bc283e5 BH |
239 | TRANSLATE_ERROR(ENOENT); |
240 | TRANSLATE_ERROR(EINTR); | |
df2cd8af | 241 | TRANSLATE_ERROR(EAGAIN); |
5bc283e5 BH |
242 | TRANSLATE_ERROR(EACCES); |
243 | TRANSLATE_ERROR(EBUSY); | |
244 | TRANSLATE_ERROR(EINVAL); | |
245 | TRANSLATE_ERROR(EDEADLK); | |
246 | TRANSLATE_ERROR(ENOSYS); | |
247 | TRANSLATE_ERROR(ETIME); | |
df2cd8af BH |
248 | TRANSLATE_ERROR(EALREADY); |
249 | TRANSLATE_ERROR(ENOSPC); | |
5bc283e5 | 250 | #undef TRANSLATE_ERROR |
ea136ae7 BH |
251 | case MC_CMD_ERR_ENOTSUP: |
252 | return -EOPNOTSUPP; | |
df2cd8af BH |
253 | case MC_CMD_ERR_ALLOC_FAIL: |
254 | return -ENOBUFS; | |
255 | case MC_CMD_ERR_MAC_EXIST: | |
256 | return -EADDRINUSE; | |
5bc283e5 | 257 | default: |
df2cd8af BH |
258 | return -EPROTO; |
259 | } | |
260 | } | |
261 | ||
262 | static void efx_mcdi_read_response_header(struct efx_nic *efx) | |
263 | { | |
264 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
265 | unsigned int respseq, respcmd, error; | |
75aba2a5 EC |
266 | #ifdef CONFIG_SFC_MCDI_LOGGING |
267 | char *buf = mcdi->logging_buffer; /* page-sized */ | |
268 | #endif | |
df2cd8af BH |
269 | efx_dword_t hdr; |
270 | ||
271 | efx->type->mcdi_read_response(efx, &hdr, 0, 4); | |
272 | respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ); | |
273 | respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE); | |
274 | error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR); | |
275 | ||
276 | if (respcmd != MC_CMD_V2_EXTN) { | |
277 | mcdi->resp_hdr_len = 4; | |
278 | mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN); | |
279 | } else { | |
280 | efx->type->mcdi_read_response(efx, &hdr, 4, 4); | |
281 | mcdi->resp_hdr_len = 8; | |
282 | mcdi->resp_data_len = | |
283 | EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN); | |
284 | } | |
285 | ||
75aba2a5 | 286 | #ifdef CONFIG_SFC_MCDI_LOGGING |
e7fef9b4 | 287 | if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) { |
75aba2a5 EC |
288 | size_t hdr_len, data_len; |
289 | int bytes = 0; | |
290 | int i; | |
291 | ||
292 | WARN_ON_ONCE(mcdi->resp_hdr_len % 4); | |
293 | hdr_len = mcdi->resp_hdr_len / 4; | |
294 | /* MCDI_DECLARE_BUF ensures that underlying buffer is padded | |
295 | * to dword size, and the MCDI buffer is always dword size | |
296 | */ | |
297 | data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4); | |
298 | ||
299 | /* We own the logging buffer, as only one MCDI can be in | |
300 | * progress on a NIC at any one time. So no need for locking. | |
301 | */ | |
302 | for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) { | |
303 | efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4); | |
304 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, | |
305 | " %08x", le32_to_cpu(hdr.u32[0])); | |
306 | } | |
307 | ||
308 | for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) { | |
309 | efx->type->mcdi_read_response(efx, &hdr, | |
310 | mcdi->resp_hdr_len + (i * 4), 4); | |
311 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, | |
312 | " %08x", le32_to_cpu(hdr.u32[0])); | |
313 | } | |
314 | ||
315 | netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf); | |
316 | } | |
317 | #endif | |
318 | ||
ac28d179 | 319 | mcdi->resprc_raw = 0; |
df2cd8af BH |
320 | if (error && mcdi->resp_data_len == 0) { |
321 | netif_err(efx, hw, efx->net_dev, "MC rebooted\n"); | |
322 | mcdi->resprc = -EIO; | |
323 | } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) { | |
324 | netif_err(efx, hw, efx->net_dev, | |
325 | "MC response mismatch tx seq 0x%x rx seq 0x%x\n", | |
326 | respseq, mcdi->seqno); | |
327 | mcdi->resprc = -EIO; | |
328 | } else if (error) { | |
329 | efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4); | |
ac28d179 BK |
330 | mcdi->resprc_raw = EFX_DWORD_FIELD(hdr, EFX_DWORD_0); |
331 | mcdi->resprc = efx_mcdi_errno(mcdi->resprc_raw); | |
df2cd8af BH |
332 | } else { |
333 | mcdi->resprc = 0; | |
5bc283e5 BH |
334 | } |
335 | } | |
336 | ||
5731d7b3 RS |
337 | static bool efx_mcdi_poll_once(struct efx_nic *efx) |
338 | { | |
339 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
340 | ||
341 | rmb(); | |
342 | if (!efx->type->mcdi_poll_response(efx)) | |
343 | return false; | |
344 | ||
345 | spin_lock_bh(&mcdi->iface_lock); | |
346 | efx_mcdi_read_response_header(efx); | |
347 | spin_unlock_bh(&mcdi->iface_lock); | |
348 | ||
349 | return true; | |
350 | } | |
351 | ||
afd4aea0 BH |
352 | static int efx_mcdi_poll(struct efx_nic *efx) |
353 | { | |
354 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
ebf98e79 | 355 | unsigned long time, finish; |
5bc283e5 | 356 | unsigned int spins; |
5bc283e5 | 357 | int rc; |
afd4aea0 BH |
358 | |
359 | /* Check for a reboot atomically with respect to efx_mcdi_copyout() */ | |
5bc283e5 | 360 | rc = efx_mcdi_poll_reboot(efx); |
df2cd8af | 361 | if (rc) { |
369327fa | 362 | spin_lock_bh(&mcdi->iface_lock); |
df2cd8af BH |
363 | mcdi->resprc = rc; |
364 | mcdi->resp_hdr_len = 0; | |
365 | mcdi->resp_data_len = 0; | |
369327fa | 366 | spin_unlock_bh(&mcdi->iface_lock); |
df2cd8af BH |
367 | return 0; |
368 | } | |
afd4aea0 BH |
369 | |
370 | /* Poll for completion. Poll quickly (once a us) for the 1st jiffy, | |
371 | * because generally mcdi responses are fast. After that, back off | |
372 | * and poll once a jiffy (approximately) | |
373 | */ | |
374 | spins = TICK_USEC; | |
ebf98e79 | 375 | finish = jiffies + MCDI_RPC_TIMEOUT; |
afd4aea0 BH |
376 | |
377 | while (1) { | |
378 | if (spins != 0) { | |
379 | --spins; | |
380 | udelay(1); | |
55029c1d BH |
381 | } else { |
382 | schedule_timeout_uninterruptible(1); | |
383 | } | |
afd4aea0 | 384 | |
ebf98e79 | 385 | time = jiffies; |
afd4aea0 | 386 | |
5731d7b3 | 387 | if (efx_mcdi_poll_once(efx)) |
afd4aea0 BH |
388 | break; |
389 | ||
ebf98e79 | 390 | if (time_after(time, finish)) |
afd4aea0 BH |
391 | return -ETIMEDOUT; |
392 | } | |
393 | ||
afd4aea0 BH |
394 | /* Return rc=0 like wait_event_timeout() */ |
395 | return 0; | |
396 | } | |
397 | ||
876be083 BH |
398 | /* Test and clear MC-rebooted flag for this port/function; reset |
399 | * software state as necessary. | |
400 | */ | |
afd4aea0 BH |
401 | int efx_mcdi_poll_reboot(struct efx_nic *efx) |
402 | { | |
f3ad5003 BH |
403 | if (!efx->mcdi) |
404 | return 0; | |
afd4aea0 | 405 | |
cd0ecc9a | 406 | return efx->type->mcdi_poll_reboot(efx); |
afd4aea0 BH |
407 | } |
408 | ||
cade715f BH |
409 | static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi) |
410 | { | |
411 | return cmpxchg(&mcdi->state, | |
412 | MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) == | |
413 | MCDI_STATE_QUIESCENT; | |
414 | } | |
415 | ||
416 | static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi) | |
afd4aea0 BH |
417 | { |
418 | /* Wait until the interface becomes QUIESCENT and we win the race | |
cade715f BH |
419 | * to mark it RUNNING_SYNC. |
420 | */ | |
afd4aea0 | 421 | wait_event(mcdi->wq, |
251111d9 | 422 | cmpxchg(&mcdi->state, |
cade715f | 423 | MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) == |
251111d9 | 424 | MCDI_STATE_QUIESCENT); |
afd4aea0 BH |
425 | } |
426 | ||
427 | static int efx_mcdi_await_completion(struct efx_nic *efx) | |
428 | { | |
429 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
430 | ||
251111d9 BH |
431 | if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED, |
432 | MCDI_RPC_TIMEOUT) == 0) | |
afd4aea0 BH |
433 | return -ETIMEDOUT; |
434 | ||
435 | /* Check if efx_mcdi_set_mode() switched us back to polled completions. | |
436 | * In which case, poll for completions directly. If efx_mcdi_ev_cpl() | |
437 | * completed the request first, then we'll just end up completing the | |
438 | * request again, which is safe. | |
439 | * | |
440 | * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which | |
441 | * wait_event_timeout() implicitly provides. | |
442 | */ | |
443 | if (mcdi->mode == MCDI_MODE_POLL) | |
444 | return efx_mcdi_poll(efx); | |
445 | ||
446 | return 0; | |
447 | } | |
448 | ||
cade715f BH |
449 | /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the |
450 | * requester. Return whether this was done. Does not take any locks. | |
451 | */ | |
452 | static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi) | |
afd4aea0 | 453 | { |
cade715f BH |
454 | if (cmpxchg(&mcdi->state, |
455 | MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) == | |
456 | MCDI_STATE_RUNNING_SYNC) { | |
afd4aea0 BH |
457 | wake_up(&mcdi->wq); |
458 | return true; | |
459 | } | |
460 | ||
461 | return false; | |
462 | } | |
463 | ||
464 | static void efx_mcdi_release(struct efx_mcdi_iface *mcdi) | |
465 | { | |
cade715f BH |
466 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
467 | struct efx_mcdi_async_param *async; | |
468 | struct efx_nic *efx = mcdi->efx; | |
469 | ||
470 | /* Process the asynchronous request queue */ | |
471 | spin_lock_bh(&mcdi->async_lock); | |
472 | async = list_first_entry_or_null( | |
473 | &mcdi->async_list, struct efx_mcdi_async_param, list); | |
474 | if (async) { | |
475 | mcdi->state = MCDI_STATE_RUNNING_ASYNC; | |
476 | efx_mcdi_send_request(efx, async->cmd, | |
477 | (const efx_dword_t *)(async + 1), | |
478 | async->inlen); | |
479 | mod_timer(&mcdi->async_timer, | |
480 | jiffies + MCDI_RPC_TIMEOUT); | |
481 | } | |
482 | spin_unlock_bh(&mcdi->async_lock); | |
483 | ||
484 | if (async) | |
485 | return; | |
486 | } | |
487 | ||
251111d9 | 488 | mcdi->state = MCDI_STATE_QUIESCENT; |
afd4aea0 BH |
489 | wake_up(&mcdi->wq); |
490 | } | |
491 | ||
cade715f BH |
492 | /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the |
493 | * asynchronous completion function, and release the interface. | |
494 | * Return whether this was done. Must be called in bh-disabled | |
495 | * context. Will take iface_lock and async_lock. | |
496 | */ | |
497 | static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout) | |
498 | { | |
499 | struct efx_nic *efx = mcdi->efx; | |
500 | struct efx_mcdi_async_param *async; | |
1e0b8120 | 501 | size_t hdr_len, data_len, err_len; |
cade715f | 502 | efx_dword_t *outbuf; |
aa09a3da | 503 | MCDI_DECLARE_BUF_ERR(errbuf); |
cade715f BH |
504 | int rc; |
505 | ||
506 | if (cmpxchg(&mcdi->state, | |
507 | MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) != | |
508 | MCDI_STATE_RUNNING_ASYNC) | |
509 | return false; | |
510 | ||
511 | spin_lock(&mcdi->iface_lock); | |
512 | if (timeout) { | |
513 | /* Ensure that if the completion event arrives later, | |
514 | * the seqno check in efx_mcdi_ev_cpl() will fail | |
515 | */ | |
516 | ++mcdi->seqno; | |
517 | ++mcdi->credits; | |
518 | rc = -ETIMEDOUT; | |
519 | hdr_len = 0; | |
520 | data_len = 0; | |
521 | } else { | |
522 | rc = mcdi->resprc; | |
523 | hdr_len = mcdi->resp_hdr_len; | |
524 | data_len = mcdi->resp_data_len; | |
525 | } | |
526 | spin_unlock(&mcdi->iface_lock); | |
527 | ||
528 | /* Stop the timer. In case the timer function is running, we | |
529 | * must wait for it to return so that there is no possibility | |
530 | * of it aborting the next request. | |
531 | */ | |
532 | if (!timeout) | |
533 | del_timer_sync(&mcdi->async_timer); | |
534 | ||
535 | spin_lock(&mcdi->async_lock); | |
536 | async = list_first_entry(&mcdi->async_list, | |
537 | struct efx_mcdi_async_param, list); | |
538 | list_del(&async->list); | |
539 | spin_unlock(&mcdi->async_lock); | |
540 | ||
541 | outbuf = (efx_dword_t *)(async + 1); | |
542 | efx->type->mcdi_read_response(efx, outbuf, hdr_len, | |
543 | min(async->outlen, data_len)); | |
1e0b8120 EC |
544 | if (!timeout && rc && !async->quiet) { |
545 | err_len = min(sizeof(errbuf), data_len); | |
546 | efx->type->mcdi_read_response(efx, errbuf, hdr_len, | |
547 | sizeof(errbuf)); | |
548 | efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf, | |
549 | err_len, rc); | |
550 | } | |
7014d7f6 BK |
551 | |
552 | if (async->complete) | |
553 | async->complete(efx, async->cookie, rc, outbuf, | |
554 | min(async->outlen, data_len)); | |
cade715f BH |
555 | kfree(async); |
556 | ||
557 | efx_mcdi_release(mcdi); | |
558 | ||
559 | return true; | |
560 | } | |
561 | ||
afd4aea0 | 562 | static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno, |
5bc283e5 | 563 | unsigned int datalen, unsigned int mcdi_err) |
afd4aea0 BH |
564 | { |
565 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
566 | bool wake = false; | |
567 | ||
568 | spin_lock(&mcdi->iface_lock); | |
569 | ||
570 | if ((seqno ^ mcdi->seqno) & SEQ_MASK) { | |
571 | if (mcdi->credits) | |
572 | /* The request has been cancelled */ | |
573 | --mcdi->credits; | |
574 | else | |
62776d03 BH |
575 | netif_err(efx, hw, efx->net_dev, |
576 | "MC response mismatch tx seq 0x%x rx " | |
577 | "seq 0x%x\n", seqno, mcdi->seqno); | |
afd4aea0 | 578 | } else { |
df2cd8af BH |
579 | if (efx->type->mcdi_max_ver >= 2) { |
580 | /* MCDI v2 responses don't fit in an event */ | |
581 | efx_mcdi_read_response_header(efx); | |
582 | } else { | |
583 | mcdi->resprc = efx_mcdi_errno(mcdi_err); | |
584 | mcdi->resp_hdr_len = 4; | |
585 | mcdi->resp_data_len = datalen; | |
586 | } | |
afd4aea0 BH |
587 | |
588 | wake = true; | |
589 | } | |
590 | ||
591 | spin_unlock(&mcdi->iface_lock); | |
592 | ||
cade715f BH |
593 | if (wake) { |
594 | if (!efx_mcdi_complete_async(mcdi, false)) | |
595 | (void) efx_mcdi_complete_sync(mcdi); | |
596 | ||
597 | /* If the interface isn't RUNNING_ASYNC or | |
598 | * RUNNING_SYNC then we've received a duplicate | |
599 | * completion after we've already transitioned back to | |
600 | * QUIESCENT. [A subsequent invocation would increment | |
601 | * seqno, so would have failed the seqno check]. | |
602 | */ | |
603 | } | |
604 | } | |
605 | ||
606 | static void efx_mcdi_timeout_async(unsigned long context) | |
607 | { | |
608 | struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context; | |
609 | ||
610 | efx_mcdi_complete_async(mcdi, true); | |
afd4aea0 BH |
611 | } |
612 | ||
2f4bcdcc BH |
613 | static int |
614 | efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen) | |
615 | { | |
616 | if (efx->type->mcdi_max_ver < 0 || | |
617 | (efx->type->mcdi_max_ver < 2 && | |
618 | cmd > MC_CMD_CMD_SPACE_ESCAPE_7)) | |
619 | return -EINVAL; | |
620 | ||
621 | if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 || | |
622 | (efx->type->mcdi_max_ver < 2 && | |
623 | inlen > MCDI_CTL_SDU_LEN_MAX_V1)) | |
624 | return -EMSGSIZE; | |
625 | ||
626 | return 0; | |
627 | } | |
628 | ||
acd43a90 BK |
629 | static bool efx_mcdi_get_proxy_handle(struct efx_nic *efx, |
630 | size_t hdr_len, size_t data_len, | |
631 | u32 *proxy_handle) | |
632 | { | |
633 | MCDI_DECLARE_BUF_ERR(testbuf); | |
634 | const size_t buflen = sizeof(testbuf); | |
635 | ||
636 | if (!proxy_handle || data_len < buflen) | |
637 | return false; | |
638 | ||
639 | efx->type->mcdi_read_response(efx, testbuf, hdr_len, buflen); | |
640 | if (MCDI_DWORD(testbuf, ERR_CODE) == MC_CMD_ERR_PROXY_PENDING) { | |
641 | *proxy_handle = MCDI_DWORD(testbuf, ERR_PROXY_PENDING_HANDLE); | |
642 | return true; | |
643 | } | |
644 | ||
645 | return false; | |
646 | } | |
647 | ||
648 | static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd, | |
649 | size_t inlen, | |
1e0b8120 | 650 | efx_dword_t *outbuf, size_t outlen, |
ac28d179 | 651 | size_t *outlen_actual, bool quiet, |
acd43a90 | 652 | u32 *proxy_handle, int *raw_rc) |
1e0b8120 EC |
653 | { |
654 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
aa09a3da | 655 | MCDI_DECLARE_BUF_ERR(errbuf); |
1e0b8120 EC |
656 | int rc; |
657 | ||
658 | if (mcdi->mode == MCDI_MODE_POLL) | |
659 | rc = efx_mcdi_poll(efx); | |
660 | else | |
661 | rc = efx_mcdi_await_completion(efx); | |
662 | ||
663 | if (rc != 0) { | |
664 | netif_err(efx, hw, efx->net_dev, | |
665 | "MC command 0x%x inlen %d mode %d timed out\n", | |
666 | cmd, (int)inlen, mcdi->mode); | |
667 | ||
668 | if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) { | |
669 | netif_err(efx, hw, efx->net_dev, | |
670 | "MCDI request was completed without an event\n"); | |
671 | rc = 0; | |
672 | } | |
673 | ||
e283546c EC |
674 | efx_mcdi_abandon(efx); |
675 | ||
1e0b8120 EC |
676 | /* Close the race with efx_mcdi_ev_cpl() executing just too late |
677 | * and completing a request we've just cancelled, by ensuring | |
678 | * that the seqno check therein fails. | |
679 | */ | |
680 | spin_lock_bh(&mcdi->iface_lock); | |
681 | ++mcdi->seqno; | |
682 | ++mcdi->credits; | |
683 | spin_unlock_bh(&mcdi->iface_lock); | |
684 | } | |
685 | ||
acd43a90 BK |
686 | if (proxy_handle) |
687 | *proxy_handle = 0; | |
688 | ||
1e0b8120 EC |
689 | if (rc != 0) { |
690 | if (outlen_actual) | |
691 | *outlen_actual = 0; | |
692 | } else { | |
693 | size_t hdr_len, data_len, err_len; | |
694 | ||
695 | /* At the very least we need a memory barrier here to ensure | |
696 | * we pick up changes from efx_mcdi_ev_cpl(). Protect against | |
697 | * a spurious efx_mcdi_ev_cpl() running concurrently by | |
698 | * acquiring the iface_lock. */ | |
699 | spin_lock_bh(&mcdi->iface_lock); | |
700 | rc = mcdi->resprc; | |
ac28d179 BK |
701 | if (raw_rc) |
702 | *raw_rc = mcdi->resprc_raw; | |
1e0b8120 EC |
703 | hdr_len = mcdi->resp_hdr_len; |
704 | data_len = mcdi->resp_data_len; | |
705 | err_len = min(sizeof(errbuf), data_len); | |
706 | spin_unlock_bh(&mcdi->iface_lock); | |
707 | ||
708 | BUG_ON(rc > 0); | |
709 | ||
710 | efx->type->mcdi_read_response(efx, outbuf, hdr_len, | |
711 | min(outlen, data_len)); | |
712 | if (outlen_actual) | |
713 | *outlen_actual = data_len; | |
714 | ||
715 | efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len); | |
716 | ||
717 | if (cmd == MC_CMD_REBOOT && rc == -EIO) { | |
718 | /* Don't reset if MC_CMD_REBOOT returns EIO */ | |
719 | } else if (rc == -EIO || rc == -EINTR) { | |
720 | netif_err(efx, hw, efx->net_dev, "MC fatal error %d\n", | |
721 | -rc); | |
722 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); | |
acd43a90 BK |
723 | } else if (proxy_handle && (rc == -EPROTO) && |
724 | efx_mcdi_get_proxy_handle(efx, hdr_len, data_len, | |
725 | proxy_handle)) { | |
726 | mcdi->proxy_rx_status = 0; | |
727 | mcdi->proxy_rx_handle = 0; | |
728 | mcdi->state = MCDI_STATE_PROXY_WAIT; | |
1e0b8120 EC |
729 | } else if (rc && !quiet) { |
730 | efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len, | |
731 | rc); | |
732 | } | |
733 | ||
734 | if (rc == -EIO || rc == -EINTR) { | |
735 | msleep(MCDI_STATUS_SLEEP_MS); | |
736 | efx_mcdi_poll_reboot(efx); | |
737 | mcdi->new_epoch = true; | |
738 | } | |
739 | } | |
740 | ||
acd43a90 BK |
741 | if (!proxy_handle || !*proxy_handle) |
742 | efx_mcdi_release(mcdi); | |
1e0b8120 EC |
743 | return rc; |
744 | } | |
745 | ||
acd43a90 BK |
746 | static void efx_mcdi_proxy_abort(struct efx_mcdi_iface *mcdi) |
747 | { | |
748 | if (mcdi->state == MCDI_STATE_PROXY_WAIT) { | |
749 | /* Interrupt the proxy wait. */ | |
750 | mcdi->proxy_rx_status = -EINTR; | |
751 | wake_up(&mcdi->proxy_rx_wq); | |
752 | } | |
753 | } | |
754 | ||
755 | static void efx_mcdi_ev_proxy_response(struct efx_nic *efx, | |
756 | u32 handle, int status) | |
757 | { | |
758 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
759 | ||
760 | WARN_ON(mcdi->state != MCDI_STATE_PROXY_WAIT); | |
761 | ||
762 | mcdi->proxy_rx_status = efx_mcdi_errno(status); | |
763 | /* Ensure the status is written before we update the handle, since the | |
764 | * latter is used to check if we've finished. | |
765 | */ | |
766 | wmb(); | |
767 | mcdi->proxy_rx_handle = handle; | |
768 | wake_up(&mcdi->proxy_rx_wq); | |
769 | } | |
770 | ||
771 | static int efx_mcdi_proxy_wait(struct efx_nic *efx, u32 handle, bool quiet) | |
772 | { | |
773 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
774 | int rc; | |
775 | ||
776 | /* Wait for a proxy event, or timeout. */ | |
777 | rc = wait_event_timeout(mcdi->proxy_rx_wq, | |
778 | mcdi->proxy_rx_handle != 0 || | |
779 | mcdi->proxy_rx_status == -EINTR, | |
780 | MCDI_RPC_TIMEOUT); | |
781 | ||
782 | if (rc <= 0) { | |
783 | netif_dbg(efx, hw, efx->net_dev, | |
784 | "MCDI proxy timeout %d\n", handle); | |
785 | return -ETIMEDOUT; | |
786 | } else if (mcdi->proxy_rx_handle != handle) { | |
787 | netif_warn(efx, hw, efx->net_dev, | |
788 | "MCDI proxy unexpected handle %d (expected %d)\n", | |
789 | mcdi->proxy_rx_handle, handle); | |
790 | return -EINVAL; | |
791 | } | |
792 | ||
793 | return mcdi->proxy_rx_status; | |
794 | } | |
795 | ||
796 | static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned int cmd, | |
1e0b8120 EC |
797 | const efx_dword_t *inbuf, size_t inlen, |
798 | efx_dword_t *outbuf, size_t outlen, | |
ac28d179 | 799 | size_t *outlen_actual, bool quiet, int *raw_rc) |
1e0b8120 | 800 | { |
acd43a90 | 801 | u32 proxy_handle = 0; /* Zero is an invalid proxy handle. */ |
1e0b8120 EC |
802 | int rc; |
803 | ||
acd43a90 BK |
804 | if (inbuf && inlen && (inbuf == outbuf)) { |
805 | /* The input buffer can't be aliased with the output. */ | |
806 | WARN_ON(1); | |
807 | return -EINVAL; | |
808 | } | |
809 | ||
1e0b8120 | 810 | rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen); |
ac28d179 | 811 | if (rc) |
1e0b8120 | 812 | return rc; |
ac28d179 | 813 | |
acd43a90 BK |
814 | rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, |
815 | outlen_actual, quiet, &proxy_handle, raw_rc); | |
816 | ||
817 | if (proxy_handle) { | |
818 | /* Handle proxy authorisation. This allows approval of MCDI | |
819 | * operations to be delegated to the admin function, allowing | |
820 | * fine control over (eg) multicast subscriptions. | |
821 | */ | |
822 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
823 | ||
824 | netif_dbg(efx, hw, efx->net_dev, | |
825 | "MCDI waiting for proxy auth %d\n", | |
826 | proxy_handle); | |
827 | rc = efx_mcdi_proxy_wait(efx, proxy_handle, quiet); | |
828 | ||
829 | if (rc == 0) { | |
830 | netif_dbg(efx, hw, efx->net_dev, | |
831 | "MCDI proxy retry %d\n", proxy_handle); | |
832 | ||
833 | /* We now retry the original request. */ | |
834 | mcdi->state = MCDI_STATE_RUNNING_SYNC; | |
835 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); | |
836 | ||
837 | rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, | |
838 | outbuf, outlen, outlen_actual, | |
839 | quiet, NULL, raw_rc); | |
840 | } else { | |
841 | netif_printk(efx, hw, | |
842 | rc == -EPERM ? KERN_DEBUG : KERN_ERR, | |
843 | efx->net_dev, | |
844 | "MC command 0x%x failed after proxy auth rc=%d\n", | |
845 | cmd, rc); | |
846 | ||
847 | if (rc == -EINTR || rc == -EIO) | |
848 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); | |
849 | efx_mcdi_release(mcdi); | |
850 | } | |
851 | } | |
852 | ||
853 | return rc; | |
ac28d179 BK |
854 | } |
855 | ||
856 | static int _efx_mcdi_rpc_evb_retry(struct efx_nic *efx, unsigned cmd, | |
857 | const efx_dword_t *inbuf, size_t inlen, | |
858 | efx_dword_t *outbuf, size_t outlen, | |
859 | size_t *outlen_actual, bool quiet) | |
860 | { | |
861 | int raw_rc = 0; | |
862 | int rc; | |
863 | ||
864 | rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen, | |
865 | outbuf, outlen, outlen_actual, true, &raw_rc); | |
866 | ||
867 | if ((rc == -EPROTO) && (raw_rc == MC_CMD_ERR_NO_EVB_PORT) && | |
868 | efx->type->is_vf) { | |
869 | /* If the EVB port isn't available within a VF this may | |
870 | * mean the PF is still bringing the switch up. We should | |
871 | * retry our request shortly. | |
872 | */ | |
873 | unsigned long abort_time = jiffies + MCDI_RPC_TIMEOUT; | |
874 | unsigned int delay_us = 10000; | |
875 | ||
876 | netif_dbg(efx, hw, efx->net_dev, | |
877 | "%s: NO_EVB_PORT; will retry request\n", | |
878 | __func__); | |
879 | ||
880 | do { | |
881 | usleep_range(delay_us, delay_us + 10000); | |
882 | rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen, | |
883 | outbuf, outlen, outlen_actual, | |
884 | true, &raw_rc); | |
885 | if (delay_us < 100000) | |
886 | delay_us <<= 1; | |
887 | } while ((rc == -EPROTO) && | |
888 | (raw_rc == MC_CMD_ERR_NO_EVB_PORT) && | |
889 | time_before(jiffies, abort_time)); | |
890 | } | |
891 | ||
892 | if (rc && !quiet && !(cmd == MC_CMD_REBOOT && rc == -EIO)) | |
893 | efx_mcdi_display_error(efx, cmd, inlen, | |
894 | outbuf, outlen, rc); | |
895 | ||
896 | return rc; | |
1e0b8120 EC |
897 | } |
898 | ||
ac28d179 BK |
899 | /** |
900 | * efx_mcdi_rpc - Issue an MCDI command and wait for completion | |
901 | * @efx: NIC through which to issue the command | |
902 | * @cmd: Command type number | |
903 | * @inbuf: Command parameters | |
904 | * @inlen: Length of command parameters, in bytes. Must be a multiple | |
905 | * of 4 and no greater than %MCDI_CTL_SDU_LEN_MAX_V1. | |
906 | * @outbuf: Response buffer. May be %NULL if @outlen is 0. | |
907 | * @outlen: Length of response buffer, in bytes. If the actual | |
908 | * response is longer than @outlen & ~3, it will be truncated | |
909 | * to that length. | |
910 | * @outlen_actual: Pointer through which to return the actual response | |
911 | * length. May be %NULL if this is not needed. | |
912 | * | |
913 | * This function may sleep and therefore must be called in an appropriate | |
914 | * context. | |
915 | * | |
916 | * Return: A negative error code, or zero if successful. The error | |
917 | * code may come from the MCDI response or may indicate a failure | |
918 | * to communicate with the MC. In the former case, the response | |
919 | * will still be copied to @outbuf and *@outlen_actual will be | |
920 | * set accordingly. In the latter case, *@outlen_actual will be | |
921 | * set to zero. | |
922 | */ | |
afd4aea0 | 923 | int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd, |
9528b921 BH |
924 | const efx_dword_t *inbuf, size_t inlen, |
925 | efx_dword_t *outbuf, size_t outlen, | |
afd4aea0 | 926 | size_t *outlen_actual) |
c3cba721 | 927 | { |
ac28d179 BK |
928 | return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen, |
929 | outlen_actual, false); | |
1e0b8120 | 930 | } |
df2cd8af | 931 | |
1e0b8120 EC |
932 | /* Normally, on receiving an error code in the MCDI response, |
933 | * efx_mcdi_rpc will log an error message containing (among other | |
934 | * things) the raw error code, by means of efx_mcdi_display_error. | |
935 | * This _quiet version suppresses that; if the caller wishes to log | |
936 | * the error conditionally on the return code, it should call this | |
937 | * function and is then responsible for calling efx_mcdi_display_error | |
938 | * as needed. | |
939 | */ | |
940 | int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd, | |
941 | const efx_dword_t *inbuf, size_t inlen, | |
942 | efx_dword_t *outbuf, size_t outlen, | |
943 | size_t *outlen_actual) | |
944 | { | |
ac28d179 BK |
945 | return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen, |
946 | outlen_actual, true); | |
c3cba721 SH |
947 | } |
948 | ||
df2cd8af BH |
949 | int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd, |
950 | const efx_dword_t *inbuf, size_t inlen) | |
afd4aea0 BH |
951 | { |
952 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
2f4bcdcc | 953 | int rc; |
c3cba721 | 954 | |
2f4bcdcc BH |
955 | rc = efx_mcdi_check_supported(efx, cmd, inlen); |
956 | if (rc) | |
957 | return rc; | |
df2cd8af | 958 | |
74cd60a4 JC |
959 | if (efx->mc_bist_for_other_fn) |
960 | return -ENETDOWN; | |
961 | ||
e283546c EC |
962 | if (mcdi->mode == MCDI_MODE_FAIL) |
963 | return -ENETDOWN; | |
964 | ||
cade715f | 965 | efx_mcdi_acquire_sync(mcdi); |
2f4bcdcc | 966 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); |
df2cd8af | 967 | return 0; |
c3cba721 SH |
968 | } |
969 | ||
1e0b8120 EC |
970 | static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, |
971 | const efx_dword_t *inbuf, size_t inlen, | |
972 | size_t outlen, | |
973 | efx_mcdi_async_completer *complete, | |
974 | unsigned long cookie, bool quiet) | |
cade715f BH |
975 | { |
976 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
977 | struct efx_mcdi_async_param *async; | |
978 | int rc; | |
979 | ||
980 | rc = efx_mcdi_check_supported(efx, cmd, inlen); | |
981 | if (rc) | |
982 | return rc; | |
983 | ||
74cd60a4 JC |
984 | if (efx->mc_bist_for_other_fn) |
985 | return -ENETDOWN; | |
986 | ||
cade715f BH |
987 | async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4), |
988 | GFP_ATOMIC); | |
989 | if (!async) | |
990 | return -ENOMEM; | |
991 | ||
992 | async->cmd = cmd; | |
993 | async->inlen = inlen; | |
994 | async->outlen = outlen; | |
1e0b8120 | 995 | async->quiet = quiet; |
cade715f BH |
996 | async->complete = complete; |
997 | async->cookie = cookie; | |
998 | memcpy(async + 1, inbuf, inlen); | |
999 | ||
1000 | spin_lock_bh(&mcdi->async_lock); | |
1001 | ||
1002 | if (mcdi->mode == MCDI_MODE_EVENTS) { | |
1003 | list_add_tail(&async->list, &mcdi->async_list); | |
1004 | ||
1005 | /* If this is at the front of the queue, try to start it | |
1006 | * immediately | |
1007 | */ | |
1008 | if (mcdi->async_list.next == &async->list && | |
1009 | efx_mcdi_acquire_async(mcdi)) { | |
1010 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); | |
1011 | mod_timer(&mcdi->async_timer, | |
1012 | jiffies + MCDI_RPC_TIMEOUT); | |
1013 | } | |
1014 | } else { | |
1015 | kfree(async); | |
1016 | rc = -ENETDOWN; | |
1017 | } | |
1018 | ||
1019 | spin_unlock_bh(&mcdi->async_lock); | |
1020 | ||
1021 | return rc; | |
1022 | } | |
1023 | ||
1e0b8120 EC |
1024 | /** |
1025 | * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously | |
1026 | * @efx: NIC through which to issue the command | |
1027 | * @cmd: Command type number | |
1028 | * @inbuf: Command parameters | |
1029 | * @inlen: Length of command parameters, in bytes | |
1030 | * @outlen: Length to allocate for response buffer, in bytes | |
1031 | * @complete: Function to be called on completion or cancellation. | |
1032 | * @cookie: Arbitrary value to be passed to @complete. | |
1033 | * | |
1034 | * This function does not sleep and therefore may be called in atomic | |
1035 | * context. It will fail if event queues are disabled or if MCDI | |
1036 | * event completions have been disabled due to an error. | |
1037 | * | |
1038 | * If it succeeds, the @complete function will be called exactly once | |
1039 | * in atomic context, when one of the following occurs: | |
1040 | * (a) the completion event is received (in NAPI context) | |
1041 | * (b) event queues are disabled (in the process that disables them) | |
1042 | * (c) the request times-out (in timer context) | |
1043 | */ | |
1044 | int | |
1045 | efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, | |
1046 | const efx_dword_t *inbuf, size_t inlen, size_t outlen, | |
1047 | efx_mcdi_async_completer *complete, unsigned long cookie) | |
1048 | { | |
1049 | return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete, | |
1050 | cookie, false); | |
1051 | } | |
1052 | ||
1053 | int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd, | |
1054 | const efx_dword_t *inbuf, size_t inlen, | |
1055 | size_t outlen, efx_mcdi_async_completer *complete, | |
1056 | unsigned long cookie) | |
1057 | { | |
1058 | return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete, | |
1059 | cookie, true); | |
1060 | } | |
1061 | ||
c3cba721 | 1062 | int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen, |
9528b921 BH |
1063 | efx_dword_t *outbuf, size_t outlen, |
1064 | size_t *outlen_actual) | |
c3cba721 | 1065 | { |
1e0b8120 | 1066 | return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, |
acd43a90 | 1067 | outlen_actual, false, NULL, NULL); |
1e0b8120 | 1068 | } |
5bc283e5 | 1069 | |
1e0b8120 EC |
1070 | int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen, |
1071 | efx_dword_t *outbuf, size_t outlen, | |
1072 | size_t *outlen_actual) | |
1073 | { | |
1074 | return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, | |
acd43a90 | 1075 | outlen_actual, true, NULL, NULL); |
1e0b8120 | 1076 | } |
3f713bf4 | 1077 | |
1e0b8120 EC |
1078 | void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd, |
1079 | size_t inlen, efx_dword_t *outbuf, | |
1080 | size_t outlen, int rc) | |
1081 | { | |
1082 | int code = 0, err_arg = 0; | |
afd4aea0 | 1083 | |
1e0b8120 EC |
1084 | if (outlen >= MC_CMD_ERR_CODE_OFST + 4) |
1085 | code = MCDI_DWORD(outbuf, ERR_CODE); | |
1086 | if (outlen >= MC_CMD_ERR_ARG_OFST + 4) | |
1087 | err_arg = MCDI_DWORD(outbuf, ERR_ARG); | |
8c578368 TP |
1088 | netif_printk(efx, hw, rc == -EPERM ? KERN_DEBUG : KERN_ERR, |
1089 | efx->net_dev, | |
1090 | "MC command 0x%x inlen %zu failed rc=%d (raw=%d) arg=%d\n", | |
1091 | cmd, inlen, rc, code, err_arg); | |
afd4aea0 BH |
1092 | } |
1093 | ||
cade715f BH |
1094 | /* Switch to polled MCDI completions. This can be called in various |
1095 | * error conditions with various locks held, so it must be lockless. | |
1096 | * Caller is responsible for flushing asynchronous requests later. | |
1097 | */ | |
afd4aea0 BH |
1098 | void efx_mcdi_mode_poll(struct efx_nic *efx) |
1099 | { | |
1100 | struct efx_mcdi_iface *mcdi; | |
1101 | ||
f3ad5003 | 1102 | if (!efx->mcdi) |
afd4aea0 BH |
1103 | return; |
1104 | ||
1105 | mcdi = efx_mcdi(efx); | |
e283546c EC |
1106 | /* If already in polling mode, nothing to do. |
1107 | * If in fail-fast state, don't switch to polled completion. | |
1108 | * FLR recovery will do that later. | |
1109 | */ | |
1110 | if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL) | |
afd4aea0 BH |
1111 | return; |
1112 | ||
1113 | /* We can switch from event completion to polled completion, because | |
1114 | * mcdi requests are always completed in shared memory. We do this by | |
1115 | * switching the mode to POLL'd then completing the request. | |
1116 | * efx_mcdi_await_completion() will then call efx_mcdi_poll(). | |
1117 | * | |
1118 | * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(), | |
cade715f | 1119 | * which efx_mcdi_complete_sync() provides for us. |
afd4aea0 BH |
1120 | */ |
1121 | mcdi->mode = MCDI_MODE_POLL; | |
1122 | ||
cade715f BH |
1123 | efx_mcdi_complete_sync(mcdi); |
1124 | } | |
1125 | ||
1126 | /* Flush any running or queued asynchronous requests, after event processing | |
1127 | * is stopped | |
1128 | */ | |
1129 | void efx_mcdi_flush_async(struct efx_nic *efx) | |
1130 | { | |
1131 | struct efx_mcdi_async_param *async, *next; | |
1132 | struct efx_mcdi_iface *mcdi; | |
1133 | ||
1134 | if (!efx->mcdi) | |
1135 | return; | |
1136 | ||
1137 | mcdi = efx_mcdi(efx); | |
1138 | ||
e283546c EC |
1139 | /* We must be in poll or fail mode so no more requests can be queued */ |
1140 | BUG_ON(mcdi->mode == MCDI_MODE_EVENTS); | |
cade715f BH |
1141 | |
1142 | del_timer_sync(&mcdi->async_timer); | |
1143 | ||
1144 | /* If a request is still running, make sure we give the MC | |
1145 | * time to complete it so that the response won't overwrite our | |
1146 | * next request. | |
1147 | */ | |
1148 | if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) { | |
1149 | efx_mcdi_poll(efx); | |
1150 | mcdi->state = MCDI_STATE_QUIESCENT; | |
1151 | } | |
1152 | ||
1153 | /* Nothing else will access the async list now, so it is safe | |
1154 | * to walk it without holding async_lock. If we hold it while | |
1155 | * calling a completer then lockdep may warn that we have | |
1156 | * acquired locks in the wrong order. | |
1157 | */ | |
1158 | list_for_each_entry_safe(async, next, &mcdi->async_list, list) { | |
1159 | async->complete(efx, async->cookie, -ENETDOWN, NULL, 0); | |
1160 | list_del(&async->list); | |
1161 | kfree(async); | |
1162 | } | |
afd4aea0 BH |
1163 | } |
1164 | ||
1165 | void efx_mcdi_mode_event(struct efx_nic *efx) | |
1166 | { | |
1167 | struct efx_mcdi_iface *mcdi; | |
1168 | ||
f3ad5003 | 1169 | if (!efx->mcdi) |
afd4aea0 BH |
1170 | return; |
1171 | ||
1172 | mcdi = efx_mcdi(efx); | |
e283546c EC |
1173 | /* If already in event completion mode, nothing to do. |
1174 | * If in fail-fast state, don't switch to event completion. FLR | |
1175 | * recovery will do that later. | |
1176 | */ | |
1177 | if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL) | |
afd4aea0 BH |
1178 | return; |
1179 | ||
1180 | /* We can't switch from polled to event completion in the middle of a | |
1181 | * request, because the completion method is specified in the request. | |
1182 | * So acquire the interface to serialise the requestors. We don't need | |
1183 | * to acquire the iface_lock to change the mode here, but we do need a | |
1184 | * write memory barrier ensure that efx_mcdi_rpc() sees it, which | |
1185 | * efx_mcdi_acquire() provides. | |
1186 | */ | |
cade715f | 1187 | efx_mcdi_acquire_sync(mcdi); |
afd4aea0 BH |
1188 | mcdi->mode = MCDI_MODE_EVENTS; |
1189 | efx_mcdi_release(mcdi); | |
1190 | } | |
1191 | ||
1192 | static void efx_mcdi_ev_death(struct efx_nic *efx, int rc) | |
1193 | { | |
1194 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
1195 | ||
1196 | /* If there is an outstanding MCDI request, it has been terminated | |
1197 | * either by a BADASSERT or REBOOT event. If the mcdi interface is | |
1198 | * in polled mode, then do nothing because the MC reboot handler will | |
1199 | * set the header correctly. However, if the mcdi interface is waiting | |
1200 | * for a CMDDONE event it won't receive it [and since all MCDI events | |
1201 | * are sent to the same queue, we can't be racing with | |
1202 | * efx_mcdi_ev_cpl()] | |
1203 | * | |
cade715f BH |
1204 | * If there is an outstanding asynchronous request, we can't |
1205 | * complete it now (efx_mcdi_complete() would deadlock). The | |
1206 | * reset process will take care of this. | |
1207 | * | |
1208 | * There's a race here with efx_mcdi_send_request(), because | |
1209 | * we might receive a REBOOT event *before* the request has | |
1210 | * been copied out. In polled mode (during startup) this is | |
1211 | * irrelevant, because efx_mcdi_complete_sync() is ignored. In | |
1212 | * event mode, this condition is just an edge-case of | |
1213 | * receiving a REBOOT event after posting the MCDI | |
1214 | * request. Did the mc reboot before or after the copyout? The | |
1215 | * best we can do always is just return failure. | |
acd43a90 BK |
1216 | * |
1217 | * If there is an outstanding proxy response expected it is not going | |
1218 | * to arrive. We should thus abort it. | |
afd4aea0 BH |
1219 | */ |
1220 | spin_lock(&mcdi->iface_lock); | |
acd43a90 BK |
1221 | efx_mcdi_proxy_abort(mcdi); |
1222 | ||
cade715f | 1223 | if (efx_mcdi_complete_sync(mcdi)) { |
afd4aea0 BH |
1224 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
1225 | mcdi->resprc = rc; | |
df2cd8af BH |
1226 | mcdi->resp_hdr_len = 0; |
1227 | mcdi->resp_data_len = 0; | |
18e3ee2c | 1228 | ++mcdi->credits; |
afd4aea0 | 1229 | } |
3f713bf4 BH |
1230 | } else { |
1231 | int count; | |
1232 | ||
3f713bf4 BH |
1233 | /* Consume the status word since efx_mcdi_rpc_finish() won't */ |
1234 | for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) { | |
c577e59e DP |
1235 | rc = efx_mcdi_poll_reboot(efx); |
1236 | if (rc) | |
3f713bf4 BH |
1237 | break; |
1238 | udelay(MCDI_STATUS_DELAY_US); | |
1239 | } | |
c577e59e DP |
1240 | |
1241 | /* On EF10, a CODE_MC_REBOOT event can be received without the | |
1242 | * reboot detection in efx_mcdi_poll_reboot() being triggered. | |
1243 | * If zero was returned from the final call to | |
1244 | * efx_mcdi_poll_reboot(), the MC reboot wasn't noticed but the | |
1245 | * MC has definitely rebooted so prepare for the reset. | |
1246 | */ | |
1247 | if (!rc && efx->type->mcdi_reboot_detected) | |
1248 | efx->type->mcdi_reboot_detected(efx); | |
1249 | ||
d36a08b4 | 1250 | mcdi->new_epoch = true; |
dfdaa95c DP |
1251 | |
1252 | /* Nobody was waiting for an MCDI request, so trigger a reset */ | |
1253 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); | |
3f713bf4 BH |
1254 | } |
1255 | ||
afd4aea0 BH |
1256 | spin_unlock(&mcdi->iface_lock); |
1257 | } | |
1258 | ||
74cd60a4 JC |
1259 | /* The MC is going down in to BIST mode. set the BIST flag to block |
1260 | * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset | |
1261 | * (which doesn't actually execute a reset, it waits for the controlling | |
1262 | * function to reset it). | |
1263 | */ | |
1264 | static void efx_mcdi_ev_bist(struct efx_nic *efx) | |
1265 | { | |
1266 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
1267 | ||
1268 | spin_lock(&mcdi->iface_lock); | |
1269 | efx->mc_bist_for_other_fn = true; | |
acd43a90 BK |
1270 | efx_mcdi_proxy_abort(mcdi); |
1271 | ||
74cd60a4 JC |
1272 | if (efx_mcdi_complete_sync(mcdi)) { |
1273 | if (mcdi->mode == MCDI_MODE_EVENTS) { | |
1274 | mcdi->resprc = -EIO; | |
1275 | mcdi->resp_hdr_len = 0; | |
1276 | mcdi->resp_data_len = 0; | |
1277 | ++mcdi->credits; | |
1278 | } | |
1279 | } | |
1280 | mcdi->new_epoch = true; | |
1281 | efx_schedule_reset(efx, RESET_TYPE_MC_BIST); | |
1282 | spin_unlock(&mcdi->iface_lock); | |
1283 | } | |
1284 | ||
e283546c EC |
1285 | /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try |
1286 | * to recover. | |
1287 | */ | |
1288 | static void efx_mcdi_abandon(struct efx_nic *efx) | |
1289 | { | |
1290 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
1291 | ||
1292 | if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL) | |
1293 | return; /* it had already been done */ | |
1294 | netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n"); | |
1295 | efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT); | |
1296 | } | |
1297 | ||
afd4aea0 BH |
1298 | /* Called from falcon_process_eventq for MCDI events */ |
1299 | void efx_mcdi_process_event(struct efx_channel *channel, | |
1300 | efx_qword_t *event) | |
1301 | { | |
1302 | struct efx_nic *efx = channel->efx; | |
1303 | int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE); | |
1304 | u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA); | |
1305 | ||
1306 | switch (code) { | |
1307 | case MCDI_EVENT_CODE_BADSSERT: | |
62776d03 BH |
1308 | netif_err(efx, hw, efx->net_dev, |
1309 | "MC watchdog or assertion failure at 0x%x\n", data); | |
5bc283e5 | 1310 | efx_mcdi_ev_death(efx, -EINTR); |
afd4aea0 BH |
1311 | break; |
1312 | ||
1313 | case MCDI_EVENT_CODE_PMNOTICE: | |
62776d03 | 1314 | netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n"); |
afd4aea0 BH |
1315 | break; |
1316 | ||
1317 | case MCDI_EVENT_CODE_CMDDONE: | |
1318 | efx_mcdi_ev_cpl(efx, | |
1319 | MCDI_EVENT_FIELD(*event, CMDDONE_SEQ), | |
1320 | MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN), | |
1321 | MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO)); | |
1322 | break; | |
1323 | ||
1324 | case MCDI_EVENT_CODE_LINKCHANGE: | |
1325 | efx_mcdi_process_link_change(efx, event); | |
1326 | break; | |
1327 | case MCDI_EVENT_CODE_SENSOREVT: | |
1328 | efx_mcdi_sensor_event(efx, event); | |
1329 | break; | |
1330 | case MCDI_EVENT_CODE_SCHEDERR: | |
2d9955be RS |
1331 | netif_dbg(efx, hw, efx->net_dev, |
1332 | "MC Scheduler alert (0x%x)\n", data); | |
afd4aea0 BH |
1333 | break; |
1334 | case MCDI_EVENT_CODE_REBOOT: | |
8127d661 | 1335 | case MCDI_EVENT_CODE_MC_REBOOT: |
62776d03 | 1336 | netif_info(efx, hw, efx->net_dev, "MC Reboot\n"); |
5bc283e5 | 1337 | efx_mcdi_ev_death(efx, -EIO); |
afd4aea0 | 1338 | break; |
74cd60a4 JC |
1339 | case MCDI_EVENT_CODE_MC_BIST: |
1340 | netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n"); | |
1341 | efx_mcdi_ev_bist(efx); | |
1342 | break; | |
afd4aea0 BH |
1343 | case MCDI_EVENT_CODE_MAC_STATS_DMA: |
1344 | /* MAC stats are gather lazily. We can ignore this. */ | |
1345 | break; | |
cd2d5b52 | 1346 | case MCDI_EVENT_CODE_FLR: |
7fa8d547 SS |
1347 | if (efx->type->sriov_flr) |
1348 | efx->type->sriov_flr(efx, | |
1349 | MCDI_EVENT_FIELD(*event, FLR_VF)); | |
cd2d5b52 | 1350 | break; |
7c236c43 SH |
1351 | case MCDI_EVENT_CODE_PTP_RX: |
1352 | case MCDI_EVENT_CODE_PTP_FAULT: | |
1353 | case MCDI_EVENT_CODE_PTP_PPS: | |
1354 | efx_ptp_event(efx, event); | |
1355 | break; | |
bd9a265d JC |
1356 | case MCDI_EVENT_CODE_PTP_TIME: |
1357 | efx_time_sync_event(channel, event); | |
1358 | break; | |
8127d661 BH |
1359 | case MCDI_EVENT_CODE_TX_FLUSH: |
1360 | case MCDI_EVENT_CODE_RX_FLUSH: | |
1361 | /* Two flush events will be sent: one to the same event | |
1362 | * queue as completions, and one to event queue 0. | |
1363 | * In the latter case the {RX,TX}_FLUSH_TO_DRIVER | |
1364 | * flag will be set, and we should ignore the event | |
1365 | * because we want to wait for all completions. | |
1366 | */ | |
1367 | BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN != | |
1368 | MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN); | |
1369 | if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER)) | |
1370 | efx_ef10_handle_drain_event(efx); | |
1371 | break; | |
3de82b91 AR |
1372 | case MCDI_EVENT_CODE_TX_ERR: |
1373 | case MCDI_EVENT_CODE_RX_ERR: | |
1374 | netif_err(efx, hw, efx->net_dev, | |
1375 | "%s DMA error (event: "EFX_QWORD_FMT")\n", | |
1376 | code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX", | |
1377 | EFX_QWORD_VAL(*event)); | |
1378 | efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR); | |
1379 | break; | |
acd43a90 BK |
1380 | case MCDI_EVENT_CODE_PROXY_RESPONSE: |
1381 | efx_mcdi_ev_proxy_response(efx, | |
1382 | MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_HANDLE), | |
1383 | MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_RC)); | |
1384 | break; | |
afd4aea0 | 1385 | default: |
62776d03 BH |
1386 | netif_err(efx, hw, efx->net_dev, "Unknown MCDI event 0x%x\n", |
1387 | code); | |
afd4aea0 BH |
1388 | } |
1389 | } | |
1390 | ||
1391 | /************************************************************************** | |
1392 | * | |
1393 | * Specific request functions | |
1394 | * | |
1395 | ************************************************************************** | |
1396 | */ | |
1397 | ||
e5f0fd27 | 1398 | void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len) |
afd4aea0 | 1399 | { |
8d9f9dd4 | 1400 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN); |
afd4aea0 BH |
1401 | size_t outlength; |
1402 | const __le16 *ver_words; | |
8127d661 | 1403 | size_t offset; |
afd4aea0 BH |
1404 | int rc; |
1405 | ||
1406 | BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0); | |
afd4aea0 BH |
1407 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0, |
1408 | outbuf, sizeof(outbuf), &outlength); | |
1409 | if (rc) | |
1410 | goto fail; | |
05a9320f | 1411 | if (outlength < MC_CMD_GET_VERSION_OUT_LEN) { |
00bbb4a5 | 1412 | rc = -EIO; |
afd4aea0 BH |
1413 | goto fail; |
1414 | } | |
1415 | ||
1416 | ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION); | |
8127d661 BH |
1417 | offset = snprintf(buf, len, "%u.%u.%u.%u", |
1418 | le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]), | |
1419 | le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3])); | |
1420 | ||
1421 | /* EF10 may have multiple datapath firmware variants within a | |
1422 | * single version. Report which variants are running. | |
1423 | */ | |
1424 | if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) { | |
8d9f9dd4 DP |
1425 | struct efx_ef10_nic_data *nic_data = efx->nic_data; |
1426 | ||
1427 | offset += snprintf(buf + offset, len - offset, " rx%x tx%x", | |
1428 | nic_data->rx_dpcpu_fw_id, | |
1429 | nic_data->tx_dpcpu_fw_id); | |
8127d661 BH |
1430 | |
1431 | /* It's theoretically possible for the string to exceed 31 | |
1432 | * characters, though in practice the first three version | |
1433 | * components are short enough that this doesn't happen. | |
1434 | */ | |
1435 | if (WARN_ON(offset >= len)) | |
1436 | buf[0] = 0; | |
1437 | } | |
1438 | ||
e5f0fd27 | 1439 | return; |
afd4aea0 BH |
1440 | |
1441 | fail: | |
62776d03 | 1442 | netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
e5f0fd27 | 1443 | buf[0] = 0; |
afd4aea0 BH |
1444 | } |
1445 | ||
4c75b43a BH |
1446 | static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, |
1447 | bool *was_attached) | |
afd4aea0 | 1448 | { |
59cfc479 | 1449 | MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN); |
ecb1c9cc | 1450 | MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN); |
afd4aea0 BH |
1451 | size_t outlen; |
1452 | int rc; | |
1453 | ||
1454 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE, | |
1455 | driver_operating ? 1 : 0); | |
1456 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1); | |
f2b0befd | 1457 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY); |
afd4aea0 | 1458 | |
267d9d73 EC |
1459 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf), |
1460 | outbuf, sizeof(outbuf), &outlen); | |
1461 | /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID | |
1462 | * specified will fail with EPERM, and we have to tell the MC we don't | |
1463 | * care what firmware we get. | |
1464 | */ | |
1465 | if (rc == -EPERM) { | |
1466 | netif_dbg(efx, probe, efx->net_dev, | |
1467 | "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n"); | |
1468 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, | |
1469 | MC_CMD_FW_DONT_CARE); | |
1470 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, | |
1471 | sizeof(inbuf), outbuf, sizeof(outbuf), | |
1472 | &outlen); | |
1473 | } | |
1474 | if (rc) { | |
1475 | efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf), | |
1476 | outbuf, outlen, rc); | |
afd4aea0 | 1477 | goto fail; |
267d9d73 | 1478 | } |
00bbb4a5 BH |
1479 | if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) { |
1480 | rc = -EIO; | |
afd4aea0 | 1481 | goto fail; |
00bbb4a5 | 1482 | } |
afd4aea0 | 1483 | |
8349f7f6 BH |
1484 | if (driver_operating) { |
1485 | if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) { | |
1486 | efx->mcdi->fn_flags = | |
1487 | MCDI_DWORD(outbuf, | |
1488 | DRV_ATTACH_EXT_OUT_FUNC_FLAGS); | |
1489 | } else { | |
1490 | /* Synthesise flags for Siena */ | |
1491 | efx->mcdi->fn_flags = | |
1492 | 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL | | |
1493 | 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED | | |
1494 | (efx_port_num(efx) == 0) << | |
1495 | MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY; | |
1496 | } | |
1497 | } | |
1498 | ||
ecb1c9cc BH |
1499 | /* We currently assume we have control of the external link |
1500 | * and are completely trusted by firmware. Abort probing | |
1501 | * if that's not true for this function. | |
1502 | */ | |
ecb1c9cc | 1503 | |
afd4aea0 BH |
1504 | if (was_attached != NULL) |
1505 | *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE); | |
1506 | return 0; | |
1507 | ||
1508 | fail: | |
62776d03 | 1509 | netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1510 | return rc; |
1511 | } | |
1512 | ||
1513 | int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address, | |
6aa9c7f6 | 1514 | u16 *fw_subtype_list, u32 *capabilities) |
afd4aea0 | 1515 | { |
59cfc479 | 1516 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX); |
c5bb0e98 | 1517 | size_t outlen, i; |
afd4aea0 | 1518 | int port_num = efx_port_num(efx); |
afd4aea0 BH |
1519 | int rc; |
1520 | ||
1521 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0); | |
cd84ff4d EC |
1522 | /* we need __aligned(2) for ether_addr_copy */ |
1523 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1); | |
1524 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1); | |
afd4aea0 BH |
1525 | |
1526 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0, | |
1527 | outbuf, sizeof(outbuf), &outlen); | |
1528 | if (rc) | |
1529 | goto fail; | |
1530 | ||
05a9320f | 1531 | if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { |
00bbb4a5 | 1532 | rc = -EIO; |
afd4aea0 BH |
1533 | goto fail; |
1534 | } | |
1535 | ||
afd4aea0 | 1536 | if (mac_address) |
cd84ff4d EC |
1537 | ether_addr_copy(mac_address, |
1538 | port_num ? | |
1539 | MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) : | |
1540 | MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0)); | |
bfeed902 | 1541 | if (fw_subtype_list) { |
bfeed902 | 1542 | for (i = 0; |
c5bb0e98 BH |
1543 | i < MCDI_VAR_ARRAY_LEN(outlen, |
1544 | GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST); | |
1545 | i++) | |
1546 | fw_subtype_list[i] = MCDI_ARRAY_WORD( | |
1547 | outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i); | |
1548 | for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++) | |
1549 | fw_subtype_list[i] = 0; | |
bfeed902 | 1550 | } |
6aa9c7f6 MS |
1551 | if (capabilities) { |
1552 | if (port_num) | |
1553 | *capabilities = MCDI_DWORD(outbuf, | |
1554 | GET_BOARD_CFG_OUT_CAPABILITIES_PORT1); | |
1555 | else | |
1556 | *capabilities = MCDI_DWORD(outbuf, | |
1557 | GET_BOARD_CFG_OUT_CAPABILITIES_PORT0); | |
1558 | } | |
afd4aea0 BH |
1559 | |
1560 | return 0; | |
1561 | ||
1562 | fail: | |
62776d03 BH |
1563 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n", |
1564 | __func__, rc, (int)outlen); | |
afd4aea0 BH |
1565 | |
1566 | return rc; | |
1567 | } | |
1568 | ||
1569 | int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq) | |
1570 | { | |
59cfc479 | 1571 | MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN); |
afd4aea0 BH |
1572 | u32 dest = 0; |
1573 | int rc; | |
1574 | ||
1575 | if (uart) | |
1576 | dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART; | |
1577 | if (evq) | |
1578 | dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ; | |
1579 | ||
1580 | MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest); | |
1581 | MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq); | |
1582 | ||
1583 | BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0); | |
1584 | ||
1585 | rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf), | |
1586 | NULL, 0, NULL); | |
afd4aea0 BH |
1587 | return rc; |
1588 | } | |
1589 | ||
1590 | int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out) | |
1591 | { | |
59cfc479 | 1592 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN); |
afd4aea0 BH |
1593 | size_t outlen; |
1594 | int rc; | |
1595 | ||
1596 | BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0); | |
1597 | ||
1598 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0, | |
1599 | outbuf, sizeof(outbuf), &outlen); | |
1600 | if (rc) | |
1601 | goto fail; | |
00bbb4a5 BH |
1602 | if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) { |
1603 | rc = -EIO; | |
afd4aea0 | 1604 | goto fail; |
00bbb4a5 | 1605 | } |
afd4aea0 BH |
1606 | |
1607 | *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES); | |
1608 | return 0; | |
1609 | ||
1610 | fail: | |
62776d03 BH |
1611 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", |
1612 | __func__, rc); | |
afd4aea0 BH |
1613 | return rc; |
1614 | } | |
1615 | ||
1616 | int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type, | |
1617 | size_t *size_out, size_t *erase_size_out, | |
1618 | bool *protected_out) | |
1619 | { | |
59cfc479 BH |
1620 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN); |
1621 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN); | |
afd4aea0 BH |
1622 | size_t outlen; |
1623 | int rc; | |
1624 | ||
1625 | MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type); | |
1626 | ||
1627 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf), | |
1628 | outbuf, sizeof(outbuf), &outlen); | |
1629 | if (rc) | |
1630 | goto fail; | |
00bbb4a5 BH |
1631 | if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) { |
1632 | rc = -EIO; | |
afd4aea0 | 1633 | goto fail; |
00bbb4a5 | 1634 | } |
afd4aea0 BH |
1635 | |
1636 | *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE); | |
1637 | *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE); | |
1638 | *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) & | |
05a9320f | 1639 | (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN)); |
afd4aea0 BH |
1640 | return 0; |
1641 | ||
1642 | fail: | |
62776d03 | 1643 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1644 | return rc; |
1645 | } | |
1646 | ||
2e803407 BH |
1647 | static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type) |
1648 | { | |
59cfc479 BH |
1649 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN); |
1650 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN); | |
2e803407 BH |
1651 | int rc; |
1652 | ||
1653 | MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type); | |
1654 | ||
1655 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf), | |
1656 | outbuf, sizeof(outbuf), NULL); | |
1657 | if (rc) | |
1658 | return rc; | |
1659 | ||
1660 | switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) { | |
1661 | case MC_CMD_NVRAM_TEST_PASS: | |
1662 | case MC_CMD_NVRAM_TEST_NOTSUPP: | |
1663 | return 0; | |
1664 | default: | |
1665 | return -EIO; | |
1666 | } | |
1667 | } | |
1668 | ||
1669 | int efx_mcdi_nvram_test_all(struct efx_nic *efx) | |
1670 | { | |
1671 | u32 nvram_types; | |
1672 | unsigned int type; | |
1673 | int rc; | |
1674 | ||
1675 | rc = efx_mcdi_nvram_types(efx, &nvram_types); | |
1676 | if (rc) | |
b548a988 | 1677 | goto fail1; |
2e803407 BH |
1678 | |
1679 | type = 0; | |
1680 | while (nvram_types != 0) { | |
1681 | if (nvram_types & 1) { | |
1682 | rc = efx_mcdi_nvram_test(efx, type); | |
1683 | if (rc) | |
b548a988 | 1684 | goto fail2; |
2e803407 BH |
1685 | } |
1686 | type++; | |
1687 | nvram_types >>= 1; | |
1688 | } | |
1689 | ||
1690 | return 0; | |
b548a988 BH |
1691 | |
1692 | fail2: | |
62776d03 BH |
1693 | netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n", |
1694 | __func__, type); | |
b548a988 | 1695 | fail1: |
62776d03 | 1696 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
b548a988 | 1697 | return rc; |
2e803407 BH |
1698 | } |
1699 | ||
267d9d73 EC |
1700 | /* Returns 1 if an assertion was read, 0 if no assertion had fired, |
1701 | * negative on error. | |
1702 | */ | |
8b2103ad | 1703 | static int efx_mcdi_read_assertion(struct efx_nic *efx) |
afd4aea0 | 1704 | { |
59cfc479 | 1705 | MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN); |
aa09a3da | 1706 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN); |
c5bb0e98 | 1707 | unsigned int flags, index; |
afd4aea0 BH |
1708 | const char *reason; |
1709 | size_t outlen; | |
1710 | int retry; | |
1711 | int rc; | |
1712 | ||
8b2103ad SH |
1713 | /* Attempt to read any stored assertion state before we reboot |
1714 | * the mcfw out of the assertion handler. Retry twice, once | |
afd4aea0 BH |
1715 | * because a boot-time assertion might cause this command to fail |
1716 | * with EINTR. And once again because GET_ASSERTS can race with | |
1717 | * MC_CMD_REBOOT running on the other port. */ | |
1718 | retry = 2; | |
1719 | do { | |
8b2103ad | 1720 | MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1); |
1e0b8120 EC |
1721 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS, |
1722 | inbuf, MC_CMD_GET_ASSERTS_IN_LEN, | |
1723 | outbuf, sizeof(outbuf), &outlen); | |
267d9d73 EC |
1724 | if (rc == -EPERM) |
1725 | return 0; | |
afd4aea0 BH |
1726 | } while ((rc == -EINTR || rc == -EIO) && retry-- > 0); |
1727 | ||
1e0b8120 EC |
1728 | if (rc) { |
1729 | efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS, | |
1730 | MC_CMD_GET_ASSERTS_IN_LEN, outbuf, | |
1731 | outlen, rc); | |
afd4aea0 | 1732 | return rc; |
1e0b8120 | 1733 | } |
afd4aea0 | 1734 | if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN) |
00bbb4a5 | 1735 | return -EIO; |
afd4aea0 | 1736 | |
8b2103ad SH |
1737 | /* Print out any recorded assertion state */ |
1738 | flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS); | |
afd4aea0 BH |
1739 | if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS) |
1740 | return 0; | |
1741 | ||
afd4aea0 BH |
1742 | reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL) |
1743 | ? "system-level assertion" | |
1744 | : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL) | |
1745 | ? "thread-level assertion" | |
1746 | : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED) | |
1747 | ? "watchdog reset" | |
1748 | : "unknown assertion"; | |
62776d03 BH |
1749 | netif_err(efx, hw, efx->net_dev, |
1750 | "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason, | |
1751 | MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS), | |
1752 | MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS)); | |
afd4aea0 BH |
1753 | |
1754 | /* Print out the registers */ | |
c5bb0e98 BH |
1755 | for (index = 0; |
1756 | index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM; | |
1757 | index++) | |
1758 | netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", | |
1759 | 1 + index, | |
1760 | MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS, | |
1761 | index)); | |
afd4aea0 | 1762 | |
267d9d73 | 1763 | return 1; |
afd4aea0 BH |
1764 | } |
1765 | ||
267d9d73 | 1766 | static int efx_mcdi_exit_assertion(struct efx_nic *efx) |
8b2103ad | 1767 | { |
59cfc479 | 1768 | MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); |
267d9d73 | 1769 | int rc; |
8b2103ad | 1770 | |
0f1e54ae BH |
1771 | /* If the MC is running debug firmware, it might now be |
1772 | * waiting for a debugger to attach, but we just want it to | |
1773 | * reboot. We set a flag that makes the command a no-op if it | |
267d9d73 EC |
1774 | * has already done so. |
1775 | * The MCDI will thus return either 0 or -EIO. | |
0f1e54ae | 1776 | */ |
8b2103ad SH |
1777 | BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); |
1778 | MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, | |
1779 | MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION); | |
267d9d73 EC |
1780 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN, |
1781 | NULL, 0, NULL); | |
1782 | if (rc == -EIO) | |
1783 | rc = 0; | |
1784 | if (rc) | |
1785 | efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN, | |
1786 | NULL, 0, rc); | |
1787 | return rc; | |
8b2103ad SH |
1788 | } |
1789 | ||
1790 | int efx_mcdi_handle_assertion(struct efx_nic *efx) | |
1791 | { | |
1792 | int rc; | |
1793 | ||
1794 | rc = efx_mcdi_read_assertion(efx); | |
267d9d73 | 1795 | if (rc <= 0) |
8b2103ad SH |
1796 | return rc; |
1797 | ||
267d9d73 | 1798 | return efx_mcdi_exit_assertion(efx); |
8b2103ad SH |
1799 | } |
1800 | ||
afd4aea0 BH |
1801 | void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode) |
1802 | { | |
59cfc479 | 1803 | MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN); |
afd4aea0 BH |
1804 | int rc; |
1805 | ||
1806 | BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF); | |
1807 | BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON); | |
1808 | BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT); | |
1809 | ||
1810 | BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0); | |
1811 | ||
1812 | MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode); | |
1813 | ||
1814 | rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), | |
1815 | NULL, 0, NULL); | |
afd4aea0 BH |
1816 | } |
1817 | ||
3e336261 | 1818 | static int efx_mcdi_reset_func(struct efx_nic *efx) |
afd4aea0 | 1819 | { |
3e336261 JC |
1820 | MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN); |
1821 | int rc; | |
1822 | ||
1823 | BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0); | |
1824 | MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG, | |
1825 | ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1); | |
1826 | rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf), | |
1827 | NULL, 0, NULL); | |
1828 | return rc; | |
afd4aea0 BH |
1829 | } |
1830 | ||
6bff861d | 1831 | static int efx_mcdi_reset_mc(struct efx_nic *efx) |
afd4aea0 | 1832 | { |
59cfc479 | 1833 | MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); |
afd4aea0 BH |
1834 | int rc; |
1835 | ||
1836 | BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); | |
1837 | MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0); | |
1838 | rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf), | |
1839 | NULL, 0, NULL); | |
1840 | /* White is black, and up is down */ | |
1841 | if (rc == -EIO) | |
1842 | return 0; | |
1843 | if (rc == 0) | |
1844 | rc = -EIO; | |
afd4aea0 BH |
1845 | return rc; |
1846 | } | |
1847 | ||
6bff861d BH |
1848 | enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason) |
1849 | { | |
1850 | return RESET_TYPE_RECOVER_OR_ALL; | |
1851 | } | |
1852 | ||
1853 | int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method) | |
1854 | { | |
1855 | int rc; | |
1856 | ||
e283546c EC |
1857 | /* If MCDI is down, we can't handle_assertion */ |
1858 | if (method == RESET_TYPE_MCDI_TIMEOUT) { | |
1859 | rc = pci_reset_function(efx->pci_dev); | |
1860 | if (rc) | |
1861 | return rc; | |
1862 | /* Re-enable polled MCDI completion */ | |
1863 | if (efx->mcdi) { | |
1864 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
1865 | mcdi->mode = MCDI_MODE_POLL; | |
1866 | } | |
1867 | return 0; | |
1868 | } | |
1869 | ||
6bff861d BH |
1870 | /* Recover from a failed assertion pre-reset */ |
1871 | rc = efx_mcdi_handle_assertion(efx); | |
1872 | if (rc) | |
1873 | return rc; | |
1874 | ||
087e9025 JC |
1875 | if (method == RESET_TYPE_DATAPATH) |
1876 | return 0; | |
1877 | else if (method == RESET_TYPE_WORLD) | |
6bff861d BH |
1878 | return efx_mcdi_reset_mc(efx); |
1879 | else | |
3e336261 | 1880 | return efx_mcdi_reset_func(efx); |
6bff861d BH |
1881 | } |
1882 | ||
d215697f | 1883 | static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type, |
1884 | const u8 *mac, int *id_out) | |
afd4aea0 | 1885 | { |
59cfc479 BH |
1886 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN); |
1887 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN); | |
afd4aea0 BH |
1888 | size_t outlen; |
1889 | int rc; | |
1890 | ||
1891 | MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type); | |
1892 | MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE, | |
1893 | MC_CMD_FILTER_MODE_SIMPLE); | |
cd84ff4d | 1894 | ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac); |
afd4aea0 BH |
1895 | |
1896 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf), | |
1897 | outbuf, sizeof(outbuf), &outlen); | |
1898 | if (rc) | |
1899 | goto fail; | |
1900 | ||
1901 | if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) { | |
00bbb4a5 | 1902 | rc = -EIO; |
afd4aea0 BH |
1903 | goto fail; |
1904 | } | |
1905 | ||
1906 | *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID); | |
1907 | ||
1908 | return 0; | |
1909 | ||
1910 | fail: | |
1911 | *id_out = -1; | |
62776d03 | 1912 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1913 | return rc; |
1914 | ||
1915 | } | |
1916 | ||
1917 | ||
1918 | int | |
1919 | efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out) | |
1920 | { | |
1921 | return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out); | |
1922 | } | |
1923 | ||
1924 | ||
1925 | int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out) | |
1926 | { | |
59cfc479 | 1927 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN); |
afd4aea0 BH |
1928 | size_t outlen; |
1929 | int rc; | |
1930 | ||
1931 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0, | |
1932 | outbuf, sizeof(outbuf), &outlen); | |
1933 | if (rc) | |
1934 | goto fail; | |
1935 | ||
1936 | if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) { | |
00bbb4a5 | 1937 | rc = -EIO; |
afd4aea0 BH |
1938 | goto fail; |
1939 | } | |
1940 | ||
1941 | *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID); | |
1942 | ||
1943 | return 0; | |
1944 | ||
1945 | fail: | |
1946 | *id_out = -1; | |
62776d03 | 1947 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1948 | return rc; |
1949 | } | |
1950 | ||
1951 | ||
1952 | int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id) | |
1953 | { | |
59cfc479 | 1954 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN); |
afd4aea0 BH |
1955 | int rc; |
1956 | ||
1957 | MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id); | |
1958 | ||
1959 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf), | |
1960 | NULL, 0, NULL); | |
afd4aea0 BH |
1961 | return rc; |
1962 | } | |
1963 | ||
cd2d5b52 BH |
1964 | int efx_mcdi_flush_rxqs(struct efx_nic *efx) |
1965 | { | |
1966 | struct efx_channel *channel; | |
1967 | struct efx_rx_queue *rx_queue; | |
c5bb0e98 BH |
1968 | MCDI_DECLARE_BUF(inbuf, |
1969 | MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); | |
cd2d5b52 BH |
1970 | int rc, count; |
1971 | ||
45078374 BH |
1972 | BUILD_BUG_ON(EFX_MAX_CHANNELS > |
1973 | MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM); | |
1974 | ||
cd2d5b52 BH |
1975 | count = 0; |
1976 | efx_for_each_channel(channel, efx) { | |
1977 | efx_for_each_channel_rx_queue(rx_queue, channel) { | |
1978 | if (rx_queue->flush_pending) { | |
1979 | rx_queue->flush_pending = false; | |
1980 | atomic_dec(&efx->rxq_flush_pending); | |
c5bb0e98 BH |
1981 | MCDI_SET_ARRAY_DWORD( |
1982 | inbuf, FLUSH_RX_QUEUES_IN_QID_OFST, | |
1983 | count, efx_rx_queue_index(rx_queue)); | |
1984 | count++; | |
cd2d5b52 BH |
1985 | } |
1986 | } | |
1987 | } | |
1988 | ||
c5bb0e98 BH |
1989 | rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf, |
1990 | MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL); | |
bbec969b | 1991 | WARN_ON(rc < 0); |
cd2d5b52 | 1992 | |
cd2d5b52 BH |
1993 | return rc; |
1994 | } | |
afd4aea0 BH |
1995 | |
1996 | int efx_mcdi_wol_filter_reset(struct efx_nic *efx) | |
1997 | { | |
1998 | int rc; | |
1999 | ||
2000 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL); | |
afd4aea0 BH |
2001 | return rc; |
2002 | } | |
2003 | ||
34ccfe6f DP |
2004 | int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled, |
2005 | unsigned int *flags) | |
8127d661 BH |
2006 | { |
2007 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN); | |
34ccfe6f DP |
2008 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WORKAROUND_EXT_OUT_LEN); |
2009 | size_t outlen; | |
2010 | int rc; | |
8127d661 BH |
2011 | |
2012 | BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0); | |
2013 | MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type); | |
2014 | MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled); | |
34ccfe6f DP |
2015 | rc = efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf), |
2016 | outbuf, sizeof(outbuf), &outlen); | |
2017 | if (rc) | |
2018 | return rc; | |
2019 | ||
2020 | if (!flags) | |
2021 | return 0; | |
2022 | ||
2023 | if (outlen >= MC_CMD_WORKAROUND_EXT_OUT_LEN) | |
2024 | *flags = MCDI_DWORD(outbuf, WORKAROUND_EXT_OUT_FLAGS); | |
2025 | else | |
2026 | *flags = 0; | |
2027 | ||
2028 | return 0; | |
8127d661 BH |
2029 | } |
2030 | ||
267d9d73 EC |
2031 | int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out, |
2032 | unsigned int *enabled_out) | |
2033 | { | |
aa09a3da | 2034 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN); |
267d9d73 EC |
2035 | size_t outlen; |
2036 | int rc; | |
2037 | ||
2038 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0, | |
2039 | outbuf, sizeof(outbuf), &outlen); | |
2040 | if (rc) | |
2041 | goto fail; | |
2042 | ||
2043 | if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) { | |
2044 | rc = -EIO; | |
2045 | goto fail; | |
2046 | } | |
2047 | ||
2048 | if (impl_out) | |
2049 | *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED); | |
2050 | ||
2051 | if (enabled_out) | |
2052 | *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED); | |
2053 | ||
2054 | return 0; | |
2055 | ||
2056 | fail: | |
832dc9ed EC |
2057 | /* Older firmware lacks GET_WORKAROUNDS and this isn't especially |
2058 | * terrifying. The call site will have to deal with it though. | |
2059 | */ | |
2060 | netif_printk(efx, hw, rc == -ENOSYS ? KERN_DEBUG : KERN_ERR, | |
2061 | efx->net_dev, "%s: failed rc=%d\n", __func__, rc); | |
267d9d73 EC |
2062 | return rc; |
2063 | } | |
2064 | ||
45a3fd55 BH |
2065 | #ifdef CONFIG_SFC_MTD |
2066 | ||
2067 | #define EFX_MCDI_NVRAM_LEN_MAX 128 | |
2068 | ||
2069 | static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type) | |
2070 | { | |
2071 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN); | |
2072 | int rc; | |
2073 | ||
2074 | MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type); | |
2075 | ||
2076 | BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0); | |
2077 | ||
2078 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf), | |
2079 | NULL, 0, NULL); | |
45a3fd55 BH |
2080 | return rc; |
2081 | } | |
2082 | ||
2083 | static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type, | |
2084 | loff_t offset, u8 *buffer, size_t length) | |
2085 | { | |
2086 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN); | |
2087 | MCDI_DECLARE_BUF(outbuf, | |
2088 | MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)); | |
2089 | size_t outlen; | |
2090 | int rc; | |
2091 | ||
2092 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type); | |
2093 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset); | |
2094 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length); | |
2095 | ||
2096 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf), | |
2097 | outbuf, sizeof(outbuf), &outlen); | |
2098 | if (rc) | |
1e0b8120 | 2099 | return rc; |
45a3fd55 BH |
2100 | |
2101 | memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length); | |
2102 | return 0; | |
45a3fd55 BH |
2103 | } |
2104 | ||
2105 | static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type, | |
2106 | loff_t offset, const u8 *buffer, size_t length) | |
2107 | { | |
2108 | MCDI_DECLARE_BUF(inbuf, | |
2109 | MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)); | |
2110 | int rc; | |
2111 | ||
2112 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type); | |
2113 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset); | |
2114 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length); | |
2115 | memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length); | |
2116 | ||
2117 | BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0); | |
2118 | ||
2119 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, | |
2120 | ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4), | |
2121 | NULL, 0, NULL); | |
45a3fd55 BH |
2122 | return rc; |
2123 | } | |
2124 | ||
2125 | static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, | |
2126 | loff_t offset, size_t length) | |
2127 | { | |
2128 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN); | |
2129 | int rc; | |
2130 | ||
2131 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type); | |
2132 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset); | |
2133 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length); | |
2134 | ||
2135 | BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0); | |
2136 | ||
2137 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf), | |
2138 | NULL, 0, NULL); | |
45a3fd55 BH |
2139 | return rc; |
2140 | } | |
2141 | ||
2142 | static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type) | |
2143 | { | |
2144 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN); | |
2145 | int rc; | |
2146 | ||
2147 | MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type); | |
2148 | ||
2149 | BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0); | |
2150 | ||
2151 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf), | |
2152 | NULL, 0, NULL); | |
45a3fd55 BH |
2153 | return rc; |
2154 | } | |
2155 | ||
2156 | int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start, | |
2157 | size_t len, size_t *retlen, u8 *buffer) | |
2158 | { | |
2159 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); | |
2160 | struct efx_nic *efx = mtd->priv; | |
2161 | loff_t offset = start; | |
2162 | loff_t end = min_t(loff_t, start + len, mtd->size); | |
2163 | size_t chunk; | |
2164 | int rc = 0; | |
2165 | ||
2166 | while (offset < end) { | |
2167 | chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); | |
2168 | rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset, | |
2169 | buffer, chunk); | |
2170 | if (rc) | |
2171 | goto out; | |
2172 | offset += chunk; | |
2173 | buffer += chunk; | |
2174 | } | |
2175 | out: | |
2176 | *retlen = offset - start; | |
2177 | return rc; | |
2178 | } | |
2179 | ||
2180 | int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len) | |
2181 | { | |
2182 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); | |
2183 | struct efx_nic *efx = mtd->priv; | |
2184 | loff_t offset = start & ~((loff_t)(mtd->erasesize - 1)); | |
2185 | loff_t end = min_t(loff_t, start + len, mtd->size); | |
2186 | size_t chunk = part->common.mtd.erasesize; | |
2187 | int rc = 0; | |
2188 | ||
2189 | if (!part->updating) { | |
2190 | rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); | |
2191 | if (rc) | |
2192 | goto out; | |
2193 | part->updating = true; | |
2194 | } | |
2195 | ||
2196 | /* The MCDI interface can in fact do multiple erase blocks at once; | |
2197 | * but erasing may be slow, so we make multiple calls here to avoid | |
2198 | * tripping the MCDI RPC timeout. */ | |
2199 | while (offset < end) { | |
2200 | rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset, | |
2201 | chunk); | |
2202 | if (rc) | |
2203 | goto out; | |
2204 | offset += chunk; | |
2205 | } | |
2206 | out: | |
2207 | return rc; | |
2208 | } | |
2209 | ||
2210 | int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start, | |
2211 | size_t len, size_t *retlen, const u8 *buffer) | |
2212 | { | |
2213 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); | |
2214 | struct efx_nic *efx = mtd->priv; | |
2215 | loff_t offset = start; | |
2216 | loff_t end = min_t(loff_t, start + len, mtd->size); | |
2217 | size_t chunk; | |
2218 | int rc = 0; | |
2219 | ||
2220 | if (!part->updating) { | |
2221 | rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); | |
2222 | if (rc) | |
2223 | goto out; | |
2224 | part->updating = true; | |
2225 | } | |
2226 | ||
2227 | while (offset < end) { | |
2228 | chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); | |
2229 | rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset, | |
2230 | buffer, chunk); | |
2231 | if (rc) | |
2232 | goto out; | |
2233 | offset += chunk; | |
2234 | buffer += chunk; | |
2235 | } | |
2236 | out: | |
2237 | *retlen = offset - start; | |
2238 | return rc; | |
2239 | } | |
2240 | ||
2241 | int efx_mcdi_mtd_sync(struct mtd_info *mtd) | |
2242 | { | |
2243 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); | |
2244 | struct efx_nic *efx = mtd->priv; | |
2245 | int rc = 0; | |
2246 | ||
2247 | if (part->updating) { | |
2248 | part->updating = false; | |
2249 | rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type); | |
2250 | } | |
2251 | ||
2252 | return rc; | |
2253 | } | |
2254 | ||
2255 | void efx_mcdi_mtd_rename(struct efx_mtd_partition *part) | |
2256 | { | |
2257 | struct efx_mcdi_mtd_partition *mcdi_part = | |
2258 | container_of(part, struct efx_mcdi_mtd_partition, common); | |
2259 | struct efx_nic *efx = part->mtd.priv; | |
2260 | ||
2261 | snprintf(part->name, sizeof(part->name), "%s %s:%02x", | |
2262 | efx->name, part->type_name, mcdi_part->fw_subtype); | |
2263 | } | |
2264 | ||
2265 | #endif /* CONFIG_SFC_MTD */ |