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Merge remote-tracking branch 'spi/for-next'
[deliverable/linux.git] / drivers / net / ethernet / via / via-velocity.c
CommitLineData
1da177e4
LT		 1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
1da177e4 11 * rx_copybreak/alignment
1da177e4
LT		 12 * More testing
13 *
113aa838 14 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk>
1da177e4
LT		 15 * Additional fixes and clean up: Francois Romieu
16 *
17 * This source has not been verified for use in safety critical systems.
18 *
19 * Please direct queries about the revamped driver to the linux-kernel
20 * list not VIA.
21 *
22 * Original code:
23 *
24 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
25 * All rights reserved.
26 *
27 * This software may be redistributed and/or modified under
28 * the terms of the GNU General Public License as published by the Free
29 * Software Foundation; either version 2 of the License, or
30 * any later version.
31 *
32 * This program is distributed in the hope that it will be useful, but
33 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
34 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
35 * for more details.
36 *
37 * Author: Chuang Liang-Shing, AJ Jiang
38 *
39 * Date: Jan 24, 2003
40 *
41 * MODULE_LICENSE("GPL");
42 *
43 */
44
1da177e4
LT		 45#include <linux/module.h>
46#include <linux/types.h>
73b54688 47#include <linux/bitops.h>
1da177e4 48#include <linux/init.h>
e2c41f14 49#include <linux/dma-mapping.h>
1da177e4
LT		 50#include <linux/mm.h>
51#include <linux/errno.h>
52#include <linux/ioport.h>
53#include <linux/pci.h>
54#include <linux/kernel.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/skbuff.h>
58#include <linux/delay.h>
59#include <linux/timer.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
1da177e4
LT		 62#include <linux/string.h>
63#include <linux/wait.h>
c4067400 64#include <linux/io.h>
1da177e4 65#include <linux/if.h>
c4067400 66#include <linux/uaccess.h>
1da177e4 67#include <linux/proc_fs.h>
6dffbe53
TP		 68#include <linux/of_address.h>
69#include <linux/of_device.h>
70#include <linux/of_irq.h>
1da177e4 71#include <linux/inetdevice.h>
6dffbe53 72#include <linux/platform_device.h>
1da177e4
LT		 73#include <linux/reboot.h>
74#include <linux/ethtool.h>
75#include <linux/mii.h>
76#include <linux/in.h>
77#include <linux/if_arp.h>
501e4d24 78#include <linux/if_vlan.h>
1da177e4
LT		 79#include <linux/ip.h>
80#include <linux/tcp.h>
81#include <linux/udp.h>
82#include <linux/crc-ccitt.h>
83#include <linux/crc32.h>
84
85#include "via-velocity.h"
86
6dffbe53
TP		 87enum velocity_bus_type {
88 BUS_PCI,
89 BUS_PLATFORM,
90};
1da177e4 91
c4067400 92static int velocity_nics;
1da177e4
LT		 93static int msglevel = MSG_LEVEL_INFO;
94
6dffbe53
TP		 95static void velocity_set_power_state(struct velocity_info *vptr, char state)
96{
97 void *addr = vptr->mac_regs;
98
99 if (vptr->pdev)
100 pci_set_power_state(vptr->pdev, state);
101 else
102 writeb(state, addr + 0x154);
103}
104
01faccbf
SH		 105/**
106 * mac_get_cam_mask - Read a CAM mask
107 * @regs: register block for this velocity
108 * @mask: buffer to store mask
109 *
110 * Fetch the mask bits of the selected CAM and store them into the
111 * provided mask buffer.
112 */
c4067400 113static void mac_get_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
01faccbf
SH		 114{
115 int i;
116
117 /* Select CAM mask */
118 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
119
120 writeb(0, &regs->CAMADDR);
121
122 /* read mask */
123 for (i = 0; i < 8; i++)
124 *mask++ = readb(&(regs->MARCAM[i]));
125
126 /* disable CAMEN */
127 writeb(0, &regs->CAMADDR);
128
129 /* Select mar */
130 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
01faccbf
SH		 131}
132
01faccbf
SH		 133/**
134 * mac_set_cam_mask - Set a CAM mask
135 * @regs: register block for this velocity
136 * @mask: CAM mask to load
137 *
138 * Store a new mask into a CAM
139 */
c4067400 140static void mac_set_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
01faccbf
SH		 141{
142 int i;
143 /* Select CAM mask */
144 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
145
146 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
147
c4067400 148 for (i = 0; i < 8; i++)
01faccbf 149 writeb(*mask++, &(regs->MARCAM[i]));
c4067400 150
01faccbf
SH		 151 /* disable CAMEN */
152 writeb(0, &regs->CAMADDR);
153
154 /* Select mar */
155 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
156}
157
c4067400 158static void mac_set_vlan_cam_mask(struct mac_regs __iomem *regs, u8 *mask)
01faccbf
SH		 159{
160 int i;
161 /* Select CAM mask */
162 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
163
164 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
165
c4067400 166 for (i = 0; i < 8; i++)
01faccbf 167 writeb(*mask++, &(regs->MARCAM[i]));
c4067400 168
01faccbf
SH		 169 /* disable CAMEN */
170 writeb(0, &regs->CAMADDR);
171
172 /* Select mar */
173 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
174}
175
176/**
177 * mac_set_cam - set CAM data
178 * @regs: register block of this velocity
179 * @idx: Cam index
180 * @addr: 2 or 6 bytes of CAM data
181 *
182 * Load an address or vlan tag into a CAM
183 */
c4067400 184static void mac_set_cam(struct mac_regs __iomem *regs, int idx, const u8 *addr)
01faccbf
SH		 185{
186 int i;
187
188 /* Select CAM mask */
189 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
190
191 idx &= (64 - 1);
192
193 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
194
c4067400 195 for (i = 0; i < 6; i++)
01faccbf 196 writeb(*addr++, &(regs->MARCAM[i]));
c4067400 197
01faccbf
SH		 198 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
199
200 udelay(10);
201
202 writeb(0, &regs->CAMADDR);
203
204 /* Select mar */
205 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
206}
207
c4067400 208static void mac_set_vlan_cam(struct mac_regs __iomem *regs, int idx,
01faccbf
SH		 209 const u8 *addr)
210{
211
212 /* Select CAM mask */
213 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
214
215 idx &= (64 - 1);
216
217 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
218 writew(*((u16 *) addr), &regs->MARCAM[0]);
219
220 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
221
222 udelay(10);
223
224 writeb(0, &regs->CAMADDR);
225
226 /* Select mar */
227 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
228}
229
230
231/**
232 * mac_wol_reset - reset WOL after exiting low power
233 * @regs: register block of this velocity
234 *
235 * Called after we drop out of wake on lan mode in order to
236 * reset the Wake on lan features. This function doesn't restore
237 * the rest of the logic from the result of sleep/wakeup
238 */
c4067400 239static void mac_wol_reset(struct mac_regs __iomem *regs)
01faccbf
SH		 240{
241
242 /* Turn off SWPTAG right after leaving power mode */
243 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
244 /* clear sticky bits */
245 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
246
247 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
248 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
249 /* disable force PME-enable */
250 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
251 /* disable power-event config bit */
252 writew(0xFFFF, &regs->WOLCRClr);
253 /* clear power status */
254 writew(0xFFFF, &regs->WOLSRClr);
255}
1da177e4 256
7282d491 257static const struct ethtool_ops velocity_ethtool_ops;
1da177e4
LT		 258
259/*
260 Define module options
261*/
262
263MODULE_AUTHOR("VIA Networking Technologies, Inc.");
264MODULE_LICENSE("GPL");
265MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
266
c4067400
DJ		 267#define VELOCITY_PARAM(N, D) \
268 static int N[MAX_UNITS] = OPTION_DEFAULT;\
1da177e4 269 module_param_array(N, int, NULL, 0); \
c4067400 270 MODULE_PARM_DESC(N, D);
1da177e4
LT		 271
272#define RX_DESC_MIN 64
273#define RX_DESC_MAX 255
274#define RX_DESC_DEF 64
275VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
276
277#define TX_DESC_MIN 16
278#define TX_DESC_MAX 256
279#define TX_DESC_DEF 64
280VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
281
1da177e4
LT		 282#define RX_THRESH_MIN 0
283#define RX_THRESH_MAX 3
284#define RX_THRESH_DEF 0
285/* rx_thresh[] is used for controlling the receive fifo threshold.
286 0: indicate the rxfifo threshold is 128 bytes.
287 1: indicate the rxfifo threshold is 512 bytes.
288 2: indicate the rxfifo threshold is 1024 bytes.
289 3: indicate the rxfifo threshold is store & forward.
290*/
291VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
292
293#define DMA_LENGTH_MIN 0
294#define DMA_LENGTH_MAX 7
2a5774f7 295#define DMA_LENGTH_DEF 6
1da177e4
LT		 296
297/* DMA_length[] is used for controlling the DMA length
298 0: 8 DWORDs
299 1: 16 DWORDs
300 2: 32 DWORDs
301 3: 64 DWORDs
302 4: 128 DWORDs
303 5: 256 DWORDs
304 6: SF(flush till emply)
305 7: SF(flush till emply)
306*/
307VELOCITY_PARAM(DMA_length, "DMA length");
308
1da177e4
LT		 309#define IP_ALIG_DEF 0
310/* IP_byte_align[] is used for IP header DWORD byte aligned
311 0: indicate the IP header won't be DWORD byte aligned.(Default) .
312 1: indicate the IP header will be DWORD byte aligned.
25985edc 313 In some environment, the IP header should be DWORD byte aligned,
1da177e4
LT		 314 or the packet will be droped when we receive it. (eg: IPVS)
315*/
316VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
317
1da177e4
LT		 318#define FLOW_CNTL_DEF 1
319#define FLOW_CNTL_MIN 1
320#define FLOW_CNTL_MAX 5
321
322/* flow_control[] is used for setting the flow control ability of NIC.
323 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
324 2: enable TX flow control.
325 3: enable RX flow control.
326 4: enable RX/TX flow control.
327 5: disable
328*/
329VELOCITY_PARAM(flow_control, "Enable flow control ability");
330
331#define MED_LNK_DEF 0
332#define MED_LNK_MIN 0
15419227 333#define MED_LNK_MAX 5
1da177e4
LT		 334/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
335 0: indicate autonegotiation for both speed and duplex mode
336 1: indicate 100Mbps half duplex mode
337 2: indicate 100Mbps full duplex mode
338 3: indicate 10Mbps half duplex mode
339 4: indicate 10Mbps full duplex mode
15419227 340 5: indicate 1000Mbps full duplex mode
1da177e4
LT		 341
342 Note:
c4067400
DJ		 343 if EEPROM have been set to the force mode, this option is ignored
344 by driver.
1da177e4
LT		 345*/
346VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
347
1da177e4
LT		 348#define WOL_OPT_DEF 0
349#define WOL_OPT_MIN 0
350#define WOL_OPT_MAX 7
351/* wol_opts[] is used for controlling wake on lan behavior.
352 0: Wake up if recevied a magic packet. (Default)
353 1: Wake up if link status is on/off.
354 2: Wake up if recevied an arp packet.
355 4: Wake up if recevied any unicast packet.
356 Those value can be sumed up to support more than one option.
357*/
358VELOCITY_PARAM(wol_opts, "Wake On Lan options");
359
1da177e4
LT		 360static int rx_copybreak = 200;
361module_param(rx_copybreak, int, 0644);
362MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
363
1da177e4
LT		 364/*
365 * Internal board variants. At the moment we have only one
366 */
4f14b92f 367static struct velocity_info_tbl chip_info_table[] = {
cabb7667
JG		 368 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
369 { }
1da177e4
LT		 370};
371
372/*
373 * Describe the PCI device identifiers that we support in this
374 * device driver. Used for hotplug autoloading.
375 */
6dffbe53 376
9baa3c34 377static const struct pci_device_id velocity_pci_id_table[] = {
e54f4893
JG		 378 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
379 { }
1da177e4
LT		 380};
381
6dffbe53
TP		 382MODULE_DEVICE_TABLE(pci, velocity_pci_id_table);
383
384/**
385 * Describe the OF device identifiers that we support in this
386 * device driver. Used for devicetree nodes.
387 */
2c71ec99 388static const struct of_device_id velocity_of_ids[] = {
6dffbe53
TP		 389 { .compatible = "via,velocity-vt6110", .data = &chip_info_table[0] },
390 { /* Sentinel */ },
391};
392MODULE_DEVICE_TABLE(of, velocity_of_ids);
1da177e4
LT		 393
394/**
395 * get_chip_name - identifier to name
396 * @id: chip identifier
397 *
398 * Given a chip identifier return a suitable description. Returns
399 * a pointer a static string valid while the driver is loaded.
400 */
27add006 401static const char *get_chip_name(enum chip_type chip_id)
1da177e4
LT		 402{
403 int i;
404 for (i = 0; chip_info_table[i].name != NULL; i++)
405 if (chip_info_table[i].chip_id == chip_id)
406 break;
407 return chip_info_table[i].name;
408}
409
1da177e4
LT		 410/**
411 * velocity_set_int_opt - parser for integer options
412 * @opt: pointer to option value
413 * @val: value the user requested (or -1 for default)
414 * @min: lowest value allowed
415 * @max: highest value allowed
416 * @def: default value
417 * @name: property name
418 * @dev: device name
419 *
420 * Set an integer property in the module options. This function does
421 * all the verification and checking as well as reporting so that
422 * we don't duplicate code for each option.
423 */
27add006
BP		 424static void velocity_set_int_opt(int *opt, int val, int min, int max, int def,
425 char *name, const char *devname)
1da177e4
LT		 426{
427 if (val == -1)
428 *opt = def;
429 else if (val < min || val > max) {
430 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
431 devname, name, min, max);
432 *opt = def;
433 } else {
434 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
435 devname, name, val);
436 *opt = val;
437 }
438}
439
440/**
441 * velocity_set_bool_opt - parser for boolean options
442 * @opt: pointer to option value
443 * @val: value the user requested (or -1 for default)
444 * @def: default value (yes/no)
445 * @flag: numeric value to set for true.
446 * @name: property name
447 * @dev: device name
448 *
449 * Set a boolean property in the module options. This function does
450 * all the verification and checking as well as reporting so that
451 * we don't duplicate code for each option.
452 */
27add006
BP		 453static void velocity_set_bool_opt(u32 *opt, int val, int def, u32 flag,
454 char *name, const char *devname)
1da177e4
LT		 455{
456 (*opt) &= (~flag);
457 if (val == -1)
458 *opt |= (def ? flag : 0);
459 else if (val < 0 || val > 1) {
6aa20a22 460 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT		 461 devname, name);
462 *opt |= (def ? flag : 0);
463 } else {
6aa20a22 464 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT		 465 devname, name, val ? "TRUE" : "FALSE");
466 *opt |= (val ? flag : 0);
467 }
468}
469
470/**
471 * velocity_get_options - set options on device
472 * @opts: option structure for the device
473 * @index: index of option to use in module options array
474 * @devname: device name
475 *
476 * Turn the module and command options into a single structure
477 * for the current device
478 */
27add006
BP		 479static void velocity_get_options(struct velocity_opt *opts, int index,
480 const char *devname)
1da177e4
LT		 481{
482
483 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
484 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
485 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
486 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
501e4d24 487
1da177e4
LT		 488 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
489 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
1da177e4 490 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
64699336 491 velocity_set_int_opt(&opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
1da177e4
LT		 492 opts->numrx = (opts->numrx & ~3);
493}
494
495/**
496 * velocity_init_cam_filter - initialise CAM
497 * @vptr: velocity to program
498 *
499 * Initialize the content addressable memory used for filters. Load
500 * appropriately according to the presence of VLAN
501 */
1da177e4
LT		 502static void velocity_init_cam_filter(struct velocity_info *vptr)
503{
c4067400 504 struct mac_regs __iomem *regs = vptr->mac_regs;
73b54688 505 unsigned int vid, i = 0;
1da177e4
LT		 506
507 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
508 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
509 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
510
511 /* Disable all CAMs */
512 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
513 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
01faccbf
SH		 514 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
515 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4 516
d4f73c8e 517 /* Enable VCAMs */
73b54688
JP		 518 for_each_set_bit(vid, vptr->active_vlans, VLAN_N_VID) {
519 mac_set_vlan_cam(regs, i, (u8 *) &vid);
520 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
521 if (++i >= VCAM_SIZE)
522 break;
523 }
524 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
d4f73c8e
FR		 525}
526
80d5c368
PM		 527static int velocity_vlan_rx_add_vid(struct net_device *dev,
528 __be16 proto, u16 vid)
501e4d24
SH		 529{
530 struct velocity_info *vptr = netdev_priv(dev);
531
c4067400 532 spin_lock_irq(&vptr->lock);
73b54688 533 set_bit(vid, vptr->active_vlans);
501e4d24 534 velocity_init_cam_filter(vptr);
c4067400 535 spin_unlock_irq(&vptr->lock);
8e586137 536 return 0;
501e4d24
SH		 537}
538
80d5c368
PM		 539static int velocity_vlan_rx_kill_vid(struct net_device *dev,
540 __be16 proto, u16 vid)
501e4d24
SH		 541{
542 struct velocity_info *vptr = netdev_priv(dev);
543
c4067400 544 spin_lock_irq(&vptr->lock);
73b54688 545 clear_bit(vid, vptr->active_vlans);
501e4d24 546 velocity_init_cam_filter(vptr);
c4067400 547 spin_unlock_irq(&vptr->lock);
8e586137 548 return 0;
501e4d24
SH		 549}
550
3c4dc711
FR		 551static void velocity_init_rx_ring_indexes(struct velocity_info *vptr)
552{
553 vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0;
554}
501e4d24 555
1da177e4
LT		 556/**
557 * velocity_rx_reset - handle a receive reset
558 * @vptr: velocity we are resetting
559 *
560 * Reset the ownership and status for the receive ring side.
561 * Hand all the receive queue to the NIC.
562 */
1da177e4
LT		 563static void velocity_rx_reset(struct velocity_info *vptr)
564{
565
c4067400 566 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4
LT		 567 int i;
568
3c4dc711 569 velocity_init_rx_ring_indexes(vptr);
1da177e4
LT		 570
571 /*
572 * Init state, all RD entries belong to the NIC
573 */
574 for (i = 0; i < vptr->options.numrx; ++i)
0fe9f15e 575 vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 576
577 writew(vptr->options.numrx, &regs->RBRDU);
0fe9f15e 578 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1da177e4
LT		 579 writew(0, &regs->RDIdx);
580 writew(vptr->options.numrx - 1, &regs->RDCSize);
581}
582
583/**
2cf71d2e
DJ		 584 * velocity_get_opt_media_mode - get media selection
585 * @vptr: velocity adapter
1da177e4 586 *
2cf71d2e
DJ		 587 * Get the media mode stored in EEPROM or module options and load
588 * mii_status accordingly. The requested link state information
589 * is also returned.
1da177e4 590 */
2cf71d2e 591static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
1da177e4 592{
2cf71d2e 593 u32 status = 0;
1da177e4 594
2cf71d2e
DJ		 595 switch (vptr->options.spd_dpx) {
596 case SPD_DPX_AUTO:
597 status = VELOCITY_AUTONEG_ENABLE;
1da177e4 598 break;
2cf71d2e
DJ		 599 case SPD_DPX_100_FULL:
600 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
601 break;
602 case SPD_DPX_10_FULL:
603 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
604 break;
605 case SPD_DPX_100_HALF:
606 status = VELOCITY_SPEED_100;
607 break;
608 case SPD_DPX_10_HALF:
609 status = VELOCITY_SPEED_10;
610 break;
15419227 611 case SPD_DPX_1000_FULL:
612 status = VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
613 break;
2cf71d2e
DJ		 614 }
615 vptr->mii_status = status;
616 return status;
617}
1da177e4 618
2cf71d2e
DJ		 619/**
620 * safe_disable_mii_autopoll - autopoll off
621 * @regs: velocity registers
622 *
623 * Turn off the autopoll and wait for it to disable on the chip
624 */
625static void safe_disable_mii_autopoll(struct mac_regs __iomem *regs)
626{
627 u16 ww;
1da177e4 628
2cf71d2e
DJ		 629 /* turn off MAUTO */
630 writeb(0, &regs->MIICR);
631 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
632 udelay(1);
633 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
634 break;
635 }
636}
1da177e4 637
2cf71d2e
DJ		 638/**
639 * enable_mii_autopoll - turn on autopolling
640 * @regs: velocity registers
641 *
642 * Enable the MII link status autopoll feature on the Velocity
643 * hardware. Wait for it to enable.
644 */
645static void enable_mii_autopoll(struct mac_regs __iomem *regs)
646{
647 int ii;
1da177e4 648
2cf71d2e
DJ		 649 writeb(0, &(regs->MIICR));
650 writeb(MIIADR_SWMPL, &regs->MIIADR);
1da177e4 651
2cf71d2e
DJ		 652 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
653 udelay(1);
654 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
655 break;
656 }
1da177e4 657
2cf71d2e 658 writeb(MIICR_MAUTO, &regs->MIICR);
1da177e4 659
2cf71d2e
DJ		 660 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
661 udelay(1);
662 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
663 break;
664 }
1da177e4 665
2cf71d2e 666}
1da177e4 667
2cf71d2e
DJ		 668/**
669 * velocity_mii_read - read MII data
670 * @regs: velocity registers
671 * @index: MII register index
672 * @data: buffer for received data
673 *
674 * Perform a single read of an MII 16bit register. Returns zero
675 * on success or -ETIMEDOUT if the PHY did not respond.
676 */
677static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
678{
679 u16 ww;
1da177e4 680
2cf71d2e
DJ		 681 /*
682 * Disable MIICR_MAUTO, so that mii addr can be set normally
683 */
684 safe_disable_mii_autopoll(regs);
1da177e4 685
2cf71d2e 686 writeb(index, &regs->MIIADR);
1da177e4 687
2cf71d2e 688 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
1da177e4 689
2cf71d2e
DJ		 690 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
691 if (!(readb(&regs->MIICR) & MIICR_RCMD))
692 break;
693 }
1da177e4 694
2cf71d2e 695 *data = readw(&regs->MIIDATA);
1da177e4 696
2cf71d2e
DJ		 697 enable_mii_autopoll(regs);
698 if (ww == W_MAX_TIMEOUT)
699 return -ETIMEDOUT;
700 return 0;
1da177e4
LT		 701}
702
703/**
2cf71d2e
DJ		 704 * mii_check_media_mode - check media state
705 * @regs: velocity registers
1da177e4 706 *
2cf71d2e
DJ		 707 * Check the current MII status and determine the link status
708 * accordingly
1da177e4 709 */
2cf71d2e 710static u32 mii_check_media_mode(struct mac_regs __iomem *regs)
1da177e4 711{
2cf71d2e
DJ		 712 u32 status = 0;
713 u16 ANAR;
1da177e4 714
3a7f8681 715 if (!MII_REG_BITS_IS_ON(BMSR_LSTATUS, MII_BMSR, regs))
2cf71d2e 716 status |= VELOCITY_LINK_FAIL;
1da177e4 717
3a7f8681 718 if (MII_REG_BITS_IS_ON(ADVERTISE_1000FULL, MII_CTRL1000, regs))
2cf71d2e 719 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
3a7f8681 720 else if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF, MII_CTRL1000, regs))
2cf71d2e
DJ		 721 status |= (VELOCITY_SPEED_1000);
722 else {
3a7f8681
FR		 723 velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
724 if (ANAR & ADVERTISE_100FULL)
2cf71d2e 725 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
3a7f8681 726 else if (ANAR & ADVERTISE_100HALF)
2cf71d2e 727 status |= VELOCITY_SPEED_100;
3a7f8681 728 else if (ANAR & ADVERTISE_10FULL)
2cf71d2e
DJ		 729 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
730 else
731 status |= (VELOCITY_SPEED_10);
1da177e4
LT		 732 }
733
3a7f8681
FR		 734 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, regs)) {
735 velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
736 if ((ANAR & (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF))
737 == (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) {
738 if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF | ADVERTISE_1000FULL, MII_CTRL1000, regs))
2cf71d2e
DJ		 739 status |= VELOCITY_AUTONEG_ENABLE;
740 }
1da177e4 741 }
1da177e4 742
2cf71d2e
DJ		 743 return status;
744}
39a11bd9 745
1da177e4 746/**
2cf71d2e
DJ		 747 * velocity_mii_write - write MII data
748 * @regs: velocity registers
749 * @index: MII register index
750 * @data: 16bit data for the MII register
1da177e4 751 *
2cf71d2e
DJ		 752 * Perform a single write to an MII 16bit register. Returns zero
753 * on success or -ETIMEDOUT if the PHY did not respond.
1da177e4 754 */
2cf71d2e 755static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
1da177e4 756{
2cf71d2e 757 u16 ww;
1da177e4 758
2cf71d2e
DJ		 759 /*
760 * Disable MIICR_MAUTO, so that mii addr can be set normally
e54f4893 761 */
2cf71d2e 762 safe_disable_mii_autopoll(regs);
1da177e4 763
2cf71d2e
DJ		 764 /* MII reg offset */
765 writeb(mii_addr, &regs->MIIADR);
766 /* set MII data */
767 writew(data, &regs->MIIDATA);
768
769 /* turn on MIICR_WCMD */
770 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
771
772 /* W_MAX_TIMEOUT is the timeout period */
773 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
774 udelay(5);
775 if (!(readb(&regs->MIICR) & MIICR_WCMD))
776 break;
1da177e4 777 }
2cf71d2e 778 enable_mii_autopoll(regs);
6aa20a22 779
2cf71d2e
DJ		 780 if (ww == W_MAX_TIMEOUT)
781 return -ETIMEDOUT;
782 return 0;
783}
6aa20a22 784
2cf71d2e
DJ		 785/**
786 * set_mii_flow_control - flow control setup
787 * @vptr: velocity interface
788 *
789 * Set up the flow control on this interface according to
790 * the supplied user/eeprom options.
791 */
792static void set_mii_flow_control(struct velocity_info *vptr)
793{
794 /*Enable or Disable PAUSE in ANAR */
795 switch (vptr->options.flow_cntl) {
796 case FLOW_CNTL_TX:
3a7f8681
FR		 797 MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
798 MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
2cf71d2e 799 break;
1da177e4 800
2cf71d2e 801 case FLOW_CNTL_RX:
3a7f8681
FR		 802 MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
803 MII_REG_BITS_ON(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
2cf71d2e 804 break;
1da177e4 805
2cf71d2e 806 case FLOW_CNTL_TX_RX:
3a7f8681 807 MII_REG_BITS_ON(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
4a35ecf8 808 MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
2cf71d2e 809 break;
1da177e4 810
2cf71d2e 811 case FLOW_CNTL_DISABLE:
3a7f8681
FR		 812 MII_REG_BITS_OFF(ADVERTISE_PAUSE_CAP, MII_ADVERTISE, vptr->mac_regs);
813 MII_REG_BITS_OFF(ADVERTISE_PAUSE_ASYM, MII_ADVERTISE, vptr->mac_regs);
2cf71d2e
DJ		 814 break;
815 default:
816 break;
817 }
818}
1da177e4 819
2cf71d2e
DJ		 820/**
821 * mii_set_auto_on - autonegotiate on
822 * @vptr: velocity
823 *
824 * Enable autonegotation on this interface
825 */
826static void mii_set_auto_on(struct velocity_info *vptr)
827{
3a7f8681
FR		 828 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs))
829 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
2cf71d2e 830 else
3a7f8681 831 MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs);
2cf71d2e 832}
1da177e4 833
2cf71d2e
DJ		 834static u32 check_connection_type(struct mac_regs __iomem *regs)
835{
836 u32 status = 0;
837 u8 PHYSR0;
838 u16 ANAR;
839 PHYSR0 = readb(&regs->PHYSR0);
1da177e4 840
2cf71d2e
DJ		 841 /*
842 if (!(PHYSR0 & PHYSR0_LINKGD))
843 status|=VELOCITY_LINK_FAIL;
844 */
1da177e4 845
2cf71d2e
DJ		 846 if (PHYSR0 & PHYSR0_FDPX)
847 status |= VELOCITY_DUPLEX_FULL;
1da177e4 848
2cf71d2e
DJ		 849 if (PHYSR0 & PHYSR0_SPDG)
850 status |= VELOCITY_SPEED_1000;
851 else if (PHYSR0 & PHYSR0_SPD10)
852 status |= VELOCITY_SPEED_10;
853 else
854 status |= VELOCITY_SPEED_100;
1da177e4 855
3a7f8681
FR		 856 if (MII_REG_BITS_IS_ON(BMCR_ANENABLE, MII_BMCR, regs)) {
857 velocity_mii_read(regs, MII_ADVERTISE, &ANAR);
858 if ((ANAR & (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF))
859 == (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF)) {
860 if (MII_REG_BITS_IS_ON(ADVERTISE_1000HALF | ADVERTISE_1000FULL, MII_CTRL1000, regs))
2cf71d2e
DJ		 861 status |= VELOCITY_AUTONEG_ENABLE;
862 }
1da177e4
LT		 863 }
864
2cf71d2e
DJ		 865 return status;
866}
1da177e4 867
2cf71d2e
DJ		 868/**
869 * velocity_set_media_mode - set media mode
870 * @mii_status: old MII link state
871 *
872 * Check the media link state and configure the flow control
873 * PHY and also velocity hardware setup accordingly. In particular
874 * we need to set up CD polling and frame bursting.
875 */
876static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
877{
878 u32 curr_status;
879 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4 880
2cf71d2e
DJ		 881 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
882 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
07b5f6a6 883
2cf71d2e
DJ		 884 /* Set mii link status */
885 set_mii_flow_control(vptr);
1da177e4 886
6aa20a22 887 /*
a34f0b31 888 Check if new status is consistent with current status
8e95a202
JP		 889 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE) ||
890 (mii_status==curr_status)) {
2cf71d2e
DJ		 891 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
892 vptr->mii_status=check_connection_type(vptr->mac_regs);
893 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
894 return 0;
895 }
1da177e4 896 */
6aa20a22 897
2cf71d2e 898 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3a7f8681 899 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
1da177e4
LT		 900
901 /*
2cf71d2e 902 * If connection type is AUTO
1da177e4 903 */
2cf71d2e
DJ		 904 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
905 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
906 /* clear force MAC mode bit */
907 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
908 /* set duplex mode of MAC according to duplex mode of MII */
3a7f8681
FR		 909 MII_REG_BITS_ON(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF, MII_ADVERTISE, vptr->mac_regs);
910 MII_REG_BITS_ON(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
911 MII_REG_BITS_ON(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs);
6aa20a22 912
2cf71d2e
DJ		 913 /* enable AUTO-NEGO mode */
914 mii_set_auto_on(vptr);
915 } else {
15419227 916 u16 CTRL1000;
2cf71d2e
DJ		 917 u16 ANAR;
918 u8 CHIPGCR;
1da177e4 919
2cf71d2e
DJ		 920 /*
921 * 1. if it's 3119, disable frame bursting in halfduplex mode
922 * and enable it in fullduplex mode
923 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
924 * 3. only enable CD heart beat counter in 10HD mode
925 */
1da177e4 926
2cf71d2e
DJ		 927 /* set force MAC mode bit */
928 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
1da177e4 929
2cf71d2e 930 CHIPGCR = readb(&regs->CHIPGCR);
15419227 931
932 if (mii_status & VELOCITY_SPEED_1000)
933 CHIPGCR |= CHIPGCR_FCGMII;
934 else
935 CHIPGCR &= ~CHIPGCR_FCGMII;
501e4d24 936
2cf71d2e
DJ		 937 if (mii_status & VELOCITY_DUPLEX_FULL) {
938 CHIPGCR |= CHIPGCR_FCFDX;
939 writeb(CHIPGCR, &regs->CHIPGCR);
940 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
941 if (vptr->rev_id < REV_ID_VT3216_A0)
942 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
943 } else {
944 CHIPGCR &= ~CHIPGCR_FCFDX;
945 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
946 writeb(CHIPGCR, &regs->CHIPGCR);
947 if (vptr->rev_id < REV_ID_VT3216_A0)
948 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
949 }
1da177e4 950
15419227 951 velocity_mii_read(vptr->mac_regs, MII_CTRL1000, &CTRL1000);
952 CTRL1000 &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
953 if ((mii_status & VELOCITY_SPEED_1000) &&
954 (mii_status & VELOCITY_DUPLEX_FULL)) {
955 CTRL1000 |= ADVERTISE_1000FULL;
956 }
957 velocity_mii_write(vptr->mac_regs, MII_CTRL1000, CTRL1000);
1da177e4 958
2cf71d2e
DJ		 959 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10))
960 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
961 else
962 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1da177e4 963
3a7f8681
FR		 964 /* MII_REG_BITS_OFF(BMCR_SPEED1000, MII_BMCR, vptr->mac_regs); */
965 velocity_mii_read(vptr->mac_regs, MII_ADVERTISE, &ANAR);
966 ANAR &= (~(ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10FULL | ADVERTISE_10HALF));
2cf71d2e
DJ		 967 if (mii_status & VELOCITY_SPEED_100) {
968 if (mii_status & VELOCITY_DUPLEX_FULL)
3a7f8681 969 ANAR |= ADVERTISE_100FULL;
2cf71d2e 970 else
3a7f8681 971 ANAR |= ADVERTISE_100HALF;
15419227 972 } else if (mii_status & VELOCITY_SPEED_10) {
2cf71d2e 973 if (mii_status & VELOCITY_DUPLEX_FULL)
3a7f8681 974 ANAR |= ADVERTISE_10FULL;
2cf71d2e 975 else
3a7f8681 976 ANAR |= ADVERTISE_10HALF;
2cf71d2e 977 }
3a7f8681 978 velocity_mii_write(vptr->mac_regs, MII_ADVERTISE, ANAR);
2cf71d2e
DJ		 979 /* enable AUTO-NEGO mode */
980 mii_set_auto_on(vptr);
3a7f8681 981 /* MII_REG_BITS_ON(BMCR_ANENABLE, MII_BMCR, vptr->mac_regs); */
d3b238a0 982 }
2cf71d2e
DJ		 983 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
984 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
985 return VELOCITY_LINK_CHANGE;
986}
8a22dddb 987
2cf71d2e
DJ		 988/**
989 * velocity_print_link_status - link status reporting
990 * @vptr: velocity to report on
991 *
992 * Turn the link status of the velocity card into a kernel log
993 * description of the new link state, detailing speed and duplex
994 * status
995 */
996static void velocity_print_link_status(struct velocity_info *vptr)
997{
6aa20a22 998
2cf71d2e 999 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
a9683c94 1000 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->netdev->name);
2cf71d2e 1001 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
a9683c94 1002 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->netdev->name);
6aa20a22 1003
2cf71d2e
DJ		 1004 if (vptr->mii_status & VELOCITY_SPEED_1000)
1005 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1006 else if (vptr->mii_status & VELOCITY_SPEED_100)
1007 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1008 else
1009 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1da177e4 1010
2cf71d2e
DJ		 1011 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1012 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1013 else
1014 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1015 } else {
a9683c94 1016 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->netdev->name);
2cf71d2e 1017 switch (vptr->options.spd_dpx) {
15419227 1018 case SPD_DPX_1000_FULL:
1019 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps full duplex\n");
1020 break;
2cf71d2e
DJ		 1021 case SPD_DPX_100_HALF:
1022 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1023 break;
1024 case SPD_DPX_100_FULL:
1025 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1026 break;
1027 case SPD_DPX_10_HALF:
1028 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1029 break;
1030 case SPD_DPX_10_FULL:
1031 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1032 break;
1033 default:
1034 break;
1035 }
1da177e4 1036 }
1da177e4
LT		 1037}
1038
1039/**
2cf71d2e
DJ		 1040 * enable_flow_control_ability - flow control
1041 * @vptr: veloity to configure
1da177e4 1042 *
2cf71d2e
DJ		 1043 * Set up flow control according to the flow control options
1044 * determined by the eeprom/configuration.
1da177e4 1045 */
2cf71d2e 1046static void enable_flow_control_ability(struct velocity_info *vptr)
1da177e4 1047{
1da177e4 1048
2cf71d2e 1049 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4 1050
2cf71d2e 1051 switch (vptr->options.flow_cntl) {
1da177e4 1052
2cf71d2e
DJ		 1053 case FLOW_CNTL_DEFAULT:
1054 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
1055 writel(CR0_FDXRFCEN, &regs->CR0Set);
1056 else
1057 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1058
1059 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
1060 writel(CR0_FDXTFCEN, &regs->CR0Set);
1061 else
1062 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1063 break;
1064
1065 case FLOW_CNTL_TX:
1066 writel(CR0_FDXTFCEN, &regs->CR0Set);
1067 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1068 break;
1069
1070 case FLOW_CNTL_RX:
1071 writel(CR0_FDXRFCEN, &regs->CR0Set);
1072 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1073 break;
1074
1075 case FLOW_CNTL_TX_RX:
1076 writel(CR0_FDXTFCEN, &regs->CR0Set);
1077 writel(CR0_FDXRFCEN, &regs->CR0Set);
1078 break;
1079
1080 case FLOW_CNTL_DISABLE:
1081 writel(CR0_FDXRFCEN, &regs->CR0Clr);
1082 writel(CR0_FDXTFCEN, &regs->CR0Clr);
1083 break;
1084
1085 default:
1086 break;
1087 }
1da177e4 1088
1da177e4
LT		 1089}
1090
1091/**
2cf71d2e
DJ		 1092 * velocity_soft_reset - soft reset
1093 * @vptr: velocity to reset
1da177e4 1094 *
2cf71d2e
DJ		 1095 * Kick off a soft reset of the velocity adapter and then poll
1096 * until the reset sequence has completed before returning.
1da177e4 1097 */
2cf71d2e 1098static int velocity_soft_reset(struct velocity_info *vptr)
1da177e4 1099{
2cf71d2e
DJ		 1100 struct mac_regs __iomem *regs = vptr->mac_regs;
1101 int i = 0;
6aa20a22 1102
2cf71d2e 1103 writel(CR0_SFRST, &regs->CR0Set);
1da177e4 1104
2cf71d2e
DJ		 1105 for (i = 0; i < W_MAX_TIMEOUT; i++) {
1106 udelay(5);
1107 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
1108 break;
1da177e4
LT		 1109 }
1110
2cf71d2e
DJ		 1111 if (i == W_MAX_TIMEOUT) {
1112 writel(CR0_FORSRST, &regs->CR0Set);
1113 /* FIXME: PCI POSTING */
1114 /* delay 2ms */
1115 mdelay(2);
1da177e4 1116 }
1da177e4
LT		 1117 return 0;
1118}
1119
1120/**
2cf71d2e
DJ		 1121 * velocity_set_multi - filter list change callback
1122 * @dev: network device
1da177e4 1123 *
2cf71d2e
DJ		 1124 * Called by the network layer when the filter lists need to change
1125 * for a velocity adapter. Reload the CAMs with the new address
1126 * filter ruleset.
1da177e4 1127 */
2cf71d2e 1128static void velocity_set_multi(struct net_device *dev)
1da177e4 1129{
2cf71d2e 1130 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 1131 struct mac_regs __iomem *regs = vptr->mac_regs;
2cf71d2e
DJ		 1132 u8 rx_mode;
1133 int i;
22bedad3 1134 struct netdev_hw_addr *ha;
1da177e4 1135
2cf71d2e
DJ		 1136 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1137 writel(0xffffffff, &regs->MARCAM[0]);
1138 writel(0xffffffff, &regs->MARCAM[4]);
1139 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
4cd24eaf 1140 } else if ((netdev_mc_count(dev) > vptr->multicast_limit) ||
8e95a202 1141 (dev->flags & IFF_ALLMULTI)) {
2cf71d2e
DJ		 1142 writel(0xffffffff, &regs->MARCAM[0]);
1143 writel(0xffffffff, &regs->MARCAM[4]);
1144 rx_mode = (RCR_AM | RCR_AB);
1145 } else {
1146 int offset = MCAM_SIZE - vptr->multicast_limit;
1147 mac_get_cam_mask(regs, vptr->mCAMmask);
1da177e4 1148
567ec874 1149 i = 0;
22bedad3
JP		 1150 netdev_for_each_mc_addr(ha, dev) {
1151 mac_set_cam(regs, i + offset, ha->addr);
2cf71d2e 1152 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
567ec874 1153 i++;
1da177e4 1154 }
1da177e4 1155
2cf71d2e
DJ		 1156 mac_set_cam_mask(regs, vptr->mCAMmask);
1157 rx_mode = RCR_AM | RCR_AB | RCR_AP;
1da177e4 1158 }
2cf71d2e
DJ		 1159 if (dev->mtu > 1500)
1160 rx_mode |= RCR_AL;
1da177e4 1161
2cf71d2e 1162 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
1da177e4 1163
9088d9a4
FR		 1164}
1165
2cf71d2e
DJ		 1166/*
1167 * MII access , media link mode setting functions
1da177e4
LT		 1168 */
1169
1da177e4 1170/**
2cf71d2e
DJ		 1171 * mii_init - set up MII
1172 * @vptr: velocity adapter
1173 * @mii_status: links tatus
1da177e4 1174 *
2cf71d2e 1175 * Set up the PHY for the current link state.
1da177e4 1176 */
2cf71d2e 1177static void mii_init(struct velocity_info *vptr, u32 mii_status)
1da177e4 1178{
2cf71d2e 1179 u16 BMCR;
1da177e4 1180
2cf71d2e 1181 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
6dffbe53
TP		 1182 case PHYID_ICPLUS_IP101A:
1183 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP),
1184 MII_ADVERTISE, vptr->mac_regs);
1185 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1186 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION,
1187 vptr->mac_regs);
1188 else
1189 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION,
1190 vptr->mac_regs);
1191 MII_REG_BITS_ON(PLED_LALBE, MII_TPISTATUS, vptr->mac_regs);
1192 break;
2cf71d2e
DJ		 1193 case PHYID_CICADA_CS8201:
1194 /*
1195 * Reset to hardware default
1196 */
3a7f8681 1197 MII_REG_BITS_OFF((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
2cf71d2e
DJ		 1198 /*
1199 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1200 * off it in NWay-forced half mode for NWay-forced v.s.
1201 * legacy-forced issue.
1202 */
1203 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
3a7f8681 1204 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
2cf71d2e 1205 else
3a7f8681 1206 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
2cf71d2e
DJ		 1207 /*
1208 * Turn on Link/Activity LED enable bit for CIS8201
1209 */
3a7f8681 1210 MII_REG_BITS_ON(PLED_LALBE, MII_TPISTATUS, vptr->mac_regs);
2cf71d2e
DJ		 1211 break;
1212 case PHYID_VT3216_32BIT:
1213 case PHYID_VT3216_64BIT:
1214 /*
1215 * Reset to hardware default
1216 */
3a7f8681 1217 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
2cf71d2e
DJ		 1218 /*
1219 * Turn on ECHODIS bit in NWay-forced full mode and turn it
1220 * off it in NWay-forced half mode for NWay-forced v.s.
1221 * legacy-forced issue
1222 */
1223 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
3a7f8681 1224 MII_REG_BITS_ON(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
2cf71d2e 1225 else
3a7f8681 1226 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_SREVISION, vptr->mac_regs);
2cf71d2e 1227 break;
1da177e4 1228
2cf71d2e
DJ		 1229 case PHYID_MARVELL_1000:
1230 case PHYID_MARVELL_1000S:
1231 /*
1232 * Assert CRS on Transmit
1233 */
1234 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
1235 /*
1236 * Reset to hardware default
1237 */
3a7f8681 1238 MII_REG_BITS_ON((ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP), MII_ADVERTISE, vptr->mac_regs);
2cf71d2e
DJ		 1239 break;
1240 default:
1241 ;
1242 }
3a7f8681
FR		 1243 velocity_mii_read(vptr->mac_regs, MII_BMCR, &BMCR);
1244 if (BMCR & BMCR_ISOLATE) {
1245 BMCR &= ~BMCR_ISOLATE;
1246 velocity_mii_write(vptr->mac_regs, MII_BMCR, BMCR);
1da177e4 1247 }
1da177e4
LT		 1248}
1249
6dfc4b95
SK		 1250/**
1251 * setup_queue_timers - Setup interrupt timers
1252 *
1253 * Setup interrupt frequency during suppression (timeout if the frame
1254 * count isn't filled).
1255 */
1256static void setup_queue_timers(struct velocity_info *vptr)
1257{
1258 /* Only for newer revisions */
1259 if (vptr->rev_id >= REV_ID_VT3216_A0) {
1260 u8 txqueue_timer = 0;
1261 u8 rxqueue_timer = 0;
1262
1263 if (vptr->mii_status & (VELOCITY_SPEED_1000 |
1264 VELOCITY_SPEED_100)) {
1265 txqueue_timer = vptr->options.txqueue_timer;
1266 rxqueue_timer = vptr->options.rxqueue_timer;
1267 }
1268
1269 writeb(txqueue_timer, &vptr->mac_regs->TQETMR);
1270 writeb(rxqueue_timer, &vptr->mac_regs->RQETMR);
1271 }
1272}
5ae297b0 1273
6dfc4b95
SK		 1274/**
1275 * setup_adaptive_interrupts - Setup interrupt suppression
1276 *
1277 * @vptr velocity adapter
1278 *
1279 * The velocity is able to suppress interrupt during high interrupt load.
1280 * This function turns on that feature.
1281 */
1282static void setup_adaptive_interrupts(struct velocity_info *vptr)
1283{
1284 struct mac_regs __iomem *regs = vptr->mac_regs;
1285 u16 tx_intsup = vptr->options.tx_intsup;
1286 u16 rx_intsup = vptr->options.rx_intsup;
1287
1288 /* Setup default interrupt mask (will be changed below) */
1289 vptr->int_mask = INT_MASK_DEF;
1290
1291 /* Set Tx Interrupt Suppression Threshold */
1292 writeb(CAMCR_PS0, &regs->CAMCR);
1293 if (tx_intsup != 0) {
1294 vptr->int_mask &= ~(ISR_PTXI | ISR_PTX0I | ISR_PTX1I |
1295 ISR_PTX2I | ISR_PTX3I);
1296 writew(tx_intsup, &regs->ISRCTL);
1297 } else
1298 writew(ISRCTL_TSUPDIS, &regs->ISRCTL);
1299
1300 /* Set Rx Interrupt Suppression Threshold */
1301 writeb(CAMCR_PS1, &regs->CAMCR);
1302 if (rx_intsup != 0) {
1303 vptr->int_mask &= ~ISR_PRXI;
1304 writew(rx_intsup, &regs->ISRCTL);
1305 } else
1306 writew(ISRCTL_RSUPDIS, &regs->ISRCTL);
1307
1308 /* Select page to interrupt hold timer */
1309 writeb(0, &regs->CAMCR);
1310}
2cf71d2e 1311
1da177e4 1312/**
2cf71d2e
DJ		 1313 * velocity_init_registers - initialise MAC registers
1314 * @vptr: velocity to init
1315 * @type: type of initialisation (hot or cold)
1da177e4 1316 *
2cf71d2e
DJ		 1317 * Initialise the MAC on a reset or on first set up on the
1318 * hardware.
1da177e4 1319 */
2cf71d2e
DJ		 1320static void velocity_init_registers(struct velocity_info *vptr,
1321 enum velocity_init_type type)
1da177e4 1322{
2cf71d2e 1323 struct mac_regs __iomem *regs = vptr->mac_regs;
6dffbe53 1324 struct net_device *netdev = vptr->netdev;
2cf71d2e 1325 int i, mii_status;
1da177e4 1326
2cf71d2e 1327 mac_wol_reset(regs);
1da177e4 1328
2cf71d2e
DJ		 1329 switch (type) {
1330 case VELOCITY_INIT_RESET:
1331 case VELOCITY_INIT_WOL:
1da177e4 1332
6dffbe53 1333 netif_stop_queue(netdev);
6aa20a22 1334
2cf71d2e
DJ		 1335 /*
1336 * Reset RX to prevent RX pointer not on the 4X location
1337 */
1338 velocity_rx_reset(vptr);
1339 mac_rx_queue_run(regs);
1340 mac_rx_queue_wake(regs);
6aa20a22 1341
2cf71d2e
DJ		 1342 mii_status = velocity_get_opt_media_mode(vptr);
1343 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1344 velocity_print_link_status(vptr);
1345 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
6dffbe53 1346 netif_wake_queue(netdev);
1da177e4 1347 }
1da177e4 1348
2cf71d2e 1349 enable_flow_control_ability(vptr);
1da177e4 1350
2cf71d2e
DJ		 1351 mac_clear_isr(regs);
1352 writel(CR0_STOP, &regs->CR0Clr);
1353 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1354 &regs->CR0Set);
6aa20a22 1355
2cf71d2e 1356 break;
1da177e4 1357
2cf71d2e
DJ		 1358 case VELOCITY_INIT_COLD:
1359 default:
1360 /*
1361 * Do reset
1362 */
1363 velocity_soft_reset(vptr);
1364 mdelay(5);
1da177e4 1365
6dffbe53
TP		 1366 if (!vptr->no_eeprom) {
1367 mac_eeprom_reload(regs);
1368 for (i = 0; i < 6; i++)
1369 writeb(netdev->dev_addr[i], regs->PAR + i);
1370 }
1da177e4 1371
2cf71d2e
DJ		 1372 /*
1373 * clear Pre_ACPI bit.
1374 */
1375 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
1376 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
1377 mac_set_dma_length(regs, vptr->options.DMA_length);
1da177e4 1378
2cf71d2e
DJ		 1379 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
1380 /*
1381 * Back off algorithm use original IEEE standard
1382 */
1383 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
1da177e4
LT		 1384
1385 /*
2cf71d2e 1386 * Init CAM filter
1da177e4 1387 */
2cf71d2e 1388 velocity_init_cam_filter(vptr);
1da177e4 1389
2cf71d2e
DJ		 1390 /*
1391 * Set packet filter: Receive directed and broadcast address
1392 */
6dffbe53 1393 velocity_set_multi(netdev);
1da177e4 1394
2cf71d2e
DJ		 1395 /*
1396 * Enable MII auto-polling
1397 */
1398 enable_mii_autopoll(regs);
1da177e4 1399
6dfc4b95 1400 setup_adaptive_interrupts(vptr);
1da177e4 1401
2cf71d2e
DJ		 1402 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1403 writew(vptr->options.numrx - 1, &regs->RDCSize);
1404 mac_rx_queue_run(regs);
1405 mac_rx_queue_wake(regs);
1da177e4 1406
2cf71d2e 1407 writew(vptr->options.numtx - 1, &regs->TDCSize);
1da177e4 1408
2cf71d2e
DJ		 1409 for (i = 0; i < vptr->tx.numq; i++) {
1410 writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
1411 mac_tx_queue_run(regs, i);
1412 }
1da177e4 1413
2cf71d2e 1414 init_flow_control_register(vptr);
6aa20a22 1415
2cf71d2e
DJ		 1416 writel(CR0_STOP, &regs->CR0Clr);
1417 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
1da177e4 1418
2cf71d2e 1419 mii_status = velocity_get_opt_media_mode(vptr);
6dffbe53 1420 netif_stop_queue(netdev);
1da177e4 1421
2cf71d2e 1422 mii_init(vptr, mii_status);
1da177e4 1423
2cf71d2e
DJ		 1424 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
1425 velocity_print_link_status(vptr);
1426 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
6dffbe53 1427 netif_wake_queue(netdev);
1da177e4 1428 }
6aa20a22 1429
2cf71d2e
DJ		 1430 enable_flow_control_ability(vptr);
1431 mac_hw_mibs_init(regs);
1432 mac_write_int_mask(vptr->int_mask, regs);
1433 mac_clear_isr(regs);
1434
1da177e4 1435 }
1da177e4
LT		 1436}
1437
2cf71d2e 1438static void velocity_give_many_rx_descs(struct velocity_info *vptr)
1da177e4 1439{
2cf71d2e
DJ		 1440 struct mac_regs __iomem *regs = vptr->mac_regs;
1441 int avail, dirty, unusable;
1442
1443 /*
1444 * RD number must be equal to 4X per hardware spec
1445 * (programming guide rev 1.20, p.13)
1446 */
1447 if (vptr->rx.filled < 4)
1448 return;
1449
1450 wmb();
1451
1452 unusable = vptr->rx.filled & 0x0003;
1453 dirty = vptr->rx.dirty - unusable;
1454 for (avail = vptr->rx.filled & 0xfffc; avail; avail--) {
1455 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
1456 vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1da177e4 1457 }
2cf71d2e
DJ		 1458
1459 writew(vptr->rx.filled & 0xfffc, &regs->RBRDU);
1460 vptr->rx.filled = unusable;
1da177e4
LT		 1461}
1462
1463/**
2cf71d2e
DJ		 1464 * velocity_init_dma_rings - set up DMA rings
1465 * @vptr: Velocity to set up
6aa20a22 1466 *
2cf71d2e
DJ		 1467 * Allocate PCI mapped DMA rings for the receive and transmit layer
1468 * to use.
1da177e4 1469 */
2cf71d2e 1470static int velocity_init_dma_rings(struct velocity_info *vptr)
1da177e4 1471{
2cf71d2e
DJ		 1472 struct velocity_opt *opt = &vptr->options;
1473 const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
1474 const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
2cf71d2e
DJ		 1475 dma_addr_t pool_dma;
1476 void *pool;
1477 unsigned int i;
1da177e4
LT		 1478
1479 /*
2cf71d2e
DJ		 1480 * Allocate all RD/TD rings a single pool.
1481 *
e2c41f14 1482 * dma_alloc_coherent() fulfills the requirement for 64 bytes
2cf71d2e 1483 * alignment
1da177e4 1484 */
e2c41f14
TP		 1485 pool = dma_alloc_coherent(vptr->dev, tx_ring_size * vptr->tx.numq +
1486 rx_ring_size, &pool_dma, GFP_ATOMIC);
2cf71d2e 1487 if (!pool) {
e2c41f14 1488 dev_err(vptr->dev, "%s : DMA memory allocation failed.\n",
a9683c94 1489 vptr->netdev->name);
2cf71d2e 1490 return -ENOMEM;
1da177e4
LT		 1491 }
1492
2cf71d2e
DJ		 1493 vptr->rx.ring = pool;
1494 vptr->rx.pool_dma = pool_dma;
1da177e4 1495
2cf71d2e
DJ		 1496 pool += rx_ring_size;
1497 pool_dma += rx_ring_size;
d4f73c8e 1498
2cf71d2e
DJ		 1499 for (i = 0; i < vptr->tx.numq; i++) {
1500 vptr->tx.rings[i] = pool;
1501 vptr->tx.pool_dma[i] = pool_dma;
1502 pool += tx_ring_size;
1503 pool_dma += tx_ring_size;
1504 }
1da177e4
LT		 1505
1506 return 0;
1507}
1508
2cf71d2e
DJ		 1509static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
1510{
1511 vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
1512}
1513
1da177e4
LT		 1514/**
1515 * velocity_alloc_rx_buf - allocate aligned receive buffer
1516 * @vptr: velocity
1517 * @idx: ring index
1518 *
1519 * Allocate a new full sized buffer for the reception of a frame and
1520 * map it into PCI space for the hardware to use. The hardware
1521 * requires *64* byte alignment of the buffer which makes life
1522 * less fun than would be ideal.
1523 */
1da177e4
LT		 1524static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1525{
0fe9f15e
FR		 1526 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1527 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1da177e4 1528
a9683c94 1529 rd_info->skb = netdev_alloc_skb(vptr->netdev, vptr->rx.buf_sz + 64);
1da177e4
LT		 1530 if (rd_info->skb == NULL)
1531 return -ENOMEM;
1532
1533 /*
1534 * Do the gymnastics to get the buffer head for data at
1535 * 64byte alignment.
1536 */
da95b2d4
SK		 1537 skb_reserve(rd_info->skb,
1538 64 - ((unsigned long) rd_info->skb->data & 63));
e2c41f14
TP		 1539 rd_info->skb_dma = dma_map_single(vptr->dev, rd_info->skb->data,
1540 vptr->rx.buf_sz, DMA_FROM_DEVICE);
6aa20a22 1541
1da177e4
LT		 1542 /*
1543 * Fill in the descriptor to match
0fe9f15e 1544 */
6aa20a22 1545
1da177e4 1546 *((u32 *) & (rd->rdesc0)) = 0;
0fe9f15e 1547 rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN;
1da177e4
LT		 1548 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1549 rd->pa_high = 0;
1550 return 0;
1551}
1552
6aa20a22 1553
2cf71d2e 1554static int velocity_rx_refill(struct velocity_info *vptr)
1da177e4 1555{
2cf71d2e 1556 int dirty = vptr->rx.dirty, done = 0;
1da177e4 1557
2cf71d2e
DJ		 1558 do {
1559 struct rx_desc *rd = vptr->rx.ring + dirty;
1da177e4 1560
2cf71d2e
DJ		 1561 /* Fine for an all zero Rx desc at init time as well */
1562 if (rd->rdesc0.len & OWNED_BY_NIC)
1563 break;
1da177e4 1564
2cf71d2e
DJ		 1565 if (!vptr->rx.info[dirty].skb) {
1566 if (velocity_alloc_rx_buf(vptr, dirty) < 0)
1da177e4 1567 break;
1da177e4 1568 }
2cf71d2e
DJ		 1569 done++;
1570 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
1571 } while (dirty != vptr->rx.curr);
1da177e4 1572
2cf71d2e
DJ		 1573 if (done) {
1574 vptr->rx.dirty = dirty;
1575 vptr->rx.filled += done;
1da177e4 1576 }
2cf71d2e
DJ		 1577
1578 return done;
1da177e4
LT		 1579}
1580
1581/**
2cf71d2e
DJ		 1582 * velocity_free_rd_ring - free receive ring
1583 * @vptr: velocity to clean up
1da177e4 1584 *
2cf71d2e
DJ		 1585 * Free the receive buffers for each ring slot and any
1586 * attached socket buffers that need to go away.
1da177e4 1587 */
2cf71d2e 1588static void velocity_free_rd_ring(struct velocity_info *vptr)
1da177e4 1589{
2cf71d2e 1590 int i;
1da177e4 1591
2cf71d2e
DJ		 1592 if (vptr->rx.info == NULL)
1593 return;
6aa20a22 1594
2cf71d2e
DJ		 1595 for (i = 0; i < vptr->options.numrx; i++) {
1596 struct velocity_rd_info *rd_info = &(vptr->rx.info[i]);
1597 struct rx_desc *rd = vptr->rx.ring + i;
1da177e4 1598
2cf71d2e 1599 memset(rd, 0, sizeof(*rd));
1da177e4 1600
2cf71d2e
DJ		 1601 if (!rd_info->skb)
1602 continue;
e2c41f14
TP		 1603 dma_unmap_single(vptr->dev, rd_info->skb_dma, vptr->rx.buf_sz,
1604 DMA_FROM_DEVICE);
2cf71d2e 1605 rd_info->skb_dma = 0;
6aa20a22 1606
2cf71d2e
DJ		 1607 dev_kfree_skb(rd_info->skb);
1608 rd_info->skb = NULL;
1da177e4
LT		 1609 }
1610
2cf71d2e
DJ		 1611 kfree(vptr->rx.info);
1612 vptr->rx.info = NULL;
1613}
1da177e4 1614
2cf71d2e
DJ		 1615/**
1616 * velocity_init_rd_ring - set up receive ring
1617 * @vptr: velocity to configure
1618 *
1619 * Allocate and set up the receive buffers for each ring slot and
1620 * assign them to the network adapter.
1621 */
1622static int velocity_init_rd_ring(struct velocity_info *vptr)
1623{
1624 int ret = -ENOMEM;
1da177e4 1625
2cf71d2e
DJ		 1626 vptr->rx.info = kcalloc(vptr->options.numrx,
1627 sizeof(struct velocity_rd_info), GFP_KERNEL);
1628 if (!vptr->rx.info)
1629 goto out;
6aa20a22 1630
2cf71d2e 1631 velocity_init_rx_ring_indexes(vptr);
1da177e4 1632
2cf71d2e
DJ		 1633 if (velocity_rx_refill(vptr) != vptr->options.numrx) {
1634 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
a9683c94 1635 "%s: failed to allocate RX buffer.\n", vptr->netdev->name);
2cf71d2e
DJ		 1636 velocity_free_rd_ring(vptr);
1637 goto out;
1638 }
1da177e4 1639
2cf71d2e
DJ		 1640 ret = 0;
1641out:
1642 return ret;
1da177e4
LT		 1643}
1644
1645/**
2cf71d2e
DJ		 1646 * velocity_init_td_ring - set up transmit ring
1647 * @vptr: velocity
1da177e4 1648 *
2cf71d2e
DJ		 1649 * Set up the transmit ring and chain the ring pointers together.
1650 * Returns zero on success or a negative posix errno code for
1651 * failure.
1da177e4 1652 */
2cf71d2e 1653static int velocity_init_td_ring(struct velocity_info *vptr)
1da177e4 1654{
2cf71d2e 1655 int j;
1da177e4 1656
2cf71d2e
DJ		 1657 /* Init the TD ring entries */
1658 for (j = 0; j < vptr->tx.numq; j++) {
1da177e4 1659
2cf71d2e
DJ		 1660 vptr->tx.infos[j] = kcalloc(vptr->options.numtx,
1661 sizeof(struct velocity_td_info),
1662 GFP_KERNEL);
1663 if (!vptr->tx.infos[j]) {
1664 while (--j >= 0)
1665 kfree(vptr->tx.infos[j]);
1666 return -ENOMEM;
1da177e4 1667 }
2cf71d2e
DJ		 1668
1669 vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0;
1da177e4 1670 }
2cf71d2e
DJ		 1671 return 0;
1672}
1673
1674/**
1675 * velocity_free_dma_rings - free PCI ring pointers
1676 * @vptr: Velocity to free from
1677 *
1678 * Clean up the PCI ring buffers allocated to this velocity.
1679 */
1680static void velocity_free_dma_rings(struct velocity_info *vptr)
1681{
1682 const int size = vptr->options.numrx * sizeof(struct rx_desc) +
1683 vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq;
1684
e2c41f14 1685 dma_free_coherent(vptr->dev, size, vptr->rx.ring, vptr->rx.pool_dma);
1da177e4
LT		 1686}
1687
3c4dc711
FR		 1688static int velocity_init_rings(struct velocity_info *vptr, int mtu)
1689{
1690 int ret;
1691
1692 velocity_set_rxbufsize(vptr, mtu);
1693
1694 ret = velocity_init_dma_rings(vptr);
1695 if (ret < 0)
1696 goto out;
1697
1698 ret = velocity_init_rd_ring(vptr);
1699 if (ret < 0)
1700 goto err_free_dma_rings_0;
1701
1702 ret = velocity_init_td_ring(vptr);
1703 if (ret < 0)
1704 goto err_free_rd_ring_1;
1705out:
1706 return ret;
1707
1708err_free_rd_ring_1:
1709 velocity_free_rd_ring(vptr);
1710err_free_dma_rings_0:
1711 velocity_free_dma_rings(vptr);
1712 goto out;
1713}
1714
1da177e4 1715/**
2cf71d2e
DJ		 1716 * velocity_free_tx_buf - free transmit buffer
1717 * @vptr: velocity
1718 * @tdinfo: buffer
1da177e4 1719 *
2cf71d2e
DJ		 1720 * Release an transmit buffer. If the buffer was preallocated then
1721 * recycle it, if not then unmap the buffer.
1da177e4 1722 */
c79992fd
SK		 1723static void velocity_free_tx_buf(struct velocity_info *vptr,
1724 struct velocity_td_info *tdinfo, struct tx_desc *td)
1da177e4 1725{
2cf71d2e 1726 struct sk_buff *skb = tdinfo->skb;
46dfc23e 1727 int i;
28133176 1728
2cf71d2e
DJ		 1729 /*
1730 * Don't unmap the pre-allocated tx_bufs
1731 */
46dfc23e
CIK		 1732 for (i = 0; i < tdinfo->nskb_dma; i++) {
1733 size_t pktlen = max_t(size_t, skb->len, ETH_ZLEN);
c79992fd 1734
46dfc23e
CIK		 1735 /* For scatter-gather */
1736 if (skb_shinfo(skb)->nr_frags > 0)
1737 pktlen = max_t(size_t, pktlen,
1738 td->td_buf[i].size & ~TD_QUEUE);
c79992fd 1739
46dfc23e
CIK		 1740 dma_unmap_single(vptr->dev, tdinfo->skb_dma[i],
1741 le16_to_cpu(pktlen), DMA_TO_DEVICE);
1da177e4 1742 }
2cf71d2e
DJ		 1743 dev_kfree_skb_irq(skb);
1744 tdinfo->skb = NULL;
1da177e4
LT		 1745}
1746
2cf71d2e
DJ		 1747/*
1748 * FIXME: could we merge this with velocity_free_tx_buf ?
1749 */
1750static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1751 int q, int n)
1da177e4 1752{
2cf71d2e
DJ		 1753 struct velocity_td_info *td_info = &(vptr->tx.infos[q][n]);
1754 int i;
bd7b3f34 1755
2cf71d2e
DJ		 1756 if (td_info == NULL)
1757 return;
3c4dc711 1758
2cf71d2e
DJ		 1759 if (td_info->skb) {
1760 for (i = 0; i < td_info->nskb_dma; i++) {
1761 if (td_info->skb_dma[i]) {
e2c41f14
TP		 1762 dma_unmap_single(vptr->dev, td_info->skb_dma[i],
1763 td_info->skb->len, DMA_TO_DEVICE);
2cf71d2e
DJ		 1764 td_info->skb_dma[i] = 0;
1765 }
3c4dc711 1766 }
2cf71d2e
DJ		 1767 dev_kfree_skb(td_info->skb);
1768 td_info->skb = NULL;
3c4dc711 1769 }
1da177e4
LT		 1770}
1771
1772/**
2cf71d2e
DJ		 1773 * velocity_free_td_ring - free td ring
1774 * @vptr: velocity
1da177e4 1775 *
2cf71d2e
DJ		 1776 * Free up the transmit ring for this particular velocity adapter.
1777 * We free the ring contents but not the ring itself.
1778 */
1779static void velocity_free_td_ring(struct velocity_info *vptr)
1780{
1781 int i, j;
1da177e4 1782
2cf71d2e
DJ		 1783 for (j = 0; j < vptr->tx.numq; j++) {
1784 if (vptr->tx.infos[j] == NULL)
1785 continue;
1786 for (i = 0; i < vptr->options.numtx; i++)
1787 velocity_free_td_ring_entry(vptr, j, i);
6aa20a22 1788
2cf71d2e
DJ		 1789 kfree(vptr->tx.infos[j]);
1790 vptr->tx.infos[j] = NULL;
1791 }
1792}
6aa20a22 1793
2cf71d2e
DJ		 1794static void velocity_free_rings(struct velocity_info *vptr)
1795{
1796 velocity_free_td_ring(vptr);
1797 velocity_free_rd_ring(vptr);
1798 velocity_free_dma_rings(vptr);
1da177e4
LT		 1799}
1800
1801/**
2cf71d2e
DJ		 1802 * velocity_error - handle error from controller
1803 * @vptr: velocity
1804 * @status: card status
1805 *
1806 * Process an error report from the hardware and attempt to recover
1807 * the card itself. At the moment we cannot recover from some
1808 * theoretically impossible errors but this could be fixed using
1809 * the pci_device_failed logic to bounce the hardware
1da177e4 1810 *
1da177e4 1811 */
2cf71d2e 1812static void velocity_error(struct velocity_info *vptr, int status)
1da177e4 1813{
580a6902 1814
2cf71d2e
DJ		 1815 if (status & ISR_TXSTLI) {
1816 struct mac_regs __iomem *regs = vptr->mac_regs;
1da177e4 1817
2cf71d2e
DJ		 1818 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1819 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1820 writew(TRDCSR_RUN, &regs->TDCSRClr);
a9683c94 1821 netif_stop_queue(vptr->netdev);
1da177e4 1822
2cf71d2e
DJ		 1823 /* FIXME: port over the pci_device_failed code and use it
1824 here */
1825 }
1da177e4 1826
2cf71d2e
DJ		 1827 if (status & ISR_SRCI) {
1828 struct mac_regs __iomem *regs = vptr->mac_regs;
1829 int linked;
1da177e4 1830
2cf71d2e
DJ		 1831 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1832 vptr->mii_status = check_connection_type(regs);
1da177e4 1833
2cf71d2e
DJ		 1834 /*
1835 * If it is a 3119, disable frame bursting in
1836 * halfduplex mode and enable it in fullduplex
1837 * mode
1838 */
1839 if (vptr->rev_id < REV_ID_VT3216_A0) {
0527a1a8 1840 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2cf71d2e
DJ		 1841 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1842 else
1843 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1844 }
1845 /*
1846 * Only enable CD heart beat counter in 10HD mode
1847 */
1848 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10))
1849 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1850 else
1851 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
6dfc4b95
SK		 1852
1853 setup_queue_timers(vptr);
2cf71d2e
DJ		 1854 }
1855 /*
1856 * Get link status from PHYSR0
1857 */
1858 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1da177e4 1859
2cf71d2e
DJ		 1860 if (linked) {
1861 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
a9683c94 1862 netif_carrier_on(vptr->netdev);
2cf71d2e
DJ		 1863 } else {
1864 vptr->mii_status |= VELOCITY_LINK_FAIL;
a9683c94 1865 netif_carrier_off(vptr->netdev);
2cf71d2e 1866 }
1da177e4 1867
2cf71d2e
DJ		 1868 velocity_print_link_status(vptr);
1869 enable_flow_control_ability(vptr);
1da177e4 1870
2cf71d2e
DJ		 1871 /*
1872 * Re-enable auto-polling because SRCI will disable
1873 * auto-polling
1874 */
1da177e4 1875
2cf71d2e 1876 enable_mii_autopoll(regs);
1da177e4 1877
2cf71d2e 1878 if (vptr->mii_status & VELOCITY_LINK_FAIL)
a9683c94 1879 netif_stop_queue(vptr->netdev);
2cf71d2e 1880 else
a9683c94 1881 netif_wake_queue(vptr->netdev);
1da177e4 1882
6403eab1 1883 }
2cf71d2e
DJ		 1884 if (status & ISR_MIBFI)
1885 velocity_update_hw_mibs(vptr);
1886 if (status & ISR_LSTEI)
1887 mac_rx_queue_wake(vptr->mac_regs);
1da177e4
LT		 1888}
1889
1890/**
2cf71d2e
DJ		 1891 * tx_srv - transmit interrupt service
1892 * @vptr; Velocity
1da177e4 1893 *
2cf71d2e
DJ		 1894 * Scan the queues looking for transmitted packets that
1895 * we can complete and clean up. Update any statistics as
1896 * necessary/
1da177e4 1897 */
d6cade0f 1898static int velocity_tx_srv(struct velocity_info *vptr)
1da177e4 1899{
2cf71d2e
DJ		 1900 struct tx_desc *td;
1901 int qnum;
1902 int full = 0;
1903 int idx;
1904 int works = 0;
1905 struct velocity_td_info *tdinfo;
a9683c94 1906 struct net_device_stats *stats = &vptr->netdev->stats;
1da177e4 1907
2cf71d2e
DJ		 1908 for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
1909 for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
1910 idx = (idx + 1) % vptr->options.numtx) {
1da177e4 1911
2cf71d2e
DJ		 1912 /*
1913 * Get Tx Descriptor
1914 */
1915 td = &(vptr->tx.rings[qnum][idx]);
1916 tdinfo = &(vptr->tx.infos[qnum][idx]);
1da177e4 1917
2cf71d2e
DJ		 1918 if (td->tdesc0.len & OWNED_BY_NIC)
1919 break;
1da177e4 1920
2cf71d2e
DJ		 1921 if ((works++ > 15))
1922 break;
1923
1924 if (td->tdesc0.TSR & TSR0_TERR) {
1925 stats->tx_errors++;
1926 stats->tx_dropped++;
1927 if (td->tdesc0.TSR & TSR0_CDH)
1928 stats->tx_heartbeat_errors++;
1929 if (td->tdesc0.TSR & TSR0_CRS)
1930 stats->tx_carrier_errors++;
1931 if (td->tdesc0.TSR & TSR0_ABT)
1932 stats->tx_aborted_errors++;
1933 if (td->tdesc0.TSR & TSR0_OWC)
1934 stats->tx_window_errors++;
1935 } else {
1936 stats->tx_packets++;
1937 stats->tx_bytes += tdinfo->skb->len;
1938 }
c79992fd 1939 velocity_free_tx_buf(vptr, tdinfo, td);
2cf71d2e
DJ		 1940 vptr->tx.used[qnum]--;
1941 }
1942 vptr->tx.tail[qnum] = idx;
1da177e4 1943
2cf71d2e
DJ		 1944 if (AVAIL_TD(vptr, qnum) < 1)
1945 full = 1;
1946 }
1da177e4 1947 /*
2cf71d2e
DJ		 1948 * Look to see if we should kick the transmit network
1949 * layer for more work.
1da177e4 1950 */
a9683c94 1951 if (netif_queue_stopped(vptr->netdev) && (full == 0) &&
8e95a202 1952 (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
a9683c94 1953 netif_wake_queue(vptr->netdev);
2cf71d2e
DJ		 1954 }
1955 return works;
1956}
1957
1958/**
1959 * velocity_rx_csum - checksum process
1960 * @rd: receive packet descriptor
1961 * @skb: network layer packet buffer
1962 *
1963 * Process the status bits for the received packet and determine
1964 * if the checksum was computed and verified by the hardware
1965 */
1966static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1967{
bc8acf2c 1968 skb_checksum_none_assert(skb);
6aa20a22 1969
2cf71d2e
DJ		 1970 if (rd->rdesc1.CSM & CSM_IPKT) {
1971 if (rd->rdesc1.CSM & CSM_IPOK) {
1972 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1973 (rd->rdesc1.CSM & CSM_UDPKT)) {
1974 if (!(rd->rdesc1.CSM & CSM_TUPOK))
1975 return;
1976 }
1977 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4
LT		 1978 }
1979 }
1da177e4
LT		 1980}
1981
1da177e4 1982/**
2cf71d2e
DJ		 1983 * velocity_rx_copy - in place Rx copy for small packets
1984 * @rx_skb: network layer packet buffer candidate
1985 * @pkt_size: received data size
1986 * @rd: receive packet descriptor
1da177e4
LT		 1987 * @dev: network device
1988 *
2cf71d2e 1989 * Replace the current skb that is scheduled for Rx processing by a
25985edc 1990 * shorter, immediately allocated skb, if the received packet is small
2cf71d2e
DJ		 1991 * enough. This function returns a negative value if the received
1992 * packet is too big or if memory is exhausted.
1da177e4 1993 */
2cf71d2e
DJ		 1994static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1995 struct velocity_info *vptr)
1da177e4 1996{
2cf71d2e
DJ		 1997 int ret = -1;
1998 if (pkt_size < rx_copybreak) {
1999 struct sk_buff *new_skb;
1da177e4 2000
a9683c94 2001 new_skb = netdev_alloc_skb_ip_align(vptr->netdev, pkt_size);
2cf71d2e
DJ		 2002 if (new_skb) {
2003 new_skb->ip_summed = rx_skb[0]->ip_summed;
2cf71d2e
DJ		 2004 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
2005 *rx_skb = new_skb;
2006 ret = 0;
1da177e4
LT		 2007 }
2008
1da177e4 2009 }
2cf71d2e 2010 return ret;
1da177e4
LT		 2011}
2012
2013/**
2cf71d2e
DJ		 2014 * velocity_iph_realign - IP header alignment
2015 * @vptr: velocity we are handling
2016 * @skb: network layer packet buffer
2017 * @pkt_size: received data size
1da177e4 2018 *
2cf71d2e
DJ		 2019 * Align IP header on a 2 bytes boundary. This behavior can be
2020 * configured by the user.
1da177e4 2021 */
2cf71d2e
DJ		 2022static inline void velocity_iph_realign(struct velocity_info *vptr,
2023 struct sk_buff *skb, int pkt_size)
1da177e4 2024{
2cf71d2e
DJ		 2025 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
2026 memmove(skb->data + 2, skb->data, pkt_size);
2027 skb_reserve(skb, 2);
2028 }
2029}
6aa20a22 2030
2cf71d2e
DJ		 2031/**
2032 * velocity_receive_frame - received packet processor
2033 * @vptr: velocity we are handling
2034 * @idx: ring index
2035 *
2036 * A packet has arrived. We process the packet and if appropriate
2037 * pass the frame up the network stack
2038 */
2039static int velocity_receive_frame(struct velocity_info *vptr, int idx)
2040{
a9683c94 2041 struct net_device_stats *stats = &vptr->netdev->stats;
2cf71d2e
DJ		 2042 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
2043 struct rx_desc *rd = &(vptr->rx.ring[idx]);
2044 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
2045 struct sk_buff *skb;
1da177e4 2046
6c606fa3
TT		 2047 if (unlikely(rd->rdesc0.RSR & (RSR_STP | RSR_EDP | RSR_RL))) {
2048 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP))
2049 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame spans multiple RDs.\n", vptr->netdev->name);
2cf71d2e
DJ		 2050 stats->rx_length_errors++;
2051 return -EINVAL;
2052 }
1da177e4 2053
2cf71d2e
DJ		 2054 if (rd->rdesc0.RSR & RSR_MAR)
2055 stats->multicast++;
1da177e4 2056
2cf71d2e 2057 skb = rd_info->skb;
1da177e4 2058
e2c41f14
TP		 2059 dma_sync_single_for_cpu(vptr->dev, rd_info->skb_dma,
2060 vptr->rx.buf_sz, DMA_FROM_DEVICE);
1da177e4 2061
2cf71d2e 2062 velocity_rx_csum(rd, skb);
6aa20a22 2063
2cf71d2e
DJ		 2064 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
2065 velocity_iph_realign(vptr, skb, pkt_len);
2cf71d2e 2066 rd_info->skb = NULL;
e2c41f14
TP		 2067 dma_unmap_single(vptr->dev, rd_info->skb_dma, vptr->rx.buf_sz,
2068 DMA_FROM_DEVICE);
2069 } else {
2070 dma_sync_single_for_device(vptr->dev, rd_info->skb_dma,
2071 vptr->rx.buf_sz, DMA_FROM_DEVICE);
2cf71d2e 2072 }
6aa20a22 2073
2cf71d2e 2074 skb_put(skb, pkt_len - 4);
a9683c94 2075 skb->protocol = eth_type_trans(skb, vptr->netdev);
2cf71d2e 2076
73b54688
JP		 2077 if (rd->rdesc0.RSR & RSR_DETAG) {
2078 u16 vid = swab16(le16_to_cpu(rd->rdesc1.PQTAG));
2079
86a9bad3 2080 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
73b54688 2081 }
2fdac010 2082 netif_receive_skb(skb);
6aa20a22 2083
2cf71d2e 2084 stats->rx_bytes += pkt_len;
3cb7a798 2085 stats->rx_packets++;
6aa20a22 2086
2cf71d2e 2087 return 0;
1da177e4
LT		 2088}
2089
1da177e4 2090/**
2cf71d2e
DJ		 2091 * velocity_rx_srv - service RX interrupt
2092 * @vptr: velocity
1da177e4 2093 *
2cf71d2e
DJ		 2094 * Walk the receive ring of the velocity adapter and remove
2095 * any received packets from the receive queue. Hand the ring
2096 * slots back to the adapter for reuse.
1da177e4 2097 */
d6cade0f 2098static int velocity_rx_srv(struct velocity_info *vptr, int budget_left)
1da177e4 2099{
a9683c94 2100 struct net_device_stats *stats = &vptr->netdev->stats;
2cf71d2e
DJ		 2101 int rd_curr = vptr->rx.curr;
2102 int works = 0;
2103
dfff7144 2104 while (works < budget_left) {
2cf71d2e
DJ		 2105 struct rx_desc *rd = vptr->rx.ring + rd_curr;
2106
2107 if (!vptr->rx.info[rd_curr].skb)
2108 break;
2109
2110 if (rd->rdesc0.len & OWNED_BY_NIC)
2111 break;
2112
2113 rmb();
1da177e4 2114
2cf71d2e
DJ		 2115 /*
2116 * Don't drop CE or RL error frame although RXOK is off
2117 */
2118 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
2119 if (velocity_receive_frame(vptr, rd_curr) < 0)
2120 stats->rx_dropped++;
2121 } else {
2122 if (rd->rdesc0.RSR & RSR_CRC)
2123 stats->rx_crc_errors++;
2124 if (rd->rdesc0.RSR & RSR_FAE)
2125 stats->rx_frame_errors++;
1da177e4 2126
2cf71d2e
DJ		 2127 stats->rx_dropped++;
2128 }
6aa20a22 2129
2cf71d2e 2130 rd->size |= RX_INTEN;
1da177e4 2131
2cf71d2e
DJ		 2132 rd_curr++;
2133 if (rd_curr >= vptr->options.numrx)
2134 rd_curr = 0;
dfff7144
SK		 2135 works++;
2136 }
1da177e4 2137
2cf71d2e 2138 vptr->rx.curr = rd_curr;
1da177e4 2139
2cf71d2e
DJ		 2140 if ((works > 0) && (velocity_rx_refill(vptr) > 0))
2141 velocity_give_many_rx_descs(vptr);
2142
2143 VAR_USED(stats);
2144 return works;
2145}
6aa20a22 2146
dfff7144
SK		 2147static int velocity_poll(struct napi_struct *napi, int budget)
2148{
2149 struct velocity_info *vptr = container_of(napi,
2150 struct velocity_info, napi);
2151 unsigned int rx_done;
3f2e8d9f 2152 unsigned long flags;
dfff7144
SK		 2153
2154 /*
2155 * Do rx and tx twice for performance (taken from the VIA
2156 * out-of-tree driver).
2157 */
bc9627e7 2158 rx_done = velocity_rx_srv(vptr, budget);
2159 spin_lock_irqsave(&vptr->lock, flags);
d6cade0f 2160 velocity_tx_srv(vptr);
dfff7144
SK		 2161 /* If budget not fully consumed, exit the polling mode */
2162 if (rx_done < budget) {
2163 napi_complete(napi);
2164 mac_enable_int(vptr->mac_regs);
2165 }
3f2e8d9f 2166 spin_unlock_irqrestore(&vptr->lock, flags);
dfff7144
SK		 2167
2168 return rx_done;
2169}
6aa20a22 2170
1da177e4 2171/**
2cf71d2e
DJ		 2172 * velocity_intr - interrupt callback
2173 * @irq: interrupt number
2174 * @dev_instance: interrupting device
1da177e4 2175 *
2cf71d2e
DJ		 2176 * Called whenever an interrupt is generated by the velocity
2177 * adapter IRQ line. We may not be the source of the interrupt
2178 * and need to identify initially if we are, and if not exit as
2179 * efficiently as possible.
1da177e4 2180 */
2cf71d2e 2181static irqreturn_t velocity_intr(int irq, void *dev_instance)
1da177e4 2182{
2cf71d2e
DJ		 2183 struct net_device *dev = dev_instance;
2184 struct velocity_info *vptr = netdev_priv(dev);
2185 u32 isr_status;
1da177e4 2186
2cf71d2e
DJ		 2187 spin_lock(&vptr->lock);
2188 isr_status = mac_read_isr(vptr->mac_regs);
2189
2190 /* Not us ? */
2191 if (isr_status == 0) {
2192 spin_unlock(&vptr->lock);
2193 return IRQ_NONE;
1da177e4 2194 }
1da177e4 2195
3f2e8d9f
SK		 2196 /* Ack the interrupt */
2197 mac_write_isr(vptr->mac_regs, isr_status);
2198
dfff7144
SK		 2199 if (likely(napi_schedule_prep(&vptr->napi))) {
2200 mac_disable_int(vptr->mac_regs);
2201 __napi_schedule(&vptr->napi);
1da177e4 2202 }
3f2e8d9f
SK		 2203
2204 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2205 velocity_error(vptr, isr_status);
2206
2cf71d2e 2207 spin_unlock(&vptr->lock);
2cf71d2e 2208
dfff7144 2209 return IRQ_HANDLED;
1da177e4
LT		 2210}
2211
2212/**
2cf71d2e
DJ		 2213 * velocity_open - interface activation callback
2214 * @dev: network layer device to open
1da177e4 2215 *
2cf71d2e
DJ		 2216 * Called when the network layer brings the interface up. Returns
2217 * a negative posix error code on failure, or zero on success.
2218 *
2219 * All the ring allocation and set up is done on open for this
2220 * adapter to minimise memory usage when inactive
1da177e4 2221 */
2cf71d2e 2222static int velocity_open(struct net_device *dev)
1da177e4 2223{
2cf71d2e
DJ		 2224 struct velocity_info *vptr = netdev_priv(dev);
2225 int ret;
1da177e4 2226
2cf71d2e
DJ		 2227 ret = velocity_init_rings(vptr, dev->mtu);
2228 if (ret < 0)
2229 goto out;
1da177e4 2230
2cf71d2e 2231 /* Ensure chip is running */
6dffbe53 2232 velocity_set_power_state(vptr, PCI_D0);
1da177e4 2233
2cf71d2e
DJ		 2234 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2235
6dffbe53 2236 ret = request_irq(dev->irq, velocity_intr, IRQF_SHARED,
2cf71d2e
DJ		 2237 dev->name, dev);
2238 if (ret < 0) {
2239 /* Power down the chip */
6dffbe53 2240 velocity_set_power_state(vptr, PCI_D3hot);
2cf71d2e
DJ		 2241 velocity_free_rings(vptr);
2242 goto out;
1da177e4
LT		 2243 }
2244
35bb5cad
BH		 2245 velocity_give_many_rx_descs(vptr);
2246
2cf71d2e
DJ		 2247 mac_enable_int(vptr->mac_regs);
2248 netif_start_queue(dev);
dfff7144 2249 napi_enable(&vptr->napi);
2cf71d2e
DJ		 2250 vptr->flags |= VELOCITY_FLAGS_OPENED;
2251out:
2252 return ret;
1da177e4
LT		 2253}
2254
2255/**
2cf71d2e
DJ		 2256 * velocity_shutdown - shut down the chip
2257 * @vptr: velocity to deactivate
1da177e4 2258 *
2cf71d2e
DJ		 2259 * Shuts down the internal operations of the velocity and
2260 * disables interrupts, autopolling, transmit and receive
1da177e4 2261 */
2cf71d2e 2262static void velocity_shutdown(struct velocity_info *vptr)
1da177e4 2263{
2cf71d2e
DJ		 2264 struct mac_regs __iomem *regs = vptr->mac_regs;
2265 mac_disable_int(regs);
2266 writel(CR0_STOP, &regs->CR0Set);
2267 writew(0xFFFF, &regs->TDCSRClr);
2268 writeb(0xFF, &regs->RDCSRClr);
1da177e4 2269 safe_disable_mii_autopoll(regs);
2cf71d2e
DJ		 2270 mac_clear_isr(regs);
2271}
1da177e4 2272
2cf71d2e
DJ		 2273/**
2274 * velocity_change_mtu - MTU change callback
2275 * @dev: network device
2276 * @new_mtu: desired MTU
2277 *
2278 * Handle requests from the networking layer for MTU change on
2279 * this interface. It gets called on a change by the network layer.
2280 * Return zero for success or negative posix error code.
2281 */
2282static int velocity_change_mtu(struct net_device *dev, int new_mtu)
2283{
2284 struct velocity_info *vptr = netdev_priv(dev);
2285 int ret = 0;
1da177e4 2286
2cf71d2e
DJ		 2287 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
2288 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
a9683c94 2289 vptr->netdev->name);
2cf71d2e
DJ		 2290 ret = -EINVAL;
2291 goto out_0;
2292 }
1da177e4 2293
2cf71d2e
DJ		 2294 if (!netif_running(dev)) {
2295 dev->mtu = new_mtu;
2296 goto out_0;
1da177e4
LT		 2297 }
2298
2cf71d2e
DJ		 2299 if (dev->mtu != new_mtu) {
2300 struct velocity_info *tmp_vptr;
2301 unsigned long flags;
2302 struct rx_info rx;
2303 struct tx_info tx;
1da177e4 2304
2cf71d2e
DJ		 2305 tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL);
2306 if (!tmp_vptr) {
2307 ret = -ENOMEM;
2308 goto out_0;
2309 }
1da177e4 2310
a9683c94 2311 tmp_vptr->netdev = dev;
2cf71d2e 2312 tmp_vptr->pdev = vptr->pdev;
6dffbe53 2313 tmp_vptr->dev = vptr->dev;
2cf71d2e
DJ		 2314 tmp_vptr->options = vptr->options;
2315 tmp_vptr->tx.numq = vptr->tx.numq;
6aa20a22 2316
2cf71d2e
DJ		 2317 ret = velocity_init_rings(tmp_vptr, new_mtu);
2318 if (ret < 0)
2319 goto out_free_tmp_vptr_1;
1da177e4 2320
bc9627e7 2321 napi_disable(&vptr->napi);
2322
2cf71d2e 2323 spin_lock_irqsave(&vptr->lock, flags);
1da177e4 2324
2cf71d2e
DJ		 2325 netif_stop_queue(dev);
2326 velocity_shutdown(vptr);
1da177e4 2327
2cf71d2e
DJ		 2328 rx = vptr->rx;
2329 tx = vptr->tx;
1da177e4 2330
2cf71d2e
DJ		 2331 vptr->rx = tmp_vptr->rx;
2332 vptr->tx = tmp_vptr->tx;
1da177e4 2333
2cf71d2e
DJ		 2334 tmp_vptr->rx = rx;
2335 tmp_vptr->tx = tx;
1da177e4 2336
2cf71d2e 2337 dev->mtu = new_mtu;
6aa20a22 2338
2cf71d2e 2339 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1da177e4 2340
35bb5cad
BH		 2341 velocity_give_many_rx_descs(vptr);
2342
bc9627e7 2343 napi_enable(&vptr->napi);
2344
2cf71d2e
DJ		 2345 mac_enable_int(vptr->mac_regs);
2346 netif_start_queue(dev);
6aa20a22 2347
2cf71d2e 2348 spin_unlock_irqrestore(&vptr->lock, flags);
1da177e4 2349
2cf71d2e 2350 velocity_free_rings(tmp_vptr);
1da177e4 2351
2cf71d2e
DJ		 2352out_free_tmp_vptr_1:
2353 kfree(tmp_vptr);
2354 }
2355out_0:
2356 return ret;
1da177e4 2357}
1da177e4 2358
0887a576
AU		 2359#ifdef CONFIG_NET_POLL_CONTROLLER
2360/**
2361 * velocity_poll_controller - Velocity Poll controller function
2362 * @dev: network device
2363 *
2364 *
2365 * Used by NETCONSOLE and other diagnostic tools to allow network I/P
2366 * with interrupts disabled.
2367 */
2368static void velocity_poll_controller(struct net_device *dev)
2369{
2370 disable_irq(dev->irq);
2371 velocity_intr(dev->irq, dev);
2372 enable_irq(dev->irq);
2373}
2374#endif
2375
1da177e4 2376/**
2cf71d2e
DJ		 2377 * velocity_mii_ioctl - MII ioctl handler
2378 * @dev: network device
2379 * @ifr: the ifreq block for the ioctl
2380 * @cmd: the command
1da177e4 2381 *
2cf71d2e
DJ		 2382 * Process MII requests made via ioctl from the network layer. These
2383 * are used by tools like kudzu to interrogate the link state of the
2384 * hardware
1da177e4 2385 */
2cf71d2e 2386static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1da177e4 2387{
2cf71d2e
DJ		 2388 struct velocity_info *vptr = netdev_priv(dev);
2389 struct mac_regs __iomem *regs = vptr->mac_regs;
2390 unsigned long flags;
2391 struct mii_ioctl_data *miidata = if_mii(ifr);
2392 int err;
1da177e4 2393
2cf71d2e
DJ		 2394 switch (cmd) {
2395 case SIOCGMIIPHY:
2396 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
1da177e4 2397 break;
2cf71d2e 2398 case SIOCGMIIREG:
2cf71d2e
DJ		 2399 if (velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
2400 return -ETIMEDOUT;
1da177e4 2401 break;
2cf71d2e 2402 case SIOCSMIIREG:
2cf71d2e
DJ		 2403 spin_lock_irqsave(&vptr->lock, flags);
2404 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
2405 spin_unlock_irqrestore(&vptr->lock, flags);
2406 check_connection_type(vptr->mac_regs);
2407 if (err)
2408 return err;
1da177e4
LT		 2409 break;
2410 default:
2cf71d2e 2411 return -EOPNOTSUPP;
1da177e4 2412 }
2cf71d2e 2413 return 0;
1da177e4
LT		 2414}
2415
2416/**
2cf71d2e
DJ		 2417 * velocity_ioctl - ioctl entry point
2418 * @dev: network device
2419 * @rq: interface request ioctl
2420 * @cmd: command code
1da177e4 2421 *
2cf71d2e
DJ		 2422 * Called when the user issues an ioctl request to the network
2423 * device in question. The velocity interface supports MII.
1da177e4 2424 */
2cf71d2e
DJ		 2425static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2426{
2427 struct velocity_info *vptr = netdev_priv(dev);
2428 int ret;
6aa20a22 2429
2cf71d2e
DJ		 2430 /* If we are asked for information and the device is power
2431 saving then we need to bring the device back up to talk to it */
1da177e4 2432
2cf71d2e 2433 if (!netif_running(dev))
6dffbe53 2434 velocity_set_power_state(vptr, PCI_D0);
1da177e4 2435
2cf71d2e
DJ		 2436 switch (cmd) {
2437 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2438 case SIOCGMIIREG: /* Read MII PHY register. */
2439 case SIOCSMIIREG: /* Write to MII PHY register. */
2440 ret = velocity_mii_ioctl(dev, rq, cmd);
2441 break;
1da177e4 2442
2cf71d2e
DJ		 2443 default:
2444 ret = -EOPNOTSUPP;
2445 }
2446 if (!netif_running(dev))
6dffbe53 2447 velocity_set_power_state(vptr, PCI_D3hot);
1da177e4 2448
c4067400 2449
2cf71d2e 2450 return ret;
1da177e4
LT		 2451}
2452
2453/**
2cf71d2e
DJ		 2454 * velocity_get_status - statistics callback
2455 * @dev: network device
1da177e4 2456 *
2cf71d2e
DJ		 2457 * Callback from the network layer to allow driver statistics
2458 * to be resynchronized with hardware collected state. In the
2459 * case of the velocity we need to pull the MIB counters from
2460 * the hardware into the counters before letting the network
2461 * layer display them.
1da177e4 2462 */
2cf71d2e 2463static struct net_device_stats *velocity_get_stats(struct net_device *dev)
1da177e4 2464{
2cf71d2e 2465 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 2466
2cf71d2e
DJ		 2467 /* If the hardware is down, don't touch MII */
2468 if (!netif_running(dev))
2469 return &dev->stats;
1da177e4 2470
2cf71d2e
DJ		 2471 spin_lock_irq(&vptr->lock);
2472 velocity_update_hw_mibs(vptr);
2473 spin_unlock_irq(&vptr->lock);
1da177e4 2474
2cf71d2e
DJ		 2475 dev->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2476 dev->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2477 dev->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
1da177e4 2478
2cf71d2e
DJ		 2479// unsigned long rx_dropped; /* no space in linux buffers */
2480 dev->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2481 /* detailed rx_errors: */
2482// unsigned long rx_length_errors;
2483// unsigned long rx_over_errors; /* receiver ring buff overflow */
2484 dev->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2485// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2486// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2487// unsigned long rx_missed_errors; /* receiver missed packet */
2488
2489 /* detailed tx_errors */
2490// unsigned long tx_fifo_errors;
2491
2492 return &dev->stats;
1da177e4
LT		 2493}
2494
2cf71d2e
DJ		 2495/**
2496 * velocity_close - close adapter callback
2497 * @dev: network device
2498 *
2499 * Callback from the network layer when the velocity is being
2500 * deactivated by the network layer
2501 */
2502static int velocity_close(struct net_device *dev)
1da177e4 2503{
2cf71d2e 2504 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 2505
dfff7144 2506 napi_disable(&vptr->napi);
2cf71d2e
DJ		 2507 netif_stop_queue(dev);
2508 velocity_shutdown(vptr);
1da177e4 2509
2cf71d2e
DJ		 2510 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2511 velocity_get_ip(vptr);
dfda3578 2512
6dffbe53 2513 free_irq(dev->irq, dev);
1da177e4 2514
2cf71d2e 2515 velocity_free_rings(vptr);
1da177e4 2516
2cf71d2e
DJ		 2517 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2518 return 0;
1da177e4
LT		 2519}
2520
2521/**
2cf71d2e
DJ		 2522 * velocity_xmit - transmit packet callback
2523 * @skb: buffer to transmit
2524 * @dev: network device
1da177e4 2525 *
2cf71d2e
DJ		 2526 * Called by the networ layer to request a packet is queued to
2527 * the velocity. Returns zero on success.
1da177e4 2528 */
61357325
SH		 2529static netdev_tx_t velocity_xmit(struct sk_buff *skb,
2530 struct net_device *dev)
1da177e4 2531{
2cf71d2e
DJ		 2532 struct velocity_info *vptr = netdev_priv(dev);
2533 int qnum = 0;
2534 struct tx_desc *td_ptr;
2535 struct velocity_td_info *tdinfo;
2536 unsigned long flags;
2537 int pktlen;
c79992fd
SK		 2538 int index, prev;
2539 int i = 0;
1da177e4 2540
2cf71d2e
DJ		 2541 if (skb_padto(skb, ETH_ZLEN))
2542 goto out;
1da177e4 2543
c79992fd
SK		 2544 /* The hardware can handle at most 7 memory segments, so merge
2545 * the skb if there are more */
2546 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
001eadf6 2547 dev_kfree_skb_any(skb);
c79992fd
SK		 2548 return NETDEV_TX_OK;
2549 }
2550
2551 pktlen = skb_shinfo(skb)->nr_frags == 0 ?
2552 max_t(unsigned int, skb->len, ETH_ZLEN) :
2553 skb_headlen(skb);
1da177e4 2554
2cf71d2e 2555 spin_lock_irqsave(&vptr->lock, flags);
1da177e4 2556
2cf71d2e
DJ		 2557 index = vptr->tx.curr[qnum];
2558 td_ptr = &(vptr->tx.rings[qnum][index]);
2559 tdinfo = &(vptr->tx.infos[qnum][index]);
1da177e4 2560
2cf71d2e
DJ		 2561 td_ptr->tdesc1.TCR = TCR0_TIC;
2562 td_ptr->td_buf[0].size &= ~TD_QUEUE;
1da177e4 2563
2cf71d2e
DJ		 2564 /*
2565 * Map the linear network buffer into PCI space and
2566 * add it to the transmit ring.
2567 */
2568 tdinfo->skb = skb;
e2c41f14
TP		 2569 tdinfo->skb_dma[0] = dma_map_single(vptr->dev, skb->data, pktlen,
2570 DMA_TO_DEVICE);
c79992fd 2571 td_ptr->tdesc0.len = cpu_to_le16(pktlen);
2cf71d2e
DJ		 2572 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2573 td_ptr->td_buf[0].pa_high = 0;
c79992fd
SK		 2574 td_ptr->td_buf[0].size = cpu_to_le16(pktlen);
2575
2576 /* Handle fragments */
2577 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
9e903e08 2578 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
c79992fd 2579
e2c41f14 2580 tdinfo->skb_dma[i + 1] = skb_frag_dma_map(vptr->dev,
e4cb193f 2581 frag, 0,
9e903e08 2582 skb_frag_size(frag),
5d6bcdfe 2583 DMA_TO_DEVICE);
c79992fd
SK		 2584
2585 td_ptr->td_buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
2586 td_ptr->td_buf[i + 1].pa_high = 0;
9e903e08 2587 td_ptr->td_buf[i + 1].size = cpu_to_le16(skb_frag_size(frag));
c79992fd
SK		 2588 }
2589 tdinfo->nskb_dma = i + 1;
2cf71d2e
DJ		 2590
2591 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
2592
df8a39de
JP		 2593 if (skb_vlan_tag_present(skb)) {
2594 td_ptr->tdesc1.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
2cf71d2e
DJ		 2595 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2596 }
2597
2598 /*
2599 * Handle hardware checksum
2600 */
f593fe36 2601 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2cf71d2e
DJ		 2602 const struct iphdr *ip = ip_hdr(skb);
2603 if (ip->protocol == IPPROTO_TCP)
2604 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2605 else if (ip->protocol == IPPROTO_UDP)
2606 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2607 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2608 }
1da177e4 2609
c79992fd
SK		 2610 prev = index - 1;
2611 if (prev < 0)
2612 prev = vptr->options.numtx - 1;
2613 td_ptr->tdesc0.len |= OWNED_BY_NIC;
2614 vptr->tx.used[qnum]++;
2615 vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx;
1da177e4 2616
c79992fd
SK		 2617 if (AVAIL_TD(vptr, qnum) < 1)
2618 netif_stop_queue(dev);
1da177e4 2619
c79992fd
SK		 2620 td_ptr = &(vptr->tx.rings[qnum][prev]);
2621 td_ptr->td_buf[0].size |= TD_QUEUE;
2622 mac_tx_queue_wake(vptr->mac_regs, qnum);
1da177e4 2623
2cf71d2e
DJ		 2624 spin_unlock_irqrestore(&vptr->lock, flags);
2625out:
2626 return NETDEV_TX_OK;
1da177e4
LT		 2627}
2628
2cf71d2e
DJ		 2629static const struct net_device_ops velocity_netdev_ops = {
2630 .ndo_open = velocity_open,
2631 .ndo_stop = velocity_close,
2632 .ndo_start_xmit = velocity_xmit,
2633 .ndo_get_stats = velocity_get_stats,
2634 .ndo_validate_addr = eth_validate_addr,
5ae297b0 2635 .ndo_set_mac_address = eth_mac_addr,
afc4b13d 2636 .ndo_set_rx_mode = velocity_set_multi,
2cf71d2e
DJ		 2637 .ndo_change_mtu = velocity_change_mtu,
2638 .ndo_do_ioctl = velocity_ioctl,
2639 .ndo_vlan_rx_add_vid = velocity_vlan_rx_add_vid,
2640 .ndo_vlan_rx_kill_vid = velocity_vlan_rx_kill_vid,
0887a576
AU		 2641#ifdef CONFIG_NET_POLL_CONTROLLER
2642 .ndo_poll_controller = velocity_poll_controller,
2643#endif
2cf71d2e
DJ		 2644};
2645
1da177e4 2646/**
2cf71d2e
DJ		 2647 * velocity_init_info - init private data
2648 * @pdev: PCI device
2649 * @vptr: Velocity info
2650 * @info: Board type
1da177e4 2651 *
2cf71d2e
DJ		 2652 * Set up the initial velocity_info struct for the device that has been
2653 * discovered.
1da177e4 2654 */
6dffbe53
TP		 2655static void velocity_init_info(struct velocity_info *vptr,
2656 const struct velocity_info_tbl *info)
1da177e4 2657{
2cf71d2e
DJ		 2658 vptr->chip_id = info->chip_id;
2659 vptr->tx.numq = info->txqueue;
2660 vptr->multicast_limit = MCAM_SIZE;
2661 spin_lock_init(&vptr->lock);
6aa20a22 2662}
1da177e4
LT		 2663
2664/**
2cf71d2e
DJ		 2665 * velocity_get_pci_info - retrieve PCI info for device
2666 * @vptr: velocity device
2667 * @pdev: PCI device it matches
1da177e4 2668 *
2cf71d2e
DJ		 2669 * Retrieve the PCI configuration space data that interests us from
2670 * the kernel PCI layer
1da177e4 2671 */
6dffbe53 2672static int velocity_get_pci_info(struct velocity_info *vptr)
1da177e4 2673{
6dffbe53 2674 struct pci_dev *pdev = vptr->pdev;
1da177e4 2675
2cf71d2e 2676 pci_set_master(pdev);
1da177e4 2677
2cf71d2e
DJ		 2678 vptr->ioaddr = pci_resource_start(pdev, 0);
2679 vptr->memaddr = pci_resource_start(pdev, 1);
1da177e4 2680
2cf71d2e
DJ		 2681 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
2682 dev_err(&pdev->dev,
2683 "region #0 is not an I/O resource, aborting.\n");
2684 return -EINVAL;
2685 }
2686
2687 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
2688 dev_err(&pdev->dev,
2689 "region #1 is an I/O resource, aborting.\n");
2690 return -EINVAL;
2691 }
2692
2693 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
2694 dev_err(&pdev->dev, "region #1 is too small.\n");
2695 return -EINVAL;
2696 }
6dffbe53
TP		 2697
2698 return 0;
2699}
2700
2701/**
2702 * velocity_get_platform_info - retrieve platform info for device
2703 * @vptr: velocity device
2704 * @pdev: platform device it matches
2705 *
2706 * Retrieve the Platform configuration data that interests us
2707 */
2708static int velocity_get_platform_info(struct velocity_info *vptr)
2709{
2710 struct resource res;
2711 int ret;
2712
2713 if (of_get_property(vptr->dev->of_node, "no-eeprom", NULL))
2714 vptr->no_eeprom = 1;
2715
2716 ret = of_address_to_resource(vptr->dev->of_node, 0, &res);
2717 if (ret) {
2718 dev_err(vptr->dev, "unable to find memory address\n");
2719 return ret;
2720 }
2721
2722 vptr->memaddr = res.start;
2723
2724 if (resource_size(&res) < VELOCITY_IO_SIZE) {
2725 dev_err(vptr->dev, "memory region is too small.\n");
2726 return -EINVAL;
2727 }
6aa20a22 2728
1da177e4
LT		 2729 return 0;
2730}
2731
2cf71d2e
DJ		 2732/**
2733 * velocity_print_info - per driver data
2734 * @vptr: velocity
2735 *
2736 * Print per driver data as the kernel driver finds Velocity
2737 * hardware
2738 */
27add006 2739static void velocity_print_info(struct velocity_info *vptr)
1da177e4 2740{
a9683c94 2741 struct net_device *dev = vptr->netdev;
1da177e4 2742
2cf71d2e 2743 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
aa7c68a5
HS		 2744 printk(KERN_INFO "%s: Ethernet Address: %pM\n",
2745 dev->name, dev->dev_addr);
1da177e4
LT		 2746}
2747
2748static u32 velocity_get_link(struct net_device *dev)
2749{
8ab6f3f7 2750 struct velocity_info *vptr = netdev_priv(dev);
c4067400 2751 struct mac_regs __iomem *regs = vptr->mac_regs;
59b693fb 2752 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT		 2753}
2754
2cf71d2e 2755/**
6dffbe53 2756 * velocity_probe - set up discovered velocity device
2cf71d2e
DJ		 2757 * @pdev: PCI device
2758 * @ent: PCI device table entry that matched
6dffbe53 2759 * @bustype: bus that device is connected to
2cf71d2e
DJ		 2760 *
2761 * Configure a discovered adapter from scratch. Return a negative
2762 * errno error code on failure paths.
2763 */
6dffbe53
TP		 2764static int velocity_probe(struct device *dev, int irq,
2765 const struct velocity_info_tbl *info,
2766 enum velocity_bus_type bustype)
1da177e4 2767{
2cf71d2e 2768 static int first = 1;
6dffbe53 2769 struct net_device *netdev;
2cf71d2e
DJ		 2770 int i;
2771 const char *drv_string;
2cf71d2e
DJ		 2772 struct velocity_info *vptr;
2773 struct mac_regs __iomem *regs;
2774 int ret = -ENOMEM;
1da177e4 2775
2cf71d2e
DJ		 2776 /* FIXME: this driver, like almost all other ethernet drivers,
2777 * can support more than MAX_UNITS.
2778 */
2779 if (velocity_nics >= MAX_UNITS) {
6dffbe53 2780 dev_notice(dev, "already found %d NICs.\n", velocity_nics);
2cf71d2e
DJ		 2781 return -ENODEV;
2782 }
1da177e4 2783
6dffbe53
TP		 2784 netdev = alloc_etherdev(sizeof(struct velocity_info));
2785 if (!netdev)
2cf71d2e 2786 goto out;
1da177e4 2787
2cf71d2e 2788 /* Chain it all together */
1da177e4 2789
6dffbe53
TP		 2790 SET_NETDEV_DEV(netdev, dev);
2791 vptr = netdev_priv(netdev);
2cf71d2e 2792
2cf71d2e
DJ		 2793 if (first) {
2794 printk(KERN_INFO "%s Ver. %s\n",
2795 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
2796 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
2797 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
2798 first = 0;
2799 }
2800
6dffbe53
TP		 2801 netdev->irq = irq;
2802 vptr->netdev = netdev;
2803 vptr->dev = dev;
2cf71d2e 2804
6dffbe53 2805 velocity_init_info(vptr, info);
2cf71d2e 2806
6dffbe53
TP		 2807 if (bustype == BUS_PCI) {
2808 vptr->pdev = to_pci_dev(dev);
2cf71d2e 2809
6dffbe53
TP		 2810 ret = velocity_get_pci_info(vptr);
2811 if (ret < 0)
2812 goto err_free_dev;
2813 } else {
2814 vptr->pdev = NULL;
2815 ret = velocity_get_platform_info(vptr);
2816 if (ret < 0)
2817 goto err_free_dev;
1da177e4 2818 }
2cf71d2e
DJ		 2819
2820 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
2821 if (regs == NULL) {
2822 ret = -EIO;
6dffbe53 2823 goto err_free_dev;
1da177e4 2824 }
1da177e4 2825
2cf71d2e 2826 vptr->mac_regs = regs;
6dffbe53 2827 vptr->rev_id = readb(&regs->rev_id);
1da177e4 2828
2cf71d2e 2829 mac_wol_reset(regs);
1da177e4 2830
2cf71d2e 2831 for (i = 0; i < 6; i++)
6dffbe53 2832 netdev->dev_addr[i] = readb(&regs->PAR[i]);
6aa20a22 2833
6aa20a22 2834
6dffbe53 2835 drv_string = dev_driver_string(dev);
1da177e4 2836
2cf71d2e 2837 velocity_get_options(&vptr->options, velocity_nics, drv_string);
1da177e4 2838
2cf71d2e
DJ		 2839 /*
2840 * Mask out the options cannot be set to the chip
2841 */
6aa20a22 2842
2cf71d2e 2843 vptr->options.flags &= info->flags;
1da177e4 2844
2cf71d2e
DJ		 2845 /*
2846 * Enable the chip specified capbilities
2847 */
1da177e4 2848
2cf71d2e 2849 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
1da177e4 2850
2cf71d2e
DJ		 2851 vptr->wol_opts = vptr->options.wol_opts;
2852 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
1da177e4 2853
2cf71d2e 2854 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
1da177e4 2855
6dffbe53
TP		 2856 netdev->netdev_ops = &velocity_netdev_ops;
2857 netdev->ethtool_ops = &velocity_ethtool_ops;
2858 netif_napi_add(netdev, &vptr->napi, velocity_poll,
2859 VELOCITY_NAPI_WEIGHT);
6aa20a22 2860
6dffbe53 2861 netdev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG |
f646968f 2862 NETIF_F_HW_VLAN_CTAG_TX;
6dffbe53
TP		 2863 netdev->features |= NETIF_F_HW_VLAN_CTAG_TX |
2864 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX |
2865 NETIF_F_IP_CSUM;
1da177e4 2866
6dffbe53 2867 ret = register_netdev(netdev);
2cf71d2e
DJ		 2868 if (ret < 0)
2869 goto err_iounmap;
2870
6dffbe53
TP		 2871 if (!velocity_get_link(netdev)) {
2872 netif_carrier_off(netdev);
2cf71d2e 2873 vptr->mii_status |= VELOCITY_LINK_FAIL;
1da177e4
LT		 2874 }
2875
2cf71d2e 2876 velocity_print_info(vptr);
6dffbe53 2877 dev_set_drvdata(vptr->dev, netdev);
1da177e4 2878
2cf71d2e 2879 /* and leave the chip powered down */
1da177e4 2880
6dffbe53 2881 velocity_set_power_state(vptr, PCI_D3hot);
2cf71d2e
DJ		 2882 velocity_nics++;
2883out:
2884 return ret;
2885
2886err_iounmap:
2fdac010 2887 netif_napi_del(&vptr->napi);
2cf71d2e 2888 iounmap(regs);
2cf71d2e 2889err_free_dev:
6dffbe53 2890 free_netdev(netdev);
2cf71d2e 2891 goto out;
1da177e4
LT		 2892}
2893
6dffbe53
TP		 2894/**
2895 * velocity_remove - device unplug
2896 * @dev: device being removed
2897 *
2898 * Device unload callback. Called on an unplug or on module
2899 * unload for each active device that is present. Disconnects
2900 * the device from the network layer and frees all the resources
2901 */
2902static int velocity_remove(struct device *dev)
2903{
2904 struct net_device *netdev = dev_get_drvdata(dev);
2905 struct velocity_info *vptr = netdev_priv(netdev);
2906
2907 unregister_netdev(netdev);
2fdac010 2908 netif_napi_del(&vptr->napi);
6dffbe53
TP		 2909 iounmap(vptr->mac_regs);
2910 free_netdev(netdev);
2911 velocity_nics--;
2912
2913 return 0;
2914}
2915
2916static int velocity_pci_probe(struct pci_dev *pdev,
2917 const struct pci_device_id *ent)
2918{
2919 const struct velocity_info_tbl *info =
2920 &chip_info_table[ent->driver_data];
2921 int ret;
2922
2923 ret = pci_enable_device(pdev);
2924 if (ret < 0)
2925 return ret;
2926
2927 ret = pci_request_regions(pdev, VELOCITY_NAME);
2928 if (ret < 0) {
2929 dev_err(&pdev->dev, "No PCI resources.\n");
2930 goto fail1;
2931 }
2932
2933 ret = velocity_probe(&pdev->dev, pdev->irq, info, BUS_PCI);
2934 if (ret == 0)
2935 return 0;
2936
2937 pci_release_regions(pdev);
2938fail1:
2939 pci_disable_device(pdev);
2940 return ret;
2941}
2942
2943static void velocity_pci_remove(struct pci_dev *pdev)
2944{
2945 velocity_remove(&pdev->dev);
2946
2947 pci_release_regions(pdev);
2948 pci_disable_device(pdev);
2949}
2950
2951static int velocity_platform_probe(struct platform_device *pdev)
2952{
2953 const struct of_device_id *of_id;
2954 const struct velocity_info_tbl *info;
2955 int irq;
2956
2957 of_id = of_match_device(velocity_of_ids, &pdev->dev);
2958 if (!of_id)
2959 return -EINVAL;
2960 info = of_id->data;
2961
2962 irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
2963 if (!irq)
2964 return -EINVAL;
2965
2966 return velocity_probe(&pdev->dev, irq, info, BUS_PLATFORM);
2967}
2968
2969static int velocity_platform_remove(struct platform_device *pdev)
2970{
2971 velocity_remove(&pdev->dev);
2972
2973 return 0;
2974}
2975
2976#ifdef CONFIG_PM_SLEEP
1da177e4
LT		 2977/**
2978 * wol_calc_crc - WOL CRC
2979 * @pattern: data pattern
2980 * @mask_pattern: mask
2981 *
2982 * Compute the wake on lan crc hashes for the packet header
2983 * we are interested in.
2984 */
c4067400 2985static u16 wol_calc_crc(int size, u8 *pattern, u8 *mask_pattern)
1da177e4
LT		 2986{
2987 u16 crc = 0xFFFF;
2988 u8 mask;
2989 int i, j;
2990
2991 for (i = 0; i < size; i++) {
2992 mask = mask_pattern[i];
2993
2994 /* Skip this loop if the mask equals to zero */
2995 if (mask == 0x00)
2996 continue;
2997
2998 for (j = 0; j < 8; j++) {
2999 if ((mask & 0x01) == 0) {
3000 mask >>= 1;
3001 continue;
3002 }
3003 mask >>= 1;
3004 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
3005 }
3006 }
3007 /* Finally, invert the result once to get the correct data */
3008 crc = ~crc;
906d66df 3009 return bitrev32(crc) >> 16;
1da177e4
LT		 3010}
3011
3012/**
3013 * velocity_set_wol - set up for wake on lan
3014 * @vptr: velocity to set WOL status on
3015 *
3016 * Set a card up for wake on lan either by unicast or by
3017 * ARP packet.
3018 *
3019 * FIXME: check static buffer is safe here
3020 */
1da177e4
LT		 3021static int velocity_set_wol(struct velocity_info *vptr)
3022{
c4067400 3023 struct mac_regs __iomem *regs = vptr->mac_regs;
2ffa007e 3024 enum speed_opt spd_dpx = vptr->options.spd_dpx;
1da177e4
LT		 3025 static u8 buf[256];
3026 int i;
3027
3028 static u32 mask_pattern[2][4] = {
3029 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
3030 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
3031 };
3032
3033 writew(0xFFFF, &regs->WOLCRClr);
3034 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
3035 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
3036
3037 /*
3038 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3039 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
3040 */
3041
c4067400 3042 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
1da177e4 3043 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
1da177e4
LT		 3044
3045 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
3046 struct arp_packet *arp = (struct arp_packet *) buf;
3047 u16 crc;
3048 memset(buf, 0, sizeof(struct arp_packet) + 7);
3049
3050 for (i = 0; i < 4; i++)
3051 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
3052
3053 arp->type = htons(ETH_P_ARP);
3054 arp->ar_op = htons(1);
3055
3056 memcpy(arp->ar_tip, vptr->ip_addr, 4);
3057
3058 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
3059 (u8 *) & mask_pattern[0][0]);
3060
3061 writew(crc, &regs->PatternCRC[0]);
3062 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
3063 }
3064
3065 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
3066 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
3067
3068 writew(0x0FFF, &regs->WOLSRClr);
3069
2ffa007e 3070 if (spd_dpx == SPD_DPX_1000_FULL)
3071 goto mac_done;
3072
3073 if (spd_dpx != SPD_DPX_AUTO)
3074 goto advertise_done;
3075
1da177e4
LT		 3076 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
3077 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3a7f8681 3078 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
1da177e4 3079
3a7f8681 3080 MII_REG_BITS_OFF(ADVERTISE_1000FULL | ADVERTISE_1000HALF, MII_CTRL1000, vptr->mac_regs);
1da177e4
LT		 3081 }
3082
3083 if (vptr->mii_status & VELOCITY_SPEED_1000)
3a7f8681 3084 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
1da177e4 3085
2ffa007e 3086advertise_done:
1da177e4
LT		 3087 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
3088
3089 {
3090 u8 GCR;
3091 GCR = readb(&regs->CHIPGCR);
3092 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
3093 writeb(GCR, &regs->CHIPGCR);
3094 }
3095
2ffa007e 3096mac_done:
1da177e4
LT		 3097 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
3098 /* Turn on SWPTAG just before entering power mode */
3099 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
3100 /* Go to bed ..... */
3101 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
3102
3103 return 0;
3104}
3105
2cf71d2e
DJ		 3106/**
3107 * velocity_save_context - save registers
3108 * @vptr: velocity
3109 * @context: buffer for stored context
3110 *
3111 * Retrieve the current configuration from the velocity hardware
3112 * and stash it in the context structure, for use by the context
3113 * restore functions. This allows us to save things we need across
3114 * power down states
3115 */
3116static void velocity_save_context(struct velocity_info *vptr, struct velocity_context *context)
3117{
3118 struct mac_regs __iomem *regs = vptr->mac_regs;
3119 u16 i;
3120 u8 __iomem *ptr = (u8 __iomem *)regs;
3121
3122 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
3123 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3124
3125 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3126 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3127
3128 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3129 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3130
3131}
3132
6dffbe53 3133static int velocity_suspend(struct device *dev)
1da177e4 3134{
6dffbe53
TP		 3135 struct net_device *netdev = dev_get_drvdata(dev);
3136 struct velocity_info *vptr = netdev_priv(netdev);
1da177e4
LT		 3137 unsigned long flags;
3138
a9683c94 3139 if (!netif_running(vptr->netdev))
1da177e4
LT		 3140 return 0;
3141
a9683c94 3142 netif_device_detach(vptr->netdev);
1da177e4
LT		 3143
3144 spin_lock_irqsave(&vptr->lock, flags);
6dffbe53
TP		 3145 if (vptr->pdev)
3146 pci_save_state(vptr->pdev);
5ae297b0 3147
1da177e4
LT		 3148 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3149 velocity_get_ip(vptr);
3150 velocity_save_context(vptr, &vptr->context);
3151 velocity_shutdown(vptr);
3152 velocity_set_wol(vptr);
6dffbe53
TP		 3153 if (vptr->pdev)
3154 pci_enable_wake(vptr->pdev, PCI_D3hot, 1);
3155 velocity_set_power_state(vptr, PCI_D3hot);
1da177e4
LT		 3156 } else {
3157 velocity_save_context(vptr, &vptr->context);
3158 velocity_shutdown(vptr);
6dffbe53
TP		 3159 if (vptr->pdev)
3160 pci_disable_device(vptr->pdev);
3161 velocity_set_power_state(vptr, PCI_D3hot);
1da177e4 3162 }
5ae297b0 3163
2cf71d2e
DJ		 3164 spin_unlock_irqrestore(&vptr->lock, flags);
3165 return 0;
3166}
3167
3168/**
3169 * velocity_restore_context - restore registers
3170 * @vptr: velocity
3171 * @context: buffer for stored context
3172 *
3173 * Reload the register configuration from the velocity context
3174 * created by velocity_save_context.
3175 */
3176static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3177{
3178 struct mac_regs __iomem *regs = vptr->mac_regs;
3179 int i;
3180 u8 __iomem *ptr = (u8 __iomem *)regs;
3181
3182 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4)
3183 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3184
3185 /* Just skip cr0 */
3186 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3187 /* Clear */
3188 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3189 /* Set */
3190 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3191 }
3192
3193 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4)
3194 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3195
3196 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3197 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3198
3199 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++)
3200 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
1da177e4
LT		 3201}
3202
6dffbe53 3203static int velocity_resume(struct device *dev)
1da177e4 3204{
6dffbe53
TP		 3205 struct net_device *netdev = dev_get_drvdata(dev);
3206 struct velocity_info *vptr = netdev_priv(netdev);
1da177e4
LT		 3207 unsigned long flags;
3208 int i;
3209
a9683c94 3210 if (!netif_running(vptr->netdev))
1da177e4
LT		 3211 return 0;
3212
6dffbe53
TP		 3213 velocity_set_power_state(vptr, PCI_D0);
3214
3215 if (vptr->pdev) {
1ca01512 3216 pci_enable_wake(vptr->pdev, PCI_D0, 0);
6dffbe53
TP		 3217 pci_restore_state(vptr->pdev);
3218 }
1da177e4
LT		 3219
3220 mac_wol_reset(vptr->mac_regs);
3221
3222 spin_lock_irqsave(&vptr->lock, flags);
3223 velocity_restore_context(vptr, &vptr->context);
3224 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3225 mac_disable_int(vptr->mac_regs);
3226
d6cade0f 3227 velocity_tx_srv(vptr);
1da177e4 3228
0fe9f15e 3229 for (i = 0; i < vptr->tx.numq; i++) {
c4067400 3230 if (vptr->tx.used[i])
1da177e4 3231 mac_tx_queue_wake(vptr->mac_regs, i);
1da177e4
LT		 3232 }
3233
3234 mac_enable_int(vptr->mac_regs);
3235 spin_unlock_irqrestore(&vptr->lock, flags);
a9683c94 3236 netif_device_attach(vptr->netdev);
1da177e4
LT		 3237
3238 return 0;
3239}
6dffbe53
TP		 3240#endif /* CONFIG_PM_SLEEP */
3241
3242static SIMPLE_DEV_PM_OPS(velocity_pm_ops, velocity_suspend, velocity_resume);
1da177e4 3243
2cf71d2e
DJ		 3244/*
3245 * Definition for our device driver. The PCI layer interface
3246 * uses this to handle all our card discover and plugging
3247 */
6dffbe53 3248static struct pci_driver velocity_pci_driver = {
5ae297b0 3249 .name = VELOCITY_NAME,
6dffbe53
TP		 3250 .id_table = velocity_pci_id_table,
3251 .probe = velocity_pci_probe,
3252 .remove = velocity_pci_remove,
3253 .driver = {
3254 .pm = &velocity_pm_ops,
3255 },
2cf71d2e
DJ		 3256};
3257
6dffbe53
TP		 3258static struct platform_driver velocity_platform_driver = {
3259 .probe = velocity_platform_probe,
3260 .remove = velocity_platform_remove,
3261 .driver = {
3262 .name = "via-velocity",
6dffbe53
TP		 3263 .of_match_table = velocity_of_ids,
3264 .pm = &velocity_pm_ops,
3265 },
3266};
2cf71d2e
DJ		 3267
3268/**
3269 * velocity_ethtool_up - pre hook for ethtool
3270 * @dev: network device
3271 *
3272 * Called before an ethtool operation. We need to make sure the
3273 * chip is out of D3 state before we poke at it.
3274 */
3275static int velocity_ethtool_up(struct net_device *dev)
3276{
3277 struct velocity_info *vptr = netdev_priv(dev);
3278 if (!netif_running(dev))
6dffbe53 3279 velocity_set_power_state(vptr, PCI_D0);
2cf71d2e
DJ		 3280 return 0;
3281}
3282
3283/**
3284 * velocity_ethtool_down - post hook for ethtool
3285 * @dev: network device
3286 *
3287 * Called after an ethtool operation. Restore the chip back to D3
3288 * state if it isn't running.
3289 */
3290static void velocity_ethtool_down(struct net_device *dev)
3291{
3292 struct velocity_info *vptr = netdev_priv(dev);
3293 if (!netif_running(dev))
6dffbe53 3294 velocity_set_power_state(vptr, PCI_D3hot);
2cf71d2e
DJ		 3295}
3296
70739497
DD		 3297static int velocity_get_settings(struct net_device *dev,
3298 struct ethtool_cmd *cmd)
2cf71d2e
DJ		 3299{
3300 struct velocity_info *vptr = netdev_priv(dev);
3301 struct mac_regs __iomem *regs = vptr->mac_regs;
3302 u32 status;
3303 status = check_connection_type(vptr->mac_regs);
3304
3305 cmd->supported = SUPPORTED_TP |
3306 SUPPORTED_Autoneg |
3307 SUPPORTED_10baseT_Half |
3308 SUPPORTED_10baseT_Full |
3309 SUPPORTED_100baseT_Half |
3310 SUPPORTED_100baseT_Full |
3311 SUPPORTED_1000baseT_Half |
3312 SUPPORTED_1000baseT_Full;
15419227 3313
3314 cmd->advertising = ADVERTISED_TP | ADVERTISED_Autoneg;
3315 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
3316 cmd->advertising |=
3317 ADVERTISED_10baseT_Half |
3318 ADVERTISED_10baseT_Full |
3319 ADVERTISED_100baseT_Half |
3320 ADVERTISED_100baseT_Full |
3321 ADVERTISED_1000baseT_Half |
3322 ADVERTISED_1000baseT_Full;
3323 } else {
3324 switch (vptr->options.spd_dpx) {
3325 case SPD_DPX_1000_FULL:
3326 cmd->advertising |= ADVERTISED_1000baseT_Full;
3327 break;
3328 case SPD_DPX_100_HALF:
3329 cmd->advertising |= ADVERTISED_100baseT_Half;
3330 break;
3331 case SPD_DPX_100_FULL:
3332 cmd->advertising |= ADVERTISED_100baseT_Full;
3333 break;
3334 case SPD_DPX_10_HALF:
3335 cmd->advertising |= ADVERTISED_10baseT_Half;
3336 break;
3337 case SPD_DPX_10_FULL:
3338 cmd->advertising |= ADVERTISED_10baseT_Full;
3339 break;
3340 default:
3341 break;
3342 }
3343 }
70739497 3344
2cf71d2e 3345 if (status & VELOCITY_SPEED_1000)
70739497 3346 ethtool_cmd_speed_set(cmd, SPEED_1000);
2cf71d2e 3347 else if (status & VELOCITY_SPEED_100)
70739497 3348 ethtool_cmd_speed_set(cmd, SPEED_100);
2cf71d2e 3349 else
70739497
DD		 3350 ethtool_cmd_speed_set(cmd, SPEED_10);
3351
2cf71d2e
DJ		 3352 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
3353 cmd->port = PORT_TP;
3354 cmd->transceiver = XCVR_INTERNAL;
3355 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
3356
3357 if (status & VELOCITY_DUPLEX_FULL)
3358 cmd->duplex = DUPLEX_FULL;
3359 else
3360 cmd->duplex = DUPLEX_HALF;
3361
3362 return 0;
3363}
3364
25db0338
DD		 3365static int velocity_set_settings(struct net_device *dev,
3366 struct ethtool_cmd *cmd)
2cf71d2e
DJ		 3367{
3368 struct velocity_info *vptr = netdev_priv(dev);
25db0338 3369 u32 speed = ethtool_cmd_speed(cmd);
2cf71d2e
DJ		 3370 u32 curr_status;
3371 u32 new_status = 0;
3372 int ret = 0;
3373
3374 curr_status = check_connection_type(vptr->mac_regs);
3375 curr_status &= (~VELOCITY_LINK_FAIL);
3376
3377 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
25db0338
DD		 3378 new_status |= ((speed == SPEED_1000) ? VELOCITY_SPEED_1000 : 0);
3379 new_status |= ((speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3380 new_status |= ((speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
2cf71d2e
DJ		 3381 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3382
15419227 3383 if ((new_status & VELOCITY_AUTONEG_ENABLE) &&
3384 (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE))) {
2cf71d2e 3385 ret = -EINVAL;
15419227 3386 } else {
3387 enum speed_opt spd_dpx;
3388
3389 if (new_status & VELOCITY_AUTONEG_ENABLE)
3390 spd_dpx = SPD_DPX_AUTO;
3391 else if ((new_status & VELOCITY_SPEED_1000) &&
3392 (new_status & VELOCITY_DUPLEX_FULL)) {
3393 spd_dpx = SPD_DPX_1000_FULL;
3394 } else if (new_status & VELOCITY_SPEED_100)
3395 spd_dpx = (new_status & VELOCITY_DUPLEX_FULL) ?
3396 SPD_DPX_100_FULL : SPD_DPX_100_HALF;
3397 else if (new_status & VELOCITY_SPEED_10)
3398 spd_dpx = (new_status & VELOCITY_DUPLEX_FULL) ?
3399 SPD_DPX_10_FULL : SPD_DPX_10_HALF;
3400 else
3401 return -EOPNOTSUPP;
3402
3403 vptr->options.spd_dpx = spd_dpx;
3404
2cf71d2e 3405 velocity_set_media_mode(vptr, new_status);
15419227 3406 }
2cf71d2e
DJ		 3407
3408 return ret;
3409}
3410
3411static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3412{
3413 struct velocity_info *vptr = netdev_priv(dev);
6dffbe53 3414
23020ab3
RJ		 3415 strlcpy(info->driver, VELOCITY_NAME, sizeof(info->driver));
3416 strlcpy(info->version, VELOCITY_VERSION, sizeof(info->version));
6dffbe53
TP		 3417 if (vptr->pdev)
3418 strlcpy(info->bus_info, pci_name(vptr->pdev),
3419 sizeof(info->bus_info));
3420 else
3421 strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
2cf71d2e
DJ		 3422}
3423
3424static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3425{
3426 struct velocity_info *vptr = netdev_priv(dev);
3427 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3428 wol->wolopts |= WAKE_MAGIC;
3429 /*
3430 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3431 wol.wolopts|=WAKE_PHY;
3432 */
3433 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3434 wol->wolopts |= WAKE_UCAST;
3435 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3436 wol->wolopts |= WAKE_ARP;
3437 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3438}
3439
3440static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3441{
3442 struct velocity_info *vptr = netdev_priv(dev);
3443
3444 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3445 return -EFAULT;
3446 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3447
3448 /*
3449 if (wol.wolopts & WAKE_PHY) {
3450 vptr->wol_opts|=VELOCITY_WOL_PHY;
3451 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3452 }
3453 */
3454
3455 if (wol->wolopts & WAKE_MAGIC) {
3456 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3457 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3458 }
3459 if (wol->wolopts & WAKE_UCAST) {
3460 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3461 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3462 }
3463 if (wol->wolopts & WAKE_ARP) {
3464 vptr->wol_opts |= VELOCITY_WOL_ARP;
3465 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3466 }
3467 memcpy(vptr->wol_passwd, wol->sopass, 6);
3468 return 0;
3469}
3470
3471static u32 velocity_get_msglevel(struct net_device *dev)
3472{
3473 return msglevel;
3474}
3475
3476static void velocity_set_msglevel(struct net_device *dev, u32 value)
3477{
3478 msglevel = value;
3479}
3480
6dfc4b95
SK		 3481static int get_pending_timer_val(int val)
3482{
3483 int mult_bits = val >> 6;
3484 int mult = 1;
3485
3486 switch (mult_bits)
3487 {
3488 case 1:
3489 mult = 4; break;
3490 case 2:
3491 mult = 16; break;
3492 case 3:
3493 mult = 64; break;
3494 case 0:
3495 default:
3496 break;
3497 }
3498
3499 return (val & 0x3f) * mult;
3500}
3501
3502static void set_pending_timer_val(int *val, u32 us)
3503{
3504 u8 mult = 0;
3505 u8 shift = 0;
3506
3507 if (us >= 0x3f) {
3508 mult = 1; /* mult with 4 */
3509 shift = 2;
3510 }
3511 if (us >= 0x3f * 4) {
3512 mult = 2; /* mult with 16 */
3513 shift = 4;
3514 }
3515 if (us >= 0x3f * 16) {
3516 mult = 3; /* mult with 64 */
3517 shift = 6;
3518 }
3519
3520 *val = (mult << 6) | ((us >> shift) & 0x3f);
3521}
3522
3523
3524static int velocity_get_coalesce(struct net_device *dev,
3525 struct ethtool_coalesce *ecmd)
3526{
3527 struct velocity_info *vptr = netdev_priv(dev);
3528
3529 ecmd->tx_max_coalesced_frames = vptr->options.tx_intsup;
3530 ecmd->rx_max_coalesced_frames = vptr->options.rx_intsup;
3531
3532 ecmd->rx_coalesce_usecs = get_pending_timer_val(vptr->options.rxqueue_timer);
3533 ecmd->tx_coalesce_usecs = get_pending_timer_val(vptr->options.txqueue_timer);
3534
3535 return 0;
3536}
3537
3538static int velocity_set_coalesce(struct net_device *dev,
3539 struct ethtool_coalesce *ecmd)
3540{
3541 struct velocity_info *vptr = netdev_priv(dev);
3542 int max_us = 0x3f * 64;
39c2ff43 3543 unsigned long flags;
6dfc4b95
SK		 3544
3545 /* 6 bits of */
3546 if (ecmd->tx_coalesce_usecs > max_us)
3547 return -EINVAL;
3548 if (ecmd->rx_coalesce_usecs > max_us)
3549 return -EINVAL;
3550
3551 if (ecmd->tx_max_coalesced_frames > 0xff)
3552 return -EINVAL;
3553 if (ecmd->rx_max_coalesced_frames > 0xff)
3554 return -EINVAL;
3555
3556 vptr->options.rx_intsup = ecmd->rx_max_coalesced_frames;
3557 vptr->options.tx_intsup = ecmd->tx_max_coalesced_frames;
3558
3559 set_pending_timer_val(&vptr->options.rxqueue_timer,
3560 ecmd->rx_coalesce_usecs);
3561 set_pending_timer_val(&vptr->options.txqueue_timer,
3562 ecmd->tx_coalesce_usecs);
3563
3564 /* Setup the interrupt suppression and queue timers */
39c2ff43 3565 spin_lock_irqsave(&vptr->lock, flags);
6dfc4b95
SK		 3566 mac_disable_int(vptr->mac_regs);
3567 setup_adaptive_interrupts(vptr);
3568 setup_queue_timers(vptr);
3569
3570 mac_write_int_mask(vptr->int_mask, vptr->mac_regs);
3571 mac_clear_isr(vptr->mac_regs);
3572 mac_enable_int(vptr->mac_regs);
39c2ff43 3573 spin_unlock_irqrestore(&vptr->lock, flags);
6dfc4b95
SK		 3574
3575 return 0;
3576}
3577
ad66fa7a 3578static const char velocity_gstrings[][ETH_GSTRING_LEN] = {
3579 "rx_all",
3580 "rx_ok",
3581 "tx_ok",
3582 "rx_error",
3583 "rx_runt_ok",
3584 "rx_runt_err",
3585 "rx_64",
3586 "tx_64",
3587 "rx_65_to_127",
3588 "tx_65_to_127",
3589 "rx_128_to_255",
3590 "tx_128_to_255",
3591 "rx_256_to_511",
3592 "tx_256_to_511",
3593 "rx_512_to_1023",
3594 "tx_512_to_1023",
3595 "rx_1024_to_1518",
3596 "tx_1024_to_1518",
3597 "tx_ether_collisions",
3598 "rx_crc_errors",
3599 "rx_jumbo",
3600 "tx_jumbo",
3601 "rx_mac_control_frames",
3602 "tx_mac_control_frames",
3603 "rx_frame_alignement_errors",
3604 "rx_long_ok",
3605 "rx_long_err",
3606 "tx_sqe_errors",
3607 "rx_no_buf",
3608 "rx_symbol_errors",
3609 "in_range_length_errors",
3610 "late_collisions"
3611};
3612
3613static void velocity_get_strings(struct net_device *dev, u32 sset, u8 *data)
3614{
3615 switch (sset) {
3616 case ETH_SS_STATS:
3617 memcpy(data, *velocity_gstrings, sizeof(velocity_gstrings));
3618 break;
3619 }
3620}
3621
3622static int velocity_get_sset_count(struct net_device *dev, int sset)
3623{
3624 switch (sset) {
3625 case ETH_SS_STATS:
3626 return ARRAY_SIZE(velocity_gstrings);
3627 default:
3628 return -EOPNOTSUPP;
3629 }
3630}
3631
3632static void velocity_get_ethtool_stats(struct net_device *dev,
3633 struct ethtool_stats *stats, u64 *data)
3634{
3635 if (netif_running(dev)) {
3636 struct velocity_info *vptr = netdev_priv(dev);
3637 u32 *p = vptr->mib_counter;
3638 int i;
3639
3640 spin_lock_irq(&vptr->lock);
3641 velocity_update_hw_mibs(vptr);
3642 spin_unlock_irq(&vptr->lock);
3643
3644 for (i = 0; i < ARRAY_SIZE(velocity_gstrings); i++)
3645 *data++ = *p++;
3646 }
3647}
3648
2cf71d2e 3649static const struct ethtool_ops velocity_ethtool_ops = {
5ae297b0 3650 .get_settings = velocity_get_settings,
3651 .set_settings = velocity_set_settings,
3652 .get_drvinfo = velocity_get_drvinfo,
3653 .get_wol = velocity_ethtool_get_wol,
3654 .set_wol = velocity_ethtool_set_wol,
3655 .get_msglevel = velocity_get_msglevel,
3656 .set_msglevel = velocity_set_msglevel,
3657 .get_link = velocity_get_link,
ad66fa7a 3658 .get_strings = velocity_get_strings,
3659 .get_sset_count = velocity_get_sset_count,
3660 .get_ethtool_stats = velocity_get_ethtool_stats,
5ae297b0 3661 .get_coalesce = velocity_get_coalesce,
3662 .set_coalesce = velocity_set_coalesce,
3663 .begin = velocity_ethtool_up,
3664 .complete = velocity_ethtool_down
2cf71d2e 3665};
ce9f7fe3 3666
5ae297b0 3667#if defined(CONFIG_PM) && defined(CONFIG_INET)
1da177e4
LT		 3668static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3669{
5ae297b0 3670 struct in_ifaddr *ifa = ptr;
a337499f 3671 struct net_device *dev = ifa->ifa_dev->dev;
1da177e4 3672
516b4df1
BH		 3673 if (dev_net(dev) == &init_net &&
3674 dev->netdev_ops == &velocity_netdev_ops)
3675 velocity_get_ip(netdev_priv(dev));
a337499f 3676
1da177e4
LT		 3677 return NOTIFY_DONE;
3678}
ce9f7fe3 3679
2cf71d2e 3680static struct notifier_block velocity_inetaddr_notifier = {
5ae297b0 3681 .notifier_call = velocity_netdev_event,
2cf71d2e
DJ		 3682};
3683
3684static void velocity_register_notifier(void)
3685{
3686 register_inetaddr_notifier(&velocity_inetaddr_notifier);
3687}
3688
3689static void velocity_unregister_notifier(void)
3690{
3691 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
3692}
3693
3694#else
3695
3696#define velocity_register_notifier() do {} while (0)
3697#define velocity_unregister_notifier() do {} while (0)
3698
3699#endif /* defined(CONFIG_PM) && defined(CONFIG_INET) */
3700
3701/**
3702 * velocity_init_module - load time function
3703 *
3704 * Called when the velocity module is loaded. The PCI driver
3705 * is registered with the PCI layer, and in turn will call
3706 * the probe functions for each velocity adapter installed
3707 * in the system.
3708 */
3709static int __init velocity_init_module(void)
3710{
6dffbe53 3711 int ret_pci, ret_platform;
2cf71d2e
DJ		 3712
3713 velocity_register_notifier();
6dffbe53
TP		 3714
3715 ret_pci = pci_register_driver(&velocity_pci_driver);
3716 ret_platform = platform_driver_register(&velocity_platform_driver);
3717
3718 /* if both_registers failed, remove the notifier */
3719 if ((ret_pci < 0) && (ret_platform < 0)) {
2cf71d2e 3720 velocity_unregister_notifier();
6dffbe53
TP		 3721 return ret_pci;
3722 }
3723
3724 return 0;
2cf71d2e
DJ		 3725}
3726
3727/**
3728 * velocity_cleanup - module unload
3729 *
3730 * When the velocity hardware is unloaded this function is called.
3731 * It will clean up the notifiers and the unregister the PCI
3732 * driver interface for this hardware. This in turn cleans up
3733 * all discovered interfaces before returning from the function
3734 */
3735static void __exit velocity_cleanup_module(void)
3736{
3737 velocity_unregister_notifier();
6dffbe53
TP		 3738
3739 pci_unregister_driver(&velocity_pci_driver);
3740 platform_driver_unregister(&velocity_platform_driver);
2cf71d2e
DJ		 3741}
3742
3743module_init(velocity_init_module);
3744module_exit(velocity_cleanup_module);
Linux kernel - Deliverables
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