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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wirel...
[deliverable/linux.git] / drivers / net / ixgbe / ixgbe_ethtool.c
CommitLineData
9a799d71
AK		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
3efac5a0 4 Copyright(c) 1999 - 2009 Intel Corporation.
9a799d71
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
9a799d71
AK		 23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28/* ethtool support for ixgbe */
29
30#include <linux/types.h>
31#include <linux/module.h>
32#include <linux/pci.h>
33#include <linux/netdevice.h>
34#include <linux/ethtool.h>
35#include <linux/vmalloc.h>
36#include <linux/uaccess.h>
37
38#include "ixgbe.h"
39
40
41#define IXGBE_ALL_RAR_ENTRIES 16
42
43struct ixgbe_stats {
44 char stat_string[ETH_GSTRING_LEN];
45 int sizeof_stat;
46 int stat_offset;
47};
48
49#define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
b4617240 50 offsetof(struct ixgbe_adapter, m)
9a799d71
AK		 51static struct ixgbe_stats ixgbe_gstrings_stats[] = {
52 {"rx_packets", IXGBE_STAT(net_stats.rx_packets)},
53 {"tx_packets", IXGBE_STAT(net_stats.tx_packets)},
54 {"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},
55 {"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},
56 {"lsc_int", IXGBE_STAT(lsc_int)},
57 {"tx_busy", IXGBE_STAT(tx_busy)},
58 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
59 {"rx_errors", IXGBE_STAT(net_stats.rx_errors)},
60 {"tx_errors", IXGBE_STAT(net_stats.tx_errors)},
61 {"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)},
62 {"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)},
63 {"multicast", IXGBE_STAT(net_stats.multicast)},
64 {"broadcast", IXGBE_STAT(stats.bprc)},
65 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
66 {"collisions", IXGBE_STAT(net_stats.collisions)},
67 {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
68 {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
69 {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
70 {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
71 {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
72 {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
73 {"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)},
74 {"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)},
75 {"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)},
76 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
77 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
78 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
79 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
80 {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)},
81 {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)},
82 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
83 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
84 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
85 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
86 {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)},
87 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
88 {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)},
89 {"rx_header_split", IXGBE_STAT(rx_hdr_split)},
90 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
91 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
92};
93
94#define IXGBE_QUEUE_STATS_LEN \
454d7c9b
WC		 95 ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
96 ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
97 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
b4617240 98#define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
2f90b865 99#define IXGBE_PB_STATS_LEN ( \
9d2f4720 100 (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
2f90b865
AD		 101 IXGBE_FLAG_DCB_ENABLED) ? \
102 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
103 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
104 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
105 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
106 / sizeof(u64) : 0)
107#define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
108 IXGBE_PB_STATS_LEN + \
109 IXGBE_QUEUE_STATS_LEN)
9a799d71
AK		 110
111static int ixgbe_get_settings(struct net_device *netdev,
b4617240 112 struct ethtool_cmd *ecmd)
9a799d71
AK		 113{
114 struct ixgbe_adapter *adapter = netdev_priv(netdev);
735441fb
AV		 115 struct ixgbe_hw *hw = &adapter->hw;
116 u32 link_speed = 0;
117 bool link_up;
9a799d71 118
735441fb
AV		 119 ecmd->supported = SUPPORTED_10000baseT_Full;
120 ecmd->autoneg = AUTONEG_ENABLE;
9a799d71 121 ecmd->transceiver = XCVR_EXTERNAL;
735441fb
AV		 122 if (hw->phy.media_type == ixgbe_media_type_copper) {
123 ecmd->supported |= (SUPPORTED_1000baseT_Full |
b4617240 124 SUPPORTED_TP | SUPPORTED_Autoneg);
735441fb
AV		 125
126 ecmd->advertising = (ADVERTISED_TP | ADVERTISED_Autoneg);
127 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
128 ecmd->advertising |= ADVERTISED_10000baseT_Full;
129 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
130 ecmd->advertising |= ADVERTISED_1000baseT_Full;
131
132 ecmd->port = PORT_TP;
1e336d0f
DS		 133 } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
134 /* Set as FIBRE until SERDES defined in kernel */
135 switch (hw->device_id) {
136 case IXGBE_DEV_ID_82598:
137 ecmd->supported |= (SUPPORTED_1000baseT_Full |
138 SUPPORTED_FIBRE);
139 ecmd->advertising = (ADVERTISED_10000baseT_Full |
140 ADVERTISED_1000baseT_Full |
141 ADVERTISED_FIBRE);
142 ecmd->port = PORT_FIBRE;
143 break;
2f21bdd3
DS		 144 case IXGBE_DEV_ID_82598_BX:
145 ecmd->supported = (SUPPORTED_1000baseT_Full |
146 SUPPORTED_FIBRE);
147 ecmd->advertising = (ADVERTISED_1000baseT_Full |
148 ADVERTISED_FIBRE);
149 ecmd->port = PORT_FIBRE;
150 ecmd->autoneg = AUTONEG_DISABLE;
151 break;
1e336d0f 152 }
735441fb
AV		 153 } else {
154 ecmd->supported |= SUPPORTED_FIBRE;
155 ecmd->advertising = (ADVERTISED_10000baseT_Full |
b4617240 156 ADVERTISED_FIBRE);
735441fb 157 ecmd->port = PORT_FIBRE;
c44ade9e 158 ecmd->autoneg = AUTONEG_DISABLE;
735441fb 159 }
9a799d71 160
c44ade9e 161 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
735441fb
AV		 162 if (link_up) {
163 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
b4617240 164 SPEED_10000 : SPEED_1000;
9a799d71
AK		 165 ecmd->duplex = DUPLEX_FULL;
166 } else {
167 ecmd->speed = -1;
168 ecmd->duplex = -1;
169 }
170
9a799d71
AK		 171 return 0;
172}
173
174static int ixgbe_set_settings(struct net_device *netdev,
b4617240 175 struct ethtool_cmd *ecmd)
9a799d71
AK		 176{
177 struct ixgbe_adapter *adapter = netdev_priv(netdev);
735441fb 178 struct ixgbe_hw *hw = &adapter->hw;
0befdb3e
JB		 179 u32 advertised, old;
180 s32 err;
9a799d71 181
735441fb
AV		 182 switch (hw->phy.media_type) {
183 case ixgbe_media_type_fiber:
184 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
185 (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
186 return -EINVAL;
187 /* in this case we currently only support 10Gb/FULL */
188 break;
0befdb3e
JB		 189 case ixgbe_media_type_copper:
190 /* 10000/copper and 1000/copper must autoneg
191 * this function does not support any duplex forcing, but can
192 * limit the advertising of the adapter to only 10000 or 1000 */
193 if (ecmd->autoneg == AUTONEG_DISABLE)
194 return -EINVAL;
195
196 old = hw->phy.autoneg_advertised;
197 advertised = 0;
198 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
199 advertised |= IXGBE_LINK_SPEED_10GB_FULL;
200
201 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
202 advertised |= IXGBE_LINK_SPEED_1GB_FULL;
203
204 if (old == advertised)
205 break;
206 /* this sets the link speed and restarts auto-neg */
207 err = hw->mac.ops.setup_link_speed(hw, advertised, true, true);
208 if (err) {
209 DPRINTK(PROBE, INFO,
210 "setup link failed with code %d\n", err);
211 hw->mac.ops.setup_link_speed(hw, old, true, true);
212 }
213 break;
735441fb
AV		 214 default:
215 break;
9a799d71
AK		 216 }
217
218 return 0;
219}
220
221static void ixgbe_get_pauseparam(struct net_device *netdev,
b4617240 222 struct ethtool_pauseparam *pause)
9a799d71
AK		 223{
224 struct ixgbe_adapter *adapter = netdev_priv(netdev);
225 struct ixgbe_hw *hw = &adapter->hw;
226
0ecc061d 227 pause->autoneg = (hw->fc.current_mode == ixgbe_fc_full ? 1 : 0);
9a799d71 228
0ecc061d 229 if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
9a799d71 230 pause->rx_pause = 1;
0ecc061d 231 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
9a799d71 232 pause->tx_pause = 1;
0ecc061d 233 } else if (hw->fc.current_mode == ixgbe_fc_full) {
9a799d71
AK		 234 pause->rx_pause = 1;
235 pause->tx_pause = 1;
236 }
237}
238
239static int ixgbe_set_pauseparam(struct net_device *netdev,
b4617240 240 struct ethtool_pauseparam *pause)
9a799d71
AK		 241{
242 struct ixgbe_adapter *adapter = netdev_priv(netdev);
243 struct ixgbe_hw *hw = &adapter->hw;
244
9c83b070
AV		 245 if ((pause->autoneg == AUTONEG_ENABLE) ||
246 (pause->rx_pause && pause->tx_pause))
0ecc061d 247 hw->fc.requested_mode = ixgbe_fc_full;
9a799d71 248 else if (pause->rx_pause && !pause->tx_pause)
0ecc061d 249 hw->fc.requested_mode = ixgbe_fc_rx_pause;
9a799d71 250 else if (!pause->rx_pause && pause->tx_pause)
0ecc061d 251 hw->fc.requested_mode = ixgbe_fc_tx_pause;
9a799d71 252 else if (!pause->rx_pause && !pause->tx_pause)
0ecc061d 253 hw->fc.requested_mode = ixgbe_fc_none;
9c83b070
AV		 254 else
255 return -EINVAL;
9a799d71 256
0ecc061d 257 hw->mac.ops.setup_fc(hw, 0);
9a799d71
AK		 258
259 return 0;
260}
261
262static u32 ixgbe_get_rx_csum(struct net_device *netdev)
263{
264 struct ixgbe_adapter *adapter = netdev_priv(netdev);
265 return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED);
266}
267
268static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
269{
270 struct ixgbe_adapter *adapter = netdev_priv(netdev);
271 if (data)
272 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
273 else
274 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
275
d4f80882
AV		 276 if (netif_running(netdev))
277 ixgbe_reinit_locked(adapter);
278 else
9a799d71 279 ixgbe_reset(adapter);
9a799d71
AK		 280
281 return 0;
282}
283
284static u32 ixgbe_get_tx_csum(struct net_device *netdev)
285{
22f32b7a 286 return (netdev->features & NETIF_F_IP_CSUM) != 0;
9a799d71
AK		 287}
288
289static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
290{
291 if (data)
22f32b7a 292 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
9a799d71 293 else
3d3d6d3c 294 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
9a799d71
AK		 295
296 return 0;
297}
298
299static int ixgbe_set_tso(struct net_device *netdev, u32 data)
300{
9a799d71
AK		 301 if (data) {
302 netdev->features |= NETIF_F_TSO;
303 netdev->features |= NETIF_F_TSO6;
304 } else {
fd2ea0a7 305 netif_tx_stop_all_queues(netdev);
9a799d71
AK		 306 netdev->features &= ~NETIF_F_TSO;
307 netdev->features &= ~NETIF_F_TSO6;
fd2ea0a7 308 netif_tx_start_all_queues(netdev);
9a799d71
AK		 309 }
310 return 0;
311}
312
313static u32 ixgbe_get_msglevel(struct net_device *netdev)
314{
315 struct ixgbe_adapter *adapter = netdev_priv(netdev);
316 return adapter->msg_enable;
317}
318
319static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
320{
321 struct ixgbe_adapter *adapter = netdev_priv(netdev);
322 adapter->msg_enable = data;
323}
324
325static int ixgbe_get_regs_len(struct net_device *netdev)
326{
327#define IXGBE_REGS_LEN 1128
328 return IXGBE_REGS_LEN * sizeof(u32);
329}
330
331#define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
332
333static void ixgbe_get_regs(struct net_device *netdev,
b4617240 334 struct ethtool_regs *regs, void *p)
9a799d71
AK		 335{
336 struct ixgbe_adapter *adapter = netdev_priv(netdev);
337 struct ixgbe_hw *hw = &adapter->hw;
338 u32 *regs_buff = p;
339 u8 i;
340
341 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
342
343 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
344
345 /* General Registers */
346 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
347 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
348 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
349 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
350 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
351 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
352 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
353 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
354
355 /* NVM Register */
356 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
357 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
358 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
359 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
360 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
361 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
362 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
363 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
364 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
365 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
366
367 /* Interrupt */
98c00a1c
JB		 368 /* don't read EICR because it can clear interrupt causes, instead
369 * read EICS which is a shadow but doesn't clear EICR */
370 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
9a799d71
AK		 371 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
372 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
373 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
374 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
375 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
376 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
377 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
378 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
379 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
c44ade9e 380 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
9a799d71
AK		 381 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
382
383 /* Flow Control */
384 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
385 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
386 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
387 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
388 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
389 for (i = 0; i < 8; i++)
390 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
391 for (i = 0; i < 8; i++)
392 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
393 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
394 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
395
396 /* Receive DMA */
397 for (i = 0; i < 64; i++)
398 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
399 for (i = 0; i < 64; i++)
400 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
401 for (i = 0; i < 64; i++)
402 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
403 for (i = 0; i < 64; i++)
404 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
405 for (i = 0; i < 64; i++)
406 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
407 for (i = 0; i < 64; i++)
408 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
409 for (i = 0; i < 16; i++)
410 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
411 for (i = 0; i < 16; i++)
412 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
413 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
414 for (i = 0; i < 8; i++)
415 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
416 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
417 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
418
419 /* Receive */
420 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
421 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
422 for (i = 0; i < 16; i++)
423 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
424 for (i = 0; i < 16; i++)
425 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
c44ade9e 426 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
9a799d71
AK		 427 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
428 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
429 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
430 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
431 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
432 for (i = 0; i < 8; i++)
433 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
434 for (i = 0; i < 8; i++)
435 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
436 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
437
438 /* Transmit */
439 for (i = 0; i < 32; i++)
440 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
441 for (i = 0; i < 32; i++)
442 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
443 for (i = 0; i < 32; i++)
444 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
445 for (i = 0; i < 32; i++)
446 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
447 for (i = 0; i < 32; i++)
448 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
449 for (i = 0; i < 32; i++)
450 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
451 for (i = 0; i < 32; i++)
452 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
453 for (i = 0; i < 32; i++)
454 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
455 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
456 for (i = 0; i < 16; i++)
457 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
458 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
459 for (i = 0; i < 8; i++)
460 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
461 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
462
463 /* Wake Up */
464 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
465 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
466 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
467 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
468 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
469 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
470 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
471 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
472 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT);
473
9a799d71
AK		 474 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
475 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
476 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
477 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
478 for (i = 0; i < 8; i++)
479 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
480 for (i = 0; i < 8; i++)
481 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
482 for (i = 0; i < 8; i++)
483 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
484 for (i = 0; i < 8; i++)
485 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
486 for (i = 0; i < 8; i++)
487 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
488 for (i = 0; i < 8; i++)
489 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
490
491 /* Statistics */
492 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
493 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
494 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
495 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
496 for (i = 0; i < 8; i++)
497 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
498 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
499 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
500 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
501 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
502 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
503 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
504 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
505 for (i = 0; i < 8; i++)
506 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
507 for (i = 0; i < 8; i++)
508 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
509 for (i = 0; i < 8; i++)
510 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
511 for (i = 0; i < 8; i++)
512 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
513 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
514 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
515 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
516 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
517 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
518 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
519 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
520 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
521 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
522 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
523 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
524 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
525 for (i = 0; i < 8; i++)
526 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
527 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
528 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
529 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
530 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
531 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
532 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
533 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
534 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
535 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
536 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
537 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
538 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
539 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
540 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
541 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
542 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
543 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
544 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
545 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
546 for (i = 0; i < 16; i++)
547 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
548 for (i = 0; i < 16; i++)
549 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
550 for (i = 0; i < 16; i++)
551 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
552 for (i = 0; i < 16; i++)
553 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
554
555 /* MAC */
556 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
557 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
558 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
559 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
560 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
561 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
562 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
563 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
564 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
565 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
566 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
567 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
568 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
569 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
570 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
571 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
572 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
573 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
574 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
575 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
576 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
577 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
578 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
579 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
580 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
581 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
582 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
583 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
584 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
585 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
586 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
587 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
588 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
589
590 /* Diagnostic */
591 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
592 for (i = 0; i < 8; i++)
98c00a1c 593 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
9a799d71 594 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
98c00a1c
JB		 595 for (i = 0; i < 4; i++)
596 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
9a799d71
AK		 597 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
598 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
599 for (i = 0; i < 8; i++)
98c00a1c 600 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
9a799d71 601 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
98c00a1c
JB		 602 for (i = 0; i < 4; i++)
603 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
9a799d71
AK		 604 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
605 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
606 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
607 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
608 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
609 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
610 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
611 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
612 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
613 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
614 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
615 for (i = 0; i < 8; i++)
98c00a1c 616 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
9a799d71
AK		 617 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
618 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
619 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
620 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
621 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
622 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
623 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
624 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
625 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
626}
627
628static int ixgbe_get_eeprom_len(struct net_device *netdev)
629{
630 struct ixgbe_adapter *adapter = netdev_priv(netdev);
631 return adapter->hw.eeprom.word_size * 2;
632}
633
634static int ixgbe_get_eeprom(struct net_device *netdev,
b4617240 635 struct ethtool_eeprom *eeprom, u8 *bytes)
9a799d71
AK		 636{
637 struct ixgbe_adapter *adapter = netdev_priv(netdev);
638 struct ixgbe_hw *hw = &adapter->hw;
639 u16 *eeprom_buff;
640 int first_word, last_word, eeprom_len;
641 int ret_val = 0;
642 u16 i;
643
644 if (eeprom->len == 0)
645 return -EINVAL;
646
647 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
648
649 first_word = eeprom->offset >> 1;
650 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
651 eeprom_len = last_word - first_word + 1;
652
653 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
654 if (!eeprom_buff)
655 return -ENOMEM;
656
657 for (i = 0; i < eeprom_len; i++) {
c44ade9e 658 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
b4617240 659 &eeprom_buff[i])))
9a799d71
AK		 660 break;
661 }
662
663 /* Device's eeprom is always little-endian, word addressable */
664 for (i = 0; i < eeprom_len; i++)
665 le16_to_cpus(&eeprom_buff[i]);
666
667 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
668 kfree(eeprom_buff);
669
670 return ret_val;
671}
672
673static void ixgbe_get_drvinfo(struct net_device *netdev,
b4617240 674 struct ethtool_drvinfo *drvinfo)
9a799d71
AK		 675{
676 struct ixgbe_adapter *adapter = netdev_priv(netdev);
34b0368c 677 char firmware_version[32];
9a799d71
AK		 678
679 strncpy(drvinfo->driver, ixgbe_driver_name, 32);
680 strncpy(drvinfo->version, ixgbe_driver_version, 32);
34b0368c
PWJ		 681
682 sprintf(firmware_version, "%d.%d-%d",
683 (adapter->eeprom_version & 0xF000) >> 12,
684 (adapter->eeprom_version & 0x0FF0) >> 4,
685 adapter->eeprom_version & 0x000F);
686
687 strncpy(drvinfo->fw_version, firmware_version, 32);
9a799d71
AK		 688 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
689 drvinfo->n_stats = IXGBE_STATS_LEN;
690 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
691}
692
693static void ixgbe_get_ringparam(struct net_device *netdev,
b4617240 694 struct ethtool_ringparam *ring)
9a799d71
AK		 695{
696 struct ixgbe_adapter *adapter = netdev_priv(netdev);
697 struct ixgbe_ring *tx_ring = adapter->tx_ring;
698 struct ixgbe_ring *rx_ring = adapter->rx_ring;
699
700 ring->rx_max_pending = IXGBE_MAX_RXD;
701 ring->tx_max_pending = IXGBE_MAX_TXD;
702 ring->rx_mini_max_pending = 0;
703 ring->rx_jumbo_max_pending = 0;
704 ring->rx_pending = rx_ring->count;
705 ring->tx_pending = tx_ring->count;
706 ring->rx_mini_pending = 0;
707 ring->rx_jumbo_pending = 0;
708}
709
710static int ixgbe_set_ringparam(struct net_device *netdev,
b4617240 711 struct ethtool_ringparam *ring)
9a799d71
AK		 712{
713 struct ixgbe_adapter *adapter = netdev_priv(netdev);
c431f97e 714 struct ixgbe_ring *temp_ring;
9a799d71 715 int i, err;
c431f97e 716 u32 new_rx_count, new_tx_count;
9a799d71
AK		 717
718 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
719 return -EINVAL;
720
721 new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
722 new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
723 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
724
725 new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
726 new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
727 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
728
729 if ((new_tx_count == adapter->tx_ring->count) &&
730 (new_rx_count == adapter->rx_ring->count)) {
731 /* nothing to do */
732 return 0;
733 }
734
d3fa4721
PWJ		 735 temp_ring = kcalloc(adapter->num_tx_queues,
736 sizeof(struct ixgbe_ring), GFP_KERNEL);
c431f97e
JB		 737 if (!temp_ring)
738 return -ENOMEM;
739
d4f80882
AV		 740 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
741 msleep(1);
742
9a799d71
AK		 743 if (new_tx_count != adapter->tx_ring->count) {
744 for (i = 0; i < adapter->num_tx_queues; i++) {
c431f97e
JB		 745 temp_ring[i].count = new_tx_count;
746 err = ixgbe_setup_tx_resources(adapter, &temp_ring[i]);
9a799d71 747 if (err) {
c431f97e
JB		 748 while (i) {
749 i--;
b4617240
PW		 750 ixgbe_free_tx_resources(adapter,
751 &temp_ring[i]);
c431f97e 752 }
9a799d71
AK		 753 goto err_setup;
754 }
d3fa4721 755 temp_ring[i].v_idx = adapter->tx_ring[i].v_idx;
9a799d71 756 }
d3fa4721
PWJ		 757 if (netif_running(netdev))
758 netdev->netdev_ops->ndo_stop(netdev);
759 ixgbe_reset_interrupt_capability(adapter);
760 ixgbe_napi_del_all(adapter);
761 INIT_LIST_HEAD(&netdev->napi_list);
762 kfree(adapter->tx_ring);
763 adapter->tx_ring = temp_ring;
764 temp_ring = NULL;
c431f97e 765 adapter->tx_ring_count = new_tx_count;
9a799d71
AK		 766 }
767
d3fa4721
PWJ		 768 temp_ring = kcalloc(adapter->num_rx_queues,
769 sizeof(struct ixgbe_ring), GFP_KERNEL);
770 if (!temp_ring) {
771 if (netif_running(netdev))
772 netdev->netdev_ops->ndo_open(netdev);
773 return -ENOMEM;
774 }
9a799d71 775
d3fa4721 776 if (new_rx_count != adapter->rx_ring->count) {
c431f97e
JB		 777 for (i = 0; i < adapter->num_rx_queues; i++) {
778 temp_ring[i].count = new_rx_count;
779 err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]);
9a799d71 780 if (err) {
c431f97e
JB		 781 while (i) {
782 i--;
b4617240
PW		 783 ixgbe_free_rx_resources(adapter,
784 &temp_ring[i]);
c431f97e 785 }
9a799d71
AK		 786 goto err_setup;
787 }
d3fa4721 788 temp_ring[i].v_idx = adapter->rx_ring[i].v_idx;
9a799d71 789 }
d3fa4721
PWJ		 790 if (netif_running(netdev))
791 netdev->netdev_ops->ndo_stop(netdev);
792 ixgbe_reset_interrupt_capability(adapter);
793 ixgbe_napi_del_all(adapter);
794 INIT_LIST_HEAD(&netdev->napi_list);
795 kfree(adapter->rx_ring);
796 adapter->rx_ring = temp_ring;
797 temp_ring = NULL;
c431f97e
JB		 798
799 adapter->rx_ring_count = new_rx_count;
9a799d71
AK		 800 }
801
c431f97e 802 /* success! */
9a799d71
AK		 803 err = 0;
804err_setup:
d3fa4721 805 ixgbe_init_interrupt_scheme(adapter);
c431f97e 806 if (netif_running(netdev))
d3fa4721 807 netdev->netdev_ops->ndo_open(netdev);
9a799d71 808
d4f80882 809 clear_bit(__IXGBE_RESETTING, &adapter->state);
9a799d71
AK		 810 return err;
811}
812
b9f2c044 813static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
9a799d71 814{
b9f2c044
JG		 815 switch (sset) {
816 case ETH_SS_STATS:
817 return IXGBE_STATS_LEN;
818 default:
819 return -EOPNOTSUPP;
820 }
9a799d71
AK		 821}
822
823static void ixgbe_get_ethtool_stats(struct net_device *netdev,
b4617240 824 struct ethtool_stats *stats, u64 *data)
9a799d71
AK		 825{
826 struct ixgbe_adapter *adapter = netdev_priv(netdev);
827 u64 *queue_stat;
828 int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
829 int j, k;
830 int i;
831
832 ixgbe_update_stats(adapter);
833 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
834 char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset;
835 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
b4617240 836 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
9a799d71
AK		 837 }
838 for (j = 0; j < adapter->num_tx_queues; j++) {
839 queue_stat = (u64 *)&adapter->tx_ring[j].stats;
840 for (k = 0; k < stat_count; k++)
841 data[i + k] = queue_stat[k];
842 i += k;
843 }
844 for (j = 0; j < adapter->num_rx_queues; j++) {
845 queue_stat = (u64 *)&adapter->rx_ring[j].stats;
846 for (k = 0; k < stat_count; k++)
847 data[i + k] = queue_stat[k];
848 i += k;
849 }
2f90b865
AD		 850 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
851 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
852 data[i++] = adapter->stats.pxontxc[j];
853 data[i++] = adapter->stats.pxofftxc[j];
854 }
855 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
856 data[i++] = adapter->stats.pxonrxc[j];
857 data[i++] = adapter->stats.pxoffrxc[j];
858 }
859 }
9a799d71
AK		 860}
861
862static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
b4617240 863 u8 *data)
9a799d71
AK		 864{
865 struct ixgbe_adapter *adapter = netdev_priv(netdev);
c44ade9e 866 char *p = (char *)data;
9a799d71
AK		 867 int i;
868
869 switch (stringset) {
870 case ETH_SS_STATS:
871 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
872 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
873 ETH_GSTRING_LEN);
874 p += ETH_GSTRING_LEN;
875 }
876 for (i = 0; i < adapter->num_tx_queues; i++) {
877 sprintf(p, "tx_queue_%u_packets", i);
878 p += ETH_GSTRING_LEN;
879 sprintf(p, "tx_queue_%u_bytes", i);
880 p += ETH_GSTRING_LEN;
881 }
882 for (i = 0; i < adapter->num_rx_queues; i++) {
883 sprintf(p, "rx_queue_%u_packets", i);
884 p += ETH_GSTRING_LEN;
885 sprintf(p, "rx_queue_%u_bytes", i);
886 p += ETH_GSTRING_LEN;
887 }
2f90b865
AD		 888 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
889 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
890 sprintf(p, "tx_pb_%u_pxon", i);
bfb8cc31
DS		 891 p += ETH_GSTRING_LEN;
892 sprintf(p, "tx_pb_%u_pxoff", i);
893 p += ETH_GSTRING_LEN;
2f90b865
AD		 894 }
895 for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
bfb8cc31
DS		 896 sprintf(p, "rx_pb_%u_pxon", i);
897 p += ETH_GSTRING_LEN;
898 sprintf(p, "rx_pb_%u_pxoff", i);
899 p += ETH_GSTRING_LEN;
2f90b865
AD		 900 }
901 }
b4617240 902 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
9a799d71
AK		 903 break;
904 }
905}
906
907
908static void ixgbe_get_wol(struct net_device *netdev,
b4617240 909 struct ethtool_wolinfo *wol)
9a799d71
AK		 910{
911 wol->supported = 0;
912 wol->wolopts = 0;
913
914 return;
915}
916
917static int ixgbe_nway_reset(struct net_device *netdev)
918{
919 struct ixgbe_adapter *adapter = netdev_priv(netdev);
920
d4f80882
AV		 921 if (netif_running(netdev))
922 ixgbe_reinit_locked(adapter);
9a799d71
AK		 923
924 return 0;
925}
926
927static int ixgbe_phys_id(struct net_device *netdev, u32 data)
928{
929 struct ixgbe_adapter *adapter = netdev_priv(netdev);
c44ade9e
JB		 930 struct ixgbe_hw *hw = &adapter->hw;
931 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
9a799d71
AK		 932 u32 i;
933
934 if (!data || data > 300)
935 data = 300;
936
937 for (i = 0; i < (data * 1000); i += 400) {
c44ade9e 938 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
9a799d71 939 msleep_interruptible(200);
c44ade9e 940 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
9a799d71
AK		 941 msleep_interruptible(200);
942 }
943
944 /* Restore LED settings */
945 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
946
947 return 0;
948}
949
950static int ixgbe_get_coalesce(struct net_device *netdev,
b4617240 951 struct ethtool_coalesce *ec)
9a799d71
AK		 952{
953 struct ixgbe_adapter *adapter = netdev_priv(netdev);
954
9a799d71 955 ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit;
30efa5a3
JB		 956
957 /* only valid if in constant ITR mode */
958 switch (adapter->itr_setting) {
959 case 0:
960 /* throttling disabled */
961 ec->rx_coalesce_usecs = 0;
962 break;
963 case 1:
964 /* dynamic ITR mode */
965 ec->rx_coalesce_usecs = 1;
966 break;
967 default:
968 /* fixed interrupt rate mode */
969 ec->rx_coalesce_usecs = 1000000/adapter->eitr_param;
970 break;
971 }
9a799d71
AK		 972 return 0;
973}
974
975static int ixgbe_set_coalesce(struct net_device *netdev,
b4617240 976 struct ethtool_coalesce *ec)
9a799d71
AK		 977{
978 struct ixgbe_adapter *adapter = netdev_priv(netdev);
30efa5a3
JB		 979 struct ixgbe_hw *hw = &adapter->hw;
980 int i;
9a799d71
AK		 981
982 if (ec->tx_max_coalesced_frames_irq)
30efa5a3
JB		 983 adapter->tx_ring[0].work_limit = ec->tx_max_coalesced_frames_irq;
984
985 if (ec->rx_coalesce_usecs > 1) {
986 /* store the value in ints/second */
987 adapter->eitr_param = 1000000/ec->rx_coalesce_usecs;
988
989 /* static value of interrupt rate */
990 adapter->itr_setting = adapter->eitr_param;
991 /* clear the lower bit */
992 adapter->itr_setting &= ~1;
993 } else if (ec->rx_coalesce_usecs == 1) {
994 /* 1 means dynamic mode */
995 adapter->eitr_param = 20000;
996 adapter->itr_setting = 1;
997 } else {
998 /* any other value means disable eitr, which is best
999 * served by setting the interrupt rate very high */
1000 adapter->eitr_param = 3000000;
1001 adapter->itr_setting = 0;
1002 }
9a799d71 1003
30efa5a3
JB		 1004 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
1005 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
1006 if (q_vector->txr_count && !q_vector->rxr_count)
1007 q_vector->eitr = (adapter->eitr_param >> 1);
1008 else
1009 /* rx only or mixed */
1010 q_vector->eitr = adapter->eitr_param;
1011 IXGBE_WRITE_REG(hw, IXGBE_EITR(i),
1012 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
9a799d71
AK		 1013 }
1014
1015 return 0;
1016}
1017
1018
b9804972 1019static const struct ethtool_ops ixgbe_ethtool_ops = {
9a799d71
AK		 1020 .get_settings = ixgbe_get_settings,
1021 .set_settings = ixgbe_set_settings,
1022 .get_drvinfo = ixgbe_get_drvinfo,
1023 .get_regs_len = ixgbe_get_regs_len,
1024 .get_regs = ixgbe_get_regs,
1025 .get_wol = ixgbe_get_wol,
1026 .nway_reset = ixgbe_nway_reset,
1027 .get_link = ethtool_op_get_link,
1028 .get_eeprom_len = ixgbe_get_eeprom_len,
1029 .get_eeprom = ixgbe_get_eeprom,
1030 .get_ringparam = ixgbe_get_ringparam,
1031 .set_ringparam = ixgbe_set_ringparam,
1032 .get_pauseparam = ixgbe_get_pauseparam,
1033 .set_pauseparam = ixgbe_set_pauseparam,
1034 .get_rx_csum = ixgbe_get_rx_csum,
1035 .set_rx_csum = ixgbe_set_rx_csum,
1036 .get_tx_csum = ixgbe_get_tx_csum,
1037 .set_tx_csum = ixgbe_set_tx_csum,
1038 .get_sg = ethtool_op_get_sg,
1039 .set_sg = ethtool_op_set_sg,
1040 .get_msglevel = ixgbe_get_msglevel,
1041 .set_msglevel = ixgbe_set_msglevel,
1042 .get_tso = ethtool_op_get_tso,
1043 .set_tso = ixgbe_set_tso,
1044 .get_strings = ixgbe_get_strings,
1045 .phys_id = ixgbe_phys_id,
b4617240 1046 .get_sset_count = ixgbe_get_sset_count,
9a799d71
AK		 1047 .get_ethtool_stats = ixgbe_get_ethtool_stats,
1048 .get_coalesce = ixgbe_get_coalesce,
1049 .set_coalesce = ixgbe_set_coalesce,
177db6ff
MC		 1050 .get_flags = ethtool_op_get_flags,
1051 .set_flags = ethtool_op_set_flags,
9a799d71
AK		 1052};
1053
1054void ixgbe_set_ethtool_ops(struct net_device *netdev)
1055{
1056 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
1057}
Linux kernel - Deliverables
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