[deliverable/linux.git] / drivers / net / vmxnet3 / vmxnet3_int.h

/*
 * Linux driver for VMware's vmxnet3 ethernet NIC.
 *
 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; version 2 of the License and no later version.
 *
 * This program is distributed in the hope that it will be useful, but
 * WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 * NON INFRINGEMENT.  See the GNU General Public License for more
 * details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 *
 * The full GNU General Public License is included in this distribution in
 * the file called "COPYING".
 *
 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
 *
 */

#ifndef _VMXNET3_INT_H
#define _VMXNET3_INT_H

#include <linux/bitops.h>
#include <linux/ethtool.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/pci.h>
#include <linux/compiler.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/ioport.h>
#include <linux/highmem.h>
#include <linux/timer.h>
#include <linux/skbuff.h>
#include <linux/interrupt.h>
#include <linux/workqueue.h>
#include <linux/uaccess.h>
#include <asm/dma.h>
#include <asm/page.h>

#include <linux/tcp.h>
#include <linux/udp.h>
#include <linux/ip.h>
#include <linux/ipv6.h>
#include <linux/in.h>
#include <linux/etherdevice.h>
#include <asm/checksum.h>
#include <linux/if_vlan.h>
#include <linux/if_arp.h>
#include <linux/inetdevice.h>
#include <linux/log2.h>

#include "vmxnet3_defs.h"

#ifdef DEBUG
# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)"
#else
# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI"
#endif


/*
 * Version numbers
 */
#define VMXNET3_DRIVER_VERSION_STRING   "1.4.7.0-k"

/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */
#define VMXNET3_DRIVER_VERSION_NUM      0x01040700

#if defined(CONFIG_PCI_MSI)
	/* RSS only makes sense if MSI-X is supported. */
	#define VMXNET3_RSS
#endif

/*
 * Capabilities
 */

enum {
	VMNET_CAP_SG	        = 0x0001, /* Can do scatter-gather transmits. */
	VMNET_CAP_IP4_CSUM      = 0x0002, /* Can checksum only TCP/UDP over
					   * IPv4 */
	VMNET_CAP_HW_CSUM       = 0x0004, /* Can checksum all packets. */
	VMNET_CAP_HIGH_DMA      = 0x0008, /* Can DMA to high memory. */
	VMNET_CAP_TOE	        = 0x0010, /* Supports TCP/IP offload. */
	VMNET_CAP_TSO	        = 0x0020, /* Supports TCP Segmentation
					   * offload */
	VMNET_CAP_SW_TSO        = 0x0040, /* Supports SW TCP Segmentation */
	VMNET_CAP_VMXNET_APROM  = 0x0080, /* Vmxnet APROM support */
	VMNET_CAP_HW_TX_VLAN    = 0x0100, /* Can we do VLAN tagging in HW */
	VMNET_CAP_HW_RX_VLAN    = 0x0200, /* Can we do VLAN untagging in HW */
	VMNET_CAP_SW_VLAN       = 0x0400, /* VLAN tagging/untagging in SW */
	VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */
	VMNET_CAP_ENABLE_INT_INLINE = 0x1000,  /* Enable Interrupt Inline */
	VMNET_CAP_ENABLE_HEADER_COPY = 0x2000,  /* copy header for vmkernel */
	VMNET_CAP_TX_CHAIN      = 0x4000, /* Guest can use multiple tx entries
					  * for a pkt */
	VMNET_CAP_RX_CHAIN      = 0x8000, /* pkt can span multiple rx entries */
	VMNET_CAP_LPD           = 0x10000, /* large pkt delivery */
	VMNET_CAP_BPF           = 0x20000, /* BPF Support in VMXNET Virtual HW*/
	VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/
					   /* pages transmits */
	VMNET_CAP_IP6_CSUM      = 0x80000, /* Can do IPv6 csum offload. */
	VMNET_CAP_TSO6         = 0x100000, /* TSO seg. offload for IPv6 pkts. */
	VMNET_CAP_TSO256k      = 0x200000, /* Can do TSO seg offload for */
					   /* pkts up to 256kB. */
	VMNET_CAP_UPT          = 0x400000  /* Support UPT */
};

/*
 * PCI vendor and device IDs.
 */
#define PCI_DEVICE_ID_VMWARE_VMXNET3    0x07B0
#define MAX_ETHERNET_CARDS		10
#define MAX_PCI_PASSTHRU_DEVICE		6

struct vmxnet3_cmd_ring {
	union Vmxnet3_GenericDesc *base;
	u32		size;
	u32		next2fill;
	u32		next2comp;
	u8		gen;
	dma_addr_t	basePA;
};

static inline void
vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring)
{
	ring->next2fill++;
	if (unlikely(ring->next2fill == ring->size)) {
		ring->next2fill = 0;
		VMXNET3_FLIP_RING_GEN(ring->gen);
	}
}

static inline void
vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring)
{
	VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size);
}

static inline int
vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring)
{
	return (ring->next2comp > ring->next2fill ? 0 : ring->size) +
		ring->next2comp - ring->next2fill - 1;
}

struct vmxnet3_comp_ring {
	union Vmxnet3_GenericDesc *base;
	u32               size;
	u32               next2proc;
	u8                gen;
	u8                intr_idx;
	dma_addr_t           basePA;
};

static inline void
vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring)
{
	ring->next2proc++;
	if (unlikely(ring->next2proc == ring->size)) {
		ring->next2proc = 0;
		VMXNET3_FLIP_RING_GEN(ring->gen);
	}
}

struct vmxnet3_tx_data_ring {
	struct Vmxnet3_TxDataDesc *base;
	u32              size;
	dma_addr_t          basePA;
};

enum vmxnet3_buf_map_type {
	VMXNET3_MAP_INVALID = 0,
	VMXNET3_MAP_NONE,
	VMXNET3_MAP_SINGLE,
	VMXNET3_MAP_PAGE,
};

struct vmxnet3_tx_buf_info {
	u32      map_type;
	u16      len;
	u16      sop_idx;
	dma_addr_t  dma_addr;
	struct sk_buff *skb;
};

struct vmxnet3_tq_driver_stats {
	u64 drop_total;     /* # of pkts dropped by the driver, the
				* counters below track droppings due to
				* different reasons
				*/
	u64 drop_too_many_frags;
	u64 drop_oversized_hdr;
	u64 drop_hdr_inspect_err;
	u64 drop_tso;

	u64 tx_ring_full;
	u64 linearized;         /* # of pkts linearized */
	u64 copy_skb_header;    /* # of times we have to copy skb header */
	u64 oversized_hdr;
};

struct vmxnet3_tx_ctx {
	bool   ipv4;
	bool   ipv6;
	u16 mss;
	u32 eth_ip_hdr_size; /* only valid for pkts requesting tso or csum
				 * offloading
				 */
	u32 l4_hdr_size;     /* only valid if mss != 0 */
	u32 copy_size;       /* # of bytes copied into the data ring */
	union Vmxnet3_GenericDesc *sop_txd;
	union Vmxnet3_GenericDesc *eop_txd;
};

struct vmxnet3_tx_queue {
	char			name[IFNAMSIZ+8]; /* To identify interrupt */
	struct vmxnet3_adapter		*adapter;
	spinlock_t                      tx_lock;
	struct vmxnet3_cmd_ring         tx_ring;
	struct vmxnet3_tx_buf_info      *buf_info;
	dma_addr_t                       buf_info_pa;
	struct vmxnet3_tx_data_ring     data_ring;
	struct vmxnet3_comp_ring        comp_ring;
	struct Vmxnet3_TxQueueCtrl      *shared;
	struct vmxnet3_tq_driver_stats  stats;
	bool                            stopped;
	int                             num_stop;  /* # of times the queue is
						    * stopped */
	int				qid;
} __attribute__((__aligned__(SMP_CACHE_BYTES)));

enum vmxnet3_rx_buf_type {
	VMXNET3_RX_BUF_NONE = 0,
	VMXNET3_RX_BUF_SKB = 1,
	VMXNET3_RX_BUF_PAGE = 2
};

struct vmxnet3_rx_buf_info {
	enum vmxnet3_rx_buf_type buf_type;
	u16     len;
	union {
		struct sk_buff *skb;
		struct page    *page;
	};
	dma_addr_t dma_addr;
};

struct vmxnet3_rx_ctx {
	struct sk_buff *skb;
	u32 sop_idx;
};

struct vmxnet3_rq_driver_stats {
	u64 drop_total;
	u64 drop_err;
	u64 drop_fcs;
	u64 rx_buf_alloc_failure;
};

struct vmxnet3_rx_queue {
	char			name[IFNAMSIZ + 8]; /* To identify interrupt */
	struct vmxnet3_adapter	  *adapter;
	struct napi_struct        napi;
	struct vmxnet3_cmd_ring   rx_ring[2];
	struct vmxnet3_comp_ring  comp_ring;
	struct vmxnet3_rx_ctx     rx_ctx;
	u32 qid;            /* rqID in RCD for buffer from 1st ring */
	u32 qid2;           /* rqID in RCD for buffer from 2nd ring */
	struct vmxnet3_rx_buf_info     *buf_info[2];
	dma_addr_t                      buf_info_pa;
	struct Vmxnet3_RxQueueCtrl            *shared;
	struct vmxnet3_rq_driver_stats  stats;
} __attribute__((__aligned__(SMP_CACHE_BYTES)));

#define VMXNET3_DEVICE_MAX_TX_QUEUES 8
#define VMXNET3_DEVICE_MAX_RX_QUEUES 8   /* Keep this value as a power of 2 */

/* Should be less than UPT1_RSS_MAX_IND_TABLE_SIZE */
#define VMXNET3_RSS_IND_TABLE_SIZE (VMXNET3_DEVICE_MAX_RX_QUEUES * 4)

#define VMXNET3_LINUX_MAX_MSIX_VECT     (VMXNET3_DEVICE_MAX_TX_QUEUES + \
					 VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
#define VMXNET3_LINUX_MIN_MSIX_VECT     2 /* 1 for tx-rx pair and 1 for event */


struct vmxnet3_intr {
	enum vmxnet3_intr_mask_mode  mask_mode;
	enum vmxnet3_intr_type       type;	/* MSI-X, MSI, or INTx? */
	u8  num_intrs;			/* # of intr vectors */
	u8  event_intr_idx;		/* idx of the intr vector for event */
	u8  mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */
	char	event_msi_vector_name[IFNAMSIZ+11];
#ifdef CONFIG_PCI_MSI
	struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT];
#endif
};

/* Interrupt sharing schemes, share_intr */
#define VMXNET3_INTR_BUDDYSHARE 0    /* Corresponding tx,rx queues share irq */
#define VMXNET3_INTR_TXSHARE 1	     /* All tx queues share one irq */
#define VMXNET3_INTR_DONTSHARE 2     /* each queue has its own irq */


#define VMXNET3_STATE_BIT_RESETTING   0
#define VMXNET3_STATE_BIT_QUIESCED    1
struct vmxnet3_adapter {
	struct vmxnet3_tx_queue		tx_queue[VMXNET3_DEVICE_MAX_TX_QUEUES];
	struct vmxnet3_rx_queue		rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
	unsigned long			active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
	struct vmxnet3_intr		intr;
	spinlock_t			cmd_lock;
	struct Vmxnet3_DriverShared	*shared;
	struct Vmxnet3_PMConf		*pm_conf;
	struct Vmxnet3_TxQueueDesc	*tqd_start;     /* all tx queue desc */
	struct Vmxnet3_RxQueueDesc	*rqd_start;	/* all rx queue desc */
	struct net_device		*netdev;
	struct pci_dev			*pdev;

	u8			__iomem *hw_addr0; /* for BAR 0 */
	u8			__iomem *hw_addr1; /* for BAR 1 */
	u8                              version;

	bool				rxcsum;
	bool				lro;

#ifdef VMXNET3_RSS
	struct UPT1_RSSConf		*rss_conf;
	bool				rss;
#endif
	u32				num_rx_queues;
	u32				num_tx_queues;

	/* rx buffer related */
	unsigned			skb_buf_size;
	int		rx_buf_per_pkt;  /* only apply to the 1st ring */
	dma_addr_t			shared_pa;
	dma_addr_t queue_desc_pa;

	/* Wake-on-LAN */
	u32     wol;

	/* Link speed */
	u32     link_speed; /* in mbps */

	u64     tx_timeout_count;

	/* Ring sizes */
	u32 tx_ring_size;
	u32 rx_ring_size;
	u32 rx_ring2_size;

	struct work_struct work;

	unsigned long  state;    /* VMXNET3_STATE_BIT_xxx */

	int share_intr;

	dma_addr_t adapter_pa;
	dma_addr_t pm_conf_pa;
	dma_addr_t rss_conf_pa;
};

#define VMXNET3_WRITE_BAR0_REG(adapter, reg, val)  \
	writel((val), (adapter)->hw_addr0 + (reg))
#define VMXNET3_READ_BAR0_REG(adapter, reg)        \
	readl((adapter)->hw_addr0 + (reg))

#define VMXNET3_WRITE_BAR1_REG(adapter, reg, val)  \
	writel((val), (adapter)->hw_addr1 + (reg))
#define VMXNET3_READ_BAR1_REG(adapter, reg)        \
	readl((adapter)->hw_addr1 + (reg))

#define VMXNET3_WAKE_QUEUE_THRESHOLD(tq)  (5)
#define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \
	((rq)->rx_ring[ring_idx].size >> 3)

#define VMXNET3_GET_ADDR_LO(dma)   ((u32)(dma))
#define VMXNET3_GET_ADDR_HI(dma)   ((u32)(((u64)(dma)) >> 32))

/* must be a multiple of VMXNET3_RING_SIZE_ALIGN */
#define VMXNET3_DEF_TX_RING_SIZE    512
#define VMXNET3_DEF_RX_RING_SIZE    256
#define VMXNET3_DEF_RX_RING2_SIZE   128

#define VMXNET3_MAX_ETH_HDR_SIZE    22
#define VMXNET3_MAX_SKB_BUF_SIZE    (3*1024)

int
vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter);

int
vmxnet3_activate_dev(struct vmxnet3_adapter *adapter);

void
vmxnet3_force_close(struct vmxnet3_adapter *adapter);

void
vmxnet3_reset_dev(struct vmxnet3_adapter *adapter);

void
vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter);

void
vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter);

int
vmxnet3_set_features(struct net_device *netdev, netdev_features_t features);

int
vmxnet3_create_queues(struct vmxnet3_adapter *adapter,
		      u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size);

void vmxnet3_set_ethtool_ops(struct net_device *netdev);

struct rtnl_link_stats64 *
vmxnet3_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats);

extern char vmxnet3_driver_name[];
#endif
Commit	Line	Data
d1a890fa SB	1	/*
	2	* Linux driver for VMware's vmxnet3 ethernet NIC.
	3	*
	4	* Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License as published by the
	8	* Free Software Foundation; version 2 of the License and no later version.
	9	*
	10	* This program is distributed in the hope that it will be useful, but
	11	* WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
	13	* NON INFRINGEMENT. See the GNU General Public License for more
	14	* details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
	19	*
	20	* The full GNU General Public License is included in this distribution in
	21	* the file called "COPYING".
	22	*
	23	* Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
	24	*
	25	*/
	26
	27	#ifndef _VMXNET3_INT_H
	28	#define _VMXNET3_INT_H
	29
72e85c45	30	#include <linux/bitops.h>
d1a890fa SB	31	#include <linux/ethtool.h>
	32	#include <linux/delay.h>
	33	#include <linux/netdevice.h>
	34	#include <linux/pci.h>
d1a890fa	35	#include <linux/compiler.h>
d1a890fa SB	36	#include <linux/slab.h>
	37	#include <linux/spinlock.h>
	38	#include <linux/ioport.h>
	39	#include <linux/highmem.h>
d1a890fa SB	40	#include <linux/timer.h>
	41	#include <linux/skbuff.h>
	42	#include <linux/interrupt.h>
	43	#include <linux/workqueue.h>
	44	#include <linux/uaccess.h>
	45	#include <asm/dma.h>
	46	#include <asm/page.h>
	47
	48	#include <linux/tcp.h>
	49	#include <linux/udp.h>
	50	#include <linux/ip.h>
	51	#include <linux/ipv6.h>
	52	#include <linux/in.h>
	53	#include <linux/etherdevice.h>
	54	#include <asm/checksum.h>
	55	#include <linux/if_vlan.h>
	56	#include <linux/if_arp.h>
	57	#include <linux/inetdevice.h>
eebb02b1	58	#include <linux/log2.h>
d1a890fa SB	59
	60	#include "vmxnet3_defs.h"
	61
	62	#ifdef DEBUG
	63	# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)"
	64	#else
	65	# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI"
	66	#endif
	67
	68
	69	/*
	70	* Version numbers
	71	*/
f0d43780	72	#define VMXNET3_DRIVER_VERSION_STRING "1.4.7.0-k"
d1a890fa SB	73
d1a890fa SB	74	/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */
f0d43780	75	#define VMXNET3_DRIVER_VERSION_NUM 0x01040700
d1a890fa	76
09c5088e SB	77	#if defined(CONFIG_PCI_MSI)
	78	/* RSS only makes sense if MSI-X is supported. */
	79	#define VMXNET3_RSS
	80	#endif
d1a890fa SB	81
	82	/*
	83	* Capabilities
	84	*/
	85
	86	enum {
	87	VMNET_CAP_SG = 0x0001, /* Can do scatter-gather transmits. */
	88	VMNET_CAP_IP4_CSUM = 0x0002, /* Can checksum only TCP/UDP over
	89	* IPv4 */
	90	VMNET_CAP_HW_CSUM = 0x0004, /* Can checksum all packets. */
	91	VMNET_CAP_HIGH_DMA = 0x0008, /* Can DMA to high memory. */
	92	VMNET_CAP_TOE = 0x0010, /* Supports TCP/IP offload. */
	93	VMNET_CAP_TSO = 0x0020, /* Supports TCP Segmentation
	94	* offload */
	95	VMNET_CAP_SW_TSO = 0x0040, /* Supports SW TCP Segmentation */
	96	VMNET_CAP_VMXNET_APROM = 0x0080, /* Vmxnet APROM support */
	97	VMNET_CAP_HW_TX_VLAN = 0x0100, /* Can we do VLAN tagging in HW */
	98	VMNET_CAP_HW_RX_VLAN = 0x0200, /* Can we do VLAN untagging in HW */
	99	VMNET_CAP_SW_VLAN = 0x0400, /* VLAN tagging/untagging in SW */
	100	VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */
	101	VMNET_CAP_ENABLE_INT_INLINE = 0x1000, /* Enable Interrupt Inline */
	102	VMNET_CAP_ENABLE_HEADER_COPY = 0x2000, /* copy header for vmkernel */
	103	VMNET_CAP_TX_CHAIN = 0x4000, /* Guest can use multiple tx entries
	104	* for a pkt */
	105	VMNET_CAP_RX_CHAIN = 0x8000, /* pkt can span multiple rx entries */
	106	VMNET_CAP_LPD = 0x10000, /* large pkt delivery */
	107	VMNET_CAP_BPF = 0x20000, /* BPF Support in VMXNET Virtual HW*/
	108	VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/
	109	/* pages transmits */
	110	VMNET_CAP_IP6_CSUM = 0x80000, /* Can do IPv6 csum offload. */
	111	VMNET_CAP_TSO6 = 0x100000, /* TSO seg. offload for IPv6 pkts. */
	112	VMNET_CAP_TSO256k = 0x200000, /* Can do TSO seg offload for */
	113	/* pkts up to 256kB. */
	114	VMNET_CAP_UPT = 0x400000 /* Support UPT */
	115	};
	116
	117	/*
	118	* PCI vendor and device IDs.
	119	*/
d1a890fa SB	120	#define PCI_DEVICE_ID_VMWARE_VMXNET3 0x07B0
	121	#define MAX_ETHERNET_CARDS 10
	122	#define MAX_PCI_PASSTHRU_DEVICE 6
	123
	124	struct vmxnet3_cmd_ring {
	125	union Vmxnet3_GenericDesc *base;
	126	u32 size;
	127	u32 next2fill;
	128	u32 next2comp;
	129	u8 gen;
	130	dma_addr_t basePA;
	131	};
	132
	133	static inline void
	134	vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring)
	135	{
	136	ring->next2fill++;
	137	if (unlikely(ring->next2fill == ring->size)) {
	138	ring->next2fill = 0;
	139	VMXNET3_FLIP_RING_GEN(ring->gen);
	140	}
	141	}
	142
	143	static inline void
	144	vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring)
	145	{
	146	VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size);
	147	}
	148
	149	static inline int
	150	vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring)
	151	{
	152	return (ring->next2comp > ring->next2fill ? 0 : ring->size) +
	153	ring->next2comp - ring->next2fill - 1;
	154	}
	155
	156	struct vmxnet3_comp_ring {
	157	union Vmxnet3_GenericDesc *base;
	158	u32 size;
	159	u32 next2proc;
	160	u8 gen;
	161	u8 intr_idx;
	162	dma_addr_t basePA;
	163	};
	164
	165	static inline void
	166	vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring)
	167	{
	168	ring->next2proc++;
	169	if (unlikely(ring->next2proc == ring->size)) {
	170	ring->next2proc = 0;
	171	VMXNET3_FLIP_RING_GEN(ring->gen);
	172	}
	173	}
	174
	175	struct vmxnet3_tx_data_ring {
	176	struct Vmxnet3_TxDataDesc *base;
	177	u32 size;
	178	dma_addr_t basePA;
	179	};
	180
	181	enum vmxnet3_buf_map_type {
	182	VMXNET3_MAP_INVALID = 0,
	183	VMXNET3_MAP_NONE,
184	VMXNET3_MAP_SINGLE,
185	VMXNET3_MAP_PAGE,
186	};
187
188	struct vmxnet3_tx_buf_info {
189	u32 map_type;
190	u16 len;
191	u16 sop_idx;
192	dma_addr_t dma_addr;
193	struct sk_buff *skb;
194	};
195
196	struct vmxnet3_tq_driver_stats {
197	u64 drop_total; /* # of pkts dropped by the driver, the
198	* counters below track droppings due to
199	* different reasons
200	*/
201	u64 drop_too_many_frags;
202	u64 drop_oversized_hdr;
203	u64 drop_hdr_inspect_err;
204	u64 drop_tso;
205
206	u64 tx_ring_full;
207	u64 linearized; /* # of pkts linearized */
208	u64 copy_skb_header; /* # of times we have to copy skb header */
209	u64 oversized_hdr;
210	};
211
212	struct vmxnet3_tx_ctx {
213	bool ipv4;
759c9359	214	bool ipv6;
d1a890fa SB	215	u16 mss;
	216	u32 eth_ip_hdr_size; /* only valid for pkts requesting tso or csum
	217	* offloading
	218	*/
	219	u32 l4_hdr_size; /* only valid if mss != 0 */
	220	u32 copy_size; /* # of bytes copied into the data ring */
	221	union Vmxnet3_GenericDesc *sop_txd;
	222	union Vmxnet3_GenericDesc *eop_txd;
	223	};
	224
	225	struct vmxnet3_tx_queue {
09c5088e SB	226	char name[IFNAMSIZ+8]; /* To identify interrupt */
09c5088e SB	227	struct vmxnet3_adapter *adapter;
d1a890fa SB	228	spinlock_t tx_lock;
d1a890fa SB	229	struct vmxnet3_cmd_ring tx_ring;
09c5088e	230	struct vmxnet3_tx_buf_info *buf_info;
b0eb57cb	231	dma_addr_t buf_info_pa;
d1a890fa SB	232	struct vmxnet3_tx_data_ring data_ring;
d1a890fa SB	233	struct vmxnet3_comp_ring comp_ring;
09c5088e	234	struct Vmxnet3_TxQueueCtrl *shared;
d1a890fa SB	235	struct vmxnet3_tq_driver_stats stats;
	236	bool stopped;
	237	int num_stop; /* # of times the queue is
	238	* stopped */
09c5088e	239	int qid;
d1a890fa SB	240	} __attribute__((__aligned__(SMP_CACHE_BYTES)));
	241
	242	enum vmxnet3_rx_buf_type {
	243	VMXNET3_RX_BUF_NONE = 0,
	244	VMXNET3_RX_BUF_SKB = 1,
	245	VMXNET3_RX_BUF_PAGE = 2
	246	};
	247
	248	struct vmxnet3_rx_buf_info {
	249	enum vmxnet3_rx_buf_type buf_type;
	250	u16 len;
	251	union {
	252	struct sk_buff *skb;
	253	struct page *page;
	254	};
	255	dma_addr_t dma_addr;
	256	};
	257
	258	struct vmxnet3_rx_ctx {
	259	struct sk_buff *skb;
	260	u32 sop_idx;
	261	};
	262
	263	struct vmxnet3_rq_driver_stats {
	264	u64 drop_total;
	265	u64 drop_err;
	266	u64 drop_fcs;
	267	u64 rx_buf_alloc_failure;
	268	};
	269
	270	struct vmxnet3_rx_queue {
09c5088e SB	271	char name[IFNAMSIZ + 8]; /* To identify interrupt */
	272	struct vmxnet3_adapter *adapter;
	273	struct napi_struct napi;
d1a890fa SB	274	struct vmxnet3_cmd_ring rx_ring[2];
	275	struct vmxnet3_comp_ring comp_ring;
	276	struct vmxnet3_rx_ctx rx_ctx;
	277	u32 qid; /* rqID in RCD for buffer from 1st ring */
	278	u32 qid2; /* rqID in RCD for buffer from 2nd ring */
d1a890fa	279	struct vmxnet3_rx_buf_info *buf_info[2];
b0eb57cb	280	dma_addr_t buf_info_pa;
d1a890fa SB	281	struct Vmxnet3_RxQueueCtrl *shared;
	282	struct vmxnet3_rq_driver_stats stats;
	283	} __attribute__((__aligned__(SMP_CACHE_BYTES)));
	284
09c5088e SB	285	#define VMXNET3_DEVICE_MAX_TX_QUEUES 8
	286	#define VMXNET3_DEVICE_MAX_RX_QUEUES 8 /* Keep this value as a power of 2 */
	287
	288	/* Should be less than UPT1_RSS_MAX_IND_TABLE_SIZE */
	289	#define VMXNET3_RSS_IND_TABLE_SIZE (VMXNET3_DEVICE_MAX_RX_QUEUES * 4)
	290
	291	#define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \
	292	VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
7e96fbf2	293	#define VMXNET3_LINUX_MIN_MSIX_VECT 2 /* 1 for tx-rx pair and 1 for event */
09c5088e	294
d1a890fa SB	295
	296	struct vmxnet3_intr {
	297	enum vmxnet3_intr_mask_mode mask_mode;
	298	enum vmxnet3_intr_type type; /* MSI-X, MSI, or INTx? */
	299	u8 num_intrs; /* # of intr vectors */
	300	u8 event_intr_idx; /* idx of the intr vector for event */
	301	u8 mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */
09c5088e	302	char event_msi_vector_name[IFNAMSIZ+11];
d1a890fa SB	303	#ifdef CONFIG_PCI_MSI
	304	struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT];
	305	#endif
	306	};
	307
09c5088e SB	308	/* Interrupt sharing schemes, share_intr */
	309	#define VMXNET3_INTR_BUDDYSHARE 0 /* Corresponding tx,rx queues share irq */
	310	#define VMXNET3_INTR_TXSHARE 1 /* All tx queues share one irq */
	311	#define VMXNET3_INTR_DONTSHARE 2 /* each queue has its own irq */
	312
	313
d1a890fa SB	314	#define VMXNET3_STATE_BIT_RESETTING 0
	315	#define VMXNET3_STATE_BIT_QUIESCED 1
	316	struct vmxnet3_adapter {
09c5088e SB	317	struct vmxnet3_tx_queue tx_queue[VMXNET3_DEVICE_MAX_TX_QUEUES];
09c5088e SB	318	struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
72e85c45	319	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
09c5088e	320	struct vmxnet3_intr intr;
83d0feff	321	spinlock_t cmd_lock;
09c5088e SB	322	struct Vmxnet3_DriverShared *shared;
	323	struct Vmxnet3_PMConf *pm_conf;
	324	struct Vmxnet3_TxQueueDesc tqd_start; / all tx queue desc */
	325	struct Vmxnet3_RxQueueDesc rqd_start; / all rx queue desc */
	326	struct net_device *netdev;
09c5088e	327	struct pci_dev *pdev;
d1a890fa	328
81e8e560 HH	329	u8 __iomem hw_addr0; / for BAR 0 */
81e8e560 HH	330	u8 __iomem hw_addr1; / for BAR 1 */
45dac1d6 SB	331	u8 version;
	332
	333	bool rxcsum;
	334	bool lro;
d1a890fa	335
09c5088e SB	336	#ifdef VMXNET3_RSS
	337	struct UPT1_RSSConf *rss_conf;
	338	bool rss;
	339	#endif
	340	u32 num_rx_queues;
	341	u32 num_tx_queues;
d1a890fa SB	342
	343	/* rx buffer related */
	344	unsigned skb_buf_size;
	345	int rx_buf_per_pkt; /* only apply to the 1st ring */
	346	dma_addr_t shared_pa;
	347	dma_addr_t queue_desc_pa;
	348
	349	/* Wake-on-LAN */
	350	u32 wol;
	351
	352	/* Link speed */
	353	u32 link_speed; /* in mbps */
	354
	355	u64 tx_timeout_count;
f00e2b0a NH	356
	357	/* Ring sizes */
	358	u32 tx_ring_size;
	359	u32 rx_ring_size;
53831aa1	360	u32 rx_ring2_size;
f00e2b0a	361
d1a890fa SB	362	struct work_struct work;
	363
	364	unsigned long state; /* VMXNET3_STATE_BIT_xxx */
	365
09c5088e	366	int share_intr;
b0eb57cb AK	367
	368	dma_addr_t adapter_pa;
	369	dma_addr_t pm_conf_pa;
	370	dma_addr_t rss_conf_pa;
d1a890fa SB	371	};
	372
	373	#define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \
b8744cab	374	writel((val), (adapter)->hw_addr0 + (reg))
d1a890fa	375	#define VMXNET3_READ_BAR0_REG(adapter, reg) \
b8744cab	376	readl((adapter)->hw_addr0 + (reg))
d1a890fa SB	377
d1a890fa SB	378	#define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \
b8744cab	379	writel((val), (adapter)->hw_addr1 + (reg))
d1a890fa	380	#define VMXNET3_READ_BAR1_REG(adapter, reg) \
b8744cab	381	readl((adapter)->hw_addr1 + (reg))
d1a890fa SB	382
	383	#define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5)
	384	#define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \
	385	((rq)->rx_ring[ring_idx].size >> 3)
	386
	387	#define VMXNET3_GET_ADDR_LO(dma) ((u32)(dma))
	388	#define VMXNET3_GET_ADDR_HI(dma) ((u32)(((u64)(dma)) >> 32))
	389
	390	/* must be a multiple of VMXNET3_RING_SIZE_ALIGN */
	391	#define VMXNET3_DEF_TX_RING_SIZE 512
	392	#define VMXNET3_DEF_RX_RING_SIZE 256
53831aa1	393	#define VMXNET3_DEF_RX_RING2_SIZE 128
d1a890fa SB	394
	395	#define VMXNET3_MAX_ETH_HDR_SIZE 22
	396	#define VMXNET3_MAX_SKB_BUF_SIZE (3*1024)
	397
	398	int
	399	vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter);
	400
	401	int
	402	vmxnet3_activate_dev(struct vmxnet3_adapter *adapter);
	403
	404	void
	405	vmxnet3_force_close(struct vmxnet3_adapter *adapter);
	406
	407	void
	408	vmxnet3_reset_dev(struct vmxnet3_adapter *adapter);
	409
	410	void
09c5088e	411	vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter);
d1a890fa SB	412
d1a890fa SB	413	void
09c5088e	414	vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter);
d1a890fa	415
a0d2730c	416	int
c8f44aff	417	vmxnet3_set_features(struct net_device *netdev, netdev_features_t features);
a0d2730c	418
d1a890fa SB	419	int
	420	vmxnet3_create_queues(struct vmxnet3_adapter *adapter,
	421	u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size);
	422
d8dea1eb	423	void vmxnet3_set_ethtool_ops(struct net_device *netdev);
95305f6c	424
d8dea1eb	425	struct rtnl_link_stats64 *
95305f6c	426	vmxnet3_get_stats64(struct net_device dev, struct rtnl_link_stats64 stats);
d1a890fa SB	427
	428	extern char vmxnet3_driver_name[];
	429	#endif