projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge remote-tracking branch 'regulator/for-next'
[deliverable/linux.git] / drivers / net / wireless / intel / iwlwifi / mvm / utils.c
CommitLineData
8ca151b5
JB		 1/******************************************************************************
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
51368bf7 8 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 9 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
4ecafae9 10 * Copyright (C) 2015 Intel Deutschland GmbH
8ca151b5
JB		 11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of version 2 of the GNU General Public License as
14 * published by the Free Software Foundation.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
24 * USA
25 *
26 * The full GNU General Public License is included in this distribution
410dc5aa 27 * in the file called COPYING.
8ca151b5
JB		 28 *
29 * Contact Information:
cb2f8277 30 * Intel Linux Wireless <linuxwifi@intel.com>
8ca151b5
JB		 31 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
32 *
33 * BSD LICENSE
34 *
51368bf7 35 * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
8b4139dc 36 * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
8ca151b5
JB		 37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 *
43 * * Redistributions of source code must retain the above copyright
44 * notice, this list of conditions and the following disclaimer.
45 * * Redistributions in binary form must reproduce the above copyright
46 * notice, this list of conditions and the following disclaimer in
47 * the documentation and/or other materials provided with the
48 * distribution.
49 * * Neither the name Intel Corporation nor the names of its
50 * contributors may be used to endorse or promote products derived
51 * from this software without specific prior written permission.
52 *
53 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
54 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
55 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
56 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
57 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
58 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
59 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
63 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 *
65 *****************************************************************************/
66#include <net/mac80211.h>
67
68#include "iwl-debug.h"
69#include "iwl-io.h"
7b445f35 70#include "iwl-prph.h"
2f89a5d7 71#include "fw-dbg.h"
8ca151b5
JB		 72#include "mvm.h"
73#include "fw-api-rs.h"
74
75/*
76 * Will return 0 even if the cmd failed when RFKILL is asserted unless
77 * CMD_WANT_SKB is set in cmd->flags.
78 */
79int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
80{
81 int ret;
82
debff618
JB		 83#if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
84 if (WARN_ON(mvm->d3_test_active))
85 return -EIO;
86#endif
87
8ca151b5
JB		 88 /*
89 * Synchronous commands from this op-mode must hold
90 * the mutex, this ensures we don't try to send two
91 * (or more) synchronous commands at a time.
92 */
71b1230c 93 if (!(cmd->flags & CMD_ASYNC)) {
8ca151b5 94 lockdep_assert_held(&mvm->mutex);
71b1230c
LC		 95 if (!(cmd->flags & CMD_SEND_IN_IDLE))
96 iwl_mvm_ref(mvm, IWL_MVM_REF_SENDING_CMD);
97 }
8ca151b5
JB		 98
99 ret = iwl_trans_send_cmd(mvm->trans, cmd);
100
71b1230c
LC		 101 if (!(cmd->flags & (CMD_ASYNC | CMD_SEND_IN_IDLE)))
102 iwl_mvm_unref(mvm, IWL_MVM_REF_SENDING_CMD);
103
8ca151b5
JB		 104 /*
105 * If the caller wants the SKB, then don't hide any problems, the
106 * caller might access the response buffer which will be NULL if
107 * the command failed.
108 */
109 if (cmd->flags & CMD_WANT_SKB)
110 return ret;
111
112 /* Silently ignore failures if RFKILL is asserted */
113 if (!ret || ret == -ERFKILL)
114 return 0;
115 return ret;
116}
117
ab02165c 118int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
8ca151b5
JB		 119 u32 flags, u16 len, const void *data)
120{
121 struct iwl_host_cmd cmd = {
122 .id = id,
123 .len = { len, },
124 .data = { data, },
125 .flags = flags,
126 };
127
128 return iwl_mvm_send_cmd(mvm, &cmd);
129}
130
131/*
0d365ae5 132 * We assume that the caller set the status to the success value
8ca151b5
JB		 133 */
134int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
135 u32 *status)
136{
137 struct iwl_rx_packet *pkt;
138 struct iwl_cmd_response *resp;
139 int ret, resp_len;
140
141 lockdep_assert_held(&mvm->mutex);
142
debff618
JB		 143#if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
144 if (WARN_ON(mvm->d3_test_active))
145 return -EIO;
146#endif
147
8ca151b5
JB		 148 /*
149 * Only synchronous commands can wait for status,
150 * we use WANT_SKB so the caller can't.
151 */
152 if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
153 "cmd flags %x", cmd->flags))
154 return -EINVAL;
155
a1022927 156 cmd->flags |= CMD_WANT_SKB;
8ca151b5
JB		 157
158 ret = iwl_trans_send_cmd(mvm->trans, cmd);
159 if (ret == -ERFKILL) {
160 /*
161 * The command failed because of RFKILL, don't update
162 * the status, leave it as success and return 0.
163 */
164 return 0;
165 } else if (ret) {
166 return ret;
167 }
168
169 pkt = cmd->resp_pkt;
170 /* Can happen if RFKILL is asserted */
171 if (!pkt) {
172 ret = 0;
173 goto out_free_resp;
174 }
175
65b30348
JB		 176 resp_len = iwl_rx_packet_payload_len(pkt);
177 if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
8ca151b5
JB		 178 ret = -EIO;
179 goto out_free_resp;
180 }
181
182 resp = (void *)pkt->data;
183 *status = le32_to_cpu(resp->status);
184 out_free_resp:
185 iwl_free_resp(cmd);
186 return ret;
187}
188
189/*
190 * We assume that the caller set the status to the sucess value
191 */
ab02165c 192int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
8ca151b5
JB		 193 const void *data, u32 *status)
194{
195 struct iwl_host_cmd cmd = {
196 .id = id,
197 .len = { len, },
198 .data = { data, },
199 };
200
201 return iwl_mvm_send_cmd_status(mvm, &cmd, status);
202}
203
204#define IWL_DECLARE_RATE_INFO(r) \
205 [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
206
207/*
208 * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
209 */
210static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
211 IWL_DECLARE_RATE_INFO(1),
212 IWL_DECLARE_RATE_INFO(2),
213 IWL_DECLARE_RATE_INFO(5),
214 IWL_DECLARE_RATE_INFO(11),
215 IWL_DECLARE_RATE_INFO(6),
216 IWL_DECLARE_RATE_INFO(9),
217 IWL_DECLARE_RATE_INFO(12),
218 IWL_DECLARE_RATE_INFO(18),
219 IWL_DECLARE_RATE_INFO(24),
220 IWL_DECLARE_RATE_INFO(36),
221 IWL_DECLARE_RATE_INFO(48),
222 IWL_DECLARE_RATE_INFO(54),
223};
224
225int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
57fbcce3 226 enum nl80211_band band)
8ca151b5
JB		 227{
228 int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
229 int idx;
230 int band_offset = 0;
231
232 /* Legacy rate format, search for match in table */
57fbcce3 233 if (band == NL80211_BAND_5GHZ)
8ca151b5
JB		 234 band_offset = IWL_FIRST_OFDM_RATE;
235 for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
236 if (fw_rate_idx_to_plcp[idx] == rate)
237 return idx - band_offset;
238
239 return -1;
240}
241
242u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
243{
244 /* Get PLCP rate for tx_cmd->rate_n_flags */
245 return fw_rate_idx_to_plcp[rate_idx];
246}
247
0416841d 248void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
8ca151b5
JB		 249{
250 struct iwl_rx_packet *pkt = rxb_addr(rxb);
251 struct iwl_error_resp *err_resp = (void *)pkt->data;
252
253 IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
254 le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
255 IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
256 le16_to_cpu(err_resp->bad_cmd_seq_num),
257 le32_to_cpu(err_resp->error_service));
258 IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
259 le64_to_cpu(err_resp->timestamp));
8ca151b5
JB		 260}
261
262/*
263 * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
264 * The parameter should also be a combination of ANT_[ABC].
265 */
266u8 first_antenna(u8 mask)
267{
268 BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
d7dad550
EG		 269 if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
270 return BIT(0);
271 return BIT(ffs(mask) - 1);
8ca151b5
JB		 272}
273
274/*
275 * Toggles between TX antennas to send the probe request on.
276 * Receives the bitmask of valid TX antennas and the *index* used
277 * for the last TX, and returns the next valid *index* to use.
278 * In order to set it in the tx_cmd, must do BIT(idx).
279 */
280u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
281{
282 u8 ind = last_idx;
283 int i;
284
285 for (i = 0; i < RATE_MCS_ANT_NUM; i++) {
286 ind = (ind + 1) % RATE_MCS_ANT_NUM;
287 if (valid & BIT(ind))
288 return ind;
289 }
290
291 WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
292 return last_idx;
293}
294
e5209263
JB		 295static const struct {
296 const char *name;
8ca151b5
JB		 297 u8 num;
298} advanced_lookup[] = {
299 { "NMI_INTERRUPT_WDG", 0x34 },
300 { "SYSASSERT", 0x35 },
301 { "UCODE_VERSION_MISMATCH", 0x37 },
302 { "BAD_COMMAND", 0x38 },
303 { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
304 { "FATAL_ERROR", 0x3D },
305 { "NMI_TRM_HW_ERR", 0x46 },
306 { "NMI_INTERRUPT_TRM", 0x4C },
307 { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
308 { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
309 { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
310 { "NMI_INTERRUPT_HOST", 0x66 },
311 { "NMI_INTERRUPT_ACTION_PT", 0x7C },
312 { "NMI_INTERRUPT_UNKNOWN", 0x84 },
313 { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
314 { "ADVANCED_SYSASSERT", 0 },
315};
316
317static const char *desc_lookup(u32 num)
318{
319 int i;
320
321 for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
322 if (advanced_lookup[i].num == num)
323 return advanced_lookup[i].name;
324
325 /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
326 return advanced_lookup[i].name;
327}
328
329/*
330 * Note: This structure is read from the device with IO accesses,
331 * and the reading already does the endian conversion. As it is
332 * read with u32-sized accesses, any members with a different size
333 * need to be ordered correctly though!
334 */
7e1223b5 335struct iwl_error_event_table_v1 {
8ca151b5
JB		 336 u32 valid; /* (nonzero) valid, (0) log is empty */
337 u32 error_id; /* type of error */
338 u32 pc; /* program counter */
339 u32 blink1; /* branch link */
340 u32 blink2; /* branch link */
341 u32 ilink1; /* interrupt link */
342 u32 ilink2; /* interrupt link */
343 u32 data1; /* error-specific data */
344 u32 data2; /* error-specific data */
345 u32 data3; /* error-specific data */
346 u32 bcon_time; /* beacon timer */
347 u32 tsf_low; /* network timestamp function timer */
348 u32 tsf_hi; /* network timestamp function timer */
349 u32 gp1; /* GP1 timer register */
350 u32 gp2; /* GP2 timer register */
351 u32 gp3; /* GP3 timer register */
352 u32 ucode_ver; /* uCode version */
353 u32 hw_ver; /* HW Silicon version */
354 u32 brd_ver; /* HW board version */
355 u32 log_pc; /* log program counter */
356 u32 frame_ptr; /* frame pointer */
357 u32 stack_ptr; /* stack pointer */
358 u32 hcmd; /* last host command header */
359 u32 isr0; /* isr status register LMPM_NIC_ISR0:
360 * rxtx_flag */
361 u32 isr1; /* isr status register LMPM_NIC_ISR1:
362 * host_flag */
363 u32 isr2; /* isr status register LMPM_NIC_ISR2:
364 * enc_flag */
365 u32 isr3; /* isr status register LMPM_NIC_ISR3:
366 * time_flag */
367 u32 isr4; /* isr status register LMPM_NIC_ISR4:
368 * wico interrupt */
369 u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
370 u32 wait_event; /* wait event() caller address */
371 u32 l2p_control; /* L2pControlField */
372 u32 l2p_duration; /* L2pDurationField */
373 u32 l2p_mhvalid; /* L2pMhValidBits */
374 u32 l2p_addr_match; /* L2pAddrMatchStat */
375 u32 lmpm_pmg_sel; /* indicate which clocks are turned on
376 * (LMPM_PMG_SEL) */
377 u32 u_timestamp; /* indicate when the date and time of the
378 * compilation */
379 u32 flow_handler; /* FH read/write pointers, RX credit */
7e1223b5
EG		 380} __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
381
382struct iwl_error_event_table {
383 u32 valid; /* (nonzero) valid, (0) log is empty */
384 u32 error_id; /* type of error */
7d3ca7f4
EG		 385 u32 trm_hw_status0; /* TRM HW status */
386 u32 trm_hw_status1; /* TRM HW status */
7e1223b5
EG		 387 u32 blink2; /* branch link */
388 u32 ilink1; /* interrupt link */
389 u32 ilink2; /* interrupt link */
390 u32 data1; /* error-specific data */
391 u32 data2; /* error-specific data */
392 u32 data3; /* error-specific data */
393 u32 bcon_time; /* beacon timer */
394 u32 tsf_low; /* network timestamp function timer */
395 u32 tsf_hi; /* network timestamp function timer */
396 u32 gp1; /* GP1 timer register */
397 u32 gp2; /* GP2 timer register */
7d3ca7f4 398 u32 fw_rev_type; /* firmware revision type */
7e1223b5
EG		 399 u32 major; /* uCode version major */
400 u32 minor; /* uCode version minor */
401 u32 hw_ver; /* HW Silicon version */
402 u32 brd_ver; /* HW board version */
403 u32 log_pc; /* log program counter */
404 u32 frame_ptr; /* frame pointer */
405 u32 stack_ptr; /* stack pointer */
406 u32 hcmd; /* last host command header */
407 u32 isr0; /* isr status register LMPM_NIC_ISR0:
408 * rxtx_flag */
409 u32 isr1; /* isr status register LMPM_NIC_ISR1:
410 * host_flag */
411 u32 isr2; /* isr status register LMPM_NIC_ISR2:
412 * enc_flag */
413 u32 isr3; /* isr status register LMPM_NIC_ISR3:
414 * time_flag */
415 u32 isr4; /* isr status register LMPM_NIC_ISR4:
416 * wico interrupt */
7d3ca7f4 417 u32 last_cmd_id; /* last HCMD id handled by the firmware */
7e1223b5
EG		 418 u32 wait_event; /* wait event() caller address */
419 u32 l2p_control; /* L2pControlField */
420 u32 l2p_duration; /* L2pDurationField */
421 u32 l2p_mhvalid; /* L2pMhValidBits */
422 u32 l2p_addr_match; /* L2pAddrMatchStat */
423 u32 lmpm_pmg_sel; /* indicate which clocks are turned on
424 * (LMPM_PMG_SEL) */
425 u32 u_timestamp; /* indicate when the date and time of the
426 * compilation */
427 u32 flow_handler; /* FH read/write pointers, RX credit */
7d3ca7f4 428} __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
8ca151b5 429
01a9ca51
EH		 430/*
431 * UMAC error struct - relevant starting from family 8000 chip.
432 * Note: This structure is read from the device with IO accesses,
433 * and the reading already does the endian conversion. As it is
434 * read with u32-sized accesses, any members with a different size
435 * need to be ordered correctly though!
436 */
437struct iwl_umac_error_event_table {
438 u32 valid; /* (nonzero) valid, (0) log is empty */
439 u32 error_id; /* type of error */
01a9ca51
EH		 440 u32 blink1; /* branch link */
441 u32 blink2; /* branch link */
442 u32 ilink1; /* interrupt link */
443 u32 ilink2; /* interrupt link */
444 u32 data1; /* error-specific data */
445 u32 data2; /* error-specific data */
32be1a83 446 u32 data3; /* error-specific data */
7e1223b5
EG		 447 u32 umac_major;
448 u32 umac_minor;
32be1a83
EH		 449 u32 frame_pointer; /* core register 27*/
450 u32 stack_pointer; /* core register 28 */
7e1223b5 451 u32 cmd_header; /* latest host cmd sent to UMAC */
32be1a83 452 u32 nic_isr_pref; /* ISR status register */
01a9ca51
EH		 453} __packed;
454
8ca151b5
JB		 455#define ERROR_START_OFFSET (1 * sizeof(u32))
456#define ERROR_ELEM_SIZE (7 * sizeof(u32))
457
01a9ca51
EH		 458static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
459{
460 struct iwl_trans *trans = mvm->trans;
461 struct iwl_umac_error_event_table table;
462 u32 base;
463
464 base = mvm->umac_error_event_table;
465
32be1a83 466 if (base < 0x800000) {
01a9ca51
EH		 467 IWL_ERR(mvm,
468 "Not valid error log pointer 0x%08X for %s uCode\n",
469 base,
470 (mvm->cur_ucode == IWL_UCODE_INIT)
471 ? "Init" : "RT");
472 return;
473 }
474
475 iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
476
477 if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
478 IWL_ERR(trans, "Start IWL Error Log Dump:\n");
479 IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
480 mvm->status, table.valid);
481 }
482
edbad051 483 IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
01a9ca51 484 desc_lookup(table.error_id));
01a9ca51
EH		 485 IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
486 IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
487 IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
488 IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
489 IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
490 IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
32be1a83 491 IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
7e1223b5
EG		 492 IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
493 IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
32be1a83
EH		 494 IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
495 IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
496 IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
497 IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
01a9ca51
EH		 498}
499
7e1223b5
EG		 500void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
501{
502 struct iwl_trans *trans = mvm->trans;
503 struct iwl_error_event_table table;
504 u32 base;
505
7e1223b5
EG		 506 base = mvm->error_event_table;
507 if (mvm->cur_ucode == IWL_UCODE_INIT) {
508 if (!base)
509 base = mvm->fw->init_errlog_ptr;
510 } else {
511 if (!base)
512 base = mvm->fw->inst_errlog_ptr;
513 }
514
515 if (base < 0x800000) {
516 IWL_ERR(mvm,
517 "Not valid error log pointer 0x%08X for %s uCode\n",
518 base,
519 (mvm->cur_ucode == IWL_UCODE_INIT)
520 ? "Init" : "RT");
521 return;
522 }
523
524 iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
525
526 if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
527 IWL_ERR(trans, "Start IWL Error Log Dump:\n");
528 IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
529 mvm->status, table.valid);
530 }
531
532 /* Do not change this output - scripts rely on it */
533
534 IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
535
536 trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low,
537 table.data1, table.data2, table.data3,
7d3ca7f4 538 table.blink2, table.ilink1,
7e1223b5 539 table.ilink2, table.bcon_time, table.gp1,
7d3ca7f4 540 table.gp2, table.fw_rev_type, table.major,
7e1223b5
EG		 541 table.minor, table.hw_ver, table.brd_ver);
542 IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
543 desc_lookup(table.error_id));
7d3ca7f4
EG		 544 IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
545 IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
7e1223b5
EG		 546 IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
547 IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
548 IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
549 IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
550 IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
551 IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
552 IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
553 IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
554 IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
555 IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
556 IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
7d3ca7f4 557 IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
7e1223b5
EG		 558 IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
559 IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
560 IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
561 IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
562 IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
563 IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
564 IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
565 IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
566 IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
567 IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
7d3ca7f4 568 IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
7e1223b5
EG		 569 IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
570 IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
571 IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
572 IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
573 IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
574 IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
575 IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
576 IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
577
578 if (mvm->support_umac_log)
579 iwl_mvm_dump_umac_error_log(mvm);
580}
4ecafae9 581
9794c64f 582int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, u8 minq, u8 maxq)
4ecafae9
LK		 583{
584 int i;
585
586 lockdep_assert_held(&mvm->queue_info_lock);
587
9794c64f 588 /* Start by looking for a free queue */
4ecafae9
LK		 589 for (i = minq; i <= maxq; i++)
590 if (mvm->queue_info[i].hw_queue_refcount == 0 &&
cf961e16 591 mvm->queue_info[i].status == IWL_MVM_QUEUE_FREE)
4ecafae9
LK		 592 return i;
593
9794c64f
LK		 594 /*
595 * If no free queue found - settle for an inactive one to reconfigure
596 * Make sure that the inactive queue either already belongs to this STA,
597 * or that if it belongs to another one - it isn't the reserved queue
598 */
599 for (i = minq; i <= maxq; i++)
600 if (mvm->queue_info[i].status == IWL_MVM_QUEUE_INACTIVE &&
601 (sta_id == mvm->queue_info[i].ra_sta_id ||
602 !mvm->queue_info[i].reserved))
603 return i;
604
4ecafae9
LK		 605 return -ENOSPC;
606}
607
cf961e16
LK		 608int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
609 int tid, int frame_limit, u16 ssn)
610{
611 struct iwl_scd_txq_cfg_cmd cmd = {
612 .scd_queue = queue,
f7c692de 613 .action = SCD_CFG_ENABLE_QUEUE,
cf961e16
LK		 614 .window = frame_limit,
615 .sta_id = sta_id,
616 .ssn = cpu_to_le16(ssn),
617 .tx_fifo = fifo,
618 .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE ||
619 queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE),
620 .tid = tid,
621 };
622 int ret;
623
624 spin_lock_bh(&mvm->queue_info_lock);
625 if (WARN(mvm->queue_info[queue].hw_queue_refcount == 0,
626 "Trying to reconfig unallocated queue %d\n", queue)) {
627 spin_unlock_bh(&mvm->queue_info_lock);
628 return -ENXIO;
629 }
630 spin_unlock_bh(&mvm->queue_info_lock);
631
632 IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue);
633
634 ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd);
635 WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n",
636 queue, fifo, ret);
637
638 return ret;
639}
640
4ecafae9
LK		 641void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
642 u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
4cf677fd 643 unsigned int wdg_timeout)
3edf8ff6 644{
4ecafae9
LK		 645 bool enable_queue = true;
646
647 spin_lock_bh(&mvm->queue_info_lock);
0294d9ee 648
4ecafae9
LK		 649 /* Make sure this TID isn't already enabled */
650 if (mvm->queue_info[queue].tid_bitmap & BIT(cfg->tid)) {
651 spin_unlock_bh(&mvm->queue_info_lock);
652 IWL_ERR(mvm, "Trying to enable TXQ with existing TID %d\n",
653 cfg->tid);
654 return;
655 }
656
657 /* Update mappings and refcounts */
42db09c1
LK		 658 if (mvm->queue_info[queue].hw_queue_refcount > 0)
659 enable_queue = false;
660
4ecafae9
LK		 661 mvm->queue_info[queue].hw_queue_to_mac80211 |= BIT(mac80211_queue);
662 mvm->queue_info[queue].hw_queue_refcount++;
4ecafae9 663 mvm->queue_info[queue].tid_bitmap |= BIT(cfg->tid);
9794c64f 664 mvm->queue_info[queue].ra_sta_id = cfg->sta_id;
4ecafae9 665
42db09c1
LK		 666 if (enable_queue) {
667 if (cfg->tid != IWL_MAX_TID_COUNT)
668 mvm->queue_info[queue].mac80211_ac =
669 tid_to_mac80211_ac[cfg->tid];
670 else
671 mvm->queue_info[queue].mac80211_ac = IEEE80211_AC_VO;
edbe961c
LK		 672
673 mvm->queue_info[queue].txq_tid = cfg->tid;
42db09c1
LK		 674 }
675
4ecafae9
LK		 676 IWL_DEBUG_TX_QUEUES(mvm,
677 "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
678 queue, mvm->queue_info[queue].hw_queue_refcount,
679 mvm->queue_info[queue].hw_queue_to_mac80211);
680
681 spin_unlock_bh(&mvm->queue_info_lock);
682
683 /* Send the enabling command if we need to */
684 if (enable_queue) {
685 struct iwl_scd_txq_cfg_cmd cmd = {
686 .scd_queue = queue,
f7c692de 687 .action = SCD_CFG_ENABLE_QUEUE,
4ecafae9
LK		 688 .window = cfg->frame_limit,
689 .sta_id = cfg->sta_id,
690 .ssn = cpu_to_le16(ssn),
691 .tx_fifo = cfg->fifo,
692 .aggregate = cfg->aggregate,
693 .tid = cfg->tid,
694 };
695
93f436e2
LK		 696 /* Set sta_id in the command, if it exists */
697 if (iwl_mvm_is_dqa_supported(mvm))
698 cmd.sta_id = cfg->sta_id;
699
4ecafae9
LK		 700 iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, NULL,
701 wdg_timeout);
702 WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd),
703 &cmd),
704 "Failed to configure queue %d on FIFO %d\n", queue,
705 cfg->fifo);
706 }
3edf8ff6
AA		 707}
708
4ecafae9
LK		 709void iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
710 u8 tid, u8 flags)
3edf8ff6 711{
0294d9ee
EG		 712 struct iwl_scd_txq_cfg_cmd cmd = {
713 .scd_queue = queue,
f7c692de 714 .action = SCD_CFG_DISABLE_QUEUE,
0294d9ee 715 };
4ecafae9 716 bool remove_mac_queue = true;
0294d9ee
EG		 717 int ret;
718
4ecafae9
LK		 719 spin_lock_bh(&mvm->queue_info_lock);
720
721 if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
722 spin_unlock_bh(&mvm->queue_info_lock);
723 return;
724 }
725
726 mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
727
728 /*
729 * If there is another TID with the same AC - don't remove the MAC queue
730 * from the mapping
731 */
732 if (tid < IWL_MAX_TID_COUNT) {
733 unsigned long tid_bitmap =
734 mvm->queue_info[queue].tid_bitmap;
735 int ac = tid_to_mac80211_ac[tid];
736 int i;
737
738 for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
739 if (tid_to_mac80211_ac[i] == ac)
740 remove_mac_queue = false;
741 }
742 }
743
744 if (remove_mac_queue)
745 mvm->queue_info[queue].hw_queue_to_mac80211 &=
746 ~BIT(mac80211_queue);
747 mvm->queue_info[queue].hw_queue_refcount--;
748
f7c692de
LK		 749 cmd.action = mvm->queue_info[queue].hw_queue_refcount ?
750 SCD_CFG_ENABLE_QUEUE : SCD_CFG_DISABLE_QUEUE;
751 if (cmd.action == SCD_CFG_DISABLE_QUEUE)
cf961e16 752 mvm->queue_info[queue].status = IWL_MVM_QUEUE_FREE;
4ecafae9
LK		 753
754 IWL_DEBUG_TX_QUEUES(mvm,
755 "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
756 queue,
757 mvm->queue_info[queue].hw_queue_refcount,
758 mvm->queue_info[queue].hw_queue_to_mac80211);
759
760 /* If the queue is still enabled - nothing left to do in this func */
f7c692de 761 if (cmd.action == SCD_CFG_ENABLE_QUEUE) {
4ecafae9
LK		 762 spin_unlock_bh(&mvm->queue_info_lock);
763 return;
764 }
765
f02669be 766 cmd.sta_id = mvm->queue_info[queue].ra_sta_id;
edbe961c 767 cmd.tid = mvm->queue_info[queue].txq_tid;
f02669be 768
4ecafae9
LK		 769 /* Make sure queue info is correct even though we overwrite it */
770 WARN(mvm->queue_info[queue].hw_queue_refcount ||
771 mvm->queue_info[queue].tid_bitmap ||
772 mvm->queue_info[queue].hw_queue_to_mac80211,
773 "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
774 queue, mvm->queue_info[queue].hw_queue_refcount,
775 mvm->queue_info[queue].hw_queue_to_mac80211,
776 mvm->queue_info[queue].tid_bitmap);
777
778 /* If we are here - the queue is freed and we can zero out these vals */
779 mvm->queue_info[queue].hw_queue_refcount = 0;
780 mvm->queue_info[queue].tid_bitmap = 0;
781 mvm->queue_info[queue].hw_queue_to_mac80211 = 0;
782
9794c64f
LK		 783 /* Regardless if this is a reserved TXQ for a STA - mark it as false */
784 mvm->queue_info[queue].reserved = false;
785
4ecafae9
LK		 786 spin_unlock_bh(&mvm->queue_info_lock);
787
0294d9ee
EG		 788 iwl_trans_txq_disable(mvm->trans, queue, false);
789 ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
790 sizeof(cmd), &cmd);
791 if (ret)
792 IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
793 queue, ret);
3edf8ff6
AA		 794}
795
8ca151b5
JB		 796/**
797 * iwl_mvm_send_lq_cmd() - Send link quality command
798 * @init: This command is sent as part of station initialization right
799 * after station has been added.
800 *
801 * The link quality command is sent as the last step of station creation.
802 * This is the special case in which init is set and we call a callback in
803 * this case to clear the state indicating that station creation is in
804 * progress.
805 */
9e680946 806int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init)
8ca151b5
JB		 807{
808 struct iwl_host_cmd cmd = {
809 .id = LQ_CMD,
810 .len = { sizeof(struct iwl_lq_cmd), },
a1022927 811 .flags = init ? 0 : CMD_ASYNC,
8ca151b5
JB		 812 .data = { lq, },
813 };
814
881acd89 815 if (WARN_ON(lq->sta_id == IWL_MVM_STATION_COUNT))
8ca151b5
JB		 816 return -EINVAL;
817
8ca151b5
JB		 818 return iwl_mvm_send_cmd(mvm, &cmd);
819}
9ee718aa
EL		 820
821/**
0d365ae5 822 * iwl_mvm_update_smps - Get a request to change the SMPS mode
9ee718aa
EL		 823 * @req_type: The part of the driver who call for a change.
824 * @smps_requests: The request to change the SMPS mode.
825 *
826 * Get a requst to change the SMPS mode,
827 * and change it according to all other requests in the driver.
828 */
829void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
830 enum iwl_mvm_smps_type_request req_type,
831 enum ieee80211_smps_mode smps_request)
832{
833 struct iwl_mvm_vif *mvmvif;
f6415f6b 834 enum ieee80211_smps_mode smps_mode;
9ee718aa
EL		 835 int i;
836
837 lockdep_assert_held(&mvm->mutex);
710e4d08
EG		 838
839 /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
a0544272 840 if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
710e4d08
EG		 841 return;
842
f6415f6b
EG		 843 if (vif->type == NL80211_IFTYPE_AP)
844 smps_mode = IEEE80211_SMPS_OFF;
845 else
846 smps_mode = IEEE80211_SMPS_AUTOMATIC;
847
9ee718aa
EL		 848 mvmvif = iwl_mvm_vif_from_mac80211(vif);
849 mvmvif->smps_requests[req_type] = smps_request;
850 for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
851 if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
852 smps_mode = IEEE80211_SMPS_STATIC;
853 break;
854 }
855 if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
856 smps_mode = IEEE80211_SMPS_DYNAMIC;
857 }
858
859 ieee80211_request_smps(vif, smps_mode);
860}
a21d7bcb 861
33cef925 862int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
91a8bcde 863{
33cef925
JB		 864 struct iwl_statistics_cmd scmd = {
865 .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
866 };
91a8bcde
JB		 867 struct iwl_host_cmd cmd = {
868 .id = STATISTICS_CMD,
869 .len[0] = sizeof(scmd),
870 .data[0] = &scmd,
871 .flags = CMD_WANT_SKB,
872 };
873 int ret;
874
875 ret = iwl_mvm_send_cmd(mvm, &cmd);
876 if (ret)
877 return ret;
878
879 iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
880 iwl_free_resp(&cmd);
881
33cef925
JB		 882 if (clear)
883 iwl_mvm_accu_radio_stats(mvm);
884
91a8bcde
JB		 885 return 0;
886}
887
888void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
889{
890 mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
891 mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
892 mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
893 mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
894}
895
5c904224
EG		 896static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
897 struct ieee80211_vif *vif)
898{
899 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
900 bool *result = _data;
901 int i;
902
903 for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
904 if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
905 mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
906 *result = false;
907 }
908}
909
910bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
911{
912 bool result = true;
913
914 lockdep_assert_held(&mvm->mutex);
915
a0544272 916 if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
5c904224
EG		 917 return false;
918
c93edc63 919 if (mvm->cfg->rx_with_siso_diversity)
5c904224
EG		 920 return false;
921
922 ieee80211_iterate_active_interfaces_atomic(
923 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
924 iwl_mvm_diversity_iter, &result);
925
926 return result;
927}
928
a21d7bcb 929int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
b525d081 930 bool prev)
a21d7bcb
JB		 931{
932 struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
e03f9bef 933 int res;
a21d7bcb
JB		 934
935 lockdep_assert_held(&mvm->mutex);
936
b525d081 937 if (iwl_mvm_vif_low_latency(mvmvif) == prev)
3510aea4
JB		 938 return 0;
939
7754ae79 940 res = iwl_mvm_update_quotas(mvm, false, NULL);
e03f9bef
JB		 941 if (res)
942 return res;
0ee5bcdd
EG		 943
944 iwl_mvm_bt_coex_vif_change(mvm);
945
999609f1 946 return iwl_mvm_power_update_mac(mvm);
a21d7bcb 947}
50df8a30
AB		 948
949static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
950{
951 bool *result = _data;
952
953 if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif)))
954 *result = true;
955}
956
957bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
958{
959 bool result = false;
960
961 ieee80211_iterate_active_interfaces_atomic(
962 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
963 iwl_mvm_ll_iter, &result);
964
965 return result;
966}
bd5e4744 967
7f549e2c
LC		 968struct iwl_bss_iter_data {
969 struct ieee80211_vif *vif;
970 bool error;
971};
972
973static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
974 struct ieee80211_vif *vif)
975{
976 struct iwl_bss_iter_data *data = _data;
977
978 if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
979 return;
980
981 if (data->vif) {
982 data->error = true;
983 return;
984 }
985
986 data->vif = vif;
987}
988
989struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
990{
991 struct iwl_bss_iter_data bss_iter_data = {};
992
993 ieee80211_iterate_active_interfaces_atomic(
994 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
995 iwl_mvm_bss_iface_iterator, &bss_iter_data);
996
997 if (bss_iter_data.error) {
998 IWL_ERR(mvm, "More than one managed interface active!\n");
999 return ERR_PTR(-EINVAL);
1000 }
1001
1002 return bss_iter_data.vif;
1003}
5d42e7b2
EG		 1004
1005unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
1006 struct ieee80211_vif *vif,
1007 bool tdls, bool cmd_q)
1008{
1009 struct iwl_fw_dbg_trigger_tlv *trigger;
1010 struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
1011 unsigned int default_timeout =
1012 cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
1013
1014 if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS))
1015 return iwlmvm_mod_params.tfd_q_hang_detect ?
1016 default_timeout : IWL_WATCHDOG_DISABLED;
1017
1018 trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
1019 txq_timer = (void *)trigger->data;
1020
1021 if (tdls)
1022 return le32_to_cpu(txq_timer->tdls);
1023
1024 if (cmd_q)
1025 return le32_to_cpu(txq_timer->command_queue);
1026
1027 if (WARN_ON(!vif))
1028 return default_timeout;
1029
1030 switch (ieee80211_vif_type_p2p(vif)) {
1031 case NL80211_IFTYPE_ADHOC:
1032 return le32_to_cpu(txq_timer->ibss);
1033 case NL80211_IFTYPE_STATION:
1034 return le32_to_cpu(txq_timer->bss);
1035 case NL80211_IFTYPE_AP:
1036 return le32_to_cpu(txq_timer->softap);
1037 case NL80211_IFTYPE_P2P_CLIENT:
1038 return le32_to_cpu(txq_timer->p2p_client);
1039 case NL80211_IFTYPE_P2P_GO:
1040 return le32_to_cpu(txq_timer->p2p_go);
1041 case NL80211_IFTYPE_P2P_DEVICE:
1042 return le32_to_cpu(txq_timer->p2p_device);
1043 default:
1044 WARN_ON(1);
1045 return mvm->cfg->base_params->wd_timeout;
1046 }
1047}
31755207
EG		 1048
1049void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
1050 const char *errmsg)
1051{
1052 struct iwl_fw_dbg_trigger_tlv *trig;
1053 struct iwl_fw_dbg_trigger_mlme *trig_mlme;
1054
1055 if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
1056 goto out;
1057
1058 trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
1059 trig_mlme = (void *)trig->data;
1060 if (!iwl_fw_dbg_trigger_check_stop(mvm, vif, trig))
1061 goto out;
1062
1063 if (trig_mlme->stop_connection_loss &&
1064 --trig_mlme->stop_connection_loss)
1065 goto out;
1066
1067 iwl_mvm_fw_dbg_collect_trig(mvm, trig, "%s", errmsg);
1068
1069out:
1070 ieee80211_connection_loss(vif);
1071}
03098268 1072
9794c64f
LK		 1073/*
1074 * Remove inactive TIDs of a given queue.
1075 * If all queue TIDs are inactive - mark the queue as inactive
1076 * If only some the queue TIDs are inactive - unmap them from the queue
1077 */
1078static void iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm,
1079 struct iwl_mvm_sta *mvmsta, int queue,
1080 unsigned long tid_bitmap)
1081{
1082 int tid;
1083
1084 lockdep_assert_held(&mvmsta->lock);
1085 lockdep_assert_held(&mvm->queue_info_lock);
1086
1087 /* Go over all non-active TIDs, incl. IWL_MAX_TID_COUNT (for mgmt) */
1088 for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
1089 /* If some TFDs are still queued - don't mark TID as inactive */
1090 if (iwl_mvm_tid_queued(&mvmsta->tid_data[tid]))
1091 tid_bitmap &= ~BIT(tid);
1092 }
1093
1094 /* If all TIDs in the queue are inactive - mark queue as inactive. */
1095 if (tid_bitmap == mvm->queue_info[queue].tid_bitmap) {
1096 mvm->queue_info[queue].status = IWL_MVM_QUEUE_INACTIVE;
1097
1098 for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1)
1099 mvmsta->tid_data[tid].is_tid_active = false;
1100
1101 IWL_DEBUG_TX_QUEUES(mvm, "Queue %d marked as inactive\n",
1102 queue);
1103 return;
1104 }
1105
1106 /*
1107 * If we are here, this is a shared queue and not all TIDs timed-out.
1108 * Remove the ones that did.
1109 */
1110 for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
1111 int mac_queue = mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]];
1112
1113 mvmsta->tid_data[tid].txq_id = IEEE80211_INVAL_HW_QUEUE;
1114 mvm->queue_info[queue].hw_queue_to_mac80211 &= ~BIT(mac_queue);
1115 mvm->queue_info[queue].hw_queue_refcount--;
1116 mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
1117 mvmsta->tid_data[tid].is_tid_active = false;
1118
1119 IWL_DEBUG_TX_QUEUES(mvm,
1120 "Removing inactive TID %d from shared Q:%d\n",
1121 tid, queue);
1122 }
1123
1124 IWL_DEBUG_TX_QUEUES(mvm,
1125 "TXQ #%d left with tid bitmap 0x%x\n", queue,
1126 mvm->queue_info[queue].tid_bitmap);
1127
1128 /*
1129 * There may be different TIDs with the same mac queues, so make
1130 * sure all TIDs have existing corresponding mac queues enabled
1131 */
1132 tid_bitmap = mvm->queue_info[queue].tid_bitmap;
1133 for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
1134 mvm->queue_info[queue].hw_queue_to_mac80211 |=
1135 BIT(mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]]);
1136 }
1137
9f9af3d7
LK		 1138 /* If the queue is marked as shared - "unshare" it */
1139 if (mvm->queue_info[queue].hw_queue_refcount == 1 &&
1140 mvm->queue_info[queue].status == IWL_MVM_QUEUE_SHARED) {
1141 mvm->queue_info[queue].status = IWL_MVM_QUEUE_RECONFIGURING;
1142 IWL_DEBUG_TX_QUEUES(mvm, "Marking Q:%d for reconfig\n",
1143 queue);
1144 }
9794c64f
LK		 1145}
1146
1147void iwl_mvm_inactivity_check(struct iwl_mvm *mvm)
1148{
1149 unsigned long timeout_queues_map = 0;
1150 unsigned long now = jiffies;
1151 int i;
1152
1153 spin_lock_bh(&mvm->queue_info_lock);
1154 for (i = 0; i < IWL_MAX_HW_QUEUES; i++)
1155 if (mvm->queue_info[i].hw_queue_refcount > 0)
1156 timeout_queues_map |= BIT(i);
1157 spin_unlock_bh(&mvm->queue_info_lock);
1158
1159 rcu_read_lock();
1160
1161 /*
1162 * If a queue time outs - mark it as INACTIVE (don't remove right away
1163 * if we don't have to.) This is an optimization in case traffic comes
1164 * later, and we don't HAVE to use a currently-inactive queue
1165 */
1166 for_each_set_bit(i, &timeout_queues_map, IWL_MAX_HW_QUEUES) {
1167 struct ieee80211_sta *sta;
1168 struct iwl_mvm_sta *mvmsta;
1169 u8 sta_id;
1170 int tid;
1171 unsigned long inactive_tid_bitmap = 0;
1172 unsigned long queue_tid_bitmap;
1173
1174 spin_lock_bh(&mvm->queue_info_lock);
1175 queue_tid_bitmap = mvm->queue_info[i].tid_bitmap;
1176
1177 /* If TXQ isn't in active use anyway - nothing to do here... */
42db09c1
LK		 1178 if (mvm->queue_info[i].status != IWL_MVM_QUEUE_READY &&
1179 mvm->queue_info[i].status != IWL_MVM_QUEUE_SHARED) {
9794c64f
LK		 1180 spin_unlock_bh(&mvm->queue_info_lock);
1181 continue;
1182 }
1183
1184 /* Check to see if there are inactive TIDs on this queue */
1185 for_each_set_bit(tid, &queue_tid_bitmap,
1186 IWL_MAX_TID_COUNT + 1) {
1187 if (time_after(mvm->queue_info[i].last_frame_time[tid] +
1188 IWL_MVM_DQA_QUEUE_TIMEOUT, now))
1189 continue;
1190
1191 inactive_tid_bitmap |= BIT(tid);
1192 }
1193 spin_unlock_bh(&mvm->queue_info_lock);
1194
1195 /* If all TIDs are active - finish check on this queue */
1196 if (!inactive_tid_bitmap)
1197 continue;
1198
1199 /*
1200 * If we are here - the queue hadn't been served recently and is
1201 * in use
1202 */
1203
1204 sta_id = mvm->queue_info[i].ra_sta_id;
1205 sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]);
1206
1207 /*
1208 * If the STA doesn't exist anymore, it isn't an error. It could
1209 * be that it was removed since getting the queues, and in this
1210 * case it should've inactivated its queues anyway.
1211 */
1212 if (IS_ERR_OR_NULL(sta))
1213 continue;
1214
1215 mvmsta = iwl_mvm_sta_from_mac80211(sta);
1216
1217 spin_lock_bh(&mvmsta->lock);
1218 spin_lock(&mvm->queue_info_lock);
1219 iwl_mvm_remove_inactive_tids(mvm, mvmsta, i,
1220 inactive_tid_bitmap);
1221 spin_unlock(&mvm->queue_info_lock);
1222 spin_unlock_bh(&mvmsta->lock);
1223 }
1224
1225 rcu_read_unlock();
1226}
1227
03098268
AE		 1228int iwl_mvm_send_lqm_cmd(struct ieee80211_vif *vif,
1229 enum iwl_lqm_cmd_operatrions operation,
1230 u32 duration, u32 timeout)
1231{
1232 struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
1233 struct iwl_link_qual_msrmnt_cmd cmd = {
1234 .cmd_operation = cpu_to_le32(operation),
1235 .mac_id = cpu_to_le32(mvm_vif->id),
1236 .measurement_time = cpu_to_le32(duration),
1237 .timeout = cpu_to_le32(timeout),
1238 };
1239 u32 cmdid =
1240 iwl_cmd_id(LINK_QUALITY_MEASUREMENT_CMD, MAC_CONF_GROUP, 0);
1241 int ret;
1242
1243 if (!fw_has_capa(&mvm_vif->mvm->fw->ucode_capa,
1244 IWL_UCODE_TLV_CAPA_LQM_SUPPORT))
1245 return -EOPNOTSUPP;
1246
1247 if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
1248 return -EINVAL;
1249
1250 switch (operation) {
1251 case LQM_CMD_OPERATION_START_MEASUREMENT:
1252 if (iwl_mvm_lqm_active(mvm_vif->mvm))
1253 return -EBUSY;
1254 if (!vif->bss_conf.assoc)
1255 return -EINVAL;
1256 mvm_vif->lqm_active = true;
1257 break;
1258 case LQM_CMD_OPERATION_STOP_MEASUREMENT:
1259 if (!iwl_mvm_lqm_active(mvm_vif->mvm))
1260 return -EINVAL;
1261 break;
1262 default:
1263 return -EINVAL;
1264 }
1265
1266 ret = iwl_mvm_send_cmd_pdu(mvm_vif->mvm, cmdid, 0, sizeof(cmd),
1267 &cmd);
1268
1269 /* command failed - roll back lqm_active state */
1270 if (ret) {
1271 mvm_vif->lqm_active =
1272 operation == LQM_CMD_OPERATION_STOP_MEASUREMENT;
1273 }
1274
1275 return ret;
1276}
1277
1278static void iwl_mvm_lqm_active_iterator(void *_data, u8 *mac,
1279 struct ieee80211_vif *vif)
1280{
1281 struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
1282 bool *lqm_active = _data;
1283
1284 *lqm_active = *lqm_active || mvm_vif->lqm_active;
1285}
1286
1287bool iwl_mvm_lqm_active(struct iwl_mvm *mvm)
1288{
1289 bool ret = false;
1290
1291 lockdep_assert_held(&mvm->mutex);
1292 ieee80211_iterate_active_interfaces_atomic(
1293 mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1294 iwl_mvm_lqm_active_iterator, &ret);
1295
1296 return ret;
1297}
Linux kernel - Deliverables
This page took 0.326725 seconds and 5 git commands to generate.