Merge remote-tracking branch 'selinux/next'
[deliverable/linux.git] / drivers / net / wireless / ti / wlcore / spi.c
CommitLineData
f5fc0f86
LC
1/*
2 * This file is part of wl1271
3 *
4 * Copyright (C) 2008-2009 Nokia Corporation
5 *
6 * Contact: Luciano Coelho <luciano.coelho@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
a6b7a407 24#include <linux/interrupt.h>
2d5e82b8 25#include <linux/irq.h>
f5fc0f86 26#include <linux/module.h>
e757201b
GS
27#include <linux/slab.h>
28#include <linux/swab.h>
f5fc0f86
LC
29#include <linux/crc7.h>
30#include <linux/spi/spi.h>
c1f9a095 31#include <linux/wl12xx.h>
0969d679 32#include <linux/platform_device.h>
04654c38 33#include <linux/of_irq.h>
4c1ce07b 34#include <linux/regulator/consumer.h>
f5fc0f86 35
c31be25a 36#include "wlcore.h"
f5fc0f86 37#include "wl12xx_80211.h"
00d20100 38#include "io.h"
f5fc0f86 39
760d969f
TP
40#define WSPI_CMD_READ 0x40000000
41#define WSPI_CMD_WRITE 0x00000000
42#define WSPI_CMD_FIXED 0x20000000
43#define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
44#define WSPI_CMD_BYTE_LENGTH_OFFSET 17
45#define WSPI_CMD_BYTE_ADDR 0x0001FFFF
46
47#define WSPI_INIT_CMD_CRC_LEN 5
48
49#define WSPI_INIT_CMD_START 0x00
50#define WSPI_INIT_CMD_TX 0x40
51/* the extra bypass bit is sampled by the TNET as '1' */
52#define WSPI_INIT_CMD_BYPASS_BIT 0x80
53#define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
54#define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
55#define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
56#define WSPI_INIT_CMD_IOD 0x40
57#define WSPI_INIT_CMD_IP 0x20
58#define WSPI_INIT_CMD_CS 0x10
59#define WSPI_INIT_CMD_WS 0x08
60#define WSPI_INIT_CMD_WSPI 0x01
61#define WSPI_INIT_CMD_END 0x01
62
63#define WSPI_INIT_CMD_LEN 8
64
65#define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
66 ((WL1271_BUSY_WORD_LEN - 4) / sizeof(u32))
67#define HW_ACCESS_WSPI_INIT_CMD_MASK 0
68
5c57a901
IY
69/* HW limitation: maximum possible chunk size is 4095 bytes */
70#define WSPI_MAX_CHUNK_SIZE 4092
71
61932ba5 72/*
01efe65a
ER
73 * wl18xx driver aggregation buffer size is (13 * PAGE_SIZE) compared to
74 * (4 * PAGE_SIZE) for wl12xx, so use the larger buffer needed for wl18xx
61932ba5 75 */
01efe65a 76#define SPI_AGGR_BUFFER_SIZE (13 * PAGE_SIZE)
61932ba5 77
9b2761cb
UM
78/* Maximum number of SPI write chunks */
79#define WSPI_MAX_NUM_OF_CHUNKS \
80 ((SPI_AGGR_BUFFER_SIZE / WSPI_MAX_CHUNK_SIZE) + 1)
81
5c57a901 82
01efe65a
ER
83struct wilink_familiy_data {
84 char name[8];
85};
86
4ad0579a 87static const struct wilink_familiy_data *wilink_data;
01efe65a
ER
88
89static const struct wilink_familiy_data wl18xx_data = {
90 .name = "wl18xx",
91};
92
93static const struct wilink_familiy_data wl12xx_data = {
94 .name = "wl12xx",
95};
96
b65019f6
FB
97struct wl12xx_spi_glue {
98 struct device *dev;
0969d679 99 struct platform_device *core;
4c1ce07b 100 struct regulator *reg; /* Power regulator */
b65019f6
FB
101};
102
a390e85c 103static void wl12xx_spi_reset(struct device *child)
8197b711 104{
a390e85c 105 struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
f5fc0f86
LC
106 u8 *cmd;
107 struct spi_transfer t;
108 struct spi_message m;
109
110 cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
111 if (!cmd) {
e5d3625e
LC
112 dev_err(child->parent,
113 "could not allocate cmd for spi reset\n");
f5fc0f86
LC
114 return;
115 }
116
117 memset(&t, 0, sizeof(t));
118 spi_message_init(&m);
119
120 memset(cmd, 0xff, WSPI_INIT_CMD_LEN);
121
122 t.tx_buf = cmd;
123 t.len = WSPI_INIT_CMD_LEN;
124 spi_message_add_tail(&t, &m);
125
b65019f6 126 spi_sync(to_spi_device(glue->dev), &m);
f5fc0f86 127
0dd38667 128 kfree(cmd);
f5fc0f86
LC
129}
130
a390e85c 131static void wl12xx_spi_init(struct device *child)
f5fc0f86 132{
a390e85c 133 struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
f5fc0f86
LC
134 struct spi_transfer t;
135 struct spi_message m;
01efe65a 136 struct spi_device *spi = to_spi_device(glue->dev);
e757201b 137 u8 *cmd = kzalloc(WSPI_INIT_CMD_LEN, GFP_KERNEL);
f5fc0f86 138
f5fc0f86 139 if (!cmd) {
e5d3625e
LC
140 dev_err(child->parent,
141 "could not allocate cmd for spi init\n");
f5fc0f86
LC
142 return;
143 }
144
f5fc0f86
LC
145 memset(&t, 0, sizeof(t));
146 spi_message_init(&m);
147
148 /*
149 * Set WSPI_INIT_COMMAND
150 * the data is being send from the MSB to LSB
151 */
e757201b
GS
152 cmd[0] = 0xff;
153 cmd[1] = 0xff;
154 cmd[2] = WSPI_INIT_CMD_START | WSPI_INIT_CMD_TX;
155 cmd[3] = 0;
156 cmd[4] = 0;
157 cmd[5] = HW_ACCESS_WSPI_INIT_CMD_MASK << 3;
158 cmd[5] |= HW_ACCESS_WSPI_FIXED_BUSY_LEN & WSPI_INIT_CMD_FIXEDBUSY_LEN;
159
160 cmd[6] = WSPI_INIT_CMD_IOD | WSPI_INIT_CMD_IP | WSPI_INIT_CMD_CS
161 | WSPI_INIT_CMD_WSPI | WSPI_INIT_CMD_WS;
f5fc0f86
LC
162
163 if (HW_ACCESS_WSPI_FIXED_BUSY_LEN == 0)
e757201b 164 cmd[6] |= WSPI_INIT_CMD_DIS_FIXEDBUSY;
f5fc0f86 165 else
e757201b 166 cmd[6] |= WSPI_INIT_CMD_EN_FIXEDBUSY;
f5fc0f86 167
e757201b 168 cmd[7] = crc7_be(0, cmd+2, WSPI_INIT_CMD_CRC_LEN) | WSPI_INIT_CMD_END;
01efe65a 169
e757201b
GS
170 /*
171 * The above is the logical order; it must actually be stored
172 * in the buffer byte-swapped.
173 */
174 __swab32s((u32 *)cmd);
175 __swab32s((u32 *)cmd+1);
f5fc0f86
LC
176
177 t.tx_buf = cmd;
178 t.len = WSPI_INIT_CMD_LEN;
179 spi_message_add_tail(&t, &m);
180
b65019f6 181 spi_sync(to_spi_device(glue->dev), &m);
01efe65a
ER
182
183 /* Send extra clocks with inverted CS (high). this is required
184 * by the wilink family in order to successfully enter WSPI mode.
185 */
186 spi->mode ^= SPI_CS_HIGH;
187 memset(&m, 0, sizeof(m));
188 spi_message_init(&m);
189
190 cmd[0] = 0xff;
191 cmd[1] = 0xff;
192 cmd[2] = 0xff;
193 cmd[3] = 0xff;
194 __swab32s((u32 *)cmd);
195
196 t.tx_buf = cmd;
197 t.len = 4;
198 spi_message_add_tail(&t, &m);
199
200 spi_sync(to_spi_device(glue->dev), &m);
201
202 /* Restore chip select configration to normal */
203 spi->mode ^= SPI_CS_HIGH;
bb123611 204 kfree(cmd);
f5fc0f86
LC
205}
206
545f1da8
JO
207#define WL1271_BUSY_WORD_TIMEOUT 1000
208
a390e85c 209static int wl12xx_spi_read_busy(struct device *child)
545f1da8 210{
a390e85c
FB
211 struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
212 struct wl1271 *wl = dev_get_drvdata(child);
545f1da8
JO
213 struct spi_transfer t[1];
214 struct spi_message m;
215 u32 *busy_buf;
216 int num_busy_bytes = 0;
217
545f1da8
JO
218 /*
219 * Read further busy words from SPI until a non-busy word is
220 * encountered, then read the data itself into the buffer.
221 */
545f1da8
JO
222
223 num_busy_bytes = WL1271_BUSY_WORD_TIMEOUT;
224 busy_buf = wl->buffer_busyword;
225 while (num_busy_bytes) {
226 num_busy_bytes--;
227 spi_message_init(&m);
228 memset(t, 0, sizeof(t));
229 t[0].rx_buf = busy_buf;
230 t[0].len = sizeof(u32);
259da430 231 t[0].cs_change = true;
545f1da8 232 spi_message_add_tail(&t[0], &m);
b65019f6 233 spi_sync(to_spi_device(glue->dev), &m);
545f1da8 234
259da430
JO
235 if (*busy_buf & 0x1)
236 return 0;
545f1da8
JO
237 }
238
239 /* The SPI bus is unresponsive, the read failed. */
e5d3625e 240 dev_err(child->parent, "SPI read busy-word timeout!\n");
259da430 241 return -ETIMEDOUT;
545f1da8
JO
242}
243
f1a26e63
IY
244static int __must_check wl12xx_spi_raw_read(struct device *child, int addr,
245 void *buf, size_t len, bool fixed)
f5fc0f86 246{
a390e85c
FB
247 struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
248 struct wl1271 *wl = dev_get_drvdata(child);
5c57a901 249 struct spi_transfer t[2];
f5fc0f86 250 struct spi_message m;
545f1da8 251 u32 *busy_buf;
f5fc0f86 252 u32 *cmd;
5c57a901 253 u32 chunk_len;
f5fc0f86 254
5c57a901 255 while (len > 0) {
c8e49556 256 chunk_len = min_t(size_t, WSPI_MAX_CHUNK_SIZE, len);
f5fc0f86 257
5c57a901
IY
258 cmd = &wl->buffer_cmd;
259 busy_buf = wl->buffer_busyword;
f5fc0f86 260
5c57a901
IY
261 *cmd = 0;
262 *cmd |= WSPI_CMD_READ;
263 *cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
264 WSPI_CMD_BYTE_LENGTH;
265 *cmd |= addr & WSPI_CMD_BYTE_ADDR;
f5fc0f86 266
5c57a901
IY
267 if (fixed)
268 *cmd |= WSPI_CMD_FIXED;
f5fc0f86 269
5c57a901
IY
270 spi_message_init(&m);
271 memset(t, 0, sizeof(t));
f5fc0f86 272
5c57a901
IY
273 t[0].tx_buf = cmd;
274 t[0].len = 4;
275 t[0].cs_change = true;
276 spi_message_add_tail(&t[0], &m);
f5fc0f86 277
5c57a901
IY
278 /* Busy and non busy words read */
279 t[1].rx_buf = busy_buf;
280 t[1].len = WL1271_BUSY_WORD_LEN;
281 t[1].cs_change = true;
282 spi_message_add_tail(&t[1], &m);
f5fc0f86 283
b65019f6 284 spi_sync(to_spi_device(glue->dev), &m);
259da430 285
5c57a901 286 if (!(busy_buf[WL1271_BUSY_WORD_CNT - 1] & 0x1) &&
a390e85c 287 wl12xx_spi_read_busy(child)) {
5c57a901 288 memset(buf, 0, chunk_len);
02eb1d9d 289 return 0;
5c57a901 290 }
259da430 291
5c57a901
IY
292 spi_message_init(&m);
293 memset(t, 0, sizeof(t));
259da430 294
5c57a901
IY
295 t[0].rx_buf = buf;
296 t[0].len = chunk_len;
297 t[0].cs_change = true;
298 spi_message_add_tail(&t[0], &m);
299
b65019f6 300 spi_sync(to_spi_device(glue->dev), &m);
f5fc0f86 301
5c57a901
IY
302 if (!fixed)
303 addr += chunk_len;
304 buf += chunk_len;
305 len -= chunk_len;
306 }
02eb1d9d
IY
307
308 return 0;
f5fc0f86
LC
309}
310
01efe65a
ER
311static int __wl12xx_spi_raw_write(struct device *child, int addr,
312 void *buf, size_t len, bool fixed)
f5fc0f86 313{
a390e85c 314 struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
01efe65a 315 struct spi_transfer *t;
f5fc0f86 316 struct spi_message m;
9b2761cb 317 u32 commands[WSPI_MAX_NUM_OF_CHUNKS]; /* 1 command per chunk */
f5fc0f86 318 u32 *cmd;
5c57a901
IY
319 u32 chunk_len;
320 int i;
f5fc0f86 321
01efe65a
ER
322 /* SPI write buffers - 2 for each chunk */
323 t = kzalloc(sizeof(*t) * 2 * WSPI_MAX_NUM_OF_CHUNKS, GFP_KERNEL);
324 if (!t)
325 return -ENOMEM;
326
61932ba5 327 WARN_ON(len > SPI_AGGR_BUFFER_SIZE);
f5fc0f86
LC
328
329 spi_message_init(&m);
f5fc0f86 330
5c57a901
IY
331 cmd = &commands[0];
332 i = 0;
333 while (len > 0) {
c8e49556 334 chunk_len = min_t(size_t, WSPI_MAX_CHUNK_SIZE, len);
f5fc0f86 335
5c57a901
IY
336 *cmd = 0;
337 *cmd |= WSPI_CMD_WRITE;
338 *cmd |= (chunk_len << WSPI_CMD_BYTE_LENGTH_OFFSET) &
339 WSPI_CMD_BYTE_LENGTH;
340 *cmd |= addr & WSPI_CMD_BYTE_ADDR;
f5fc0f86 341
5c57a901
IY
342 if (fixed)
343 *cmd |= WSPI_CMD_FIXED;
344
345 t[i].tx_buf = cmd;
346 t[i].len = sizeof(*cmd);
347 spi_message_add_tail(&t[i++], &m);
348
349 t[i].tx_buf = buf;
350 t[i].len = chunk_len;
351 spi_message_add_tail(&t[i++], &m);
f5fc0f86 352
5c57a901
IY
353 if (!fixed)
354 addr += chunk_len;
355 buf += chunk_len;
356 len -= chunk_len;
357 cmd++;
358 }
359
b65019f6 360 spi_sync(to_spi_device(glue->dev), &m);
02eb1d9d 361
01efe65a 362 kfree(t);
02eb1d9d 363 return 0;
f5fc0f86 364}
2d5e82b8 365
01efe65a
ER
366static int __must_check wl12xx_spi_raw_write(struct device *child, int addr,
367 void *buf, size_t len, bool fixed)
368{
369 int ret;
370
371 /* The ELP wakeup write may fail the first time due to internal
372 * hardware latency. It is safer to send the wakeup command twice to
373 * avoid unexpected failures.
374 */
375 if (addr == HW_ACCESS_ELP_CTRL_REG)
376 ret = __wl12xx_spi_raw_write(child, addr, buf, len, fixed);
377 ret = __wl12xx_spi_raw_write(child, addr, buf, len, fixed);
378
379 return ret;
380}
381
4c1ce07b
UM
382/**
383 * wl12xx_spi_set_power - power on/off the wl12xx unit
384 * @child: wl12xx device handle.
385 * @enable: true/false to power on/off the unit.
386 *
387 * use the WiFi enable regulator to enable/disable the WiFi unit.
388 */
389static int wl12xx_spi_set_power(struct device *child, bool enable)
390{
391 int ret = 0;
392 struct wl12xx_spi_glue *glue = dev_get_drvdata(child->parent);
393
394 WARN_ON(!glue->reg);
395
396 /* Update regulator state */
397 if (enable) {
398 ret = regulator_enable(glue->reg);
399 if (ret)
400 dev_err(child, "Power enable failure\n");
401 } else {
402 ret = regulator_disable(glue->reg);
403 if (ret)
404 dev_err(child, "Power disable failure\n");
405 }
406
407 return ret;
408}
409
01efe65a
ER
410/**
411 * wl12xx_spi_set_block_size
412 *
413 * This function is not needed for spi mode, but need to be present.
414 * Without it defined the wlcore fallback to use the wrong packet
415 * allignment on tx.
416 */
417static void wl12xx_spi_set_block_size(struct device *child,
418 unsigned int blksz)
419{
420}
421
8197b711 422static struct wl1271_if_operations spi_ops = {
a390e85c
FB
423 .read = wl12xx_spi_raw_read,
424 .write = wl12xx_spi_raw_write,
425 .reset = wl12xx_spi_reset,
426 .init = wl12xx_spi_init,
4c1ce07b 427 .power = wl12xx_spi_set_power,
01efe65a 428 .set_block_size = wl12xx_spi_set_block_size,
8197b711
TP
429};
430
04654c38 431static const struct of_device_id wlcore_spi_of_match_table[] = {
01efe65a
ER
432 { .compatible = "ti,wl1271", .data = &wl12xx_data},
433 { .compatible = "ti,wl1273", .data = &wl12xx_data},
434 { .compatible = "ti,wl1281", .data = &wl12xx_data},
435 { .compatible = "ti,wl1283", .data = &wl12xx_data},
436 { .compatible = "ti,wl1801", .data = &wl18xx_data},
437 { .compatible = "ti,wl1805", .data = &wl18xx_data},
438 { .compatible = "ti,wl1807", .data = &wl18xx_data},
439 { .compatible = "ti,wl1831", .data = &wl18xx_data},
440 { .compatible = "ti,wl1835", .data = &wl18xx_data},
441 { .compatible = "ti,wl1837", .data = &wl18xx_data},
04654c38
UM
442 { }
443};
444MODULE_DEVICE_TABLE(of, wlcore_spi_of_match_table);
445
446/**
447 * wlcore_probe_of - DT node parsing.
448 * @spi: SPI slave device parameters.
449 * @res: resource parameters.
450 * @glue: wl12xx SPI bus to slave device glue parameters.
451 * @pdev_data: wlcore device parameters
452 */
453static int wlcore_probe_of(struct spi_device *spi, struct wl12xx_spi_glue *glue,
454 struct wlcore_platdev_data *pdev_data)
455{
456 struct device_node *dt_node = spi->dev.of_node;
01efe65a
ER
457 const struct of_device_id *of_id;
458
459 of_id = of_match_node(wlcore_spi_of_match_table, dt_node);
460 if (!of_id)
461 return -ENODEV;
462
463 wilink_data = of_id->data;
464 dev_info(&spi->dev, "selected chip familiy is %s\n",
465 wilink_data->name);
04654c38
UM
466
467 if (of_find_property(dt_node, "clock-xtal", NULL))
468 pdev_data->ref_clock_xtal = true;
469
01efe65a
ER
470 /* optional clock frequency params */
471 of_property_read_u32(dt_node, "ref-clock-frequency",
472 &pdev_data->ref_clock_freq);
473 of_property_read_u32(dt_node, "tcxo-clock-frequency",
474 &pdev_data->tcxo_clock_freq);
04654c38
UM
475
476 return 0;
477}
478
b74324d1 479static int wl1271_probe(struct spi_device *spi)
2d5e82b8 480{
b65019f6 481 struct wl12xx_spi_glue *glue;
4c104162 482 struct wlcore_platdev_data pdev_data;
0969d679 483 struct resource res[1];
372e3a84 484 int ret;
2d5e82b8 485
4c104162 486 memset(&pdev_data, 0x00, sizeof(pdev_data));
afb43e6d 487
4c104162 488 pdev_data.if_ops = &spi_ops;
a390e85c 489
372e3a84 490 glue = devm_kzalloc(&spi->dev, sizeof(*glue), GFP_KERNEL);
b65019f6 491 if (!glue) {
e5d3625e 492 dev_err(&spi->dev, "can't allocate glue\n");
372e3a84 493 return -ENOMEM;
b65019f6
FB
494 }
495
b65019f6 496 glue->dev = &spi->dev;
b65019f6
FB
497
498 spi_set_drvdata(spi, glue);
2d5e82b8
TP
499
500 /* This is the only SPI value that we need to set here, the rest
501 * comes from the board-peripherals file */
502 spi->bits_per_word = 32;
503
4c1ce07b
UM
504 glue->reg = devm_regulator_get(&spi->dev, "vwlan");
505 if (PTR_ERR(glue->reg) == -EPROBE_DEFER)
506 return -EPROBE_DEFER;
507 if (IS_ERR(glue->reg)) {
508 dev_err(glue->dev, "can't get regulator\n");
509 return PTR_ERR(glue->reg);
510 }
511
04654c38 512 ret = wlcore_probe_of(spi, glue, &pdev_data);
287980e4 513 if (ret) {
04654c38
UM
514 dev_err(glue->dev,
515 "can't get device tree parameters (%d)\n", ret);
516 return ret;
517 }
518
2d5e82b8
TP
519 ret = spi_setup(spi);
520 if (ret < 0) {
e5d3625e 521 dev_err(glue->dev, "spi_setup failed\n");
372e3a84 522 return ret;
2d5e82b8
TP
523 }
524
01efe65a
ER
525 glue->core = platform_device_alloc(wilink_data->name,
526 PLATFORM_DEVID_AUTO);
0969d679 527 if (!glue->core) {
e5d3625e 528 dev_err(glue->dev, "can't allocate platform_device\n");
372e3a84 529 return -ENOMEM;
0969d679
FB
530 }
531
532 glue->core->dev.parent = &spi->dev;
533
534 memset(res, 0x00, sizeof(res));
535
536 res[0].start = spi->irq;
04654c38 537 res[0].flags = IORESOURCE_IRQ | irq_get_trigger_type(spi->irq);
0969d679
FB
538 res[0].name = "irq";
539
540 ret = platform_device_add_resources(glue->core, res, ARRAY_SIZE(res));
541 if (ret) {
e5d3625e 542 dev_err(glue->dev, "can't add resources\n");
0969d679
FB
543 goto out_dev_put;
544 }
545
4c104162
CE
546 ret = platform_device_add_data(glue->core, &pdev_data,
547 sizeof(pdev_data));
0969d679 548 if (ret) {
e5d3625e 549 dev_err(glue->dev, "can't add platform data\n");
0969d679
FB
550 goto out_dev_put;
551 }
552
553 ret = platform_device_add(glue->core);
554 if (ret) {
e5d3625e 555 dev_err(glue->dev, "can't register platform device\n");
0969d679
FB
556 goto out_dev_put;
557 }
558
2d5e82b8
TP
559 return 0;
560
0969d679
FB
561out_dev_put:
562 platform_device_put(glue->core);
2d5e82b8
TP
563 return ret;
564}
565
b74324d1 566static int wl1271_remove(struct spi_device *spi)
2d5e82b8 567{
b65019f6 568 struct wl12xx_spi_glue *glue = spi_get_drvdata(spi);
2d5e82b8 569
ca6dc103 570 platform_device_unregister(glue->core);
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571
572 return 0;
573}
574
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575static struct spi_driver wl1271_spi_driver = {
576 .driver = {
7fdd50d0 577 .name = "wl1271_spi",
04654c38 578 .of_match_table = of_match_ptr(wlcore_spi_of_match_table),
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579 },
580
581 .probe = wl1271_probe,
b74324d1 582 .remove = wl1271_remove,
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583};
584
d5a49178 585module_spi_driver(wl1271_spi_driver);
2d5e82b8 586MODULE_LICENSE("GPL");
5245e3a9 587MODULE_AUTHOR("Luciano Coelho <coelho@ti.com>");
2d5e82b8 588MODULE_AUTHOR("Juuso Oikarinen <juuso.oikarinen@nokia.com>");
f148cfdd 589MODULE_ALIAS("spi:wl1271");
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