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1 | /* |
2 | * PCI Express Downstream Port Containment services driver | |
61612e6d PG |
3 | * Author: Keith Busch <keith.busch@intel.com> |
4 | * | |
26e51571 KB |
5 | * Copyright (C) 2016 Intel Corp. |
6 | * | |
7 | * This file is subject to the terms and conditions of the GNU General Public | |
8 | * License. See the file "COPYING" in the main directory of this archive | |
9 | * for more details. | |
10 | */ | |
11 | ||
12 | #include <linux/delay.h> | |
13 | #include <linux/interrupt.h> | |
61612e6d | 14 | #include <linux/init.h> |
26e51571 KB |
15 | #include <linux/pci.h> |
16 | #include <linux/pcieport_if.h> | |
17 | ||
18 | struct dpc_dev { | |
19 | struct pcie_device *dev; | |
14a16d57 MW |
20 | struct work_struct work; |
21 | int cap_pos; | |
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22 | }; |
23 | ||
24 | static void dpc_wait_link_inactive(struct pci_dev *pdev) | |
25 | { | |
26 | unsigned long timeout = jiffies + HZ; | |
27 | u16 lnk_status; | |
28 | ||
29 | pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status); | |
30 | while (lnk_status & PCI_EXP_LNKSTA_DLLLA && | |
31 | !time_after(jiffies, timeout)) { | |
32 | msleep(10); | |
33 | pcie_capability_read_word(pdev, PCI_EXP_LNKSTA, &lnk_status); | |
34 | } | |
35 | if (lnk_status & PCI_EXP_LNKSTA_DLLLA) | |
36 | dev_warn(&pdev->dev, "Link state not disabled for DPC event"); | |
37 | } | |
38 | ||
39 | static void interrupt_event_handler(struct work_struct *work) | |
40 | { | |
41 | struct dpc_dev *dpc = container_of(work, struct dpc_dev, work); | |
42 | struct pci_dev *dev, *temp, *pdev = dpc->dev->port; | |
43 | struct pci_bus *parent = pdev->subordinate; | |
44 | ||
45 | pci_lock_rescan_remove(); | |
46 | list_for_each_entry_safe_reverse(dev, temp, &parent->devices, | |
47 | bus_list) { | |
48 | pci_dev_get(dev); | |
49 | pci_stop_and_remove_bus_device(dev); | |
50 | pci_dev_put(dev); | |
51 | } | |
52 | pci_unlock_rescan_remove(); | |
53 | ||
54 | dpc_wait_link_inactive(pdev); | |
55 | pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, | |
56 | PCI_EXP_DPC_STATUS_TRIGGER | PCI_EXP_DPC_STATUS_INTERRUPT); | |
57 | } | |
58 | ||
59 | static irqreturn_t dpc_irq(int irq, void *context) | |
60 | { | |
61 | struct dpc_dev *dpc = (struct dpc_dev *)context; | |
62 | struct pci_dev *pdev = dpc->dev->port; | |
63 | u16 status, source; | |
64 | ||
65 | pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_STATUS, &status); | |
66 | pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_SOURCE_ID, | |
67 | &source); | |
68 | if (!status) | |
69 | return IRQ_NONE; | |
70 | ||
71 | dev_info(&dpc->dev->device, "DPC containment event, status:%#06x source:%#06x\n", | |
72 | status, source); | |
73 | ||
74 | if (status & PCI_EXP_DPC_STATUS_TRIGGER) { | |
75 | u16 reason = (status >> 1) & 0x3; | |
76 | ||
77 | dev_warn(&dpc->dev->device, "DPC %s triggered, remove downstream devices\n", | |
78 | (reason == 0) ? "unmasked uncorrectable error" : | |
79 | (reason == 1) ? "ERR_NONFATAL" : | |
80 | (reason == 2) ? "ERR_FATAL" : "extended error"); | |
81 | schedule_work(&dpc->work); | |
82 | } | |
83 | return IRQ_HANDLED; | |
84 | } | |
85 | ||
86 | #define FLAG(x, y) (((x) & (y)) ? '+' : '-') | |
87 | static int dpc_probe(struct pcie_device *dev) | |
88 | { | |
89 | struct dpc_dev *dpc; | |
90 | struct pci_dev *pdev = dev->port; | |
91 | int status; | |
92 | u16 ctl, cap; | |
93 | ||
733f3d13 | 94 | dpc = devm_kzalloc(&dev->device, sizeof(*dpc), GFP_KERNEL); |
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95 | if (!dpc) |
96 | return -ENOMEM; | |
97 | ||
98 | dpc->cap_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_DPC); | |
99 | dpc->dev = dev; | |
100 | INIT_WORK(&dpc->work, interrupt_event_handler); | |
101 | set_service_data(dev, dpc); | |
102 | ||
733f3d13 MW |
103 | status = devm_request_irq(&dev->device, dev->irq, dpc_irq, IRQF_SHARED, |
104 | "pcie-dpc", dpc); | |
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105 | if (status) { |
106 | dev_warn(&dev->device, "request IRQ%d failed: %d\n", dev->irq, | |
107 | status); | |
733f3d13 | 108 | return status; |
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109 | } |
110 | ||
111 | pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CAP, &cap); | |
112 | pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl); | |
113 | ||
114 | ctl |= PCI_EXP_DPC_CTL_EN_NONFATAL | PCI_EXP_DPC_CTL_INT_EN; | |
115 | pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl); | |
116 | ||
117 | dev_info(&dev->device, "DPC error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n", | |
118 | cap & 0xf, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT), | |
119 | FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP), | |
120 | FLAG(cap, PCI_EXP_DPC_CAP_SW_TRIGGER), (cap >> 8) & 0xf, | |
121 | FLAG(cap, PCI_EXP_DPC_CAP_DL_ACTIVE)); | |
122 | return status; | |
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123 | } |
124 | ||
125 | static void dpc_remove(struct pcie_device *dev) | |
126 | { | |
127 | struct dpc_dev *dpc = get_service_data(dev); | |
128 | struct pci_dev *pdev = dev->port; | |
129 | u16 ctl; | |
130 | ||
131 | pci_read_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, &ctl); | |
132 | ctl &= ~(PCI_EXP_DPC_CTL_EN_NONFATAL | PCI_EXP_DPC_CTL_INT_EN); | |
133 | pci_write_config_word(pdev, dpc->cap_pos + PCI_EXP_DPC_CTL, ctl); | |
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134 | } |
135 | ||
136 | static struct pcie_port_service_driver dpcdriver = { | |
137 | .name = "dpc", | |
7e16fd6d | 138 | .port_type = PCIE_ANY_PORT, |
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139 | .service = PCIE_PORT_SERVICE_DPC, |
140 | .probe = dpc_probe, | |
141 | .remove = dpc_remove, | |
142 | }; | |
143 | ||
144 | static int __init dpc_service_init(void) | |
145 | { | |
146 | return pcie_port_service_register(&dpcdriver); | |
147 | } | |
61612e6d | 148 | device_initcall(dpc_service_init); |