[deliverable/linux.git] / drivers / pci / pcie / pme.c

/*
 * PCIe Native PME support
 *
 * Copyright (C) 2007 - 2009 Intel Corp
 * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
 * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License V2.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/pcieport_if.h>
#include <linux/pm_runtime.h>

#include "../pci.h"
#include "portdrv.h"

/*
 * If this switch is set, MSI will not be used for PCIe PME signaling.  This
 * causes the PCIe port driver to use INTx interrupts only, but it turns out
 * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
 * wake-up from system sleep states.
 */
bool pcie_pme_msi_disabled;

static int __init pcie_pme_setup(char *str)
{
	if (!strncmp(str, "nomsi", 5))
		pcie_pme_msi_disabled = true;

	return 1;
}
__setup("pcie_pme=", pcie_pme_setup);

enum pme_suspend_level {
	PME_SUSPEND_NONE = 0,
	PME_SUSPEND_WAKEUP,
	PME_SUSPEND_NOIRQ,
};

struct pcie_pme_service_data {
	spinlock_t lock;
	struct pcie_device *srv;
	struct work_struct work;
	enum pme_suspend_level suspend_level;
};

/**
 * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
 * @dev: PCIe root port or event collector.
 * @enable: Enable or disable the interrupt.
 */
void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
{
	if (enable)
		pcie_capability_set_word(dev, PCI_EXP_RTCTL,
					 PCI_EXP_RTCTL_PMEIE);
	else
		pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
					   PCI_EXP_RTCTL_PMEIE);
}

/**
 * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
 * @bus: PCI bus to scan.
 *
 * Scan given PCI bus and all buses under it for devices asserting PME#.
 */
static bool pcie_pme_walk_bus(struct pci_bus *bus)
{
	struct pci_dev *dev;
	bool ret = false;

	list_for_each_entry(dev, &bus->devices, bus_list) {
		/* Skip PCIe devices in case we started from a root port. */
		if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
			if (dev->pme_poll)
				dev->pme_poll = false;

			pci_wakeup_event(dev);
			pm_request_resume(&dev->dev);
			ret = true;
		}

		if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
			ret = true;
	}

	return ret;
}

/**
 * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
 * @bus: Secondary bus of the bridge.
 * @devfn: Device/function number to check.
 *
 * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
 * PCIe PME message.  In such that case the bridge should use the Requester ID
 * of device/function number 0 on its secondary bus.
 */
static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
{
	struct pci_dev *dev;
	bool found = false;

	if (devfn)
		return false;

	dev = pci_dev_get(bus->self);
	if (!dev)
		return false;

	if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
		down_read(&pci_bus_sem);
		if (pcie_pme_walk_bus(bus))
			found = true;
		up_read(&pci_bus_sem);
	}

	pci_dev_put(dev);
	return found;
}

/**
 * pcie_pme_handle_request - Find device that generated PME and handle it.
 * @port: Root port or event collector that generated the PME interrupt.
 * @req_id: PCIe Requester ID of the device that generated the PME.
 */
static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
{
	u8 busnr = req_id >> 8, devfn = req_id & 0xff;
	struct pci_bus *bus;
	struct pci_dev *dev;
	bool found = false;

	/* First, check if the PME is from the root port itself. */
	if (port->devfn == devfn && port->bus->number == busnr) {
		if (port->pme_poll)
			port->pme_poll = false;

		if (pci_check_pme_status(port)) {
			pm_request_resume(&port->dev);
			found = true;
		} else {
			/*
			 * Apparently, the root port generated the PME on behalf
			 * of a non-PCIe device downstream.  If this is done by
			 * a root port, the Requester ID field in its status
			 * register may contain either the root port's, or the
			 * source device's information (PCI Express Base
			 * Specification, Rev. 2.0, Section 6.1.9).
			 */
			down_read(&pci_bus_sem);
			found = pcie_pme_walk_bus(port->subordinate);
			up_read(&pci_bus_sem);
		}
		goto out;
	}

	/* Second, find the bus the source device is on. */
	bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
	if (!bus)
		goto out;

	/* Next, check if the PME is from a PCIe-PCI bridge. */
	found = pcie_pme_from_pci_bridge(bus, devfn);
	if (found)
		goto out;

	/* Finally, try to find the PME source on the bus. */
	down_read(&pci_bus_sem);
	list_for_each_entry(dev, &bus->devices, bus_list) {
		pci_dev_get(dev);
		if (dev->devfn == devfn) {
			found = true;
			break;
		}
		pci_dev_put(dev);
	}
	up_read(&pci_bus_sem);

	if (found) {
		/* The device is there, but we have to check its PME status. */
		found = pci_check_pme_status(dev);
		if (found) {
			if (dev->pme_poll)
				dev->pme_poll = false;

			pci_wakeup_event(dev);
			pm_request_resume(&dev->dev);
		}
		pci_dev_put(dev);
	} else if (devfn) {
		/*
		 * The device is not there, but we can still try to recover by
		 * assuming that the PME was reported by a PCIe-PCI bridge that
		 * used devfn different from zero.
		 */
		dev_dbg(&port->dev, "PME interrupt generated for non-existent device %02x:%02x.%d\n",
			busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
		found = pcie_pme_from_pci_bridge(bus, 0);
	}

 out:
	if (!found)
		dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
}

/**
 * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
 * @work: Work structure giving access to service data.
 */
static void pcie_pme_work_fn(struct work_struct *work)
{
	struct pcie_pme_service_data *data =
			container_of(work, struct pcie_pme_service_data, work);
	struct pci_dev *port = data->srv->port;
	u32 rtsta;

	spin_lock_irq(&data->lock);

	for (;;) {
		if (data->suspend_level != PME_SUSPEND_NONE)
			break;

		pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
		if (rtsta & PCI_EXP_RTSTA_PME) {
			/*
			 * Clear PME status of the port.  If there are other
			 * pending PMEs, the status will be set again.
			 */
			pcie_clear_root_pme_status(port);

			spin_unlock_irq(&data->lock);
			pcie_pme_handle_request(port, rtsta & 0xffff);
			spin_lock_irq(&data->lock);

			continue;
		}

		/* No need to loop if there are no more PMEs pending. */
		if (!(rtsta & PCI_EXP_RTSTA_PENDING))
			break;

		spin_unlock_irq(&data->lock);
		cpu_relax();
		spin_lock_irq(&data->lock);
	}

	if (data->suspend_level == PME_SUSPEND_NONE)
		pcie_pme_interrupt_enable(port, true);

	spin_unlock_irq(&data->lock);
}

/**
 * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
 * @irq: Interrupt vector.
 * @context: Interrupt context pointer.
 */
static irqreturn_t pcie_pme_irq(int irq, void *context)
{
	struct pci_dev *port;
	struct pcie_pme_service_data *data;
	u32 rtsta;
	unsigned long flags;

	port = ((struct pcie_device *)context)->port;
	data = get_service_data((struct pcie_device *)context);

	spin_lock_irqsave(&data->lock, flags);
	pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);

	if (!(rtsta & PCI_EXP_RTSTA_PME)) {
		spin_unlock_irqrestore(&data->lock, flags);
		return IRQ_NONE;
	}

	pcie_pme_interrupt_enable(port, false);
	spin_unlock_irqrestore(&data->lock, flags);

	/* We don't use pm_wq, because it's freezable. */
	schedule_work(&data->work);

	return IRQ_HANDLED;
}

/**
 * pcie_pme_set_native - Set the PME interrupt flag for given device.
 * @dev: PCI device to handle.
 * @ign: Ignored.
 */
static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
{
	dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");

	device_set_run_wake(&dev->dev, true);
	dev->pme_interrupt = true;
	return 0;
}

/**
 * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
 * @port: PCIe root port or event collector to handle.
 *
 * For each device below given root port, including the port itself (or for each
 * root complex integrated endpoint if @port is a root complex event collector)
 * set the flag indicating that it can signal run-time wake-up events via PCIe
 * PME interrupts.
 */
static void pcie_pme_mark_devices(struct pci_dev *port)
{
	pcie_pme_set_native(port, NULL);
	if (port->subordinate) {
		pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
	} else {
		struct pci_bus *bus = port->bus;
		struct pci_dev *dev;

		/* Check if this is a root port event collector. */
		if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC || !bus)
			return;

		down_read(&pci_bus_sem);
		list_for_each_entry(dev, &bus->devices, bus_list)
			if (pci_is_pcie(dev)
			    && pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
				pcie_pme_set_native(dev, NULL);
		up_read(&pci_bus_sem);
	}
}

/**
 * pcie_pme_probe - Initialize PCIe PME service for given root port.
 * @srv: PCIe service to initialize.
 */
static int pcie_pme_probe(struct pcie_device *srv)
{
	struct pci_dev *port;
	struct pcie_pme_service_data *data;
	int ret;

	data = kzalloc(sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	spin_lock_init(&data->lock);
	INIT_WORK(&data->work, pcie_pme_work_fn);
	data->srv = srv;
	set_service_data(srv, data);

	port = srv->port;
	pcie_pme_interrupt_enable(port, false);
	pcie_clear_root_pme_status(port);

	ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
	if (ret) {
		kfree(data);
	} else {
		pcie_pme_mark_devices(port);
		pcie_pme_interrupt_enable(port, true);
	}

	return ret;
}

static bool pcie_pme_check_wakeup(struct pci_bus *bus)
{
	struct pci_dev *dev;

	if (!bus)
		return false;

	list_for_each_entry(dev, &bus->devices, bus_list)
		if (device_may_wakeup(&dev->dev)
		    || pcie_pme_check_wakeup(dev->subordinate))
			return true;

	return false;
}

/**
 * pcie_pme_suspend - Suspend PCIe PME service device.
 * @srv: PCIe service device to suspend.
 */
static int pcie_pme_suspend(struct pcie_device *srv)
{
	struct pcie_pme_service_data *data = get_service_data(srv);
	struct pci_dev *port = srv->port;
	bool wakeup, wake_irq_enabled = false;
	int ret;

	if (device_may_wakeup(&port->dev)) {
		wakeup = true;
	} else {
		down_read(&pci_bus_sem);
		wakeup = pcie_pme_check_wakeup(port->subordinate);
		up_read(&pci_bus_sem);
	}
	spin_lock_irq(&data->lock);
	if (wakeup) {
		ret = enable_irq_wake(srv->irq);
		if (ret == 0) {
			data->suspend_level = PME_SUSPEND_WAKEUP;
			wake_irq_enabled = true;
		}
	}
	if (!wake_irq_enabled) {
		pcie_pme_interrupt_enable(port, false);
		pcie_clear_root_pme_status(port);
		data->suspend_level = PME_SUSPEND_NOIRQ;
	}
	spin_unlock_irq(&data->lock);

	synchronize_irq(srv->irq);

	return 0;
}

/**
 * pcie_pme_resume - Resume PCIe PME service device.
 * @srv - PCIe service device to resume.
 */
static int pcie_pme_resume(struct pcie_device *srv)
{
	struct pcie_pme_service_data *data = get_service_data(srv);

	spin_lock_irq(&data->lock);
	if (data->suspend_level == PME_SUSPEND_NOIRQ) {
		struct pci_dev *port = srv->port;

		pcie_clear_root_pme_status(port);
		pcie_pme_interrupt_enable(port, true);
	} else {
		disable_irq_wake(srv->irq);
	}
	data->suspend_level = PME_SUSPEND_NONE;
	spin_unlock_irq(&data->lock);

	return 0;
}

static struct pcie_port_service_driver pcie_pme_driver = {
	.name		= "pcie_pme",
	.port_type	= PCI_EXP_TYPE_ROOT_PORT,
	.service	= PCIE_PORT_SERVICE_PME,

	.probe		= pcie_pme_probe,
	.suspend	= pcie_pme_suspend,
	.resume		= pcie_pme_resume,
};

/**
 * pcie_pme_service_init - Register the PCIe PME service driver.
 */
static int __init pcie_pme_service_init(void)
{
	return pcie_port_service_register(&pcie_pme_driver);
}
device_initcall(pcie_pme_service_init);
Commit	Line	Data
c7f48656 RW	1	/*
	2	* PCIe Native PME support
	3	*
	4	* Copyright (C) 2007 - 2009 Intel Corp
	5	* Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
	6	* Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License V2. See the file "COPYING" in the main directory of this archive
	10	* for more details.
	11	*/
	12
c7f48656 RW	13	#include <linux/pci.h>
	14	#include <linux/kernel.h>
	15	#include <linux/errno.h>
5a0e3ad6	16	#include <linux/slab.h>
c7f48656 RW	17	#include <linux/init.h>
	18	#include <linux/interrupt.h>
	19	#include <linux/device.h>
	20	#include <linux/pcieport_if.h>
c7f48656 RW	21	#include <linux/pm_runtime.h>
c7f48656 RW	22
271fb719 RW	23	#include "../pci.h"
271fb719 RW	24	#include "portdrv.h"
c7f48656	25
c39fae14 RW	26	/*
	27	* If this switch is set, MSI will not be used for PCIe PME signaling. This
	28	* causes the PCIe port driver to use INTx interrupts only, but it turns out
	29	* that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
	30	* wake-up from system sleep states.
	31	*/
	32	bool pcie_pme_msi_disabled;
	33
c7f48656 RW	34	static int __init pcie_pme_setup(char *str)
c7f48656 RW	35	{
28eb5f27 RW	36	if (!strncmp(str, "nomsi", 5))
28eb5f27 RW	37	pcie_pme_msi_disabled = true;
b27759f8	38
c7f48656 RW	39	return 1;
	40	}
	41	__setup("pcie_pme=", pcie_pme_setup);
	42
76cde7e4 RW	43	enum pme_suspend_level {
	44	PME_SUSPEND_NONE = 0,
	45	PME_SUSPEND_WAKEUP,
	46	PME_SUSPEND_NOIRQ,
	47	};
	48
c7f48656 RW	49	struct pcie_pme_service_data {
	50	spinlock_t lock;
	51	struct pcie_device *srv;
	52	struct work_struct work;
76cde7e4	53	enum pme_suspend_level suspend_level;
c7f48656 RW	54	};
	55
	56	/**
	57	* pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
	58	* @dev: PCIe root port or event collector.
	59	* @enable: Enable or disable the interrupt.
	60	*/
28eb5f27	61	void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
c7f48656	62	{
c7f48656	63	if (enable)
263e54b9 JL	64	pcie_capability_set_word(dev, PCI_EXP_RTCTL,
263e54b9 JL	65	PCI_EXP_RTCTL_PMEIE);
c7f48656	66	else
263e54b9 JL	67	pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
263e54b9 JL	68	PCI_EXP_RTCTL_PMEIE);
c7f48656 RW	69	}
c7f48656 RW	70
c7f48656 RW	71	/**
	72	* pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
	73	* @bus: PCI bus to scan.
	74	*
	75	* Scan given PCI bus and all buses under it for devices asserting PME#.
	76	*/
	77	static bool pcie_pme_walk_bus(struct pci_bus *bus)
	78	{
	79	struct pci_dev *dev;
	80	bool ret = false;
	81
	82	list_for_each_entry(dev, &bus->devices, bus_list) {
	83	/* Skip PCIe devices in case we started from a root port. */
552be54c	84	if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
379021d5 RW	85	if (dev->pme_poll)
	86	dev->pme_poll = false;
	87
c125e96f	88	pci_wakeup_event(dev);
0f953bf6	89	pm_request_resume(&dev->dev);
c7f48656 RW	90	ret = true;
	91	}
	92
	93	if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
	94	ret = true;
	95	}
	96
	97	return ret;
	98	}
	99
	100	/**
	101	* pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
	102	* @bus: Secondary bus of the bridge.
	103	* @devfn: Device/function number to check.
	104	*
	105	* PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
	106	* PCIe PME message. In such that case the bridge should use the Requester ID
	107	* of device/function number 0 on its secondary bus.
	108	*/
	109	static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
	110	{
	111	struct pci_dev *dev;
	112	bool found = false;
	113
	114	if (devfn)
	115	return false;
	116
	117	dev = pci_dev_get(bus->self);
	118	if (!dev)
	119	return false;
	120
62f87c0e	121	if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
c7f48656 RW	122	down_read(&pci_bus_sem);
	123	if (pcie_pme_walk_bus(bus))
	124	found = true;
	125	up_read(&pci_bus_sem);
	126	}
	127
	128	pci_dev_put(dev);
	129	return found;
	130	}
	131
	132	/**
	133	* pcie_pme_handle_request - Find device that generated PME and handle it.
	134	* @port: Root port or event collector that generated the PME interrupt.
	135	* @req_id: PCIe Requester ID of the device that generated the PME.
	136	*/
	137	static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
	138	{
	139	u8 busnr = req_id >> 8, devfn = req_id & 0xff;
	140	struct pci_bus *bus;
	141	struct pci_dev *dev;
	142	bool found = false;
	143
	144	/* First, check if the PME is from the root port itself. */
	145	if (port->devfn == devfn && port->bus->number == busnr) {
379021d5 RW	146	if (port->pme_poll)
	147	port->pme_poll = false;
	148
c7f48656 RW	149	if (pci_check_pme_status(port)) {
	150	pm_request_resume(&port->dev);
	151	found = true;
	152	} else {
	153	/*
	154	* Apparently, the root port generated the PME on behalf
	155	* of a non-PCIe device downstream. If this is done by
	156	* a root port, the Requester ID field in its status
	157	* register may contain either the root port's, or the
	158	* source device's information (PCI Express Base
	159	* Specification, Rev. 2.0, Section 6.1.9).
	160	*/
	161	down_read(&pci_bus_sem);
	162	found = pcie_pme_walk_bus(port->subordinate);
	163	up_read(&pci_bus_sem);
	164	}
	165	goto out;
	166	}
	167
	168	/* Second, find the bus the source device is on. */
	169	bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
	170	if (!bus)
	171	goto out;
	172
	173	/* Next, check if the PME is from a PCIe-PCI bridge. */
	174	found = pcie_pme_from_pci_bridge(bus, devfn);
	175	if (found)
	176	goto out;
	177
	178	/* Finally, try to find the PME source on the bus. */
	179	down_read(&pci_bus_sem);
	180	list_for_each_entry(dev, &bus->devices, bus_list) {
	181	pci_dev_get(dev);
	182	if (dev->devfn == devfn) {
	183	found = true;
	184	break;
	185	}
	186	pci_dev_put(dev);
	187	}
	188	up_read(&pci_bus_sem);
	189
	190	if (found) {
	191	/* The device is there, but we have to check its PME status. */
	192	found = pci_check_pme_status(dev);
c125e96f	193	if (found) {
379021d5 RW	194	if (dev->pme_poll)
	195	dev->pme_poll = false;
	196
c125e96f	197	pci_wakeup_event(dev);
0f953bf6	198	pm_request_resume(&dev->dev);
c125e96f	199	}
c7f48656 RW	200	pci_dev_put(dev);
	201	} else if (devfn) {
	202	/*
	203	* The device is not there, but we can still try to recover by
	204	* assuming that the PME was reported by a PCIe-PCI bridge that
	205	* used devfn different from zero.
	206	*/
227f0647	207	dev_dbg(&port->dev, "PME interrupt generated for non-existent device %02x:%02x.%d\n",
c7f48656 RW	208	busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
	209	found = pcie_pme_from_pci_bridge(bus, 0);
	210	}
	211
	212	out:
	213	if (!found)
	214	dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
	215	}
	216
	217	/**
	218	* pcie_pme_work_fn - Work handler for PCIe PME interrupt.
	219	* @work: Work structure giving access to service data.
	220	*/
	221	static void pcie_pme_work_fn(struct work_struct *work)
	222	{
	223	struct pcie_pme_service_data *data =
	224	container_of(work, struct pcie_pme_service_data, work);
	225	struct pci_dev *port = data->srv->port;
c7f48656 RW	226	u32 rtsta;
c7f48656 RW	227
c7f48656 RW	228	spin_lock_irq(&data->lock);
	229
	230	for (;;) {
76cde7e4	231	if (data->suspend_level != PME_SUSPEND_NONE)
c7f48656 RW	232	break;
c7f48656 RW	233
263e54b9	234	pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
c7f48656 RW	235	if (rtsta & PCI_EXP_RTSTA_PME) {
	236	/*
	237	* Clear PME status of the port. If there are other
	238	* pending PMEs, the status will be set again.
	239	*/
fe31e697	240	pcie_clear_root_pme_status(port);
c7f48656 RW	241
	242	spin_unlock_irq(&data->lock);
	243	pcie_pme_handle_request(port, rtsta & 0xffff);
	244	spin_lock_irq(&data->lock);
	245
	246	continue;
	247	}
	248
	249	/* No need to loop if there are no more PMEs pending. */
	250	if (!(rtsta & PCI_EXP_RTSTA_PENDING))
	251	break;
	252
	253	spin_unlock_irq(&data->lock);
	254	cpu_relax();
	255	spin_lock_irq(&data->lock);
	256	}
	257
76cde7e4	258	if (data->suspend_level == PME_SUSPEND_NONE)
c7f48656 RW	259	pcie_pme_interrupt_enable(port, true);
	260
	261	spin_unlock_irq(&data->lock);
	262	}
	263
	264	/**
	265	* pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
	266	* @irq: Interrupt vector.
	267	* @context: Interrupt context pointer.
	268	*/
	269	static irqreturn_t pcie_pme_irq(int irq, void *context)
	270	{
	271	struct pci_dev *port;
	272	struct pcie_pme_service_data *data;
c7f48656 RW	273	u32 rtsta;
	274	unsigned long flags;
	275
	276	port = ((struct pcie_device *)context)->port;
	277	data = get_service_data((struct pcie_device *)context);
	278
c7f48656	279	spin_lock_irqsave(&data->lock, flags);
263e54b9	280	pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
c7f48656 RW	281
	282	if (!(rtsta & PCI_EXP_RTSTA_PME)) {
	283	spin_unlock_irqrestore(&data->lock, flags);
	284	return IRQ_NONE;
	285	}
	286
	287	pcie_pme_interrupt_enable(port, false);
	288	spin_unlock_irqrestore(&data->lock, flags);
	289
	290	/* We don't use pm_wq, because it's freezable. */
	291	schedule_work(&data->work);
	292
	293	return IRQ_HANDLED;
	294	}
	295
	296	/**
	297	* pcie_pme_set_native - Set the PME interrupt flag for given device.
	298	* @dev: PCI device to handle.
	299	* @ign: Ignored.
	300	*/
	301	static int pcie_pme_set_native(struct pci_dev dev, void ign)
	302	{
	303	dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");
	304
	305	device_set_run_wake(&dev->dev, true);
	306	dev->pme_interrupt = true;
	307	return 0;
	308	}
	309
	310	/**
	311	* pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
	312	* @port: PCIe root port or event collector to handle.
	313	*
	314	* For each device below given root port, including the port itself (or for each
	315	* root complex integrated endpoint if @port is a root complex event collector)
	316	* set the flag indicating that it can signal run-time wake-up events via PCIe
	317	* PME interrupts.
	318	*/
	319	static void pcie_pme_mark_devices(struct pci_dev *port)
	320	{
	321	pcie_pme_set_native(port, NULL);
	322	if (port->subordinate) {
	323	pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
	324	} else {
	325	struct pci_bus *bus = port->bus;
	326	struct pci_dev *dev;
	327
	328	/* Check if this is a root port event collector. */
62f87c0e	329	if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC \|\| !bus)
c7f48656 RW	330	return;
	331
	332	down_read(&pci_bus_sem);
	333	list_for_each_entry(dev, &bus->devices, bus_list)
552be54c	334	if (pci_is_pcie(dev)
62f87c0e	335	&& pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
c7f48656 RW	336	pcie_pme_set_native(dev, NULL);
	337	up_read(&pci_bus_sem);
	338	}
	339	}
	340
	341	/**
	342	* pcie_pme_probe - Initialize PCIe PME service for given root port.
	343	* @srv: PCIe service to initialize.
	344	*/
	345	static int pcie_pme_probe(struct pcie_device *srv)
	346	{
	347	struct pci_dev *port;
	348	struct pcie_pme_service_data *data;
	349	int ret;
	350
c7f48656 RW	351	data = kzalloc(sizeof(*data), GFP_KERNEL);
	352	if (!data)
	353	return -ENOMEM;
	354
	355	spin_lock_init(&data->lock);
	356	INIT_WORK(&data->work, pcie_pme_work_fn);
	357	data->srv = srv;
	358	set_service_data(srv, data);
	359
	360	port = srv->port;
	361	pcie_pme_interrupt_enable(port, false);
fe31e697	362	pcie_clear_root_pme_status(port);
c7f48656 RW	363
	364	ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
	365	if (ret) {
	366	kfree(data);
	367	} else {
	368	pcie_pme_mark_devices(port);
	369	pcie_pme_interrupt_enable(port, true);
	370	}
	371
	372	return ret;
	373	}
	374
76cde7e4 RW	375	static bool pcie_pme_check_wakeup(struct pci_bus *bus)
	376	{
	377	struct pci_dev *dev;
	378
	379	if (!bus)
	380	return false;
	381
	382	list_for_each_entry(dev, &bus->devices, bus_list)
	383	if (device_may_wakeup(&dev->dev)
	384	\|\| pcie_pme_check_wakeup(dev->subordinate))
	385	return true;
	386
	387	return false;
	388	}
	389
c7f48656 RW	390	/**
	391	* pcie_pme_suspend - Suspend PCIe PME service device.
	392	* @srv: PCIe service device to suspend.
	393	*/
	394	static int pcie_pme_suspend(struct pcie_device *srv)
	395	{
	396	struct pcie_pme_service_data *data = get_service_data(srv);
	397	struct pci_dev *port = srv->port;
41ccebae	398	bool wakeup, wake_irq_enabled = false;
5dfd7f9f	399	int ret;
c7f48656	400
76cde7e4 RW	401	if (device_may_wakeup(&port->dev)) {
	402	wakeup = true;
	403	} else {
	404	down_read(&pci_bus_sem);
	405	wakeup = pcie_pme_check_wakeup(port->subordinate);
	406	up_read(&pci_bus_sem);
	407	}
c7f48656	408	spin_lock_irq(&data->lock);
76cde7e4	409	if (wakeup) {
5dfd7f9f	410	ret = enable_irq_wake(srv->irq);
41ccebae BH	411	if (ret == 0) {
	412	data->suspend_level = PME_SUSPEND_WAKEUP;
	413	wake_irq_enabled = true;
	414	}
5dfd7f9f	415	}
41ccebae	416	if (!wake_irq_enabled) {
76cde7e4 RW	417	pcie_pme_interrupt_enable(port, false);
	418	pcie_clear_root_pme_status(port);
	419	data->suspend_level = PME_SUSPEND_NOIRQ;
	420	}
c7f48656 RW	421	spin_unlock_irq(&data->lock);
	422
	423	synchronize_irq(srv->irq);
	424
	425	return 0;
	426	}
	427
	428	/**
	429	* pcie_pme_resume - Resume PCIe PME service device.
	430	* @srv - PCIe service device to resume.
	431	*/
	432	static int pcie_pme_resume(struct pcie_device *srv)
	433	{
	434	struct pcie_pme_service_data *data = get_service_data(srv);
c7f48656 RW	435
c7f48656 RW	436	spin_lock_irq(&data->lock);
76cde7e4 RW	437	if (data->suspend_level == PME_SUSPEND_NOIRQ) {
	438	struct pci_dev *port = srv->port;
	439
	440	pcie_clear_root_pme_status(port);
	441	pcie_pme_interrupt_enable(port, true);
	442	} else {
	443	disable_irq_wake(srv->irq);
	444	}
	445	data->suspend_level = PME_SUSPEND_NONE;
c7f48656 RW	446	spin_unlock_irq(&data->lock);
	447
	448	return 0;
	449	}
	450
c7f48656 RW	451	static struct pcie_port_service_driver pcie_pme_driver = {
c7f48656 RW	452	.name = "pcie_pme",
f7625980 BH	453	.port_type = PCI_EXP_TYPE_ROOT_PORT,
f7625980 BH	454	.service = PCIE_PORT_SERVICE_PME,
c7f48656 RW	455
	456	.probe = pcie_pme_probe,
	457	.suspend = pcie_pme_suspend,
	458	.resume = pcie_pme_resume,
c7f48656 RW	459	};
	460
	461	/**
	462	* pcie_pme_service_init - Register the PCIe PME service driver.
	463	*/
	464	static int __init pcie_pme_service_init(void)
	465	{
28eb5f27	466	return pcie_port_service_register(&pcie_pme_driver);
c7f48656	467	}
d7def204	468	device_initcall(pcie_pme_service_init);