RDS:TCP: Synchronize rds_tcp_accept_one with rds_send_xmit when resetting t_sock
[deliverable/linux.git] / drivers / pinctrl / Kconfig
CommitLineData
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1#
2# PINCTRL infrastructure and drivers
3#
4
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5config PINCTRL
6 bool
2744e8af 7
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8menu "Pin controllers"
9 depends on PINCTRL
10
2744e8af 11config PINMUX
244e95a7 12 bool "Support pin multiplexing controllers" if COMPILE_TEST
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LW
13
14config PINCONF
244e95a7 15 bool "Support pin configuration controllers" if COMPILE_TEST
2744e8af 16
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17config GENERIC_PINCONF
18 bool
19 select PINCONF
20
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21config DEBUG_PINCTRL
22 bool "Debug PINCTRL calls"
23 depends on DEBUG_KERNEL
24 help
25 Say Y here to add some extra checks and diagnostics to PINCTRL calls.
26
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SZ
27config PINCTRL_ADI2
28 bool "ADI pin controller driver"
9d7278d0 29 depends on BLACKFIN
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SZ
30 select PINMUX
31 select IRQ_DOMAIN
32 help
33 This is the pin controller and gpio driver for ADI BF54x, BF60x and
34 future processors. This option is selected automatically when specific
35 machine and arch are selected to build.
36
c8ce8782
LD
37config PINCTRL_AS3722
38 bool "Pinctrl and GPIO driver for ams AS3722 PMIC"
39 depends on MFD_AS3722 && GPIOLIB
40 select PINMUX
41 select GENERIC_PINCONF
42 help
43 AS3722 device supports the configuration of GPIO pins for different
44 functionality. This driver supports the pinmux, push-pull and
45 open drain configuration for the GPIO pins of AS3722 devices. It also
46 supports the GPIO functionality through gpiolib.
47
e9a03add
SZ
48config PINCTRL_BF54x
49 def_bool y if BF54x
50 select PINCTRL_ADI2
51
52config PINCTRL_BF60x
53 def_bool y if BF60x
54 select PINCTRL_ADI2
55
6732ae5c
JCPV
56config PINCTRL_AT91
57 bool "AT91 pinctrl driver"
58 depends on OF
59 depends on ARCH_AT91
60 select PINMUX
61 select PINCONF
80cc3732
AS
62 select GPIOLIB
63 select OF_GPIO
64 select GPIOLIB_IRQCHIP
6732ae5c
JCPV
65 help
66 Say Y here to enable the at91 pinctrl driver
67
77618084
LD
68config PINCTRL_AT91PIO4
69 bool "AT91 PIO4 pinctrl driver"
70 depends on OF
71 depends on ARCH_AT91
72 select PINMUX
73 select GENERIC_PINCONF
74 select GPIOLIB
75 select GPIOLIB_IRQCHIP
76 select OF_GPIO
77 help
78 Say Y here to enable the at91 pinctrl/gpio driver for Atmel PIO4
79 controller available on sama5d2 SoC.
80
dbad75dd 81config PINCTRL_AMD
337ea0fb 82 tristate "AMD GPIO pin control"
dbad75dd
KX
83 depends on GPIOLIB
84 select GPIOLIB_IRQCHIP
85 select PINCONF
86 select GENERIC_PINCONF
87 help
88 driver for memory mapped GPIO functionality on AMD platforms
89 (x86 or arm).Most pins are usually muxed to some other
90 functionality by firmware,so only a small amount is available
91 for gpio use.
92
93 Requires ACPI/FDT device enumeration code to set up a platform
94 device.
95
38b0e507
BS
96config PINCTRL_DIGICOLOR
97 bool
98 depends on OF && (ARCH_DIGICOLOR || COMPILE_TEST)
99 select PINMUX
100 select GENERIC_PINCONF
101
3f8c50c9
JC
102config PINCTRL_LANTIQ
103 bool
104 depends on LANTIQ
105 select PINMUX
106 select PINCONF
107
2f77ac93
JE
108config PINCTRL_LPC18XX
109 bool "NXP LPC18XX/43XX SCU pinctrl driver"
110 depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
111 default ARCH_LPC18XX
112 select PINMUX
113 select GENERIC_PINCONF
114 help
115 Pinctrl driver for NXP LPC18xx/43xx System Control Unit (SCU).
116
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JC
117config PINCTRL_FALCON
118 bool
119 depends on SOC_FALCON
120 depends on PINCTRL_LANTIQ
121
6ac73095
BG
122config PINCTRL_MESON
123 bool
b99e6fb8 124 depends on OF
6ac73095
BG
125 select PINMUX
126 select PINCONF
127 select GENERIC_PINCONF
b99e6fb8 128 select GPIOLIB
6ac73095
BG
129 select OF_GPIO
130 select REGMAP_MMIO
131
d3e51161
HS
132config PINCTRL_ROCKCHIP
133 bool
134 select PINMUX
135 select GENERIC_PINCONF
136 select GENERIC_IRQ_CHIP
751a99ab 137 select MFD_SYSCON
d3e51161 138
8b8b091b
TL
139config PINCTRL_SINGLE
140 tristate "One-register-per-pin type device tree based pinctrl driver"
141 depends on OF
142 select PINMUX
143 select PINCONF
9dddb4df 144 select GENERIC_PINCONF
8b8b091b
TL
145 help
146 This selects the device tree based generic pinctrl driver.
147
3bece55a 148config PINCTRL_SIRF
a17272a4 149 bool "CSR SiRFprimaII pin controller driver"
d3e26f2f 150 depends on ARCH_SIRF
393daa81 151 select PINMUX
f9367793
WC
152 select PINCONF
153 select GENERIC_PINCONF
7420d2d0 154 select GPIOLIB_IRQCHIP
393daa81 155
cefc03e5
AB
156config PINCTRL_PISTACHIO
157 def_bool y if MACH_PISTACHIO
158 depends on GPIOLIB
159 select PINMUX
160 select GENERIC_PINCONF
161 select GPIOLIB_IRQCHIP
162 select OF_GPIO
163
701016c0
SK
164config PINCTRL_ST
165 bool
166 depends on OF
167 select PINMUX
168 select PINCONF
130cbe30 169 select GPIOLIB_IRQCHIP
701016c0 170
d5025f9f
JH
171config PINCTRL_TZ1090
172 bool "Toumaz Xenif TZ1090 pin control driver"
173 depends on SOC_TZ1090
174 select PINMUX
175 select GENERIC_PINCONF
176
b58f0273
JH
177config PINCTRL_TZ1090_PDC
178 bool "Toumaz Xenif TZ1090 PDC pin control driver"
179 depends on SOC_TZ1090
180 select PINMUX
181 select PINCONF
182
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183config PINCTRL_U300
184 bool "U300 pin controller driver"
98da3529
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185 depends on ARCH_U300
186 select PINMUX
dc0b1aa3 187 select GENERIC_PINCONF
45f034ef 188
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189config PINCTRL_COH901
190 bool "ST-Ericsson U300 COH 901 335/571 GPIO"
3c94d1bb 191 depends on GPIOLIB && ARCH_U300 && PINCTRL_U300
523dcce7 192 select GPIOLIB_IRQCHIP
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LW
193 help
194 Say yes here to support GPIO interface on ST-Ericsson U300.
195 The names of the two IP block variants supported are
196 COH 901 335 and COH 901 571/3. They contain 3, 5 or 7
197 ports of 8 GPIO pins each.
198
0a8d3e24 199config PINCTRL_PALMAS
736658c5 200 bool "Pinctrl driver for the PALMAS Series MFD devices"
0a8d3e24 201 depends on OF && MFD_PALMAS
63ca8db7 202 select PINMUX
0a8d3e24
LD
203 select GENERIC_PINCONF
204 help
205 Palmas device supports the configuration of pins for different
206 functionality. This driver supports the pinmux, push-pull and
207 open drain configuration for the Palmas series devices like
208 TPS65913, TPS80036 etc.
209
2ba384e6
JH
210config PINCTRL_PIC32
211 bool "Microchip PIC32 pin controller driver"
212 depends on OF
213 depends on MACH_PIC32
214 select PINMUX
215 select GENERIC_PINCONF
216 select GPIOLIB_IRQCHIP
217 select OF_GPIO
218 help
219 This is the pin controller and gpio driver for Microchip PIC32
220 microcontrollers. This option is selected automatically when specific
221 machine and arch are selected to build.
222
223config PINCTRL_PIC32MZDA
224 def_bool y if PIC32MZDA
225 select PINCTRL_PIC32
226
add958ce
SB
227config PINCTRL_ZYNQ
228 bool "Pinctrl driver for Xilinx Zynq"
229 depends on ARCH_ZYNQ
230 select PINMUX
231 select GENERIC_PINCONF
232 help
485dba27 233 This selects the pinctrl driver for Xilinx Zynq.
add958ce 234
b17f2f9b 235source "drivers/pinctrl/bcm/Kconfig"
3de68d33 236source "drivers/pinctrl/berlin/Kconfig"
edad3b2a 237source "drivers/pinctrl/freescale/Kconfig"
5fae8b86 238source "drivers/pinctrl/intel/Kconfig"
06763c74 239source "drivers/pinctrl/mvebu/Kconfig"
3a198059 240source "drivers/pinctrl/nomadik/Kconfig"
4b15ec9d 241source "drivers/pinctrl/pxa/Kconfig"
69b78b8d 242source "drivers/pinctrl/qcom/Kconfig"
ebe629a3 243source "drivers/pinctrl/samsung/Kconfig"
6e54d8d2 244source "drivers/pinctrl/sh-pfc/Kconfig"
deda8287 245source "drivers/pinctrl/spear/Kconfig"
aceb16dc 246source "drivers/pinctrl/stm32/Kconfig"
5f910777 247source "drivers/pinctrl/sunxi/Kconfig"
25cbac77 248source "drivers/pinctrl/tegra/Kconfig"
6e908892 249source "drivers/pinctrl/uniphier/Kconfig"
170c6152 250source "drivers/pinctrl/vt8500/Kconfig"
a6df410d 251source "drivers/pinctrl/mediatek/Kconfig"
deda8287 252
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JC
253config PINCTRL_XWAY
254 bool
255 depends on SOC_TYPE_XWAY
256 depends on PINCTRL_LANTIQ
257
5aad0db1
CR
258config PINCTRL_TB10X
259 bool
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LW
260 depends on OF && ARC_PLAT_TB10X
261 select GPIOLIB
5aad0db1 262
45f034ef 263endmenu
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