RDS:TCP: Synchronize rds_tcp_accept_one with rds_send_xmit when resetting t_sock
[deliverable/linux.git] / drivers / pinctrl / core.c
CommitLineData
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1/*
2 * Core driver for the pin control subsystem
3 *
befe5bdf 4 * Copyright (C) 2011-2012 ST-Ericsson SA
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5 * Written on behalf of Linaro for ST-Ericsson
6 * Based on bits of regulator core, gpio core and clk core
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
b2b3e66e
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10 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
11 *
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12 * License terms: GNU General Public License (GPL) version 2
13 */
14#define pr_fmt(fmt) "pinctrl core: " fmt
15
16#include <linux/kernel.h>
ab78029e 17#include <linux/kref.h>
a5a697cd 18#include <linux/export.h>
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19#include <linux/init.h>
20#include <linux/device.h>
21#include <linux/slab.h>
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22#include <linux/err.h>
23#include <linux/list.h>
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24#include <linux/sysfs.h>
25#include <linux/debugfs.h>
26#include <linux/seq_file.h>
6d4ca1fb 27#include <linux/pinctrl/consumer.h>
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28#include <linux/pinctrl/pinctrl.h>
29#include <linux/pinctrl/machine.h>
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30
31#ifdef CONFIG_GPIOLIB
51e13c24 32#include <asm-generic/gpio.h>
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33#endif
34
2744e8af 35#include "core.h"
57291ce2 36#include "devicetree.h"
2744e8af 37#include "pinmux.h"
ae6b4d85 38#include "pinconf.h"
2744e8af 39
b2b3e66e 40
5b3aa5f7
DA
41static bool pinctrl_dummy_state;
42
42fed7ba 43/* Mutex taken to protect pinctrl_list */
843aec96 44static DEFINE_MUTEX(pinctrl_list_mutex);
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45
46/* Mutex taken to protect pinctrl_maps */
47DEFINE_MUTEX(pinctrl_maps_mutex);
48
49/* Mutex taken to protect pinctrldev_list */
843aec96 50static DEFINE_MUTEX(pinctrldev_list_mutex);
57b676f9
SW
51
52/* Global list of pin control devices (struct pinctrl_dev) */
42fed7ba 53static LIST_HEAD(pinctrldev_list);
2744e8af 54
57b676f9 55/* List of pin controller handles (struct pinctrl) */
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56static LIST_HEAD(pinctrl_list);
57
57b676f9 58/* List of pinctrl maps (struct pinctrl_maps) */
6f9e41f4 59LIST_HEAD(pinctrl_maps);
b2b3e66e 60
befe5bdf 61
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DA
62/**
63 * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
64 *
65 * Usually this function is called by platforms without pinctrl driver support
66 * but run with some shared drivers using pinctrl APIs.
67 * After calling this function, the pinctrl core will return successfully
68 * with creating a dummy state for the driver to keep going smoothly.
69 */
70void pinctrl_provide_dummies(void)
71{
72 pinctrl_dummy_state = true;
73}
74
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75const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev)
76{
77 /* We're not allowed to register devices without name */
78 return pctldev->desc->name;
79}
80EXPORT_SYMBOL_GPL(pinctrl_dev_get_name);
81
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HZ
82const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev)
83{
84 return dev_name(pctldev->dev);
85}
86EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname);
87
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88void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev)
89{
90 return pctldev->driver_data;
91}
92EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata);
93
94/**
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95 * get_pinctrl_dev_from_devname() - look up pin controller device
96 * @devname: the name of a device instance, as returned by dev_name()
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97 *
98 * Looks up a pin control device matching a certain device name or pure device
99 * pointer, the pure device pointer will take precedence.
100 */
9dfac4fd 101struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname)
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102{
103 struct pinctrl_dev *pctldev = NULL;
2744e8af 104
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105 if (!devname)
106 return NULL;
107
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LW
108 mutex_lock(&pinctrldev_list_mutex);
109
2744e8af 110 list_for_each_entry(pctldev, &pinctrldev_list, node) {
9dfac4fd 111 if (!strcmp(dev_name(pctldev->dev), devname)) {
2744e8af 112 /* Matched on device name */
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113 mutex_unlock(&pinctrldev_list_mutex);
114 return pctldev;
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115 }
116 }
2744e8af 117
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118 mutex_unlock(&pinctrldev_list_mutex);
119
120 return NULL;
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121}
122
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123struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np)
124{
125 struct pinctrl_dev *pctldev;
126
127 mutex_lock(&pinctrldev_list_mutex);
128
129 list_for_each_entry(pctldev, &pinctrldev_list, node)
130 if (pctldev->dev->of_node == np) {
131 mutex_unlock(&pinctrldev_list_mutex);
132 return pctldev;
133 }
134
d463f82d 135 mutex_unlock(&pinctrldev_list_mutex);
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136
137 return NULL;
138}
139
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140/**
141 * pin_get_from_name() - look up a pin number from a name
142 * @pctldev: the pin control device to lookup the pin on
143 * @name: the name of the pin to look up
144 */
145int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name)
146{
706e8520 147 unsigned i, pin;
ae6b4d85 148
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CP
149 /* The pin number can be retrived from the pin controller descriptor */
150 for (i = 0; i < pctldev->desc->npins; i++) {
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LW
151 struct pin_desc *desc;
152
706e8520 153 pin = pctldev->desc->pins[i].number;
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LW
154 desc = pin_desc_get(pctldev, pin);
155 /* Pin space may be sparse */
6c325f87 156 if (desc && !strcmp(name, desc->name))
ae6b4d85
LW
157 return pin;
158 }
159
160 return -EINVAL;
161}
162
dcb5dbc3
DA
163/**
164 * pin_get_name_from_id() - look up a pin name from a pin id
165 * @pctldev: the pin control device to lookup the pin on
166 * @name: the name of the pin to look up
167 */
168const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin)
169{
170 const struct pin_desc *desc;
171
172 desc = pin_desc_get(pctldev, pin);
173 if (desc == NULL) {
174 dev_err(pctldev->dev, "failed to get pin(%d) name\n",
175 pin);
176 return NULL;
177 }
178
179 return desc->name;
180}
181
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182/**
183 * pin_is_valid() - check if pin exists on controller
184 * @pctldev: the pin control device to check the pin on
185 * @pin: pin to check, use the local pin controller index number
186 *
187 * This tells us whether a certain pin exist on a certain pin controller or
188 * not. Pin lists may be sparse, so some pins may not exist.
189 */
190bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
191{
192 struct pin_desc *pindesc;
193
194 if (pin < 0)
195 return false;
196
42fed7ba 197 mutex_lock(&pctldev->mutex);
2744e8af 198 pindesc = pin_desc_get(pctldev, pin);
42fed7ba 199 mutex_unlock(&pctldev->mutex);
2744e8af 200
57b676f9 201 return pindesc != NULL;
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LW
202}
203EXPORT_SYMBOL_GPL(pin_is_valid);
204
205/* Deletes a range of pin descriptors */
206static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev,
207 const struct pinctrl_pin_desc *pins,
208 unsigned num_pins)
209{
210 int i;
211
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212 for (i = 0; i < num_pins; i++) {
213 struct pin_desc *pindesc;
214
215 pindesc = radix_tree_lookup(&pctldev->pin_desc_tree,
216 pins[i].number);
217 if (pindesc != NULL) {
218 radix_tree_delete(&pctldev->pin_desc_tree,
219 pins[i].number);
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220 if (pindesc->dynamic_name)
221 kfree(pindesc->name);
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222 }
223 kfree(pindesc);
224 }
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225}
226
227static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev,
228 unsigned number, const char *name)
229{
230 struct pin_desc *pindesc;
231
232 pindesc = pin_desc_get(pctldev, number);
233 if (pindesc != NULL) {
2b38ca6d 234 dev_err(pctldev->dev, "pin %d already registered\n", number);
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235 return -EINVAL;
236 }
237
238 pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL);
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239 if (pindesc == NULL) {
240 dev_err(pctldev->dev, "failed to alloc struct pin_desc\n");
2744e8af 241 return -ENOMEM;
95dcd4ae 242 }
ae6b4d85 243
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244 /* Set owner */
245 pindesc->pctldev = pctldev;
246
9af1e44f 247 /* Copy basic pin info */
8dc6ae4d 248 if (name) {
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LW
249 pindesc->name = name;
250 } else {
251 pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number);
eb26cc9c
SK
252 if (pindesc->name == NULL) {
253 kfree(pindesc);
ca53c5f1 254 return -ENOMEM;
eb26cc9c 255 }
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LW
256 pindesc->dynamic_name = true;
257 }
2744e8af 258
2744e8af 259 radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc);
2744e8af 260 pr_debug("registered pin %d (%s) on %s\n",
ca53c5f1 261 number, pindesc->name, pctldev->desc->name);
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262 return 0;
263}
264
265static int pinctrl_register_pins(struct pinctrl_dev *pctldev,
266 struct pinctrl_pin_desc const *pins,
267 unsigned num_descs)
268{
269 unsigned i;
270 int ret = 0;
271
272 for (i = 0; i < num_descs; i++) {
273 ret = pinctrl_register_one_pin(pctldev,
274 pins[i].number, pins[i].name);
275 if (ret)
276 return ret;
277 }
278
279 return 0;
280}
281
c8587eee
CR
282/**
283 * gpio_to_pin() - GPIO range GPIO number to pin number translation
284 * @range: GPIO range used for the translation
285 * @gpio: gpio pin to translate to a pin number
286 *
287 * Finds the pin number for a given GPIO using the specified GPIO range
288 * as a base for translation. The distinction between linear GPIO ranges
289 * and pin list based GPIO ranges is managed correctly by this function.
290 *
291 * This function assumes the gpio is part of the specified GPIO range, use
292 * only after making sure this is the case (e.g. by calling it on the
293 * result of successful pinctrl_get_device_gpio_range calls)!
294 */
295static inline int gpio_to_pin(struct pinctrl_gpio_range *range,
296 unsigned int gpio)
297{
298 unsigned int offset = gpio - range->base;
299 if (range->pins)
300 return range->pins[offset];
301 else
302 return range->pin_base + offset;
303}
304
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LW
305/**
306 * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range
307 * @pctldev: pin controller device to check
308 * @gpio: gpio pin to check taken from the global GPIO pin space
309 *
310 * Tries to match a GPIO pin number to the ranges handled by a certain pin
311 * controller, return the range or NULL
312 */
313static struct pinctrl_gpio_range *
314pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio)
315{
316 struct pinctrl_gpio_range *range = NULL;
317
42fed7ba 318 mutex_lock(&pctldev->mutex);
2744e8af 319 /* Loop over the ranges */
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LW
320 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
321 /* Check if we're in the valid range */
322 if (gpio >= range->base &&
323 gpio < range->base + range->npins) {
42fed7ba 324 mutex_unlock(&pctldev->mutex);
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LW
325 return range;
326 }
327 }
42fed7ba 328 mutex_unlock(&pctldev->mutex);
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LW
329 return NULL;
330}
331
51e13c24
HZ
332/**
333 * pinctrl_ready_for_gpio_range() - check if other GPIO pins of
334 * the same GPIO chip are in range
335 * @gpio: gpio pin to check taken from the global GPIO pin space
336 *
337 * This function is complement of pinctrl_match_gpio_range(). If the return
338 * value of pinctrl_match_gpio_range() is NULL, this function could be used
339 * to check whether pinctrl device is ready or not. Maybe some GPIO pins
340 * of the same GPIO chip don't have back-end pinctrl interface.
341 * If the return value is true, it means that pinctrl device is ready & the
342 * certain GPIO pin doesn't have back-end pinctrl device. If the return value
343 * is false, it means that pinctrl device may not be ready.
344 */
2afe8229 345#ifdef CONFIG_GPIOLIB
51e13c24
HZ
346static bool pinctrl_ready_for_gpio_range(unsigned gpio)
347{
348 struct pinctrl_dev *pctldev;
349 struct pinctrl_gpio_range *range = NULL;
350 struct gpio_chip *chip = gpio_to_chip(gpio);
351
942cde72
TL
352 if (WARN(!chip, "no gpio_chip for gpio%i?", gpio))
353 return false;
354
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LW
355 mutex_lock(&pinctrldev_list_mutex);
356
51e13c24
HZ
357 /* Loop over the pin controllers */
358 list_for_each_entry(pctldev, &pinctrldev_list, node) {
359 /* Loop over the ranges */
5ffbe2e6 360 mutex_lock(&pctldev->mutex);
51e13c24
HZ
361 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
362 /* Check if any gpio range overlapped with gpio chip */
363 if (range->base + range->npins - 1 < chip->base ||
364 range->base > chip->base + chip->ngpio - 1)
365 continue;
5ffbe2e6 366 mutex_unlock(&pctldev->mutex);
44d5f7bb 367 mutex_unlock(&pinctrldev_list_mutex);
51e13c24
HZ
368 return true;
369 }
5ffbe2e6 370 mutex_unlock(&pctldev->mutex);
51e13c24 371 }
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LW
372
373 mutex_unlock(&pinctrldev_list_mutex);
374
51e13c24
HZ
375 return false;
376}
2afe8229
HZ
377#else
378static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; }
379#endif
51e13c24 380
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LW
381/**
382 * pinctrl_get_device_gpio_range() - find device for GPIO range
383 * @gpio: the pin to locate the pin controller for
384 * @outdev: the pin control device if found
385 * @outrange: the GPIO range if found
386 *
387 * Find the pin controller handling a certain GPIO pin from the pinspace of
388 * the GPIO subsystem, return the device and the matching GPIO range. Returns
4650b7cb
DA
389 * -EPROBE_DEFER if the GPIO range could not be found in any device since it
390 * may still have not been registered.
2744e8af 391 */
4ecce45d
SW
392static int pinctrl_get_device_gpio_range(unsigned gpio,
393 struct pinctrl_dev **outdev,
394 struct pinctrl_gpio_range **outrange)
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LW
395{
396 struct pinctrl_dev *pctldev = NULL;
397
f0059021
AL
398 mutex_lock(&pinctrldev_list_mutex);
399
2744e8af 400 /* Loop over the pin controllers */
2744e8af
LW
401 list_for_each_entry(pctldev, &pinctrldev_list, node) {
402 struct pinctrl_gpio_range *range;
403
404 range = pinctrl_match_gpio_range(pctldev, gpio);
405 if (range != NULL) {
406 *outdev = pctldev;
407 *outrange = range;
f0059021 408 mutex_unlock(&pinctrldev_list_mutex);
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LW
409 return 0;
410 }
411 }
2744e8af 412
f0059021
AL
413 mutex_unlock(&pinctrldev_list_mutex);
414
4650b7cb 415 return -EPROBE_DEFER;
2744e8af
LW
416}
417
418/**
419 * pinctrl_add_gpio_range() - register a GPIO range for a controller
420 * @pctldev: pin controller device to add the range to
421 * @range: the GPIO range to add
422 *
423 * This adds a range of GPIOs to be handled by a certain pin controller. Call
424 * this to register handled ranges after registering your pin controller.
425 */
426void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
427 struct pinctrl_gpio_range *range)
428{
42fed7ba 429 mutex_lock(&pctldev->mutex);
8b9c139f 430 list_add_tail(&range->node, &pctldev->gpio_ranges);
42fed7ba 431 mutex_unlock(&pctldev->mutex);
2744e8af 432}
4ecce45d 433EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range);
2744e8af 434
3e5e00b6
DA
435void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev,
436 struct pinctrl_gpio_range *ranges,
437 unsigned nranges)
438{
439 int i;
440
441 for (i = 0; i < nranges; i++)
442 pinctrl_add_gpio_range(pctldev, &ranges[i]);
443}
444EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges);
445
192c369c 446struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname,
f23f1516
SH
447 struct pinctrl_gpio_range *range)
448{
42fed7ba
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449 struct pinctrl_dev *pctldev;
450
42fed7ba 451 pctldev = get_pinctrl_dev_from_devname(devname);
f23f1516 452
dfa97515
LW
453 /*
454 * If we can't find this device, let's assume that is because
455 * it has not probed yet, so the driver trying to register this
456 * range need to defer probing.
457 */
42fed7ba 458 if (!pctldev) {
dfa97515 459 return ERR_PTR(-EPROBE_DEFER);
42fed7ba 460 }
f23f1516 461 pinctrl_add_gpio_range(pctldev, range);
42fed7ba 462
f23f1516
SH
463 return pctldev;
464}
192c369c 465EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range);
f23f1516 466
586a87e6
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467int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const char *pin_group,
468 const unsigned **pins, unsigned *num_pins)
469{
470 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
471 int gs;
472
e5b3b2d9
AT
473 if (!pctlops->get_group_pins)
474 return -EINVAL;
475
586a87e6
CR
476 gs = pinctrl_get_group_selector(pctldev, pin_group);
477 if (gs < 0)
478 return gs;
479
480 return pctlops->get_group_pins(pctldev, gs, pins, num_pins);
481}
482EXPORT_SYMBOL_GPL(pinctrl_get_group_pins);
483
9afbefb2 484struct pinctrl_gpio_range *
b18537cd
JE
485pinctrl_find_gpio_range_from_pin_nolock(struct pinctrl_dev *pctldev,
486 unsigned int pin)
9afbefb2 487{
c8f50e86 488 struct pinctrl_gpio_range *range;
9afbefb2
LW
489
490 /* Loop over the ranges */
491 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
492 /* Check if we're in the valid range */
c8587eee
CR
493 if (range->pins) {
494 int a;
495 for (a = 0; a < range->npins; a++) {
496 if (range->pins[a] == pin)
b18537cd 497 return range;
c8587eee
CR
498 }
499 } else if (pin >= range->pin_base &&
c8f50e86 500 pin < range->pin_base + range->npins)
b18537cd 501 return range;
9afbefb2 502 }
b18537cd
JE
503
504 return NULL;
505}
506EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin_nolock);
507
508/**
509 * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin
510 * @pctldev: the pin controller device to look in
511 * @pin: a controller-local number to find the range for
512 */
513struct pinctrl_gpio_range *
514pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev,
515 unsigned int pin)
516{
517 struct pinctrl_gpio_range *range;
518
519 mutex_lock(&pctldev->mutex);
520 range = pinctrl_find_gpio_range_from_pin_nolock(pctldev, pin);
42fed7ba 521 mutex_unlock(&pctldev->mutex);
b18537cd 522
c8f50e86 523 return range;
9afbefb2
LW
524}
525EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin);
526
7e10ee68
VK
527/**
528 * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller
529 * @pctldev: pin controller device to remove the range from
530 * @range: the GPIO range to remove
531 */
532void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
533 struct pinctrl_gpio_range *range)
534{
42fed7ba 535 mutex_lock(&pctldev->mutex);
7e10ee68 536 list_del(&range->node);
42fed7ba 537 mutex_unlock(&pctldev->mutex);
7e10ee68
VK
538}
539EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range);
540
7afde8ba
LW
541/**
542 * pinctrl_get_group_selector() - returns the group selector for a group
543 * @pctldev: the pin controller handling the group
544 * @pin_group: the pin group to look up
545 */
546int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
547 const char *pin_group)
548{
549 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
d1e90e9e 550 unsigned ngroups = pctlops->get_groups_count(pctldev);
7afde8ba
LW
551 unsigned group_selector = 0;
552
d1e90e9e 553 while (group_selector < ngroups) {
7afde8ba
LW
554 const char *gname = pctlops->get_group_name(pctldev,
555 group_selector);
556 if (!strcmp(gname, pin_group)) {
51cd24ee 557 dev_dbg(pctldev->dev,
7afde8ba
LW
558 "found group selector %u for %s\n",
559 group_selector,
560 pin_group);
561 return group_selector;
562 }
563
564 group_selector++;
565 }
566
51cd24ee 567 dev_err(pctldev->dev, "does not have pin group %s\n",
7afde8ba
LW
568 pin_group);
569
570 return -EINVAL;
571}
572
befe5bdf 573/**
b217e438 574 * pinctrl_request_gpio() - request a single pin to be used as GPIO
befe5bdf
LW
575 * @gpio: the GPIO pin number from the GPIO subsystem number space
576 *
577 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
578 * as part of their gpio_request() semantics, platforms and individual drivers
579 * shall *NOT* request GPIO pins to be muxed in.
580 */
581int pinctrl_request_gpio(unsigned gpio)
582{
583 struct pinctrl_dev *pctldev;
584 struct pinctrl_gpio_range *range;
585 int ret;
586 int pin;
587
588 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
57b676f9 589 if (ret) {
51e13c24
HZ
590 if (pinctrl_ready_for_gpio_range(gpio))
591 ret = 0;
4650b7cb 592 return ret;
57b676f9 593 }
befe5bdf 594
9b77ace4
AL
595 mutex_lock(&pctldev->mutex);
596
befe5bdf 597 /* Convert to the pin controllers number space */
c8587eee 598 pin = gpio_to_pin(range, gpio);
befe5bdf 599
57b676f9
SW
600 ret = pinmux_request_gpio(pctldev, range, pin, gpio);
601
9b77ace4
AL
602 mutex_unlock(&pctldev->mutex);
603
57b676f9 604 return ret;
befe5bdf
LW
605}
606EXPORT_SYMBOL_GPL(pinctrl_request_gpio);
607
608/**
609 * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO
610 * @gpio: the GPIO pin number from the GPIO subsystem number space
611 *
612 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
613 * as part of their gpio_free() semantics, platforms and individual drivers
614 * shall *NOT* request GPIO pins to be muxed out.
615 */
616void pinctrl_free_gpio(unsigned gpio)
617{
618 struct pinctrl_dev *pctldev;
619 struct pinctrl_gpio_range *range;
620 int ret;
621 int pin;
622
623 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
57b676f9 624 if (ret) {
befe5bdf 625 return;
57b676f9 626 }
42fed7ba 627 mutex_lock(&pctldev->mutex);
befe5bdf
LW
628
629 /* Convert to the pin controllers number space */
c8587eee 630 pin = gpio_to_pin(range, gpio);
befe5bdf 631
57b676f9
SW
632 pinmux_free_gpio(pctldev, pin, range);
633
42fed7ba 634 mutex_unlock(&pctldev->mutex);
befe5bdf
LW
635}
636EXPORT_SYMBOL_GPL(pinctrl_free_gpio);
637
638static int pinctrl_gpio_direction(unsigned gpio, bool input)
639{
640 struct pinctrl_dev *pctldev;
641 struct pinctrl_gpio_range *range;
642 int ret;
643 int pin;
644
645 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
42fed7ba 646 if (ret) {
befe5bdf 647 return ret;
42fed7ba
PC
648 }
649
650 mutex_lock(&pctldev->mutex);
befe5bdf
LW
651
652 /* Convert to the pin controllers number space */
c8587eee 653 pin = gpio_to_pin(range, gpio);
42fed7ba
PC
654 ret = pinmux_gpio_direction(pctldev, range, pin, input);
655
656 mutex_unlock(&pctldev->mutex);
befe5bdf 657
42fed7ba 658 return ret;
befe5bdf
LW
659}
660
661/**
662 * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode
663 * @gpio: the GPIO pin number from the GPIO subsystem number space
664 *
665 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
666 * as part of their gpio_direction_input() semantics, platforms and individual
667 * drivers shall *NOT* touch pin control GPIO calls.
668 */
669int pinctrl_gpio_direction_input(unsigned gpio)
670{
42fed7ba 671 return pinctrl_gpio_direction(gpio, true);
befe5bdf
LW
672}
673EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input);
674
675/**
676 * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode
677 * @gpio: the GPIO pin number from the GPIO subsystem number space
678 *
679 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
680 * as part of their gpio_direction_output() semantics, platforms and individual
681 * drivers shall *NOT* touch pin control GPIO calls.
682 */
683int pinctrl_gpio_direction_output(unsigned gpio)
684{
42fed7ba 685 return pinctrl_gpio_direction(gpio, false);
befe5bdf
LW
686}
687EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output);
688
6e5e959d
SW
689static struct pinctrl_state *find_state(struct pinctrl *p,
690 const char *name)
befe5bdf 691{
6e5e959d
SW
692 struct pinctrl_state *state;
693
694 list_for_each_entry(state, &p->states, node)
695 if (!strcmp(state->name, name))
696 return state;
697
698 return NULL;
699}
700
701static struct pinctrl_state *create_state(struct pinctrl *p,
702 const char *name)
703{
704 struct pinctrl_state *state;
705
706 state = kzalloc(sizeof(*state), GFP_KERNEL);
707 if (state == NULL) {
708 dev_err(p->dev,
709 "failed to alloc struct pinctrl_state\n");
710 return ERR_PTR(-ENOMEM);
711 }
712
713 state->name = name;
714 INIT_LIST_HEAD(&state->settings);
715
716 list_add_tail(&state->node, &p->states);
717
718 return state;
719}
720
721static int add_setting(struct pinctrl *p, struct pinctrl_map const *map)
722{
723 struct pinctrl_state *state;
7ecdb16f 724 struct pinctrl_setting *setting;
6e5e959d 725 int ret;
befe5bdf 726
6e5e959d
SW
727 state = find_state(p, map->name);
728 if (!state)
729 state = create_state(p, map->name);
730 if (IS_ERR(state))
731 return PTR_ERR(state);
befe5bdf 732
1e2082b5
SW
733 if (map->type == PIN_MAP_TYPE_DUMMY_STATE)
734 return 0;
735
6e5e959d
SW
736 setting = kzalloc(sizeof(*setting), GFP_KERNEL);
737 if (setting == NULL) {
738 dev_err(p->dev,
739 "failed to alloc struct pinctrl_setting\n");
740 return -ENOMEM;
741 }
befe5bdf 742
1e2082b5
SW
743 setting->type = map->type;
744
6e5e959d
SW
745 setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name);
746 if (setting->pctldev == NULL) {
6e5e959d 747 kfree(setting);
89216494
LW
748 /* Do not defer probing of hogs (circular loop) */
749 if (!strcmp(map->ctrl_dev_name, map->dev_name))
750 return -ENODEV;
c05127c4
LW
751 /*
752 * OK let us guess that the driver is not there yet, and
753 * let's defer obtaining this pinctrl handle to later...
754 */
89216494
LW
755 dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe",
756 map->ctrl_dev_name);
c05127c4 757 return -EPROBE_DEFER;
6e5e959d
SW
758 }
759
1a78958d
LW
760 setting->dev_name = map->dev_name;
761
1e2082b5
SW
762 switch (map->type) {
763 case PIN_MAP_TYPE_MUX_GROUP:
764 ret = pinmux_map_to_setting(map, setting);
765 break;
766 case PIN_MAP_TYPE_CONFIGS_PIN:
767 case PIN_MAP_TYPE_CONFIGS_GROUP:
768 ret = pinconf_map_to_setting(map, setting);
769 break;
770 default:
771 ret = -EINVAL;
772 break;
773 }
6e5e959d
SW
774 if (ret < 0) {
775 kfree(setting);
776 return ret;
777 }
778
779 list_add_tail(&setting->node, &state->settings);
780
781 return 0;
782}
783
784static struct pinctrl *find_pinctrl(struct device *dev)
785{
786 struct pinctrl *p;
787
42fed7ba 788 mutex_lock(&pinctrl_list_mutex);
1e2082b5 789 list_for_each_entry(p, &pinctrl_list, node)
42fed7ba
PC
790 if (p->dev == dev) {
791 mutex_unlock(&pinctrl_list_mutex);
6e5e959d 792 return p;
42fed7ba 793 }
6e5e959d 794
42fed7ba 795 mutex_unlock(&pinctrl_list_mutex);
6e5e959d
SW
796 return NULL;
797}
798
42fed7ba 799static void pinctrl_free(struct pinctrl *p, bool inlist);
6e5e959d
SW
800
801static struct pinctrl *create_pinctrl(struct device *dev)
802{
803 struct pinctrl *p;
804 const char *devname;
805 struct pinctrl_maps *maps_node;
806 int i;
807 struct pinctrl_map const *map;
808 int ret;
befe5bdf
LW
809
810 /*
811 * create the state cookie holder struct pinctrl for each
812 * mapping, this is what consumers will get when requesting
813 * a pin control handle with pinctrl_get()
814 */
02f5b989 815 p = kzalloc(sizeof(*p), GFP_KERNEL);
95dcd4ae
SW
816 if (p == NULL) {
817 dev_err(dev, "failed to alloc struct pinctrl\n");
befe5bdf 818 return ERR_PTR(-ENOMEM);
95dcd4ae 819 }
7ecdb16f 820 p->dev = dev;
6e5e959d 821 INIT_LIST_HEAD(&p->states);
57291ce2
SW
822 INIT_LIST_HEAD(&p->dt_maps);
823
824 ret = pinctrl_dt_to_map(p);
825 if (ret < 0) {
826 kfree(p);
827 return ERR_PTR(ret);
828 }
6e5e959d
SW
829
830 devname = dev_name(dev);
befe5bdf 831
42fed7ba 832 mutex_lock(&pinctrl_maps_mutex);
befe5bdf 833 /* Iterate over the pin control maps to locate the right ones */
b2b3e66e 834 for_each_maps(maps_node, i, map) {
7ecdb16f
SW
835 /* Map must be for this device */
836 if (strcmp(map->dev_name, devname))
837 continue;
838
6e5e959d 839 ret = add_setting(p, map);
89216494
LW
840 /*
841 * At this point the adding of a setting may:
842 *
843 * - Defer, if the pinctrl device is not yet available
844 * - Fail, if the pinctrl device is not yet available,
845 * AND the setting is a hog. We cannot defer that, since
846 * the hog will kick in immediately after the device
847 * is registered.
848 *
849 * If the error returned was not -EPROBE_DEFER then we
850 * accumulate the errors to see if we end up with
851 * an -EPROBE_DEFER later, as that is the worst case.
852 */
853 if (ret == -EPROBE_DEFER) {
42fed7ba
PC
854 pinctrl_free(p, false);
855 mutex_unlock(&pinctrl_maps_mutex);
6e5e959d 856 return ERR_PTR(ret);
7ecdb16f 857 }
befe5bdf 858 }
42fed7ba
PC
859 mutex_unlock(&pinctrl_maps_mutex);
860
89216494
LW
861 if (ret < 0) {
862 /* If some other error than deferral occured, return here */
42fed7ba 863 pinctrl_free(p, false);
89216494
LW
864 return ERR_PTR(ret);
865 }
befe5bdf 866
ab78029e
LW
867 kref_init(&p->users);
868
b0666ba4 869 /* Add the pinctrl handle to the global list */
7b320cb1 870 mutex_lock(&pinctrl_list_mutex);
8b9c139f 871 list_add_tail(&p->node, &pinctrl_list);
7b320cb1 872 mutex_unlock(&pinctrl_list_mutex);
befe5bdf
LW
873
874 return p;
6e5e959d 875}
7ecdb16f 876
42fed7ba
PC
877/**
878 * pinctrl_get() - retrieves the pinctrl handle for a device
879 * @dev: the device to obtain the handle for
880 */
881struct pinctrl *pinctrl_get(struct device *dev)
6e5e959d
SW
882{
883 struct pinctrl *p;
7ecdb16f 884
6e5e959d
SW
885 if (WARN_ON(!dev))
886 return ERR_PTR(-EINVAL);
887
ab78029e
LW
888 /*
889 * See if somebody else (such as the device core) has already
890 * obtained a handle to the pinctrl for this device. In that case,
891 * return another pointer to it.
892 */
6e5e959d 893 p = find_pinctrl(dev);
ab78029e
LW
894 if (p != NULL) {
895 dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n");
896 kref_get(&p->users);
897 return p;
898 }
7ecdb16f 899
d599bfb3 900 return create_pinctrl(dev);
befe5bdf
LW
901}
902EXPORT_SYMBOL_GPL(pinctrl_get);
903
d3cee830
RG
904static void pinctrl_free_setting(bool disable_setting,
905 struct pinctrl_setting *setting)
906{
907 switch (setting->type) {
908 case PIN_MAP_TYPE_MUX_GROUP:
909 if (disable_setting)
910 pinmux_disable_setting(setting);
911 pinmux_free_setting(setting);
912 break;
913 case PIN_MAP_TYPE_CONFIGS_PIN:
914 case PIN_MAP_TYPE_CONFIGS_GROUP:
915 pinconf_free_setting(setting);
916 break;
917 default:
918 break;
919 }
920}
921
42fed7ba 922static void pinctrl_free(struct pinctrl *p, bool inlist)
befe5bdf 923{
6e5e959d
SW
924 struct pinctrl_state *state, *n1;
925 struct pinctrl_setting *setting, *n2;
926
42fed7ba 927 mutex_lock(&pinctrl_list_mutex);
6e5e959d
SW
928 list_for_each_entry_safe(state, n1, &p->states, node) {
929 list_for_each_entry_safe(setting, n2, &state->settings, node) {
d3cee830 930 pinctrl_free_setting(state == p->state, setting);
6e5e959d
SW
931 list_del(&setting->node);
932 kfree(setting);
933 }
934 list_del(&state->node);
935 kfree(state);
7ecdb16f 936 }
befe5bdf 937
57291ce2
SW
938 pinctrl_dt_free_maps(p);
939
6e5e959d
SW
940 if (inlist)
941 list_del(&p->node);
befe5bdf 942 kfree(p);
42fed7ba 943 mutex_unlock(&pinctrl_list_mutex);
befe5bdf 944}
befe5bdf
LW
945
946/**
ab78029e
LW
947 * pinctrl_release() - release the pinctrl handle
948 * @kref: the kref in the pinctrl being released
949 */
2917e833 950static void pinctrl_release(struct kref *kref)
ab78029e
LW
951{
952 struct pinctrl *p = container_of(kref, struct pinctrl, users);
953
42fed7ba 954 pinctrl_free(p, true);
ab78029e
LW
955}
956
957/**
958 * pinctrl_put() - decrease use count on a previously claimed pinctrl handle
6e5e959d 959 * @p: the pinctrl handle to release
befe5bdf 960 */
57b676f9
SW
961void pinctrl_put(struct pinctrl *p)
962{
ab78029e 963 kref_put(&p->users, pinctrl_release);
57b676f9
SW
964}
965EXPORT_SYMBOL_GPL(pinctrl_put);
966
42fed7ba
PC
967/**
968 * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle
969 * @p: the pinctrl handle to retrieve the state from
970 * @name: the state name to retrieve
971 */
972struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p,
973 const char *name)
befe5bdf 974{
6e5e959d 975 struct pinctrl_state *state;
befe5bdf 976
6e5e959d 977 state = find_state(p, name);
5b3aa5f7
DA
978 if (!state) {
979 if (pinctrl_dummy_state) {
980 /* create dummy state */
981 dev_dbg(p->dev, "using pinctrl dummy state (%s)\n",
982 name);
983 state = create_state(p, name);
d599bfb3
RG
984 } else
985 state = ERR_PTR(-ENODEV);
5b3aa5f7 986 }
57b676f9 987
6e5e959d 988 return state;
befe5bdf 989}
42fed7ba 990EXPORT_SYMBOL_GPL(pinctrl_lookup_state);
befe5bdf
LW
991
992/**
42fed7ba
PC
993 * pinctrl_select_state() - select/activate/program a pinctrl state to HW
994 * @p: the pinctrl handle for the device that requests configuration
995 * @state: the state handle to select/activate/program
befe5bdf 996 */
42fed7ba 997int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state)
befe5bdf 998{
6e5e959d 999 struct pinctrl_setting *setting, *setting2;
50cf7c8a 1000 struct pinctrl_state *old_state = p->state;
6e5e959d 1001 int ret;
7ecdb16f 1002
6e5e959d
SW
1003 if (p->state == state)
1004 return 0;
befe5bdf 1005
6e5e959d
SW
1006 if (p->state) {
1007 /*
2243a87d
FW
1008 * For each pinmux setting in the old state, forget SW's record
1009 * of mux owner for that pingroup. Any pingroups which are
1010 * still owned by the new state will be re-acquired by the call
1011 * to pinmux_enable_setting() in the loop below.
6e5e959d
SW
1012 */
1013 list_for_each_entry(setting, &p->state->settings, node) {
1e2082b5
SW
1014 if (setting->type != PIN_MAP_TYPE_MUX_GROUP)
1015 continue;
2243a87d 1016 pinmux_disable_setting(setting);
6e5e959d
SW
1017 }
1018 }
1019
3102a76c 1020 p->state = NULL;
6e5e959d
SW
1021
1022 /* Apply all the settings for the new state */
1023 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
1024 switch (setting->type) {
1025 case PIN_MAP_TYPE_MUX_GROUP:
1026 ret = pinmux_enable_setting(setting);
1027 break;
1028 case PIN_MAP_TYPE_CONFIGS_PIN:
1029 case PIN_MAP_TYPE_CONFIGS_GROUP:
1030 ret = pinconf_apply_setting(setting);
1031 break;
1032 default:
1033 ret = -EINVAL;
1034 break;
1035 }
3102a76c 1036
42fed7ba 1037 if (ret < 0) {
3102a76c 1038 goto unapply_new_state;
42fed7ba 1039 }
befe5bdf 1040 }
6e5e959d 1041
3102a76c
RG
1042 p->state = state;
1043
6e5e959d 1044 return 0;
3102a76c
RG
1045
1046unapply_new_state:
da58751c 1047 dev_err(p->dev, "Error applying setting, reverse things back\n");
3102a76c 1048
3102a76c
RG
1049 list_for_each_entry(setting2, &state->settings, node) {
1050 if (&setting2->node == &setting->node)
1051 break;
af606177
RG
1052 /*
1053 * All we can do here is pinmux_disable_setting.
1054 * That means that some pins are muxed differently now
1055 * than they were before applying the setting (We can't
1056 * "unmux a pin"!), but it's not a big deal since the pins
1057 * are free to be muxed by another apply_setting.
1058 */
1059 if (setting2->type == PIN_MAP_TYPE_MUX_GROUP)
1060 pinmux_disable_setting(setting2);
3102a76c 1061 }
8009d5ff 1062
385d9424
RG
1063 /* There's no infinite recursive loop here because p->state is NULL */
1064 if (old_state)
42fed7ba 1065 pinctrl_select_state(p, old_state);
6e5e959d
SW
1066
1067 return ret;
befe5bdf 1068}
6e5e959d 1069EXPORT_SYMBOL_GPL(pinctrl_select_state);
befe5bdf 1070
6d4ca1fb
SW
1071static void devm_pinctrl_release(struct device *dev, void *res)
1072{
1073 pinctrl_put(*(struct pinctrl **)res);
1074}
1075
1076/**
1077 * struct devm_pinctrl_get() - Resource managed pinctrl_get()
1078 * @dev: the device to obtain the handle for
1079 *
1080 * If there is a need to explicitly destroy the returned struct pinctrl,
1081 * devm_pinctrl_put() should be used, rather than plain pinctrl_put().
1082 */
1083struct pinctrl *devm_pinctrl_get(struct device *dev)
1084{
1085 struct pinctrl **ptr, *p;
1086
1087 ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL);
1088 if (!ptr)
1089 return ERR_PTR(-ENOMEM);
1090
1091 p = pinctrl_get(dev);
1092 if (!IS_ERR(p)) {
1093 *ptr = p;
1094 devres_add(dev, ptr);
1095 } else {
1096 devres_free(ptr);
1097 }
1098
1099 return p;
1100}
1101EXPORT_SYMBOL_GPL(devm_pinctrl_get);
1102
1103static int devm_pinctrl_match(struct device *dev, void *res, void *data)
1104{
1105 struct pinctrl **p = res;
1106
1107 return *p == data;
1108}
1109
1110/**
1111 * devm_pinctrl_put() - Resource managed pinctrl_put()
1112 * @p: the pinctrl handle to release
1113 *
1114 * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally
1115 * this function will not need to be called and the resource management
1116 * code will ensure that the resource is freed.
1117 */
1118void devm_pinctrl_put(struct pinctrl *p)
1119{
a72149e8 1120 WARN_ON(devres_release(p->dev, devm_pinctrl_release,
6d4ca1fb 1121 devm_pinctrl_match, p));
6d4ca1fb
SW
1122}
1123EXPORT_SYMBOL_GPL(devm_pinctrl_put);
1124
57291ce2 1125int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps,
c5272a28 1126 bool dup)
befe5bdf 1127{
1e2082b5 1128 int i, ret;
b2b3e66e 1129 struct pinctrl_maps *maps_node;
befe5bdf 1130
7e9236ff 1131 pr_debug("add %u pinctrl maps\n", num_maps);
befe5bdf
LW
1132
1133 /* First sanity check the new mapping */
1134 for (i = 0; i < num_maps; i++) {
1e2082b5
SW
1135 if (!maps[i].dev_name) {
1136 pr_err("failed to register map %s (%d): no device given\n",
1137 maps[i].name, i);
1138 return -EINVAL;
1139 }
1140
befe5bdf
LW
1141 if (!maps[i].name) {
1142 pr_err("failed to register map %d: no map name given\n",
95dcd4ae 1143 i);
befe5bdf
LW
1144 return -EINVAL;
1145 }
1146
1e2082b5
SW
1147 if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE &&
1148 !maps[i].ctrl_dev_name) {
befe5bdf
LW
1149 pr_err("failed to register map %s (%d): no pin control device given\n",
1150 maps[i].name, i);
1151 return -EINVAL;
1152 }
1153
1e2082b5
SW
1154 switch (maps[i].type) {
1155 case PIN_MAP_TYPE_DUMMY_STATE:
1156 break;
1157 case PIN_MAP_TYPE_MUX_GROUP:
1158 ret = pinmux_validate_map(&maps[i], i);
1159 if (ret < 0)
fde04f41 1160 return ret;
1e2082b5
SW
1161 break;
1162 case PIN_MAP_TYPE_CONFIGS_PIN:
1163 case PIN_MAP_TYPE_CONFIGS_GROUP:
1164 ret = pinconf_validate_map(&maps[i], i);
1165 if (ret < 0)
fde04f41 1166 return ret;
1e2082b5
SW
1167 break;
1168 default:
1169 pr_err("failed to register map %s (%d): invalid type given\n",
95dcd4ae 1170 maps[i].name, i);
1681f5ae
SW
1171 return -EINVAL;
1172 }
befe5bdf
LW
1173 }
1174
b2b3e66e
SW
1175 maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL);
1176 if (!maps_node) {
1177 pr_err("failed to alloc struct pinctrl_maps\n");
1178 return -ENOMEM;
1179 }
befe5bdf 1180
b2b3e66e 1181 maps_node->num_maps = num_maps;
57291ce2
SW
1182 if (dup) {
1183 maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps,
1184 GFP_KERNEL);
1185 if (!maps_node->maps) {
1186 pr_err("failed to duplicate mapping table\n");
1187 kfree(maps_node);
1188 return -ENOMEM;
1189 }
1190 } else {
1191 maps_node->maps = maps;
befe5bdf
LW
1192 }
1193
c5272a28 1194 mutex_lock(&pinctrl_maps_mutex);
b2b3e66e 1195 list_add_tail(&maps_node->node, &pinctrl_maps);
c5272a28 1196 mutex_unlock(&pinctrl_maps_mutex);
b2b3e66e 1197
befe5bdf
LW
1198 return 0;
1199}
1200
57291ce2
SW
1201/**
1202 * pinctrl_register_mappings() - register a set of pin controller mappings
1203 * @maps: the pincontrol mappings table to register. This should probably be
1204 * marked with __initdata so it can be discarded after boot. This
1205 * function will perform a shallow copy for the mapping entries.
1206 * @num_maps: the number of maps in the mapping table
1207 */
1208int pinctrl_register_mappings(struct pinctrl_map const *maps,
1209 unsigned num_maps)
1210{
c5272a28 1211 return pinctrl_register_map(maps, num_maps, true);
57291ce2
SW
1212}
1213
1214void pinctrl_unregister_map(struct pinctrl_map const *map)
1215{
1216 struct pinctrl_maps *maps_node;
1217
42fed7ba 1218 mutex_lock(&pinctrl_maps_mutex);
57291ce2
SW
1219 list_for_each_entry(maps_node, &pinctrl_maps, node) {
1220 if (maps_node->maps == map) {
1221 list_del(&maps_node->node);
db6c2c69 1222 kfree(maps_node);
42fed7ba 1223 mutex_unlock(&pinctrl_maps_mutex);
57291ce2
SW
1224 return;
1225 }
1226 }
42fed7ba 1227 mutex_unlock(&pinctrl_maps_mutex);
57291ce2
SW
1228}
1229
840a47ba
JD
1230/**
1231 * pinctrl_force_sleep() - turn a given controller device into sleep state
1232 * @pctldev: pin controller device
1233 */
1234int pinctrl_force_sleep(struct pinctrl_dev *pctldev)
1235{
1236 if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep))
1237 return pinctrl_select_state(pctldev->p, pctldev->hog_sleep);
1238 return 0;
1239}
1240EXPORT_SYMBOL_GPL(pinctrl_force_sleep);
1241
1242/**
1243 * pinctrl_force_default() - turn a given controller device into default state
1244 * @pctldev: pin controller device
1245 */
1246int pinctrl_force_default(struct pinctrl_dev *pctldev)
1247{
1248 if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default))
1249 return pinctrl_select_state(pctldev->p, pctldev->hog_default);
1250 return 0;
1251}
1252EXPORT_SYMBOL_GPL(pinctrl_force_default);
1253
ef0eebc0
DA
1254/**
1255 * pinctrl_init_done() - tell pinctrl probe is done
1256 *
1257 * We'll use this time to switch the pins from "init" to "default" unless the
1258 * driver selected some other state.
1259 *
1260 * @dev: device to that's done probing
1261 */
1262int pinctrl_init_done(struct device *dev)
1263{
1264 struct dev_pin_info *pins = dev->pins;
1265 int ret;
1266
1267 if (!pins)
1268 return 0;
1269
1270 if (IS_ERR(pins->init_state))
1271 return 0; /* No such state */
1272
1273 if (pins->p->state != pins->init_state)
1274 return 0; /* Not at init anyway */
1275
1276 if (IS_ERR(pins->default_state))
1277 return 0; /* No default state */
1278
1279 ret = pinctrl_select_state(pins->p, pins->default_state);
1280 if (ret)
1281 dev_err(dev, "failed to activate default pinctrl state\n");
1282
1283 return ret;
1284}
1285
14005ee2
LW
1286#ifdef CONFIG_PM
1287
1288/**
f3333497 1289 * pinctrl_pm_select_state() - select pinctrl state for PM
14005ee2 1290 * @dev: device to select default state for
f3333497 1291 * @state: state to set
14005ee2 1292 */
f3333497
TL
1293static int pinctrl_pm_select_state(struct device *dev,
1294 struct pinctrl_state *state)
14005ee2
LW
1295{
1296 struct dev_pin_info *pins = dev->pins;
1297 int ret;
1298
f3333497
TL
1299 if (IS_ERR(state))
1300 return 0; /* No such state */
1301 ret = pinctrl_select_state(pins->p, state);
14005ee2 1302 if (ret)
f3333497
TL
1303 dev_err(dev, "failed to activate pinctrl state %s\n",
1304 state->name);
14005ee2
LW
1305 return ret;
1306}
f3333497
TL
1307
1308/**
1309 * pinctrl_pm_select_default_state() - select default pinctrl state for PM
1310 * @dev: device to select default state for
1311 */
1312int pinctrl_pm_select_default_state(struct device *dev)
1313{
1314 if (!dev->pins)
1315 return 0;
1316
1317 return pinctrl_pm_select_state(dev, dev->pins->default_state);
1318}
f472dead 1319EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state);
14005ee2
LW
1320
1321/**
1322 * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM
1323 * @dev: device to select sleep state for
1324 */
1325int pinctrl_pm_select_sleep_state(struct device *dev)
1326{
f3333497 1327 if (!dev->pins)
14005ee2 1328 return 0;
f3333497
TL
1329
1330 return pinctrl_pm_select_state(dev, dev->pins->sleep_state);
14005ee2 1331}
f472dead 1332EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state);
14005ee2
LW
1333
1334/**
1335 * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM
1336 * @dev: device to select idle state for
1337 */
1338int pinctrl_pm_select_idle_state(struct device *dev)
1339{
f3333497 1340 if (!dev->pins)
14005ee2 1341 return 0;
f3333497
TL
1342
1343 return pinctrl_pm_select_state(dev, dev->pins->idle_state);
14005ee2 1344}
f472dead 1345EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state);
14005ee2
LW
1346#endif
1347
2744e8af
LW
1348#ifdef CONFIG_DEBUG_FS
1349
1350static int pinctrl_pins_show(struct seq_file *s, void *what)
1351{
1352 struct pinctrl_dev *pctldev = s->private;
1353 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
706e8520 1354 unsigned i, pin;
2744e8af
LW
1355
1356 seq_printf(s, "registered pins: %d\n", pctldev->desc->npins);
2744e8af 1357
42fed7ba 1358 mutex_lock(&pctldev->mutex);
57b676f9 1359
706e8520
CP
1360 /* The pin number can be retrived from the pin controller descriptor */
1361 for (i = 0; i < pctldev->desc->npins; i++) {
2744e8af
LW
1362 struct pin_desc *desc;
1363
706e8520 1364 pin = pctldev->desc->pins[i].number;
2744e8af
LW
1365 desc = pin_desc_get(pctldev, pin);
1366 /* Pin space may be sparse */
1367 if (desc == NULL)
1368 continue;
1369
1370 seq_printf(s, "pin %d (%s) ", pin,
1371 desc->name ? desc->name : "unnamed");
1372
1373 /* Driver-specific info per pin */
1374 if (ops->pin_dbg_show)
1375 ops->pin_dbg_show(pctldev, s, pin);
1376
1377 seq_puts(s, "\n");
1378 }
1379
42fed7ba 1380 mutex_unlock(&pctldev->mutex);
57b676f9 1381
2744e8af
LW
1382 return 0;
1383}
1384
1385static int pinctrl_groups_show(struct seq_file *s, void *what)
1386{
1387 struct pinctrl_dev *pctldev = s->private;
1388 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
d1e90e9e 1389 unsigned ngroups, selector = 0;
2744e8af 1390
42fed7ba
PC
1391 mutex_lock(&pctldev->mutex);
1392
d1e90e9e 1393 ngroups = ops->get_groups_count(pctldev);
57b676f9 1394
2744e8af 1395 seq_puts(s, "registered pin groups:\n");
d1e90e9e 1396 while (selector < ngroups) {
e5b3b2d9
AT
1397 const unsigned *pins = NULL;
1398 unsigned num_pins = 0;
2744e8af 1399 const char *gname = ops->get_group_name(pctldev, selector);
dcb5dbc3 1400 const char *pname;
e5b3b2d9 1401 int ret = 0;
2744e8af
LW
1402 int i;
1403
e5b3b2d9
AT
1404 if (ops->get_group_pins)
1405 ret = ops->get_group_pins(pctldev, selector,
1406 &pins, &num_pins);
2744e8af
LW
1407 if (ret)
1408 seq_printf(s, "%s [ERROR GETTING PINS]\n",
1409 gname);
1410 else {
dcb5dbc3
DA
1411 seq_printf(s, "group: %s\n", gname);
1412 for (i = 0; i < num_pins; i++) {
1413 pname = pin_get_name(pctldev, pins[i]);
b4dd784b 1414 if (WARN_ON(!pname)) {
42fed7ba 1415 mutex_unlock(&pctldev->mutex);
dcb5dbc3 1416 return -EINVAL;
b4dd784b 1417 }
dcb5dbc3
DA
1418 seq_printf(s, "pin %d (%s)\n", pins[i], pname);
1419 }
1420 seq_puts(s, "\n");
2744e8af
LW
1421 }
1422 selector++;
1423 }
1424
42fed7ba 1425 mutex_unlock(&pctldev->mutex);
2744e8af
LW
1426
1427 return 0;
1428}
1429
1430static int pinctrl_gpioranges_show(struct seq_file *s, void *what)
1431{
1432 struct pinctrl_dev *pctldev = s->private;
1433 struct pinctrl_gpio_range *range = NULL;
1434
1435 seq_puts(s, "GPIO ranges handled:\n");
1436
42fed7ba 1437 mutex_lock(&pctldev->mutex);
57b676f9 1438
2744e8af 1439 /* Loop over the ranges */
2744e8af 1440 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
c8587eee
CR
1441 if (range->pins) {
1442 int a;
1443 seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {",
1444 range->id, range->name,
1445 range->base, (range->base + range->npins - 1));
1446 for (a = 0; a < range->npins - 1; a++)
1447 seq_printf(s, "%u, ", range->pins[a]);
1448 seq_printf(s, "%u}\n", range->pins[a]);
1449 }
1450 else
1451 seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n",
1452 range->id, range->name,
1453 range->base, (range->base + range->npins - 1),
1454 range->pin_base,
1455 (range->pin_base + range->npins - 1));
2744e8af 1456 }
57b676f9 1457
42fed7ba 1458 mutex_unlock(&pctldev->mutex);
2744e8af
LW
1459
1460 return 0;
1461}
1462
1463static int pinctrl_devices_show(struct seq_file *s, void *what)
1464{
1465 struct pinctrl_dev *pctldev;
1466
ae6b4d85 1467 seq_puts(s, "name [pinmux] [pinconf]\n");
57b676f9 1468
42fed7ba 1469 mutex_lock(&pinctrldev_list_mutex);
57b676f9 1470
2744e8af
LW
1471 list_for_each_entry(pctldev, &pinctrldev_list, node) {
1472 seq_printf(s, "%s ", pctldev->desc->name);
1473 if (pctldev->desc->pmxops)
ae6b4d85
LW
1474 seq_puts(s, "yes ");
1475 else
1476 seq_puts(s, "no ");
1477 if (pctldev->desc->confops)
2744e8af
LW
1478 seq_puts(s, "yes");
1479 else
1480 seq_puts(s, "no");
1481 seq_puts(s, "\n");
1482 }
57b676f9 1483
42fed7ba 1484 mutex_unlock(&pinctrldev_list_mutex);
2744e8af
LW
1485
1486 return 0;
1487}
1488
1e2082b5
SW
1489static inline const char *map_type(enum pinctrl_map_type type)
1490{
1491 static const char * const names[] = {
1492 "INVALID",
1493 "DUMMY_STATE",
1494 "MUX_GROUP",
1495 "CONFIGS_PIN",
1496 "CONFIGS_GROUP",
1497 };
1498
1499 if (type >= ARRAY_SIZE(names))
1500 return "UNKNOWN";
1501
1502 return names[type];
1503}
1504
3eedb437
SW
1505static int pinctrl_maps_show(struct seq_file *s, void *what)
1506{
1507 struct pinctrl_maps *maps_node;
1508 int i;
1509 struct pinctrl_map const *map;
1510
1511 seq_puts(s, "Pinctrl maps:\n");
1512
42fed7ba 1513 mutex_lock(&pinctrl_maps_mutex);
3eedb437 1514 for_each_maps(maps_node, i, map) {
1e2082b5
SW
1515 seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n",
1516 map->dev_name, map->name, map_type(map->type),
1517 map->type);
1518
1519 if (map->type != PIN_MAP_TYPE_DUMMY_STATE)
1520 seq_printf(s, "controlling device %s\n",
1521 map->ctrl_dev_name);
1522
1523 switch (map->type) {
1524 case PIN_MAP_TYPE_MUX_GROUP:
1525 pinmux_show_map(s, map);
1526 break;
1527 case PIN_MAP_TYPE_CONFIGS_PIN:
1528 case PIN_MAP_TYPE_CONFIGS_GROUP:
1529 pinconf_show_map(s, map);
1530 break;
1531 default:
1532 break;
1533 }
1534
1535 seq_printf(s, "\n");
3eedb437 1536 }
42fed7ba 1537 mutex_unlock(&pinctrl_maps_mutex);
3eedb437
SW
1538
1539 return 0;
1540}
1541
befe5bdf
LW
1542static int pinctrl_show(struct seq_file *s, void *what)
1543{
1544 struct pinctrl *p;
6e5e959d 1545 struct pinctrl_state *state;
7ecdb16f 1546 struct pinctrl_setting *setting;
befe5bdf
LW
1547
1548 seq_puts(s, "Requested pin control handlers their pinmux maps:\n");
57b676f9 1549
42fed7ba 1550 mutex_lock(&pinctrl_list_mutex);
57b676f9 1551
befe5bdf 1552 list_for_each_entry(p, &pinctrl_list, node) {
6e5e959d
SW
1553 seq_printf(s, "device: %s current state: %s\n",
1554 dev_name(p->dev),
1555 p->state ? p->state->name : "none");
1556
1557 list_for_each_entry(state, &p->states, node) {
1558 seq_printf(s, " state: %s\n", state->name);
befe5bdf 1559
6e5e959d 1560 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
1561 struct pinctrl_dev *pctldev = setting->pctldev;
1562
1563 seq_printf(s, " type: %s controller %s ",
1564 map_type(setting->type),
1565 pinctrl_dev_get_name(pctldev));
1566
1567 switch (setting->type) {
1568 case PIN_MAP_TYPE_MUX_GROUP:
1569 pinmux_show_setting(s, setting);
1570 break;
1571 case PIN_MAP_TYPE_CONFIGS_PIN:
1572 case PIN_MAP_TYPE_CONFIGS_GROUP:
1573 pinconf_show_setting(s, setting);
1574 break;
1575 default:
1576 break;
1577 }
6e5e959d 1578 }
befe5bdf 1579 }
befe5bdf
LW
1580 }
1581
42fed7ba 1582 mutex_unlock(&pinctrl_list_mutex);
57b676f9 1583
befe5bdf
LW
1584 return 0;
1585}
1586
2744e8af
LW
1587static int pinctrl_pins_open(struct inode *inode, struct file *file)
1588{
1589 return single_open(file, pinctrl_pins_show, inode->i_private);
1590}
1591
1592static int pinctrl_groups_open(struct inode *inode, struct file *file)
1593{
1594 return single_open(file, pinctrl_groups_show, inode->i_private);
1595}
1596
1597static int pinctrl_gpioranges_open(struct inode *inode, struct file *file)
1598{
1599 return single_open(file, pinctrl_gpioranges_show, inode->i_private);
1600}
1601
1602static int pinctrl_devices_open(struct inode *inode, struct file *file)
1603{
1604 return single_open(file, pinctrl_devices_show, NULL);
1605}
1606
3eedb437
SW
1607static int pinctrl_maps_open(struct inode *inode, struct file *file)
1608{
1609 return single_open(file, pinctrl_maps_show, NULL);
1610}
1611
befe5bdf
LW
1612static int pinctrl_open(struct inode *inode, struct file *file)
1613{
1614 return single_open(file, pinctrl_show, NULL);
1615}
1616
2744e8af
LW
1617static const struct file_operations pinctrl_pins_ops = {
1618 .open = pinctrl_pins_open,
1619 .read = seq_read,
1620 .llseek = seq_lseek,
1621 .release = single_release,
1622};
1623
1624static const struct file_operations pinctrl_groups_ops = {
1625 .open = pinctrl_groups_open,
1626 .read = seq_read,
1627 .llseek = seq_lseek,
1628 .release = single_release,
1629};
1630
1631static const struct file_operations pinctrl_gpioranges_ops = {
1632 .open = pinctrl_gpioranges_open,
1633 .read = seq_read,
1634 .llseek = seq_lseek,
1635 .release = single_release,
1636};
1637
3eedb437
SW
1638static const struct file_operations pinctrl_devices_ops = {
1639 .open = pinctrl_devices_open,
befe5bdf
LW
1640 .read = seq_read,
1641 .llseek = seq_lseek,
1642 .release = single_release,
1643};
1644
3eedb437
SW
1645static const struct file_operations pinctrl_maps_ops = {
1646 .open = pinctrl_maps_open,
2744e8af
LW
1647 .read = seq_read,
1648 .llseek = seq_lseek,
1649 .release = single_release,
1650};
1651
befe5bdf
LW
1652static const struct file_operations pinctrl_ops = {
1653 .open = pinctrl_open,
1654 .read = seq_read,
1655 .llseek = seq_lseek,
1656 .release = single_release,
1657};
1658
2744e8af
LW
1659static struct dentry *debugfs_root;
1660
1661static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1662{
02157160 1663 struct dentry *device_root;
2744e8af 1664
51cd24ee 1665 device_root = debugfs_create_dir(dev_name(pctldev->dev),
2744e8af 1666 debugfs_root);
02157160
TL
1667 pctldev->device_root = device_root;
1668
2744e8af
LW
1669 if (IS_ERR(device_root) || !device_root) {
1670 pr_warn("failed to create debugfs directory for %s\n",
51cd24ee 1671 dev_name(pctldev->dev));
2744e8af
LW
1672 return;
1673 }
1674 debugfs_create_file("pins", S_IFREG | S_IRUGO,
1675 device_root, pctldev, &pinctrl_pins_ops);
1676 debugfs_create_file("pingroups", S_IFREG | S_IRUGO,
1677 device_root, pctldev, &pinctrl_groups_ops);
1678 debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO,
1679 device_root, pctldev, &pinctrl_gpioranges_ops);
e7f2a444
FV
1680 if (pctldev->desc->pmxops)
1681 pinmux_init_device_debugfs(device_root, pctldev);
1682 if (pctldev->desc->confops)
1683 pinconf_init_device_debugfs(device_root, pctldev);
2744e8af
LW
1684}
1685
02157160
TL
1686static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1687{
1688 debugfs_remove_recursive(pctldev->device_root);
1689}
1690
2744e8af
LW
1691static void pinctrl_init_debugfs(void)
1692{
1693 debugfs_root = debugfs_create_dir("pinctrl", NULL);
1694 if (IS_ERR(debugfs_root) || !debugfs_root) {
1695 pr_warn("failed to create debugfs directory\n");
1696 debugfs_root = NULL;
1697 return;
1698 }
1699
1700 debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO,
1701 debugfs_root, NULL, &pinctrl_devices_ops);
3eedb437
SW
1702 debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO,
1703 debugfs_root, NULL, &pinctrl_maps_ops);
befe5bdf
LW
1704 debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO,
1705 debugfs_root, NULL, &pinctrl_ops);
2744e8af
LW
1706}
1707
1708#else /* CONFIG_DEBUG_FS */
1709
1710static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1711{
1712}
1713
1714static void pinctrl_init_debugfs(void)
1715{
1716}
1717
02157160
TL
1718static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1719{
1720}
1721
2744e8af
LW
1722#endif
1723
d26bc49f
SW
1724static int pinctrl_check_ops(struct pinctrl_dev *pctldev)
1725{
1726 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
1727
1728 if (!ops ||
d1e90e9e 1729 !ops->get_groups_count ||
e5b3b2d9 1730 !ops->get_group_name)
d26bc49f
SW
1731 return -EINVAL;
1732
57291ce2
SW
1733 if (ops->dt_node_to_map && !ops->dt_free_map)
1734 return -EINVAL;
1735
d26bc49f
SW
1736 return 0;
1737}
1738
2744e8af
LW
1739/**
1740 * pinctrl_register() - register a pin controller device
1741 * @pctldesc: descriptor for this pin controller
1742 * @dev: parent device for this pin controller
1743 * @driver_data: private pin controller data for this pin controller
1744 */
1745struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
1746 struct device *dev, void *driver_data)
1747{
2744e8af
LW
1748 struct pinctrl_dev *pctldev;
1749 int ret;
1750
da9aecb0 1751 if (!pctldesc)
323de9ef 1752 return ERR_PTR(-EINVAL);
da9aecb0 1753 if (!pctldesc->name)
323de9ef 1754 return ERR_PTR(-EINVAL);
2744e8af 1755
02f5b989 1756 pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL);
95dcd4ae
SW
1757 if (pctldev == NULL) {
1758 dev_err(dev, "failed to alloc struct pinctrl_dev\n");
323de9ef 1759 return ERR_PTR(-ENOMEM);
95dcd4ae 1760 }
b9130b77
TL
1761
1762 /* Initialize pin control device struct */
1763 pctldev->owner = pctldesc->owner;
1764 pctldev->desc = pctldesc;
1765 pctldev->driver_data = driver_data;
1766 INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL);
b9130b77 1767 INIT_LIST_HEAD(&pctldev->gpio_ranges);
b9130b77 1768 pctldev->dev = dev;
42fed7ba 1769 mutex_init(&pctldev->mutex);
b9130b77 1770
d26bc49f 1771 /* check core ops for sanity */
323de9ef
MY
1772 ret = pinctrl_check_ops(pctldev);
1773 if (ret) {
ad6e1107 1774 dev_err(dev, "pinctrl ops lacks necessary functions\n");
d26bc49f
SW
1775 goto out_err;
1776 }
1777
2744e8af
LW
1778 /* If we're implementing pinmuxing, check the ops for sanity */
1779 if (pctldesc->pmxops) {
323de9ef
MY
1780 ret = pinmux_check_ops(pctldev);
1781 if (ret)
b9130b77 1782 goto out_err;
2744e8af
LW
1783 }
1784
ae6b4d85
LW
1785 /* If we're implementing pinconfig, check the ops for sanity */
1786 if (pctldesc->confops) {
323de9ef
MY
1787 ret = pinconf_check_ops(pctldev);
1788 if (ret)
b9130b77 1789 goto out_err;
ae6b4d85
LW
1790 }
1791
2744e8af 1792 /* Register all the pins */
ad6e1107 1793 dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins);
2744e8af
LW
1794 ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins);
1795 if (ret) {
ad6e1107 1796 dev_err(dev, "error during pin registration\n");
2744e8af
LW
1797 pinctrl_free_pindescs(pctldev, pctldesc->pins,
1798 pctldesc->npins);
51cd24ee 1799 goto out_err;
2744e8af
LW
1800 }
1801
42fed7ba 1802 mutex_lock(&pinctrldev_list_mutex);
8b9c139f 1803 list_add_tail(&pctldev->node, &pinctrldev_list);
42fed7ba
PC
1804 mutex_unlock(&pinctrldev_list_mutex);
1805
1806 pctldev->p = pinctrl_get(pctldev->dev);
57b676f9 1807
6e5e959d 1808 if (!IS_ERR(pctldev->p)) {
840a47ba 1809 pctldev->hog_default =
42fed7ba 1810 pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT);
840a47ba 1811 if (IS_ERR(pctldev->hog_default)) {
ad6e1107
JC
1812 dev_dbg(dev, "failed to lookup the default state\n");
1813 } else {
42fed7ba 1814 if (pinctrl_select_state(pctldev->p,
840a47ba 1815 pctldev->hog_default))
ad6e1107
JC
1816 dev_err(dev,
1817 "failed to select default state\n");
ad6e1107 1818 }
840a47ba
JD
1819
1820 pctldev->hog_sleep =
42fed7ba 1821 pinctrl_lookup_state(pctldev->p,
840a47ba
JD
1822 PINCTRL_STATE_SLEEP);
1823 if (IS_ERR(pctldev->hog_sleep))
1824 dev_dbg(dev, "failed to lookup the sleep state\n");
6e5e959d 1825 }
57b676f9 1826
2304b473
SW
1827 pinctrl_init_device_debugfs(pctldev);
1828
2744e8af
LW
1829 return pctldev;
1830
51cd24ee 1831out_err:
42fed7ba 1832 mutex_destroy(&pctldev->mutex);
51cd24ee 1833 kfree(pctldev);
323de9ef 1834 return ERR_PTR(ret);
2744e8af
LW
1835}
1836EXPORT_SYMBOL_GPL(pinctrl_register);
1837
1838/**
1839 * pinctrl_unregister() - unregister pinmux
1840 * @pctldev: pin controller to unregister
1841 *
1842 * Called by pinmux drivers to unregister a pinmux.
1843 */
1844void pinctrl_unregister(struct pinctrl_dev *pctldev)
1845{
5d589b09 1846 struct pinctrl_gpio_range *range, *n;
2744e8af
LW
1847 if (pctldev == NULL)
1848 return;
1849
42fed7ba 1850 mutex_lock(&pctldev->mutex);
42fed7ba 1851 pinctrl_remove_device_debugfs(pctldev);
db93facf 1852 mutex_unlock(&pctldev->mutex);
57b676f9 1853
6e5e959d 1854 if (!IS_ERR(pctldev->p))
42fed7ba 1855 pinctrl_put(pctldev->p);
57b676f9 1856
db93facf
JL
1857 mutex_lock(&pinctrldev_list_mutex);
1858 mutex_lock(&pctldev->mutex);
2744e8af 1859 /* TODO: check that no pinmuxes are still active? */
2744e8af 1860 list_del(&pctldev->node);
2744e8af
LW
1861 /* Destroy descriptor tree */
1862 pinctrl_free_pindescs(pctldev, pctldev->desc->pins,
1863 pctldev->desc->npins);
5d589b09
DA
1864 /* remove gpio ranges map */
1865 list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node)
1866 list_del(&range->node);
1867
42fed7ba
PC
1868 mutex_unlock(&pctldev->mutex);
1869 mutex_destroy(&pctldev->mutex);
51cd24ee 1870 kfree(pctldev);
42fed7ba 1871 mutex_unlock(&pinctrldev_list_mutex);
2744e8af
LW
1872}
1873EXPORT_SYMBOL_GPL(pinctrl_unregister);
1874
1875static int __init pinctrl_init(void)
1876{
1877 pr_info("initialized pinctrl subsystem\n");
1878 pinctrl_init_debugfs();
1879 return 0;
1880}
1881
1882/* init early since many drivers really need to initialized pinmux early */
1883core_initcall(pinctrl_init);
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