Merge branches 'acpi-soc', 'acpi-misc', 'acpi-pci' and 'device-properties'
[deliverable/linux.git] / drivers / pinctrl / sh-pfc / Kconfig
CommitLineData
6e54d8d2
LP
1#
2# Renesas SH and SH Mobile PINCTRL drivers
3#
afae021a 4
fe351cc4 5if ARCH_RENESAS || SUPERH
6e54d8d2
LP
6
7config PINCTRL_SH_PFC
ca5481c6
PM
8 select PINMUX
9 select PINCONF
c58d9c1b 10 select GENERIC_PINCONF
f9492fda 11 def_bool y
6e54d8d2
LP
12 help
13 This enables pin control drivers for SH and SH Mobile platforms
ca5481c6 14
abc60d48
MD
15config PINCTRL_SH_PFC_GPIO
16 select GPIOLIB
17 select PINCTRL_SH_PFC
18 bool
afae021a 19 help
abc60d48 20 This enables pin control and GPIO drivers for SH/SH Mobile platforms
6e54d8d2 21
1e7d5d84
NS
22config PINCTRL_PFC_EMEV2
23 def_bool y
24 depends on ARCH_EMEV2
25 select PINCTRL_SH_PFC
26
c98f6c21
MD
27config PINCTRL_PFC_R8A73A4
28 def_bool y
29 depends on ARCH_R8A73A4
abc60d48 30 select PINCTRL_SH_PFC_GPIO
c98f6c21 31
d5b1521a
LP
32config PINCTRL_PFC_R8A7740
33 def_bool y
34 depends on ARCH_R8A7740
abc60d48 35 select PINCTRL_SH_PFC_GPIO
d5b1521a 36
87f8c988
KM
37config PINCTRL_PFC_R8A7778
38 def_bool y
39 depends on ARCH_R8A7778
40 select PINCTRL_SH_PFC
41
881023d2
LP
42config PINCTRL_PFC_R8A7779
43 def_bool y
44 depends on ARCH_R8A7779
45 select PINCTRL_SH_PFC
46
58c229e1
KM
47config PINCTRL_PFC_R8A7790
48 def_bool y
49 depends on ARCH_R8A7790
50 select PINCTRL_SH_PFC
51
50884519
HN
52config PINCTRL_PFC_R8A7791
53 def_bool y
54 depends on ARCH_R8A7791
55 select PINCTRL_SH_PFC
56
cb0ba73d
UH
57config PINCTRL_PFC_R8A7793
58 def_bool y
59 depends on ARCH_R8A7793
60 select PINCTRL_SH_PFC
61
43c4436e
HN
62config PINCTRL_PFC_R8A7794
63 def_bool y
64 depends on ARCH_R8A7794
65 select PINCTRL_SH_PFC
66
0b0ffc96
TK
67config PINCTRL_PFC_R8A7795
68 def_bool y
69 depends on ARCH_R8A7795
70 select PINCTRL_SH_PFC
71
ccda552e
LP
72config PINCTRL_PFC_SH7203
73 def_bool y
74 depends on CPU_SUBTYPE_SH7203
abc60d48 75 select PINCTRL_SH_PFC_GPIO
ccda552e 76
a8d42fc4
LP
77config PINCTRL_PFC_SH7264
78 def_bool y
79 depends on CPU_SUBTYPE_SH7264
abc60d48 80 select PINCTRL_SH_PFC_GPIO
a8d42fc4 81
f5e811f2
LP
82config PINCTRL_PFC_SH7269
83 def_bool y
84 depends on CPU_SUBTYPE_SH7269
abc60d48 85 select PINCTRL_SH_PFC_GPIO
f5e811f2 86
5d5166dc
LP
87config PINCTRL_PFC_SH73A0
88 def_bool y
89 depends on ARCH_SH73A0
abc60d48 90 select PINCTRL_SH_PFC_GPIO
ea770ad2 91 select REGULATOR
5d5166dc 92
74cad605
LP
93config PINCTRL_PFC_SH7720
94 def_bool y
95 depends on CPU_SUBTYPE_SH7720
abc60d48 96 select PINCTRL_SH_PFC_GPIO
74cad605 97
f5e25ae5
LP
98config PINCTRL_PFC_SH7722
99 def_bool y
100 depends on CPU_SUBTYPE_SH7722
abc60d48 101 select PINCTRL_SH_PFC_GPIO
f5e25ae5 102
d05afa0a
LP
103config PINCTRL_PFC_SH7723
104 def_bool y
105 depends on CPU_SUBTYPE_SH7723
abc60d48 106 select PINCTRL_SH_PFC_GPIO
d05afa0a 107
0ff25bab
LP
108config PINCTRL_PFC_SH7724
109 def_bool y
110 depends on CPU_SUBTYPE_SH7724
abc60d48 111 select PINCTRL_SH_PFC_GPIO
0ff25bab 112
ac1ebc21
LP
113config PINCTRL_PFC_SH7734
114 def_bool y
115 depends on CPU_SUBTYPE_SH7734
abc60d48 116 select PINCTRL_SH_PFC_GPIO
ac1ebc21 117
0bb92677
LP
118config PINCTRL_PFC_SH7757
119 def_bool y
120 depends on CPU_SUBTYPE_SH7757
abc60d48 121 select PINCTRL_SH_PFC_GPIO
0bb92677 122
a56398e9
LP
123config PINCTRL_PFC_SH7785
124 def_bool y
125 depends on CPU_SUBTYPE_SH7785
abc60d48 126 select PINCTRL_SH_PFC_GPIO
a56398e9 127
d2a31bdd
LP
128config PINCTRL_PFC_SH7786
129 def_bool y
130 depends on CPU_SUBTYPE_SH7786
abc60d48 131 select PINCTRL_SH_PFC_GPIO
d2a31bdd 132
d5d9a818
LP
133config PINCTRL_PFC_SHX3
134 def_bool y
135 depends on CPU_SUBTYPE_SHX3
abc60d48 136 select PINCTRL_SH_PFC_GPIO
6e54d8d2 137endif
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