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Merge remote-tracking branch 'pinctrl/for-next'
[deliverable/linux.git] / drivers / pinctrl / sunxi / pinctrl-sun8i-h3.c
CommitLineData
e87623cb
JK		 1/*
2 * Allwinner H3 SoCs pinctrl driver.
3 *
4 * Copyright (C) 2015 Jens Kuske <jenskuske@gmail.com>
5 *
6 * Based on pinctrl-sun8i-a23.c, which is:
7 * Copyright (C) 2014 Chen-Yu Tsai <wens@csie.org>
8 * Copyright (C) 2014 Maxime Ripard <maxime.ripard@free-electrons.com>
9 *
10 * This file is licensed under the terms of the GNU General Public
11 * License version 2. This program is licensed "as is" without any
12 * warranty of any kind, whether express or implied.
13 */
14
15#include <linux/module.h>
16#include <linux/platform_device.h>
17#include <linux/of.h>
18#include <linux/of_device.h>
19#include <linux/pinctrl/pinctrl.h>
20
21#include "pinctrl-sunxi.h"
22
23static const struct sunxi_desc_pin sun8i_h3_pins[] = {
24 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 0),
25 SUNXI_FUNCTION(0x0, "gpio_in"),
26 SUNXI_FUNCTION(0x1, "gpio_out"),
27 SUNXI_FUNCTION(0x2, "uart2"), /* TX */
28 SUNXI_FUNCTION(0x3, "jtag"), /* MS */
29 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 0)), /* PA_EINT0 */
30 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 1),
31 SUNXI_FUNCTION(0x0, "gpio_in"),
32 SUNXI_FUNCTION(0x1, "gpio_out"),
33 SUNXI_FUNCTION(0x2, "uart2"), /* RX */
34 SUNXI_FUNCTION(0x3, "jtag"), /* CK */
35 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 1)), /* PA_EINT1 */
36 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 2),
37 SUNXI_FUNCTION(0x0, "gpio_in"),
38 SUNXI_FUNCTION(0x1, "gpio_out"),
39 SUNXI_FUNCTION(0x2, "uart2"), /* RTS */
40 SUNXI_FUNCTION(0x3, "jtag"), /* DO */
41 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 2)), /* PA_EINT2 */
42 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 3),
43 SUNXI_FUNCTION(0x0, "gpio_in"),
44 SUNXI_FUNCTION(0x1, "gpio_out"),
45 SUNXI_FUNCTION(0x2, "uart2"), /* CTS */
46 SUNXI_FUNCTION(0x3, "jtag"), /* DI */
47 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 3)), /* PA_EINT3 */
48 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 4),
49 SUNXI_FUNCTION(0x0, "gpio_in"),
50 SUNXI_FUNCTION(0x1, "gpio_out"),
51 SUNXI_FUNCTION(0x2, "uart0"), /* TX */
52 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 4)), /* PA_EINT4 */
53 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 5),
54 SUNXI_FUNCTION(0x0, "gpio_in"),
55 SUNXI_FUNCTION(0x1, "gpio_out"),
56 SUNXI_FUNCTION(0x2, "uart0"), /* RX */
57 SUNXI_FUNCTION(0x3, "pwm0"),
58 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 5)), /* PA_EINT5 */
59 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 6),
60 SUNXI_FUNCTION(0x0, "gpio_in"),
61 SUNXI_FUNCTION(0x1, "gpio_out"),
62 SUNXI_FUNCTION(0x2, "sim"), /* PWREN */
e87623cb
JK		 63 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 6)), /* PA_EINT6 */
64 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 7),
65 SUNXI_FUNCTION(0x0, "gpio_in"),
66 SUNXI_FUNCTION(0x1, "gpio_out"),
67 SUNXI_FUNCTION(0x2, "sim"), /* CLK */
68 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 7)), /* PA_EINT7 */
69 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 8),
70 SUNXI_FUNCTION(0x0, "gpio_in"),
71 SUNXI_FUNCTION(0x1, "gpio_out"),
72 SUNXI_FUNCTION(0x2, "sim"), /* DATA */
73 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 8)), /* PA_EINT8 */
74 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 9),
75 SUNXI_FUNCTION(0x0, "gpio_in"),
76 SUNXI_FUNCTION(0x1, "gpio_out"),
77 SUNXI_FUNCTION(0x2, "sim"), /* RST */
78 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 9)), /* PA_EINT9 */
79 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 10),
80 SUNXI_FUNCTION(0x0, "gpio_in"),
81 SUNXI_FUNCTION(0x1, "gpio_out"),
82 SUNXI_FUNCTION(0x2, "sim"), /* DET */
83 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 10)), /* PA_EINT10 */
84 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 11),
85 SUNXI_FUNCTION(0x0, "gpio_in"),
86 SUNXI_FUNCTION(0x1, "gpio_out"),
87 SUNXI_FUNCTION(0x2, "i2c0"), /* SCK */
88 SUNXI_FUNCTION(0x3, "di"), /* TX */
89 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 11)), /* PA_EINT11 */
90 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 12),
91 SUNXI_FUNCTION(0x0, "gpio_in"),
92 SUNXI_FUNCTION(0x1, "gpio_out"),
93 SUNXI_FUNCTION(0x2, "i2c0"), /* SDA */
94 SUNXI_FUNCTION(0x3, "di"), /* RX */
95 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 12)), /* PA_EINT12 */
96 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 13),
97 SUNXI_FUNCTION(0x0, "gpio_in"),
98 SUNXI_FUNCTION(0x1, "gpio_out"),
99 SUNXI_FUNCTION(0x2, "spi1"), /* CS */
100 SUNXI_FUNCTION(0x3, "uart3"), /* TX */
101 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 13)), /* PA_EINT13 */
102 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 14),
103 SUNXI_FUNCTION(0x0, "gpio_in"),
104 SUNXI_FUNCTION(0x1, "gpio_out"),
105 SUNXI_FUNCTION(0x2, "spi1"), /* CLK */
106 SUNXI_FUNCTION(0x3, "uart3"), /* RX */
107 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 14)), /* PA_EINT14 */
108 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 15),
109 SUNXI_FUNCTION(0x0, "gpio_in"),
110 SUNXI_FUNCTION(0x1, "gpio_out"),
111 SUNXI_FUNCTION(0x2, "spi1"), /* MOSI */
112 SUNXI_FUNCTION(0x3, "uart3"), /* RTS */
113 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 15)), /* PA_EINT15 */
114 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 16),
115 SUNXI_FUNCTION(0x0, "gpio_in"),
116 SUNXI_FUNCTION(0x1, "gpio_out"),
117 SUNXI_FUNCTION(0x2, "spi1"), /* MISO */
118 SUNXI_FUNCTION(0x3, "uart3"), /* CTS */
119 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 16)), /* PA_EINT16 */
120 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 17),
121 SUNXI_FUNCTION(0x0, "gpio_in"),
122 SUNXI_FUNCTION(0x1, "gpio_out"),
123 SUNXI_FUNCTION(0x2, "spdif"), /* OUT */
124 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 17)), /* PA_EINT17 */
125 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 18),
126 SUNXI_FUNCTION(0x0, "gpio_in"),
127 SUNXI_FUNCTION(0x1, "gpio_out"),
128 SUNXI_FUNCTION(0x2, "i2s0"), /* SYNC */
129 SUNXI_FUNCTION(0x3, "i2c1"), /* SCK */
130 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 18)), /* PA_EINT18 */
131 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 19),
132 SUNXI_FUNCTION(0x0, "gpio_in"),
133 SUNXI_FUNCTION(0x1, "gpio_out"),
134 SUNXI_FUNCTION(0x2, "i2s0"), /* CLK */
135 SUNXI_FUNCTION(0x3, "i2c1"), /* SDA */
136 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 19)), /* PA_EINT19 */
137 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 20),
138 SUNXI_FUNCTION(0x0, "gpio_in"),
139 SUNXI_FUNCTION(0x1, "gpio_out"),
140 SUNXI_FUNCTION(0x2, "i2s0"), /* DOUT */
141 SUNXI_FUNCTION(0x3, "sim"), /* VPPEN */
142 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 20)), /* PA_EINT20 */
143 SUNXI_PIN(SUNXI_PINCTRL_PIN(A, 21),
144 SUNXI_FUNCTION(0x0, "gpio_in"),
145 SUNXI_FUNCTION(0x1, "gpio_out"),
146 SUNXI_FUNCTION(0x2, "i2s0"), /* DIN */
147 SUNXI_FUNCTION(0x3, "sim"), /* VPPPP */
148 SUNXI_FUNCTION_IRQ_BANK(0x6, 0, 21)), /* PA_EINT21 */
149 /* Hole */
150 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 0),
151 SUNXI_FUNCTION(0x0, "gpio_in"),
152 SUNXI_FUNCTION(0x1, "gpio_out"),
153 SUNXI_FUNCTION(0x2, "nand0"), /* WE */
154 SUNXI_FUNCTION(0x3, "spi0")), /* MOSI */
155 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 1),
156 SUNXI_FUNCTION(0x0, "gpio_in"),
157 SUNXI_FUNCTION(0x1, "gpio_out"),
158 SUNXI_FUNCTION(0x2, "nand0"), /* ALE */
159 SUNXI_FUNCTION(0x3, "spi0")), /* MISO */
160 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 2),
161 SUNXI_FUNCTION(0x0, "gpio_in"),
162 SUNXI_FUNCTION(0x1, "gpio_out"),
163 SUNXI_FUNCTION(0x2, "nand0"), /* CLE */
164 SUNXI_FUNCTION(0x3, "spi0")), /* CLK */
165 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 3),
166 SUNXI_FUNCTION(0x0, "gpio_in"),
167 SUNXI_FUNCTION(0x1, "gpio_out"),
168 SUNXI_FUNCTION(0x2, "nand0"), /* CE1 */
169 SUNXI_FUNCTION(0x3, "spi0")), /* CS */
170 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 4),
171 SUNXI_FUNCTION(0x0, "gpio_in"),
172 SUNXI_FUNCTION(0x1, "gpio_out"),
173 SUNXI_FUNCTION(0x2, "nand0")), /* CE0 */
174 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 5),
175 SUNXI_FUNCTION(0x0, "gpio_in"),
176 SUNXI_FUNCTION(0x1, "gpio_out"),
177 SUNXI_FUNCTION(0x2, "nand0"), /* RE */
178 SUNXI_FUNCTION(0x3, "mmc2")), /* CLK */
179 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 6),
180 SUNXI_FUNCTION(0x0, "gpio_in"),
181 SUNXI_FUNCTION(0x1, "gpio_out"),
182 SUNXI_FUNCTION(0x2, "nand0"), /* RB0 */
183 SUNXI_FUNCTION(0x3, "mmc2")), /* CMD */
184 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 7),
185 SUNXI_FUNCTION(0x0, "gpio_in"),
186 SUNXI_FUNCTION(0x1, "gpio_out"),
187 SUNXI_FUNCTION(0x2, "nand0")), /* RB1 */
188 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 8),
189 SUNXI_FUNCTION(0x0, "gpio_in"),
190 SUNXI_FUNCTION(0x1, "gpio_out"),
191 SUNXI_FUNCTION(0x2, "nand0"), /* DQ0 */
192 SUNXI_FUNCTION(0x3, "mmc2")), /* D0 */
193 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 9),
194 SUNXI_FUNCTION(0x0, "gpio_in"),
195 SUNXI_FUNCTION(0x1, "gpio_out"),
196 SUNXI_FUNCTION(0x2, "nand0"), /* DQ1 */
197 SUNXI_FUNCTION(0x3, "mmc2")), /* D1 */
198 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 10),
199 SUNXI_FUNCTION(0x0, "gpio_in"),
200 SUNXI_FUNCTION(0x1, "gpio_out"),
201 SUNXI_FUNCTION(0x2, "nand0"), /* DQ2 */
202 SUNXI_FUNCTION(0x3, "mmc2")), /* D2 */
203 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 11),
204 SUNXI_FUNCTION(0x0, "gpio_in"),
205 SUNXI_FUNCTION(0x1, "gpio_out"),
206 SUNXI_FUNCTION(0x2, "nand0"), /* DQ3 */
207 SUNXI_FUNCTION(0x3, "mmc2")), /* D3 */
208 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 12),
209 SUNXI_FUNCTION(0x0, "gpio_in"),
210 SUNXI_FUNCTION(0x1, "gpio_out"),
211 SUNXI_FUNCTION(0x2, "nand0"), /* DQ4 */
212 SUNXI_FUNCTION(0x3, "mmc2")), /* D4 */
213 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 13),
214 SUNXI_FUNCTION(0x0, "gpio_in"),
215 SUNXI_FUNCTION(0x1, "gpio_out"),
216 SUNXI_FUNCTION(0x2, "nand0"), /* DQ5 */
217 SUNXI_FUNCTION(0x3, "mmc2")), /* D5 */
218 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 14),
219 SUNXI_FUNCTION(0x0, "gpio_in"),
220 SUNXI_FUNCTION(0x1, "gpio_out"),
bc0f566a 221 SUNXI_FUNCTION(0x2, "nand0"), /* DQ6 */
e87623cb
JK		 222 SUNXI_FUNCTION(0x3, "mmc2")), /* D6 */
223 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 15),
224 SUNXI_FUNCTION(0x0, "gpio_in"),
225 SUNXI_FUNCTION(0x1, "gpio_out"),
bc0f566a 226 SUNXI_FUNCTION(0x2, "nand0"), /* DQ7 */
e87623cb
JK		 227 SUNXI_FUNCTION(0x3, "mmc2")), /* D7 */
228 SUNXI_PIN(SUNXI_PINCTRL_PIN(C, 16),
229 SUNXI_FUNCTION(0x0, "gpio_in"),
230 SUNXI_FUNCTION(0x1, "gpio_out"),
bc0f566a 231 SUNXI_FUNCTION(0x2, "nand0"), /* DQS */
e87623cb
JK		 232 SUNXI_FUNCTION(0x3, "mmc2")), /* RST */
233 /* Hole */
234 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 0),
235 SUNXI_FUNCTION(0x0, "gpio_in"),
236 SUNXI_FUNCTION(0x1, "gpio_out"),
237 SUNXI_FUNCTION(0x2, "emac")), /* RXD3 */
238 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 1),
239 SUNXI_FUNCTION(0x0, "gpio_in"),
240 SUNXI_FUNCTION(0x1, "gpio_out"),
241 SUNXI_FUNCTION(0x2, "emac")), /* RXD2 */
242 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 2),
243 SUNXI_FUNCTION(0x0, "gpio_in"),
244 SUNXI_FUNCTION(0x1, "gpio_out"),
245 SUNXI_FUNCTION(0x2, "emac")), /* RXD1 */
246 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 3),
247 SUNXI_FUNCTION(0x0, "gpio_in"),
248 SUNXI_FUNCTION(0x1, "gpio_out"),
249 SUNXI_FUNCTION(0x2, "emac")), /* RXD0 */
250 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 4),
251 SUNXI_FUNCTION(0x0, "gpio_in"),
252 SUNXI_FUNCTION(0x1, "gpio_out"),
253 SUNXI_FUNCTION(0x2, "emac")), /* RXCK */
254 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 5),
255 SUNXI_FUNCTION(0x0, "gpio_in"),
256 SUNXI_FUNCTION(0x1, "gpio_out"),
257 SUNXI_FUNCTION(0x2, "emac")), /* RXCTL/RXDV */
258 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 6),
259 SUNXI_FUNCTION(0x0, "gpio_in"),
260 SUNXI_FUNCTION(0x1, "gpio_out"),
261 SUNXI_FUNCTION(0x2, "emac")), /* RXERR */
262 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 7),
263 SUNXI_FUNCTION(0x0, "gpio_in"),
264 SUNXI_FUNCTION(0x1, "gpio_out"),
265 SUNXI_FUNCTION(0x2, "emac")), /* TXD3 */
266 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 8),
267 SUNXI_FUNCTION(0x0, "gpio_in"),
268 SUNXI_FUNCTION(0x1, "gpio_out"),
269 SUNXI_FUNCTION(0x2, "emac")), /* TXD2 */
270 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 9),
271 SUNXI_FUNCTION(0x0, "gpio_in"),
272 SUNXI_FUNCTION(0x1, "gpio_out"),
273 SUNXI_FUNCTION(0x2, "emac")), /* TXD1 */
274 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 10),
275 SUNXI_FUNCTION(0x0, "gpio_in"),
276 SUNXI_FUNCTION(0x1, "gpio_out"),
277 SUNXI_FUNCTION(0x2, "emac")), /* TXD0 */
278 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 11),
279 SUNXI_FUNCTION(0x0, "gpio_in"),
280 SUNXI_FUNCTION(0x1, "gpio_out"),
281 SUNXI_FUNCTION(0x2, "emac")), /* CRS */
282 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 12),
283 SUNXI_FUNCTION(0x0, "gpio_in"),
284 SUNXI_FUNCTION(0x1, "gpio_out"),
285 SUNXI_FUNCTION(0x2, "emac")), /* TXCK */
286 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 13),
287 SUNXI_FUNCTION(0x0, "gpio_in"),
288 SUNXI_FUNCTION(0x1, "gpio_out"),
289 SUNXI_FUNCTION(0x2, "emac")), /* TXCTL/TXEN */
290 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 14),
291 SUNXI_FUNCTION(0x0, "gpio_in"),
292 SUNXI_FUNCTION(0x1, "gpio_out"),
293 SUNXI_FUNCTION(0x2, "emac")), /* TXERR */
294 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 15),
295 SUNXI_FUNCTION(0x0, "gpio_in"),
296 SUNXI_FUNCTION(0x1, "gpio_out"),
297 SUNXI_FUNCTION(0x2, "emac")), /* CLKIN/COL */
298 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 16),
299 SUNXI_FUNCTION(0x0, "gpio_in"),
300 SUNXI_FUNCTION(0x1, "gpio_out"),
301 SUNXI_FUNCTION(0x2, "emac")), /* MDC */
302 SUNXI_PIN(SUNXI_PINCTRL_PIN(D, 17),
303 SUNXI_FUNCTION(0x0, "gpio_in"),
304 SUNXI_FUNCTION(0x1, "gpio_out"),
305 SUNXI_FUNCTION(0x2, "emac")), /* MDIO */
306 /* Hole */
307 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 0),
308 SUNXI_FUNCTION(0x0, "gpio_in"),
309 SUNXI_FUNCTION(0x1, "gpio_out"),
310 SUNXI_FUNCTION(0x2, "csi"), /* PCLK */
311 SUNXI_FUNCTION(0x3, "ts")), /* CLK */
312 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 1),
313 SUNXI_FUNCTION(0x0, "gpio_in"),
314 SUNXI_FUNCTION(0x1, "gpio_out"),
315 SUNXI_FUNCTION(0x2, "csi"), /* MCLK */
316 SUNXI_FUNCTION(0x3, "ts")), /* ERR */
317 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 2),
318 SUNXI_FUNCTION(0x0, "gpio_in"),
319 SUNXI_FUNCTION(0x1, "gpio_out"),
320 SUNXI_FUNCTION(0x2, "csi"), /* HSYNC */
321 SUNXI_FUNCTION(0x3, "ts")), /* SYNC */
322 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 3),
323 SUNXI_FUNCTION(0x0, "gpio_in"),
324 SUNXI_FUNCTION(0x1, "gpio_out"),
325 SUNXI_FUNCTION(0x2, "csi"), /* VSYNC */
326 SUNXI_FUNCTION(0x3, "ts")), /* DVLD */
327 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 4),
328 SUNXI_FUNCTION(0x0, "gpio_in"),
329 SUNXI_FUNCTION(0x1, "gpio_out"),
330 SUNXI_FUNCTION(0x2, "csi"), /* D0 */
331 SUNXI_FUNCTION(0x3, "ts")), /* D0 */
332 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 5),
333 SUNXI_FUNCTION(0x0, "gpio_in"),
334 SUNXI_FUNCTION(0x1, "gpio_out"),
335 SUNXI_FUNCTION(0x2, "csi"), /* D1 */
336 SUNXI_FUNCTION(0x3, "ts")), /* D1 */
337 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 6),
338 SUNXI_FUNCTION(0x0, "gpio_in"),
339 SUNXI_FUNCTION(0x1, "gpio_out"),
340 SUNXI_FUNCTION(0x2, "csi"), /* D2 */
341 SUNXI_FUNCTION(0x3, "ts")), /* D2 */
342 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 7),
343 SUNXI_FUNCTION(0x0, "gpio_in"),
344 SUNXI_FUNCTION(0x1, "gpio_out"),
345 SUNXI_FUNCTION(0x2, "csi"), /* D3 */
346 SUNXI_FUNCTION(0x3, "ts")), /* D3 */
347 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 8),
348 SUNXI_FUNCTION(0x0, "gpio_in"),
349 SUNXI_FUNCTION(0x1, "gpio_out"),
350 SUNXI_FUNCTION(0x2, "csi"), /* D4 */
351 SUNXI_FUNCTION(0x3, "ts")), /* D4 */
352 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 9),
353 SUNXI_FUNCTION(0x0, "gpio_in"),
354 SUNXI_FUNCTION(0x1, "gpio_out"),
355 SUNXI_FUNCTION(0x2, "csi"), /* D5 */
356 SUNXI_FUNCTION(0x3, "ts")), /* D5 */
357 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 10),
358 SUNXI_FUNCTION(0x0, "gpio_in"),
359 SUNXI_FUNCTION(0x1, "gpio_out"),
360 SUNXI_FUNCTION(0x2, "csi"), /* D6 */
361 SUNXI_FUNCTION(0x3, "ts")), /* D6 */
362 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 11),
363 SUNXI_FUNCTION(0x0, "gpio_in"),
364 SUNXI_FUNCTION(0x1, "gpio_out"),
365 SUNXI_FUNCTION(0x2, "csi"), /* D7 */
366 SUNXI_FUNCTION(0x3, "ts")), /* D7 */
367 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 12),
368 SUNXI_FUNCTION(0x0, "gpio_in"),
369 SUNXI_FUNCTION(0x1, "gpio_out"),
370 SUNXI_FUNCTION(0x2, "csi"), /* SCK */
371 SUNXI_FUNCTION(0x3, "i2c2")), /* SCK */
372 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 13),
373 SUNXI_FUNCTION(0x0, "gpio_in"),
374 SUNXI_FUNCTION(0x1, "gpio_out"),
375 SUNXI_FUNCTION(0x2, "csi"), /* SDA */
376 SUNXI_FUNCTION(0x3, "i2c2")), /* SDA */
377 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 14),
378 SUNXI_FUNCTION(0x0, "gpio_in"),
379 SUNXI_FUNCTION(0x1, "gpio_out")),
380 SUNXI_PIN(SUNXI_PINCTRL_PIN(E, 15),
381 SUNXI_FUNCTION(0x0, "gpio_in"),
382 SUNXI_FUNCTION(0x1, "gpio_out")),
383 /* Hole */
384 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 0),
385 SUNXI_FUNCTION(0x0, "gpio_in"),
386 SUNXI_FUNCTION(0x1, "gpio_out"),
387 SUNXI_FUNCTION(0x2, "mmc0"), /* D1 */
388 SUNXI_FUNCTION(0x3, "jtag")), /* MS */
389 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 1),
390 SUNXI_FUNCTION(0x0, "gpio_in"),
391 SUNXI_FUNCTION(0x1, "gpio_out"),
392 SUNXI_FUNCTION(0x2, "mmc0"), /* D0 */
393 SUNXI_FUNCTION(0x3, "jtag")), /* DI */
394 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 2),
395 SUNXI_FUNCTION(0x0, "gpio_in"),
396 SUNXI_FUNCTION(0x1, "gpio_out"),
397 SUNXI_FUNCTION(0x2, "mmc0"), /* CLK */
398 SUNXI_FUNCTION(0x3, "uart0")), /* TX */
399 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 3),
400 SUNXI_FUNCTION(0x0, "gpio_in"),
401 SUNXI_FUNCTION(0x1, "gpio_out"),
402 SUNXI_FUNCTION(0x2, "mmc0"), /* CMD */
403 SUNXI_FUNCTION(0x3, "jtag")), /* DO */
404 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 4),
405 SUNXI_FUNCTION(0x0, "gpio_in"),
406 SUNXI_FUNCTION(0x1, "gpio_out"),
407 SUNXI_FUNCTION(0x2, "mmc0"), /* D3 */
408 SUNXI_FUNCTION(0x3, "uart0")), /* RX */
409 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 5),
410 SUNXI_FUNCTION(0x0, "gpio_in"),
411 SUNXI_FUNCTION(0x1, "gpio_out"),
412 SUNXI_FUNCTION(0x2, "mmc0"), /* D2 */
413 SUNXI_FUNCTION(0x3, "jtag")), /* CK */
414 SUNXI_PIN(SUNXI_PINCTRL_PIN(F, 6),
415 SUNXI_FUNCTION(0x0, "gpio_in"),
416 SUNXI_FUNCTION(0x1, "gpio_out")),
417 /* Hole */
418 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 0),
419 SUNXI_FUNCTION(0x0, "gpio_in"),
420 SUNXI_FUNCTION(0x1, "gpio_out"),
421 SUNXI_FUNCTION(0x2, "mmc1"), /* CLK */
422 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 0)), /* PG_EINT0 */
423 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 1),
424 SUNXI_FUNCTION(0x0, "gpio_in"),
425 SUNXI_FUNCTION(0x1, "gpio_out"),
426 SUNXI_FUNCTION(0x2, "mmc1"), /* CMD */
427 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 1)), /* PG_EINT1 */
428 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 2),
429 SUNXI_FUNCTION(0x0, "gpio_in"),
430 SUNXI_FUNCTION(0x1, "gpio_out"),
431 SUNXI_FUNCTION(0x2, "mmc1"), /* D0 */
432 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 2)), /* PG_EINT2 */
433 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 3),
434 SUNXI_FUNCTION(0x0, "gpio_in"),
435 SUNXI_FUNCTION(0x1, "gpio_out"),
436 SUNXI_FUNCTION(0x2, "mmc1"), /* D1 */
437 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 3)), /* PG_EINT3 */
438 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 4),
439 SUNXI_FUNCTION(0x0, "gpio_in"),
440 SUNXI_FUNCTION(0x1, "gpio_out"),
441 SUNXI_FUNCTION(0x2, "mmc1"), /* D2 */
442 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 4)), /* PG_EINT4 */
443 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 5),
444 SUNXI_FUNCTION(0x0, "gpio_in"),
445 SUNXI_FUNCTION(0x1, "gpio_out"),
446 SUNXI_FUNCTION(0x2, "mmc1"), /* D3 */
447 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 5)), /* PG_EINT5 */
448 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 6),
449 SUNXI_FUNCTION(0x0, "gpio_in"),
450 SUNXI_FUNCTION(0x1, "gpio_out"),
451 SUNXI_FUNCTION(0x2, "uart1"), /* TX */
452 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 6)), /* PG_EINT6 */
453 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 7),
454 SUNXI_FUNCTION(0x0, "gpio_in"),
455 SUNXI_FUNCTION(0x1, "gpio_out"),
456 SUNXI_FUNCTION(0x2, "uart1"), /* RX */
457 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 7)), /* PG_EINT7 */
458 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 8),
459 SUNXI_FUNCTION(0x0, "gpio_in"),
460 SUNXI_FUNCTION(0x1, "gpio_out"),
461 SUNXI_FUNCTION(0x2, "uart1"), /* RTS */
462 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 8)), /* PG_EINT8 */
463 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 9),
464 SUNXI_FUNCTION(0x0, "gpio_in"),
465 SUNXI_FUNCTION(0x1, "gpio_out"),
466 SUNXI_FUNCTION(0x2, "uart1"), /* CTS */
467 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 9)), /* PG_EINT9 */
468 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 10),
469 SUNXI_FUNCTION(0x0, "gpio_in"),
470 SUNXI_FUNCTION(0x1, "gpio_out"),
471 SUNXI_FUNCTION(0x2, "i2s1"), /* SYNC */
472 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 10)), /* PG_EINT10 */
473 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 11),
474 SUNXI_FUNCTION(0x0, "gpio_in"),
475 SUNXI_FUNCTION(0x1, "gpio_out"),
476 SUNXI_FUNCTION(0x2, "i2s1"), /* CLK */
477 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 11)), /* PG_EINT11 */
478 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 12),
479 SUNXI_FUNCTION(0x0, "gpio_in"),
480 SUNXI_FUNCTION(0x1, "gpio_out"),
481 SUNXI_FUNCTION(0x2, "i2s1"), /* DOUT */
482 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 12)), /* PG_EINT12 */
483 SUNXI_PIN(SUNXI_PINCTRL_PIN(G, 13),
484 SUNXI_FUNCTION(0x0, "gpio_in"),
485 SUNXI_FUNCTION(0x1, "gpio_out"),
486 SUNXI_FUNCTION(0x2, "i2s1"), /* DIN */
487 SUNXI_FUNCTION_IRQ_BANK(0x6, 1, 13)), /* PG_EINT13 */
488};
489
490static const struct sunxi_pinctrl_desc sun8i_h3_pinctrl_data = {
491 .pins = sun8i_h3_pins,
492 .npins = ARRAY_SIZE(sun8i_h3_pins),
493 .irq_banks = 2,
111f2b87 494 .irq_read_needs_mux = true
e87623cb
JK		 495};
496
497static int sun8i_h3_pinctrl_probe(struct platform_device *pdev)
498{
499 return sunxi_pinctrl_init(pdev,
500 &sun8i_h3_pinctrl_data);
501}
502
503static const struct of_device_id sun8i_h3_pinctrl_match[] = {
504 { .compatible = "allwinner,sun8i-h3-pinctrl", },
505 {}
506};
507
508static struct platform_driver sun8i_h3_pinctrl_driver = {
509 .probe = sun8i_h3_pinctrl_probe,
510 .driver = {
511 .name = "sun8i-h3-pinctrl",
512 .of_match_table = sun8i_h3_pinctrl_match,
513 },
514};
515builtin_platform_driver(sun8i_h3_pinctrl_driver);
Linux kernel - Deliverables
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