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powercap / RAPL: add support for CPU model 0x3f
[deliverable/linux.git] / drivers / powercap / intel_rapl.c
CommitLineData
2d281d81
JP		 1/*
2 * Intel Running Average Power Limit (RAPL) Driver
3 * Copyright (c) 2013, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.
16 *
17 */
18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/list.h>
23#include <linux/types.h>
24#include <linux/device.h>
25#include <linux/slab.h>
26#include <linux/log2.h>
27#include <linux/bitmap.h>
28#include <linux/delay.h>
29#include <linux/sysfs.h>
30#include <linux/cpu.h>
31#include <linux/powercap.h>
32
33#include <asm/processor.h>
34#include <asm/cpu_device_id.h>
35
36/* bitmasks for RAPL MSRs, used by primitive access functions */
37#define ENERGY_STATUS_MASK 0xffffffff
38
39#define POWER_LIMIT1_MASK 0x7FFF
40#define POWER_LIMIT1_ENABLE BIT(15)
41#define POWER_LIMIT1_CLAMP BIT(16)
42
43#define POWER_LIMIT2_MASK (0x7FFFULL<<32)
44#define POWER_LIMIT2_ENABLE BIT_ULL(47)
45#define POWER_LIMIT2_CLAMP BIT_ULL(48)
46#define POWER_PACKAGE_LOCK BIT_ULL(63)
47#define POWER_PP_LOCK BIT(31)
48
49#define TIME_WINDOW1_MASK (0x7FULL<<17)
50#define TIME_WINDOW2_MASK (0x7FULL<<49)
51
52#define POWER_UNIT_OFFSET 0
53#define POWER_UNIT_MASK 0x0F
54
55#define ENERGY_UNIT_OFFSET 0x08
56#define ENERGY_UNIT_MASK 0x1F00
57
58#define TIME_UNIT_OFFSET 0x10
59#define TIME_UNIT_MASK 0xF0000
60
61#define POWER_INFO_MAX_MASK (0x7fffULL<<32)
62#define POWER_INFO_MIN_MASK (0x7fffULL<<16)
63#define POWER_INFO_MAX_TIME_WIN_MASK (0x3fULL<<48)
64#define POWER_INFO_THERMAL_SPEC_MASK 0x7fff
65
66#define PERF_STATUS_THROTTLE_TIME_MASK 0xffffffff
67#define PP_POLICY_MASK 0x1F
68
69/* Non HW constants */
70#define RAPL_PRIMITIVE_DERIVED BIT(1) /* not from raw data */
71#define RAPL_PRIMITIVE_DUMMY BIT(2)
72
73/* scale RAPL units to avoid floating point math inside kernel */
74#define POWER_UNIT_SCALE (1000000)
75#define ENERGY_UNIT_SCALE (1000000)
76#define TIME_UNIT_SCALE (1000000)
77
78#define TIME_WINDOW_MAX_MSEC 40000
79#define TIME_WINDOW_MIN_MSEC 250
80
81enum unit_type {
82 ARBITRARY_UNIT, /* no translation */
83 POWER_UNIT,
84 ENERGY_UNIT,
85 TIME_UNIT,
86};
87
88enum rapl_domain_type {
89 RAPL_DOMAIN_PACKAGE, /* entire package/socket */
90 RAPL_DOMAIN_PP0, /* core power plane */
91 RAPL_DOMAIN_PP1, /* graphics uncore */
92 RAPL_DOMAIN_DRAM,/* DRAM control_type */
93 RAPL_DOMAIN_MAX,
94};
95
96enum rapl_domain_msr_id {
97 RAPL_DOMAIN_MSR_LIMIT,
98 RAPL_DOMAIN_MSR_STATUS,
99 RAPL_DOMAIN_MSR_PERF,
100 RAPL_DOMAIN_MSR_POLICY,
101 RAPL_DOMAIN_MSR_INFO,
102 RAPL_DOMAIN_MSR_MAX,
103};
104
105/* per domain data, some are optional */
106enum rapl_primitives {
107 ENERGY_COUNTER,
108 POWER_LIMIT1,
109 POWER_LIMIT2,
110 FW_LOCK,
111
112 PL1_ENABLE, /* power limit 1, aka long term */
113 PL1_CLAMP, /* allow frequency to go below OS request */
114 PL2_ENABLE, /* power limit 2, aka short term, instantaneous */
115 PL2_CLAMP,
116
117 TIME_WINDOW1, /* long term */
118 TIME_WINDOW2, /* short term */
119 THERMAL_SPEC_POWER,
120 MAX_POWER,
121
122 MIN_POWER,
123 MAX_TIME_WINDOW,
124 THROTTLED_TIME,
125 PRIORITY_LEVEL,
126
127 /* below are not raw primitive data */
128 AVERAGE_POWER,
129 NR_RAPL_PRIMITIVES,
130};
131
132#define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2)
133
134/* Can be expanded to include events, etc.*/
135struct rapl_domain_data {
136 u64 primitives[NR_RAPL_PRIMITIVES];
137 unsigned long timestamp;
138};
139
140
141#define DOMAIN_STATE_INACTIVE BIT(0)
142#define DOMAIN_STATE_POWER_LIMIT_SET BIT(1)
143#define DOMAIN_STATE_BIOS_LOCKED BIT(2)
144
145#define NR_POWER_LIMITS (2)
146struct rapl_power_limit {
147 struct powercap_zone_constraint *constraint;
148 int prim_id; /* primitive ID used to enable */
149 struct rapl_domain *domain;
150 const char *name;
151};
152
153static const char pl1_name[] = "long_term";
154static const char pl2_name[] = "short_term";
155
156struct rapl_domain {
157 const char *name;
158 enum rapl_domain_type id;
159 int msrs[RAPL_DOMAIN_MSR_MAX];
160 struct powercap_zone power_zone;
161 struct rapl_domain_data rdd;
162 struct rapl_power_limit rpl[NR_POWER_LIMITS];
163 u64 attr_map; /* track capabilities */
164 unsigned int state;
165 int package_id;
166};
167#define power_zone_to_rapl_domain(_zone) \
168 container_of(_zone, struct rapl_domain, power_zone)
169
170
171/* Each physical package contains multiple domains, these are the common
172 * data across RAPL domains within a package.
173 */
174struct rapl_package {
175 unsigned int id; /* physical package/socket id */
176 unsigned int nr_domains;
177 unsigned long domain_map; /* bit map of active domains */
178 unsigned int power_unit_divisor;
179 unsigned int energy_unit_divisor;
180 unsigned int time_unit_divisor;
181 struct rapl_domain *domains; /* array of domains, sized at runtime */
182 struct powercap_zone *power_zone; /* keep track of parent zone */
183 int nr_cpus; /* active cpus on the package, topology info is lost during
184 * cpu hotplug. so we have to track ourselves.
185 */
186 unsigned long power_limit_irq; /* keep track of package power limit
187 * notify interrupt enable status.
188 */
189 struct list_head plist;
190};
191#define PACKAGE_PLN_INT_SAVED BIT(0)
192#define MAX_PRIM_NAME (32)
193
194/* per domain data. used to describe individual knobs such that access function
195 * can be consolidated into one instead of many inline functions.
196 */
197struct rapl_primitive_info {
198 const char *name;
199 u64 mask;
200 int shift;
201 enum rapl_domain_msr_id id;
202 enum unit_type unit;
203 u32 flag;
204};
205
206#define PRIMITIVE_INFO_INIT(p, m, s, i, u, f) { \
207 .name = #p, \
208 .mask = m, \
209 .shift = s, \
210 .id = i, \
211 .unit = u, \
212 .flag = f \
213 }
214
215static void rapl_init_domains(struct rapl_package *rp);
216static int rapl_read_data_raw(struct rapl_domain *rd,
217 enum rapl_primitives prim,
218 bool xlate, u64 *data);
219static int rapl_write_data_raw(struct rapl_domain *rd,
220 enum rapl_primitives prim,
221 unsigned long long value);
222static u64 rapl_unit_xlate(int package, enum unit_type type, u64 value,
223 int to_raw);
224static void package_power_limit_irq_save(int package_id);
225
226static LIST_HEAD(rapl_packages); /* guarded by CPU hotplug lock */
227
228static const char * const rapl_domain_names[] = {
229 "package",
230 "core",
231 "uncore",
232 "dram",
233};
234
235static struct powercap_control_type *control_type; /* PowerCap Controller */
236
237/* caller to ensure CPU hotplug lock is held */
238static struct rapl_package *find_package_by_id(int id)
239{
240 struct rapl_package *rp;
241
242 list_for_each_entry(rp, &rapl_packages, plist) {
243 if (rp->id == id)
244 return rp;
245 }
246
247 return NULL;
248}
249
250/* caller to ensure CPU hotplug lock is held */
251static int find_active_cpu_on_package(int package_id)
252{
253 int i;
254
255 for_each_online_cpu(i) {
256 if (topology_physical_package_id(i) == package_id)
257 return i;
258 }
259 /* all CPUs on this package are offline */
260
261 return -ENODEV;
262}
263
264/* caller must hold cpu hotplug lock */
265static void rapl_cleanup_data(void)
266{
267 struct rapl_package *p, *tmp;
268
269 list_for_each_entry_safe(p, tmp, &rapl_packages, plist) {
270 kfree(p->domains);
271 list_del(&p->plist);
272 kfree(p);
273 }
274}
275
276static int get_energy_counter(struct powercap_zone *power_zone, u64 *energy_raw)
277{
278 struct rapl_domain *rd;
279 u64 energy_now;
280
281 /* prevent CPU hotplug, make sure the RAPL domain does not go
282 * away while reading the counter.
283 */
284 get_online_cpus();
285 rd = power_zone_to_rapl_domain(power_zone);
286
287 if (!rapl_read_data_raw(rd, ENERGY_COUNTER, true, &energy_now)) {
288 *energy_raw = energy_now;
289 put_online_cpus();
290
291 return 0;
292 }
293 put_online_cpus();
294
295 return -EIO;
296}
297
298static int get_max_energy_counter(struct powercap_zone *pcd_dev, u64 *energy)
299{
300 *energy = rapl_unit_xlate(0, ENERGY_UNIT, ENERGY_STATUS_MASK, 0);
301 return 0;
302}
303
304static int release_zone(struct powercap_zone *power_zone)
305{
306 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
307 struct rapl_package *rp;
308
309 /* package zone is the last zone of a package, we can free
310 * memory here since all children has been unregistered.
311 */
312 if (rd->id == RAPL_DOMAIN_PACKAGE) {
313 rp = find_package_by_id(rd->package_id);
314 if (!rp) {
315 dev_warn(&power_zone->dev, "no package id %s\n",
316 rd->name);
317 return -ENODEV;
318 }
319 kfree(rd);
320 rp->domains = NULL;
321 }
322
323 return 0;
324
325}
326
327static int find_nr_power_limit(struct rapl_domain *rd)
328{
329 int i;
330
331 for (i = 0; i < NR_POWER_LIMITS; i++) {
332 if (rd->rpl[i].name == NULL)
333 break;
334 }
335
336 return i;
337}
338
339static int set_domain_enable(struct powercap_zone *power_zone, bool mode)
340{
341 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
342 int nr_powerlimit;
343
344 if (rd->state & DOMAIN_STATE_BIOS_LOCKED)
345 return -EACCES;
346 get_online_cpus();
347 nr_powerlimit = find_nr_power_limit(rd);
348 /* here we activate/deactivate the hardware for power limiting */
349 rapl_write_data_raw(rd, PL1_ENABLE, mode);
350 /* always enable clamp such that p-state can go below OS requested
351 * range. power capping priority over guranteed frequency.
352 */
353 rapl_write_data_raw(rd, PL1_CLAMP, mode);
354 /* some domains have pl2 */
355 if (nr_powerlimit > 1) {
356 rapl_write_data_raw(rd, PL2_ENABLE, mode);
357 rapl_write_data_raw(rd, PL2_CLAMP, mode);
358 }
359 put_online_cpus();
360
361 return 0;
362}
363
364static int get_domain_enable(struct powercap_zone *power_zone, bool *mode)
365{
366 struct rapl_domain *rd = power_zone_to_rapl_domain(power_zone);
367 u64 val;
368
369 if (rd->state & DOMAIN_STATE_BIOS_LOCKED) {
370 *mode = false;
371 return 0;
372 }
373 get_online_cpus();
374 if (rapl_read_data_raw(rd, PL1_ENABLE, true, &val)) {
375 put_online_cpus();
376 return -EIO;
377 }
378 *mode = val;
379 put_online_cpus();
380
381 return 0;
382}
383
384/* per RAPL domain ops, in the order of rapl_domain_type */
385static struct powercap_zone_ops zone_ops[] = {
386 /* RAPL_DOMAIN_PACKAGE */
387 {
388 .get_energy_uj = get_energy_counter,
389 .get_max_energy_range_uj = get_max_energy_counter,
390 .release = release_zone,
391 .set_enable = set_domain_enable,
392 .get_enable = get_domain_enable,
393 },
394 /* RAPL_DOMAIN_PP0 */
395 {
396 .get_energy_uj = get_energy_counter,
397 .get_max_energy_range_uj = get_max_energy_counter,
398 .release = release_zone,
399 .set_enable = set_domain_enable,
400 .get_enable = get_domain_enable,
401 },
402 /* RAPL_DOMAIN_PP1 */
403 {
404 .get_energy_uj = get_energy_counter,
405 .get_max_energy_range_uj = get_max_energy_counter,
406 .release = release_zone,
407 .set_enable = set_domain_enable,
408 .get_enable = get_domain_enable,
409 },
410 /* RAPL_DOMAIN_DRAM */
411 {
412 .get_energy_uj = get_energy_counter,
413 .get_max_energy_range_uj = get_max_energy_counter,
414 .release = release_zone,
415 .set_enable = set_domain_enable,
416 .get_enable = get_domain_enable,
417 },
418};
419
420static int set_power_limit(struct powercap_zone *power_zone, int id,
421 u64 power_limit)
422{
423 struct rapl_domain *rd;
424 struct rapl_package *rp;
425 int ret = 0;
426
427 get_online_cpus();
428 rd = power_zone_to_rapl_domain(power_zone);
429 rp = find_package_by_id(rd->package_id);
430 if (!rp) {
431 ret = -ENODEV;
432 goto set_exit;
433 }
434
435 if (rd->state & DOMAIN_STATE_BIOS_LOCKED) {
436 dev_warn(&power_zone->dev, "%s locked by BIOS, monitoring only\n",
437 rd->name);
438 ret = -EACCES;
439 goto set_exit;
440 }
441
442 switch (rd->rpl[id].prim_id) {
443 case PL1_ENABLE:
444 rapl_write_data_raw(rd, POWER_LIMIT1, power_limit);
445 break;
446 case PL2_ENABLE:
447 rapl_write_data_raw(rd, POWER_LIMIT2, power_limit);
448 break;
449 default:
450 ret = -EINVAL;
451 }
452 if (!ret)
453 package_power_limit_irq_save(rd->package_id);
454set_exit:
455 put_online_cpus();
456 return ret;
457}
458
459static int get_current_power_limit(struct powercap_zone *power_zone, int id,
460 u64 *data)
461{
462 struct rapl_domain *rd;
463 u64 val;
464 int prim;
465 int ret = 0;
466
467 get_online_cpus();
468 rd = power_zone_to_rapl_domain(power_zone);
469 switch (rd->rpl[id].prim_id) {
470 case PL1_ENABLE:
471 prim = POWER_LIMIT1;
472 break;
473 case PL2_ENABLE:
474 prim = POWER_LIMIT2;
475 break;
476 default:
477 put_online_cpus();
478 return -EINVAL;
479 }
480 if (rapl_read_data_raw(rd, prim, true, &val))
481 ret = -EIO;
482 else
483 *data = val;
484
485 put_online_cpus();
486
487 return ret;
488}
489
490static int set_time_window(struct powercap_zone *power_zone, int id,
491 u64 window)
492{
493 struct rapl_domain *rd;
494 int ret = 0;
495
496 get_online_cpus();
497 rd = power_zone_to_rapl_domain(power_zone);
498 switch (rd->rpl[id].prim_id) {
499 case PL1_ENABLE:
500 rapl_write_data_raw(rd, TIME_WINDOW1, window);
501 break;
502 case PL2_ENABLE:
503 rapl_write_data_raw(rd, TIME_WINDOW2, window);
504 break;
505 default:
506 ret = -EINVAL;
507 }
508 put_online_cpus();
509 return ret;
510}
511
512static int get_time_window(struct powercap_zone *power_zone, int id, u64 *data)
513{
514 struct rapl_domain *rd;
515 u64 val;
516 int ret = 0;
517
518 get_online_cpus();
519 rd = power_zone_to_rapl_domain(power_zone);
520 switch (rd->rpl[id].prim_id) {
521 case PL1_ENABLE:
522 ret = rapl_read_data_raw(rd, TIME_WINDOW1, true, &val);
523 break;
524 case PL2_ENABLE:
525 ret = rapl_read_data_raw(rd, TIME_WINDOW2, true, &val);
526 break;
527 default:
528 put_online_cpus();
529 return -EINVAL;
530 }
531 if (!ret)
532 *data = val;
533 put_online_cpus();
534
535 return ret;
536}
537
538static const char *get_constraint_name(struct powercap_zone *power_zone, int id)
539{
540 struct rapl_power_limit *rpl;
541 struct rapl_domain *rd;
542
543 rd = power_zone_to_rapl_domain(power_zone);
544 rpl = (struct rapl_power_limit *) &rd->rpl[id];
545
546 return rpl->name;
547}
548
549
550static int get_max_power(struct powercap_zone *power_zone, int id,
551 u64 *data)
552{
553 struct rapl_domain *rd;
554 u64 val;
555 int prim;
556 int ret = 0;
557
558 get_online_cpus();
559 rd = power_zone_to_rapl_domain(power_zone);
560 switch (rd->rpl[id].prim_id) {
561 case PL1_ENABLE:
562 prim = THERMAL_SPEC_POWER;
563 break;
564 case PL2_ENABLE:
565 prim = MAX_POWER;
566 break;
567 default:
568 put_online_cpus();
569 return -EINVAL;
570 }
571 if (rapl_read_data_raw(rd, prim, true, &val))
572 ret = -EIO;
573 else
574 *data = val;
575
576 put_online_cpus();
577
578 return ret;
579}
580
581static struct powercap_zone_constraint_ops constraint_ops = {
582 .set_power_limit_uw = set_power_limit,
583 .get_power_limit_uw = get_current_power_limit,
584 .set_time_window_us = set_time_window,
585 .get_time_window_us = get_time_window,
586 .get_max_power_uw = get_max_power,
587 .get_name = get_constraint_name,
588};
589
590/* called after domain detection and package level data are set */
591static void rapl_init_domains(struct rapl_package *rp)
592{
593 int i;
594 struct rapl_domain *rd = rp->domains;
595
596 for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
597 unsigned int mask = rp->domain_map & (1 << i);
598 switch (mask) {
599 case BIT(RAPL_DOMAIN_PACKAGE):
600 rd->name = rapl_domain_names[RAPL_DOMAIN_PACKAGE];
601 rd->id = RAPL_DOMAIN_PACKAGE;
602 rd->msrs[0] = MSR_PKG_POWER_LIMIT;
603 rd->msrs[1] = MSR_PKG_ENERGY_STATUS;
604 rd->msrs[2] = MSR_PKG_PERF_STATUS;
605 rd->msrs[3] = 0;
606 rd->msrs[4] = MSR_PKG_POWER_INFO;
607 rd->rpl[0].prim_id = PL1_ENABLE;
608 rd->rpl[0].name = pl1_name;
609 rd->rpl[1].prim_id = PL2_ENABLE;
610 rd->rpl[1].name = pl2_name;
611 break;
612 case BIT(RAPL_DOMAIN_PP0):
613 rd->name = rapl_domain_names[RAPL_DOMAIN_PP0];
614 rd->id = RAPL_DOMAIN_PP0;
615 rd->msrs[0] = MSR_PP0_POWER_LIMIT;
616 rd->msrs[1] = MSR_PP0_ENERGY_STATUS;
617 rd->msrs[2] = 0;
618 rd->msrs[3] = MSR_PP0_POLICY;
619 rd->msrs[4] = 0;
620 rd->rpl[0].prim_id = PL1_ENABLE;
621 rd->rpl[0].name = pl1_name;
622 break;
623 case BIT(RAPL_DOMAIN_PP1):
624 rd->name = rapl_domain_names[RAPL_DOMAIN_PP1];
625 rd->id = RAPL_DOMAIN_PP1;
626 rd->msrs[0] = MSR_PP1_POWER_LIMIT;
627 rd->msrs[1] = MSR_PP1_ENERGY_STATUS;
628 rd->msrs[2] = 0;
629 rd->msrs[3] = MSR_PP1_POLICY;
630 rd->msrs[4] = 0;
631 rd->rpl[0].prim_id = PL1_ENABLE;
632 rd->rpl[0].name = pl1_name;
633 break;
634 case BIT(RAPL_DOMAIN_DRAM):
635 rd->name = rapl_domain_names[RAPL_DOMAIN_DRAM];
636 rd->id = RAPL_DOMAIN_DRAM;
637 rd->msrs[0] = MSR_DRAM_POWER_LIMIT;
638 rd->msrs[1] = MSR_DRAM_ENERGY_STATUS;
639 rd->msrs[2] = MSR_DRAM_PERF_STATUS;
640 rd->msrs[3] = 0;
641 rd->msrs[4] = MSR_DRAM_POWER_INFO;
642 rd->rpl[0].prim_id = PL1_ENABLE;
643 rd->rpl[0].name = pl1_name;
644 break;
645 }
646 if (mask) {
647 rd->package_id = rp->id;
648 rd++;
649 }
650 }
651}
652
653static u64 rapl_unit_xlate(int package, enum unit_type type, u64 value,
654 int to_raw)
655{
656 u64 divisor = 1;
657 int scale = 1; /* scale to user friendly data without floating point */
658 u64 f, y; /* fraction and exp. used for time unit */
659 struct rapl_package *rp;
660
661 rp = find_package_by_id(package);
662 if (!rp)
663 return value;
664
665 switch (type) {
666 case POWER_UNIT:
667 divisor = rp->power_unit_divisor;
668 scale = POWER_UNIT_SCALE;
669 break;
670 case ENERGY_UNIT:
671 scale = ENERGY_UNIT_SCALE;
672 divisor = rp->energy_unit_divisor;
673 break;
674 case TIME_UNIT:
675 divisor = rp->time_unit_divisor;
676 scale = TIME_UNIT_SCALE;
677 /* special processing based on 2^Y*(1+F)/4 = val/divisor, refer
678 * to Intel Software Developer's manual Vol. 3a, CH 14.7.4.
679 */
680 if (!to_raw) {
681 f = (value & 0x60) >> 5;
682 y = value & 0x1f;
683 value = (1 << y) * (4 + f) * scale / 4;
684 return div64_u64(value, divisor);
685 } else {
686 do_div(value, scale);
687 value *= divisor;
688 y = ilog2(value);
689 f = div64_u64(4 * (value - (1 << y)), 1 << y);
690 value = (y & 0x1f) | ((f & 0x3) << 5);
691 return value;
692 }
693 break;
694 case ARBITRARY_UNIT:
695 default:
696 return value;
697 };
698
699 if (to_raw)
700 return div64_u64(value * divisor, scale);
701 else
702 return div64_u64(value * scale, divisor);
703}
704
705/* in the order of enum rapl_primitives */
706static struct rapl_primitive_info rpi[] = {
707 /* name, mask, shift, msr index, unit divisor */
708 PRIMITIVE_INFO_INIT(ENERGY_COUNTER, ENERGY_STATUS_MASK, 0,
709 RAPL_DOMAIN_MSR_STATUS, ENERGY_UNIT, 0),
710 PRIMITIVE_INFO_INIT(POWER_LIMIT1, POWER_LIMIT1_MASK, 0,
711 RAPL_DOMAIN_MSR_LIMIT, POWER_UNIT, 0),
712 PRIMITIVE_INFO_INIT(POWER_LIMIT2, POWER_LIMIT2_MASK, 32,
713 RAPL_DOMAIN_MSR_LIMIT, POWER_UNIT, 0),
714 PRIMITIVE_INFO_INIT(FW_LOCK, POWER_PP_LOCK, 31,
715 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
716 PRIMITIVE_INFO_INIT(PL1_ENABLE, POWER_LIMIT1_ENABLE, 15,
717 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
718 PRIMITIVE_INFO_INIT(PL1_CLAMP, POWER_LIMIT1_CLAMP, 16,
719 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
720 PRIMITIVE_INFO_INIT(PL2_ENABLE, POWER_LIMIT2_ENABLE, 47,
721 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
722 PRIMITIVE_INFO_INIT(PL2_CLAMP, POWER_LIMIT2_CLAMP, 48,
723 RAPL_DOMAIN_MSR_LIMIT, ARBITRARY_UNIT, 0),
724 PRIMITIVE_INFO_INIT(TIME_WINDOW1, TIME_WINDOW1_MASK, 17,
725 RAPL_DOMAIN_MSR_LIMIT, TIME_UNIT, 0),
726 PRIMITIVE_INFO_INIT(TIME_WINDOW2, TIME_WINDOW2_MASK, 49,
727 RAPL_DOMAIN_MSR_LIMIT, TIME_UNIT, 0),
728 PRIMITIVE_INFO_INIT(THERMAL_SPEC_POWER, POWER_INFO_THERMAL_SPEC_MASK,
729 0, RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0),
730 PRIMITIVE_INFO_INIT(MAX_POWER, POWER_INFO_MAX_MASK, 32,
731 RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0),
732 PRIMITIVE_INFO_INIT(MIN_POWER, POWER_INFO_MIN_MASK, 16,
733 RAPL_DOMAIN_MSR_INFO, POWER_UNIT, 0),
734 PRIMITIVE_INFO_INIT(MAX_TIME_WINDOW, POWER_INFO_MAX_TIME_WIN_MASK, 48,
735 RAPL_DOMAIN_MSR_INFO, TIME_UNIT, 0),
736 PRIMITIVE_INFO_INIT(THROTTLED_TIME, PERF_STATUS_THROTTLE_TIME_MASK, 0,
737 RAPL_DOMAIN_MSR_PERF, TIME_UNIT, 0),
738 PRIMITIVE_INFO_INIT(PRIORITY_LEVEL, PP_POLICY_MASK, 0,
739 RAPL_DOMAIN_MSR_POLICY, ARBITRARY_UNIT, 0),
740 /* non-hardware */
741 PRIMITIVE_INFO_INIT(AVERAGE_POWER, 0, 0, 0, POWER_UNIT,
742 RAPL_PRIMITIVE_DERIVED),
743 {NULL, 0, 0, 0},
744};
745
746/* Read primitive data based on its related struct rapl_primitive_info.
747 * if xlate flag is set, return translated data based on data units, i.e.
748 * time, energy, and power.
749 * RAPL MSRs are non-architectual and are laid out not consistently across
750 * domains. Here we use primitive info to allow writing consolidated access
751 * functions.
752 * For a given primitive, it is processed by MSR mask and shift. Unit conversion
753 * is pre-assigned based on RAPL unit MSRs read at init time.
754 * 63-------------------------- 31--------------------------- 0
755 * | xxxxx (mask) |
756 * | |<- shift ----------------|
757 * 63-------------------------- 31--------------------------- 0
758 */
759static int rapl_read_data_raw(struct rapl_domain *rd,
760 enum rapl_primitives prim,
761 bool xlate, u64 *data)
762{
763 u64 value, final;
764 u32 msr;
765 struct rapl_primitive_info *rp = &rpi[prim];
766 int cpu;
767
768 if (!rp->name || rp->flag & RAPL_PRIMITIVE_DUMMY)
769 return -EINVAL;
770
771 msr = rd->msrs[rp->id];
772 if (!msr)
773 return -EINVAL;
774 /* use physical package id to look up active cpus */
775 cpu = find_active_cpu_on_package(rd->package_id);
776 if (cpu < 0)
777 return cpu;
778
779 /* special-case package domain, which uses a different bit*/
780 if (prim == FW_LOCK && rd->id == RAPL_DOMAIN_PACKAGE) {
781 rp->mask = POWER_PACKAGE_LOCK;
782 rp->shift = 63;
783 }
784 /* non-hardware data are collected by the polling thread */
785 if (rp->flag & RAPL_PRIMITIVE_DERIVED) {
786 *data = rd->rdd.primitives[prim];
787 return 0;
788 }
789
790 if (rdmsrl_safe_on_cpu(cpu, msr, &value)) {
791 pr_debug("failed to read msr 0x%x on cpu %d\n", msr, cpu);
792 return -EIO;
793 }
794
795 final = value & rp->mask;
796 final = final >> rp->shift;
797 if (xlate)
798 *data = rapl_unit_xlate(rd->package_id, rp->unit, final, 0);
799 else
800 *data = final;
801
802 return 0;
803}
804
805/* Similar use of primitive info in the read counterpart */
806static int rapl_write_data_raw(struct rapl_domain *rd,
807 enum rapl_primitives prim,
808 unsigned long long value)
809{
810 u64 msr_val;
811 u32 msr;
812 struct rapl_primitive_info *rp = &rpi[prim];
813 int cpu;
814
815 cpu = find_active_cpu_on_package(rd->package_id);
816 if (cpu < 0)
817 return cpu;
818 msr = rd->msrs[rp->id];
819 if (rdmsrl_safe_on_cpu(cpu, msr, &msr_val)) {
820 dev_dbg(&rd->power_zone.dev,
821 "failed to read msr 0x%x on cpu %d\n", msr, cpu);
822 return -EIO;
823 }
824 value = rapl_unit_xlate(rd->package_id, rp->unit, value, 1);
825 msr_val &= ~rp->mask;
826 msr_val |= value << rp->shift;
827 if (wrmsrl_safe_on_cpu(cpu, msr, msr_val)) {
828 dev_dbg(&rd->power_zone.dev,
829 "failed to write msr 0x%x on cpu %d\n", msr, cpu);
830 return -EIO;
831 }
832
833 return 0;
834}
835
ed93b714 836static const struct x86_cpu_id energy_unit_quirk_ids[] = {
d6b2e6d0 837 { X86_VENDOR_INTEL, 6, 0x37},/* Valleyview */
ed93b714
JP		 838 {}
839};
840
2d281d81
JP		 841static int rapl_check_unit(struct rapl_package *rp, int cpu)
842{
843 u64 msr_val;
844 u32 value;
845
846 if (rdmsrl_safe_on_cpu(cpu, MSR_RAPL_POWER_UNIT, &msr_val)) {
847 pr_err("Failed to read power unit MSR 0x%x on CPU %d, exit.\n",
848 MSR_RAPL_POWER_UNIT, cpu);
849 return -ENODEV;
850 }
851
852 /* Raw RAPL data stored in MSRs are in certain scales. We need to
853 * convert them into standard units based on the divisors reported in
854 * the RAPL unit MSRs.
855 * i.e.
856 * energy unit: 1/enery_unit_divisor Joules
857 * power unit: 1/power_unit_divisor Watts
858 * time unit: 1/time_unit_divisor Seconds
859 */
860 value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
ed93b714
JP		 861 /* some CPUs have different way to calculate energy unit */
862 if (x86_match_cpu(energy_unit_quirk_ids))
863 rp->energy_unit_divisor = 1000000 / (1 << value);
864 else
865 rp->energy_unit_divisor = 1 << value;
2d281d81
JP		 866
867 value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
868 rp->power_unit_divisor = 1 << value;
869
870 value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
871 rp->time_unit_divisor = 1 << value;
872
873 pr_debug("Physical package %d units: energy=%d, time=%d, power=%d\n",
874 rp->id,
875 rp->energy_unit_divisor,
876 rp->time_unit_divisor,
877 rp->power_unit_divisor);
878
879 return 0;
880}
881
882/* REVISIT:
883 * When package power limit is set artificially low by RAPL, LVT
884 * thermal interrupt for package power limit should be ignored
885 * since we are not really exceeding the real limit. The intention
886 * is to avoid excessive interrupts while we are trying to save power.
887 * A useful feature might be routing the package_power_limit interrupt
888 * to userspace via eventfd. once we have a usecase, this is simple
889 * to do by adding an atomic notifier.
890 */
891
892static void package_power_limit_irq_save(int package_id)
893{
894 u32 l, h = 0;
895 int cpu;
896 struct rapl_package *rp;
897
898 rp = find_package_by_id(package_id);
899 if (!rp)
900 return;
901
902 if (!boot_cpu_has(X86_FEATURE_PTS) || !boot_cpu_has(X86_FEATURE_PLN))
903 return;
904
905 cpu = find_active_cpu_on_package(package_id);
906 if (cpu < 0)
907 return;
908 /* save the state of PLN irq mask bit before disabling it */
909 rdmsr_safe_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
910 if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED)) {
911 rp->power_limit_irq = l & PACKAGE_THERM_INT_PLN_ENABLE;
912 rp->power_limit_irq |= PACKAGE_PLN_INT_SAVED;
913 }
914 l &= ~PACKAGE_THERM_INT_PLN_ENABLE;
915 wrmsr_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
916}
917
918/* restore per package power limit interrupt enable state */
919static void package_power_limit_irq_restore(int package_id)
920{
921 u32 l, h;
922 int cpu;
923 struct rapl_package *rp;
924
925 rp = find_package_by_id(package_id);
926 if (!rp)
927 return;
928
929 if (!boot_cpu_has(X86_FEATURE_PTS) || !boot_cpu_has(X86_FEATURE_PLN))
930 return;
931
932 cpu = find_active_cpu_on_package(package_id);
933 if (cpu < 0)
934 return;
935
936 /* irq enable state not saved, nothing to restore */
937 if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED))
938 return;
939 rdmsr_safe_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, &l, &h);
940
941 if (rp->power_limit_irq & PACKAGE_THERM_INT_PLN_ENABLE)
942 l |= PACKAGE_THERM_INT_PLN_ENABLE;
943 else
944 l &= ~PACKAGE_THERM_INT_PLN_ENABLE;
945
946 wrmsr_on_cpu(cpu, MSR_IA32_PACKAGE_THERM_INTERRUPT, l, h);
947}
948
949static const struct x86_cpu_id rapl_ids[] = {
d6b2e6d0
JP		 950 { X86_VENDOR_INTEL, 6, 0x2a},/* Sandy Bridge */
951 { X86_VENDOR_INTEL, 6, 0x2d},/* Sandy Bridge EP */
952 { X86_VENDOR_INTEL, 6, 0x37},/* Valleyview */
953 { X86_VENDOR_INTEL, 6, 0x3a},/* Ivy Bridge */
a97ac35b
JP		 954 { X86_VENDOR_INTEL, 6, 0x3c},/* Haswell */
955 { X86_VENDOR_INTEL, 6, 0x3d},/* Broadwell */
64c7569c 956 { X86_VENDOR_INTEL, 6, 0x3f},/* Haswell */
a97ac35b 957 { X86_VENDOR_INTEL, 6, 0x45},/* Haswell ULT */
2d281d81
JP		 958 /* TODO: Add more CPU IDs after testing */
959 {}
960};
961MODULE_DEVICE_TABLE(x86cpu, rapl_ids);
962
963/* read once for all raw primitive data for all packages, domains */
964static void rapl_update_domain_data(void)
965{
966 int dmn, prim;
967 u64 val;
968 struct rapl_package *rp;
969
970 list_for_each_entry(rp, &rapl_packages, plist) {
971 for (dmn = 0; dmn < rp->nr_domains; dmn++) {
972 pr_debug("update package %d domain %s data\n", rp->id,
973 rp->domains[dmn].name);
974 /* exclude non-raw primitives */
975 for (prim = 0; prim < NR_RAW_PRIMITIVES; prim++)
976 if (!rapl_read_data_raw(&rp->domains[dmn], prim,
977 rpi[prim].unit,
978 &val))
979 rp->domains[dmn].rdd.primitives[prim] =
980 val;
981 }
982 }
983
984}
985
986static int rapl_unregister_powercap(void)
987{
988 struct rapl_package *rp;
989 struct rapl_domain *rd, *rd_package = NULL;
990
991 /* unregister all active rapl packages from the powercap layer,
992 * hotplug lock held
993 */
994 list_for_each_entry(rp, &rapl_packages, plist) {
995 package_power_limit_irq_restore(rp->id);
996
997 for (rd = rp->domains; rd < rp->domains + rp->nr_domains;
998 rd++) {
999 pr_debug("remove package, undo power limit on %d: %s\n",
1000 rp->id, rd->name);
1001 rapl_write_data_raw(rd, PL1_ENABLE, 0);
1002 rapl_write_data_raw(rd, PL2_ENABLE, 0);
1003 rapl_write_data_raw(rd, PL1_CLAMP, 0);
1004 rapl_write_data_raw(rd, PL2_CLAMP, 0);
1005 if (rd->id == RAPL_DOMAIN_PACKAGE) {
1006 rd_package = rd;
1007 continue;
1008 }
1009 powercap_unregister_zone(control_type, &rd->power_zone);
1010 }
1011 /* do the package zone last */
1012 if (rd_package)
1013 powercap_unregister_zone(control_type,
1014 &rd_package->power_zone);
1015 }
1016 powercap_unregister_control_type(control_type);
1017
1018 return 0;
1019}
1020
1021static int rapl_package_register_powercap(struct rapl_package *rp)
1022{
1023 struct rapl_domain *rd;
1024 int ret = 0;
1025 char dev_name[17]; /* max domain name = 7 + 1 + 8 for int + 1 for null*/
1026 struct powercap_zone *power_zone = NULL;
1027 int nr_pl;
1028
1029 /* first we register package domain as the parent zone*/
1030 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
1031 if (rd->id == RAPL_DOMAIN_PACKAGE) {
1032 nr_pl = find_nr_power_limit(rd);
1033 pr_debug("register socket %d package domain %s\n",
1034 rp->id, rd->name);
1035 memset(dev_name, 0, sizeof(dev_name));
1036 snprintf(dev_name, sizeof(dev_name), "%s-%d",
1037 rd->name, rp->id);
1038 power_zone = powercap_register_zone(&rd->power_zone,
1039 control_type,
1040 dev_name, NULL,
1041 &zone_ops[rd->id],
1042 nr_pl,
1043 &constraint_ops);
1044 if (IS_ERR(power_zone)) {
1045 pr_debug("failed to register package, %d\n",
1046 rp->id);
1047 ret = PTR_ERR(power_zone);
1048 goto exit_package;
1049 }
1050 /* track parent zone in per package/socket data */
1051 rp->power_zone = power_zone;
1052 /* done, only one package domain per socket */
1053 break;
1054 }
1055 }
1056 if (!power_zone) {
1057 pr_err("no package domain found, unknown topology!\n");
1058 ret = -ENODEV;
1059 goto exit_package;
1060 }
1061 /* now register domains as children of the socket/package*/
1062 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
1063 if (rd->id == RAPL_DOMAIN_PACKAGE)
1064 continue;
1065 /* number of power limits per domain varies */
1066 nr_pl = find_nr_power_limit(rd);
1067 power_zone = powercap_register_zone(&rd->power_zone,
1068 control_type, rd->name,
1069 rp->power_zone,
1070 &zone_ops[rd->id], nr_pl,
1071 &constraint_ops);
1072
1073 if (IS_ERR(power_zone)) {
1074 pr_debug("failed to register power_zone, %d:%s:%s\n",
1075 rp->id, rd->name, dev_name);
1076 ret = PTR_ERR(power_zone);
1077 goto err_cleanup;
1078 }
1079 }
1080
1081exit_package:
1082 return ret;
1083err_cleanup:
1084 /* clean up previously initialized domains within the package if we
1085 * failed after the first domain setup.
1086 */
1087 while (--rd >= rp->domains) {
1088 pr_debug("unregister package %d domain %s\n", rp->id, rd->name);
1089 powercap_unregister_zone(control_type, &rd->power_zone);
1090 }
1091
1092 return ret;
1093}
1094
1095static int rapl_register_powercap(void)
1096{
1097 struct rapl_domain *rd;
1098 struct rapl_package *rp;
1099 int ret = 0;
1100
1101 control_type = powercap_register_control_type(NULL, "intel-rapl", NULL);
1102 if (IS_ERR(control_type)) {
1103 pr_debug("failed to register powercap control_type.\n");
1104 return PTR_ERR(control_type);
1105 }
1106 /* read the initial data */
1107 rapl_update_domain_data();
1108 list_for_each_entry(rp, &rapl_packages, plist)
1109 if (rapl_package_register_powercap(rp))
1110 goto err_cleanup_package;
1111 return ret;
1112
1113err_cleanup_package:
1114 /* clean up previously initialized packages */
1115 list_for_each_entry_continue_reverse(rp, &rapl_packages, plist) {
1116 for (rd = rp->domains; rd < rp->domains + rp->nr_domains;
1117 rd++) {
1118 pr_debug("unregister zone/package %d, %s domain\n",
1119 rp->id, rd->name);
1120 powercap_unregister_zone(control_type, &rd->power_zone);
1121 }
1122 }
1123
1124 return ret;
1125}
1126
1127static int rapl_check_domain(int cpu, int domain)
1128{
1129 unsigned msr;
9d31c676 1130 u64 val = 0;
2d281d81
JP		 1131
1132 switch (domain) {
1133 case RAPL_DOMAIN_PACKAGE:
1134 msr = MSR_PKG_ENERGY_STATUS;
1135 break;
1136 case RAPL_DOMAIN_PP0:
1137 msr = MSR_PP0_ENERGY_STATUS;
1138 break;
1139 case RAPL_DOMAIN_PP1:
1140 msr = MSR_PP1_ENERGY_STATUS;
1141 break;
1142 case RAPL_DOMAIN_DRAM:
1143 msr = MSR_DRAM_ENERGY_STATUS;
1144 break;
1145 default:
1146 pr_err("invalid domain id %d\n", domain);
1147 return -EINVAL;
1148 }
9d31c676
JP		 1149 /* make sure domain counters are available and contains non-zero
1150 * values, otherwise skip it.
7b874772 1151 */
9d31c676
JP		 1152 if (rdmsrl_safe_on_cpu(cpu, msr, &val) || !val)
1153 return -ENODEV;
2d281d81 1154
9d31c676 1155 return 0;
2d281d81
JP		 1156}
1157
1158/* Detect active and valid domains for the given CPU, caller must
1159 * ensure the CPU belongs to the targeted package and CPU hotlug is disabled.
1160 */
1161static int rapl_detect_domains(struct rapl_package *rp, int cpu)
1162{
1163 int i;
1164 int ret = 0;
1165 struct rapl_domain *rd;
1166 u64 locked;
1167
1168 for (i = 0; i < RAPL_DOMAIN_MAX; i++) {
1169 /* use physical package id to read counters */
1170 if (!rapl_check_domain(cpu, i))
1171 rp->domain_map |= 1 << i;
9d31c676
JP		 1172 else
1173 pr_warn("RAPL domain %s detection failed\n",
1174 rapl_domain_names[i]);
2d281d81
JP		 1175 }
1176 rp->nr_domains = bitmap_weight(&rp->domain_map, RAPL_DOMAIN_MAX);
1177 if (!rp->nr_domains) {
1178 pr_err("no valid rapl domains found in package %d\n", rp->id);
1179 ret = -ENODEV;
1180 goto done;
1181 }
1182 pr_debug("found %d domains on package %d\n", rp->nr_domains, rp->id);
1183
1184 rp->domains = kcalloc(rp->nr_domains + 1, sizeof(struct rapl_domain),
1185 GFP_KERNEL);
1186 if (!rp->domains) {
1187 ret = -ENOMEM;
1188 goto done;
1189 }
1190 rapl_init_domains(rp);
1191
1192 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
1193 /* check if the domain is locked by BIOS */
1194 if (rapl_read_data_raw(rd, FW_LOCK, false, &locked)) {
1195 pr_info("RAPL package %d domain %s locked by BIOS\n",
1196 rp->id, rd->name);
1197 rd->state |= DOMAIN_STATE_BIOS_LOCKED;
1198 }
1199 }
1200
1201
1202done:
1203 return ret;
1204}
1205
1206static bool is_package_new(int package)
1207{
1208 struct rapl_package *rp;
1209
1210 /* caller prevents cpu hotplug, there will be no new packages added
1211 * or deleted while traversing the package list, no need for locking.
1212 */
1213 list_for_each_entry(rp, &rapl_packages, plist)
1214 if (package == rp->id)
1215 return false;
1216
1217 return true;
1218}
1219
1220/* RAPL interface can be made of a two-level hierarchy: package level and domain
1221 * level. We first detect the number of packages then domains of each package.
1222 * We have to consider the possiblity of CPU online/offline due to hotplug and
1223 * other scenarios.
1224 */
1225static int rapl_detect_topology(void)
1226{
1227 int i;
1228 int phy_package_id;
1229 struct rapl_package *new_package, *rp;
1230
1231 for_each_online_cpu(i) {
1232 phy_package_id = topology_physical_package_id(i);
1233 if (is_package_new(phy_package_id)) {
1234 new_package = kzalloc(sizeof(*rp), GFP_KERNEL);
1235 if (!new_package) {
1236 rapl_cleanup_data();
1237 return -ENOMEM;
1238 }
1239 /* add the new package to the list */
1240 new_package->id = phy_package_id;
1241 new_package->nr_cpus = 1;
1242
1243 /* check if the package contains valid domains */
1244 if (rapl_detect_domains(new_package, i) ||
1245 rapl_check_unit(new_package, i)) {
1246 kfree(new_package->domains);
1247 kfree(new_package);
1248 /* free up the packages already initialized */
1249 rapl_cleanup_data();
1250 return -ENODEV;
1251 }
1252 INIT_LIST_HEAD(&new_package->plist);
1253 list_add(&new_package->plist, &rapl_packages);
1254 } else {
1255 rp = find_package_by_id(phy_package_id);
1256 if (rp)
1257 ++rp->nr_cpus;
1258 }
1259 }
1260
1261 return 0;
1262}
1263
1264/* called from CPU hotplug notifier, hotplug lock held */
1265static void rapl_remove_package(struct rapl_package *rp)
1266{
1267 struct rapl_domain *rd, *rd_package = NULL;
1268
1269 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) {
1270 if (rd->id == RAPL_DOMAIN_PACKAGE) {
1271 rd_package = rd;
1272 continue;
1273 }
1274 pr_debug("remove package %d, %s domain\n", rp->id, rd->name);
1275 powercap_unregister_zone(control_type, &rd->power_zone);
1276 }
1277 /* do parent zone last */
1278 powercap_unregister_zone(control_type, &rd_package->power_zone);
1279 list_del(&rp->plist);
1280 kfree(rp);
1281}
1282
1283/* called from CPU hotplug notifier, hotplug lock held */
1284static int rapl_add_package(int cpu)
1285{
1286 int ret = 0;
1287 int phy_package_id;
1288 struct rapl_package *rp;
1289
1290 phy_package_id = topology_physical_package_id(cpu);
1291 rp = kzalloc(sizeof(struct rapl_package), GFP_KERNEL);
1292 if (!rp)
1293 return -ENOMEM;
1294
1295 /* add the new package to the list */
1296 rp->id = phy_package_id;
1297 rp->nr_cpus = 1;
1298 /* check if the package contains valid domains */
1299 if (rapl_detect_domains(rp, cpu) ||
1300 rapl_check_unit(rp, cpu)) {
1301 ret = -ENODEV;
1302 goto err_free_package;
1303 }
1304 if (!rapl_package_register_powercap(rp)) {
1305 INIT_LIST_HEAD(&rp->plist);
1306 list_add(&rp->plist, &rapl_packages);
1307 return ret;
1308 }
1309
1310err_free_package:
1311 kfree(rp->domains);
1312 kfree(rp);
1313
1314 return ret;
1315}
1316
1317/* Handles CPU hotplug on multi-socket systems.
1318 * If a CPU goes online as the first CPU of the physical package
1319 * we add the RAPL package to the system. Similarly, when the last
1320 * CPU of the package is removed, we remove the RAPL package and its
1321 * associated domains. Cooling devices are handled accordingly at
1322 * per-domain level.
1323 */
1324static int rapl_cpu_callback(struct notifier_block *nfb,
1325 unsigned long action, void *hcpu)
1326{
1327 unsigned long cpu = (unsigned long)hcpu;
1328 int phy_package_id;
1329 struct rapl_package *rp;
1330
1331 phy_package_id = topology_physical_package_id(cpu);
1332 switch (action) {
1333 case CPU_ONLINE:
1334 case CPU_ONLINE_FROZEN:
1335 case CPU_DOWN_FAILED:
1336 case CPU_DOWN_FAILED_FROZEN:
1337 rp = find_package_by_id(phy_package_id);
1338 if (rp)
1339 ++rp->nr_cpus;
1340 else
1341 rapl_add_package(cpu);
1342 break;
1343 case CPU_DOWN_PREPARE:
1344 case CPU_DOWN_PREPARE_FROZEN:
1345 rp = find_package_by_id(phy_package_id);
1346 if (!rp)
1347 break;
1348 if (--rp->nr_cpus == 0)
1349 rapl_remove_package(rp);
1350 }
1351
1352 return NOTIFY_OK;
1353}
1354
1355static struct notifier_block rapl_cpu_notifier = {
1356 .notifier_call = rapl_cpu_callback,
1357};
1358
1359static int __init rapl_init(void)
1360{
1361 int ret = 0;
1362
1363 if (!x86_match_cpu(rapl_ids)) {
1364 pr_err("driver does not support CPU family %d model %d\n",
1365 boot_cpu_data.x86, boot_cpu_data.x86_model);
1366
1367 return -ENODEV;
1368 }
009f225e
SB		 1369
1370 cpu_notifier_register_begin();
1371
2d281d81
JP		 1372 /* prevent CPU hotplug during detection */
1373 get_online_cpus();
1374 ret = rapl_detect_topology();
1375 if (ret)
1376 goto done;
1377
1378 if (rapl_register_powercap()) {
1379 rapl_cleanup_data();
1380 ret = -ENODEV;
1381 goto done;
1382 }
009f225e 1383 __register_hotcpu_notifier(&rapl_cpu_notifier);
2d281d81
JP		 1384done:
1385 put_online_cpus();
009f225e 1386 cpu_notifier_register_done();
2d281d81
JP		 1387
1388 return ret;
1389}
1390
1391static void __exit rapl_exit(void)
1392{
009f225e 1393 cpu_notifier_register_begin();
2d281d81 1394 get_online_cpus();
009f225e 1395 __unregister_hotcpu_notifier(&rapl_cpu_notifier);
2d281d81
JP		 1396 rapl_unregister_powercap();
1397 rapl_cleanup_data();
1398 put_online_cpus();
009f225e 1399 cpu_notifier_register_done();
2d281d81
JP		 1400}
1401
1402module_init(rapl_init);
1403module_exit(rapl_exit);
1404
1405MODULE_DESCRIPTION("Driver for Intel RAPL (Running Average Power Limit)");
1406MODULE_AUTHOR("Jacob Pan <jacob.jun.pan@intel.com>");
1407MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
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