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c4a3e0a5 | 1 | /* |
3f1530c1 | 2 | * Linux MegaRAID driver for SAS based RAID controllers |
c4a3e0a5 | 3 | * |
ae59057b | 4 | * Copyright (c) 2003-2012 LSI Corporation. |
c4a3e0a5 | 5 | * |
3f1530c1 | 6 | * This program is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version 2 | |
9 | * of the License, or (at your option) any later version. | |
c4a3e0a5 | 10 | * |
3f1530c1 | 11 | * This program is distributed in the hope that it will be useful, |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
c4a3e0a5 | 15 | * |
3f1530c1 | 16 | * You should have received a copy of the GNU General Public License |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
c4a3e0a5 | 19 | * |
3f1530c1 | 20 | * FILE: megaraid_sas_base.c |
2b4857c3 | 21 | * Version : 06.700.06.00-rc1 |
c4a3e0a5 | 22 | * |
3f1530c1 | 23 | * Authors: LSI Corporation |
24 | * Sreenivas Bagalkote | |
25 | * Sumant Patro | |
26 | * Bo Yang | |
00fa2b19 | 27 | * Adam Radford <linuxraid@lsi.com> |
c4a3e0a5 | 28 | * |
3f1530c1 | 29 | * Send feedback to: <megaraidlinux@lsi.com> |
30 | * | |
31 | * Mail to: LSI Corporation, 1621 Barber Lane, Milpitas, CA 95035 | |
32 | * ATTN: Linuxraid | |
c4a3e0a5 BS |
33 | */ |
34 | ||
35 | #include <linux/kernel.h> | |
36 | #include <linux/types.h> | |
37 | #include <linux/pci.h> | |
38 | #include <linux/list.h> | |
c4a3e0a5 BS |
39 | #include <linux/moduleparam.h> |
40 | #include <linux/module.h> | |
41 | #include <linux/spinlock.h> | |
42 | #include <linux/interrupt.h> | |
43 | #include <linux/delay.h> | |
44 | #include <linux/uio.h> | |
5a0e3ad6 | 45 | #include <linux/slab.h> |
c4a3e0a5 | 46 | #include <asm/uaccess.h> |
43399236 | 47 | #include <linux/fs.h> |
c4a3e0a5 | 48 | #include <linux/compat.h> |
cf62a0a5 | 49 | #include <linux/blkdev.h> |
0b950672 | 50 | #include <linux/mutex.h> |
c3518837 | 51 | #include <linux/poll.h> |
c4a3e0a5 BS |
52 | |
53 | #include <scsi/scsi.h> | |
54 | #include <scsi/scsi_cmnd.h> | |
55 | #include <scsi/scsi_device.h> | |
56 | #include <scsi/scsi_host.h> | |
4bcde509 | 57 | #include <scsi/scsi_tcq.h> |
9c915a8c | 58 | #include "megaraid_sas_fusion.h" |
c4a3e0a5 BS |
59 | #include "megaraid_sas.h" |
60 | ||
1fd10685 YB |
61 | /* |
62 | * Number of sectors per IO command | |
63 | * Will be set in megasas_init_mfi if user does not provide | |
64 | */ | |
65 | static unsigned int max_sectors; | |
66 | module_param_named(max_sectors, max_sectors, int, 0); | |
67 | MODULE_PARM_DESC(max_sectors, | |
68 | "Maximum number of sectors per IO command"); | |
69 | ||
80d9da98 | 70 | static int msix_disable; |
71 | module_param(msix_disable, int, S_IRUGO); | |
72 | MODULE_PARM_DESC(msix_disable, "Disable MSI-X interrupt handling. Default: 0"); | |
73 | ||
079eaddf | 74 | static unsigned int msix_vectors; |
75 | module_param(msix_vectors, int, S_IRUGO); | |
76 | MODULE_PARM_DESC(msix_vectors, "MSI-X max vector count. Default: Set by FW"); | |
77 | ||
c5daa6a9 | 78 | static int throttlequeuedepth = MEGASAS_THROTTLE_QUEUE_DEPTH; |
79 | module_param(throttlequeuedepth, int, S_IRUGO); | |
80 | MODULE_PARM_DESC(throttlequeuedepth, | |
81 | "Adapter queue depth when throttled due to I/O timeout. Default: 16"); | |
82 | ||
c007b8b2 | 83 | int resetwaittime = MEGASAS_RESET_WAIT_TIME; |
84 | module_param(resetwaittime, int, S_IRUGO); | |
85 | MODULE_PARM_DESC(resetwaittime, "Wait time in seconds after I/O timeout " | |
86 | "before resetting adapter. Default: 180"); | |
87 | ||
c4a3e0a5 BS |
88 | MODULE_LICENSE("GPL"); |
89 | MODULE_VERSION(MEGASAS_VERSION); | |
3d6d174a | 90 | MODULE_AUTHOR("megaraidlinux@lsi.com"); |
f28cd7cf | 91 | MODULE_DESCRIPTION("LSI MegaRAID SAS Driver"); |
c4a3e0a5 | 92 | |
058a8fac | 93 | int megasas_transition_to_ready(struct megasas_instance *instance, int ocr); |
39a98554 | 94 | static int megasas_get_pd_list(struct megasas_instance *instance); |
21c9e160 | 95 | static int megasas_ld_list_query(struct megasas_instance *instance, |
96 | u8 query_type); | |
39a98554 | 97 | static int megasas_issue_init_mfi(struct megasas_instance *instance); |
98 | static int megasas_register_aen(struct megasas_instance *instance, | |
99 | u32 seq_num, u32 class_locale_word); | |
c4a3e0a5 BS |
100 | /* |
101 | * PCI ID table for all supported controllers | |
102 | */ | |
103 | static struct pci_device_id megasas_pci_table[] = { | |
104 | ||
f3d7271c HK |
105 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064R)}, |
106 | /* xscale IOP */ | |
107 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078R)}, | |
108 | /* ppc IOP */ | |
af7a5647 | 109 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)}, |
110 | /* ppc IOP */ | |
6610a6b3 YB |
111 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)}, |
112 | /* gen2*/ | |
113 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)}, | |
114 | /* gen2*/ | |
87911122 YB |
115 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)}, |
116 | /* skinny*/ | |
117 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)}, | |
118 | /* skinny*/ | |
f3d7271c HK |
119 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)}, |
120 | /* xscale IOP, vega */ | |
121 | {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)}, | |
122 | /* xscale IOP */ | |
9c915a8c | 123 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)}, |
124 | /* Fusion */ | |
36807e67 | 125 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INVADER)}, |
126 | /* Invader */ | |
21d3c710 SS |
127 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FURY)}, |
128 | /* Fury */ | |
f3d7271c | 129 | {} |
c4a3e0a5 BS |
130 | }; |
131 | ||
132 | MODULE_DEVICE_TABLE(pci, megasas_pci_table); | |
133 | ||
134 | static int megasas_mgmt_majorno; | |
135 | static struct megasas_mgmt_info megasas_mgmt_info; | |
136 | static struct fasync_struct *megasas_async_queue; | |
0b950672 | 137 | static DEFINE_MUTEX(megasas_async_queue_mutex); |
c4a3e0a5 | 138 | |
c3518837 YB |
139 | static int megasas_poll_wait_aen; |
140 | static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait); | |
72c4fd36 | 141 | static u32 support_poll_for_event; |
9c915a8c | 142 | u32 megasas_dbg_lvl; |
837f5fe8 | 143 | static u32 support_device_change; |
658dcedb | 144 | |
c3518837 YB |
145 | /* define lock for aen poll */ |
146 | spinlock_t poll_aen_lock; | |
147 | ||
9c915a8c | 148 | void |
7343eb65 | 149 | megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd, |
150 | u8 alt_status); | |
ebf054b0 | 151 | static u32 |
152 | megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs); | |
153 | static int | |
154 | megasas_adp_reset_gen2(struct megasas_instance *instance, | |
155 | struct megasas_register_set __iomem *reg_set); | |
cd50ba8e | 156 | static irqreturn_t megasas_isr(int irq, void *devp); |
157 | static u32 | |
158 | megasas_init_adapter_mfi(struct megasas_instance *instance); | |
159 | u32 | |
160 | megasas_build_and_issue_cmd(struct megasas_instance *instance, | |
161 | struct scsi_cmnd *scmd); | |
162 | static void megasas_complete_cmd_dpc(unsigned long instance_addr); | |
9c915a8c | 163 | void |
164 | megasas_release_fusion(struct megasas_instance *instance); | |
165 | int | |
166 | megasas_ioc_init_fusion(struct megasas_instance *instance); | |
167 | void | |
168 | megasas_free_cmds_fusion(struct megasas_instance *instance); | |
169 | u8 | |
170 | megasas_get_map_info(struct megasas_instance *instance); | |
171 | int | |
172 | megasas_sync_map_info(struct megasas_instance *instance); | |
173 | int | |
174 | wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd); | |
175 | void megasas_reset_reply_desc(struct megasas_instance *instance); | |
9c915a8c | 176 | int megasas_reset_fusion(struct Scsi_Host *shost); |
177 | void megasas_fusion_ocr_wq(struct work_struct *work); | |
cd50ba8e | 178 | |
179 | void | |
180 | megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd) | |
181 | { | |
182 | instance->instancet->fire_cmd(instance, | |
183 | cmd->frame_phys_addr, 0, instance->reg_set); | |
184 | } | |
7343eb65 | 185 | |
c4a3e0a5 BS |
186 | /** |
187 | * megasas_get_cmd - Get a command from the free pool | |
188 | * @instance: Adapter soft state | |
189 | * | |
190 | * Returns a free command from the pool | |
191 | */ | |
9c915a8c | 192 | struct megasas_cmd *megasas_get_cmd(struct megasas_instance |
c4a3e0a5 BS |
193 | *instance) |
194 | { | |
195 | unsigned long flags; | |
196 | struct megasas_cmd *cmd = NULL; | |
197 | ||
198 | spin_lock_irqsave(&instance->cmd_pool_lock, flags); | |
199 | ||
200 | if (!list_empty(&instance->cmd_pool)) { | |
201 | cmd = list_entry((&instance->cmd_pool)->next, | |
202 | struct megasas_cmd, list); | |
203 | list_del_init(&cmd->list); | |
204 | } else { | |
205 | printk(KERN_ERR "megasas: Command pool empty!\n"); | |
206 | } | |
207 | ||
208 | spin_unlock_irqrestore(&instance->cmd_pool_lock, flags); | |
209 | return cmd; | |
210 | } | |
211 | ||
212 | /** | |
213 | * megasas_return_cmd - Return a cmd to free command pool | |
214 | * @instance: Adapter soft state | |
215 | * @cmd: Command packet to be returned to free command pool | |
216 | */ | |
9c915a8c | 217 | inline void |
c4a3e0a5 BS |
218 | megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd) |
219 | { | |
220 | unsigned long flags; | |
221 | ||
222 | spin_lock_irqsave(&instance->cmd_pool_lock, flags); | |
223 | ||
224 | cmd->scmd = NULL; | |
9c915a8c | 225 | cmd->frame_count = 0; |
e5f93a36 | 226 | if ((instance->pdev->device != PCI_DEVICE_ID_LSI_FUSION) && |
227 | (instance->pdev->device != PCI_DEVICE_ID_LSI_INVADER) && | |
21d3c710 | 228 | (instance->pdev->device != PCI_DEVICE_ID_LSI_FURY) && |
e5f93a36 | 229 | (reset_devices)) |
230 | cmd->frame->hdr.cmd = MFI_CMD_INVALID; | |
c4a3e0a5 BS |
231 | list_add_tail(&cmd->list, &instance->cmd_pool); |
232 | ||
233 | spin_unlock_irqrestore(&instance->cmd_pool_lock, flags); | |
234 | } | |
235 | ||
1341c939 SP |
236 | |
237 | /** | |
0d49016b | 238 | * The following functions are defined for xscale |
1341c939 SP |
239 | * (deviceid : 1064R, PERC5) controllers |
240 | */ | |
241 | ||
c4a3e0a5 | 242 | /** |
1341c939 | 243 | * megasas_enable_intr_xscale - Enables interrupts |
c4a3e0a5 BS |
244 | * @regs: MFI register set |
245 | */ | |
246 | static inline void | |
d46a3ad6 | 247 | megasas_enable_intr_xscale(struct megasas_instance *instance) |
c4a3e0a5 | 248 | { |
d46a3ad6 SS |
249 | struct megasas_register_set __iomem *regs; |
250 | regs = instance->reg_set; | |
39a98554 | 251 | writel(0, &(regs)->outbound_intr_mask); |
c4a3e0a5 BS |
252 | |
253 | /* Dummy readl to force pci flush */ | |
254 | readl(®s->outbound_intr_mask); | |
255 | } | |
256 | ||
b274cab7 SP |
257 | /** |
258 | * megasas_disable_intr_xscale -Disables interrupt | |
259 | * @regs: MFI register set | |
260 | */ | |
261 | static inline void | |
d46a3ad6 | 262 | megasas_disable_intr_xscale(struct megasas_instance *instance) |
b274cab7 | 263 | { |
d46a3ad6 | 264 | struct megasas_register_set __iomem *regs; |
b274cab7 | 265 | u32 mask = 0x1f; |
d46a3ad6 | 266 | regs = instance->reg_set; |
b274cab7 SP |
267 | writel(mask, ®s->outbound_intr_mask); |
268 | /* Dummy readl to force pci flush */ | |
269 | readl(®s->outbound_intr_mask); | |
270 | } | |
271 | ||
1341c939 SP |
272 | /** |
273 | * megasas_read_fw_status_reg_xscale - returns the current FW status value | |
274 | * @regs: MFI register set | |
275 | */ | |
276 | static u32 | |
277 | megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs) | |
278 | { | |
279 | return readl(&(regs)->outbound_msg_0); | |
280 | } | |
281 | /** | |
282 | * megasas_clear_interrupt_xscale - Check & clear interrupt | |
283 | * @regs: MFI register set | |
284 | */ | |
0d49016b | 285 | static int |
1341c939 SP |
286 | megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs) |
287 | { | |
288 | u32 status; | |
39a98554 | 289 | u32 mfiStatus = 0; |
1341c939 SP |
290 | /* |
291 | * Check if it is our interrupt | |
292 | */ | |
293 | status = readl(®s->outbound_intr_status); | |
294 | ||
39a98554 | 295 | if (status & MFI_OB_INTR_STATUS_MASK) |
296 | mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE; | |
297 | if (status & MFI_XSCALE_OMR0_CHANGE_INTERRUPT) | |
298 | mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE; | |
1341c939 SP |
299 | |
300 | /* | |
301 | * Clear the interrupt by writing back the same value | |
302 | */ | |
39a98554 | 303 | if (mfiStatus) |
304 | writel(status, ®s->outbound_intr_status); | |
1341c939 | 305 | |
06f579de YB |
306 | /* Dummy readl to force pci flush */ |
307 | readl(®s->outbound_intr_status); | |
308 | ||
39a98554 | 309 | return mfiStatus; |
1341c939 SP |
310 | } |
311 | ||
312 | /** | |
313 | * megasas_fire_cmd_xscale - Sends command to the FW | |
314 | * @frame_phys_addr : Physical address of cmd | |
315 | * @frame_count : Number of frames for the command | |
316 | * @regs : MFI register set | |
317 | */ | |
0d49016b | 318 | static inline void |
0c79e681 YB |
319 | megasas_fire_cmd_xscale(struct megasas_instance *instance, |
320 | dma_addr_t frame_phys_addr, | |
321 | u32 frame_count, | |
322 | struct megasas_register_set __iomem *regs) | |
1341c939 | 323 | { |
39a98554 | 324 | unsigned long flags; |
325 | spin_lock_irqsave(&instance->hba_lock, flags); | |
1341c939 SP |
326 | writel((frame_phys_addr >> 3)|(frame_count), |
327 | &(regs)->inbound_queue_port); | |
39a98554 | 328 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
329 | } | |
330 | ||
331 | /** | |
332 | * megasas_adp_reset_xscale - For controller reset | |
333 | * @regs: MFI register set | |
334 | */ | |
335 | static int | |
336 | megasas_adp_reset_xscale(struct megasas_instance *instance, | |
337 | struct megasas_register_set __iomem *regs) | |
338 | { | |
339 | u32 i; | |
340 | u32 pcidata; | |
341 | writel(MFI_ADP_RESET, ®s->inbound_doorbell); | |
342 | ||
343 | for (i = 0; i < 3; i++) | |
344 | msleep(1000); /* sleep for 3 secs */ | |
345 | pcidata = 0; | |
346 | pci_read_config_dword(instance->pdev, MFI_1068_PCSR_OFFSET, &pcidata); | |
347 | printk(KERN_NOTICE "pcidata = %x\n", pcidata); | |
348 | if (pcidata & 0x2) { | |
349 | printk(KERN_NOTICE "mfi 1068 offset read=%x\n", pcidata); | |
350 | pcidata &= ~0x2; | |
351 | pci_write_config_dword(instance->pdev, | |
352 | MFI_1068_PCSR_OFFSET, pcidata); | |
353 | ||
354 | for (i = 0; i < 2; i++) | |
355 | msleep(1000); /* need to wait 2 secs again */ | |
356 | ||
357 | pcidata = 0; | |
358 | pci_read_config_dword(instance->pdev, | |
359 | MFI_1068_FW_HANDSHAKE_OFFSET, &pcidata); | |
360 | printk(KERN_NOTICE "1068 offset handshake read=%x\n", pcidata); | |
361 | if ((pcidata & 0xffff0000) == MFI_1068_FW_READY) { | |
362 | printk(KERN_NOTICE "1068 offset pcidt=%x\n", pcidata); | |
363 | pcidata = 0; | |
364 | pci_write_config_dword(instance->pdev, | |
365 | MFI_1068_FW_HANDSHAKE_OFFSET, pcidata); | |
366 | } | |
367 | } | |
368 | return 0; | |
369 | } | |
370 | ||
371 | /** | |
372 | * megasas_check_reset_xscale - For controller reset check | |
373 | * @regs: MFI register set | |
374 | */ | |
375 | static int | |
376 | megasas_check_reset_xscale(struct megasas_instance *instance, | |
377 | struct megasas_register_set __iomem *regs) | |
378 | { | |
39a98554 | 379 | |
380 | if ((instance->adprecovery != MEGASAS_HBA_OPERATIONAL) && | |
94cd65dd SS |
381 | (le32_to_cpu(*instance->consumer) == |
382 | MEGASAS_ADPRESET_INPROG_SIGN)) | |
39a98554 | 383 | return 1; |
39a98554 | 384 | return 0; |
1341c939 SP |
385 | } |
386 | ||
387 | static struct megasas_instance_template megasas_instance_template_xscale = { | |
388 | ||
389 | .fire_cmd = megasas_fire_cmd_xscale, | |
390 | .enable_intr = megasas_enable_intr_xscale, | |
b274cab7 | 391 | .disable_intr = megasas_disable_intr_xscale, |
1341c939 SP |
392 | .clear_intr = megasas_clear_intr_xscale, |
393 | .read_fw_status_reg = megasas_read_fw_status_reg_xscale, | |
39a98554 | 394 | .adp_reset = megasas_adp_reset_xscale, |
395 | .check_reset = megasas_check_reset_xscale, | |
cd50ba8e | 396 | .service_isr = megasas_isr, |
397 | .tasklet = megasas_complete_cmd_dpc, | |
398 | .init_adapter = megasas_init_adapter_mfi, | |
399 | .build_and_issue_cmd = megasas_build_and_issue_cmd, | |
400 | .issue_dcmd = megasas_issue_dcmd, | |
1341c939 SP |
401 | }; |
402 | ||
403 | /** | |
0d49016b | 404 | * This is the end of set of functions & definitions specific |
1341c939 SP |
405 | * to xscale (deviceid : 1064R, PERC5) controllers |
406 | */ | |
407 | ||
f9876f0b | 408 | /** |
0d49016b | 409 | * The following functions are defined for ppc (deviceid : 0x60) |
f9876f0b SP |
410 | * controllers |
411 | */ | |
412 | ||
413 | /** | |
414 | * megasas_enable_intr_ppc - Enables interrupts | |
415 | * @regs: MFI register set | |
416 | */ | |
417 | static inline void | |
d46a3ad6 | 418 | megasas_enable_intr_ppc(struct megasas_instance *instance) |
f9876f0b | 419 | { |
d46a3ad6 SS |
420 | struct megasas_register_set __iomem *regs; |
421 | regs = instance->reg_set; | |
f9876f0b | 422 | writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear); |
0d49016b | 423 | |
39a98554 | 424 | writel(~0x80000000, &(regs)->outbound_intr_mask); |
f9876f0b SP |
425 | |
426 | /* Dummy readl to force pci flush */ | |
427 | readl(®s->outbound_intr_mask); | |
428 | } | |
429 | ||
b274cab7 SP |
430 | /** |
431 | * megasas_disable_intr_ppc - Disable interrupt | |
432 | * @regs: MFI register set | |
433 | */ | |
434 | static inline void | |
d46a3ad6 | 435 | megasas_disable_intr_ppc(struct megasas_instance *instance) |
b274cab7 | 436 | { |
d46a3ad6 | 437 | struct megasas_register_set __iomem *regs; |
b274cab7 | 438 | u32 mask = 0xFFFFFFFF; |
d46a3ad6 | 439 | regs = instance->reg_set; |
b274cab7 SP |
440 | writel(mask, ®s->outbound_intr_mask); |
441 | /* Dummy readl to force pci flush */ | |
442 | readl(®s->outbound_intr_mask); | |
443 | } | |
444 | ||
f9876f0b SP |
445 | /** |
446 | * megasas_read_fw_status_reg_ppc - returns the current FW status value | |
447 | * @regs: MFI register set | |
448 | */ | |
449 | static u32 | |
450 | megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs) | |
451 | { | |
452 | return readl(&(regs)->outbound_scratch_pad); | |
453 | } | |
454 | ||
455 | /** | |
456 | * megasas_clear_interrupt_ppc - Check & clear interrupt | |
457 | * @regs: MFI register set | |
458 | */ | |
0d49016b | 459 | static int |
f9876f0b SP |
460 | megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs) |
461 | { | |
3cc6851f | 462 | u32 status, mfiStatus = 0; |
463 | ||
f9876f0b SP |
464 | /* |
465 | * Check if it is our interrupt | |
466 | */ | |
467 | status = readl(®s->outbound_intr_status); | |
468 | ||
3cc6851f | 469 | if (status & MFI_REPLY_1078_MESSAGE_INTERRUPT) |
470 | mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE; | |
471 | ||
472 | if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) | |
473 | mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE; | |
f9876f0b SP |
474 | |
475 | /* | |
476 | * Clear the interrupt by writing back the same value | |
477 | */ | |
478 | writel(status, ®s->outbound_doorbell_clear); | |
479 | ||
06f579de YB |
480 | /* Dummy readl to force pci flush */ |
481 | readl(®s->outbound_doorbell_clear); | |
482 | ||
3cc6851f | 483 | return mfiStatus; |
f9876f0b | 484 | } |
3cc6851f | 485 | |
f9876f0b SP |
486 | /** |
487 | * megasas_fire_cmd_ppc - Sends command to the FW | |
488 | * @frame_phys_addr : Physical address of cmd | |
489 | * @frame_count : Number of frames for the command | |
490 | * @regs : MFI register set | |
491 | */ | |
0d49016b | 492 | static inline void |
0c79e681 YB |
493 | megasas_fire_cmd_ppc(struct megasas_instance *instance, |
494 | dma_addr_t frame_phys_addr, | |
495 | u32 frame_count, | |
496 | struct megasas_register_set __iomem *regs) | |
f9876f0b | 497 | { |
39a98554 | 498 | unsigned long flags; |
499 | spin_lock_irqsave(&instance->hba_lock, flags); | |
0d49016b | 500 | writel((frame_phys_addr | (frame_count<<1))|1, |
f9876f0b | 501 | &(regs)->inbound_queue_port); |
39a98554 | 502 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
f9876f0b SP |
503 | } |
504 | ||
39a98554 | 505 | /** |
506 | * megasas_check_reset_ppc - For controller reset check | |
507 | * @regs: MFI register set | |
508 | */ | |
509 | static int | |
510 | megasas_check_reset_ppc(struct megasas_instance *instance, | |
511 | struct megasas_register_set __iomem *regs) | |
512 | { | |
3cc6851f | 513 | if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) |
514 | return 1; | |
515 | ||
39a98554 | 516 | return 0; |
517 | } | |
3cc6851f | 518 | |
f9876f0b | 519 | static struct megasas_instance_template megasas_instance_template_ppc = { |
0d49016b | 520 | |
f9876f0b SP |
521 | .fire_cmd = megasas_fire_cmd_ppc, |
522 | .enable_intr = megasas_enable_intr_ppc, | |
b274cab7 | 523 | .disable_intr = megasas_disable_intr_ppc, |
f9876f0b SP |
524 | .clear_intr = megasas_clear_intr_ppc, |
525 | .read_fw_status_reg = megasas_read_fw_status_reg_ppc, | |
3cc6851f | 526 | .adp_reset = megasas_adp_reset_xscale, |
39a98554 | 527 | .check_reset = megasas_check_reset_ppc, |
cd50ba8e | 528 | .service_isr = megasas_isr, |
529 | .tasklet = megasas_complete_cmd_dpc, | |
530 | .init_adapter = megasas_init_adapter_mfi, | |
531 | .build_and_issue_cmd = megasas_build_and_issue_cmd, | |
532 | .issue_dcmd = megasas_issue_dcmd, | |
f9876f0b SP |
533 | }; |
534 | ||
87911122 YB |
535 | /** |
536 | * megasas_enable_intr_skinny - Enables interrupts | |
537 | * @regs: MFI register set | |
538 | */ | |
539 | static inline void | |
d46a3ad6 | 540 | megasas_enable_intr_skinny(struct megasas_instance *instance) |
87911122 | 541 | { |
d46a3ad6 SS |
542 | struct megasas_register_set __iomem *regs; |
543 | regs = instance->reg_set; | |
87911122 YB |
544 | writel(0xFFFFFFFF, &(regs)->outbound_intr_mask); |
545 | ||
546 | writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask); | |
547 | ||
548 | /* Dummy readl to force pci flush */ | |
549 | readl(®s->outbound_intr_mask); | |
550 | } | |
551 | ||
552 | /** | |
553 | * megasas_disable_intr_skinny - Disables interrupt | |
554 | * @regs: MFI register set | |
555 | */ | |
556 | static inline void | |
d46a3ad6 | 557 | megasas_disable_intr_skinny(struct megasas_instance *instance) |
87911122 | 558 | { |
d46a3ad6 | 559 | struct megasas_register_set __iomem *regs; |
87911122 | 560 | u32 mask = 0xFFFFFFFF; |
d46a3ad6 | 561 | regs = instance->reg_set; |
87911122 YB |
562 | writel(mask, ®s->outbound_intr_mask); |
563 | /* Dummy readl to force pci flush */ | |
564 | readl(®s->outbound_intr_mask); | |
565 | } | |
566 | ||
567 | /** | |
568 | * megasas_read_fw_status_reg_skinny - returns the current FW status value | |
569 | * @regs: MFI register set | |
570 | */ | |
571 | static u32 | |
572 | megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs) | |
573 | { | |
574 | return readl(&(regs)->outbound_scratch_pad); | |
575 | } | |
576 | ||
577 | /** | |
578 | * megasas_clear_interrupt_skinny - Check & clear interrupt | |
579 | * @regs: MFI register set | |
580 | */ | |
581 | static int | |
582 | megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs) | |
583 | { | |
584 | u32 status; | |
ebf054b0 | 585 | u32 mfiStatus = 0; |
586 | ||
87911122 YB |
587 | /* |
588 | * Check if it is our interrupt | |
589 | */ | |
590 | status = readl(®s->outbound_intr_status); | |
591 | ||
592 | if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) { | |
39a98554 | 593 | return 0; |
87911122 YB |
594 | } |
595 | ||
ebf054b0 | 596 | /* |
597 | * Check if it is our interrupt | |
598 | */ | |
a3fda7dd | 599 | if ((megasas_read_fw_status_reg_skinny(regs) & MFI_STATE_MASK) == |
ebf054b0 | 600 | MFI_STATE_FAULT) { |
601 | mfiStatus = MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE; | |
602 | } else | |
603 | mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE; | |
604 | ||
87911122 YB |
605 | /* |
606 | * Clear the interrupt by writing back the same value | |
607 | */ | |
608 | writel(status, ®s->outbound_intr_status); | |
609 | ||
610 | /* | |
611 | * dummy read to flush PCI | |
612 | */ | |
613 | readl(®s->outbound_intr_status); | |
614 | ||
ebf054b0 | 615 | return mfiStatus; |
87911122 YB |
616 | } |
617 | ||
618 | /** | |
619 | * megasas_fire_cmd_skinny - Sends command to the FW | |
620 | * @frame_phys_addr : Physical address of cmd | |
621 | * @frame_count : Number of frames for the command | |
622 | * @regs : MFI register set | |
623 | */ | |
624 | static inline void | |
0c79e681 YB |
625 | megasas_fire_cmd_skinny(struct megasas_instance *instance, |
626 | dma_addr_t frame_phys_addr, | |
627 | u32 frame_count, | |
87911122 YB |
628 | struct megasas_register_set __iomem *regs) |
629 | { | |
0c79e681 | 630 | unsigned long flags; |
39a98554 | 631 | spin_lock_irqsave(&instance->hba_lock, flags); |
94cd65dd SS |
632 | writel(upper_32_bits(frame_phys_addr), |
633 | &(regs)->inbound_high_queue_port); | |
634 | writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1, | |
635 | &(regs)->inbound_low_queue_port); | |
39a98554 | 636 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
637 | } | |
638 | ||
39a98554 | 639 | /** |
640 | * megasas_check_reset_skinny - For controller reset check | |
641 | * @regs: MFI register set | |
642 | */ | |
643 | static int | |
644 | megasas_check_reset_skinny(struct megasas_instance *instance, | |
645 | struct megasas_register_set __iomem *regs) | |
646 | { | |
3cc6851f | 647 | if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) |
648 | return 1; | |
649 | ||
39a98554 | 650 | return 0; |
87911122 YB |
651 | } |
652 | ||
653 | static struct megasas_instance_template megasas_instance_template_skinny = { | |
654 | ||
655 | .fire_cmd = megasas_fire_cmd_skinny, | |
656 | .enable_intr = megasas_enable_intr_skinny, | |
657 | .disable_intr = megasas_disable_intr_skinny, | |
658 | .clear_intr = megasas_clear_intr_skinny, | |
659 | .read_fw_status_reg = megasas_read_fw_status_reg_skinny, | |
ebf054b0 | 660 | .adp_reset = megasas_adp_reset_gen2, |
39a98554 | 661 | .check_reset = megasas_check_reset_skinny, |
cd50ba8e | 662 | .service_isr = megasas_isr, |
663 | .tasklet = megasas_complete_cmd_dpc, | |
664 | .init_adapter = megasas_init_adapter_mfi, | |
665 | .build_and_issue_cmd = megasas_build_and_issue_cmd, | |
666 | .issue_dcmd = megasas_issue_dcmd, | |
87911122 YB |
667 | }; |
668 | ||
669 | ||
6610a6b3 YB |
670 | /** |
671 | * The following functions are defined for gen2 (deviceid : 0x78 0x79) | |
672 | * controllers | |
673 | */ | |
674 | ||
675 | /** | |
676 | * megasas_enable_intr_gen2 - Enables interrupts | |
677 | * @regs: MFI register set | |
678 | */ | |
679 | static inline void | |
d46a3ad6 | 680 | megasas_enable_intr_gen2(struct megasas_instance *instance) |
6610a6b3 | 681 | { |
d46a3ad6 SS |
682 | struct megasas_register_set __iomem *regs; |
683 | regs = instance->reg_set; | |
6610a6b3 YB |
684 | writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear); |
685 | ||
686 | /* write ~0x00000005 (4 & 1) to the intr mask*/ | |
687 | writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask); | |
688 | ||
689 | /* Dummy readl to force pci flush */ | |
690 | readl(®s->outbound_intr_mask); | |
691 | } | |
692 | ||
693 | /** | |
694 | * megasas_disable_intr_gen2 - Disables interrupt | |
695 | * @regs: MFI register set | |
696 | */ | |
697 | static inline void | |
d46a3ad6 | 698 | megasas_disable_intr_gen2(struct megasas_instance *instance) |
6610a6b3 | 699 | { |
d46a3ad6 | 700 | struct megasas_register_set __iomem *regs; |
6610a6b3 | 701 | u32 mask = 0xFFFFFFFF; |
d46a3ad6 | 702 | regs = instance->reg_set; |
6610a6b3 YB |
703 | writel(mask, ®s->outbound_intr_mask); |
704 | /* Dummy readl to force pci flush */ | |
705 | readl(®s->outbound_intr_mask); | |
706 | } | |
707 | ||
708 | /** | |
709 | * megasas_read_fw_status_reg_gen2 - returns the current FW status value | |
710 | * @regs: MFI register set | |
711 | */ | |
712 | static u32 | |
713 | megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs) | |
714 | { | |
715 | return readl(&(regs)->outbound_scratch_pad); | |
716 | } | |
717 | ||
718 | /** | |
719 | * megasas_clear_interrupt_gen2 - Check & clear interrupt | |
720 | * @regs: MFI register set | |
721 | */ | |
722 | static int | |
723 | megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs) | |
724 | { | |
725 | u32 status; | |
39a98554 | 726 | u32 mfiStatus = 0; |
6610a6b3 YB |
727 | /* |
728 | * Check if it is our interrupt | |
729 | */ | |
730 | status = readl(®s->outbound_intr_status); | |
731 | ||
b5bccadd | 732 | if (status & MFI_INTR_FLAG_REPLY_MESSAGE) { |
39a98554 | 733 | mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE; |
734 | } | |
735 | if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) { | |
736 | mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE; | |
737 | } | |
6610a6b3 YB |
738 | |
739 | /* | |
740 | * Clear the interrupt by writing back the same value | |
741 | */ | |
39a98554 | 742 | if (mfiStatus) |
743 | writel(status, ®s->outbound_doorbell_clear); | |
6610a6b3 YB |
744 | |
745 | /* Dummy readl to force pci flush */ | |
746 | readl(®s->outbound_intr_status); | |
747 | ||
39a98554 | 748 | return mfiStatus; |
6610a6b3 YB |
749 | } |
750 | /** | |
751 | * megasas_fire_cmd_gen2 - Sends command to the FW | |
752 | * @frame_phys_addr : Physical address of cmd | |
753 | * @frame_count : Number of frames for the command | |
754 | * @regs : MFI register set | |
755 | */ | |
756 | static inline void | |
0c79e681 YB |
757 | megasas_fire_cmd_gen2(struct megasas_instance *instance, |
758 | dma_addr_t frame_phys_addr, | |
759 | u32 frame_count, | |
6610a6b3 YB |
760 | struct megasas_register_set __iomem *regs) |
761 | { | |
39a98554 | 762 | unsigned long flags; |
763 | spin_lock_irqsave(&instance->hba_lock, flags); | |
6610a6b3 YB |
764 | writel((frame_phys_addr | (frame_count<<1))|1, |
765 | &(regs)->inbound_queue_port); | |
39a98554 | 766 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
767 | } | |
768 | ||
769 | /** | |
770 | * megasas_adp_reset_gen2 - For controller reset | |
771 | * @regs: MFI register set | |
772 | */ | |
773 | static int | |
774 | megasas_adp_reset_gen2(struct megasas_instance *instance, | |
775 | struct megasas_register_set __iomem *reg_set) | |
776 | { | |
777 | u32 retry = 0 ; | |
778 | u32 HostDiag; | |
ebf054b0 | 779 | u32 *seq_offset = ®_set->seq_offset; |
780 | u32 *hostdiag_offset = ®_set->host_diag; | |
781 | ||
782 | if (instance->instancet == &megasas_instance_template_skinny) { | |
783 | seq_offset = ®_set->fusion_seq_offset; | |
784 | hostdiag_offset = ®_set->fusion_host_diag; | |
785 | } | |
786 | ||
787 | writel(0, seq_offset); | |
788 | writel(4, seq_offset); | |
789 | writel(0xb, seq_offset); | |
790 | writel(2, seq_offset); | |
791 | writel(7, seq_offset); | |
792 | writel(0xd, seq_offset); | |
39a98554 | 793 | |
39a98554 | 794 | msleep(1000); |
795 | ||
ebf054b0 | 796 | HostDiag = (u32)readl(hostdiag_offset); |
39a98554 | 797 | |
798 | while ( !( HostDiag & DIAG_WRITE_ENABLE) ) { | |
799 | msleep(100); | |
ebf054b0 | 800 | HostDiag = (u32)readl(hostdiag_offset); |
39a98554 | 801 | printk(KERN_NOTICE "RESETGEN2: retry=%x, hostdiag=%x\n", |
802 | retry, HostDiag); | |
803 | ||
804 | if (retry++ >= 100) | |
805 | return 1; | |
806 | ||
807 | } | |
808 | ||
809 | printk(KERN_NOTICE "ADP_RESET_GEN2: HostDiag=%x\n", HostDiag); | |
810 | ||
ebf054b0 | 811 | writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset); |
39a98554 | 812 | |
813 | ssleep(10); | |
814 | ||
ebf054b0 | 815 | HostDiag = (u32)readl(hostdiag_offset); |
39a98554 | 816 | while ( ( HostDiag & DIAG_RESET_ADAPTER) ) { |
817 | msleep(100); | |
ebf054b0 | 818 | HostDiag = (u32)readl(hostdiag_offset); |
39a98554 | 819 | printk(KERN_NOTICE "RESET_GEN2: retry=%x, hostdiag=%x\n", |
820 | retry, HostDiag); | |
821 | ||
822 | if (retry++ >= 1000) | |
823 | return 1; | |
824 | ||
825 | } | |
826 | return 0; | |
827 | } | |
828 | ||
829 | /** | |
830 | * megasas_check_reset_gen2 - For controller reset check | |
831 | * @regs: MFI register set | |
832 | */ | |
833 | static int | |
834 | megasas_check_reset_gen2(struct megasas_instance *instance, | |
835 | struct megasas_register_set __iomem *regs) | |
836 | { | |
707e09bd YB |
837 | if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) { |
838 | return 1; | |
839 | } | |
840 | ||
39a98554 | 841 | return 0; |
6610a6b3 YB |
842 | } |
843 | ||
844 | static struct megasas_instance_template megasas_instance_template_gen2 = { | |
845 | ||
846 | .fire_cmd = megasas_fire_cmd_gen2, | |
847 | .enable_intr = megasas_enable_intr_gen2, | |
848 | .disable_intr = megasas_disable_intr_gen2, | |
849 | .clear_intr = megasas_clear_intr_gen2, | |
850 | .read_fw_status_reg = megasas_read_fw_status_reg_gen2, | |
39a98554 | 851 | .adp_reset = megasas_adp_reset_gen2, |
852 | .check_reset = megasas_check_reset_gen2, | |
cd50ba8e | 853 | .service_isr = megasas_isr, |
854 | .tasklet = megasas_complete_cmd_dpc, | |
855 | .init_adapter = megasas_init_adapter_mfi, | |
856 | .build_and_issue_cmd = megasas_build_and_issue_cmd, | |
857 | .issue_dcmd = megasas_issue_dcmd, | |
6610a6b3 YB |
858 | }; |
859 | ||
f9876f0b SP |
860 | /** |
861 | * This is the end of set of functions & definitions | |
39a98554 | 862 | * specific to gen2 (deviceid : 0x78, 0x79) controllers |
f9876f0b SP |
863 | */ |
864 | ||
9c915a8c | 865 | /* |
866 | * Template added for TB (Fusion) | |
867 | */ | |
868 | extern struct megasas_instance_template megasas_instance_template_fusion; | |
869 | ||
c4a3e0a5 BS |
870 | /** |
871 | * megasas_issue_polled - Issues a polling command | |
872 | * @instance: Adapter soft state | |
0d49016b | 873 | * @cmd: Command packet to be issued |
c4a3e0a5 BS |
874 | * |
875 | * For polling, MFI requires the cmd_status to be set to 0xFF before posting. | |
876 | */ | |
9c915a8c | 877 | int |
c4a3e0a5 BS |
878 | megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd) |
879 | { | |
c4a3e0a5 BS |
880 | |
881 | struct megasas_header *frame_hdr = &cmd->frame->hdr; | |
882 | ||
94cd65dd SS |
883 | frame_hdr->cmd_status = MFI_CMD_STATUS_POLL_MODE; |
884 | frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE); | |
c4a3e0a5 BS |
885 | |
886 | /* | |
887 | * Issue the frame using inbound queue port | |
888 | */ | |
9c915a8c | 889 | instance->instancet->issue_dcmd(instance, cmd); |
c4a3e0a5 BS |
890 | |
891 | /* | |
892 | * Wait for cmd_status to change | |
893 | */ | |
9c915a8c | 894 | return wait_and_poll(instance, cmd); |
c4a3e0a5 BS |
895 | } |
896 | ||
897 | /** | |
898 | * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds | |
899 | * @instance: Adapter soft state | |
900 | * @cmd: Command to be issued | |
901 | * | |
902 | * This function waits on an event for the command to be returned from ISR. | |
2a3681e5 | 903 | * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs |
c4a3e0a5 BS |
904 | * Used to issue ioctl commands. |
905 | */ | |
906 | static int | |
907 | megasas_issue_blocked_cmd(struct megasas_instance *instance, | |
908 | struct megasas_cmd *cmd) | |
909 | { | |
910 | cmd->cmd_status = ENODATA; | |
911 | ||
9c915a8c | 912 | instance->instancet->issue_dcmd(instance, cmd); |
c4a3e0a5 | 913 | |
39a98554 | 914 | wait_event(instance->int_cmd_wait_q, cmd->cmd_status != ENODATA); |
c4a3e0a5 BS |
915 | |
916 | return 0; | |
917 | } | |
918 | ||
919 | /** | |
920 | * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd | |
921 | * @instance: Adapter soft state | |
922 | * @cmd_to_abort: Previously issued cmd to be aborted | |
923 | * | |
8e572bab | 924 | * MFI firmware can abort previously issued AEN command (automatic event |
c4a3e0a5 | 925 | * notification). The megasas_issue_blocked_abort_cmd() issues such abort |
2a3681e5 SP |
926 | * cmd and waits for return status. |
927 | * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs | |
c4a3e0a5 BS |
928 | */ |
929 | static int | |
930 | megasas_issue_blocked_abort_cmd(struct megasas_instance *instance, | |
931 | struct megasas_cmd *cmd_to_abort) | |
932 | { | |
933 | struct megasas_cmd *cmd; | |
934 | struct megasas_abort_frame *abort_fr; | |
935 | ||
936 | cmd = megasas_get_cmd(instance); | |
937 | ||
938 | if (!cmd) | |
939 | return -1; | |
940 | ||
941 | abort_fr = &cmd->frame->abort; | |
942 | ||
943 | /* | |
944 | * Prepare and issue the abort frame | |
945 | */ | |
946 | abort_fr->cmd = MFI_CMD_ABORT; | |
947 | abort_fr->cmd_status = 0xFF; | |
94cd65dd SS |
948 | abort_fr->flags = cpu_to_le16(0); |
949 | abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index); | |
950 | abort_fr->abort_mfi_phys_addr_lo = | |
951 | cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr)); | |
952 | abort_fr->abort_mfi_phys_addr_hi = | |
953 | cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr)); | |
c4a3e0a5 BS |
954 | |
955 | cmd->sync_cmd = 1; | |
956 | cmd->cmd_status = 0xFF; | |
957 | ||
9c915a8c | 958 | instance->instancet->issue_dcmd(instance, cmd); |
c4a3e0a5 BS |
959 | |
960 | /* | |
961 | * Wait for this cmd to complete | |
962 | */ | |
39a98554 | 963 | wait_event(instance->abort_cmd_wait_q, cmd->cmd_status != 0xFF); |
964 | cmd->sync_cmd = 0; | |
c4a3e0a5 BS |
965 | |
966 | megasas_return_cmd(instance, cmd); | |
967 | return 0; | |
968 | } | |
969 | ||
970 | /** | |
971 | * megasas_make_sgl32 - Prepares 32-bit SGL | |
972 | * @instance: Adapter soft state | |
973 | * @scp: SCSI command from the mid-layer | |
974 | * @mfi_sgl: SGL to be filled in | |
975 | * | |
976 | * If successful, this function returns the number of SG elements. Otherwise, | |
977 | * it returnes -1. | |
978 | */ | |
858119e1 | 979 | static int |
c4a3e0a5 BS |
980 | megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp, |
981 | union megasas_sgl *mfi_sgl) | |
982 | { | |
983 | int i; | |
984 | int sge_count; | |
985 | struct scatterlist *os_sgl; | |
986 | ||
155d98f0 FT |
987 | sge_count = scsi_dma_map(scp); |
988 | BUG_ON(sge_count < 0); | |
c4a3e0a5 | 989 | |
155d98f0 FT |
990 | if (sge_count) { |
991 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { | |
94cd65dd SS |
992 | mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl)); |
993 | mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl)); | |
155d98f0 | 994 | } |
c4a3e0a5 | 995 | } |
c4a3e0a5 BS |
996 | return sge_count; |
997 | } | |
998 | ||
999 | /** | |
1000 | * megasas_make_sgl64 - Prepares 64-bit SGL | |
1001 | * @instance: Adapter soft state | |
1002 | * @scp: SCSI command from the mid-layer | |
1003 | * @mfi_sgl: SGL to be filled in | |
1004 | * | |
1005 | * If successful, this function returns the number of SG elements. Otherwise, | |
1006 | * it returnes -1. | |
1007 | */ | |
858119e1 | 1008 | static int |
c4a3e0a5 BS |
1009 | megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp, |
1010 | union megasas_sgl *mfi_sgl) | |
1011 | { | |
1012 | int i; | |
1013 | int sge_count; | |
1014 | struct scatterlist *os_sgl; | |
1015 | ||
155d98f0 FT |
1016 | sge_count = scsi_dma_map(scp); |
1017 | BUG_ON(sge_count < 0); | |
c4a3e0a5 | 1018 | |
155d98f0 FT |
1019 | if (sge_count) { |
1020 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { | |
94cd65dd SS |
1021 | mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl)); |
1022 | mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl)); | |
155d98f0 | 1023 | } |
c4a3e0a5 | 1024 | } |
c4a3e0a5 BS |
1025 | return sge_count; |
1026 | } | |
1027 | ||
f4c9a131 YB |
1028 | /** |
1029 | * megasas_make_sgl_skinny - Prepares IEEE SGL | |
1030 | * @instance: Adapter soft state | |
1031 | * @scp: SCSI command from the mid-layer | |
1032 | * @mfi_sgl: SGL to be filled in | |
1033 | * | |
1034 | * If successful, this function returns the number of SG elements. Otherwise, | |
1035 | * it returnes -1. | |
1036 | */ | |
1037 | static int | |
1038 | megasas_make_sgl_skinny(struct megasas_instance *instance, | |
1039 | struct scsi_cmnd *scp, union megasas_sgl *mfi_sgl) | |
1040 | { | |
1041 | int i; | |
1042 | int sge_count; | |
1043 | struct scatterlist *os_sgl; | |
1044 | ||
1045 | sge_count = scsi_dma_map(scp); | |
1046 | ||
1047 | if (sge_count) { | |
1048 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { | |
94cd65dd SS |
1049 | mfi_sgl->sge_skinny[i].length = |
1050 | cpu_to_le32(sg_dma_len(os_sgl)); | |
f4c9a131 | 1051 | mfi_sgl->sge_skinny[i].phys_addr = |
94cd65dd SS |
1052 | cpu_to_le64(sg_dma_address(os_sgl)); |
1053 | mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0); | |
f4c9a131 YB |
1054 | } |
1055 | } | |
1056 | return sge_count; | |
1057 | } | |
1058 | ||
b1df99d9 SP |
1059 | /** |
1060 | * megasas_get_frame_count - Computes the number of frames | |
d532dbe2 | 1061 | * @frame_type : type of frame- io or pthru frame |
b1df99d9 SP |
1062 | * @sge_count : number of sg elements |
1063 | * | |
1064 | * Returns the number of frames required for numnber of sge's (sge_count) | |
1065 | */ | |
1066 | ||
f4c9a131 YB |
1067 | static u32 megasas_get_frame_count(struct megasas_instance *instance, |
1068 | u8 sge_count, u8 frame_type) | |
b1df99d9 SP |
1069 | { |
1070 | int num_cnt; | |
1071 | int sge_bytes; | |
1072 | u32 sge_sz; | |
1073 | u32 frame_count=0; | |
1074 | ||
1075 | sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) : | |
1076 | sizeof(struct megasas_sge32); | |
1077 | ||
f4c9a131 YB |
1078 | if (instance->flag_ieee) { |
1079 | sge_sz = sizeof(struct megasas_sge_skinny); | |
1080 | } | |
1081 | ||
b1df99d9 | 1082 | /* |
d532dbe2 | 1083 | * Main frame can contain 2 SGEs for 64-bit SGLs and |
1084 | * 3 SGEs for 32-bit SGLs for ldio & | |
1085 | * 1 SGEs for 64-bit SGLs and | |
1086 | * 2 SGEs for 32-bit SGLs for pthru frame | |
1087 | */ | |
1088 | if (unlikely(frame_type == PTHRU_FRAME)) { | |
f4c9a131 YB |
1089 | if (instance->flag_ieee == 1) { |
1090 | num_cnt = sge_count - 1; | |
1091 | } else if (IS_DMA64) | |
d532dbe2 | 1092 | num_cnt = sge_count - 1; |
1093 | else | |
1094 | num_cnt = sge_count - 2; | |
1095 | } else { | |
f4c9a131 YB |
1096 | if (instance->flag_ieee == 1) { |
1097 | num_cnt = sge_count - 1; | |
1098 | } else if (IS_DMA64) | |
d532dbe2 | 1099 | num_cnt = sge_count - 2; |
1100 | else | |
1101 | num_cnt = sge_count - 3; | |
1102 | } | |
b1df99d9 SP |
1103 | |
1104 | if(num_cnt>0){ | |
1105 | sge_bytes = sge_sz * num_cnt; | |
1106 | ||
1107 | frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) + | |
1108 | ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) ; | |
1109 | } | |
1110 | /* Main frame */ | |
1111 | frame_count +=1; | |
1112 | ||
1113 | if (frame_count > 7) | |
1114 | frame_count = 8; | |
1115 | return frame_count; | |
1116 | } | |
1117 | ||
c4a3e0a5 BS |
1118 | /** |
1119 | * megasas_build_dcdb - Prepares a direct cdb (DCDB) command | |
1120 | * @instance: Adapter soft state | |
1121 | * @scp: SCSI command | |
1122 | * @cmd: Command to be prepared in | |
1123 | * | |
1124 | * This function prepares CDB commands. These are typcially pass-through | |
1125 | * commands to the devices. | |
1126 | */ | |
858119e1 | 1127 | static int |
c4a3e0a5 BS |
1128 | megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp, |
1129 | struct megasas_cmd *cmd) | |
1130 | { | |
c4a3e0a5 BS |
1131 | u32 is_logical; |
1132 | u32 device_id; | |
1133 | u16 flags = 0; | |
1134 | struct megasas_pthru_frame *pthru; | |
1135 | ||
1136 | is_logical = MEGASAS_IS_LOGICAL(scp); | |
1137 | device_id = MEGASAS_DEV_INDEX(instance, scp); | |
1138 | pthru = (struct megasas_pthru_frame *)cmd->frame; | |
1139 | ||
1140 | if (scp->sc_data_direction == PCI_DMA_TODEVICE) | |
1141 | flags = MFI_FRAME_DIR_WRITE; | |
1142 | else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE) | |
1143 | flags = MFI_FRAME_DIR_READ; | |
1144 | else if (scp->sc_data_direction == PCI_DMA_NONE) | |
1145 | flags = MFI_FRAME_DIR_NONE; | |
1146 | ||
f4c9a131 YB |
1147 | if (instance->flag_ieee == 1) { |
1148 | flags |= MFI_FRAME_IEEE; | |
1149 | } | |
1150 | ||
c4a3e0a5 BS |
1151 | /* |
1152 | * Prepare the DCDB frame | |
1153 | */ | |
1154 | pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO; | |
1155 | pthru->cmd_status = 0x0; | |
1156 | pthru->scsi_status = 0x0; | |
1157 | pthru->target_id = device_id; | |
1158 | pthru->lun = scp->device->lun; | |
1159 | pthru->cdb_len = scp->cmd_len; | |
1160 | pthru->timeout = 0; | |
780a3762 | 1161 | pthru->pad_0 = 0; |
94cd65dd SS |
1162 | pthru->flags = cpu_to_le16(flags); |
1163 | pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp)); | |
c4a3e0a5 BS |
1164 | |
1165 | memcpy(pthru->cdb, scp->cmnd, scp->cmd_len); | |
1166 | ||
8d568253 YB |
1167 | /* |
1168 | * If the command is for the tape device, set the | |
1169 | * pthru timeout to the os layer timeout value. | |
1170 | */ | |
1171 | if (scp->device->type == TYPE_TAPE) { | |
1172 | if ((scp->request->timeout / HZ) > 0xFFFF) | |
1173 | pthru->timeout = 0xFFFF; | |
1174 | else | |
94cd65dd | 1175 | pthru->timeout = cpu_to_le16(scp->request->timeout / HZ); |
8d568253 YB |
1176 | } |
1177 | ||
c4a3e0a5 BS |
1178 | /* |
1179 | * Construct SGL | |
1180 | */ | |
f4c9a131 | 1181 | if (instance->flag_ieee == 1) { |
94cd65dd | 1182 | pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64); |
f4c9a131 YB |
1183 | pthru->sge_count = megasas_make_sgl_skinny(instance, scp, |
1184 | &pthru->sgl); | |
1185 | } else if (IS_DMA64) { | |
94cd65dd | 1186 | pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64); |
c4a3e0a5 BS |
1187 | pthru->sge_count = megasas_make_sgl64(instance, scp, |
1188 | &pthru->sgl); | |
1189 | } else | |
1190 | pthru->sge_count = megasas_make_sgl32(instance, scp, | |
1191 | &pthru->sgl); | |
1192 | ||
bdc6fb8d YB |
1193 | if (pthru->sge_count > instance->max_num_sge) { |
1194 | printk(KERN_ERR "megasas: DCDB two many SGE NUM=%x\n", | |
1195 | pthru->sge_count); | |
1196 | return 0; | |
1197 | } | |
1198 | ||
c4a3e0a5 BS |
1199 | /* |
1200 | * Sense info specific | |
1201 | */ | |
1202 | pthru->sense_len = SCSI_SENSE_BUFFERSIZE; | |
94cd65dd SS |
1203 | pthru->sense_buf_phys_addr_hi = |
1204 | cpu_to_le32(upper_32_bits(cmd->sense_phys_addr)); | |
1205 | pthru->sense_buf_phys_addr_lo = | |
1206 | cpu_to_le32(lower_32_bits(cmd->sense_phys_addr)); | |
c4a3e0a5 | 1207 | |
c4a3e0a5 BS |
1208 | /* |
1209 | * Compute the total number of frames this command consumes. FW uses | |
1210 | * this number to pull sufficient number of frames from host memory. | |
1211 | */ | |
f4c9a131 | 1212 | cmd->frame_count = megasas_get_frame_count(instance, pthru->sge_count, |
d532dbe2 | 1213 | PTHRU_FRAME); |
c4a3e0a5 BS |
1214 | |
1215 | return cmd->frame_count; | |
1216 | } | |
1217 | ||
1218 | /** | |
1219 | * megasas_build_ldio - Prepares IOs to logical devices | |
1220 | * @instance: Adapter soft state | |
1221 | * @scp: SCSI command | |
fd589a8f | 1222 | * @cmd: Command to be prepared |
c4a3e0a5 BS |
1223 | * |
1224 | * Frames (and accompanying SGLs) for regular SCSI IOs use this function. | |
1225 | */ | |
858119e1 | 1226 | static int |
c4a3e0a5 BS |
1227 | megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp, |
1228 | struct megasas_cmd *cmd) | |
1229 | { | |
c4a3e0a5 BS |
1230 | u32 device_id; |
1231 | u8 sc = scp->cmnd[0]; | |
1232 | u16 flags = 0; | |
1233 | struct megasas_io_frame *ldio; | |
1234 | ||
1235 | device_id = MEGASAS_DEV_INDEX(instance, scp); | |
1236 | ldio = (struct megasas_io_frame *)cmd->frame; | |
1237 | ||
1238 | if (scp->sc_data_direction == PCI_DMA_TODEVICE) | |
1239 | flags = MFI_FRAME_DIR_WRITE; | |
1240 | else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE) | |
1241 | flags = MFI_FRAME_DIR_READ; | |
1242 | ||
f4c9a131 YB |
1243 | if (instance->flag_ieee == 1) { |
1244 | flags |= MFI_FRAME_IEEE; | |
1245 | } | |
1246 | ||
c4a3e0a5 | 1247 | /* |
b1df99d9 | 1248 | * Prepare the Logical IO frame: 2nd bit is zero for all read cmds |
c4a3e0a5 BS |
1249 | */ |
1250 | ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ; | |
1251 | ldio->cmd_status = 0x0; | |
1252 | ldio->scsi_status = 0x0; | |
1253 | ldio->target_id = device_id; | |
1254 | ldio->timeout = 0; | |
1255 | ldio->reserved_0 = 0; | |
1256 | ldio->pad_0 = 0; | |
94cd65dd | 1257 | ldio->flags = cpu_to_le16(flags); |
c4a3e0a5 BS |
1258 | ldio->start_lba_hi = 0; |
1259 | ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0; | |
1260 | ||
1261 | /* | |
1262 | * 6-byte READ(0x08) or WRITE(0x0A) cdb | |
1263 | */ | |
1264 | if (scp->cmd_len == 6) { | |
94cd65dd SS |
1265 | ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]); |
1266 | ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) | | |
1267 | ((u32) scp->cmnd[2] << 8) | | |
1268 | (u32) scp->cmnd[3]); | |
c4a3e0a5 | 1269 | |
94cd65dd | 1270 | ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF); |
c4a3e0a5 BS |
1271 | } |
1272 | ||
1273 | /* | |
1274 | * 10-byte READ(0x28) or WRITE(0x2A) cdb | |
1275 | */ | |
1276 | else if (scp->cmd_len == 10) { | |
94cd65dd SS |
1277 | ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] | |
1278 | ((u32) scp->cmnd[7] << 8)); | |
1279 | ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) | | |
1280 | ((u32) scp->cmnd[3] << 16) | | |
1281 | ((u32) scp->cmnd[4] << 8) | | |
1282 | (u32) scp->cmnd[5]); | |
c4a3e0a5 BS |
1283 | } |
1284 | ||
1285 | /* | |
1286 | * 12-byte READ(0xA8) or WRITE(0xAA) cdb | |
1287 | */ | |
1288 | else if (scp->cmd_len == 12) { | |
94cd65dd SS |
1289 | ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) | |
1290 | ((u32) scp->cmnd[7] << 16) | | |
1291 | ((u32) scp->cmnd[8] << 8) | | |
1292 | (u32) scp->cmnd[9]); | |
c4a3e0a5 | 1293 | |
94cd65dd SS |
1294 | ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) | |
1295 | ((u32) scp->cmnd[3] << 16) | | |
1296 | ((u32) scp->cmnd[4] << 8) | | |
1297 | (u32) scp->cmnd[5]); | |
c4a3e0a5 BS |
1298 | } |
1299 | ||
1300 | /* | |
1301 | * 16-byte READ(0x88) or WRITE(0x8A) cdb | |
1302 | */ | |
1303 | else if (scp->cmd_len == 16) { | |
94cd65dd SS |
1304 | ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) | |
1305 | ((u32) scp->cmnd[11] << 16) | | |
1306 | ((u32) scp->cmnd[12] << 8) | | |
1307 | (u32) scp->cmnd[13]); | |
c4a3e0a5 | 1308 | |
94cd65dd SS |
1309 | ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) | |
1310 | ((u32) scp->cmnd[7] << 16) | | |
1311 | ((u32) scp->cmnd[8] << 8) | | |
1312 | (u32) scp->cmnd[9]); | |
c4a3e0a5 | 1313 | |
94cd65dd SS |
1314 | ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) | |
1315 | ((u32) scp->cmnd[3] << 16) | | |
1316 | ((u32) scp->cmnd[4] << 8) | | |
1317 | (u32) scp->cmnd[5]); | |
c4a3e0a5 BS |
1318 | |
1319 | } | |
1320 | ||
1321 | /* | |
1322 | * Construct SGL | |
1323 | */ | |
f4c9a131 | 1324 | if (instance->flag_ieee) { |
94cd65dd | 1325 | ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64); |
f4c9a131 YB |
1326 | ldio->sge_count = megasas_make_sgl_skinny(instance, scp, |
1327 | &ldio->sgl); | |
1328 | } else if (IS_DMA64) { | |
94cd65dd | 1329 | ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64); |
c4a3e0a5 BS |
1330 | ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl); |
1331 | } else | |
1332 | ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl); | |
1333 | ||
bdc6fb8d YB |
1334 | if (ldio->sge_count > instance->max_num_sge) { |
1335 | printk(KERN_ERR "megasas: build_ld_io: sge_count = %x\n", | |
1336 | ldio->sge_count); | |
1337 | return 0; | |
1338 | } | |
1339 | ||
c4a3e0a5 BS |
1340 | /* |
1341 | * Sense info specific | |
1342 | */ | |
1343 | ldio->sense_len = SCSI_SENSE_BUFFERSIZE; | |
1344 | ldio->sense_buf_phys_addr_hi = 0; | |
94cd65dd | 1345 | ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr); |
c4a3e0a5 | 1346 | |
b1df99d9 SP |
1347 | /* |
1348 | * Compute the total number of frames this command consumes. FW uses | |
1349 | * this number to pull sufficient number of frames from host memory. | |
1350 | */ | |
f4c9a131 YB |
1351 | cmd->frame_count = megasas_get_frame_count(instance, |
1352 | ldio->sge_count, IO_FRAME); | |
c4a3e0a5 BS |
1353 | |
1354 | return cmd->frame_count; | |
1355 | } | |
1356 | ||
1357 | /** | |
cb59aa6a SP |
1358 | * megasas_is_ldio - Checks if the cmd is for logical drive |
1359 | * @scmd: SCSI command | |
0d49016b | 1360 | * |
cb59aa6a | 1361 | * Called by megasas_queue_command to find out if the command to be queued |
0d49016b | 1362 | * is a logical drive command |
c4a3e0a5 | 1363 | */ |
9c915a8c | 1364 | inline int megasas_is_ldio(struct scsi_cmnd *cmd) |
c4a3e0a5 | 1365 | { |
cb59aa6a SP |
1366 | if (!MEGASAS_IS_LOGICAL(cmd)) |
1367 | return 0; | |
1368 | switch (cmd->cmnd[0]) { | |
1369 | case READ_10: | |
1370 | case WRITE_10: | |
1371 | case READ_12: | |
1372 | case WRITE_12: | |
1373 | case READ_6: | |
1374 | case WRITE_6: | |
1375 | case READ_16: | |
1376 | case WRITE_16: | |
1377 | return 1; | |
1378 | default: | |
1379 | return 0; | |
c4a3e0a5 | 1380 | } |
c4a3e0a5 BS |
1381 | } |
1382 | ||
658dcedb SP |
1383 | /** |
1384 | * megasas_dump_pending_frames - Dumps the frame address of all pending cmds | |
1385 | * in FW | |
1386 | * @instance: Adapter soft state | |
1387 | */ | |
1388 | static inline void | |
1389 | megasas_dump_pending_frames(struct megasas_instance *instance) | |
1390 | { | |
1391 | struct megasas_cmd *cmd; | |
1392 | int i,n; | |
1393 | union megasas_sgl *mfi_sgl; | |
1394 | struct megasas_io_frame *ldio; | |
1395 | struct megasas_pthru_frame *pthru; | |
1396 | u32 sgcount; | |
1397 | u32 max_cmd = instance->max_fw_cmds; | |
1398 | ||
1399 | printk(KERN_ERR "\nmegasas[%d]: Dumping Frame Phys Address of all pending cmds in FW\n",instance->host->host_no); | |
1400 | printk(KERN_ERR "megasas[%d]: Total OS Pending cmds : %d\n",instance->host->host_no,atomic_read(&instance->fw_outstanding)); | |
1401 | if (IS_DMA64) | |
1402 | printk(KERN_ERR "\nmegasas[%d]: 64 bit SGLs were sent to FW\n",instance->host->host_no); | |
1403 | else | |
1404 | printk(KERN_ERR "\nmegasas[%d]: 32 bit SGLs were sent to FW\n",instance->host->host_no); | |
1405 | ||
1406 | printk(KERN_ERR "megasas[%d]: Pending OS cmds in FW : \n",instance->host->host_no); | |
1407 | for (i = 0; i < max_cmd; i++) { | |
1408 | cmd = instance->cmd_list[i]; | |
1409 | if(!cmd->scmd) | |
1410 | continue; | |
1411 | printk(KERN_ERR "megasas[%d]: Frame addr :0x%08lx : ",instance->host->host_no,(unsigned long)cmd->frame_phys_addr); | |
1412 | if (megasas_is_ldio(cmd->scmd)){ | |
1413 | ldio = (struct megasas_io_frame *)cmd->frame; | |
1414 | mfi_sgl = &ldio->sgl; | |
1415 | sgcount = ldio->sge_count; | |
94cd65dd SS |
1416 | printk(KERN_ERR "megasas[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x," |
1417 | " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n", | |
1418 | instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id, | |
1419 | le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi), | |
1420 | le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount); | |
658dcedb SP |
1421 | } |
1422 | else { | |
1423 | pthru = (struct megasas_pthru_frame *) cmd->frame; | |
1424 | mfi_sgl = &pthru->sgl; | |
1425 | sgcount = pthru->sge_count; | |
94cd65dd SS |
1426 | printk(KERN_ERR "megasas[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, " |
1427 | "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n", | |
1428 | instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id, | |
1429 | pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len), | |
1430 | le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount); | |
658dcedb SP |
1431 | } |
1432 | if(megasas_dbg_lvl & MEGASAS_DBG_LVL){ | |
1433 | for (n = 0; n < sgcount; n++){ | |
1434 | if (IS_DMA64) | |
94cd65dd SS |
1435 | printk(KERN_ERR "megasas: sgl len : 0x%x, sgl addr : 0x%llx ", |
1436 | le32_to_cpu(mfi_sgl->sge64[n].length), | |
1437 | le64_to_cpu(mfi_sgl->sge64[n].phys_addr)); | |
658dcedb | 1438 | else |
94cd65dd SS |
1439 | printk(KERN_ERR "megasas: sgl len : 0x%x, sgl addr : 0x%x ", |
1440 | le32_to_cpu(mfi_sgl->sge32[n].length), | |
1441 | le32_to_cpu(mfi_sgl->sge32[n].phys_addr)); | |
658dcedb SP |
1442 | } |
1443 | } | |
1444 | printk(KERN_ERR "\n"); | |
1445 | } /*for max_cmd*/ | |
1446 | printk(KERN_ERR "\nmegasas[%d]: Pending Internal cmds in FW : \n",instance->host->host_no); | |
1447 | for (i = 0; i < max_cmd; i++) { | |
1448 | ||
1449 | cmd = instance->cmd_list[i]; | |
1450 | ||
1451 | if(cmd->sync_cmd == 1){ | |
1452 | printk(KERN_ERR "0x%08lx : ", (unsigned long)cmd->frame_phys_addr); | |
1453 | } | |
1454 | } | |
1455 | printk(KERN_ERR "megasas[%d]: Dumping Done.\n\n",instance->host->host_no); | |
1456 | } | |
1457 | ||
cd50ba8e | 1458 | u32 |
1459 | megasas_build_and_issue_cmd(struct megasas_instance *instance, | |
1460 | struct scsi_cmnd *scmd) | |
1461 | { | |
1462 | struct megasas_cmd *cmd; | |
1463 | u32 frame_count; | |
1464 | ||
1465 | cmd = megasas_get_cmd(instance); | |
1466 | if (!cmd) | |
1467 | return SCSI_MLQUEUE_HOST_BUSY; | |
1468 | ||
1469 | /* | |
1470 | * Logical drive command | |
1471 | */ | |
1472 | if (megasas_is_ldio(scmd)) | |
1473 | frame_count = megasas_build_ldio(instance, scmd, cmd); | |
1474 | else | |
1475 | frame_count = megasas_build_dcdb(instance, scmd, cmd); | |
1476 | ||
1477 | if (!frame_count) | |
1478 | goto out_return_cmd; | |
1479 | ||
1480 | cmd->scmd = scmd; | |
1481 | scmd->SCp.ptr = (char *)cmd; | |
1482 | ||
1483 | /* | |
1484 | * Issue the command to the FW | |
1485 | */ | |
1486 | atomic_inc(&instance->fw_outstanding); | |
1487 | ||
1488 | instance->instancet->fire_cmd(instance, cmd->frame_phys_addr, | |
1489 | cmd->frame_count-1, instance->reg_set); | |
cd50ba8e | 1490 | |
1491 | return 0; | |
1492 | out_return_cmd: | |
1493 | megasas_return_cmd(instance, cmd); | |
1494 | return 1; | |
1495 | } | |
1496 | ||
1497 | ||
c4a3e0a5 BS |
1498 | /** |
1499 | * megasas_queue_command - Queue entry point | |
1500 | * @scmd: SCSI command to be queued | |
1501 | * @done: Callback entry point | |
1502 | */ | |
1503 | static int | |
f281233d | 1504 | megasas_queue_command_lck(struct scsi_cmnd *scmd, void (*done) (struct scsi_cmnd *)) |
c4a3e0a5 | 1505 | { |
c4a3e0a5 | 1506 | struct megasas_instance *instance; |
39a98554 | 1507 | unsigned long flags; |
c4a3e0a5 BS |
1508 | |
1509 | instance = (struct megasas_instance *) | |
1510 | scmd->device->host->hostdata; | |
af37acfb | 1511 | |
39a98554 | 1512 | if (instance->issuepend_done == 0) |
af37acfb SP |
1513 | return SCSI_MLQUEUE_HOST_BUSY; |
1514 | ||
39a98554 | 1515 | spin_lock_irqsave(&instance->hba_lock, flags); |
b09e66da SS |
1516 | |
1517 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) { | |
1518 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
1519 | scmd->result = DID_ERROR << 16; | |
1520 | done(scmd); | |
1521 | return 0; | |
1522 | } | |
1523 | ||
39a98554 | 1524 | if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) { |
1525 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
1526 | return SCSI_MLQUEUE_HOST_BUSY; | |
1527 | } | |
1528 | ||
1529 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
1530 | ||
c4a3e0a5 BS |
1531 | scmd->scsi_done = done; |
1532 | scmd->result = 0; | |
1533 | ||
cb59aa6a SP |
1534 | if (MEGASAS_IS_LOGICAL(scmd) && |
1535 | (scmd->device->id >= MEGASAS_MAX_LD || scmd->device->lun)) { | |
1536 | scmd->result = DID_BAD_TARGET << 16; | |
1537 | goto out_done; | |
c4a3e0a5 BS |
1538 | } |
1539 | ||
02b01e01 SP |
1540 | switch (scmd->cmnd[0]) { |
1541 | case SYNCHRONIZE_CACHE: | |
1542 | /* | |
1543 | * FW takes care of flush cache on its own | |
1544 | * No need to send it down | |
1545 | */ | |
1546 | scmd->result = DID_OK << 16; | |
1547 | goto out_done; | |
1548 | default: | |
1549 | break; | |
1550 | } | |
1551 | ||
cd50ba8e | 1552 | if (instance->instancet->build_and_issue_cmd(instance, scmd)) { |
1553 | printk(KERN_ERR "megasas: Err returned from build_and_issue_cmd\n"); | |
cb59aa6a | 1554 | return SCSI_MLQUEUE_HOST_BUSY; |
cd50ba8e | 1555 | } |
c4a3e0a5 BS |
1556 | |
1557 | return 0; | |
cb59aa6a | 1558 | |
cb59aa6a SP |
1559 | out_done: |
1560 | done(scmd); | |
1561 | return 0; | |
c4a3e0a5 BS |
1562 | } |
1563 | ||
f281233d JG |
1564 | static DEF_SCSI_QCMD(megasas_queue_command) |
1565 | ||
044833b5 YB |
1566 | static struct megasas_instance *megasas_lookup_instance(u16 host_no) |
1567 | { | |
1568 | int i; | |
1569 | ||
1570 | for (i = 0; i < megasas_mgmt_info.max_index; i++) { | |
1571 | ||
1572 | if ((megasas_mgmt_info.instance[i]) && | |
1573 | (megasas_mgmt_info.instance[i]->host->host_no == host_no)) | |
1574 | return megasas_mgmt_info.instance[i]; | |
1575 | } | |
1576 | ||
1577 | return NULL; | |
1578 | } | |
1579 | ||
147aab6a CH |
1580 | static int megasas_slave_configure(struct scsi_device *sdev) |
1581 | { | |
044833b5 YB |
1582 | u16 pd_index = 0; |
1583 | struct megasas_instance *instance ; | |
1584 | ||
1585 | instance = megasas_lookup_instance(sdev->host->host_no); | |
1586 | ||
147aab6a | 1587 | /* |
044833b5 YB |
1588 | * Don't export physical disk devices to the disk driver. |
1589 | * | |
1590 | * FIXME: Currently we don't export them to the midlayer at all. | |
1591 | * That will be fixed once LSI engineers have audited the | |
1592 | * firmware for possible issues. | |
1593 | */ | |
1594 | if (sdev->channel < MEGASAS_MAX_PD_CHANNELS && | |
1595 | sdev->type == TYPE_DISK) { | |
1596 | pd_index = (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + | |
1597 | sdev->id; | |
1598 | if (instance->pd_list[pd_index].driveState == | |
1599 | MR_PD_STATE_SYSTEM) { | |
1600 | blk_queue_rq_timeout(sdev->request_queue, | |
1601 | MEGASAS_DEFAULT_CMD_TIMEOUT * HZ); | |
1602 | return 0; | |
1603 | } | |
147aab6a | 1604 | return -ENXIO; |
044833b5 | 1605 | } |
e5b3a65f CH |
1606 | |
1607 | /* | |
044833b5 YB |
1608 | * The RAID firmware may require extended timeouts. |
1609 | */ | |
1610 | blk_queue_rq_timeout(sdev->request_queue, | |
1611 | MEGASAS_DEFAULT_CMD_TIMEOUT * HZ); | |
1612 | return 0; | |
1613 | } | |
1614 | ||
1615 | static int megasas_slave_alloc(struct scsi_device *sdev) | |
1616 | { | |
1617 | u16 pd_index = 0; | |
1618 | struct megasas_instance *instance ; | |
1619 | instance = megasas_lookup_instance(sdev->host->host_no); | |
1620 | if ((sdev->channel < MEGASAS_MAX_PD_CHANNELS) && | |
1621 | (sdev->type == TYPE_DISK)) { | |
1622 | /* | |
1623 | * Open the OS scan to the SYSTEM PD | |
1624 | */ | |
1625 | pd_index = | |
1626 | (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + | |
1627 | sdev->id; | |
1628 | if ((instance->pd_list[pd_index].driveState == | |
1629 | MR_PD_STATE_SYSTEM) && | |
1630 | (instance->pd_list[pd_index].driveType == | |
1631 | TYPE_DISK)) { | |
1632 | return 0; | |
1633 | } | |
1634 | return -ENXIO; | |
1635 | } | |
147aab6a CH |
1636 | return 0; |
1637 | } | |
1638 | ||
9c915a8c | 1639 | void megaraid_sas_kill_hba(struct megasas_instance *instance) |
39a98554 | 1640 | { |
1641 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) || | |
9c915a8c | 1642 | (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) || |
36807e67 | 1643 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) || |
21d3c710 SS |
1644 | (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || |
1645 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) { | |
9c915a8c | 1646 | writel(MFI_STOP_ADP, &instance->reg_set->doorbell); |
39a98554 | 1647 | } else { |
9c915a8c | 1648 | writel(MFI_STOP_ADP, &instance->reg_set->inbound_doorbell); |
1649 | } | |
1650 | } | |
1651 | ||
1652 | /** | |
1653 | * megasas_check_and_restore_queue_depth - Check if queue depth needs to be | |
1654 | * restored to max value | |
1655 | * @instance: Adapter soft state | |
1656 | * | |
1657 | */ | |
1658 | void | |
1659 | megasas_check_and_restore_queue_depth(struct megasas_instance *instance) | |
1660 | { | |
1661 | unsigned long flags; | |
1662 | if (instance->flag & MEGASAS_FW_BUSY | |
c5daa6a9 | 1663 | && time_after(jiffies, instance->last_time + 5 * HZ) |
1664 | && atomic_read(&instance->fw_outstanding) < | |
1665 | instance->throttlequeuedepth + 1) { | |
9c915a8c | 1666 | |
1667 | spin_lock_irqsave(instance->host->host_lock, flags); | |
1668 | instance->flag &= ~MEGASAS_FW_BUSY; | |
404a8a1a | 1669 | if (instance->is_imr) { |
9c915a8c | 1670 | instance->host->can_queue = |
1671 | instance->max_fw_cmds - MEGASAS_SKINNY_INT_CMDS; | |
1672 | } else | |
1673 | instance->host->can_queue = | |
1674 | instance->max_fw_cmds - MEGASAS_INT_CMDS; | |
1675 | ||
1676 | spin_unlock_irqrestore(instance->host->host_lock, flags); | |
39a98554 | 1677 | } |
1678 | } | |
1679 | ||
7343eb65 | 1680 | /** |
1681 | * megasas_complete_cmd_dpc - Returns FW's controller structure | |
1682 | * @instance_addr: Address of adapter soft state | |
1683 | * | |
1684 | * Tasklet to complete cmds | |
1685 | */ | |
1686 | static void megasas_complete_cmd_dpc(unsigned long instance_addr) | |
1687 | { | |
1688 | u32 producer; | |
1689 | u32 consumer; | |
1690 | u32 context; | |
1691 | struct megasas_cmd *cmd; | |
1692 | struct megasas_instance *instance = | |
1693 | (struct megasas_instance *)instance_addr; | |
1694 | unsigned long flags; | |
1695 | ||
1696 | /* If we have already declared adapter dead, donot complete cmds */ | |
39a98554 | 1697 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR ) |
7343eb65 | 1698 | return; |
1699 | ||
1700 | spin_lock_irqsave(&instance->completion_lock, flags); | |
1701 | ||
94cd65dd SS |
1702 | producer = le32_to_cpu(*instance->producer); |
1703 | consumer = le32_to_cpu(*instance->consumer); | |
7343eb65 | 1704 | |
1705 | while (consumer != producer) { | |
94cd65dd | 1706 | context = le32_to_cpu(instance->reply_queue[consumer]); |
39a98554 | 1707 | if (context >= instance->max_fw_cmds) { |
1708 | printk(KERN_ERR "Unexpected context value %x\n", | |
1709 | context); | |
1710 | BUG(); | |
1711 | } | |
7343eb65 | 1712 | |
1713 | cmd = instance->cmd_list[context]; | |
1714 | ||
1715 | megasas_complete_cmd(instance, cmd, DID_OK); | |
1716 | ||
1717 | consumer++; | |
1718 | if (consumer == (instance->max_fw_cmds + 1)) { | |
1719 | consumer = 0; | |
1720 | } | |
1721 | } | |
1722 | ||
94cd65dd | 1723 | *instance->consumer = cpu_to_le32(producer); |
7343eb65 | 1724 | |
1725 | spin_unlock_irqrestore(&instance->completion_lock, flags); | |
1726 | ||
1727 | /* | |
1728 | * Check if we can restore can_queue | |
1729 | */ | |
9c915a8c | 1730 | megasas_check_and_restore_queue_depth(instance); |
7343eb65 | 1731 | } |
1732 | ||
707e09bd YB |
1733 | static void |
1734 | megasas_internal_reset_defer_cmds(struct megasas_instance *instance); | |
1735 | ||
1736 | static void | |
1737 | process_fw_state_change_wq(struct work_struct *work); | |
1738 | ||
1739 | void megasas_do_ocr(struct megasas_instance *instance) | |
1740 | { | |
1741 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) || | |
1742 | (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) || | |
1743 | (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) { | |
94cd65dd | 1744 | *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN); |
707e09bd | 1745 | } |
d46a3ad6 | 1746 | instance->instancet->disable_intr(instance); |
707e09bd YB |
1747 | instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT; |
1748 | instance->issuepend_done = 0; | |
1749 | ||
1750 | atomic_set(&instance->fw_outstanding, 0); | |
1751 | megasas_internal_reset_defer_cmds(instance); | |
1752 | process_fw_state_change_wq(&instance->work_init); | |
1753 | } | |
1754 | ||
c4a3e0a5 BS |
1755 | /** |
1756 | * megasas_wait_for_outstanding - Wait for all outstanding cmds | |
1757 | * @instance: Adapter soft state | |
1758 | * | |
25985edc | 1759 | * This function waits for up to MEGASAS_RESET_WAIT_TIME seconds for FW to |
c4a3e0a5 BS |
1760 | * complete all its outstanding commands. Returns error if one or more IOs |
1761 | * are pending after this time period. It also marks the controller dead. | |
1762 | */ | |
1763 | static int megasas_wait_for_outstanding(struct megasas_instance *instance) | |
1764 | { | |
1765 | int i; | |
39a98554 | 1766 | u32 reset_index; |
c4a3e0a5 | 1767 | u32 wait_time = MEGASAS_RESET_WAIT_TIME; |
39a98554 | 1768 | u8 adprecovery; |
1769 | unsigned long flags; | |
1770 | struct list_head clist_local; | |
1771 | struct megasas_cmd *reset_cmd; | |
707e09bd YB |
1772 | u32 fw_state; |
1773 | u8 kill_adapter_flag; | |
39a98554 | 1774 | |
1775 | spin_lock_irqsave(&instance->hba_lock, flags); | |
1776 | adprecovery = instance->adprecovery; | |
1777 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
1778 | ||
1779 | if (adprecovery != MEGASAS_HBA_OPERATIONAL) { | |
1780 | ||
1781 | INIT_LIST_HEAD(&clist_local); | |
1782 | spin_lock_irqsave(&instance->hba_lock, flags); | |
1783 | list_splice_init(&instance->internal_reset_pending_q, | |
1784 | &clist_local); | |
1785 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
1786 | ||
1787 | printk(KERN_NOTICE "megasas: HBA reset wait ...\n"); | |
1788 | for (i = 0; i < wait_time; i++) { | |
1789 | msleep(1000); | |
1790 | spin_lock_irqsave(&instance->hba_lock, flags); | |
1791 | adprecovery = instance->adprecovery; | |
1792 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
1793 | if (adprecovery == MEGASAS_HBA_OPERATIONAL) | |
1794 | break; | |
1795 | } | |
1796 | ||
1797 | if (adprecovery != MEGASAS_HBA_OPERATIONAL) { | |
1798 | printk(KERN_NOTICE "megasas: reset: Stopping HBA.\n"); | |
1799 | spin_lock_irqsave(&instance->hba_lock, flags); | |
1800 | instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR; | |
1801 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
1802 | return FAILED; | |
1803 | } | |
1804 | ||
1805 | reset_index = 0; | |
1806 | while (!list_empty(&clist_local)) { | |
1807 | reset_cmd = list_entry((&clist_local)->next, | |
1808 | struct megasas_cmd, list); | |
1809 | list_del_init(&reset_cmd->list); | |
1810 | if (reset_cmd->scmd) { | |
1811 | reset_cmd->scmd->result = DID_RESET << 16; | |
5cd049a5 | 1812 | printk(KERN_NOTICE "%d:%p reset [%02x]\n", |
39a98554 | 1813 | reset_index, reset_cmd, |
5cd049a5 | 1814 | reset_cmd->scmd->cmnd[0]); |
39a98554 | 1815 | |
1816 | reset_cmd->scmd->scsi_done(reset_cmd->scmd); | |
1817 | megasas_return_cmd(instance, reset_cmd); | |
1818 | } else if (reset_cmd->sync_cmd) { | |
1819 | printk(KERN_NOTICE "megasas:%p synch cmds" | |
1820 | "reset queue\n", | |
1821 | reset_cmd); | |
1822 | ||
1823 | reset_cmd->cmd_status = ENODATA; | |
1824 | instance->instancet->fire_cmd(instance, | |
1825 | reset_cmd->frame_phys_addr, | |
1826 | 0, instance->reg_set); | |
1827 | } else { | |
1828 | printk(KERN_NOTICE "megasas: %p unexpected" | |
1829 | "cmds lst\n", | |
1830 | reset_cmd); | |
1831 | } | |
1832 | reset_index++; | |
1833 | } | |
1834 | ||
1835 | return SUCCESS; | |
1836 | } | |
c4a3e0a5 | 1837 | |
c007b8b2 | 1838 | for (i = 0; i < resetwaittime; i++) { |
c4a3e0a5 | 1839 | |
e4a082c7 SP |
1840 | int outstanding = atomic_read(&instance->fw_outstanding); |
1841 | ||
1842 | if (!outstanding) | |
c4a3e0a5 BS |
1843 | break; |
1844 | ||
1845 | if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) { | |
1846 | printk(KERN_NOTICE "megasas: [%2d]waiting for %d " | |
e4a082c7 | 1847 | "commands to complete\n",i,outstanding); |
7343eb65 | 1848 | /* |
1849 | * Call cmd completion routine. Cmd to be | |
1850 | * be completed directly without depending on isr. | |
1851 | */ | |
1852 | megasas_complete_cmd_dpc((unsigned long)instance); | |
c4a3e0a5 BS |
1853 | } |
1854 | ||
1855 | msleep(1000); | |
1856 | } | |
1857 | ||
707e09bd YB |
1858 | i = 0; |
1859 | kill_adapter_flag = 0; | |
1860 | do { | |
1861 | fw_state = instance->instancet->read_fw_status_reg( | |
1862 | instance->reg_set) & MFI_STATE_MASK; | |
1863 | if ((fw_state == MFI_STATE_FAULT) && | |
1864 | (instance->disableOnlineCtrlReset == 0)) { | |
1865 | if (i == 3) { | |
1866 | kill_adapter_flag = 2; | |
1867 | break; | |
1868 | } | |
1869 | megasas_do_ocr(instance); | |
1870 | kill_adapter_flag = 1; | |
1871 | ||
1872 | /* wait for 1 secs to let FW finish the pending cmds */ | |
1873 | msleep(1000); | |
1874 | } | |
1875 | i++; | |
1876 | } while (i <= 3); | |
1877 | ||
1878 | if (atomic_read(&instance->fw_outstanding) && | |
1879 | !kill_adapter_flag) { | |
1880 | if (instance->disableOnlineCtrlReset == 0) { | |
1881 | ||
1882 | megasas_do_ocr(instance); | |
1883 | ||
1884 | /* wait for 5 secs to let FW finish the pending cmds */ | |
1885 | for (i = 0; i < wait_time; i++) { | |
1886 | int outstanding = | |
1887 | atomic_read(&instance->fw_outstanding); | |
1888 | if (!outstanding) | |
1889 | return SUCCESS; | |
1890 | msleep(1000); | |
1891 | } | |
1892 | } | |
1893 | } | |
1894 | ||
1895 | if (atomic_read(&instance->fw_outstanding) || | |
1896 | (kill_adapter_flag == 2)) { | |
39a98554 | 1897 | printk(KERN_NOTICE "megaraid_sas: pending cmds after reset\n"); |
e3bbff9f SP |
1898 | /* |
1899 | * Send signal to FW to stop processing any pending cmds. | |
1900 | * The controller will be taken offline by the OS now. | |
1901 | */ | |
0c79e681 YB |
1902 | if ((instance->pdev->device == |
1903 | PCI_DEVICE_ID_LSI_SAS0073SKINNY) || | |
1904 | (instance->pdev->device == | |
1905 | PCI_DEVICE_ID_LSI_SAS0071SKINNY)) { | |
1906 | writel(MFI_STOP_ADP, | |
9c915a8c | 1907 | &instance->reg_set->doorbell); |
0c79e681 YB |
1908 | } else { |
1909 | writel(MFI_STOP_ADP, | |
e3bbff9f | 1910 | &instance->reg_set->inbound_doorbell); |
0c79e681 | 1911 | } |
658dcedb | 1912 | megasas_dump_pending_frames(instance); |
39a98554 | 1913 | spin_lock_irqsave(&instance->hba_lock, flags); |
1914 | instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR; | |
1915 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
c4a3e0a5 BS |
1916 | return FAILED; |
1917 | } | |
1918 | ||
39a98554 | 1919 | printk(KERN_NOTICE "megaraid_sas: no pending cmds after reset\n"); |
1920 | ||
c4a3e0a5 BS |
1921 | return SUCCESS; |
1922 | } | |
1923 | ||
1924 | /** | |
1925 | * megasas_generic_reset - Generic reset routine | |
1926 | * @scmd: Mid-layer SCSI command | |
1927 | * | |
1928 | * This routine implements a generic reset handler for device, bus and host | |
1929 | * reset requests. Device, bus and host specific reset handlers can use this | |
1930 | * function after they do their specific tasks. | |
1931 | */ | |
1932 | static int megasas_generic_reset(struct scsi_cmnd *scmd) | |
1933 | { | |
1934 | int ret_val; | |
1935 | struct megasas_instance *instance; | |
1936 | ||
1937 | instance = (struct megasas_instance *)scmd->device->host->hostdata; | |
1938 | ||
5cd049a5 CH |
1939 | scmd_printk(KERN_NOTICE, scmd, "megasas: RESET cmd=%x retries=%x\n", |
1940 | scmd->cmnd[0], scmd->retries); | |
c4a3e0a5 | 1941 | |
39a98554 | 1942 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) { |
c4a3e0a5 BS |
1943 | printk(KERN_ERR "megasas: cannot recover from previous reset " |
1944 | "failures\n"); | |
1945 | return FAILED; | |
1946 | } | |
1947 | ||
c4a3e0a5 | 1948 | ret_val = megasas_wait_for_outstanding(instance); |
c4a3e0a5 BS |
1949 | if (ret_val == SUCCESS) |
1950 | printk(KERN_NOTICE "megasas: reset successful \n"); | |
1951 | else | |
1952 | printk(KERN_ERR "megasas: failed to do reset\n"); | |
1953 | ||
c4a3e0a5 BS |
1954 | return ret_val; |
1955 | } | |
1956 | ||
05e9ebbe SP |
1957 | /** |
1958 | * megasas_reset_timer - quiesce the adapter if required | |
1959 | * @scmd: scsi cmnd | |
1960 | * | |
1961 | * Sets the FW busy flag and reduces the host->can_queue if the | |
1962 | * cmd has not been completed within the timeout period. | |
1963 | */ | |
1964 | static enum | |
242f9dcb | 1965 | blk_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd) |
05e9ebbe | 1966 | { |
05e9ebbe SP |
1967 | struct megasas_instance *instance; |
1968 | unsigned long flags; | |
1969 | ||
1970 | if (time_after(jiffies, scmd->jiffies_at_alloc + | |
1971 | (MEGASAS_DEFAULT_CMD_TIMEOUT * 2) * HZ)) { | |
242f9dcb | 1972 | return BLK_EH_NOT_HANDLED; |
05e9ebbe SP |
1973 | } |
1974 | ||
f575c5d3 | 1975 | instance = (struct megasas_instance *)scmd->device->host->hostdata; |
05e9ebbe SP |
1976 | if (!(instance->flag & MEGASAS_FW_BUSY)) { |
1977 | /* FW is busy, throttle IO */ | |
1978 | spin_lock_irqsave(instance->host->host_lock, flags); | |
1979 | ||
c5daa6a9 | 1980 | instance->host->can_queue = instance->throttlequeuedepth; |
05e9ebbe SP |
1981 | instance->last_time = jiffies; |
1982 | instance->flag |= MEGASAS_FW_BUSY; | |
1983 | ||
1984 | spin_unlock_irqrestore(instance->host->host_lock, flags); | |
1985 | } | |
242f9dcb | 1986 | return BLK_EH_RESET_TIMER; |
05e9ebbe SP |
1987 | } |
1988 | ||
c4a3e0a5 BS |
1989 | /** |
1990 | * megasas_reset_device - Device reset handler entry point | |
1991 | */ | |
1992 | static int megasas_reset_device(struct scsi_cmnd *scmd) | |
1993 | { | |
1994 | int ret; | |
1995 | ||
1996 | /* | |
1997 | * First wait for all commands to complete | |
1998 | */ | |
1999 | ret = megasas_generic_reset(scmd); | |
2000 | ||
2001 | return ret; | |
2002 | } | |
2003 | ||
2004 | /** | |
2005 | * megasas_reset_bus_host - Bus & host reset handler entry point | |
2006 | */ | |
2007 | static int megasas_reset_bus_host(struct scsi_cmnd *scmd) | |
2008 | { | |
2009 | int ret; | |
9c915a8c | 2010 | struct megasas_instance *instance; |
2011 | instance = (struct megasas_instance *)scmd->device->host->hostdata; | |
c4a3e0a5 BS |
2012 | |
2013 | /* | |
80682fa9 | 2014 | * First wait for all commands to complete |
c4a3e0a5 | 2015 | */ |
36807e67 | 2016 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) || |
21d3c710 SS |
2017 | (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || |
2018 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) | |
9c915a8c | 2019 | ret = megasas_reset_fusion(scmd->device->host); |
2020 | else | |
2021 | ret = megasas_generic_reset(scmd); | |
c4a3e0a5 BS |
2022 | |
2023 | return ret; | |
2024 | } | |
2025 | ||
cf62a0a5 SP |
2026 | /** |
2027 | * megasas_bios_param - Returns disk geometry for a disk | |
2028 | * @sdev: device handle | |
2029 | * @bdev: block device | |
2030 | * @capacity: drive capacity | |
2031 | * @geom: geometry parameters | |
2032 | */ | |
2033 | static int | |
2034 | megasas_bios_param(struct scsi_device *sdev, struct block_device *bdev, | |
2035 | sector_t capacity, int geom[]) | |
2036 | { | |
2037 | int heads; | |
2038 | int sectors; | |
2039 | sector_t cylinders; | |
2040 | unsigned long tmp; | |
2041 | /* Default heads (64) & sectors (32) */ | |
2042 | heads = 64; | |
2043 | sectors = 32; | |
2044 | ||
2045 | tmp = heads * sectors; | |
2046 | cylinders = capacity; | |
2047 | ||
2048 | sector_div(cylinders, tmp); | |
2049 | ||
2050 | /* | |
2051 | * Handle extended translation size for logical drives > 1Gb | |
2052 | */ | |
2053 | ||
2054 | if (capacity >= 0x200000) { | |
2055 | heads = 255; | |
2056 | sectors = 63; | |
2057 | tmp = heads*sectors; | |
2058 | cylinders = capacity; | |
2059 | sector_div(cylinders, tmp); | |
2060 | } | |
2061 | ||
2062 | geom[0] = heads; | |
2063 | geom[1] = sectors; | |
2064 | geom[2] = cylinders; | |
2065 | ||
2066 | return 0; | |
2067 | } | |
2068 | ||
7e8a75f4 YB |
2069 | static void megasas_aen_polling(struct work_struct *work); |
2070 | ||
c4a3e0a5 BS |
2071 | /** |
2072 | * megasas_service_aen - Processes an event notification | |
2073 | * @instance: Adapter soft state | |
2074 | * @cmd: AEN command completed by the ISR | |
2075 | * | |
2076 | * For AEN, driver sends a command down to FW that is held by the FW till an | |
2077 | * event occurs. When an event of interest occurs, FW completes the command | |
2078 | * that it was previously holding. | |
2079 | * | |
2080 | * This routines sends SIGIO signal to processes that have registered with the | |
2081 | * driver for AEN. | |
2082 | */ | |
2083 | static void | |
2084 | megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd) | |
2085 | { | |
c3518837 | 2086 | unsigned long flags; |
c4a3e0a5 BS |
2087 | /* |
2088 | * Don't signal app if it is just an aborted previously registered aen | |
2089 | */ | |
c3518837 YB |
2090 | if ((!cmd->abort_aen) && (instance->unload == 0)) { |
2091 | spin_lock_irqsave(&poll_aen_lock, flags); | |
2092 | megasas_poll_wait_aen = 1; | |
2093 | spin_unlock_irqrestore(&poll_aen_lock, flags); | |
2094 | wake_up(&megasas_poll_wait); | |
c4a3e0a5 | 2095 | kill_fasync(&megasas_async_queue, SIGIO, POLL_IN); |
c3518837 | 2096 | } |
c4a3e0a5 BS |
2097 | else |
2098 | cmd->abort_aen = 0; | |
2099 | ||
2100 | instance->aen_cmd = NULL; | |
2101 | megasas_return_cmd(instance, cmd); | |
7e8a75f4 | 2102 | |
39a98554 | 2103 | if ((instance->unload == 0) && |
2104 | ((instance->issuepend_done == 1))) { | |
7e8a75f4 YB |
2105 | struct megasas_aen_event *ev; |
2106 | ev = kzalloc(sizeof(*ev), GFP_ATOMIC); | |
2107 | if (!ev) { | |
2108 | printk(KERN_ERR "megasas_service_aen: out of memory\n"); | |
2109 | } else { | |
2110 | ev->instance = instance; | |
2111 | instance->ev = ev; | |
c1d390d8 XF |
2112 | INIT_DELAYED_WORK(&ev->hotplug_work, |
2113 | megasas_aen_polling); | |
2114 | schedule_delayed_work(&ev->hotplug_work, 0); | |
7e8a75f4 YB |
2115 | } |
2116 | } | |
c4a3e0a5 BS |
2117 | } |
2118 | ||
4bcde509 | 2119 | static int megasas_change_queue_depth(struct scsi_device *sdev, |
2120 | int queue_depth, int reason) | |
2121 | { | |
2122 | if (reason != SCSI_QDEPTH_DEFAULT) | |
2123 | return -EOPNOTSUPP; | |
2124 | ||
2125 | if (queue_depth > sdev->host->can_queue) | |
2126 | queue_depth = sdev->host->can_queue; | |
2127 | scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), | |
2128 | queue_depth); | |
2129 | ||
2130 | return queue_depth; | |
2131 | } | |
2132 | ||
c4a3e0a5 BS |
2133 | /* |
2134 | * Scsi host template for megaraid_sas driver | |
2135 | */ | |
2136 | static struct scsi_host_template megasas_template = { | |
2137 | ||
2138 | .module = THIS_MODULE, | |
f28cd7cf | 2139 | .name = "LSI SAS based MegaRAID driver", |
c4a3e0a5 | 2140 | .proc_name = "megaraid_sas", |
147aab6a | 2141 | .slave_configure = megasas_slave_configure, |
044833b5 | 2142 | .slave_alloc = megasas_slave_alloc, |
c4a3e0a5 BS |
2143 | .queuecommand = megasas_queue_command, |
2144 | .eh_device_reset_handler = megasas_reset_device, | |
2145 | .eh_bus_reset_handler = megasas_reset_bus_host, | |
2146 | .eh_host_reset_handler = megasas_reset_bus_host, | |
05e9ebbe | 2147 | .eh_timed_out = megasas_reset_timer, |
cf62a0a5 | 2148 | .bios_param = megasas_bios_param, |
c4a3e0a5 | 2149 | .use_clustering = ENABLE_CLUSTERING, |
4bcde509 | 2150 | .change_queue_depth = megasas_change_queue_depth, |
54b2b50c | 2151 | .no_write_same = 1, |
c4a3e0a5 BS |
2152 | }; |
2153 | ||
2154 | /** | |
2155 | * megasas_complete_int_cmd - Completes an internal command | |
2156 | * @instance: Adapter soft state | |
2157 | * @cmd: Command to be completed | |
2158 | * | |
2159 | * The megasas_issue_blocked_cmd() function waits for a command to complete | |
2160 | * after it issues a command. This function wakes up that waiting routine by | |
2161 | * calling wake_up() on the wait queue. | |
2162 | */ | |
2163 | static void | |
2164 | megasas_complete_int_cmd(struct megasas_instance *instance, | |
2165 | struct megasas_cmd *cmd) | |
2166 | { | |
2167 | cmd->cmd_status = cmd->frame->io.cmd_status; | |
2168 | ||
2169 | if (cmd->cmd_status == ENODATA) { | |
2170 | cmd->cmd_status = 0; | |
2171 | } | |
2172 | wake_up(&instance->int_cmd_wait_q); | |
2173 | } | |
2174 | ||
2175 | /** | |
2176 | * megasas_complete_abort - Completes aborting a command | |
2177 | * @instance: Adapter soft state | |
2178 | * @cmd: Cmd that was issued to abort another cmd | |
2179 | * | |
0d49016b | 2180 | * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q |
2181 | * after it issues an abort on a previously issued command. This function | |
c4a3e0a5 BS |
2182 | * wakes up all functions waiting on the same wait queue. |
2183 | */ | |
2184 | static void | |
2185 | megasas_complete_abort(struct megasas_instance *instance, | |
2186 | struct megasas_cmd *cmd) | |
2187 | { | |
2188 | if (cmd->sync_cmd) { | |
2189 | cmd->sync_cmd = 0; | |
2190 | cmd->cmd_status = 0; | |
2191 | wake_up(&instance->abort_cmd_wait_q); | |
2192 | } | |
2193 | ||
2194 | return; | |
2195 | } | |
2196 | ||
c4a3e0a5 BS |
2197 | /** |
2198 | * megasas_complete_cmd - Completes a command | |
2199 | * @instance: Adapter soft state | |
2200 | * @cmd: Command to be completed | |
0d49016b | 2201 | * @alt_status: If non-zero, use this value as status to |
c4a3e0a5 BS |
2202 | * SCSI mid-layer instead of the value returned |
2203 | * by the FW. This should be used if caller wants | |
2204 | * an alternate status (as in the case of aborted | |
2205 | * commands) | |
2206 | */ | |
9c915a8c | 2207 | void |
c4a3e0a5 BS |
2208 | megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd, |
2209 | u8 alt_status) | |
2210 | { | |
2211 | int exception = 0; | |
2212 | struct megasas_header *hdr = &cmd->frame->hdr; | |
c3518837 | 2213 | unsigned long flags; |
9c915a8c | 2214 | struct fusion_context *fusion = instance->ctrl_context; |
94cd65dd | 2215 | u32 opcode; |
c4a3e0a5 | 2216 | |
39a98554 | 2217 | /* flag for the retry reset */ |
2218 | cmd->retry_for_fw_reset = 0; | |
2219 | ||
05e9ebbe SP |
2220 | if (cmd->scmd) |
2221 | cmd->scmd->SCp.ptr = NULL; | |
c4a3e0a5 BS |
2222 | |
2223 | switch (hdr->cmd) { | |
e5f93a36 | 2224 | case MFI_CMD_INVALID: |
2225 | /* Some older 1068 controller FW may keep a pended | |
2226 | MR_DCMD_CTRL_EVENT_GET_INFO left over from the main kernel | |
2227 | when booting the kdump kernel. Ignore this command to | |
2228 | prevent a kernel panic on shutdown of the kdump kernel. */ | |
2229 | printk(KERN_WARNING "megaraid_sas: MFI_CMD_INVALID command " | |
2230 | "completed.\n"); | |
2231 | printk(KERN_WARNING "megaraid_sas: If you have a controller " | |
2232 | "other than PERC5, please upgrade your firmware.\n"); | |
2233 | break; | |
c4a3e0a5 BS |
2234 | case MFI_CMD_PD_SCSI_IO: |
2235 | case MFI_CMD_LD_SCSI_IO: | |
2236 | ||
2237 | /* | |
2238 | * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been | |
2239 | * issued either through an IO path or an IOCTL path. If it | |
2240 | * was via IOCTL, we will send it to internal completion. | |
2241 | */ | |
2242 | if (cmd->sync_cmd) { | |
2243 | cmd->sync_cmd = 0; | |
2244 | megasas_complete_int_cmd(instance, cmd); | |
2245 | break; | |
2246 | } | |
2247 | ||
c4a3e0a5 BS |
2248 | case MFI_CMD_LD_READ: |
2249 | case MFI_CMD_LD_WRITE: | |
2250 | ||
2251 | if (alt_status) { | |
2252 | cmd->scmd->result = alt_status << 16; | |
2253 | exception = 1; | |
2254 | } | |
2255 | ||
2256 | if (exception) { | |
2257 | ||
e4a082c7 | 2258 | atomic_dec(&instance->fw_outstanding); |
c4a3e0a5 | 2259 | |
155d98f0 | 2260 | scsi_dma_unmap(cmd->scmd); |
c4a3e0a5 BS |
2261 | cmd->scmd->scsi_done(cmd->scmd); |
2262 | megasas_return_cmd(instance, cmd); | |
2263 | ||
2264 | break; | |
2265 | } | |
2266 | ||
2267 | switch (hdr->cmd_status) { | |
2268 | ||
2269 | case MFI_STAT_OK: | |
2270 | cmd->scmd->result = DID_OK << 16; | |
2271 | break; | |
2272 | ||
2273 | case MFI_STAT_SCSI_IO_FAILED: | |
2274 | case MFI_STAT_LD_INIT_IN_PROGRESS: | |
2275 | cmd->scmd->result = | |
2276 | (DID_ERROR << 16) | hdr->scsi_status; | |
2277 | break; | |
2278 | ||
2279 | case MFI_STAT_SCSI_DONE_WITH_ERROR: | |
2280 | ||
2281 | cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status; | |
2282 | ||
2283 | if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) { | |
2284 | memset(cmd->scmd->sense_buffer, 0, | |
2285 | SCSI_SENSE_BUFFERSIZE); | |
2286 | memcpy(cmd->scmd->sense_buffer, cmd->sense, | |
2287 | hdr->sense_len); | |
2288 | ||
2289 | cmd->scmd->result |= DRIVER_SENSE << 24; | |
2290 | } | |
2291 | ||
2292 | break; | |
2293 | ||
2294 | case MFI_STAT_LD_OFFLINE: | |
2295 | case MFI_STAT_DEVICE_NOT_FOUND: | |
2296 | cmd->scmd->result = DID_BAD_TARGET << 16; | |
2297 | break; | |
2298 | ||
2299 | default: | |
2300 | printk(KERN_DEBUG "megasas: MFI FW status %#x\n", | |
2301 | hdr->cmd_status); | |
2302 | cmd->scmd->result = DID_ERROR << 16; | |
2303 | break; | |
2304 | } | |
2305 | ||
e4a082c7 | 2306 | atomic_dec(&instance->fw_outstanding); |
c4a3e0a5 | 2307 | |
155d98f0 | 2308 | scsi_dma_unmap(cmd->scmd); |
c4a3e0a5 BS |
2309 | cmd->scmd->scsi_done(cmd->scmd); |
2310 | megasas_return_cmd(instance, cmd); | |
2311 | ||
2312 | break; | |
2313 | ||
2314 | case MFI_CMD_SMP: | |
2315 | case MFI_CMD_STP: | |
2316 | case MFI_CMD_DCMD: | |
94cd65dd | 2317 | opcode = le32_to_cpu(cmd->frame->dcmd.opcode); |
9c915a8c | 2318 | /* Check for LD map update */ |
94cd65dd SS |
2319 | if ((opcode == MR_DCMD_LD_MAP_GET_INFO) |
2320 | && (cmd->frame->dcmd.mbox.b[1] == 1)) { | |
bc93d425 | 2321 | fusion->fast_path_io = 0; |
9c915a8c | 2322 | spin_lock_irqsave(instance->host->host_lock, flags); |
2323 | if (cmd->frame->hdr.cmd_status != 0) { | |
2324 | if (cmd->frame->hdr.cmd_status != | |
2325 | MFI_STAT_NOT_FOUND) | |
2326 | printk(KERN_WARNING "megasas: map sync" | |
2327 | "failed, status = 0x%x.\n", | |
2328 | cmd->frame->hdr.cmd_status); | |
2329 | else { | |
2330 | megasas_return_cmd(instance, cmd); | |
2331 | spin_unlock_irqrestore( | |
2332 | instance->host->host_lock, | |
2333 | flags); | |
2334 | break; | |
2335 | } | |
2336 | } else | |
2337 | instance->map_id++; | |
2338 | megasas_return_cmd(instance, cmd); | |
bc93d425 SS |
2339 | |
2340 | /* | |
2341 | * Set fast path IO to ZERO. | |
2342 | * Validate Map will set proper value. | |
2343 | * Meanwhile all IOs will go as LD IO. | |
2344 | */ | |
2345 | if (MR_ValidateMapInfo(instance)) | |
9c915a8c | 2346 | fusion->fast_path_io = 1; |
2347 | else | |
2348 | fusion->fast_path_io = 0; | |
2349 | megasas_sync_map_info(instance); | |
2350 | spin_unlock_irqrestore(instance->host->host_lock, | |
2351 | flags); | |
2352 | break; | |
2353 | } | |
94cd65dd SS |
2354 | if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO || |
2355 | opcode == MR_DCMD_CTRL_EVENT_GET) { | |
c3518837 YB |
2356 | spin_lock_irqsave(&poll_aen_lock, flags); |
2357 | megasas_poll_wait_aen = 0; | |
2358 | spin_unlock_irqrestore(&poll_aen_lock, flags); | |
2359 | } | |
c4a3e0a5 BS |
2360 | |
2361 | /* | |
2362 | * See if got an event notification | |
2363 | */ | |
94cd65dd | 2364 | if (opcode == MR_DCMD_CTRL_EVENT_WAIT) |
c4a3e0a5 BS |
2365 | megasas_service_aen(instance, cmd); |
2366 | else | |
2367 | megasas_complete_int_cmd(instance, cmd); | |
2368 | ||
2369 | break; | |
2370 | ||
2371 | case MFI_CMD_ABORT: | |
2372 | /* | |
2373 | * Cmd issued to abort another cmd returned | |
2374 | */ | |
2375 | megasas_complete_abort(instance, cmd); | |
2376 | break; | |
2377 | ||
2378 | default: | |
2379 | printk("megasas: Unknown command completed! [0x%X]\n", | |
2380 | hdr->cmd); | |
2381 | break; | |
2382 | } | |
2383 | } | |
2384 | ||
39a98554 | 2385 | /** |
2386 | * megasas_issue_pending_cmds_again - issue all pending cmds | |
2387 | * in FW again because of the fw reset | |
2388 | * @instance: Adapter soft state | |
2389 | */ | |
2390 | static inline void | |
2391 | megasas_issue_pending_cmds_again(struct megasas_instance *instance) | |
2392 | { | |
2393 | struct megasas_cmd *cmd; | |
2394 | struct list_head clist_local; | |
2395 | union megasas_evt_class_locale class_locale; | |
2396 | unsigned long flags; | |
2397 | u32 seq_num; | |
2398 | ||
2399 | INIT_LIST_HEAD(&clist_local); | |
2400 | spin_lock_irqsave(&instance->hba_lock, flags); | |
2401 | list_splice_init(&instance->internal_reset_pending_q, &clist_local); | |
2402 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
2403 | ||
2404 | while (!list_empty(&clist_local)) { | |
2405 | cmd = list_entry((&clist_local)->next, | |
2406 | struct megasas_cmd, list); | |
2407 | list_del_init(&cmd->list); | |
2408 | ||
2409 | if (cmd->sync_cmd || cmd->scmd) { | |
2410 | printk(KERN_NOTICE "megaraid_sas: command %p, %p:%d" | |
2411 | "detected to be pending while HBA reset.\n", | |
2412 | cmd, cmd->scmd, cmd->sync_cmd); | |
2413 | ||
2414 | cmd->retry_for_fw_reset++; | |
2415 | ||
2416 | if (cmd->retry_for_fw_reset == 3) { | |
2417 | printk(KERN_NOTICE "megaraid_sas: cmd %p, %p:%d" | |
2418 | "was tried multiple times during reset." | |
2419 | "Shutting down the HBA\n", | |
2420 | cmd, cmd->scmd, cmd->sync_cmd); | |
2421 | megaraid_sas_kill_hba(instance); | |
2422 | ||
2423 | instance->adprecovery = | |
2424 | MEGASAS_HW_CRITICAL_ERROR; | |
2425 | return; | |
2426 | } | |
2427 | } | |
2428 | ||
2429 | if (cmd->sync_cmd == 1) { | |
2430 | if (cmd->scmd) { | |
2431 | printk(KERN_NOTICE "megaraid_sas: unexpected" | |
2432 | "cmd attached to internal command!\n"); | |
2433 | } | |
2434 | printk(KERN_NOTICE "megasas: %p synchronous cmd" | |
2435 | "on the internal reset queue," | |
2436 | "issue it again.\n", cmd); | |
2437 | cmd->cmd_status = ENODATA; | |
2438 | instance->instancet->fire_cmd(instance, | |
2439 | cmd->frame_phys_addr , | |
2440 | 0, instance->reg_set); | |
2441 | } else if (cmd->scmd) { | |
5cd049a5 | 2442 | printk(KERN_NOTICE "megasas: %p scsi cmd [%02x]" |
39a98554 | 2443 | "detected on the internal queue, issue again.\n", |
5cd049a5 | 2444 | cmd, cmd->scmd->cmnd[0]); |
39a98554 | 2445 | |
2446 | atomic_inc(&instance->fw_outstanding); | |
2447 | instance->instancet->fire_cmd(instance, | |
2448 | cmd->frame_phys_addr, | |
2449 | cmd->frame_count-1, instance->reg_set); | |
2450 | } else { | |
2451 | printk(KERN_NOTICE "megasas: %p unexpected cmd on the" | |
2452 | "internal reset defer list while re-issue!!\n", | |
2453 | cmd); | |
2454 | } | |
2455 | } | |
2456 | ||
2457 | if (instance->aen_cmd) { | |
2458 | printk(KERN_NOTICE "megaraid_sas: aen_cmd in def process\n"); | |
2459 | megasas_return_cmd(instance, instance->aen_cmd); | |
2460 | ||
2461 | instance->aen_cmd = NULL; | |
2462 | } | |
2463 | ||
2464 | /* | |
2465 | * Initiate AEN (Asynchronous Event Notification) | |
2466 | */ | |
2467 | seq_num = instance->last_seq_num; | |
2468 | class_locale.members.reserved = 0; | |
2469 | class_locale.members.locale = MR_EVT_LOCALE_ALL; | |
2470 | class_locale.members.class = MR_EVT_CLASS_DEBUG; | |
2471 | ||
2472 | megasas_register_aen(instance, seq_num, class_locale.word); | |
2473 | } | |
2474 | ||
2475 | /** | |
2476 | * Move the internal reset pending commands to a deferred queue. | |
2477 | * | |
2478 | * We move the commands pending at internal reset time to a | |
2479 | * pending queue. This queue would be flushed after successful | |
2480 | * completion of the internal reset sequence. if the internal reset | |
2481 | * did not complete in time, the kernel reset handler would flush | |
2482 | * these commands. | |
2483 | **/ | |
2484 | static void | |
2485 | megasas_internal_reset_defer_cmds(struct megasas_instance *instance) | |
2486 | { | |
2487 | struct megasas_cmd *cmd; | |
2488 | int i; | |
2489 | u32 max_cmd = instance->max_fw_cmds; | |
2490 | u32 defer_index; | |
2491 | unsigned long flags; | |
2492 | ||
2493 | defer_index = 0; | |
2494 | spin_lock_irqsave(&instance->cmd_pool_lock, flags); | |
2495 | for (i = 0; i < max_cmd; i++) { | |
2496 | cmd = instance->cmd_list[i]; | |
2497 | if (cmd->sync_cmd == 1 || cmd->scmd) { | |
2498 | printk(KERN_NOTICE "megasas: moving cmd[%d]:%p:%d:%p" | |
2499 | "on the defer queue as internal\n", | |
2500 | defer_index, cmd, cmd->sync_cmd, cmd->scmd); | |
2501 | ||
2502 | if (!list_empty(&cmd->list)) { | |
2503 | printk(KERN_NOTICE "megaraid_sas: ERROR while" | |
2504 | " moving this cmd:%p, %d %p, it was" | |
2505 | "discovered on some list?\n", | |
2506 | cmd, cmd->sync_cmd, cmd->scmd); | |
2507 | ||
2508 | list_del_init(&cmd->list); | |
2509 | } | |
2510 | defer_index++; | |
2511 | list_add_tail(&cmd->list, | |
2512 | &instance->internal_reset_pending_q); | |
2513 | } | |
2514 | } | |
2515 | spin_unlock_irqrestore(&instance->cmd_pool_lock, flags); | |
2516 | } | |
2517 | ||
2518 | ||
2519 | static void | |
2520 | process_fw_state_change_wq(struct work_struct *work) | |
2521 | { | |
2522 | struct megasas_instance *instance = | |
2523 | container_of(work, struct megasas_instance, work_init); | |
2524 | u32 wait; | |
2525 | unsigned long flags; | |
2526 | ||
2527 | if (instance->adprecovery != MEGASAS_ADPRESET_SM_INFAULT) { | |
2528 | printk(KERN_NOTICE "megaraid_sas: error, recovery st %x \n", | |
2529 | instance->adprecovery); | |
2530 | return ; | |
2531 | } | |
2532 | ||
2533 | if (instance->adprecovery == MEGASAS_ADPRESET_SM_INFAULT) { | |
2534 | printk(KERN_NOTICE "megaraid_sas: FW detected to be in fault" | |
2535 | "state, restarting it...\n"); | |
2536 | ||
d46a3ad6 | 2537 | instance->instancet->disable_intr(instance); |
39a98554 | 2538 | atomic_set(&instance->fw_outstanding, 0); |
2539 | ||
2540 | atomic_set(&instance->fw_reset_no_pci_access, 1); | |
2541 | instance->instancet->adp_reset(instance, instance->reg_set); | |
2542 | atomic_set(&instance->fw_reset_no_pci_access, 0 ); | |
2543 | ||
2544 | printk(KERN_NOTICE "megaraid_sas: FW restarted successfully," | |
2545 | "initiating next stage...\n"); | |
2546 | ||
2547 | printk(KERN_NOTICE "megaraid_sas: HBA recovery state machine," | |
2548 | "state 2 starting...\n"); | |
2549 | ||
2550 | /*waitting for about 20 second before start the second init*/ | |
2551 | for (wait = 0; wait < 30; wait++) { | |
2552 | msleep(1000); | |
2553 | } | |
2554 | ||
058a8fac | 2555 | if (megasas_transition_to_ready(instance, 1)) { |
39a98554 | 2556 | printk(KERN_NOTICE "megaraid_sas:adapter not ready\n"); |
2557 | ||
2558 | megaraid_sas_kill_hba(instance); | |
2559 | instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR; | |
2560 | return ; | |
2561 | } | |
2562 | ||
2563 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) || | |
2564 | (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) || | |
2565 | (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR) | |
2566 | ) { | |
2567 | *instance->consumer = *instance->producer; | |
2568 | } else { | |
2569 | *instance->consumer = 0; | |
2570 | *instance->producer = 0; | |
2571 | } | |
2572 | ||
2573 | megasas_issue_init_mfi(instance); | |
2574 | ||
2575 | spin_lock_irqsave(&instance->hba_lock, flags); | |
2576 | instance->adprecovery = MEGASAS_HBA_OPERATIONAL; | |
2577 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
d46a3ad6 | 2578 | instance->instancet->enable_intr(instance); |
39a98554 | 2579 | |
2580 | megasas_issue_pending_cmds_again(instance); | |
2581 | instance->issuepend_done = 1; | |
2582 | } | |
2583 | return ; | |
2584 | } | |
2585 | ||
c4a3e0a5 BS |
2586 | /** |
2587 | * megasas_deplete_reply_queue - Processes all completed commands | |
2588 | * @instance: Adapter soft state | |
2589 | * @alt_status: Alternate status to be returned to | |
2590 | * SCSI mid-layer instead of the status | |
2591 | * returned by the FW | |
39a98554 | 2592 | * Note: this must be called with hba lock held |
c4a3e0a5 | 2593 | */ |
858119e1 | 2594 | static int |
39a98554 | 2595 | megasas_deplete_reply_queue(struct megasas_instance *instance, |
2596 | u8 alt_status) | |
c4a3e0a5 | 2597 | { |
39a98554 | 2598 | u32 mfiStatus; |
2599 | u32 fw_state; | |
2600 | ||
2601 | if ((mfiStatus = instance->instancet->check_reset(instance, | |
2602 | instance->reg_set)) == 1) { | |
2603 | return IRQ_HANDLED; | |
2604 | } | |
2605 | ||
2606 | if ((mfiStatus = instance->instancet->clear_intr( | |
2607 | instance->reg_set) | |
2608 | ) == 0) { | |
e1419191 | 2609 | /* Hardware may not set outbound_intr_status in MSI-X mode */ |
c8e858fe | 2610 | if (!instance->msix_vectors) |
e1419191 | 2611 | return IRQ_NONE; |
39a98554 | 2612 | } |
2613 | ||
2614 | instance->mfiStatus = mfiStatus; | |
2615 | ||
2616 | if ((mfiStatus & MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE)) { | |
2617 | fw_state = instance->instancet->read_fw_status_reg( | |
2618 | instance->reg_set) & MFI_STATE_MASK; | |
2619 | ||
2620 | if (fw_state != MFI_STATE_FAULT) { | |
2621 | printk(KERN_NOTICE "megaraid_sas: fw state:%x\n", | |
2622 | fw_state); | |
2623 | } | |
2624 | ||
2625 | if ((fw_state == MFI_STATE_FAULT) && | |
2626 | (instance->disableOnlineCtrlReset == 0)) { | |
2627 | printk(KERN_NOTICE "megaraid_sas: wait adp restart\n"); | |
2628 | ||
2629 | if ((instance->pdev->device == | |
2630 | PCI_DEVICE_ID_LSI_SAS1064R) || | |
2631 | (instance->pdev->device == | |
2632 | PCI_DEVICE_ID_DELL_PERC5) || | |
2633 | (instance->pdev->device == | |
2634 | PCI_DEVICE_ID_LSI_VERDE_ZCR)) { | |
2635 | ||
2636 | *instance->consumer = | |
94cd65dd | 2637 | cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN); |
39a98554 | 2638 | } |
2639 | ||
2640 | ||
d46a3ad6 | 2641 | instance->instancet->disable_intr(instance); |
39a98554 | 2642 | instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT; |
2643 | instance->issuepend_done = 0; | |
2644 | ||
2645 | atomic_set(&instance->fw_outstanding, 0); | |
2646 | megasas_internal_reset_defer_cmds(instance); | |
2647 | ||
2648 | printk(KERN_NOTICE "megasas: fwState=%x, stage:%d\n", | |
2649 | fw_state, instance->adprecovery); | |
2650 | ||
2651 | schedule_work(&instance->work_init); | |
2652 | return IRQ_HANDLED; | |
2653 | ||
2654 | } else { | |
2655 | printk(KERN_NOTICE "megasas: fwstate:%x, dis_OCR=%x\n", | |
2656 | fw_state, instance->disableOnlineCtrlReset); | |
2657 | } | |
2658 | } | |
c4a3e0a5 | 2659 | |
5d018ad0 | 2660 | tasklet_schedule(&instance->isr_tasklet); |
c4a3e0a5 BS |
2661 | return IRQ_HANDLED; |
2662 | } | |
c4a3e0a5 BS |
2663 | /** |
2664 | * megasas_isr - isr entry point | |
2665 | */ | |
7d12e780 | 2666 | static irqreturn_t megasas_isr(int irq, void *devp) |
c4a3e0a5 | 2667 | { |
c8e858fe | 2668 | struct megasas_irq_context *irq_context = devp; |
2669 | struct megasas_instance *instance = irq_context->instance; | |
39a98554 | 2670 | unsigned long flags; |
2671 | irqreturn_t rc; | |
2672 | ||
c8e858fe | 2673 | if (atomic_read(&instance->fw_reset_no_pci_access)) |
39a98554 | 2674 | return IRQ_HANDLED; |
2675 | ||
39a98554 | 2676 | spin_lock_irqsave(&instance->hba_lock, flags); |
2677 | rc = megasas_deplete_reply_queue(instance, DID_OK); | |
2678 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
2679 | ||
2680 | return rc; | |
c4a3e0a5 BS |
2681 | } |
2682 | ||
2683 | /** | |
2684 | * megasas_transition_to_ready - Move the FW to READY state | |
1341c939 | 2685 | * @instance: Adapter soft state |
c4a3e0a5 BS |
2686 | * |
2687 | * During the initialization, FW passes can potentially be in any one of | |
2688 | * several possible states. If the FW in operational, waiting-for-handshake | |
2689 | * states, driver must take steps to bring it to ready state. Otherwise, it | |
2690 | * has to wait for the ready state. | |
2691 | */ | |
9c915a8c | 2692 | int |
058a8fac | 2693 | megasas_transition_to_ready(struct megasas_instance *instance, int ocr) |
c4a3e0a5 BS |
2694 | { |
2695 | int i; | |
2696 | u8 max_wait; | |
2697 | u32 fw_state; | |
2698 | u32 cur_state; | |
7218df69 | 2699 | u32 abs_state, curr_abs_state; |
c4a3e0a5 | 2700 | |
1341c939 | 2701 | fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & MFI_STATE_MASK; |
c4a3e0a5 | 2702 | |
e3bbff9f | 2703 | if (fw_state != MFI_STATE_READY) |
0d49016b | 2704 | printk(KERN_INFO "megasas: Waiting for FW to come to ready" |
2705 | " state\n"); | |
e3bbff9f | 2706 | |
c4a3e0a5 BS |
2707 | while (fw_state != MFI_STATE_READY) { |
2708 | ||
7218df69 YB |
2709 | abs_state = |
2710 | instance->instancet->read_fw_status_reg(instance->reg_set); | |
2711 | ||
c4a3e0a5 BS |
2712 | switch (fw_state) { |
2713 | ||
2714 | case MFI_STATE_FAULT: | |
c4a3e0a5 | 2715 | printk(KERN_DEBUG "megasas: FW in FAULT state!!\n"); |
058a8fac | 2716 | if (ocr) { |
2717 | max_wait = MEGASAS_RESET_WAIT_TIME; | |
2718 | cur_state = MFI_STATE_FAULT; | |
2719 | break; | |
2720 | } else | |
2721 | return -ENODEV; | |
c4a3e0a5 BS |
2722 | |
2723 | case MFI_STATE_WAIT_HANDSHAKE: | |
2724 | /* | |
2725 | * Set the CLR bit in inbound doorbell | |
2726 | */ | |
0c79e681 | 2727 | if ((instance->pdev->device == |
87911122 YB |
2728 | PCI_DEVICE_ID_LSI_SAS0073SKINNY) || |
2729 | (instance->pdev->device == | |
9c915a8c | 2730 | PCI_DEVICE_ID_LSI_SAS0071SKINNY) || |
2731 | (instance->pdev->device == | |
21d3c710 | 2732 | PCI_DEVICE_ID_LSI_FUSION) || |
36807e67 | 2733 | (instance->pdev->device == |
21d3c710 SS |
2734 | PCI_DEVICE_ID_LSI_INVADER) || |
2735 | (instance->pdev->device == | |
2736 | PCI_DEVICE_ID_LSI_FURY)) { | |
87911122 YB |
2737 | writel( |
2738 | MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG, | |
9c915a8c | 2739 | &instance->reg_set->doorbell); |
87911122 YB |
2740 | } else { |
2741 | writel( | |
2742 | MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG, | |
2743 | &instance->reg_set->inbound_doorbell); | |
2744 | } | |
c4a3e0a5 | 2745 | |
7218df69 | 2746 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
2747 | cur_state = MFI_STATE_WAIT_HANDSHAKE; |
2748 | break; | |
2749 | ||
e3bbff9f | 2750 | case MFI_STATE_BOOT_MESSAGE_PENDING: |
87911122 | 2751 | if ((instance->pdev->device == |
9c915a8c | 2752 | PCI_DEVICE_ID_LSI_SAS0073SKINNY) || |
2753 | (instance->pdev->device == | |
2754 | PCI_DEVICE_ID_LSI_SAS0071SKINNY) || | |
2755 | (instance->pdev->device == | |
36807e67 | 2756 | PCI_DEVICE_ID_LSI_FUSION) || |
2757 | (instance->pdev->device == | |
21d3c710 SS |
2758 | PCI_DEVICE_ID_LSI_INVADER) || |
2759 | (instance->pdev->device == | |
2760 | PCI_DEVICE_ID_LSI_FURY)) { | |
87911122 | 2761 | writel(MFI_INIT_HOTPLUG, |
9c915a8c | 2762 | &instance->reg_set->doorbell); |
87911122 YB |
2763 | } else |
2764 | writel(MFI_INIT_HOTPLUG, | |
2765 | &instance->reg_set->inbound_doorbell); | |
e3bbff9f | 2766 | |
7218df69 | 2767 | max_wait = MEGASAS_RESET_WAIT_TIME; |
e3bbff9f SP |
2768 | cur_state = MFI_STATE_BOOT_MESSAGE_PENDING; |
2769 | break; | |
2770 | ||
c4a3e0a5 BS |
2771 | case MFI_STATE_OPERATIONAL: |
2772 | /* | |
e3bbff9f | 2773 | * Bring it to READY state; assuming max wait 10 secs |
c4a3e0a5 | 2774 | */ |
d46a3ad6 | 2775 | instance->instancet->disable_intr(instance); |
87911122 YB |
2776 | if ((instance->pdev->device == |
2777 | PCI_DEVICE_ID_LSI_SAS0073SKINNY) || | |
2778 | (instance->pdev->device == | |
9c915a8c | 2779 | PCI_DEVICE_ID_LSI_SAS0071SKINNY) || |
2780 | (instance->pdev->device | |
36807e67 | 2781 | == PCI_DEVICE_ID_LSI_FUSION) || |
2782 | (instance->pdev->device | |
21d3c710 SS |
2783 | == PCI_DEVICE_ID_LSI_INVADER) || |
2784 | (instance->pdev->device | |
2785 | == PCI_DEVICE_ID_LSI_FURY)) { | |
87911122 | 2786 | writel(MFI_RESET_FLAGS, |
9c915a8c | 2787 | &instance->reg_set->doorbell); |
36807e67 | 2788 | if ((instance->pdev->device == |
21d3c710 SS |
2789 | PCI_DEVICE_ID_LSI_FUSION) || |
2790 | (instance->pdev->device == | |
2791 | PCI_DEVICE_ID_LSI_INVADER) || | |
2792 | (instance->pdev->device == | |
2793 | PCI_DEVICE_ID_LSI_FURY)) { | |
9c915a8c | 2794 | for (i = 0; i < (10 * 1000); i += 20) { |
2795 | if (readl( | |
2796 | &instance-> | |
2797 | reg_set-> | |
2798 | doorbell) & 1) | |
2799 | msleep(20); | |
2800 | else | |
2801 | break; | |
2802 | } | |
2803 | } | |
87911122 YB |
2804 | } else |
2805 | writel(MFI_RESET_FLAGS, | |
2806 | &instance->reg_set->inbound_doorbell); | |
c4a3e0a5 | 2807 | |
7218df69 | 2808 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
2809 | cur_state = MFI_STATE_OPERATIONAL; |
2810 | break; | |
2811 | ||
2812 | case MFI_STATE_UNDEFINED: | |
2813 | /* | |
2814 | * This state should not last for more than 2 seconds | |
2815 | */ | |
7218df69 | 2816 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
2817 | cur_state = MFI_STATE_UNDEFINED; |
2818 | break; | |
2819 | ||
2820 | case MFI_STATE_BB_INIT: | |
7218df69 | 2821 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
2822 | cur_state = MFI_STATE_BB_INIT; |
2823 | break; | |
2824 | ||
2825 | case MFI_STATE_FW_INIT: | |
7218df69 | 2826 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
2827 | cur_state = MFI_STATE_FW_INIT; |
2828 | break; | |
2829 | ||
2830 | case MFI_STATE_FW_INIT_2: | |
7218df69 | 2831 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
2832 | cur_state = MFI_STATE_FW_INIT_2; |
2833 | break; | |
2834 | ||
2835 | case MFI_STATE_DEVICE_SCAN: | |
7218df69 | 2836 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
2837 | cur_state = MFI_STATE_DEVICE_SCAN; |
2838 | break; | |
2839 | ||
2840 | case MFI_STATE_FLUSH_CACHE: | |
7218df69 | 2841 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
2842 | cur_state = MFI_STATE_FLUSH_CACHE; |
2843 | break; | |
2844 | ||
2845 | default: | |
2846 | printk(KERN_DEBUG "megasas: Unknown state 0x%x\n", | |
2847 | fw_state); | |
2848 | return -ENODEV; | |
2849 | } | |
2850 | ||
2851 | /* | |
2852 | * The cur_state should not last for more than max_wait secs | |
2853 | */ | |
2854 | for (i = 0; i < (max_wait * 1000); i++) { | |
0d49016b | 2855 | fw_state = instance->instancet->read_fw_status_reg(instance->reg_set) & |
1341c939 | 2856 | MFI_STATE_MASK ; |
7218df69 YB |
2857 | curr_abs_state = |
2858 | instance->instancet->read_fw_status_reg(instance->reg_set); | |
c4a3e0a5 | 2859 | |
7218df69 | 2860 | if (abs_state == curr_abs_state) { |
c4a3e0a5 BS |
2861 | msleep(1); |
2862 | } else | |
2863 | break; | |
2864 | } | |
2865 | ||
2866 | /* | |
2867 | * Return error if fw_state hasn't changed after max_wait | |
2868 | */ | |
7218df69 | 2869 | if (curr_abs_state == abs_state) { |
c4a3e0a5 BS |
2870 | printk(KERN_DEBUG "FW state [%d] hasn't changed " |
2871 | "in %d secs\n", fw_state, max_wait); | |
2872 | return -ENODEV; | |
2873 | } | |
39a98554 | 2874 | } |
0d49016b | 2875 | printk(KERN_INFO "megasas: FW now in Ready state\n"); |
c4a3e0a5 BS |
2876 | |
2877 | return 0; | |
2878 | } | |
2879 | ||
2880 | /** | |
2881 | * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool | |
2882 | * @instance: Adapter soft state | |
2883 | */ | |
2884 | static void megasas_teardown_frame_pool(struct megasas_instance *instance) | |
2885 | { | |
2886 | int i; | |
9c915a8c | 2887 | u32 max_cmd = instance->max_mfi_cmds; |
c4a3e0a5 BS |
2888 | struct megasas_cmd *cmd; |
2889 | ||
2890 | if (!instance->frame_dma_pool) | |
2891 | return; | |
2892 | ||
2893 | /* | |
2894 | * Return all frames to pool | |
2895 | */ | |
2896 | for (i = 0; i < max_cmd; i++) { | |
2897 | ||
2898 | cmd = instance->cmd_list[i]; | |
2899 | ||
2900 | if (cmd->frame) | |
2901 | pci_pool_free(instance->frame_dma_pool, cmd->frame, | |
2902 | cmd->frame_phys_addr); | |
2903 | ||
2904 | if (cmd->sense) | |
e3bbff9f | 2905 | pci_pool_free(instance->sense_dma_pool, cmd->sense, |
c4a3e0a5 BS |
2906 | cmd->sense_phys_addr); |
2907 | } | |
2908 | ||
2909 | /* | |
2910 | * Now destroy the pool itself | |
2911 | */ | |
2912 | pci_pool_destroy(instance->frame_dma_pool); | |
2913 | pci_pool_destroy(instance->sense_dma_pool); | |
2914 | ||
2915 | instance->frame_dma_pool = NULL; | |
2916 | instance->sense_dma_pool = NULL; | |
2917 | } | |
2918 | ||
2919 | /** | |
2920 | * megasas_create_frame_pool - Creates DMA pool for cmd frames | |
2921 | * @instance: Adapter soft state | |
2922 | * | |
2923 | * Each command packet has an embedded DMA memory buffer that is used for | |
2924 | * filling MFI frame and the SG list that immediately follows the frame. This | |
2925 | * function creates those DMA memory buffers for each command packet by using | |
2926 | * PCI pool facility. | |
2927 | */ | |
2928 | static int megasas_create_frame_pool(struct megasas_instance *instance) | |
2929 | { | |
2930 | int i; | |
2931 | u32 max_cmd; | |
2932 | u32 sge_sz; | |
2933 | u32 sgl_sz; | |
2934 | u32 total_sz; | |
2935 | u32 frame_count; | |
2936 | struct megasas_cmd *cmd; | |
2937 | ||
9c915a8c | 2938 | max_cmd = instance->max_mfi_cmds; |
c4a3e0a5 BS |
2939 | |
2940 | /* | |
2941 | * Size of our frame is 64 bytes for MFI frame, followed by max SG | |
2942 | * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer | |
2943 | */ | |
2944 | sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) : | |
2945 | sizeof(struct megasas_sge32); | |
2946 | ||
f4c9a131 YB |
2947 | if (instance->flag_ieee) { |
2948 | sge_sz = sizeof(struct megasas_sge_skinny); | |
2949 | } | |
2950 | ||
c4a3e0a5 BS |
2951 | /* |
2952 | * Calculated the number of 64byte frames required for SGL | |
2953 | */ | |
2954 | sgl_sz = sge_sz * instance->max_num_sge; | |
2955 | frame_count = (sgl_sz + MEGAMFI_FRAME_SIZE - 1) / MEGAMFI_FRAME_SIZE; | |
39a98554 | 2956 | frame_count = 15; |
c4a3e0a5 BS |
2957 | |
2958 | /* | |
2959 | * We need one extra frame for the MFI command | |
2960 | */ | |
2961 | frame_count++; | |
2962 | ||
2963 | total_sz = MEGAMFI_FRAME_SIZE * frame_count; | |
2964 | /* | |
2965 | * Use DMA pool facility provided by PCI layer | |
2966 | */ | |
2967 | instance->frame_dma_pool = pci_pool_create("megasas frame pool", | |
2968 | instance->pdev, total_sz, 64, | |
2969 | 0); | |
2970 | ||
2971 | if (!instance->frame_dma_pool) { | |
2972 | printk(KERN_DEBUG "megasas: failed to setup frame pool\n"); | |
2973 | return -ENOMEM; | |
2974 | } | |
2975 | ||
2976 | instance->sense_dma_pool = pci_pool_create("megasas sense pool", | |
2977 | instance->pdev, 128, 4, 0); | |
2978 | ||
2979 | if (!instance->sense_dma_pool) { | |
2980 | printk(KERN_DEBUG "megasas: failed to setup sense pool\n"); | |
2981 | ||
2982 | pci_pool_destroy(instance->frame_dma_pool); | |
2983 | instance->frame_dma_pool = NULL; | |
2984 | ||
2985 | return -ENOMEM; | |
2986 | } | |
2987 | ||
2988 | /* | |
2989 | * Allocate and attach a frame to each of the commands in cmd_list. | |
2990 | * By making cmd->index as the context instead of the &cmd, we can | |
2991 | * always use 32bit context regardless of the architecture | |
2992 | */ | |
2993 | for (i = 0; i < max_cmd; i++) { | |
2994 | ||
2995 | cmd = instance->cmd_list[i]; | |
2996 | ||
2997 | cmd->frame = pci_pool_alloc(instance->frame_dma_pool, | |
2998 | GFP_KERNEL, &cmd->frame_phys_addr); | |
2999 | ||
3000 | cmd->sense = pci_pool_alloc(instance->sense_dma_pool, | |
3001 | GFP_KERNEL, &cmd->sense_phys_addr); | |
3002 | ||
3003 | /* | |
3004 | * megasas_teardown_frame_pool() takes care of freeing | |
3005 | * whatever has been allocated | |
3006 | */ | |
3007 | if (!cmd->frame || !cmd->sense) { | |
3008 | printk(KERN_DEBUG "megasas: pci_pool_alloc failed \n"); | |
3009 | megasas_teardown_frame_pool(instance); | |
3010 | return -ENOMEM; | |
3011 | } | |
3012 | ||
707e09bd | 3013 | memset(cmd->frame, 0, total_sz); |
94cd65dd | 3014 | cmd->frame->io.context = cpu_to_le32(cmd->index); |
7e8a75f4 | 3015 | cmd->frame->io.pad_0 = 0; |
e5f93a36 | 3016 | if ((instance->pdev->device != PCI_DEVICE_ID_LSI_FUSION) && |
3017 | (instance->pdev->device != PCI_DEVICE_ID_LSI_INVADER) && | |
21d3c710 | 3018 | (instance->pdev->device != PCI_DEVICE_ID_LSI_FURY) && |
e5f93a36 | 3019 | (reset_devices)) |
3020 | cmd->frame->hdr.cmd = MFI_CMD_INVALID; | |
c4a3e0a5 BS |
3021 | } |
3022 | ||
3023 | return 0; | |
3024 | } | |
3025 | ||
3026 | /** | |
3027 | * megasas_free_cmds - Free all the cmds in the free cmd pool | |
3028 | * @instance: Adapter soft state | |
3029 | */ | |
9c915a8c | 3030 | void megasas_free_cmds(struct megasas_instance *instance) |
c4a3e0a5 BS |
3031 | { |
3032 | int i; | |
3033 | /* First free the MFI frame pool */ | |
3034 | megasas_teardown_frame_pool(instance); | |
3035 | ||
3036 | /* Free all the commands in the cmd_list */ | |
9c915a8c | 3037 | for (i = 0; i < instance->max_mfi_cmds; i++) |
3038 | ||
c4a3e0a5 BS |
3039 | kfree(instance->cmd_list[i]); |
3040 | ||
3041 | /* Free the cmd_list buffer itself */ | |
3042 | kfree(instance->cmd_list); | |
3043 | instance->cmd_list = NULL; | |
3044 | ||
3045 | INIT_LIST_HEAD(&instance->cmd_pool); | |
3046 | } | |
3047 | ||
3048 | /** | |
3049 | * megasas_alloc_cmds - Allocates the command packets | |
3050 | * @instance: Adapter soft state | |
3051 | * | |
3052 | * Each command that is issued to the FW, whether IO commands from the OS or | |
3053 | * internal commands like IOCTLs, are wrapped in local data structure called | |
3054 | * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to | |
3055 | * the FW. | |
3056 | * | |
3057 | * Each frame has a 32-bit field called context (tag). This context is used | |
3058 | * to get back the megasas_cmd from the frame when a frame gets completed in | |
3059 | * the ISR. Typically the address of the megasas_cmd itself would be used as | |
3060 | * the context. But we wanted to keep the differences between 32 and 64 bit | |
3061 | * systems to the mininum. We always use 32 bit integers for the context. In | |
3062 | * this driver, the 32 bit values are the indices into an array cmd_list. | |
3063 | * This array is used only to look up the megasas_cmd given the context. The | |
3064 | * free commands themselves are maintained in a linked list called cmd_pool. | |
3065 | */ | |
9c915a8c | 3066 | int megasas_alloc_cmds(struct megasas_instance *instance) |
c4a3e0a5 BS |
3067 | { |
3068 | int i; | |
3069 | int j; | |
3070 | u32 max_cmd; | |
3071 | struct megasas_cmd *cmd; | |
3072 | ||
9c915a8c | 3073 | max_cmd = instance->max_mfi_cmds; |
c4a3e0a5 BS |
3074 | |
3075 | /* | |
3076 | * instance->cmd_list is an array of struct megasas_cmd pointers. | |
3077 | * Allocate the dynamic array first and then allocate individual | |
3078 | * commands. | |
3079 | */ | |
dd00cc48 | 3080 | instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL); |
c4a3e0a5 BS |
3081 | |
3082 | if (!instance->cmd_list) { | |
3083 | printk(KERN_DEBUG "megasas: out of memory\n"); | |
3084 | return -ENOMEM; | |
3085 | } | |
3086 | ||
9c915a8c | 3087 | memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd); |
c4a3e0a5 BS |
3088 | |
3089 | for (i = 0; i < max_cmd; i++) { | |
3090 | instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd), | |
3091 | GFP_KERNEL); | |
3092 | ||
3093 | if (!instance->cmd_list[i]) { | |
3094 | ||
3095 | for (j = 0; j < i; j++) | |
3096 | kfree(instance->cmd_list[j]); | |
3097 | ||
3098 | kfree(instance->cmd_list); | |
3099 | instance->cmd_list = NULL; | |
3100 | ||
3101 | return -ENOMEM; | |
3102 | } | |
3103 | } | |
3104 | ||
3105 | /* | |
3106 | * Add all the commands to command pool (instance->cmd_pool) | |
3107 | */ | |
3108 | for (i = 0; i < max_cmd; i++) { | |
3109 | cmd = instance->cmd_list[i]; | |
3110 | memset(cmd, 0, sizeof(struct megasas_cmd)); | |
3111 | cmd->index = i; | |
39a98554 | 3112 | cmd->scmd = NULL; |
c4a3e0a5 BS |
3113 | cmd->instance = instance; |
3114 | ||
3115 | list_add_tail(&cmd->list, &instance->cmd_pool); | |
3116 | } | |
3117 | ||
3118 | /* | |
3119 | * Create a frame pool and assign one frame to each cmd | |
3120 | */ | |
3121 | if (megasas_create_frame_pool(instance)) { | |
3122 | printk(KERN_DEBUG "megasas: Error creating frame DMA pool\n"); | |
3123 | megasas_free_cmds(instance); | |
3124 | } | |
3125 | ||
3126 | return 0; | |
3127 | } | |
3128 | ||
81e403ce YB |
3129 | /* |
3130 | * megasas_get_pd_list_info - Returns FW's pd_list structure | |
3131 | * @instance: Adapter soft state | |
3132 | * @pd_list: pd_list structure | |
3133 | * | |
3134 | * Issues an internal command (DCMD) to get the FW's controller PD | |
3135 | * list structure. This information is mainly used to find out SYSTEM | |
3136 | * supported by the FW. | |
3137 | */ | |
3138 | static int | |
3139 | megasas_get_pd_list(struct megasas_instance *instance) | |
3140 | { | |
3141 | int ret = 0, pd_index = 0; | |
3142 | struct megasas_cmd *cmd; | |
3143 | struct megasas_dcmd_frame *dcmd; | |
3144 | struct MR_PD_LIST *ci; | |
3145 | struct MR_PD_ADDRESS *pd_addr; | |
3146 | dma_addr_t ci_h = 0; | |
3147 | ||
3148 | cmd = megasas_get_cmd(instance); | |
3149 | ||
3150 | if (!cmd) { | |
3151 | printk(KERN_DEBUG "megasas (get_pd_list): Failed to get cmd\n"); | |
3152 | return -ENOMEM; | |
3153 | } | |
3154 | ||
3155 | dcmd = &cmd->frame->dcmd; | |
3156 | ||
3157 | ci = pci_alloc_consistent(instance->pdev, | |
3158 | MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), &ci_h); | |
3159 | ||
3160 | if (!ci) { | |
3161 | printk(KERN_DEBUG "Failed to alloc mem for pd_list\n"); | |
3162 | megasas_return_cmd(instance, cmd); | |
3163 | return -ENOMEM; | |
3164 | } | |
3165 | ||
3166 | memset(ci, 0, sizeof(*ci)); | |
3167 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
3168 | ||
3169 | dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST; | |
3170 | dcmd->mbox.b[1] = 0; | |
3171 | dcmd->cmd = MFI_CMD_DCMD; | |
3172 | dcmd->cmd_status = 0xFF; | |
3173 | dcmd->sge_count = 1; | |
94cd65dd | 3174 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
81e403ce | 3175 | dcmd->timeout = 0; |
780a3762 | 3176 | dcmd->pad_0 = 0; |
94cd65dd SS |
3177 | dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST)); |
3178 | dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY); | |
3179 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); | |
3180 | dcmd->sgl.sge32[0].length = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST)); | |
81e403ce YB |
3181 | |
3182 | if (!megasas_issue_polled(instance, cmd)) { | |
3183 | ret = 0; | |
3184 | } else { | |
3185 | ret = -1; | |
3186 | } | |
3187 | ||
3188 | /* | |
3189 | * the following function will get the instance PD LIST. | |
3190 | */ | |
3191 | ||
3192 | pd_addr = ci->addr; | |
3193 | ||
3194 | if ( ret == 0 && | |
94cd65dd | 3195 | (le32_to_cpu(ci->count) < |
81e403ce YB |
3196 | (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL))) { |
3197 | ||
999ece0a | 3198 | memset(instance->local_pd_list, 0, |
81e403ce YB |
3199 | MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)); |
3200 | ||
94cd65dd | 3201 | for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) { |
81e403ce | 3202 | |
999ece0a | 3203 | instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].tid = |
94cd65dd | 3204 | le16_to_cpu(pd_addr->deviceId); |
999ece0a | 3205 | instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveType = |
81e403ce | 3206 | pd_addr->scsiDevType; |
999ece0a | 3207 | instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveState = |
81e403ce YB |
3208 | MR_PD_STATE_SYSTEM; |
3209 | pd_addr++; | |
3210 | } | |
999ece0a SS |
3211 | memcpy(instance->pd_list, instance->local_pd_list, |
3212 | sizeof(instance->pd_list)); | |
81e403ce YB |
3213 | } |
3214 | ||
3215 | pci_free_consistent(instance->pdev, | |
3216 | MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), | |
3217 | ci, ci_h); | |
3218 | megasas_return_cmd(instance, cmd); | |
3219 | ||
3220 | return ret; | |
3221 | } | |
3222 | ||
bdc6fb8d YB |
3223 | /* |
3224 | * megasas_get_ld_list_info - Returns FW's ld_list structure | |
3225 | * @instance: Adapter soft state | |
3226 | * @ld_list: ld_list structure | |
3227 | * | |
3228 | * Issues an internal command (DCMD) to get the FW's controller PD | |
3229 | * list structure. This information is mainly used to find out SYSTEM | |
3230 | * supported by the FW. | |
3231 | */ | |
3232 | static int | |
3233 | megasas_get_ld_list(struct megasas_instance *instance) | |
3234 | { | |
3235 | int ret = 0, ld_index = 0, ids = 0; | |
3236 | struct megasas_cmd *cmd; | |
3237 | struct megasas_dcmd_frame *dcmd; | |
3238 | struct MR_LD_LIST *ci; | |
3239 | dma_addr_t ci_h = 0; | |
94cd65dd | 3240 | u32 ld_count; |
bdc6fb8d YB |
3241 | |
3242 | cmd = megasas_get_cmd(instance); | |
3243 | ||
3244 | if (!cmd) { | |
3245 | printk(KERN_DEBUG "megasas_get_ld_list: Failed to get cmd\n"); | |
3246 | return -ENOMEM; | |
3247 | } | |
3248 | ||
3249 | dcmd = &cmd->frame->dcmd; | |
3250 | ||
3251 | ci = pci_alloc_consistent(instance->pdev, | |
3252 | sizeof(struct MR_LD_LIST), | |
3253 | &ci_h); | |
3254 | ||
3255 | if (!ci) { | |
3256 | printk(KERN_DEBUG "Failed to alloc mem in get_ld_list\n"); | |
3257 | megasas_return_cmd(instance, cmd); | |
3258 | return -ENOMEM; | |
3259 | } | |
3260 | ||
3261 | memset(ci, 0, sizeof(*ci)); | |
3262 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
3263 | ||
3264 | dcmd->cmd = MFI_CMD_DCMD; | |
3265 | dcmd->cmd_status = 0xFF; | |
3266 | dcmd->sge_count = 1; | |
94cd65dd | 3267 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
bdc6fb8d | 3268 | dcmd->timeout = 0; |
94cd65dd SS |
3269 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST)); |
3270 | dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST); | |
3271 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); | |
3272 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_LIST)); | |
bdc6fb8d YB |
3273 | dcmd->pad_0 = 0; |
3274 | ||
3275 | if (!megasas_issue_polled(instance, cmd)) { | |
3276 | ret = 0; | |
3277 | } else { | |
3278 | ret = -1; | |
3279 | } | |
3280 | ||
94cd65dd SS |
3281 | ld_count = le32_to_cpu(ci->ldCount); |
3282 | ||
bdc6fb8d YB |
3283 | /* the following function will get the instance PD LIST */ |
3284 | ||
94cd65dd | 3285 | if ((ret == 0) && (ld_count <= MAX_LOGICAL_DRIVES)) { |
bdc6fb8d YB |
3286 | memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS); |
3287 | ||
94cd65dd | 3288 | for (ld_index = 0; ld_index < ld_count; ld_index++) { |
bdc6fb8d YB |
3289 | if (ci->ldList[ld_index].state != 0) { |
3290 | ids = ci->ldList[ld_index].ref.targetId; | |
3291 | instance->ld_ids[ids] = | |
3292 | ci->ldList[ld_index].ref.targetId; | |
3293 | } | |
3294 | } | |
3295 | } | |
3296 | ||
3297 | pci_free_consistent(instance->pdev, | |
3298 | sizeof(struct MR_LD_LIST), | |
3299 | ci, | |
3300 | ci_h); | |
3301 | ||
3302 | megasas_return_cmd(instance, cmd); | |
3303 | return ret; | |
3304 | } | |
3305 | ||
21c9e160 | 3306 | /** |
3307 | * megasas_ld_list_query - Returns FW's ld_list structure | |
3308 | * @instance: Adapter soft state | |
3309 | * @ld_list: ld_list structure | |
3310 | * | |
3311 | * Issues an internal command (DCMD) to get the FW's controller PD | |
3312 | * list structure. This information is mainly used to find out SYSTEM | |
3313 | * supported by the FW. | |
3314 | */ | |
3315 | static int | |
3316 | megasas_ld_list_query(struct megasas_instance *instance, u8 query_type) | |
3317 | { | |
3318 | int ret = 0, ld_index = 0, ids = 0; | |
3319 | struct megasas_cmd *cmd; | |
3320 | struct megasas_dcmd_frame *dcmd; | |
3321 | struct MR_LD_TARGETID_LIST *ci; | |
3322 | dma_addr_t ci_h = 0; | |
94cd65dd | 3323 | u32 tgtid_count; |
21c9e160 | 3324 | |
3325 | cmd = megasas_get_cmd(instance); | |
3326 | ||
3327 | if (!cmd) { | |
3328 | printk(KERN_WARNING | |
3329 | "megasas:(megasas_ld_list_query): Failed to get cmd\n"); | |
3330 | return -ENOMEM; | |
3331 | } | |
3332 | ||
3333 | dcmd = &cmd->frame->dcmd; | |
3334 | ||
3335 | ci = pci_alloc_consistent(instance->pdev, | |
3336 | sizeof(struct MR_LD_TARGETID_LIST), &ci_h); | |
3337 | ||
3338 | if (!ci) { | |
3339 | printk(KERN_WARNING | |
3340 | "megasas: Failed to alloc mem for ld_list_query\n"); | |
3341 | megasas_return_cmd(instance, cmd); | |
3342 | return -ENOMEM; | |
3343 | } | |
3344 | ||
3345 | memset(ci, 0, sizeof(*ci)); | |
3346 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
3347 | ||
3348 | dcmd->mbox.b[0] = query_type; | |
3349 | ||
3350 | dcmd->cmd = MFI_CMD_DCMD; | |
3351 | dcmd->cmd_status = 0xFF; | |
3352 | dcmd->sge_count = 1; | |
94cd65dd | 3353 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
21c9e160 | 3354 | dcmd->timeout = 0; |
94cd65dd SS |
3355 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST)); |
3356 | dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY); | |
3357 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); | |
3358 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST)); | |
21c9e160 | 3359 | dcmd->pad_0 = 0; |
3360 | ||
3361 | if (!megasas_issue_polled(instance, cmd) && !dcmd->cmd_status) { | |
3362 | ret = 0; | |
3363 | } else { | |
3364 | /* On failure, call older LD list DCMD */ | |
3365 | ret = 1; | |
3366 | } | |
3367 | ||
94cd65dd SS |
3368 | tgtid_count = le32_to_cpu(ci->count); |
3369 | ||
3370 | if ((ret == 0) && (tgtid_count <= (MAX_LOGICAL_DRIVES))) { | |
21c9e160 | 3371 | memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS); |
94cd65dd | 3372 | for (ld_index = 0; ld_index < tgtid_count; ld_index++) { |
21c9e160 | 3373 | ids = ci->targetId[ld_index]; |
3374 | instance->ld_ids[ids] = ci->targetId[ld_index]; | |
3375 | } | |
3376 | ||
3377 | } | |
3378 | ||
3379 | pci_free_consistent(instance->pdev, sizeof(struct MR_LD_TARGETID_LIST), | |
3380 | ci, ci_h); | |
3381 | ||
3382 | megasas_return_cmd(instance, cmd); | |
3383 | ||
3384 | return ret; | |
3385 | } | |
3386 | ||
c4a3e0a5 BS |
3387 | /** |
3388 | * megasas_get_controller_info - Returns FW's controller structure | |
3389 | * @instance: Adapter soft state | |
3390 | * @ctrl_info: Controller information structure | |
3391 | * | |
3392 | * Issues an internal command (DCMD) to get the FW's controller structure. | |
3393 | * This information is mainly used to find out the maximum IO transfer per | |
3394 | * command supported by the FW. | |
3395 | */ | |
3396 | static int | |
3397 | megasas_get_ctrl_info(struct megasas_instance *instance, | |
3398 | struct megasas_ctrl_info *ctrl_info) | |
3399 | { | |
3400 | int ret = 0; | |
3401 | struct megasas_cmd *cmd; | |
3402 | struct megasas_dcmd_frame *dcmd; | |
3403 | struct megasas_ctrl_info *ci; | |
3404 | dma_addr_t ci_h = 0; | |
3405 | ||
3406 | cmd = megasas_get_cmd(instance); | |
3407 | ||
3408 | if (!cmd) { | |
3409 | printk(KERN_DEBUG "megasas: Failed to get a free cmd\n"); | |
3410 | return -ENOMEM; | |
3411 | } | |
3412 | ||
3413 | dcmd = &cmd->frame->dcmd; | |
3414 | ||
3415 | ci = pci_alloc_consistent(instance->pdev, | |
3416 | sizeof(struct megasas_ctrl_info), &ci_h); | |
3417 | ||
3418 | if (!ci) { | |
3419 | printk(KERN_DEBUG "Failed to alloc mem for ctrl info\n"); | |
3420 | megasas_return_cmd(instance, cmd); | |
3421 | return -ENOMEM; | |
3422 | } | |
3423 | ||
3424 | memset(ci, 0, sizeof(*ci)); | |
3425 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
3426 | ||
3427 | dcmd->cmd = MFI_CMD_DCMD; | |
3428 | dcmd->cmd_status = 0xFF; | |
3429 | dcmd->sge_count = 1; | |
94cd65dd | 3430 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
c4a3e0a5 | 3431 | dcmd->timeout = 0; |
780a3762 | 3432 | dcmd->pad_0 = 0; |
94cd65dd SS |
3433 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info)); |
3434 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO); | |
3435 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); | |
3436 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_ctrl_info)); | |
c4a3e0a5 BS |
3437 | |
3438 | if (!megasas_issue_polled(instance, cmd)) { | |
3439 | ret = 0; | |
3440 | memcpy(ctrl_info, ci, sizeof(struct megasas_ctrl_info)); | |
3441 | } else { | |
3442 | ret = -1; | |
3443 | } | |
3444 | ||
3445 | pci_free_consistent(instance->pdev, sizeof(struct megasas_ctrl_info), | |
3446 | ci, ci_h); | |
3447 | ||
3448 | megasas_return_cmd(instance, cmd); | |
3449 | return ret; | |
3450 | } | |
3451 | ||
31ea7088 | 3452 | /** |
3453 | * megasas_issue_init_mfi - Initializes the FW | |
3454 | * @instance: Adapter soft state | |
3455 | * | |
3456 | * Issues the INIT MFI cmd | |
3457 | */ | |
3458 | static int | |
3459 | megasas_issue_init_mfi(struct megasas_instance *instance) | |
3460 | { | |
3461 | u32 context; | |
3462 | ||
3463 | struct megasas_cmd *cmd; | |
3464 | ||
3465 | struct megasas_init_frame *init_frame; | |
3466 | struct megasas_init_queue_info *initq_info; | |
3467 | dma_addr_t init_frame_h; | |
3468 | dma_addr_t initq_info_h; | |
3469 | ||
3470 | /* | |
3471 | * Prepare a init frame. Note the init frame points to queue info | |
3472 | * structure. Each frame has SGL allocated after first 64 bytes. For | |
3473 | * this frame - since we don't need any SGL - we use SGL's space as | |
3474 | * queue info structure | |
3475 | * | |
3476 | * We will not get a NULL command below. We just created the pool. | |
3477 | */ | |
3478 | cmd = megasas_get_cmd(instance); | |
3479 | ||
3480 | init_frame = (struct megasas_init_frame *)cmd->frame; | |
3481 | initq_info = (struct megasas_init_queue_info *) | |
3482 | ((unsigned long)init_frame + 64); | |
3483 | ||
3484 | init_frame_h = cmd->frame_phys_addr; | |
3485 | initq_info_h = init_frame_h + 64; | |
3486 | ||
3487 | context = init_frame->context; | |
3488 | memset(init_frame, 0, MEGAMFI_FRAME_SIZE); | |
3489 | memset(initq_info, 0, sizeof(struct megasas_init_queue_info)); | |
3490 | init_frame->context = context; | |
3491 | ||
94cd65dd SS |
3492 | initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1); |
3493 | initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h); | |
31ea7088 | 3494 | |
94cd65dd SS |
3495 | initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h); |
3496 | initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h); | |
31ea7088 | 3497 | |
3498 | init_frame->cmd = MFI_CMD_INIT; | |
3499 | init_frame->cmd_status = 0xFF; | |
94cd65dd SS |
3500 | init_frame->queue_info_new_phys_addr_lo = |
3501 | cpu_to_le32(lower_32_bits(initq_info_h)); | |
3502 | init_frame->queue_info_new_phys_addr_hi = | |
3503 | cpu_to_le32(upper_32_bits(initq_info_h)); | |
31ea7088 | 3504 | |
94cd65dd | 3505 | init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info)); |
31ea7088 | 3506 | |
3507 | /* | |
3508 | * disable the intr before firing the init frame to FW | |
3509 | */ | |
d46a3ad6 | 3510 | instance->instancet->disable_intr(instance); |
31ea7088 | 3511 | |
3512 | /* | |
3513 | * Issue the init frame in polled mode | |
3514 | */ | |
3515 | ||
3516 | if (megasas_issue_polled(instance, cmd)) { | |
3517 | printk(KERN_ERR "megasas: Failed to init firmware\n"); | |
3518 | megasas_return_cmd(instance, cmd); | |
3519 | goto fail_fw_init; | |
3520 | } | |
3521 | ||
3522 | megasas_return_cmd(instance, cmd); | |
3523 | ||
3524 | return 0; | |
3525 | ||
3526 | fail_fw_init: | |
3527 | return -EINVAL; | |
3528 | } | |
3529 | ||
cd50ba8e | 3530 | static u32 |
3531 | megasas_init_adapter_mfi(struct megasas_instance *instance) | |
c4a3e0a5 | 3532 | { |
cd50ba8e | 3533 | struct megasas_register_set __iomem *reg_set; |
c4a3e0a5 BS |
3534 | u32 context_sz; |
3535 | u32 reply_q_sz; | |
c4a3e0a5 BS |
3536 | |
3537 | reg_set = instance->reg_set; | |
3538 | ||
c4a3e0a5 BS |
3539 | /* |
3540 | * Get various operational parameters from status register | |
3541 | */ | |
1341c939 | 3542 | instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF; |
e3bbff9f SP |
3543 | /* |
3544 | * Reduce the max supported cmds by 1. This is to ensure that the | |
3545 | * reply_q_sz (1 more than the max cmd that driver may send) | |
3546 | * does not exceed max cmds that the FW can support | |
3547 | */ | |
3548 | instance->max_fw_cmds = instance->max_fw_cmds-1; | |
9c915a8c | 3549 | instance->max_mfi_cmds = instance->max_fw_cmds; |
0d49016b | 3550 | instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >> |
1341c939 | 3551 | 0x10; |
c4a3e0a5 BS |
3552 | /* |
3553 | * Create a pool of commands | |
3554 | */ | |
3555 | if (megasas_alloc_cmds(instance)) | |
3556 | goto fail_alloc_cmds; | |
3557 | ||
3558 | /* | |
3559 | * Allocate memory for reply queue. Length of reply queue should | |
3560 | * be _one_ more than the maximum commands handled by the firmware. | |
3561 | * | |
3562 | * Note: When FW completes commands, it places corresponding contex | |
3563 | * values in this circular reply queue. This circular queue is a fairly | |
3564 | * typical producer-consumer queue. FW is the producer (of completed | |
3565 | * commands) and the driver is the consumer. | |
3566 | */ | |
3567 | context_sz = sizeof(u32); | |
3568 | reply_q_sz = context_sz * (instance->max_fw_cmds + 1); | |
3569 | ||
3570 | instance->reply_queue = pci_alloc_consistent(instance->pdev, | |
3571 | reply_q_sz, | |
3572 | &instance->reply_queue_h); | |
3573 | ||
3574 | if (!instance->reply_queue) { | |
3575 | printk(KERN_DEBUG "megasas: Out of DMA mem for reply queue\n"); | |
3576 | goto fail_reply_queue; | |
3577 | } | |
3578 | ||
31ea7088 | 3579 | if (megasas_issue_init_mfi(instance)) |
c4a3e0a5 | 3580 | goto fail_fw_init; |
c4a3e0a5 | 3581 | |
39a98554 | 3582 | instance->fw_support_ieee = 0; |
3583 | instance->fw_support_ieee = | |
3584 | (instance->instancet->read_fw_status_reg(reg_set) & | |
3585 | 0x04000000); | |
3586 | ||
3587 | printk(KERN_NOTICE "megasas_init_mfi: fw_support_ieee=%d", | |
3588 | instance->fw_support_ieee); | |
3589 | ||
3590 | if (instance->fw_support_ieee) | |
3591 | instance->flag_ieee = 1; | |
3592 | ||
cd50ba8e | 3593 | return 0; |
3594 | ||
3595 | fail_fw_init: | |
3596 | ||
3597 | pci_free_consistent(instance->pdev, reply_q_sz, | |
3598 | instance->reply_queue, instance->reply_queue_h); | |
3599 | fail_reply_queue: | |
3600 | megasas_free_cmds(instance); | |
3601 | ||
3602 | fail_alloc_cmds: | |
cd50ba8e | 3603 | return 1; |
3604 | } | |
3605 | ||
3606 | /** | |
3607 | * megasas_init_fw - Initializes the FW | |
3608 | * @instance: Adapter soft state | |
3609 | * | |
3610 | * This is the main function for initializing firmware | |
3611 | */ | |
3612 | ||
3613 | static int megasas_init_fw(struct megasas_instance *instance) | |
3614 | { | |
3615 | u32 max_sectors_1; | |
3616 | u32 max_sectors_2; | |
d46a3ad6 | 3617 | u32 tmp_sectors, msix_enable, scratch_pad_2; |
cd50ba8e | 3618 | struct megasas_register_set __iomem *reg_set; |
3619 | struct megasas_ctrl_info *ctrl_info; | |
3620 | unsigned long bar_list; | |
d46a3ad6 | 3621 | int i, loop, fw_msix_count = 0; |
cd50ba8e | 3622 | |
3623 | /* Find first memory bar */ | |
3624 | bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM); | |
3625 | instance->bar = find_first_bit(&bar_list, sizeof(unsigned long)); | |
3626 | instance->base_addr = pci_resource_start(instance->pdev, instance->bar); | |
3627 | if (pci_request_selected_regions(instance->pdev, instance->bar, | |
3628 | "megasas: LSI")) { | |
3629 | printk(KERN_DEBUG "megasas: IO memory region busy!\n"); | |
3630 | return -EBUSY; | |
3631 | } | |
3632 | ||
3633 | instance->reg_set = ioremap_nocache(instance->base_addr, 8192); | |
3634 | ||
3635 | if (!instance->reg_set) { | |
3636 | printk(KERN_DEBUG "megasas: Failed to map IO mem\n"); | |
3637 | goto fail_ioremap; | |
3638 | } | |
3639 | ||
3640 | reg_set = instance->reg_set; | |
3641 | ||
3642 | switch (instance->pdev->device) { | |
9c915a8c | 3643 | case PCI_DEVICE_ID_LSI_FUSION: |
36807e67 | 3644 | case PCI_DEVICE_ID_LSI_INVADER: |
21d3c710 | 3645 | case PCI_DEVICE_ID_LSI_FURY: |
9c915a8c | 3646 | instance->instancet = &megasas_instance_template_fusion; |
3647 | break; | |
cd50ba8e | 3648 | case PCI_DEVICE_ID_LSI_SAS1078R: |
3649 | case PCI_DEVICE_ID_LSI_SAS1078DE: | |
3650 | instance->instancet = &megasas_instance_template_ppc; | |
3651 | break; | |
3652 | case PCI_DEVICE_ID_LSI_SAS1078GEN2: | |
3653 | case PCI_DEVICE_ID_LSI_SAS0079GEN2: | |
3654 | instance->instancet = &megasas_instance_template_gen2; | |
3655 | break; | |
3656 | case PCI_DEVICE_ID_LSI_SAS0073SKINNY: | |
3657 | case PCI_DEVICE_ID_LSI_SAS0071SKINNY: | |
3658 | instance->instancet = &megasas_instance_template_skinny; | |
3659 | break; | |
3660 | case PCI_DEVICE_ID_LSI_SAS1064R: | |
3661 | case PCI_DEVICE_ID_DELL_PERC5: | |
3662 | default: | |
3663 | instance->instancet = &megasas_instance_template_xscale; | |
3664 | break; | |
3665 | } | |
3666 | ||
6431f5d7 SS |
3667 | if (megasas_transition_to_ready(instance, 0)) { |
3668 | atomic_set(&instance->fw_reset_no_pci_access, 1); | |
3669 | instance->instancet->adp_reset | |
3670 | (instance, instance->reg_set); | |
3671 | atomic_set(&instance->fw_reset_no_pci_access, 0); | |
3672 | dev_info(&instance->pdev->dev, | |
3673 | "megasas: FW restarted successfully from %s!\n", | |
3674 | __func__); | |
3675 | ||
3676 | /*waitting for about 30 second before retry*/ | |
3677 | ssleep(30); | |
3678 | ||
3679 | if (megasas_transition_to_ready(instance, 0)) | |
3680 | goto fail_ready_state; | |
3681 | } | |
cd50ba8e | 3682 | |
d46a3ad6 SS |
3683 | /* |
3684 | * MSI-X host index 0 is common for all adapter. | |
3685 | * It is used for all MPT based Adapters. | |
3686 | */ | |
3687 | instance->reply_post_host_index_addr[0] = | |
3688 | (u32 *)((u8 *)instance->reg_set + | |
3689 | MPI2_REPLY_POST_HOST_INDEX_OFFSET); | |
3690 | ||
3f1abce4 | 3691 | /* Check if MSI-X is supported while in ready state */ |
3692 | msix_enable = (instance->instancet->read_fw_status_reg(reg_set) & | |
3693 | 0x4000000) >> 0x1a; | |
c8e858fe | 3694 | if (msix_enable && !msix_disable) { |
d46a3ad6 SS |
3695 | scratch_pad_2 = readl |
3696 | (&instance->reg_set->outbound_scratch_pad_2); | |
c8e858fe | 3697 | /* Check max MSI-X vectors */ |
d46a3ad6 SS |
3698 | if (instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) { |
3699 | instance->msix_vectors = (scratch_pad_2 | |
3700 | & MR_MAX_REPLY_QUEUES_OFFSET) + 1; | |
3701 | fw_msix_count = instance->msix_vectors; | |
079eaddf | 3702 | if (msix_vectors) |
3703 | instance->msix_vectors = | |
3704 | min(msix_vectors, | |
3705 | instance->msix_vectors); | |
d46a3ad6 SS |
3706 | } else if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) |
3707 | || (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) { | |
3708 | /* Invader/Fury supports more than 8 MSI-X */ | |
3709 | instance->msix_vectors = ((scratch_pad_2 | |
3710 | & MR_MAX_REPLY_QUEUES_EXT_OFFSET) | |
3711 | >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1; | |
3712 | fw_msix_count = instance->msix_vectors; | |
3713 | /* Save 1-15 reply post index address to local memory | |
3714 | * Index 0 is already saved from reg offset | |
3715 | * MPI2_REPLY_POST_HOST_INDEX_OFFSET | |
3716 | */ | |
3717 | for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) { | |
3718 | instance->reply_post_host_index_addr[loop] = | |
3719 | (u32 *)((u8 *)instance->reg_set + | |
3720 | MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET | |
3721 | + (loop * 0x10)); | |
3722 | } | |
3723 | if (msix_vectors) | |
3724 | instance->msix_vectors = min(msix_vectors, | |
3725 | instance->msix_vectors); | |
c8e858fe | 3726 | } else |
3727 | instance->msix_vectors = 1; | |
3728 | /* Don't bother allocating more MSI-X vectors than cpus */ | |
3729 | instance->msix_vectors = min(instance->msix_vectors, | |
3730 | (unsigned int)num_online_cpus()); | |
3731 | for (i = 0; i < instance->msix_vectors; i++) | |
3732 | instance->msixentry[i].entry = i; | |
3733 | i = pci_enable_msix(instance->pdev, instance->msixentry, | |
3734 | instance->msix_vectors); | |
3735 | if (i >= 0) { | |
3736 | if (i) { | |
3737 | if (!pci_enable_msix(instance->pdev, | |
3738 | instance->msixentry, i)) | |
3739 | instance->msix_vectors = i; | |
3740 | else | |
3741 | instance->msix_vectors = 0; | |
3742 | } | |
3743 | } else | |
3744 | instance->msix_vectors = 0; | |
d46a3ad6 SS |
3745 | |
3746 | dev_info(&instance->pdev->dev, "[scsi%d]: FW supports" | |
3747 | "<%d> MSIX vector,Online CPUs: <%d>," | |
3748 | "Current MSIX <%d>\n", instance->host->host_no, | |
3749 | fw_msix_count, (unsigned int)num_online_cpus(), | |
3750 | instance->msix_vectors); | |
c8e858fe | 3751 | } |
3f1abce4 | 3752 | |
cd50ba8e | 3753 | /* Get operational params, sge flags, send init cmd to controller */ |
3754 | if (instance->instancet->init_adapter(instance)) | |
eb1b1237 | 3755 | goto fail_init_adapter; |
cd50ba8e | 3756 | |
3757 | printk(KERN_ERR "megasas: INIT adapter done\n"); | |
3758 | ||
39a98554 | 3759 | /** for passthrough |
3760 | * the following function will get the PD LIST. | |
3761 | */ | |
3762 | ||
81e403ce YB |
3763 | memset(instance->pd_list, 0 , |
3764 | (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list))); | |
3765 | megasas_get_pd_list(instance); | |
3766 | ||
bdc6fb8d | 3767 | memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS); |
21c9e160 | 3768 | if (megasas_ld_list_query(instance, |
3769 | MR_LD_QUERY_TYPE_EXPOSED_TO_HOST)) | |
3770 | megasas_get_ld_list(instance); | |
bdc6fb8d | 3771 | |
c4a3e0a5 BS |
3772 | ctrl_info = kmalloc(sizeof(struct megasas_ctrl_info), GFP_KERNEL); |
3773 | ||
3774 | /* | |
3775 | * Compute the max allowed sectors per IO: The controller info has two | |
3776 | * limits on max sectors. Driver should use the minimum of these two. | |
3777 | * | |
3778 | * 1 << stripe_sz_ops.min = max sectors per strip | |
3779 | * | |
3780 | * Note that older firmwares ( < FW ver 30) didn't report information | |
3781 | * to calculate max_sectors_1. So the number ended up as zero always. | |
3782 | */ | |
14faea9f | 3783 | tmp_sectors = 0; |
c4a3e0a5 BS |
3784 | if (ctrl_info && !megasas_get_ctrl_info(instance, ctrl_info)) { |
3785 | ||
3786 | max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) * | |
94cd65dd SS |
3787 | le16_to_cpu(ctrl_info->max_strips_per_io); |
3788 | max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size); | |
c4a3e0a5 | 3789 | |
14faea9f | 3790 | tmp_sectors = min_t(u32, max_sectors_1 , max_sectors_2); |
404a8a1a SS |
3791 | |
3792 | /*Check whether controller is iMR or MR */ | |
3793 | if (ctrl_info->memory_size) { | |
3794 | instance->is_imr = 0; | |
3795 | dev_info(&instance->pdev->dev, "Controller type: MR," | |
3796 | "Memory size is: %dMB\n", | |
94cd65dd | 3797 | le16_to_cpu(ctrl_info->memory_size)); |
404a8a1a SS |
3798 | } else { |
3799 | instance->is_imr = 1; | |
3800 | dev_info(&instance->pdev->dev, | |
3801 | "Controller type: iMR\n"); | |
3802 | } | |
94cd65dd SS |
3803 | /* OnOffProperties are converted into CPU arch*/ |
3804 | le32_to_cpus((u32 *)&ctrl_info->properties.OnOffProperties); | |
39a98554 | 3805 | instance->disableOnlineCtrlReset = |
3806 | ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset; | |
94cd65dd SS |
3807 | /* adapterOperations2 are converted into CPU arch*/ |
3808 | le32_to_cpus((u32 *)&ctrl_info->adapterOperations2); | |
bc93d425 SS |
3809 | instance->UnevenSpanSupport = |
3810 | ctrl_info->adapterOperations2.supportUnevenSpans; | |
3811 | if (instance->UnevenSpanSupport) { | |
3812 | struct fusion_context *fusion = instance->ctrl_context; | |
3813 | dev_info(&instance->pdev->dev, "FW supports: " | |
3814 | "UnevenSpanSupport=%x\n", instance->UnevenSpanSupport); | |
3815 | if (MR_ValidateMapInfo(instance)) | |
3816 | fusion->fast_path_io = 1; | |
3817 | else | |
3818 | fusion->fast_path_io = 0; | |
3819 | ||
3820 | } | |
14faea9f | 3821 | } |
14faea9f | 3822 | instance->max_sectors_per_req = instance->max_num_sge * |
3823 | PAGE_SIZE / 512; | |
3824 | if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors)) | |
3825 | instance->max_sectors_per_req = tmp_sectors; | |
c4a3e0a5 BS |
3826 | |
3827 | kfree(ctrl_info); | |
3828 | ||
c5daa6a9 | 3829 | /* Check for valid throttlequeuedepth module parameter */ |
404a8a1a | 3830 | if (instance->is_imr) { |
c5daa6a9 | 3831 | if (throttlequeuedepth > (instance->max_fw_cmds - |
3832 | MEGASAS_SKINNY_INT_CMDS)) | |
3833 | instance->throttlequeuedepth = | |
3834 | MEGASAS_THROTTLE_QUEUE_DEPTH; | |
3835 | else | |
3836 | instance->throttlequeuedepth = throttlequeuedepth; | |
3837 | } else { | |
3838 | if (throttlequeuedepth > (instance->max_fw_cmds - | |
3839 | MEGASAS_INT_CMDS)) | |
3840 | instance->throttlequeuedepth = | |
3841 | MEGASAS_THROTTLE_QUEUE_DEPTH; | |
3842 | else | |
3843 | instance->throttlequeuedepth = throttlequeuedepth; | |
3844 | } | |
3845 | ||
5d018ad0 SP |
3846 | /* |
3847 | * Setup tasklet for cmd completion | |
3848 | */ | |
3849 | ||
f86c5424 | 3850 | tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet, |
ad84db2e | 3851 | (unsigned long)instance); |
3852 | ||
c4a3e0a5 BS |
3853 | return 0; |
3854 | ||
eb1b1237 | 3855 | fail_init_adapter: |
cd50ba8e | 3856 | fail_ready_state: |
c4a3e0a5 BS |
3857 | iounmap(instance->reg_set); |
3858 | ||
3859 | fail_ioremap: | |
b6d5d880 | 3860 | pci_release_selected_regions(instance->pdev, instance->bar); |
c4a3e0a5 BS |
3861 | |
3862 | return -EINVAL; | |
3863 | } | |
3864 | ||
3865 | /** | |
3866 | * megasas_release_mfi - Reverses the FW initialization | |
3867 | * @intance: Adapter soft state | |
3868 | */ | |
3869 | static void megasas_release_mfi(struct megasas_instance *instance) | |
3870 | { | |
9c915a8c | 3871 | u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1); |
c4a3e0a5 | 3872 | |
9c915a8c | 3873 | if (instance->reply_queue) |
3874 | pci_free_consistent(instance->pdev, reply_q_sz, | |
c4a3e0a5 BS |
3875 | instance->reply_queue, instance->reply_queue_h); |
3876 | ||
3877 | megasas_free_cmds(instance); | |
3878 | ||
3879 | iounmap(instance->reg_set); | |
3880 | ||
b6d5d880 | 3881 | pci_release_selected_regions(instance->pdev, instance->bar); |
c4a3e0a5 BS |
3882 | } |
3883 | ||
3884 | /** | |
3885 | * megasas_get_seq_num - Gets latest event sequence numbers | |
3886 | * @instance: Adapter soft state | |
3887 | * @eli: FW event log sequence numbers information | |
3888 | * | |
3889 | * FW maintains a log of all events in a non-volatile area. Upper layers would | |
3890 | * usually find out the latest sequence number of the events, the seq number at | |
3891 | * the boot etc. They would "read" all the events below the latest seq number | |
3892 | * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq | |
3893 | * number), they would subsribe to AEN (asynchronous event notification) and | |
3894 | * wait for the events to happen. | |
3895 | */ | |
3896 | static int | |
3897 | megasas_get_seq_num(struct megasas_instance *instance, | |
3898 | struct megasas_evt_log_info *eli) | |
3899 | { | |
3900 | struct megasas_cmd *cmd; | |
3901 | struct megasas_dcmd_frame *dcmd; | |
3902 | struct megasas_evt_log_info *el_info; | |
3903 | dma_addr_t el_info_h = 0; | |
3904 | ||
3905 | cmd = megasas_get_cmd(instance); | |
3906 | ||
3907 | if (!cmd) { | |
3908 | return -ENOMEM; | |
3909 | } | |
3910 | ||
3911 | dcmd = &cmd->frame->dcmd; | |
3912 | el_info = pci_alloc_consistent(instance->pdev, | |
3913 | sizeof(struct megasas_evt_log_info), | |
3914 | &el_info_h); | |
3915 | ||
3916 | if (!el_info) { | |
3917 | megasas_return_cmd(instance, cmd); | |
3918 | return -ENOMEM; | |
3919 | } | |
3920 | ||
3921 | memset(el_info, 0, sizeof(*el_info)); | |
3922 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
3923 | ||
3924 | dcmd->cmd = MFI_CMD_DCMD; | |
3925 | dcmd->cmd_status = 0x0; | |
3926 | dcmd->sge_count = 1; | |
94cd65dd | 3927 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
c4a3e0a5 | 3928 | dcmd->timeout = 0; |
780a3762 | 3929 | dcmd->pad_0 = 0; |
94cd65dd SS |
3930 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info)); |
3931 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO); | |
3932 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(el_info_h); | |
3933 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_log_info)); | |
c4a3e0a5 BS |
3934 | |
3935 | megasas_issue_blocked_cmd(instance, cmd); | |
3936 | ||
3937 | /* | |
3938 | * Copy the data back into callers buffer | |
3939 | */ | |
94cd65dd SS |
3940 | eli->newest_seq_num = le32_to_cpu(el_info->newest_seq_num); |
3941 | eli->oldest_seq_num = le32_to_cpu(el_info->oldest_seq_num); | |
3942 | eli->clear_seq_num = le32_to_cpu(el_info->clear_seq_num); | |
3943 | eli->shutdown_seq_num = le32_to_cpu(el_info->shutdown_seq_num); | |
3944 | eli->boot_seq_num = le32_to_cpu(el_info->boot_seq_num); | |
c4a3e0a5 BS |
3945 | |
3946 | pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info), | |
3947 | el_info, el_info_h); | |
3948 | ||
3949 | megasas_return_cmd(instance, cmd); | |
3950 | ||
3951 | return 0; | |
3952 | } | |
3953 | ||
3954 | /** | |
3955 | * megasas_register_aen - Registers for asynchronous event notification | |
3956 | * @instance: Adapter soft state | |
3957 | * @seq_num: The starting sequence number | |
3958 | * @class_locale: Class of the event | |
3959 | * | |
3960 | * This function subscribes for AEN for events beyond the @seq_num. It requests | |
3961 | * to be notified if and only if the event is of type @class_locale | |
3962 | */ | |
3963 | static int | |
3964 | megasas_register_aen(struct megasas_instance *instance, u32 seq_num, | |
3965 | u32 class_locale_word) | |
3966 | { | |
3967 | int ret_val; | |
3968 | struct megasas_cmd *cmd; | |
3969 | struct megasas_dcmd_frame *dcmd; | |
3970 | union megasas_evt_class_locale curr_aen; | |
3971 | union megasas_evt_class_locale prev_aen; | |
3972 | ||
3973 | /* | |
3974 | * If there an AEN pending already (aen_cmd), check if the | |
3975 | * class_locale of that pending AEN is inclusive of the new | |
3976 | * AEN request we currently have. If it is, then we don't have | |
3977 | * to do anything. In other words, whichever events the current | |
3978 | * AEN request is subscribing to, have already been subscribed | |
3979 | * to. | |
3980 | * | |
3981 | * If the old_cmd is _not_ inclusive, then we have to abort | |
3982 | * that command, form a class_locale that is superset of both | |
3983 | * old and current and re-issue to the FW | |
3984 | */ | |
3985 | ||
3986 | curr_aen.word = class_locale_word; | |
3987 | ||
3988 | if (instance->aen_cmd) { | |
3989 | ||
3990 | prev_aen.word = instance->aen_cmd->frame->dcmd.mbox.w[1]; | |
94cd65dd | 3991 | prev_aen.members.locale = le16_to_cpu(prev_aen.members.locale); |
c4a3e0a5 BS |
3992 | |
3993 | /* | |
3994 | * A class whose enum value is smaller is inclusive of all | |
3995 | * higher values. If a PROGRESS (= -1) was previously | |
3996 | * registered, then a new registration requests for higher | |
3997 | * classes need not be sent to FW. They are automatically | |
3998 | * included. | |
3999 | * | |
4000 | * Locale numbers don't have such hierarchy. They are bitmap | |
4001 | * values | |
4002 | */ | |
4003 | if ((prev_aen.members.class <= curr_aen.members.class) && | |
3993a862 | 4004 | !((prev_aen.members.locale & curr_aen.members.locale) ^ |
c4a3e0a5 BS |
4005 | curr_aen.members.locale)) { |
4006 | /* | |
4007 | * Previously issued event registration includes | |
4008 | * current request. Nothing to do. | |
4009 | */ | |
4010 | return 0; | |
4011 | } else { | |
3993a862 | 4012 | curr_aen.members.locale |= prev_aen.members.locale; |
c4a3e0a5 BS |
4013 | |
4014 | if (prev_aen.members.class < curr_aen.members.class) | |
4015 | curr_aen.members.class = prev_aen.members.class; | |
4016 | ||
4017 | instance->aen_cmd->abort_aen = 1; | |
4018 | ret_val = megasas_issue_blocked_abort_cmd(instance, | |
4019 | instance-> | |
4020 | aen_cmd); | |
4021 | ||
4022 | if (ret_val) { | |
4023 | printk(KERN_DEBUG "megasas: Failed to abort " | |
4024 | "previous AEN command\n"); | |
4025 | return ret_val; | |
4026 | } | |
4027 | } | |
4028 | } | |
4029 | ||
4030 | cmd = megasas_get_cmd(instance); | |
4031 | ||
4032 | if (!cmd) | |
4033 | return -ENOMEM; | |
4034 | ||
4035 | dcmd = &cmd->frame->dcmd; | |
4036 | ||
4037 | memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail)); | |
4038 | ||
4039 | /* | |
4040 | * Prepare DCMD for aen registration | |
4041 | */ | |
4042 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
4043 | ||
4044 | dcmd->cmd = MFI_CMD_DCMD; | |
4045 | dcmd->cmd_status = 0x0; | |
4046 | dcmd->sge_count = 1; | |
94cd65dd | 4047 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
c4a3e0a5 | 4048 | dcmd->timeout = 0; |
780a3762 | 4049 | dcmd->pad_0 = 0; |
94cd65dd SS |
4050 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail)); |
4051 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT); | |
4052 | dcmd->mbox.w[0] = cpu_to_le32(seq_num); | |
39a98554 | 4053 | instance->last_seq_num = seq_num; |
94cd65dd SS |
4054 | dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word); |
4055 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->evt_detail_h); | |
4056 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_detail)); | |
c4a3e0a5 | 4057 | |
f4c9a131 YB |
4058 | if (instance->aen_cmd != NULL) { |
4059 | megasas_return_cmd(instance, cmd); | |
4060 | return 0; | |
4061 | } | |
4062 | ||
c4a3e0a5 BS |
4063 | /* |
4064 | * Store reference to the cmd used to register for AEN. When an | |
4065 | * application wants us to register for AEN, we have to abort this | |
4066 | * cmd and re-register with a new EVENT LOCALE supplied by that app | |
4067 | */ | |
4068 | instance->aen_cmd = cmd; | |
4069 | ||
4070 | /* | |
4071 | * Issue the aen registration frame | |
4072 | */ | |
9c915a8c | 4073 | instance->instancet->issue_dcmd(instance, cmd); |
c4a3e0a5 BS |
4074 | |
4075 | return 0; | |
4076 | } | |
4077 | ||
4078 | /** | |
4079 | * megasas_start_aen - Subscribes to AEN during driver load time | |
4080 | * @instance: Adapter soft state | |
4081 | */ | |
4082 | static int megasas_start_aen(struct megasas_instance *instance) | |
4083 | { | |
4084 | struct megasas_evt_log_info eli; | |
4085 | union megasas_evt_class_locale class_locale; | |
4086 | ||
4087 | /* | |
4088 | * Get the latest sequence number from FW | |
4089 | */ | |
4090 | memset(&eli, 0, sizeof(eli)); | |
4091 | ||
4092 | if (megasas_get_seq_num(instance, &eli)) | |
4093 | return -1; | |
4094 | ||
4095 | /* | |
4096 | * Register AEN with FW for latest sequence number plus 1 | |
4097 | */ | |
4098 | class_locale.members.reserved = 0; | |
4099 | class_locale.members.locale = MR_EVT_LOCALE_ALL; | |
4100 | class_locale.members.class = MR_EVT_CLASS_DEBUG; | |
4101 | ||
94cd65dd | 4102 | return megasas_register_aen(instance, |
3993a862 | 4103 | eli.newest_seq_num + 1, |
94cd65dd | 4104 | class_locale.word); |
c4a3e0a5 BS |
4105 | } |
4106 | ||
4107 | /** | |
4108 | * megasas_io_attach - Attaches this driver to SCSI mid-layer | |
4109 | * @instance: Adapter soft state | |
4110 | */ | |
4111 | static int megasas_io_attach(struct megasas_instance *instance) | |
4112 | { | |
4113 | struct Scsi_Host *host = instance->host; | |
4114 | ||
4115 | /* | |
4116 | * Export parameters required by SCSI mid-layer | |
4117 | */ | |
4118 | host->irq = instance->pdev->irq; | |
4119 | host->unique_id = instance->unique_id; | |
404a8a1a | 4120 | if (instance->is_imr) { |
7bebf5c7 YB |
4121 | host->can_queue = |
4122 | instance->max_fw_cmds - MEGASAS_SKINNY_INT_CMDS; | |
4123 | } else | |
4124 | host->can_queue = | |
4125 | instance->max_fw_cmds - MEGASAS_INT_CMDS; | |
c4a3e0a5 BS |
4126 | host->this_id = instance->init_id; |
4127 | host->sg_tablesize = instance->max_num_sge; | |
42a8d2b3 | 4128 | |
4129 | if (instance->fw_support_ieee) | |
4130 | instance->max_sectors_per_req = MEGASAS_MAX_SECTORS_IEEE; | |
4131 | ||
1fd10685 YB |
4132 | /* |
4133 | * Check if the module parameter value for max_sectors can be used | |
4134 | */ | |
4135 | if (max_sectors && max_sectors < instance->max_sectors_per_req) | |
4136 | instance->max_sectors_per_req = max_sectors; | |
4137 | else { | |
4138 | if (max_sectors) { | |
4139 | if (((instance->pdev->device == | |
4140 | PCI_DEVICE_ID_LSI_SAS1078GEN2) || | |
4141 | (instance->pdev->device == | |
4142 | PCI_DEVICE_ID_LSI_SAS0079GEN2)) && | |
4143 | (max_sectors <= MEGASAS_MAX_SECTORS)) { | |
4144 | instance->max_sectors_per_req = max_sectors; | |
4145 | } else { | |
4146 | printk(KERN_INFO "megasas: max_sectors should be > 0" | |
4147 | "and <= %d (or < 1MB for GEN2 controller)\n", | |
4148 | instance->max_sectors_per_req); | |
4149 | } | |
4150 | } | |
4151 | } | |
4152 | ||
c4a3e0a5 | 4153 | host->max_sectors = instance->max_sectors_per_req; |
9c915a8c | 4154 | host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN; |
c4a3e0a5 BS |
4155 | host->max_channel = MEGASAS_MAX_CHANNELS - 1; |
4156 | host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL; | |
4157 | host->max_lun = MEGASAS_MAX_LUN; | |
122da302 | 4158 | host->max_cmd_len = 16; |
c4a3e0a5 | 4159 | |
9c915a8c | 4160 | /* Fusion only supports host reset */ |
36807e67 | 4161 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) || |
21d3c710 SS |
4162 | (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || |
4163 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) { | |
9c915a8c | 4164 | host->hostt->eh_device_reset_handler = NULL; |
4165 | host->hostt->eh_bus_reset_handler = NULL; | |
4166 | } | |
4167 | ||
c4a3e0a5 BS |
4168 | /* |
4169 | * Notify the mid-layer about the new controller | |
4170 | */ | |
4171 | if (scsi_add_host(host, &instance->pdev->dev)) { | |
4172 | printk(KERN_DEBUG "megasas: scsi_add_host failed\n"); | |
4173 | return -ENODEV; | |
4174 | } | |
4175 | ||
4176 | /* | |
4177 | * Trigger SCSI to scan our drives | |
4178 | */ | |
4179 | scsi_scan_host(host); | |
4180 | return 0; | |
4181 | } | |
4182 | ||
31ea7088 | 4183 | static int |
4184 | megasas_set_dma_mask(struct pci_dev *pdev) | |
4185 | { | |
4186 | /* | |
4187 | * All our contollers are capable of performing 64-bit DMA | |
4188 | */ | |
4189 | if (IS_DMA64) { | |
6a35528a | 4190 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) { |
31ea7088 | 4191 | |
284901a9 | 4192 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) |
31ea7088 | 4193 | goto fail_set_dma_mask; |
4194 | } | |
4195 | } else { | |
284901a9 | 4196 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) |
31ea7088 | 4197 | goto fail_set_dma_mask; |
4198 | } | |
94cd65dd | 4199 | |
31ea7088 | 4200 | return 0; |
4201 | ||
4202 | fail_set_dma_mask: | |
4203 | return 1; | |
4204 | } | |
4205 | ||
c4a3e0a5 BS |
4206 | /** |
4207 | * megasas_probe_one - PCI hotplug entry point | |
4208 | * @pdev: PCI device structure | |
0d49016b | 4209 | * @id: PCI ids of supported hotplugged adapter |
c4a3e0a5 | 4210 | */ |
6f039790 GKH |
4211 | static int megasas_probe_one(struct pci_dev *pdev, |
4212 | const struct pci_device_id *id) | |
c4a3e0a5 | 4213 | { |
c8e858fe | 4214 | int rval, pos, i, j; |
c4a3e0a5 BS |
4215 | struct Scsi_Host *host; |
4216 | struct megasas_instance *instance; | |
66192dfe | 4217 | u16 control = 0; |
4218 | ||
4219 | /* Reset MSI-X in the kdump kernel */ | |
4220 | if (reset_devices) { | |
4221 | pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX); | |
4222 | if (pos) { | |
99369065 | 4223 | pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS, |
66192dfe | 4224 | &control); |
4225 | if (control & PCI_MSIX_FLAGS_ENABLE) { | |
4226 | dev_info(&pdev->dev, "resetting MSI-X\n"); | |
4227 | pci_write_config_word(pdev, | |
99369065 | 4228 | pos + PCI_MSIX_FLAGS, |
66192dfe | 4229 | control & |
4230 | ~PCI_MSIX_FLAGS_ENABLE); | |
4231 | } | |
4232 | } | |
4233 | } | |
c4a3e0a5 BS |
4234 | |
4235 | /* | |
4236 | * Announce PCI information | |
4237 | */ | |
4238 | printk(KERN_INFO "megasas: %#4.04x:%#4.04x:%#4.04x:%#4.04x: ", | |
4239 | pdev->vendor, pdev->device, pdev->subsystem_vendor, | |
4240 | pdev->subsystem_device); | |
4241 | ||
4242 | printk("bus %d:slot %d:func %d\n", | |
4243 | pdev->bus->number, PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); | |
4244 | ||
4245 | /* | |
4246 | * PCI prepping: enable device set bus mastering and dma mask | |
4247 | */ | |
aeab3fd7 | 4248 | rval = pci_enable_device_mem(pdev); |
c4a3e0a5 BS |
4249 | |
4250 | if (rval) { | |
4251 | return rval; | |
4252 | } | |
4253 | ||
4254 | pci_set_master(pdev); | |
4255 | ||
31ea7088 | 4256 | if (megasas_set_dma_mask(pdev)) |
4257 | goto fail_set_dma_mask; | |
c4a3e0a5 BS |
4258 | |
4259 | host = scsi_host_alloc(&megasas_template, | |
4260 | sizeof(struct megasas_instance)); | |
4261 | ||
4262 | if (!host) { | |
4263 | printk(KERN_DEBUG "megasas: scsi_host_alloc failed\n"); | |
4264 | goto fail_alloc_instance; | |
4265 | } | |
4266 | ||
4267 | instance = (struct megasas_instance *)host->hostdata; | |
4268 | memset(instance, 0, sizeof(*instance)); | |
39a98554 | 4269 | atomic_set( &instance->fw_reset_no_pci_access, 0 ); |
9c915a8c | 4270 | instance->pdev = pdev; |
c4a3e0a5 | 4271 | |
9c915a8c | 4272 | switch (instance->pdev->device) { |
4273 | case PCI_DEVICE_ID_LSI_FUSION: | |
36807e67 | 4274 | case PCI_DEVICE_ID_LSI_INVADER: |
21d3c710 | 4275 | case PCI_DEVICE_ID_LSI_FURY: |
9c915a8c | 4276 | { |
4277 | struct fusion_context *fusion; | |
4278 | ||
4279 | instance->ctrl_context = | |
4280 | kzalloc(sizeof(struct fusion_context), GFP_KERNEL); | |
4281 | if (!instance->ctrl_context) { | |
4282 | printk(KERN_DEBUG "megasas: Failed to allocate " | |
4283 | "memory for Fusion context info\n"); | |
4284 | goto fail_alloc_dma_buf; | |
4285 | } | |
4286 | fusion = instance->ctrl_context; | |
4287 | INIT_LIST_HEAD(&fusion->cmd_pool); | |
4288 | spin_lock_init(&fusion->cmd_pool_lock); | |
4289 | } | |
4290 | break; | |
4291 | default: /* For all other supported controllers */ | |
4292 | ||
4293 | instance->producer = | |
4294 | pci_alloc_consistent(pdev, sizeof(u32), | |
4295 | &instance->producer_h); | |
4296 | instance->consumer = | |
4297 | pci_alloc_consistent(pdev, sizeof(u32), | |
4298 | &instance->consumer_h); | |
4299 | ||
4300 | if (!instance->producer || !instance->consumer) { | |
4301 | printk(KERN_DEBUG "megasas: Failed to allocate" | |
4302 | "memory for producer, consumer\n"); | |
4303 | goto fail_alloc_dma_buf; | |
4304 | } | |
c4a3e0a5 | 4305 | |
9c915a8c | 4306 | *instance->producer = 0; |
4307 | *instance->consumer = 0; | |
4308 | break; | |
c4a3e0a5 BS |
4309 | } |
4310 | ||
c3518837 | 4311 | megasas_poll_wait_aen = 0; |
f4c9a131 | 4312 | instance->flag_ieee = 0; |
7e8a75f4 | 4313 | instance->ev = NULL; |
39a98554 | 4314 | instance->issuepend_done = 1; |
4315 | instance->adprecovery = MEGASAS_HBA_OPERATIONAL; | |
404a8a1a | 4316 | instance->is_imr = 0; |
39a98554 | 4317 | megasas_poll_wait_aen = 0; |
c4a3e0a5 BS |
4318 | |
4319 | instance->evt_detail = pci_alloc_consistent(pdev, | |
4320 | sizeof(struct | |
4321 | megasas_evt_detail), | |
4322 | &instance->evt_detail_h); | |
4323 | ||
4324 | if (!instance->evt_detail) { | |
4325 | printk(KERN_DEBUG "megasas: Failed to allocate memory for " | |
4326 | "event detail structure\n"); | |
4327 | goto fail_alloc_dma_buf; | |
4328 | } | |
4329 | ||
4330 | /* | |
4331 | * Initialize locks and queues | |
4332 | */ | |
4333 | INIT_LIST_HEAD(&instance->cmd_pool); | |
39a98554 | 4334 | INIT_LIST_HEAD(&instance->internal_reset_pending_q); |
c4a3e0a5 | 4335 | |
e4a082c7 SP |
4336 | atomic_set(&instance->fw_outstanding,0); |
4337 | ||
c4a3e0a5 BS |
4338 | init_waitqueue_head(&instance->int_cmd_wait_q); |
4339 | init_waitqueue_head(&instance->abort_cmd_wait_q); | |
4340 | ||
4341 | spin_lock_init(&instance->cmd_pool_lock); | |
39a98554 | 4342 | spin_lock_init(&instance->hba_lock); |
7343eb65 | 4343 | spin_lock_init(&instance->completion_lock); |
c4a3e0a5 | 4344 | |
e5a69e27 | 4345 | mutex_init(&instance->aen_mutex); |
9c915a8c | 4346 | mutex_init(&instance->reset_mutex); |
c4a3e0a5 BS |
4347 | |
4348 | /* | |
4349 | * Initialize PCI related and misc parameters | |
4350 | */ | |
c4a3e0a5 BS |
4351 | instance->host = host; |
4352 | instance->unique_id = pdev->bus->number << 8 | pdev->devfn; | |
4353 | instance->init_id = MEGASAS_DEFAULT_INIT_ID; | |
4354 | ||
7bebf5c7 YB |
4355 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) || |
4356 | (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) { | |
f4c9a131 | 4357 | instance->flag_ieee = 1; |
7bebf5c7 YB |
4358 | sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS); |
4359 | } else | |
4360 | sema_init(&instance->ioctl_sem, MEGASAS_INT_CMDS); | |
4361 | ||
658dcedb | 4362 | megasas_dbg_lvl = 0; |
05e9ebbe | 4363 | instance->flag = 0; |
0c79e681 | 4364 | instance->unload = 1; |
05e9ebbe | 4365 | instance->last_time = 0; |
39a98554 | 4366 | instance->disableOnlineCtrlReset = 1; |
bc93d425 | 4367 | instance->UnevenSpanSupport = 0; |
39a98554 | 4368 | |
36807e67 | 4369 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) || |
21d3c710 SS |
4370 | (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || |
4371 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) | |
9c915a8c | 4372 | INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq); |
4373 | else | |
4374 | INIT_WORK(&instance->work_init, process_fw_state_change_wq); | |
658dcedb | 4375 | |
0a77066a | 4376 | /* |
4377 | * Initialize MFI Firmware | |
4378 | */ | |
4379 | if (megasas_init_fw(instance)) | |
4380 | goto fail_init_mfi; | |
4381 | ||
d46a3ad6 | 4382 | retry_irq_register: |
c4a3e0a5 BS |
4383 | /* |
4384 | * Register IRQ | |
4385 | */ | |
c8e858fe | 4386 | if (instance->msix_vectors) { |
4387 | for (i = 0 ; i < instance->msix_vectors; i++) { | |
4388 | instance->irq_context[i].instance = instance; | |
4389 | instance->irq_context[i].MSIxIndex = i; | |
4390 | if (request_irq(instance->msixentry[i].vector, | |
4391 | instance->instancet->service_isr, 0, | |
4392 | "megasas", | |
4393 | &instance->irq_context[i])) { | |
4394 | printk(KERN_DEBUG "megasas: Failed to " | |
4395 | "register IRQ for vector %d.\n", i); | |
4396 | for (j = 0 ; j < i ; j++) | |
4397 | free_irq( | |
4398 | instance->msixentry[j].vector, | |
4399 | &instance->irq_context[j]); | |
d46a3ad6 SS |
4400 | /* Retry irq register for IO_APIC */ |
4401 | instance->msix_vectors = 0; | |
4402 | goto retry_irq_register; | |
c8e858fe | 4403 | } |
4404 | } | |
4405 | } else { | |
4406 | instance->irq_context[0].instance = instance; | |
4407 | instance->irq_context[0].MSIxIndex = 0; | |
4408 | if (request_irq(pdev->irq, instance->instancet->service_isr, | |
4409 | IRQF_SHARED, "megasas", | |
4410 | &instance->irq_context[0])) { | |
4411 | printk(KERN_DEBUG "megasas: Failed to register IRQ\n"); | |
4412 | goto fail_irq; | |
4413 | } | |
c4a3e0a5 BS |
4414 | } |
4415 | ||
d46a3ad6 | 4416 | instance->instancet->enable_intr(instance); |
c4a3e0a5 BS |
4417 | |
4418 | /* | |
4419 | * Store instance in PCI softstate | |
4420 | */ | |
4421 | pci_set_drvdata(pdev, instance); | |
4422 | ||
4423 | /* | |
4424 | * Add this controller to megasas_mgmt_info structure so that it | |
4425 | * can be exported to management applications | |
4426 | */ | |
4427 | megasas_mgmt_info.count++; | |
4428 | megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance; | |
4429 | megasas_mgmt_info.max_index++; | |
4430 | ||
541f90b7 | 4431 | /* |
4432 | * Register with SCSI mid-layer | |
4433 | */ | |
4434 | if (megasas_io_attach(instance)) | |
4435 | goto fail_io_attach; | |
4436 | ||
4437 | instance->unload = 0; | |
4438 | ||
c4a3e0a5 BS |
4439 | /* |
4440 | * Initiate AEN (Asynchronous Event Notification) | |
4441 | */ | |
4442 | if (megasas_start_aen(instance)) { | |
4443 | printk(KERN_DEBUG "megasas: start aen failed\n"); | |
4444 | goto fail_start_aen; | |
4445 | } | |
4446 | ||
c4a3e0a5 BS |
4447 | return 0; |
4448 | ||
4449 | fail_start_aen: | |
4450 | fail_io_attach: | |
4451 | megasas_mgmt_info.count--; | |
4452 | megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL; | |
4453 | megasas_mgmt_info.max_index--; | |
4454 | ||
d46a3ad6 | 4455 | instance->instancet->disable_intr(instance); |
c8e858fe | 4456 | if (instance->msix_vectors) |
4457 | for (i = 0 ; i < instance->msix_vectors; i++) | |
4458 | free_irq(instance->msixentry[i].vector, | |
4459 | &instance->irq_context[i]); | |
4460 | else | |
4461 | free_irq(instance->pdev->irq, &instance->irq_context[0]); | |
eb1b1237 | 4462 | fail_irq: |
36807e67 | 4463 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) || |
21d3c710 SS |
4464 | (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || |
4465 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) | |
eb1b1237 | 4466 | megasas_release_fusion(instance); |
4467 | else | |
4468 | megasas_release_mfi(instance); | |
c4a3e0a5 | 4469 | fail_init_mfi: |
c8e858fe | 4470 | if (instance->msix_vectors) |
0a77066a | 4471 | pci_disable_msix(instance->pdev); |
c4a3e0a5 BS |
4472 | fail_alloc_dma_buf: |
4473 | if (instance->evt_detail) | |
4474 | pci_free_consistent(pdev, sizeof(struct megasas_evt_detail), | |
4475 | instance->evt_detail, | |
4476 | instance->evt_detail_h); | |
4477 | ||
eb1b1237 | 4478 | if (instance->producer) |
c4a3e0a5 BS |
4479 | pci_free_consistent(pdev, sizeof(u32), instance->producer, |
4480 | instance->producer_h); | |
4481 | if (instance->consumer) | |
4482 | pci_free_consistent(pdev, sizeof(u32), instance->consumer, | |
4483 | instance->consumer_h); | |
4484 | scsi_host_put(host); | |
4485 | ||
4486 | fail_alloc_instance: | |
4487 | fail_set_dma_mask: | |
4488 | pci_disable_device(pdev); | |
4489 | ||
4490 | return -ENODEV; | |
4491 | } | |
4492 | ||
4493 | /** | |
4494 | * megasas_flush_cache - Requests FW to flush all its caches | |
4495 | * @instance: Adapter soft state | |
4496 | */ | |
4497 | static void megasas_flush_cache(struct megasas_instance *instance) | |
4498 | { | |
4499 | struct megasas_cmd *cmd; | |
4500 | struct megasas_dcmd_frame *dcmd; | |
4501 | ||
39a98554 | 4502 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) |
4503 | return; | |
4504 | ||
c4a3e0a5 BS |
4505 | cmd = megasas_get_cmd(instance); |
4506 | ||
4507 | if (!cmd) | |
4508 | return; | |
4509 | ||
4510 | dcmd = &cmd->frame->dcmd; | |
4511 | ||
4512 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
4513 | ||
4514 | dcmd->cmd = MFI_CMD_DCMD; | |
4515 | dcmd->cmd_status = 0x0; | |
4516 | dcmd->sge_count = 0; | |
94cd65dd | 4517 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE); |
c4a3e0a5 | 4518 | dcmd->timeout = 0; |
780a3762 | 4519 | dcmd->pad_0 = 0; |
c4a3e0a5 | 4520 | dcmd->data_xfer_len = 0; |
94cd65dd | 4521 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH); |
c4a3e0a5 BS |
4522 | dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE; |
4523 | ||
4524 | megasas_issue_blocked_cmd(instance, cmd); | |
4525 | ||
4526 | megasas_return_cmd(instance, cmd); | |
4527 | ||
4528 | return; | |
4529 | } | |
4530 | ||
4531 | /** | |
4532 | * megasas_shutdown_controller - Instructs FW to shutdown the controller | |
4533 | * @instance: Adapter soft state | |
31ea7088 | 4534 | * @opcode: Shutdown/Hibernate |
c4a3e0a5 | 4535 | */ |
31ea7088 | 4536 | static void megasas_shutdown_controller(struct megasas_instance *instance, |
4537 | u32 opcode) | |
c4a3e0a5 BS |
4538 | { |
4539 | struct megasas_cmd *cmd; | |
4540 | struct megasas_dcmd_frame *dcmd; | |
4541 | ||
39a98554 | 4542 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) |
4543 | return; | |
4544 | ||
c4a3e0a5 BS |
4545 | cmd = megasas_get_cmd(instance); |
4546 | ||
4547 | if (!cmd) | |
4548 | return; | |
4549 | ||
4550 | if (instance->aen_cmd) | |
4551 | megasas_issue_blocked_abort_cmd(instance, instance->aen_cmd); | |
9c915a8c | 4552 | if (instance->map_update_cmd) |
4553 | megasas_issue_blocked_abort_cmd(instance, | |
4554 | instance->map_update_cmd); | |
c4a3e0a5 BS |
4555 | dcmd = &cmd->frame->dcmd; |
4556 | ||
4557 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
4558 | ||
4559 | dcmd->cmd = MFI_CMD_DCMD; | |
4560 | dcmd->cmd_status = 0x0; | |
4561 | dcmd->sge_count = 0; | |
94cd65dd | 4562 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE); |
c4a3e0a5 | 4563 | dcmd->timeout = 0; |
780a3762 | 4564 | dcmd->pad_0 = 0; |
c4a3e0a5 | 4565 | dcmd->data_xfer_len = 0; |
94cd65dd | 4566 | dcmd->opcode = cpu_to_le32(opcode); |
c4a3e0a5 BS |
4567 | |
4568 | megasas_issue_blocked_cmd(instance, cmd); | |
4569 | ||
4570 | megasas_return_cmd(instance, cmd); | |
4571 | ||
4572 | return; | |
4573 | } | |
4574 | ||
33139b21 | 4575 | #ifdef CONFIG_PM |
31ea7088 | 4576 | /** |
ad84db2e | 4577 | * megasas_suspend - driver suspend entry point |
4578 | * @pdev: PCI device structure | |
31ea7088 | 4579 | * @state: PCI power state to suspend routine |
4580 | */ | |
33139b21 | 4581 | static int |
31ea7088 | 4582 | megasas_suspend(struct pci_dev *pdev, pm_message_t state) |
4583 | { | |
4584 | struct Scsi_Host *host; | |
4585 | struct megasas_instance *instance; | |
c8e858fe | 4586 | int i; |
31ea7088 | 4587 | |
4588 | instance = pci_get_drvdata(pdev); | |
4589 | host = instance->host; | |
0c79e681 | 4590 | instance->unload = 1; |
31ea7088 | 4591 | |
4592 | megasas_flush_cache(instance); | |
4593 | megasas_shutdown_controller(instance, MR_DCMD_HIBERNATE_SHUTDOWN); | |
7e8a75f4 YB |
4594 | |
4595 | /* cancel the delayed work if this work still in queue */ | |
4596 | if (instance->ev != NULL) { | |
4597 | struct megasas_aen_event *ev = instance->ev; | |
c1d390d8 | 4598 | cancel_delayed_work_sync(&ev->hotplug_work); |
7e8a75f4 YB |
4599 | instance->ev = NULL; |
4600 | } | |
4601 | ||
31ea7088 | 4602 | tasklet_kill(&instance->isr_tasklet); |
4603 | ||
4604 | pci_set_drvdata(instance->pdev, instance); | |
d46a3ad6 | 4605 | instance->instancet->disable_intr(instance); |
c8e858fe | 4606 | |
4607 | if (instance->msix_vectors) | |
4608 | for (i = 0 ; i < instance->msix_vectors; i++) | |
4609 | free_irq(instance->msixentry[i].vector, | |
4610 | &instance->irq_context[i]); | |
4611 | else | |
4612 | free_irq(instance->pdev->irq, &instance->irq_context[0]); | |
4613 | if (instance->msix_vectors) | |
80d9da98 | 4614 | pci_disable_msix(instance->pdev); |
31ea7088 | 4615 | |
4616 | pci_save_state(pdev); | |
4617 | pci_disable_device(pdev); | |
4618 | ||
4619 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
4620 | ||
4621 | return 0; | |
4622 | } | |
4623 | ||
4624 | /** | |
4625 | * megasas_resume- driver resume entry point | |
4626 | * @pdev: PCI device structure | |
4627 | */ | |
33139b21 | 4628 | static int |
31ea7088 | 4629 | megasas_resume(struct pci_dev *pdev) |
4630 | { | |
c8e858fe | 4631 | int rval, i, j; |
31ea7088 | 4632 | struct Scsi_Host *host; |
4633 | struct megasas_instance *instance; | |
4634 | ||
4635 | instance = pci_get_drvdata(pdev); | |
4636 | host = instance->host; | |
4637 | pci_set_power_state(pdev, PCI_D0); | |
4638 | pci_enable_wake(pdev, PCI_D0, 0); | |
4639 | pci_restore_state(pdev); | |
4640 | ||
4641 | /* | |
4642 | * PCI prepping: enable device set bus mastering and dma mask | |
4643 | */ | |
aeab3fd7 | 4644 | rval = pci_enable_device_mem(pdev); |
31ea7088 | 4645 | |
4646 | if (rval) { | |
4647 | printk(KERN_ERR "megasas: Enable device failed\n"); | |
4648 | return rval; | |
4649 | } | |
4650 | ||
4651 | pci_set_master(pdev); | |
4652 | ||
4653 | if (megasas_set_dma_mask(pdev)) | |
4654 | goto fail_set_dma_mask; | |
4655 | ||
4656 | /* | |
4657 | * Initialize MFI Firmware | |
4658 | */ | |
4659 | ||
31ea7088 | 4660 | atomic_set(&instance->fw_outstanding, 0); |
4661 | ||
4662 | /* | |
4663 | * We expect the FW state to be READY | |
4664 | */ | |
058a8fac | 4665 | if (megasas_transition_to_ready(instance, 0)) |
31ea7088 | 4666 | goto fail_ready_state; |
4667 | ||
3f1abce4 | 4668 | /* Now re-enable MSI-X */ |
c8e858fe | 4669 | if (instance->msix_vectors) |
4670 | pci_enable_msix(instance->pdev, instance->msixentry, | |
4671 | instance->msix_vectors); | |
3f1abce4 | 4672 | |
9c915a8c | 4673 | switch (instance->pdev->device) { |
4674 | case PCI_DEVICE_ID_LSI_FUSION: | |
36807e67 | 4675 | case PCI_DEVICE_ID_LSI_INVADER: |
21d3c710 | 4676 | case PCI_DEVICE_ID_LSI_FURY: |
9c915a8c | 4677 | { |
4678 | megasas_reset_reply_desc(instance); | |
4679 | if (megasas_ioc_init_fusion(instance)) { | |
4680 | megasas_free_cmds(instance); | |
4681 | megasas_free_cmds_fusion(instance); | |
4682 | goto fail_init_mfi; | |
4683 | } | |
4684 | if (!megasas_get_map_info(instance)) | |
4685 | megasas_sync_map_info(instance); | |
4686 | } | |
4687 | break; | |
4688 | default: | |
4689 | *instance->producer = 0; | |
4690 | *instance->consumer = 0; | |
4691 | if (megasas_issue_init_mfi(instance)) | |
4692 | goto fail_init_mfi; | |
4693 | break; | |
4694 | } | |
31ea7088 | 4695 | |
9c915a8c | 4696 | tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet, |
4697 | (unsigned long)instance); | |
31ea7088 | 4698 | |
4699 | /* | |
4700 | * Register IRQ | |
4701 | */ | |
c8e858fe | 4702 | if (instance->msix_vectors) { |
4703 | for (i = 0 ; i < instance->msix_vectors; i++) { | |
4704 | instance->irq_context[i].instance = instance; | |
4705 | instance->irq_context[i].MSIxIndex = i; | |
4706 | if (request_irq(instance->msixentry[i].vector, | |
4707 | instance->instancet->service_isr, 0, | |
4708 | "megasas", | |
4709 | &instance->irq_context[i])) { | |
4710 | printk(KERN_DEBUG "megasas: Failed to " | |
4711 | "register IRQ for vector %d.\n", i); | |
4712 | for (j = 0 ; j < i ; j++) | |
4713 | free_irq( | |
4714 | instance->msixentry[j].vector, | |
4715 | &instance->irq_context[j]); | |
4716 | goto fail_irq; | |
4717 | } | |
4718 | } | |
4719 | } else { | |
4720 | instance->irq_context[0].instance = instance; | |
4721 | instance->irq_context[0].MSIxIndex = 0; | |
4722 | if (request_irq(pdev->irq, instance->instancet->service_isr, | |
4723 | IRQF_SHARED, "megasas", | |
4724 | &instance->irq_context[0])) { | |
4725 | printk(KERN_DEBUG "megasas: Failed to register IRQ\n"); | |
4726 | goto fail_irq; | |
4727 | } | |
31ea7088 | 4728 | } |
4729 | ||
d46a3ad6 | 4730 | instance->instancet->enable_intr(instance); |
0c79e681 YB |
4731 | instance->unload = 0; |
4732 | ||
541f90b7 | 4733 | /* |
4734 | * Initiate AEN (Asynchronous Event Notification) | |
4735 | */ | |
4736 | if (megasas_start_aen(instance)) | |
4737 | printk(KERN_ERR "megasas: Start AEN failed\n"); | |
4738 | ||
31ea7088 | 4739 | return 0; |
4740 | ||
4741 | fail_irq: | |
4742 | fail_init_mfi: | |
4743 | if (instance->evt_detail) | |
4744 | pci_free_consistent(pdev, sizeof(struct megasas_evt_detail), | |
4745 | instance->evt_detail, | |
4746 | instance->evt_detail_h); | |
4747 | ||
4748 | if (instance->producer) | |
4749 | pci_free_consistent(pdev, sizeof(u32), instance->producer, | |
4750 | instance->producer_h); | |
4751 | if (instance->consumer) | |
4752 | pci_free_consistent(pdev, sizeof(u32), instance->consumer, | |
4753 | instance->consumer_h); | |
4754 | scsi_host_put(host); | |
4755 | ||
4756 | fail_set_dma_mask: | |
4757 | fail_ready_state: | |
4758 | ||
4759 | pci_disable_device(pdev); | |
4760 | ||
4761 | return -ENODEV; | |
4762 | } | |
33139b21 JS |
4763 | #else |
4764 | #define megasas_suspend NULL | |
4765 | #define megasas_resume NULL | |
4766 | #endif | |
31ea7088 | 4767 | |
c4a3e0a5 BS |
4768 | /** |
4769 | * megasas_detach_one - PCI hot"un"plug entry point | |
4770 | * @pdev: PCI device structure | |
4771 | */ | |
6f039790 | 4772 | static void megasas_detach_one(struct pci_dev *pdev) |
c4a3e0a5 BS |
4773 | { |
4774 | int i; | |
4775 | struct Scsi_Host *host; | |
4776 | struct megasas_instance *instance; | |
9c915a8c | 4777 | struct fusion_context *fusion; |
c4a3e0a5 BS |
4778 | |
4779 | instance = pci_get_drvdata(pdev); | |
c3518837 | 4780 | instance->unload = 1; |
c4a3e0a5 | 4781 | host = instance->host; |
9c915a8c | 4782 | fusion = instance->ctrl_context; |
c4a3e0a5 BS |
4783 | |
4784 | scsi_remove_host(instance->host); | |
4785 | megasas_flush_cache(instance); | |
31ea7088 | 4786 | megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN); |
7e8a75f4 YB |
4787 | |
4788 | /* cancel the delayed work if this work still in queue*/ | |
4789 | if (instance->ev != NULL) { | |
4790 | struct megasas_aen_event *ev = instance->ev; | |
c1d390d8 | 4791 | cancel_delayed_work_sync(&ev->hotplug_work); |
7e8a75f4 YB |
4792 | instance->ev = NULL; |
4793 | } | |
4794 | ||
5d018ad0 | 4795 | tasklet_kill(&instance->isr_tasklet); |
c4a3e0a5 BS |
4796 | |
4797 | /* | |
4798 | * Take the instance off the instance array. Note that we will not | |
4799 | * decrement the max_index. We let this array be sparse array | |
4800 | */ | |
4801 | for (i = 0; i < megasas_mgmt_info.max_index; i++) { | |
4802 | if (megasas_mgmt_info.instance[i] == instance) { | |
4803 | megasas_mgmt_info.count--; | |
4804 | megasas_mgmt_info.instance[i] = NULL; | |
4805 | ||
4806 | break; | |
4807 | } | |
4808 | } | |
4809 | ||
d46a3ad6 | 4810 | instance->instancet->disable_intr(instance); |
c4a3e0a5 | 4811 | |
c8e858fe | 4812 | if (instance->msix_vectors) |
4813 | for (i = 0 ; i < instance->msix_vectors; i++) | |
4814 | free_irq(instance->msixentry[i].vector, | |
4815 | &instance->irq_context[i]); | |
4816 | else | |
4817 | free_irq(instance->pdev->irq, &instance->irq_context[0]); | |
4818 | if (instance->msix_vectors) | |
80d9da98 | 4819 | pci_disable_msix(instance->pdev); |
c4a3e0a5 | 4820 | |
9c915a8c | 4821 | switch (instance->pdev->device) { |
4822 | case PCI_DEVICE_ID_LSI_FUSION: | |
36807e67 | 4823 | case PCI_DEVICE_ID_LSI_INVADER: |
21d3c710 | 4824 | case PCI_DEVICE_ID_LSI_FURY: |
9c915a8c | 4825 | megasas_release_fusion(instance); |
4826 | for (i = 0; i < 2 ; i++) | |
4827 | if (fusion->ld_map[i]) | |
4828 | dma_free_coherent(&instance->pdev->dev, | |
4829 | fusion->map_sz, | |
4830 | fusion->ld_map[i], | |
4831 | fusion-> | |
4832 | ld_map_phys[i]); | |
4833 | kfree(instance->ctrl_context); | |
4834 | break; | |
4835 | default: | |
4836 | megasas_release_mfi(instance); | |
9c915a8c | 4837 | pci_free_consistent(pdev, sizeof(u32), |
4838 | instance->producer, | |
4839 | instance->producer_h); | |
4840 | pci_free_consistent(pdev, sizeof(u32), | |
4841 | instance->consumer, | |
4842 | instance->consumer_h); | |
4843 | break; | |
4844 | } | |
c4a3e0a5 | 4845 | |
105900d5 SS |
4846 | if (instance->evt_detail) |
4847 | pci_free_consistent(pdev, sizeof(struct megasas_evt_detail), | |
4848 | instance->evt_detail, instance->evt_detail_h); | |
c4a3e0a5 BS |
4849 | scsi_host_put(host); |
4850 | ||
c4a3e0a5 BS |
4851 | pci_disable_device(pdev); |
4852 | ||
4853 | return; | |
4854 | } | |
4855 | ||
4856 | /** | |
4857 | * megasas_shutdown - Shutdown entry point | |
4858 | * @device: Generic device structure | |
4859 | */ | |
4860 | static void megasas_shutdown(struct pci_dev *pdev) | |
4861 | { | |
c8e858fe | 4862 | int i; |
c4a3e0a5 | 4863 | struct megasas_instance *instance = pci_get_drvdata(pdev); |
c8e858fe | 4864 | |
0c79e681 | 4865 | instance->unload = 1; |
c4a3e0a5 | 4866 | megasas_flush_cache(instance); |
530e6fc1 | 4867 | megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN); |
d46a3ad6 | 4868 | instance->instancet->disable_intr(instance); |
c8e858fe | 4869 | if (instance->msix_vectors) |
4870 | for (i = 0 ; i < instance->msix_vectors; i++) | |
4871 | free_irq(instance->msixentry[i].vector, | |
4872 | &instance->irq_context[i]); | |
4873 | else | |
4874 | free_irq(instance->pdev->irq, &instance->irq_context[0]); | |
4875 | if (instance->msix_vectors) | |
46fd256e | 4876 | pci_disable_msix(instance->pdev); |
c4a3e0a5 BS |
4877 | } |
4878 | ||
4879 | /** | |
4880 | * megasas_mgmt_open - char node "open" entry point | |
4881 | */ | |
4882 | static int megasas_mgmt_open(struct inode *inode, struct file *filep) | |
4883 | { | |
4884 | /* | |
4885 | * Allow only those users with admin rights | |
4886 | */ | |
4887 | if (!capable(CAP_SYS_ADMIN)) | |
4888 | return -EACCES; | |
4889 | ||
4890 | return 0; | |
4891 | } | |
4892 | ||
c4a3e0a5 BS |
4893 | /** |
4894 | * megasas_mgmt_fasync - Async notifier registration from applications | |
4895 | * | |
4896 | * This function adds the calling process to a driver global queue. When an | |
4897 | * event occurs, SIGIO will be sent to all processes in this queue. | |
4898 | */ | |
4899 | static int megasas_mgmt_fasync(int fd, struct file *filep, int mode) | |
4900 | { | |
4901 | int rc; | |
4902 | ||
0b950672 | 4903 | mutex_lock(&megasas_async_queue_mutex); |
c4a3e0a5 BS |
4904 | |
4905 | rc = fasync_helper(fd, filep, mode, &megasas_async_queue); | |
4906 | ||
0b950672 | 4907 | mutex_unlock(&megasas_async_queue_mutex); |
c4a3e0a5 BS |
4908 | |
4909 | if (rc >= 0) { | |
4910 | /* For sanity check when we get ioctl */ | |
4911 | filep->private_data = filep; | |
4912 | return 0; | |
4913 | } | |
4914 | ||
4915 | printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc); | |
4916 | ||
4917 | return rc; | |
4918 | } | |
4919 | ||
c3518837 YB |
4920 | /** |
4921 | * megasas_mgmt_poll - char node "poll" entry point | |
4922 | * */ | |
4923 | static unsigned int megasas_mgmt_poll(struct file *file, poll_table *wait) | |
4924 | { | |
4925 | unsigned int mask; | |
4926 | unsigned long flags; | |
4927 | poll_wait(file, &megasas_poll_wait, wait); | |
4928 | spin_lock_irqsave(&poll_aen_lock, flags); | |
4929 | if (megasas_poll_wait_aen) | |
4930 | mask = (POLLIN | POLLRDNORM); | |
4931 | else | |
4932 | mask = 0; | |
4933 | spin_unlock_irqrestore(&poll_aen_lock, flags); | |
4934 | return mask; | |
4935 | } | |
4936 | ||
c4a3e0a5 BS |
4937 | /** |
4938 | * megasas_mgmt_fw_ioctl - Issues management ioctls to FW | |
4939 | * @instance: Adapter soft state | |
4940 | * @argp: User's ioctl packet | |
4941 | */ | |
4942 | static int | |
4943 | megasas_mgmt_fw_ioctl(struct megasas_instance *instance, | |
4944 | struct megasas_iocpacket __user * user_ioc, | |
4945 | struct megasas_iocpacket *ioc) | |
4946 | { | |
4947 | struct megasas_sge32 *kern_sge32; | |
4948 | struct megasas_cmd *cmd; | |
4949 | void *kbuff_arr[MAX_IOCTL_SGE]; | |
4950 | dma_addr_t buf_handle = 0; | |
4951 | int error = 0, i; | |
4952 | void *sense = NULL; | |
4953 | dma_addr_t sense_handle; | |
7b2519af | 4954 | unsigned long *sense_ptr; |
c4a3e0a5 BS |
4955 | |
4956 | memset(kbuff_arr, 0, sizeof(kbuff_arr)); | |
4957 | ||
4958 | if (ioc->sge_count > MAX_IOCTL_SGE) { | |
4959 | printk(KERN_DEBUG "megasas: SGE count [%d] > max limit [%d]\n", | |
4960 | ioc->sge_count, MAX_IOCTL_SGE); | |
4961 | return -EINVAL; | |
4962 | } | |
4963 | ||
4964 | cmd = megasas_get_cmd(instance); | |
4965 | if (!cmd) { | |
4966 | printk(KERN_DEBUG "megasas: Failed to get a cmd packet\n"); | |
4967 | return -ENOMEM; | |
4968 | } | |
4969 | ||
4970 | /* | |
4971 | * User's IOCTL packet has 2 frames (maximum). Copy those two | |
4972 | * frames into our cmd's frames. cmd->frame's context will get | |
4973 | * overwritten when we copy from user's frames. So set that value | |
4974 | * alone separately | |
4975 | */ | |
4976 | memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE); | |
94cd65dd | 4977 | cmd->frame->hdr.context = cpu_to_le32(cmd->index); |
c3518837 | 4978 | cmd->frame->hdr.pad_0 = 0; |
94cd65dd SS |
4979 | cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_IEEE | |
4980 | MFI_FRAME_SGL64 | | |
4981 | MFI_FRAME_SENSE64)); | |
c4a3e0a5 BS |
4982 | |
4983 | /* | |
4984 | * The management interface between applications and the fw uses | |
4985 | * MFI frames. E.g, RAID configuration changes, LD property changes | |
4986 | * etc are accomplishes through different kinds of MFI frames. The | |
4987 | * driver needs to care only about substituting user buffers with | |
4988 | * kernel buffers in SGLs. The location of SGL is embedded in the | |
4989 | * struct iocpacket itself. | |
4990 | */ | |
4991 | kern_sge32 = (struct megasas_sge32 *) | |
4992 | ((unsigned long)cmd->frame + ioc->sgl_off); | |
4993 | ||
4994 | /* | |
4995 | * For each user buffer, create a mirror buffer and copy in | |
4996 | */ | |
4997 | for (i = 0; i < ioc->sge_count; i++) { | |
98cb7e44 BM |
4998 | if (!ioc->sgl[i].iov_len) |
4999 | continue; | |
5000 | ||
9f35fa8a | 5001 | kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev, |
c4a3e0a5 | 5002 | ioc->sgl[i].iov_len, |
9f35fa8a | 5003 | &buf_handle, GFP_KERNEL); |
c4a3e0a5 BS |
5004 | if (!kbuff_arr[i]) { |
5005 | printk(KERN_DEBUG "megasas: Failed to alloc " | |
5006 | "kernel SGL buffer for IOCTL \n"); | |
5007 | error = -ENOMEM; | |
5008 | goto out; | |
5009 | } | |
5010 | ||
5011 | /* | |
5012 | * We don't change the dma_coherent_mask, so | |
5013 | * pci_alloc_consistent only returns 32bit addresses | |
5014 | */ | |
94cd65dd SS |
5015 | kern_sge32[i].phys_addr = cpu_to_le32(buf_handle); |
5016 | kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len); | |
c4a3e0a5 BS |
5017 | |
5018 | /* | |
5019 | * We created a kernel buffer corresponding to the | |
5020 | * user buffer. Now copy in from the user buffer | |
5021 | */ | |
5022 | if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base, | |
5023 | (u32) (ioc->sgl[i].iov_len))) { | |
5024 | error = -EFAULT; | |
5025 | goto out; | |
5026 | } | |
5027 | } | |
5028 | ||
5029 | if (ioc->sense_len) { | |
9f35fa8a SP |
5030 | sense = dma_alloc_coherent(&instance->pdev->dev, ioc->sense_len, |
5031 | &sense_handle, GFP_KERNEL); | |
c4a3e0a5 BS |
5032 | if (!sense) { |
5033 | error = -ENOMEM; | |
5034 | goto out; | |
5035 | } | |
5036 | ||
5037 | sense_ptr = | |
7b2519af | 5038 | (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off); |
94cd65dd | 5039 | *sense_ptr = cpu_to_le32(sense_handle); |
c4a3e0a5 BS |
5040 | } |
5041 | ||
5042 | /* | |
5043 | * Set the sync_cmd flag so that the ISR knows not to complete this | |
5044 | * cmd to the SCSI mid-layer | |
5045 | */ | |
5046 | cmd->sync_cmd = 1; | |
5047 | megasas_issue_blocked_cmd(instance, cmd); | |
5048 | cmd->sync_cmd = 0; | |
5049 | ||
5050 | /* | |
5051 | * copy out the kernel buffers to user buffers | |
5052 | */ | |
5053 | for (i = 0; i < ioc->sge_count; i++) { | |
5054 | if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i], | |
5055 | ioc->sgl[i].iov_len)) { | |
5056 | error = -EFAULT; | |
5057 | goto out; | |
5058 | } | |
5059 | } | |
5060 | ||
5061 | /* | |
5062 | * copy out the sense | |
5063 | */ | |
5064 | if (ioc->sense_len) { | |
5065 | /* | |
b70a41e0 | 5066 | * sense_ptr points to the location that has the user |
c4a3e0a5 BS |
5067 | * sense buffer address |
5068 | */ | |
7b2519af YB |
5069 | sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw + |
5070 | ioc->sense_off); | |
c4a3e0a5 | 5071 | |
b70a41e0 | 5072 | if (copy_to_user((void __user *)((unsigned long)(*sense_ptr)), |
5073 | sense, ioc->sense_len)) { | |
b10c36a5 | 5074 | printk(KERN_ERR "megasas: Failed to copy out to user " |
5075 | "sense data\n"); | |
c4a3e0a5 BS |
5076 | error = -EFAULT; |
5077 | goto out; | |
5078 | } | |
5079 | } | |
5080 | ||
5081 | /* | |
5082 | * copy the status codes returned by the fw | |
5083 | */ | |
5084 | if (copy_to_user(&user_ioc->frame.hdr.cmd_status, | |
5085 | &cmd->frame->hdr.cmd_status, sizeof(u8))) { | |
5086 | printk(KERN_DEBUG "megasas: Error copying out cmd_status\n"); | |
5087 | error = -EFAULT; | |
5088 | } | |
5089 | ||
5090 | out: | |
5091 | if (sense) { | |
9f35fa8a | 5092 | dma_free_coherent(&instance->pdev->dev, ioc->sense_len, |
c4a3e0a5 BS |
5093 | sense, sense_handle); |
5094 | } | |
5095 | ||
7a6a731b BM |
5096 | for (i = 0; i < ioc->sge_count; i++) { |
5097 | if (kbuff_arr[i]) | |
5098 | dma_free_coherent(&instance->pdev->dev, | |
94cd65dd | 5099 | le32_to_cpu(kern_sge32[i].length), |
7a6a731b | 5100 | kbuff_arr[i], |
94cd65dd | 5101 | le32_to_cpu(kern_sge32[i].phys_addr)); |
c4a3e0a5 BS |
5102 | } |
5103 | ||
5104 | megasas_return_cmd(instance, cmd); | |
5105 | return error; | |
5106 | } | |
5107 | ||
c4a3e0a5 BS |
5108 | static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg) |
5109 | { | |
5110 | struct megasas_iocpacket __user *user_ioc = | |
5111 | (struct megasas_iocpacket __user *)arg; | |
5112 | struct megasas_iocpacket *ioc; | |
5113 | struct megasas_instance *instance; | |
5114 | int error; | |
39a98554 | 5115 | int i; |
5116 | unsigned long flags; | |
5117 | u32 wait_time = MEGASAS_RESET_WAIT_TIME; | |
c4a3e0a5 BS |
5118 | |
5119 | ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); | |
5120 | if (!ioc) | |
5121 | return -ENOMEM; | |
5122 | ||
5123 | if (copy_from_user(ioc, user_ioc, sizeof(*ioc))) { | |
5124 | error = -EFAULT; | |
5125 | goto out_kfree_ioc; | |
5126 | } | |
5127 | ||
5128 | instance = megasas_lookup_instance(ioc->host_no); | |
5129 | if (!instance) { | |
5130 | error = -ENODEV; | |
5131 | goto out_kfree_ioc; | |
5132 | } | |
5133 | ||
39a98554 | 5134 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) { |
5135 | printk(KERN_ERR "Controller in crit error\n"); | |
0c79e681 YB |
5136 | error = -ENODEV; |
5137 | goto out_kfree_ioc; | |
5138 | } | |
5139 | ||
5140 | if (instance->unload == 1) { | |
5141 | error = -ENODEV; | |
5142 | goto out_kfree_ioc; | |
5143 | } | |
5144 | ||
c4a3e0a5 BS |
5145 | /* |
5146 | * We will allow only MEGASAS_INT_CMDS number of parallel ioctl cmds | |
5147 | */ | |
5148 | if (down_interruptible(&instance->ioctl_sem)) { | |
5149 | error = -ERESTARTSYS; | |
5150 | goto out_kfree_ioc; | |
5151 | } | |
39a98554 | 5152 | |
5153 | for (i = 0; i < wait_time; i++) { | |
5154 | ||
5155 | spin_lock_irqsave(&instance->hba_lock, flags); | |
5156 | if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) { | |
5157 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
5158 | break; | |
5159 | } | |
5160 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
5161 | ||
5162 | if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) { | |
5163 | printk(KERN_NOTICE "megasas: waiting" | |
5164 | "for controller reset to finish\n"); | |
5165 | } | |
5166 | ||
5167 | msleep(1000); | |
5168 | } | |
5169 | ||
5170 | spin_lock_irqsave(&instance->hba_lock, flags); | |
5171 | if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) { | |
5172 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
5173 | ||
5174 | printk(KERN_ERR "megaraid_sas: timed out while" | |
5175 | "waiting for HBA to recover\n"); | |
5176 | error = -ENODEV; | |
c64e483e | 5177 | goto out_up; |
39a98554 | 5178 | } |
5179 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
5180 | ||
c4a3e0a5 | 5181 | error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc); |
c64e483e | 5182 | out_up: |
c4a3e0a5 BS |
5183 | up(&instance->ioctl_sem); |
5184 | ||
5185 | out_kfree_ioc: | |
5186 | kfree(ioc); | |
5187 | return error; | |
5188 | } | |
5189 | ||
5190 | static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg) | |
5191 | { | |
5192 | struct megasas_instance *instance; | |
5193 | struct megasas_aen aen; | |
5194 | int error; | |
39a98554 | 5195 | int i; |
5196 | unsigned long flags; | |
5197 | u32 wait_time = MEGASAS_RESET_WAIT_TIME; | |
c4a3e0a5 BS |
5198 | |
5199 | if (file->private_data != file) { | |
5200 | printk(KERN_DEBUG "megasas: fasync_helper was not " | |
5201 | "called first\n"); | |
5202 | return -EINVAL; | |
5203 | } | |
5204 | ||
5205 | if (copy_from_user(&aen, (void __user *)arg, sizeof(aen))) | |
5206 | return -EFAULT; | |
5207 | ||
5208 | instance = megasas_lookup_instance(aen.host_no); | |
5209 | ||
5210 | if (!instance) | |
5211 | return -ENODEV; | |
5212 | ||
39a98554 | 5213 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) { |
5214 | return -ENODEV; | |
0c79e681 YB |
5215 | } |
5216 | ||
5217 | if (instance->unload == 1) { | |
5218 | return -ENODEV; | |
5219 | } | |
5220 | ||
39a98554 | 5221 | for (i = 0; i < wait_time; i++) { |
5222 | ||
5223 | spin_lock_irqsave(&instance->hba_lock, flags); | |
5224 | if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) { | |
5225 | spin_unlock_irqrestore(&instance->hba_lock, | |
5226 | flags); | |
5227 | break; | |
5228 | } | |
5229 | ||
5230 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
5231 | ||
5232 | if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) { | |
5233 | printk(KERN_NOTICE "megasas: waiting for" | |
5234 | "controller reset to finish\n"); | |
5235 | } | |
5236 | ||
5237 | msleep(1000); | |
5238 | } | |
5239 | ||
5240 | spin_lock_irqsave(&instance->hba_lock, flags); | |
5241 | if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) { | |
5242 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
5243 | printk(KERN_ERR "megaraid_sas: timed out while waiting" | |
5244 | "for HBA to recover.\n"); | |
5245 | return -ENODEV; | |
5246 | } | |
5247 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
5248 | ||
e5a69e27 | 5249 | mutex_lock(&instance->aen_mutex); |
c4a3e0a5 BS |
5250 | error = megasas_register_aen(instance, aen.seq_num, |
5251 | aen.class_locale_word); | |
e5a69e27 | 5252 | mutex_unlock(&instance->aen_mutex); |
c4a3e0a5 BS |
5253 | return error; |
5254 | } | |
5255 | ||
5256 | /** | |
5257 | * megasas_mgmt_ioctl - char node ioctl entry point | |
5258 | */ | |
5259 | static long | |
5260 | megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
5261 | { | |
5262 | switch (cmd) { | |
5263 | case MEGASAS_IOC_FIRMWARE: | |
5264 | return megasas_mgmt_ioctl_fw(file, arg); | |
5265 | ||
5266 | case MEGASAS_IOC_GET_AEN: | |
5267 | return megasas_mgmt_ioctl_aen(file, arg); | |
5268 | } | |
5269 | ||
5270 | return -ENOTTY; | |
5271 | } | |
5272 | ||
5273 | #ifdef CONFIG_COMPAT | |
5274 | static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg) | |
5275 | { | |
5276 | struct compat_megasas_iocpacket __user *cioc = | |
5277 | (struct compat_megasas_iocpacket __user *)arg; | |
5278 | struct megasas_iocpacket __user *ioc = | |
5279 | compat_alloc_user_space(sizeof(struct megasas_iocpacket)); | |
5280 | int i; | |
5281 | int error = 0; | |
b3dc1a21 | 5282 | compat_uptr_t ptr; |
c4a3e0a5 | 5283 | |
83aabc1b JG |
5284 | if (clear_user(ioc, sizeof(*ioc))) |
5285 | return -EFAULT; | |
c4a3e0a5 BS |
5286 | |
5287 | if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) || | |
5288 | copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) || | |
5289 | copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) || | |
5290 | copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) || | |
5291 | copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) || | |
5292 | copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32))) | |
5293 | return -EFAULT; | |
5294 | ||
b3dc1a21 TH |
5295 | /* |
5296 | * The sense_ptr is used in megasas_mgmt_fw_ioctl only when | |
5297 | * sense_len is not null, so prepare the 64bit value under | |
5298 | * the same condition. | |
5299 | */ | |
5300 | if (ioc->sense_len) { | |
5301 | void __user **sense_ioc_ptr = | |
5302 | (void __user **)(ioc->frame.raw + ioc->sense_off); | |
5303 | compat_uptr_t *sense_cioc_ptr = | |
5304 | (compat_uptr_t *)(cioc->frame.raw + cioc->sense_off); | |
5305 | if (get_user(ptr, sense_cioc_ptr) || | |
5306 | put_user(compat_ptr(ptr), sense_ioc_ptr)) | |
5307 | return -EFAULT; | |
5308 | } | |
c4a3e0a5 | 5309 | |
b3dc1a21 | 5310 | for (i = 0; i < MAX_IOCTL_SGE; i++) { |
c4a3e0a5 BS |
5311 | if (get_user(ptr, &cioc->sgl[i].iov_base) || |
5312 | put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) || | |
5313 | copy_in_user(&ioc->sgl[i].iov_len, | |
5314 | &cioc->sgl[i].iov_len, sizeof(compat_size_t))) | |
5315 | return -EFAULT; | |
5316 | } | |
5317 | ||
5318 | error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc); | |
5319 | ||
5320 | if (copy_in_user(&cioc->frame.hdr.cmd_status, | |
5321 | &ioc->frame.hdr.cmd_status, sizeof(u8))) { | |
5322 | printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n"); | |
5323 | return -EFAULT; | |
5324 | } | |
5325 | return error; | |
5326 | } | |
5327 | ||
5328 | static long | |
5329 | megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd, | |
5330 | unsigned long arg) | |
5331 | { | |
5332 | switch (cmd) { | |
cb59aa6a SP |
5333 | case MEGASAS_IOC_FIRMWARE32: |
5334 | return megasas_mgmt_compat_ioctl_fw(file, arg); | |
c4a3e0a5 BS |
5335 | case MEGASAS_IOC_GET_AEN: |
5336 | return megasas_mgmt_ioctl_aen(file, arg); | |
5337 | } | |
5338 | ||
5339 | return -ENOTTY; | |
5340 | } | |
5341 | #endif | |
5342 | ||
5343 | /* | |
5344 | * File operations structure for management interface | |
5345 | */ | |
00977a59 | 5346 | static const struct file_operations megasas_mgmt_fops = { |
c4a3e0a5 BS |
5347 | .owner = THIS_MODULE, |
5348 | .open = megasas_mgmt_open, | |
c4a3e0a5 BS |
5349 | .fasync = megasas_mgmt_fasync, |
5350 | .unlocked_ioctl = megasas_mgmt_ioctl, | |
c3518837 | 5351 | .poll = megasas_mgmt_poll, |
c4a3e0a5 BS |
5352 | #ifdef CONFIG_COMPAT |
5353 | .compat_ioctl = megasas_mgmt_compat_ioctl, | |
5354 | #endif | |
6038f373 | 5355 | .llseek = noop_llseek, |
c4a3e0a5 BS |
5356 | }; |
5357 | ||
5358 | /* | |
5359 | * PCI hotplug support registration structure | |
5360 | */ | |
5361 | static struct pci_driver megasas_pci_driver = { | |
5362 | ||
5363 | .name = "megaraid_sas", | |
5364 | .id_table = megasas_pci_table, | |
5365 | .probe = megasas_probe_one, | |
6f039790 | 5366 | .remove = megasas_detach_one, |
31ea7088 | 5367 | .suspend = megasas_suspend, |
5368 | .resume = megasas_resume, | |
c4a3e0a5 BS |
5369 | .shutdown = megasas_shutdown, |
5370 | }; | |
5371 | ||
5372 | /* | |
5373 | * Sysfs driver attributes | |
5374 | */ | |
5375 | static ssize_t megasas_sysfs_show_version(struct device_driver *dd, char *buf) | |
5376 | { | |
5377 | return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n", | |
5378 | MEGASAS_VERSION); | |
5379 | } | |
5380 | ||
5381 | static DRIVER_ATTR(version, S_IRUGO, megasas_sysfs_show_version, NULL); | |
5382 | ||
5383 | static ssize_t | |
5384 | megasas_sysfs_show_release_date(struct device_driver *dd, char *buf) | |
5385 | { | |
5386 | return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n", | |
5387 | MEGASAS_RELDATE); | |
5388 | } | |
5389 | ||
5390 | static DRIVER_ATTR(release_date, S_IRUGO, megasas_sysfs_show_release_date, | |
5391 | NULL); | |
5392 | ||
72c4fd36 YB |
5393 | static ssize_t |
5394 | megasas_sysfs_show_support_poll_for_event(struct device_driver *dd, char *buf) | |
5395 | { | |
5396 | return sprintf(buf, "%u\n", support_poll_for_event); | |
5397 | } | |
5398 | ||
5399 | static DRIVER_ATTR(support_poll_for_event, S_IRUGO, | |
5400 | megasas_sysfs_show_support_poll_for_event, NULL); | |
5401 | ||
837f5fe8 YB |
5402 | static ssize_t |
5403 | megasas_sysfs_show_support_device_change(struct device_driver *dd, char *buf) | |
5404 | { | |
5405 | return sprintf(buf, "%u\n", support_device_change); | |
5406 | } | |
5407 | ||
5408 | static DRIVER_ATTR(support_device_change, S_IRUGO, | |
5409 | megasas_sysfs_show_support_device_change, NULL); | |
5410 | ||
658dcedb SP |
5411 | static ssize_t |
5412 | megasas_sysfs_show_dbg_lvl(struct device_driver *dd, char *buf) | |
5413 | { | |
ad84db2e | 5414 | return sprintf(buf, "%u\n", megasas_dbg_lvl); |
658dcedb SP |
5415 | } |
5416 | ||
5417 | static ssize_t | |
5418 | megasas_sysfs_set_dbg_lvl(struct device_driver *dd, const char *buf, size_t count) | |
5419 | { | |
5420 | int retval = count; | |
5421 | if(sscanf(buf,"%u",&megasas_dbg_lvl)<1){ | |
5422 | printk(KERN_ERR "megasas: could not set dbg_lvl\n"); | |
5423 | retval = -EINVAL; | |
5424 | } | |
5425 | return retval; | |
5426 | } | |
5427 | ||
66dca9b8 | 5428 | static DRIVER_ATTR(dbg_lvl, S_IRUGO|S_IWUSR, megasas_sysfs_show_dbg_lvl, |
ad84db2e | 5429 | megasas_sysfs_set_dbg_lvl); |
5430 | ||
7e8a75f4 YB |
5431 | static void |
5432 | megasas_aen_polling(struct work_struct *work) | |
5433 | { | |
5434 | struct megasas_aen_event *ev = | |
c1d390d8 | 5435 | container_of(work, struct megasas_aen_event, hotplug_work.work); |
7e8a75f4 YB |
5436 | struct megasas_instance *instance = ev->instance; |
5437 | union megasas_evt_class_locale class_locale; | |
5438 | struct Scsi_Host *host; | |
5439 | struct scsi_device *sdev1; | |
5440 | u16 pd_index = 0; | |
c9786842 | 5441 | u16 ld_index = 0; |
7e8a75f4 YB |
5442 | int i, j, doscan = 0; |
5443 | u32 seq_num; | |
5444 | int error; | |
5445 | ||
5446 | if (!instance) { | |
5447 | printk(KERN_ERR "invalid instance!\n"); | |
5448 | kfree(ev); | |
5449 | return; | |
5450 | } | |
5451 | instance->ev = NULL; | |
5452 | host = instance->host; | |
5453 | if (instance->evt_detail) { | |
5454 | ||
94cd65dd | 5455 | switch (le32_to_cpu(instance->evt_detail->code)) { |
7e8a75f4 | 5456 | case MR_EVT_PD_INSERTED: |
c9786842 YB |
5457 | if (megasas_get_pd_list(instance) == 0) { |
5458 | for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) { | |
5459 | for (j = 0; | |
5460 | j < MEGASAS_MAX_DEV_PER_CHANNEL; | |
5461 | j++) { | |
5462 | ||
5463 | pd_index = | |
5464 | (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j; | |
5465 | ||
5466 | sdev1 = | |
5467 | scsi_device_lookup(host, i, j, 0); | |
5468 | ||
5469 | if (instance->pd_list[pd_index].driveState | |
5470 | == MR_PD_STATE_SYSTEM) { | |
5471 | if (!sdev1) { | |
5472 | scsi_add_device(host, i, j, 0); | |
5473 | } | |
5474 | ||
5475 | if (sdev1) | |
5476 | scsi_device_put(sdev1); | |
5477 | } | |
5478 | } | |
5479 | } | |
5480 | } | |
5481 | doscan = 0; | |
5482 | break; | |
5483 | ||
7e8a75f4 | 5484 | case MR_EVT_PD_REMOVED: |
c9786842 | 5485 | if (megasas_get_pd_list(instance) == 0) { |
c9786842 YB |
5486 | for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) { |
5487 | for (j = 0; | |
5488 | j < MEGASAS_MAX_DEV_PER_CHANNEL; | |
5489 | j++) { | |
5490 | ||
5491 | pd_index = | |
5492 | (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j; | |
5493 | ||
5494 | sdev1 = | |
5495 | scsi_device_lookup(host, i, j, 0); | |
5496 | ||
5497 | if (instance->pd_list[pd_index].driveState | |
5498 | == MR_PD_STATE_SYSTEM) { | |
5499 | if (sdev1) { | |
5500 | scsi_device_put(sdev1); | |
5501 | } | |
5502 | } else { | |
5503 | if (sdev1) { | |
5504 | scsi_remove_device(sdev1); | |
5505 | scsi_device_put(sdev1); | |
5506 | } | |
5507 | } | |
5508 | } | |
5509 | } | |
5510 | } | |
5511 | doscan = 0; | |
5512 | break; | |
5513 | ||
5514 | case MR_EVT_LD_OFFLINE: | |
4c598b23 | 5515 | case MR_EVT_CFG_CLEARED: |
c9786842 | 5516 | case MR_EVT_LD_DELETED: |
21c9e160 | 5517 | if (megasas_ld_list_query(instance, |
5518 | MR_LD_QUERY_TYPE_EXPOSED_TO_HOST)) | |
5519 | megasas_get_ld_list(instance); | |
c9786842 YB |
5520 | for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) { |
5521 | for (j = 0; | |
5522 | j < MEGASAS_MAX_DEV_PER_CHANNEL; | |
5523 | j++) { | |
5524 | ||
5525 | ld_index = | |
5526 | (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j; | |
5527 | ||
5528 | sdev1 = scsi_device_lookup(host, | |
21c9e160 | 5529 | MEGASAS_MAX_PD_CHANNELS + i, |
c9786842 YB |
5530 | j, |
5531 | 0); | |
5532 | ||
5533 | if (instance->ld_ids[ld_index] != 0xff) { | |
5534 | if (sdev1) { | |
5535 | scsi_device_put(sdev1); | |
5536 | } | |
5537 | } else { | |
5538 | if (sdev1) { | |
5539 | scsi_remove_device(sdev1); | |
5540 | scsi_device_put(sdev1); | |
5541 | } | |
5542 | } | |
5543 | } | |
5544 | } | |
5545 | doscan = 0; | |
5546 | break; | |
5547 | case MR_EVT_LD_CREATED: | |
21c9e160 | 5548 | if (megasas_ld_list_query(instance, |
5549 | MR_LD_QUERY_TYPE_EXPOSED_TO_HOST)) | |
5550 | megasas_get_ld_list(instance); | |
c9786842 YB |
5551 | for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) { |
5552 | for (j = 0; | |
5553 | j < MEGASAS_MAX_DEV_PER_CHANNEL; | |
5554 | j++) { | |
5555 | ld_index = | |
5556 | (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j; | |
5557 | ||
5558 | sdev1 = scsi_device_lookup(host, | |
21c9e160 | 5559 | MEGASAS_MAX_PD_CHANNELS + i, |
c9786842 YB |
5560 | j, 0); |
5561 | ||
5562 | if (instance->ld_ids[ld_index] != | |
5563 | 0xff) { | |
5564 | if (!sdev1) { | |
5565 | scsi_add_device(host, | |
21c9e160 | 5566 | MEGASAS_MAX_PD_CHANNELS + i, |
c9786842 YB |
5567 | j, 0); |
5568 | } | |
5569 | } | |
5570 | if (sdev1) { | |
5571 | scsi_device_put(sdev1); | |
5572 | } | |
5573 | } | |
5574 | } | |
5575 | doscan = 0; | |
5576 | break; | |
7e8a75f4 | 5577 | case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED: |
c9786842 | 5578 | case MR_EVT_FOREIGN_CFG_IMPORTED: |
9c915a8c | 5579 | case MR_EVT_LD_STATE_CHANGE: |
7e8a75f4 YB |
5580 | doscan = 1; |
5581 | break; | |
5582 | default: | |
5583 | doscan = 0; | |
5584 | break; | |
5585 | } | |
5586 | } else { | |
5587 | printk(KERN_ERR "invalid evt_detail!\n"); | |
5588 | kfree(ev); | |
5589 | return; | |
5590 | } | |
5591 | ||
5592 | if (doscan) { | |
5593 | printk(KERN_INFO "scanning ...\n"); | |
5594 | megasas_get_pd_list(instance); | |
5595 | for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) { | |
5596 | for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) { | |
5597 | pd_index = i*MEGASAS_MAX_DEV_PER_CHANNEL + j; | |
5598 | sdev1 = scsi_device_lookup(host, i, j, 0); | |
5599 | if (instance->pd_list[pd_index].driveState == | |
5600 | MR_PD_STATE_SYSTEM) { | |
5601 | if (!sdev1) { | |
5602 | scsi_add_device(host, i, j, 0); | |
5603 | } | |
5604 | if (sdev1) | |
5605 | scsi_device_put(sdev1); | |
5606 | } else { | |
5607 | if (sdev1) { | |
5608 | scsi_remove_device(sdev1); | |
5609 | scsi_device_put(sdev1); | |
5610 | } | |
5611 | } | |
5612 | } | |
5613 | } | |
c9786842 | 5614 | |
21c9e160 | 5615 | if (megasas_ld_list_query(instance, |
5616 | MR_LD_QUERY_TYPE_EXPOSED_TO_HOST)) | |
5617 | megasas_get_ld_list(instance); | |
c9786842 YB |
5618 | for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) { |
5619 | for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) { | |
5620 | ld_index = | |
5621 | (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j; | |
5622 | ||
5623 | sdev1 = scsi_device_lookup(host, | |
21c9e160 | 5624 | MEGASAS_MAX_PD_CHANNELS + i, j, 0); |
c9786842 YB |
5625 | if (instance->ld_ids[ld_index] != 0xff) { |
5626 | if (!sdev1) { | |
5627 | scsi_add_device(host, | |
21c9e160 | 5628 | MEGASAS_MAX_PD_CHANNELS + i, |
c9786842 YB |
5629 | j, 0); |
5630 | } else { | |
5631 | scsi_device_put(sdev1); | |
5632 | } | |
5633 | } else { | |
5634 | if (sdev1) { | |
5635 | scsi_remove_device(sdev1); | |
5636 | scsi_device_put(sdev1); | |
5637 | } | |
5638 | } | |
5639 | } | |
5640 | } | |
7e8a75f4 YB |
5641 | } |
5642 | ||
5643 | if ( instance->aen_cmd != NULL ) { | |
5644 | kfree(ev); | |
5645 | return ; | |
5646 | } | |
5647 | ||
94cd65dd | 5648 | seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1; |
7e8a75f4 YB |
5649 | |
5650 | /* Register AEN with FW for latest sequence number plus 1 */ | |
5651 | class_locale.members.reserved = 0; | |
5652 | class_locale.members.locale = MR_EVT_LOCALE_ALL; | |
5653 | class_locale.members.class = MR_EVT_CLASS_DEBUG; | |
5654 | mutex_lock(&instance->aen_mutex); | |
5655 | error = megasas_register_aen(instance, seq_num, | |
5656 | class_locale.word); | |
5657 | mutex_unlock(&instance->aen_mutex); | |
5658 | ||
5659 | if (error) | |
5660 | printk(KERN_ERR "register aen failed error %x\n", error); | |
5661 | ||
5662 | kfree(ev); | |
5663 | } | |
5664 | ||
c4a3e0a5 BS |
5665 | /** |
5666 | * megasas_init - Driver load entry point | |
5667 | */ | |
5668 | static int __init megasas_init(void) | |
5669 | { | |
5670 | int rval; | |
5671 | ||
5672 | /* | |
5673 | * Announce driver version and other information | |
5674 | */ | |
5675 | printk(KERN_INFO "megasas: %s %s\n", MEGASAS_VERSION, | |
5676 | MEGASAS_EXT_VERSION); | |
5677 | ||
bd8d6dd4 KD |
5678 | spin_lock_init(&poll_aen_lock); |
5679 | ||
72c4fd36 | 5680 | support_poll_for_event = 2; |
837f5fe8 | 5681 | support_device_change = 1; |
72c4fd36 | 5682 | |
c4a3e0a5 BS |
5683 | memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info)); |
5684 | ||
5685 | /* | |
5686 | * Register character device node | |
5687 | */ | |
5688 | rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops); | |
5689 | ||
5690 | if (rval < 0) { | |
5691 | printk(KERN_DEBUG "megasas: failed to open device node\n"); | |
5692 | return rval; | |
5693 | } | |
5694 | ||
5695 | megasas_mgmt_majorno = rval; | |
5696 | ||
5697 | /* | |
5698 | * Register ourselves as PCI hotplug module | |
5699 | */ | |
4041b9cd | 5700 | rval = pci_register_driver(&megasas_pci_driver); |
c4a3e0a5 BS |
5701 | |
5702 | if (rval) { | |
5703 | printk(KERN_DEBUG "megasas: PCI hotplug regisration failed \n"); | |
83aabc1b JG |
5704 | goto err_pcidrv; |
5705 | } | |
5706 | ||
5707 | rval = driver_create_file(&megasas_pci_driver.driver, | |
5708 | &driver_attr_version); | |
5709 | if (rval) | |
5710 | goto err_dcf_attr_ver; | |
5711 | rval = driver_create_file(&megasas_pci_driver.driver, | |
5712 | &driver_attr_release_date); | |
5713 | if (rval) | |
5714 | goto err_dcf_rel_date; | |
72c4fd36 YB |
5715 | |
5716 | rval = driver_create_file(&megasas_pci_driver.driver, | |
5717 | &driver_attr_support_poll_for_event); | |
5718 | if (rval) | |
5719 | goto err_dcf_support_poll_for_event; | |
5720 | ||
83aabc1b JG |
5721 | rval = driver_create_file(&megasas_pci_driver.driver, |
5722 | &driver_attr_dbg_lvl); | |
5723 | if (rval) | |
5724 | goto err_dcf_dbg_lvl; | |
837f5fe8 YB |
5725 | rval = driver_create_file(&megasas_pci_driver.driver, |
5726 | &driver_attr_support_device_change); | |
5727 | if (rval) | |
5728 | goto err_dcf_support_device_change; | |
5729 | ||
c4a3e0a5 | 5730 | return rval; |
ad84db2e | 5731 | |
837f5fe8 | 5732 | err_dcf_support_device_change: |
ad84db2e | 5733 | driver_remove_file(&megasas_pci_driver.driver, |
5734 | &driver_attr_dbg_lvl); | |
83aabc1b | 5735 | err_dcf_dbg_lvl: |
72c4fd36 YB |
5736 | driver_remove_file(&megasas_pci_driver.driver, |
5737 | &driver_attr_support_poll_for_event); | |
5738 | ||
5739 | err_dcf_support_poll_for_event: | |
83aabc1b JG |
5740 | driver_remove_file(&megasas_pci_driver.driver, |
5741 | &driver_attr_release_date); | |
72c4fd36 | 5742 | |
83aabc1b JG |
5743 | err_dcf_rel_date: |
5744 | driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version); | |
5745 | err_dcf_attr_ver: | |
5746 | pci_unregister_driver(&megasas_pci_driver); | |
5747 | err_pcidrv: | |
5748 | unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl"); | |
0d49016b | 5749 | return rval; |
c4a3e0a5 BS |
5750 | } |
5751 | ||
5752 | /** | |
5753 | * megasas_exit - Driver unload entry point | |
5754 | */ | |
5755 | static void __exit megasas_exit(void) | |
5756 | { | |
658dcedb SP |
5757 | driver_remove_file(&megasas_pci_driver.driver, |
5758 | &driver_attr_dbg_lvl); | |
837f5fe8 YB |
5759 | driver_remove_file(&megasas_pci_driver.driver, |
5760 | &driver_attr_support_poll_for_event); | |
5761 | driver_remove_file(&megasas_pci_driver.driver, | |
5762 | &driver_attr_support_device_change); | |
83aabc1b JG |
5763 | driver_remove_file(&megasas_pci_driver.driver, |
5764 | &driver_attr_release_date); | |
5765 | driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version); | |
c4a3e0a5 BS |
5766 | |
5767 | pci_unregister_driver(&megasas_pci_driver); | |
5768 | unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl"); | |
5769 | } | |
5770 | ||
5771 | module_init(megasas_init); | |
5772 | module_exit(megasas_exit); |