Commit | Line | Data |
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c4a3e0a5 | 1 | /* |
3f1530c1 | 2 | * Linux MegaRAID driver for SAS based RAID controllers |
c4a3e0a5 | 3 | * |
e399065b SS |
4 | * Copyright (c) 2003-2013 LSI Corporation |
5 | * Copyright (c) 2013-2014 Avago Technologies | |
c4a3e0a5 | 6 | * |
3f1530c1 | 7 | * This program is free software; you can redistribute it and/or |
8 | * modify it under the terms of the GNU General Public License | |
9 | * as published by the Free Software Foundation; either version 2 | |
10 | * of the License, or (at your option) any later version. | |
c4a3e0a5 | 11 | * |
3f1530c1 | 12 | * This program is distributed in the hope that it will be useful, |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
c4a3e0a5 | 16 | * |
3f1530c1 | 17 | * You should have received a copy of the GNU General Public License |
e399065b | 18 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
c4a3e0a5 | 19 | * |
e399065b | 20 | * Authors: Avago Technologies |
3f1530c1 | 21 | * Sreenivas Bagalkote |
22 | * Sumant Patro | |
23 | * Bo Yang | |
e399065b SS |
24 | * Adam Radford |
25 | * Kashyap Desai <kashyap.desai@avagotech.com> | |
26 | * Sumit Saxena <sumit.saxena@avagotech.com> | |
c4a3e0a5 | 27 | * |
e399065b | 28 | * Send feedback to: megaraidlinux.pdl@avagotech.com |
3f1530c1 | 29 | * |
e399065b SS |
30 | * Mail to: Avago Technologies, 350 West Trimble Road, Building 90, |
31 | * San Jose, California 95131 | |
c4a3e0a5 BS |
32 | */ |
33 | ||
34 | #include <linux/kernel.h> | |
35 | #include <linux/types.h> | |
36 | #include <linux/pci.h> | |
37 | #include <linux/list.h> | |
c4a3e0a5 BS |
38 | #include <linux/moduleparam.h> |
39 | #include <linux/module.h> | |
40 | #include <linux/spinlock.h> | |
41 | #include <linux/interrupt.h> | |
42 | #include <linux/delay.h> | |
43 | #include <linux/uio.h> | |
5a0e3ad6 | 44 | #include <linux/slab.h> |
c4a3e0a5 | 45 | #include <asm/uaccess.h> |
43399236 | 46 | #include <linux/fs.h> |
c4a3e0a5 | 47 | #include <linux/compat.h> |
cf62a0a5 | 48 | #include <linux/blkdev.h> |
0b950672 | 49 | #include <linux/mutex.h> |
c3518837 | 50 | #include <linux/poll.h> |
c4a3e0a5 BS |
51 | |
52 | #include <scsi/scsi.h> | |
53 | #include <scsi/scsi_cmnd.h> | |
54 | #include <scsi/scsi_device.h> | |
55 | #include <scsi/scsi_host.h> | |
4bcde509 | 56 | #include <scsi/scsi_tcq.h> |
9c915a8c | 57 | #include "megaraid_sas_fusion.h" |
c4a3e0a5 BS |
58 | #include "megaraid_sas.h" |
59 | ||
1fd10685 YB |
60 | /* |
61 | * Number of sectors per IO command | |
62 | * Will be set in megasas_init_mfi if user does not provide | |
63 | */ | |
64 | static unsigned int max_sectors; | |
65 | module_param_named(max_sectors, max_sectors, int, 0); | |
66 | MODULE_PARM_DESC(max_sectors, | |
67 | "Maximum number of sectors per IO command"); | |
68 | ||
80d9da98 | 69 | static int msix_disable; |
70 | module_param(msix_disable, int, S_IRUGO); | |
71 | MODULE_PARM_DESC(msix_disable, "Disable MSI-X interrupt handling. Default: 0"); | |
72 | ||
079eaddf | 73 | static unsigned int msix_vectors; |
74 | module_param(msix_vectors, int, S_IRUGO); | |
75 | MODULE_PARM_DESC(msix_vectors, "MSI-X max vector count. Default: Set by FW"); | |
76 | ||
229fe47c | 77 | static int allow_vf_ioctls; |
78 | module_param(allow_vf_ioctls, int, S_IRUGO); | |
79 | MODULE_PARM_DESC(allow_vf_ioctls, "Allow ioctls in SR-IOV VF mode. Default: 0"); | |
80 | ||
ae09a6c1 | 81 | static unsigned int throttlequeuedepth = MEGASAS_THROTTLE_QUEUE_DEPTH; |
c5daa6a9 | 82 | module_param(throttlequeuedepth, int, S_IRUGO); |
83 | MODULE_PARM_DESC(throttlequeuedepth, | |
84 | "Adapter queue depth when throttled due to I/O timeout. Default: 16"); | |
85 | ||
c007b8b2 | 86 | int resetwaittime = MEGASAS_RESET_WAIT_TIME; |
87 | module_param(resetwaittime, int, S_IRUGO); | |
88 | MODULE_PARM_DESC(resetwaittime, "Wait time in seconds after I/O timeout " | |
89 | "before resetting adapter. Default: 180"); | |
90 | ||
ac95136a SS |
91 | int smp_affinity_enable = 1; |
92 | module_param(smp_affinity_enable, int, S_IRUGO); | |
93 | MODULE_PARM_DESC(smp_affinity_enable, "SMP affinity feature enable/disbale Default: enable(1)"); | |
94 | ||
c4a3e0a5 BS |
95 | MODULE_LICENSE("GPL"); |
96 | MODULE_VERSION(MEGASAS_VERSION); | |
43cd7fe4 SS |
97 | MODULE_AUTHOR("megaraidlinux.pdl@avagotech.com"); |
98 | MODULE_DESCRIPTION("Avago MegaRAID SAS Driver"); | |
c4a3e0a5 | 99 | |
058a8fac | 100 | int megasas_transition_to_ready(struct megasas_instance *instance, int ocr); |
39a98554 | 101 | static int megasas_get_pd_list(struct megasas_instance *instance); |
21c9e160 | 102 | static int megasas_ld_list_query(struct megasas_instance *instance, |
103 | u8 query_type); | |
39a98554 | 104 | static int megasas_issue_init_mfi(struct megasas_instance *instance); |
105 | static int megasas_register_aen(struct megasas_instance *instance, | |
106 | u32 seq_num, u32 class_locale_word); | |
c4a3e0a5 BS |
107 | /* |
108 | * PCI ID table for all supported controllers | |
109 | */ | |
110 | static struct pci_device_id megasas_pci_table[] = { | |
111 | ||
f3d7271c HK |
112 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064R)}, |
113 | /* xscale IOP */ | |
114 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078R)}, | |
115 | /* ppc IOP */ | |
af7a5647 | 116 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)}, |
117 | /* ppc IOP */ | |
6610a6b3 YB |
118 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)}, |
119 | /* gen2*/ | |
120 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)}, | |
121 | /* gen2*/ | |
87911122 YB |
122 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)}, |
123 | /* skinny*/ | |
124 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)}, | |
125 | /* skinny*/ | |
f3d7271c HK |
126 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)}, |
127 | /* xscale IOP, vega */ | |
128 | {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)}, | |
129 | /* xscale IOP */ | |
9c915a8c | 130 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)}, |
131 | /* Fusion */ | |
229fe47c | 132 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_PLASMA)}, |
133 | /* Plasma */ | |
36807e67 | 134 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INVADER)}, |
135 | /* Invader */ | |
21d3c710 SS |
136 | {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FURY)}, |
137 | /* Fury */ | |
f3d7271c | 138 | {} |
c4a3e0a5 BS |
139 | }; |
140 | ||
141 | MODULE_DEVICE_TABLE(pci, megasas_pci_table); | |
142 | ||
143 | static int megasas_mgmt_majorno; | |
229fe47c | 144 | struct megasas_mgmt_info megasas_mgmt_info; |
c4a3e0a5 | 145 | static struct fasync_struct *megasas_async_queue; |
0b950672 | 146 | static DEFINE_MUTEX(megasas_async_queue_mutex); |
c4a3e0a5 | 147 | |
c3518837 YB |
148 | static int megasas_poll_wait_aen; |
149 | static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait); | |
72c4fd36 | 150 | static u32 support_poll_for_event; |
9c915a8c | 151 | u32 megasas_dbg_lvl; |
837f5fe8 | 152 | static u32 support_device_change; |
658dcedb | 153 | |
c3518837 YB |
154 | /* define lock for aen poll */ |
155 | spinlock_t poll_aen_lock; | |
156 | ||
9c915a8c | 157 | void |
7343eb65 | 158 | megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd, |
159 | u8 alt_status); | |
ebf054b0 | 160 | static u32 |
161 | megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs); | |
162 | static int | |
163 | megasas_adp_reset_gen2(struct megasas_instance *instance, | |
164 | struct megasas_register_set __iomem *reg_set); | |
cd50ba8e | 165 | static irqreturn_t megasas_isr(int irq, void *devp); |
166 | static u32 | |
167 | megasas_init_adapter_mfi(struct megasas_instance *instance); | |
168 | u32 | |
169 | megasas_build_and_issue_cmd(struct megasas_instance *instance, | |
170 | struct scsi_cmnd *scmd); | |
171 | static void megasas_complete_cmd_dpc(unsigned long instance_addr); | |
9c915a8c | 172 | void |
173 | megasas_release_fusion(struct megasas_instance *instance); | |
174 | int | |
175 | megasas_ioc_init_fusion(struct megasas_instance *instance); | |
176 | void | |
177 | megasas_free_cmds_fusion(struct megasas_instance *instance); | |
178 | u8 | |
179 | megasas_get_map_info(struct megasas_instance *instance); | |
180 | int | |
181 | megasas_sync_map_info(struct megasas_instance *instance); | |
182 | int | |
229fe47c | 183 | wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd, |
184 | int seconds); | |
9c915a8c | 185 | void megasas_reset_reply_desc(struct megasas_instance *instance); |
229fe47c | 186 | int megasas_reset_fusion(struct Scsi_Host *shost, int iotimeout); |
9c915a8c | 187 | void megasas_fusion_ocr_wq(struct work_struct *work); |
229fe47c | 188 | static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance, |
189 | int initial); | |
190 | int megasas_check_mpio_paths(struct megasas_instance *instance, | |
191 | struct scsi_cmnd *scmd); | |
cd50ba8e | 192 | |
193 | void | |
194 | megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd) | |
195 | { | |
196 | instance->instancet->fire_cmd(instance, | |
197 | cmd->frame_phys_addr, 0, instance->reg_set); | |
198 | } | |
7343eb65 | 199 | |
c4a3e0a5 BS |
200 | /** |
201 | * megasas_get_cmd - Get a command from the free pool | |
202 | * @instance: Adapter soft state | |
203 | * | |
204 | * Returns a free command from the pool | |
205 | */ | |
9c915a8c | 206 | struct megasas_cmd *megasas_get_cmd(struct megasas_instance |
c4a3e0a5 BS |
207 | *instance) |
208 | { | |
209 | unsigned long flags; | |
210 | struct megasas_cmd *cmd = NULL; | |
211 | ||
90dc9d98 | 212 | spin_lock_irqsave(&instance->mfi_pool_lock, flags); |
c4a3e0a5 BS |
213 | |
214 | if (!list_empty(&instance->cmd_pool)) { | |
215 | cmd = list_entry((&instance->cmd_pool)->next, | |
216 | struct megasas_cmd, list); | |
217 | list_del_init(&cmd->list); | |
218 | } else { | |
1be18254 | 219 | dev_err(&instance->pdev->dev, "Command pool empty!\n"); |
c4a3e0a5 BS |
220 | } |
221 | ||
90dc9d98 | 222 | spin_unlock_irqrestore(&instance->mfi_pool_lock, flags); |
c4a3e0a5 BS |
223 | return cmd; |
224 | } | |
225 | ||
226 | /** | |
4026e9aa | 227 | * megasas_return_cmd - Return a cmd to free command pool |
c4a3e0a5 BS |
228 | * @instance: Adapter soft state |
229 | * @cmd: Command packet to be returned to free command pool | |
230 | */ | |
9c915a8c | 231 | inline void |
4026e9aa | 232 | megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd) |
c4a3e0a5 | 233 | { |
4026e9aa SS |
234 | unsigned long flags; |
235 | u32 blk_tags; | |
236 | struct megasas_cmd_fusion *cmd_fusion; | |
237 | struct fusion_context *fusion = instance->ctrl_context; | |
238 | ||
239 | /* This flag is used only for fusion adapter. | |
240 | * Wait for Interrupt for Polled mode DCMD | |
90dc9d98 | 241 | */ |
4026e9aa | 242 | if (cmd->flags & DRV_DCMD_POLLED_MODE) |
90dc9d98 | 243 | return; |
c4a3e0a5 | 244 | |
4026e9aa SS |
245 | spin_lock_irqsave(&instance->mfi_pool_lock, flags); |
246 | ||
247 | if (fusion) { | |
248 | blk_tags = instance->max_scsi_cmds + cmd->index; | |
249 | cmd_fusion = fusion->cmd_list[blk_tags]; | |
250 | megasas_return_cmd_fusion(instance, cmd_fusion); | |
251 | } | |
c4a3e0a5 | 252 | cmd->scmd = NULL; |
9c915a8c | 253 | cmd->frame_count = 0; |
4026e9aa SS |
254 | cmd->flags = 0; |
255 | if (!fusion && reset_devices) | |
e5f93a36 | 256 | cmd->frame->hdr.cmd = MFI_CMD_INVALID; |
90dc9d98 | 257 | list_add(&cmd->list, (&instance->cmd_pool)->next); |
90dc9d98 | 258 | |
90dc9d98 | 259 | spin_unlock_irqrestore(&instance->mfi_pool_lock, flags); |
c4a3e0a5 | 260 | |
4026e9aa | 261 | } |
1341c939 | 262 | |
714f5177 | 263 | static const char * |
264 | format_timestamp(uint32_t timestamp) | |
265 | { | |
266 | static char buffer[32]; | |
267 | ||
268 | if ((timestamp & 0xff000000) == 0xff000000) | |
269 | snprintf(buffer, sizeof(buffer), "boot + %us", timestamp & | |
270 | 0x00ffffff); | |
271 | else | |
272 | snprintf(buffer, sizeof(buffer), "%us", timestamp); | |
273 | return buffer; | |
274 | } | |
275 | ||
276 | static const char * | |
277 | format_class(int8_t class) | |
278 | { | |
279 | static char buffer[6]; | |
280 | ||
281 | switch (class) { | |
282 | case MFI_EVT_CLASS_DEBUG: | |
283 | return "debug"; | |
284 | case MFI_EVT_CLASS_PROGRESS: | |
285 | return "progress"; | |
286 | case MFI_EVT_CLASS_INFO: | |
287 | return "info"; | |
288 | case MFI_EVT_CLASS_WARNING: | |
289 | return "WARN"; | |
290 | case MFI_EVT_CLASS_CRITICAL: | |
291 | return "CRIT"; | |
292 | case MFI_EVT_CLASS_FATAL: | |
293 | return "FATAL"; | |
294 | case MFI_EVT_CLASS_DEAD: | |
295 | return "DEAD"; | |
296 | default: | |
297 | snprintf(buffer, sizeof(buffer), "%d", class); | |
298 | return buffer; | |
299 | } | |
300 | } | |
301 | ||
302 | /** | |
303 | * megasas_decode_evt: Decode FW AEN event and print critical event | |
304 | * for information. | |
305 | * @instance: Adapter soft state | |
306 | */ | |
307 | static void | |
308 | megasas_decode_evt(struct megasas_instance *instance) | |
309 | { | |
310 | struct megasas_evt_detail *evt_detail = instance->evt_detail; | |
311 | union megasas_evt_class_locale class_locale; | |
312 | class_locale.word = le32_to_cpu(evt_detail->cl.word); | |
313 | ||
314 | if (class_locale.members.class >= MFI_EVT_CLASS_CRITICAL) | |
315 | dev_info(&instance->pdev->dev, "%d (%s/0x%04x/%s) - %s\n", | |
316 | le32_to_cpu(evt_detail->seq_num), | |
317 | format_timestamp(le32_to_cpu(evt_detail->time_stamp)), | |
318 | (class_locale.members.locale), | |
319 | format_class(class_locale.members.class), | |
320 | evt_detail->description); | |
321 | } | |
322 | ||
1341c939 | 323 | /** |
0d49016b | 324 | * The following functions are defined for xscale |
1341c939 SP |
325 | * (deviceid : 1064R, PERC5) controllers |
326 | */ | |
327 | ||
c4a3e0a5 | 328 | /** |
1341c939 | 329 | * megasas_enable_intr_xscale - Enables interrupts |
c4a3e0a5 BS |
330 | * @regs: MFI register set |
331 | */ | |
332 | static inline void | |
d46a3ad6 | 333 | megasas_enable_intr_xscale(struct megasas_instance *instance) |
c4a3e0a5 | 334 | { |
d46a3ad6 | 335 | struct megasas_register_set __iomem *regs; |
da0dc9fb | 336 | |
d46a3ad6 | 337 | regs = instance->reg_set; |
39a98554 | 338 | writel(0, &(regs)->outbound_intr_mask); |
c4a3e0a5 BS |
339 | |
340 | /* Dummy readl to force pci flush */ | |
341 | readl(®s->outbound_intr_mask); | |
342 | } | |
343 | ||
b274cab7 SP |
344 | /** |
345 | * megasas_disable_intr_xscale -Disables interrupt | |
346 | * @regs: MFI register set | |
347 | */ | |
348 | static inline void | |
d46a3ad6 | 349 | megasas_disable_intr_xscale(struct megasas_instance *instance) |
b274cab7 | 350 | { |
d46a3ad6 | 351 | struct megasas_register_set __iomem *regs; |
b274cab7 | 352 | u32 mask = 0x1f; |
da0dc9fb | 353 | |
d46a3ad6 | 354 | regs = instance->reg_set; |
b274cab7 SP |
355 | writel(mask, ®s->outbound_intr_mask); |
356 | /* Dummy readl to force pci flush */ | |
357 | readl(®s->outbound_intr_mask); | |
358 | } | |
359 | ||
1341c939 SP |
360 | /** |
361 | * megasas_read_fw_status_reg_xscale - returns the current FW status value | |
362 | * @regs: MFI register set | |
363 | */ | |
364 | static u32 | |
365 | megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs) | |
366 | { | |
367 | return readl(&(regs)->outbound_msg_0); | |
368 | } | |
369 | /** | |
370 | * megasas_clear_interrupt_xscale - Check & clear interrupt | |
371 | * @regs: MFI register set | |
372 | */ | |
0d49016b | 373 | static int |
1341c939 SP |
374 | megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs) |
375 | { | |
376 | u32 status; | |
39a98554 | 377 | u32 mfiStatus = 0; |
da0dc9fb | 378 | |
1341c939 SP |
379 | /* |
380 | * Check if it is our interrupt | |
381 | */ | |
382 | status = readl(®s->outbound_intr_status); | |
383 | ||
39a98554 | 384 | if (status & MFI_OB_INTR_STATUS_MASK) |
385 | mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE; | |
386 | if (status & MFI_XSCALE_OMR0_CHANGE_INTERRUPT) | |
387 | mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE; | |
1341c939 SP |
388 | |
389 | /* | |
390 | * Clear the interrupt by writing back the same value | |
391 | */ | |
39a98554 | 392 | if (mfiStatus) |
393 | writel(status, ®s->outbound_intr_status); | |
1341c939 | 394 | |
06f579de YB |
395 | /* Dummy readl to force pci flush */ |
396 | readl(®s->outbound_intr_status); | |
397 | ||
39a98554 | 398 | return mfiStatus; |
1341c939 SP |
399 | } |
400 | ||
401 | /** | |
402 | * megasas_fire_cmd_xscale - Sends command to the FW | |
403 | * @frame_phys_addr : Physical address of cmd | |
404 | * @frame_count : Number of frames for the command | |
405 | * @regs : MFI register set | |
406 | */ | |
0d49016b | 407 | static inline void |
0c79e681 YB |
408 | megasas_fire_cmd_xscale(struct megasas_instance *instance, |
409 | dma_addr_t frame_phys_addr, | |
410 | u32 frame_count, | |
411 | struct megasas_register_set __iomem *regs) | |
1341c939 | 412 | { |
39a98554 | 413 | unsigned long flags; |
da0dc9fb | 414 | |
39a98554 | 415 | spin_lock_irqsave(&instance->hba_lock, flags); |
1341c939 SP |
416 | writel((frame_phys_addr >> 3)|(frame_count), |
417 | &(regs)->inbound_queue_port); | |
39a98554 | 418 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
419 | } | |
420 | ||
421 | /** | |
422 | * megasas_adp_reset_xscale - For controller reset | |
423 | * @regs: MFI register set | |
424 | */ | |
425 | static int | |
426 | megasas_adp_reset_xscale(struct megasas_instance *instance, | |
427 | struct megasas_register_set __iomem *regs) | |
428 | { | |
429 | u32 i; | |
430 | u32 pcidata; | |
da0dc9fb | 431 | |
39a98554 | 432 | writel(MFI_ADP_RESET, ®s->inbound_doorbell); |
433 | ||
434 | for (i = 0; i < 3; i++) | |
435 | msleep(1000); /* sleep for 3 secs */ | |
436 | pcidata = 0; | |
437 | pci_read_config_dword(instance->pdev, MFI_1068_PCSR_OFFSET, &pcidata); | |
1be18254 | 438 | dev_notice(&instance->pdev->dev, "pcidata = %x\n", pcidata); |
39a98554 | 439 | if (pcidata & 0x2) { |
1be18254 | 440 | dev_notice(&instance->pdev->dev, "mfi 1068 offset read=%x\n", pcidata); |
39a98554 | 441 | pcidata &= ~0x2; |
442 | pci_write_config_dword(instance->pdev, | |
443 | MFI_1068_PCSR_OFFSET, pcidata); | |
444 | ||
445 | for (i = 0; i < 2; i++) | |
446 | msleep(1000); /* need to wait 2 secs again */ | |
447 | ||
448 | pcidata = 0; | |
449 | pci_read_config_dword(instance->pdev, | |
450 | MFI_1068_FW_HANDSHAKE_OFFSET, &pcidata); | |
1be18254 | 451 | dev_notice(&instance->pdev->dev, "1068 offset handshake read=%x\n", pcidata); |
39a98554 | 452 | if ((pcidata & 0xffff0000) == MFI_1068_FW_READY) { |
1be18254 | 453 | dev_notice(&instance->pdev->dev, "1068 offset pcidt=%x\n", pcidata); |
39a98554 | 454 | pcidata = 0; |
455 | pci_write_config_dword(instance->pdev, | |
456 | MFI_1068_FW_HANDSHAKE_OFFSET, pcidata); | |
457 | } | |
458 | } | |
459 | return 0; | |
460 | } | |
461 | ||
462 | /** | |
463 | * megasas_check_reset_xscale - For controller reset check | |
464 | * @regs: MFI register set | |
465 | */ | |
466 | static int | |
467 | megasas_check_reset_xscale(struct megasas_instance *instance, | |
468 | struct megasas_register_set __iomem *regs) | |
469 | { | |
39a98554 | 470 | if ((instance->adprecovery != MEGASAS_HBA_OPERATIONAL) && |
94cd65dd SS |
471 | (le32_to_cpu(*instance->consumer) == |
472 | MEGASAS_ADPRESET_INPROG_SIGN)) | |
39a98554 | 473 | return 1; |
39a98554 | 474 | return 0; |
1341c939 SP |
475 | } |
476 | ||
477 | static struct megasas_instance_template megasas_instance_template_xscale = { | |
478 | ||
479 | .fire_cmd = megasas_fire_cmd_xscale, | |
480 | .enable_intr = megasas_enable_intr_xscale, | |
b274cab7 | 481 | .disable_intr = megasas_disable_intr_xscale, |
1341c939 SP |
482 | .clear_intr = megasas_clear_intr_xscale, |
483 | .read_fw_status_reg = megasas_read_fw_status_reg_xscale, | |
39a98554 | 484 | .adp_reset = megasas_adp_reset_xscale, |
485 | .check_reset = megasas_check_reset_xscale, | |
cd50ba8e | 486 | .service_isr = megasas_isr, |
487 | .tasklet = megasas_complete_cmd_dpc, | |
488 | .init_adapter = megasas_init_adapter_mfi, | |
489 | .build_and_issue_cmd = megasas_build_and_issue_cmd, | |
490 | .issue_dcmd = megasas_issue_dcmd, | |
1341c939 SP |
491 | }; |
492 | ||
493 | /** | |
0d49016b | 494 | * This is the end of set of functions & definitions specific |
1341c939 SP |
495 | * to xscale (deviceid : 1064R, PERC5) controllers |
496 | */ | |
497 | ||
f9876f0b | 498 | /** |
0d49016b | 499 | * The following functions are defined for ppc (deviceid : 0x60) |
da0dc9fb | 500 | * controllers |
f9876f0b SP |
501 | */ |
502 | ||
503 | /** | |
504 | * megasas_enable_intr_ppc - Enables interrupts | |
505 | * @regs: MFI register set | |
506 | */ | |
507 | static inline void | |
d46a3ad6 | 508 | megasas_enable_intr_ppc(struct megasas_instance *instance) |
f9876f0b | 509 | { |
d46a3ad6 | 510 | struct megasas_register_set __iomem *regs; |
da0dc9fb | 511 | |
d46a3ad6 | 512 | regs = instance->reg_set; |
f9876f0b | 513 | writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear); |
0d49016b | 514 | |
39a98554 | 515 | writel(~0x80000000, &(regs)->outbound_intr_mask); |
f9876f0b SP |
516 | |
517 | /* Dummy readl to force pci flush */ | |
518 | readl(®s->outbound_intr_mask); | |
519 | } | |
520 | ||
b274cab7 SP |
521 | /** |
522 | * megasas_disable_intr_ppc - Disable interrupt | |
523 | * @regs: MFI register set | |
524 | */ | |
525 | static inline void | |
d46a3ad6 | 526 | megasas_disable_intr_ppc(struct megasas_instance *instance) |
b274cab7 | 527 | { |
d46a3ad6 | 528 | struct megasas_register_set __iomem *regs; |
b274cab7 | 529 | u32 mask = 0xFFFFFFFF; |
da0dc9fb | 530 | |
d46a3ad6 | 531 | regs = instance->reg_set; |
b274cab7 SP |
532 | writel(mask, ®s->outbound_intr_mask); |
533 | /* Dummy readl to force pci flush */ | |
534 | readl(®s->outbound_intr_mask); | |
535 | } | |
536 | ||
f9876f0b SP |
537 | /** |
538 | * megasas_read_fw_status_reg_ppc - returns the current FW status value | |
539 | * @regs: MFI register set | |
540 | */ | |
541 | static u32 | |
542 | megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs) | |
543 | { | |
544 | return readl(&(regs)->outbound_scratch_pad); | |
545 | } | |
546 | ||
547 | /** | |
548 | * megasas_clear_interrupt_ppc - Check & clear interrupt | |
549 | * @regs: MFI register set | |
550 | */ | |
0d49016b | 551 | static int |
f9876f0b SP |
552 | megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs) |
553 | { | |
3cc6851f | 554 | u32 status, mfiStatus = 0; |
555 | ||
f9876f0b SP |
556 | /* |
557 | * Check if it is our interrupt | |
558 | */ | |
559 | status = readl(®s->outbound_intr_status); | |
560 | ||
3cc6851f | 561 | if (status & MFI_REPLY_1078_MESSAGE_INTERRUPT) |
562 | mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE; | |
563 | ||
564 | if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) | |
565 | mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE; | |
f9876f0b SP |
566 | |
567 | /* | |
568 | * Clear the interrupt by writing back the same value | |
569 | */ | |
570 | writel(status, ®s->outbound_doorbell_clear); | |
571 | ||
06f579de YB |
572 | /* Dummy readl to force pci flush */ |
573 | readl(®s->outbound_doorbell_clear); | |
574 | ||
3cc6851f | 575 | return mfiStatus; |
f9876f0b | 576 | } |
3cc6851f | 577 | |
f9876f0b SP |
578 | /** |
579 | * megasas_fire_cmd_ppc - Sends command to the FW | |
580 | * @frame_phys_addr : Physical address of cmd | |
581 | * @frame_count : Number of frames for the command | |
582 | * @regs : MFI register set | |
583 | */ | |
0d49016b | 584 | static inline void |
0c79e681 YB |
585 | megasas_fire_cmd_ppc(struct megasas_instance *instance, |
586 | dma_addr_t frame_phys_addr, | |
587 | u32 frame_count, | |
588 | struct megasas_register_set __iomem *regs) | |
f9876f0b | 589 | { |
39a98554 | 590 | unsigned long flags; |
da0dc9fb | 591 | |
39a98554 | 592 | spin_lock_irqsave(&instance->hba_lock, flags); |
0d49016b | 593 | writel((frame_phys_addr | (frame_count<<1))|1, |
f9876f0b | 594 | &(regs)->inbound_queue_port); |
39a98554 | 595 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
f9876f0b SP |
596 | } |
597 | ||
39a98554 | 598 | /** |
599 | * megasas_check_reset_ppc - For controller reset check | |
600 | * @regs: MFI register set | |
601 | */ | |
602 | static int | |
603 | megasas_check_reset_ppc(struct megasas_instance *instance, | |
604 | struct megasas_register_set __iomem *regs) | |
605 | { | |
3cc6851f | 606 | if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) |
607 | return 1; | |
608 | ||
39a98554 | 609 | return 0; |
610 | } | |
3cc6851f | 611 | |
f9876f0b | 612 | static struct megasas_instance_template megasas_instance_template_ppc = { |
0d49016b | 613 | |
f9876f0b SP |
614 | .fire_cmd = megasas_fire_cmd_ppc, |
615 | .enable_intr = megasas_enable_intr_ppc, | |
b274cab7 | 616 | .disable_intr = megasas_disable_intr_ppc, |
f9876f0b SP |
617 | .clear_intr = megasas_clear_intr_ppc, |
618 | .read_fw_status_reg = megasas_read_fw_status_reg_ppc, | |
3cc6851f | 619 | .adp_reset = megasas_adp_reset_xscale, |
39a98554 | 620 | .check_reset = megasas_check_reset_ppc, |
cd50ba8e | 621 | .service_isr = megasas_isr, |
622 | .tasklet = megasas_complete_cmd_dpc, | |
623 | .init_adapter = megasas_init_adapter_mfi, | |
624 | .build_and_issue_cmd = megasas_build_and_issue_cmd, | |
625 | .issue_dcmd = megasas_issue_dcmd, | |
f9876f0b SP |
626 | }; |
627 | ||
87911122 YB |
628 | /** |
629 | * megasas_enable_intr_skinny - Enables interrupts | |
630 | * @regs: MFI register set | |
631 | */ | |
632 | static inline void | |
d46a3ad6 | 633 | megasas_enable_intr_skinny(struct megasas_instance *instance) |
87911122 | 634 | { |
d46a3ad6 | 635 | struct megasas_register_set __iomem *regs; |
da0dc9fb | 636 | |
d46a3ad6 | 637 | regs = instance->reg_set; |
87911122 YB |
638 | writel(0xFFFFFFFF, &(regs)->outbound_intr_mask); |
639 | ||
640 | writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask); | |
641 | ||
642 | /* Dummy readl to force pci flush */ | |
643 | readl(®s->outbound_intr_mask); | |
644 | } | |
645 | ||
646 | /** | |
647 | * megasas_disable_intr_skinny - Disables interrupt | |
648 | * @regs: MFI register set | |
649 | */ | |
650 | static inline void | |
d46a3ad6 | 651 | megasas_disable_intr_skinny(struct megasas_instance *instance) |
87911122 | 652 | { |
d46a3ad6 | 653 | struct megasas_register_set __iomem *regs; |
87911122 | 654 | u32 mask = 0xFFFFFFFF; |
da0dc9fb | 655 | |
d46a3ad6 | 656 | regs = instance->reg_set; |
87911122 YB |
657 | writel(mask, ®s->outbound_intr_mask); |
658 | /* Dummy readl to force pci flush */ | |
659 | readl(®s->outbound_intr_mask); | |
660 | } | |
661 | ||
662 | /** | |
663 | * megasas_read_fw_status_reg_skinny - returns the current FW status value | |
664 | * @regs: MFI register set | |
665 | */ | |
666 | static u32 | |
667 | megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs) | |
668 | { | |
669 | return readl(&(regs)->outbound_scratch_pad); | |
670 | } | |
671 | ||
672 | /** | |
673 | * megasas_clear_interrupt_skinny - Check & clear interrupt | |
674 | * @regs: MFI register set | |
675 | */ | |
676 | static int | |
677 | megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs) | |
678 | { | |
679 | u32 status; | |
ebf054b0 | 680 | u32 mfiStatus = 0; |
681 | ||
87911122 YB |
682 | /* |
683 | * Check if it is our interrupt | |
684 | */ | |
685 | status = readl(®s->outbound_intr_status); | |
686 | ||
687 | if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) { | |
39a98554 | 688 | return 0; |
87911122 YB |
689 | } |
690 | ||
ebf054b0 | 691 | /* |
692 | * Check if it is our interrupt | |
693 | */ | |
a3fda7dd | 694 | if ((megasas_read_fw_status_reg_skinny(regs) & MFI_STATE_MASK) == |
ebf054b0 | 695 | MFI_STATE_FAULT) { |
696 | mfiStatus = MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE; | |
697 | } else | |
698 | mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE; | |
699 | ||
87911122 YB |
700 | /* |
701 | * Clear the interrupt by writing back the same value | |
702 | */ | |
703 | writel(status, ®s->outbound_intr_status); | |
704 | ||
705 | /* | |
da0dc9fb BH |
706 | * dummy read to flush PCI |
707 | */ | |
87911122 YB |
708 | readl(®s->outbound_intr_status); |
709 | ||
ebf054b0 | 710 | return mfiStatus; |
87911122 YB |
711 | } |
712 | ||
713 | /** | |
714 | * megasas_fire_cmd_skinny - Sends command to the FW | |
715 | * @frame_phys_addr : Physical address of cmd | |
716 | * @frame_count : Number of frames for the command | |
717 | * @regs : MFI register set | |
718 | */ | |
719 | static inline void | |
0c79e681 YB |
720 | megasas_fire_cmd_skinny(struct megasas_instance *instance, |
721 | dma_addr_t frame_phys_addr, | |
722 | u32 frame_count, | |
87911122 YB |
723 | struct megasas_register_set __iomem *regs) |
724 | { | |
0c79e681 | 725 | unsigned long flags; |
da0dc9fb | 726 | |
39a98554 | 727 | spin_lock_irqsave(&instance->hba_lock, flags); |
94cd65dd SS |
728 | writel(upper_32_bits(frame_phys_addr), |
729 | &(regs)->inbound_high_queue_port); | |
730 | writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1, | |
731 | &(regs)->inbound_low_queue_port); | |
39a98554 | 732 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
733 | } | |
734 | ||
39a98554 | 735 | /** |
736 | * megasas_check_reset_skinny - For controller reset check | |
737 | * @regs: MFI register set | |
738 | */ | |
739 | static int | |
740 | megasas_check_reset_skinny(struct megasas_instance *instance, | |
741 | struct megasas_register_set __iomem *regs) | |
742 | { | |
3cc6851f | 743 | if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) |
744 | return 1; | |
745 | ||
39a98554 | 746 | return 0; |
87911122 YB |
747 | } |
748 | ||
749 | static struct megasas_instance_template megasas_instance_template_skinny = { | |
750 | ||
751 | .fire_cmd = megasas_fire_cmd_skinny, | |
752 | .enable_intr = megasas_enable_intr_skinny, | |
753 | .disable_intr = megasas_disable_intr_skinny, | |
754 | .clear_intr = megasas_clear_intr_skinny, | |
755 | .read_fw_status_reg = megasas_read_fw_status_reg_skinny, | |
ebf054b0 | 756 | .adp_reset = megasas_adp_reset_gen2, |
39a98554 | 757 | .check_reset = megasas_check_reset_skinny, |
cd50ba8e | 758 | .service_isr = megasas_isr, |
759 | .tasklet = megasas_complete_cmd_dpc, | |
760 | .init_adapter = megasas_init_adapter_mfi, | |
761 | .build_and_issue_cmd = megasas_build_and_issue_cmd, | |
762 | .issue_dcmd = megasas_issue_dcmd, | |
87911122 YB |
763 | }; |
764 | ||
765 | ||
6610a6b3 YB |
766 | /** |
767 | * The following functions are defined for gen2 (deviceid : 0x78 0x79) | |
768 | * controllers | |
769 | */ | |
770 | ||
771 | /** | |
772 | * megasas_enable_intr_gen2 - Enables interrupts | |
773 | * @regs: MFI register set | |
774 | */ | |
775 | static inline void | |
d46a3ad6 | 776 | megasas_enable_intr_gen2(struct megasas_instance *instance) |
6610a6b3 | 777 | { |
d46a3ad6 | 778 | struct megasas_register_set __iomem *regs; |
da0dc9fb | 779 | |
d46a3ad6 | 780 | regs = instance->reg_set; |
6610a6b3 YB |
781 | writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear); |
782 | ||
783 | /* write ~0x00000005 (4 & 1) to the intr mask*/ | |
784 | writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask); | |
785 | ||
786 | /* Dummy readl to force pci flush */ | |
787 | readl(®s->outbound_intr_mask); | |
788 | } | |
789 | ||
790 | /** | |
791 | * megasas_disable_intr_gen2 - Disables interrupt | |
792 | * @regs: MFI register set | |
793 | */ | |
794 | static inline void | |
d46a3ad6 | 795 | megasas_disable_intr_gen2(struct megasas_instance *instance) |
6610a6b3 | 796 | { |
d46a3ad6 | 797 | struct megasas_register_set __iomem *regs; |
6610a6b3 | 798 | u32 mask = 0xFFFFFFFF; |
da0dc9fb | 799 | |
d46a3ad6 | 800 | regs = instance->reg_set; |
6610a6b3 YB |
801 | writel(mask, ®s->outbound_intr_mask); |
802 | /* Dummy readl to force pci flush */ | |
803 | readl(®s->outbound_intr_mask); | |
804 | } | |
805 | ||
806 | /** | |
807 | * megasas_read_fw_status_reg_gen2 - returns the current FW status value | |
808 | * @regs: MFI register set | |
809 | */ | |
810 | static u32 | |
811 | megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs) | |
812 | { | |
813 | return readl(&(regs)->outbound_scratch_pad); | |
814 | } | |
815 | ||
816 | /** | |
817 | * megasas_clear_interrupt_gen2 - Check & clear interrupt | |
818 | * @regs: MFI register set | |
819 | */ | |
820 | static int | |
821 | megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs) | |
822 | { | |
823 | u32 status; | |
39a98554 | 824 | u32 mfiStatus = 0; |
da0dc9fb | 825 | |
6610a6b3 YB |
826 | /* |
827 | * Check if it is our interrupt | |
828 | */ | |
829 | status = readl(®s->outbound_intr_status); | |
830 | ||
b5bccadd | 831 | if (status & MFI_INTR_FLAG_REPLY_MESSAGE) { |
39a98554 | 832 | mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE; |
833 | } | |
834 | if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) { | |
835 | mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE; | |
836 | } | |
6610a6b3 YB |
837 | |
838 | /* | |
839 | * Clear the interrupt by writing back the same value | |
840 | */ | |
39a98554 | 841 | if (mfiStatus) |
842 | writel(status, ®s->outbound_doorbell_clear); | |
6610a6b3 YB |
843 | |
844 | /* Dummy readl to force pci flush */ | |
845 | readl(®s->outbound_intr_status); | |
846 | ||
39a98554 | 847 | return mfiStatus; |
6610a6b3 YB |
848 | } |
849 | /** | |
850 | * megasas_fire_cmd_gen2 - Sends command to the FW | |
851 | * @frame_phys_addr : Physical address of cmd | |
852 | * @frame_count : Number of frames for the command | |
853 | * @regs : MFI register set | |
854 | */ | |
855 | static inline void | |
0c79e681 YB |
856 | megasas_fire_cmd_gen2(struct megasas_instance *instance, |
857 | dma_addr_t frame_phys_addr, | |
858 | u32 frame_count, | |
6610a6b3 YB |
859 | struct megasas_register_set __iomem *regs) |
860 | { | |
39a98554 | 861 | unsigned long flags; |
da0dc9fb | 862 | |
39a98554 | 863 | spin_lock_irqsave(&instance->hba_lock, flags); |
6610a6b3 YB |
864 | writel((frame_phys_addr | (frame_count<<1))|1, |
865 | &(regs)->inbound_queue_port); | |
39a98554 | 866 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
867 | } | |
868 | ||
869 | /** | |
870 | * megasas_adp_reset_gen2 - For controller reset | |
871 | * @regs: MFI register set | |
872 | */ | |
873 | static int | |
874 | megasas_adp_reset_gen2(struct megasas_instance *instance, | |
875 | struct megasas_register_set __iomem *reg_set) | |
876 | { | |
da0dc9fb BH |
877 | u32 retry = 0 ; |
878 | u32 HostDiag; | |
879 | u32 __iomem *seq_offset = ®_set->seq_offset; | |
880 | u32 __iomem *hostdiag_offset = ®_set->host_diag; | |
ebf054b0 | 881 | |
882 | if (instance->instancet == &megasas_instance_template_skinny) { | |
883 | seq_offset = ®_set->fusion_seq_offset; | |
884 | hostdiag_offset = ®_set->fusion_host_diag; | |
885 | } | |
886 | ||
887 | writel(0, seq_offset); | |
888 | writel(4, seq_offset); | |
889 | writel(0xb, seq_offset); | |
890 | writel(2, seq_offset); | |
891 | writel(7, seq_offset); | |
892 | writel(0xd, seq_offset); | |
39a98554 | 893 | |
39a98554 | 894 | msleep(1000); |
895 | ||
ebf054b0 | 896 | HostDiag = (u32)readl(hostdiag_offset); |
39a98554 | 897 | |
da0dc9fb | 898 | while (!(HostDiag & DIAG_WRITE_ENABLE)) { |
39a98554 | 899 | msleep(100); |
ebf054b0 | 900 | HostDiag = (u32)readl(hostdiag_offset); |
1be18254 | 901 | dev_notice(&instance->pdev->dev, "RESETGEN2: retry=%x, hostdiag=%x\n", |
39a98554 | 902 | retry, HostDiag); |
903 | ||
904 | if (retry++ >= 100) | |
905 | return 1; | |
906 | ||
907 | } | |
908 | ||
1be18254 | 909 | dev_notice(&instance->pdev->dev, "ADP_RESET_GEN2: HostDiag=%x\n", HostDiag); |
39a98554 | 910 | |
ebf054b0 | 911 | writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset); |
39a98554 | 912 | |
913 | ssleep(10); | |
914 | ||
ebf054b0 | 915 | HostDiag = (u32)readl(hostdiag_offset); |
da0dc9fb | 916 | while (HostDiag & DIAG_RESET_ADAPTER) { |
39a98554 | 917 | msleep(100); |
ebf054b0 | 918 | HostDiag = (u32)readl(hostdiag_offset); |
1be18254 | 919 | dev_notice(&instance->pdev->dev, "RESET_GEN2: retry=%x, hostdiag=%x\n", |
39a98554 | 920 | retry, HostDiag); |
921 | ||
922 | if (retry++ >= 1000) | |
923 | return 1; | |
924 | ||
925 | } | |
926 | return 0; | |
927 | } | |
928 | ||
929 | /** | |
930 | * megasas_check_reset_gen2 - For controller reset check | |
931 | * @regs: MFI register set | |
932 | */ | |
933 | static int | |
934 | megasas_check_reset_gen2(struct megasas_instance *instance, | |
935 | struct megasas_register_set __iomem *regs) | |
936 | { | |
707e09bd YB |
937 | if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) { |
938 | return 1; | |
939 | } | |
940 | ||
39a98554 | 941 | return 0; |
6610a6b3 YB |
942 | } |
943 | ||
944 | static struct megasas_instance_template megasas_instance_template_gen2 = { | |
945 | ||
946 | .fire_cmd = megasas_fire_cmd_gen2, | |
947 | .enable_intr = megasas_enable_intr_gen2, | |
948 | .disable_intr = megasas_disable_intr_gen2, | |
949 | .clear_intr = megasas_clear_intr_gen2, | |
950 | .read_fw_status_reg = megasas_read_fw_status_reg_gen2, | |
39a98554 | 951 | .adp_reset = megasas_adp_reset_gen2, |
952 | .check_reset = megasas_check_reset_gen2, | |
cd50ba8e | 953 | .service_isr = megasas_isr, |
954 | .tasklet = megasas_complete_cmd_dpc, | |
955 | .init_adapter = megasas_init_adapter_mfi, | |
956 | .build_and_issue_cmd = megasas_build_and_issue_cmd, | |
957 | .issue_dcmd = megasas_issue_dcmd, | |
6610a6b3 YB |
958 | }; |
959 | ||
f9876f0b SP |
960 | /** |
961 | * This is the end of set of functions & definitions | |
39a98554 | 962 | * specific to gen2 (deviceid : 0x78, 0x79) controllers |
f9876f0b SP |
963 | */ |
964 | ||
9c915a8c | 965 | /* |
966 | * Template added for TB (Fusion) | |
967 | */ | |
968 | extern struct megasas_instance_template megasas_instance_template_fusion; | |
969 | ||
c4a3e0a5 BS |
970 | /** |
971 | * megasas_issue_polled - Issues a polling command | |
972 | * @instance: Adapter soft state | |
0d49016b | 973 | * @cmd: Command packet to be issued |
c4a3e0a5 | 974 | * |
2be2a988 | 975 | * For polling, MFI requires the cmd_status to be set to MFI_STAT_INVALID_STATUS before posting. |
c4a3e0a5 | 976 | */ |
9c915a8c | 977 | int |
c4a3e0a5 BS |
978 | megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd) |
979 | { | |
229fe47c | 980 | int seconds; |
c4a3e0a5 BS |
981 | struct megasas_header *frame_hdr = &cmd->frame->hdr; |
982 | ||
94cd65dd SS |
983 | frame_hdr->cmd_status = MFI_CMD_STATUS_POLL_MODE; |
984 | frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE); | |
c4a3e0a5 BS |
985 | |
986 | /* | |
987 | * Issue the frame using inbound queue port | |
988 | */ | |
9c915a8c | 989 | instance->instancet->issue_dcmd(instance, cmd); |
c4a3e0a5 BS |
990 | |
991 | /* | |
992 | * Wait for cmd_status to change | |
993 | */ | |
229fe47c | 994 | if (instance->requestorId) |
995 | seconds = MEGASAS_ROUTINE_WAIT_TIME_VF; | |
996 | else | |
997 | seconds = MFI_POLL_TIMEOUT_SECS; | |
998 | return wait_and_poll(instance, cmd, seconds); | |
c4a3e0a5 BS |
999 | } |
1000 | ||
1001 | /** | |
1002 | * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds | |
1003 | * @instance: Adapter soft state | |
1004 | * @cmd: Command to be issued | |
cfbe7554 | 1005 | * @timeout: Timeout in seconds |
c4a3e0a5 BS |
1006 | * |
1007 | * This function waits on an event for the command to be returned from ISR. | |
2a3681e5 | 1008 | * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs |
c4a3e0a5 BS |
1009 | * Used to issue ioctl commands. |
1010 | */ | |
90dc9d98 | 1011 | int |
c4a3e0a5 | 1012 | megasas_issue_blocked_cmd(struct megasas_instance *instance, |
cfbe7554 | 1013 | struct megasas_cmd *cmd, int timeout) |
c4a3e0a5 | 1014 | { |
cfbe7554 | 1015 | int ret = 0; |
da0dc9fb | 1016 | |
2be2a988 | 1017 | cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS; |
c4a3e0a5 | 1018 | |
9c915a8c | 1019 | instance->instancet->issue_dcmd(instance, cmd); |
cfbe7554 SS |
1020 | if (timeout) { |
1021 | ret = wait_event_timeout(instance->int_cmd_wait_q, | |
2be2a988 | 1022 | cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ); |
cfbe7554 SS |
1023 | if (!ret) |
1024 | return 1; | |
1025 | } else | |
1026 | wait_event(instance->int_cmd_wait_q, | |
2be2a988 | 1027 | cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS); |
c4a3e0a5 | 1028 | |
2be2a988 SS |
1029 | return (cmd->cmd_status_drv == MFI_STAT_OK) ? |
1030 | 0 : 1; | |
c4a3e0a5 BS |
1031 | } |
1032 | ||
1033 | /** | |
1034 | * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd | |
1035 | * @instance: Adapter soft state | |
1036 | * @cmd_to_abort: Previously issued cmd to be aborted | |
cfbe7554 | 1037 | * @timeout: Timeout in seconds |
c4a3e0a5 | 1038 | * |
cfbe7554 | 1039 | * MFI firmware can abort previously issued AEN comamnd (automatic event |
c4a3e0a5 | 1040 | * notification). The megasas_issue_blocked_abort_cmd() issues such abort |
2a3681e5 SP |
1041 | * cmd and waits for return status. |
1042 | * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs | |
c4a3e0a5 BS |
1043 | */ |
1044 | static int | |
1045 | megasas_issue_blocked_abort_cmd(struct megasas_instance *instance, | |
cfbe7554 | 1046 | struct megasas_cmd *cmd_to_abort, int timeout) |
c4a3e0a5 BS |
1047 | { |
1048 | struct megasas_cmd *cmd; | |
1049 | struct megasas_abort_frame *abort_fr; | |
cfbe7554 | 1050 | int ret = 0; |
c4a3e0a5 BS |
1051 | |
1052 | cmd = megasas_get_cmd(instance); | |
1053 | ||
1054 | if (!cmd) | |
1055 | return -1; | |
1056 | ||
1057 | abort_fr = &cmd->frame->abort; | |
1058 | ||
1059 | /* | |
1060 | * Prepare and issue the abort frame | |
1061 | */ | |
1062 | abort_fr->cmd = MFI_CMD_ABORT; | |
2be2a988 | 1063 | abort_fr->cmd_status = MFI_STAT_INVALID_STATUS; |
94cd65dd SS |
1064 | abort_fr->flags = cpu_to_le16(0); |
1065 | abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index); | |
1066 | abort_fr->abort_mfi_phys_addr_lo = | |
1067 | cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr)); | |
1068 | abort_fr->abort_mfi_phys_addr_hi = | |
1069 | cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr)); | |
c4a3e0a5 BS |
1070 | |
1071 | cmd->sync_cmd = 1; | |
2be2a988 | 1072 | cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS; |
c4a3e0a5 | 1073 | |
9c915a8c | 1074 | instance->instancet->issue_dcmd(instance, cmd); |
c4a3e0a5 | 1075 | |
cfbe7554 SS |
1076 | if (timeout) { |
1077 | ret = wait_event_timeout(instance->abort_cmd_wait_q, | |
2be2a988 | 1078 | cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ); |
cfbe7554 SS |
1079 | if (!ret) { |
1080 | dev_err(&instance->pdev->dev, "Command timedout" | |
1081 | "from %s\n", __func__); | |
1082 | return 1; | |
1083 | } | |
1084 | } else | |
1085 | wait_event(instance->abort_cmd_wait_q, | |
2be2a988 | 1086 | cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS); |
cfbe7554 | 1087 | |
39a98554 | 1088 | cmd->sync_cmd = 0; |
c4a3e0a5 BS |
1089 | |
1090 | megasas_return_cmd(instance, cmd); | |
1091 | return 0; | |
1092 | } | |
1093 | ||
1094 | /** | |
1095 | * megasas_make_sgl32 - Prepares 32-bit SGL | |
1096 | * @instance: Adapter soft state | |
1097 | * @scp: SCSI command from the mid-layer | |
1098 | * @mfi_sgl: SGL to be filled in | |
1099 | * | |
1100 | * If successful, this function returns the number of SG elements. Otherwise, | |
1101 | * it returnes -1. | |
1102 | */ | |
858119e1 | 1103 | static int |
c4a3e0a5 BS |
1104 | megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp, |
1105 | union megasas_sgl *mfi_sgl) | |
1106 | { | |
1107 | int i; | |
1108 | int sge_count; | |
1109 | struct scatterlist *os_sgl; | |
1110 | ||
155d98f0 FT |
1111 | sge_count = scsi_dma_map(scp); |
1112 | BUG_ON(sge_count < 0); | |
c4a3e0a5 | 1113 | |
155d98f0 FT |
1114 | if (sge_count) { |
1115 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { | |
94cd65dd SS |
1116 | mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl)); |
1117 | mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl)); | |
155d98f0 | 1118 | } |
c4a3e0a5 | 1119 | } |
c4a3e0a5 BS |
1120 | return sge_count; |
1121 | } | |
1122 | ||
1123 | /** | |
1124 | * megasas_make_sgl64 - Prepares 64-bit SGL | |
1125 | * @instance: Adapter soft state | |
1126 | * @scp: SCSI command from the mid-layer | |
1127 | * @mfi_sgl: SGL to be filled in | |
1128 | * | |
1129 | * If successful, this function returns the number of SG elements. Otherwise, | |
1130 | * it returnes -1. | |
1131 | */ | |
858119e1 | 1132 | static int |
c4a3e0a5 BS |
1133 | megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp, |
1134 | union megasas_sgl *mfi_sgl) | |
1135 | { | |
1136 | int i; | |
1137 | int sge_count; | |
1138 | struct scatterlist *os_sgl; | |
1139 | ||
155d98f0 FT |
1140 | sge_count = scsi_dma_map(scp); |
1141 | BUG_ON(sge_count < 0); | |
c4a3e0a5 | 1142 | |
155d98f0 FT |
1143 | if (sge_count) { |
1144 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { | |
94cd65dd SS |
1145 | mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl)); |
1146 | mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl)); | |
155d98f0 | 1147 | } |
c4a3e0a5 | 1148 | } |
c4a3e0a5 BS |
1149 | return sge_count; |
1150 | } | |
1151 | ||
f4c9a131 YB |
1152 | /** |
1153 | * megasas_make_sgl_skinny - Prepares IEEE SGL | |
1154 | * @instance: Adapter soft state | |
1155 | * @scp: SCSI command from the mid-layer | |
1156 | * @mfi_sgl: SGL to be filled in | |
1157 | * | |
1158 | * If successful, this function returns the number of SG elements. Otherwise, | |
1159 | * it returnes -1. | |
1160 | */ | |
1161 | static int | |
1162 | megasas_make_sgl_skinny(struct megasas_instance *instance, | |
1163 | struct scsi_cmnd *scp, union megasas_sgl *mfi_sgl) | |
1164 | { | |
1165 | int i; | |
1166 | int sge_count; | |
1167 | struct scatterlist *os_sgl; | |
1168 | ||
1169 | sge_count = scsi_dma_map(scp); | |
1170 | ||
1171 | if (sge_count) { | |
1172 | scsi_for_each_sg(scp, os_sgl, sge_count, i) { | |
94cd65dd SS |
1173 | mfi_sgl->sge_skinny[i].length = |
1174 | cpu_to_le32(sg_dma_len(os_sgl)); | |
f4c9a131 | 1175 | mfi_sgl->sge_skinny[i].phys_addr = |
94cd65dd SS |
1176 | cpu_to_le64(sg_dma_address(os_sgl)); |
1177 | mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0); | |
f4c9a131 YB |
1178 | } |
1179 | } | |
1180 | return sge_count; | |
1181 | } | |
1182 | ||
b1df99d9 SP |
1183 | /** |
1184 | * megasas_get_frame_count - Computes the number of frames | |
d532dbe2 | 1185 | * @frame_type : type of frame- io or pthru frame |
b1df99d9 SP |
1186 | * @sge_count : number of sg elements |
1187 | * | |
1188 | * Returns the number of frames required for numnber of sge's (sge_count) | |
1189 | */ | |
1190 | ||
f4c9a131 YB |
1191 | static u32 megasas_get_frame_count(struct megasas_instance *instance, |
1192 | u8 sge_count, u8 frame_type) | |
b1df99d9 SP |
1193 | { |
1194 | int num_cnt; | |
1195 | int sge_bytes; | |
1196 | u32 sge_sz; | |
da0dc9fb | 1197 | u32 frame_count = 0; |
b1df99d9 SP |
1198 | |
1199 | sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) : | |
1200 | sizeof(struct megasas_sge32); | |
1201 | ||
f4c9a131 YB |
1202 | if (instance->flag_ieee) { |
1203 | sge_sz = sizeof(struct megasas_sge_skinny); | |
1204 | } | |
1205 | ||
b1df99d9 | 1206 | /* |
d532dbe2 | 1207 | * Main frame can contain 2 SGEs for 64-bit SGLs and |
1208 | * 3 SGEs for 32-bit SGLs for ldio & | |
1209 | * 1 SGEs for 64-bit SGLs and | |
1210 | * 2 SGEs for 32-bit SGLs for pthru frame | |
1211 | */ | |
1212 | if (unlikely(frame_type == PTHRU_FRAME)) { | |
f4c9a131 YB |
1213 | if (instance->flag_ieee == 1) { |
1214 | num_cnt = sge_count - 1; | |
1215 | } else if (IS_DMA64) | |
d532dbe2 | 1216 | num_cnt = sge_count - 1; |
1217 | else | |
1218 | num_cnt = sge_count - 2; | |
1219 | } else { | |
f4c9a131 YB |
1220 | if (instance->flag_ieee == 1) { |
1221 | num_cnt = sge_count - 1; | |
1222 | } else if (IS_DMA64) | |
d532dbe2 | 1223 | num_cnt = sge_count - 2; |
1224 | else | |
1225 | num_cnt = sge_count - 3; | |
1226 | } | |
b1df99d9 | 1227 | |
da0dc9fb | 1228 | if (num_cnt > 0) { |
b1df99d9 SP |
1229 | sge_bytes = sge_sz * num_cnt; |
1230 | ||
1231 | frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) + | |
1232 | ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) ; | |
1233 | } | |
1234 | /* Main frame */ | |
da0dc9fb | 1235 | frame_count += 1; |
b1df99d9 SP |
1236 | |
1237 | if (frame_count > 7) | |
1238 | frame_count = 8; | |
1239 | return frame_count; | |
1240 | } | |
1241 | ||
c4a3e0a5 BS |
1242 | /** |
1243 | * megasas_build_dcdb - Prepares a direct cdb (DCDB) command | |
1244 | * @instance: Adapter soft state | |
1245 | * @scp: SCSI command | |
1246 | * @cmd: Command to be prepared in | |
1247 | * | |
1248 | * This function prepares CDB commands. These are typcially pass-through | |
1249 | * commands to the devices. | |
1250 | */ | |
858119e1 | 1251 | static int |
c4a3e0a5 BS |
1252 | megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp, |
1253 | struct megasas_cmd *cmd) | |
1254 | { | |
c4a3e0a5 BS |
1255 | u32 is_logical; |
1256 | u32 device_id; | |
1257 | u16 flags = 0; | |
1258 | struct megasas_pthru_frame *pthru; | |
1259 | ||
1260 | is_logical = MEGASAS_IS_LOGICAL(scp); | |
4a5c814d | 1261 | device_id = MEGASAS_DEV_INDEX(scp); |
c4a3e0a5 BS |
1262 | pthru = (struct megasas_pthru_frame *)cmd->frame; |
1263 | ||
1264 | if (scp->sc_data_direction == PCI_DMA_TODEVICE) | |
1265 | flags = MFI_FRAME_DIR_WRITE; | |
1266 | else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE) | |
1267 | flags = MFI_FRAME_DIR_READ; | |
1268 | else if (scp->sc_data_direction == PCI_DMA_NONE) | |
1269 | flags = MFI_FRAME_DIR_NONE; | |
1270 | ||
f4c9a131 YB |
1271 | if (instance->flag_ieee == 1) { |
1272 | flags |= MFI_FRAME_IEEE; | |
1273 | } | |
1274 | ||
c4a3e0a5 BS |
1275 | /* |
1276 | * Prepare the DCDB frame | |
1277 | */ | |
1278 | pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO; | |
1279 | pthru->cmd_status = 0x0; | |
1280 | pthru->scsi_status = 0x0; | |
1281 | pthru->target_id = device_id; | |
1282 | pthru->lun = scp->device->lun; | |
1283 | pthru->cdb_len = scp->cmd_len; | |
1284 | pthru->timeout = 0; | |
780a3762 | 1285 | pthru->pad_0 = 0; |
94cd65dd SS |
1286 | pthru->flags = cpu_to_le16(flags); |
1287 | pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp)); | |
c4a3e0a5 BS |
1288 | |
1289 | memcpy(pthru->cdb, scp->cmnd, scp->cmd_len); | |
1290 | ||
8d568253 | 1291 | /* |
da0dc9fb BH |
1292 | * If the command is for the tape device, set the |
1293 | * pthru timeout to the os layer timeout value. | |
1294 | */ | |
8d568253 YB |
1295 | if (scp->device->type == TYPE_TAPE) { |
1296 | if ((scp->request->timeout / HZ) > 0xFFFF) | |
c6f5bf81 | 1297 | pthru->timeout = cpu_to_le16(0xFFFF); |
8d568253 | 1298 | else |
94cd65dd | 1299 | pthru->timeout = cpu_to_le16(scp->request->timeout / HZ); |
8d568253 YB |
1300 | } |
1301 | ||
c4a3e0a5 BS |
1302 | /* |
1303 | * Construct SGL | |
1304 | */ | |
f4c9a131 | 1305 | if (instance->flag_ieee == 1) { |
94cd65dd | 1306 | pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64); |
f4c9a131 YB |
1307 | pthru->sge_count = megasas_make_sgl_skinny(instance, scp, |
1308 | &pthru->sgl); | |
1309 | } else if (IS_DMA64) { | |
94cd65dd | 1310 | pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64); |
c4a3e0a5 BS |
1311 | pthru->sge_count = megasas_make_sgl64(instance, scp, |
1312 | &pthru->sgl); | |
1313 | } else | |
1314 | pthru->sge_count = megasas_make_sgl32(instance, scp, | |
1315 | &pthru->sgl); | |
1316 | ||
bdc6fb8d | 1317 | if (pthru->sge_count > instance->max_num_sge) { |
1be18254 | 1318 | dev_err(&instance->pdev->dev, "DCDB too many SGE NUM=%x\n", |
bdc6fb8d YB |
1319 | pthru->sge_count); |
1320 | return 0; | |
1321 | } | |
1322 | ||
c4a3e0a5 BS |
1323 | /* |
1324 | * Sense info specific | |
1325 | */ | |
1326 | pthru->sense_len = SCSI_SENSE_BUFFERSIZE; | |
94cd65dd SS |
1327 | pthru->sense_buf_phys_addr_hi = |
1328 | cpu_to_le32(upper_32_bits(cmd->sense_phys_addr)); | |
1329 | pthru->sense_buf_phys_addr_lo = | |
1330 | cpu_to_le32(lower_32_bits(cmd->sense_phys_addr)); | |
c4a3e0a5 | 1331 | |
c4a3e0a5 BS |
1332 | /* |
1333 | * Compute the total number of frames this command consumes. FW uses | |
1334 | * this number to pull sufficient number of frames from host memory. | |
1335 | */ | |
f4c9a131 | 1336 | cmd->frame_count = megasas_get_frame_count(instance, pthru->sge_count, |
d532dbe2 | 1337 | PTHRU_FRAME); |
c4a3e0a5 BS |
1338 | |
1339 | return cmd->frame_count; | |
1340 | } | |
1341 | ||
1342 | /** | |
1343 | * megasas_build_ldio - Prepares IOs to logical devices | |
1344 | * @instance: Adapter soft state | |
1345 | * @scp: SCSI command | |
fd589a8f | 1346 | * @cmd: Command to be prepared |
c4a3e0a5 BS |
1347 | * |
1348 | * Frames (and accompanying SGLs) for regular SCSI IOs use this function. | |
1349 | */ | |
858119e1 | 1350 | static int |
c4a3e0a5 BS |
1351 | megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp, |
1352 | struct megasas_cmd *cmd) | |
1353 | { | |
c4a3e0a5 BS |
1354 | u32 device_id; |
1355 | u8 sc = scp->cmnd[0]; | |
1356 | u16 flags = 0; | |
1357 | struct megasas_io_frame *ldio; | |
1358 | ||
4a5c814d | 1359 | device_id = MEGASAS_DEV_INDEX(scp); |
c4a3e0a5 BS |
1360 | ldio = (struct megasas_io_frame *)cmd->frame; |
1361 | ||
1362 | if (scp->sc_data_direction == PCI_DMA_TODEVICE) | |
1363 | flags = MFI_FRAME_DIR_WRITE; | |
1364 | else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE) | |
1365 | flags = MFI_FRAME_DIR_READ; | |
1366 | ||
f4c9a131 YB |
1367 | if (instance->flag_ieee == 1) { |
1368 | flags |= MFI_FRAME_IEEE; | |
1369 | } | |
1370 | ||
c4a3e0a5 | 1371 | /* |
b1df99d9 | 1372 | * Prepare the Logical IO frame: 2nd bit is zero for all read cmds |
c4a3e0a5 BS |
1373 | */ |
1374 | ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ; | |
1375 | ldio->cmd_status = 0x0; | |
1376 | ldio->scsi_status = 0x0; | |
1377 | ldio->target_id = device_id; | |
1378 | ldio->timeout = 0; | |
1379 | ldio->reserved_0 = 0; | |
1380 | ldio->pad_0 = 0; | |
94cd65dd | 1381 | ldio->flags = cpu_to_le16(flags); |
c4a3e0a5 BS |
1382 | ldio->start_lba_hi = 0; |
1383 | ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0; | |
1384 | ||
1385 | /* | |
1386 | * 6-byte READ(0x08) or WRITE(0x0A) cdb | |
1387 | */ | |
1388 | if (scp->cmd_len == 6) { | |
94cd65dd SS |
1389 | ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]); |
1390 | ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) | | |
1391 | ((u32) scp->cmnd[2] << 8) | | |
1392 | (u32) scp->cmnd[3]); | |
c4a3e0a5 | 1393 | |
94cd65dd | 1394 | ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF); |
c4a3e0a5 BS |
1395 | } |
1396 | ||
1397 | /* | |
1398 | * 10-byte READ(0x28) or WRITE(0x2A) cdb | |
1399 | */ | |
1400 | else if (scp->cmd_len == 10) { | |
94cd65dd SS |
1401 | ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] | |
1402 | ((u32) scp->cmnd[7] << 8)); | |
1403 | ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) | | |
1404 | ((u32) scp->cmnd[3] << 16) | | |
1405 | ((u32) scp->cmnd[4] << 8) | | |
1406 | (u32) scp->cmnd[5]); | |
c4a3e0a5 BS |
1407 | } |
1408 | ||
1409 | /* | |
1410 | * 12-byte READ(0xA8) or WRITE(0xAA) cdb | |
1411 | */ | |
1412 | else if (scp->cmd_len == 12) { | |
94cd65dd SS |
1413 | ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) | |
1414 | ((u32) scp->cmnd[7] << 16) | | |
1415 | ((u32) scp->cmnd[8] << 8) | | |
1416 | (u32) scp->cmnd[9]); | |
c4a3e0a5 | 1417 | |
94cd65dd SS |
1418 | ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) | |
1419 | ((u32) scp->cmnd[3] << 16) | | |
1420 | ((u32) scp->cmnd[4] << 8) | | |
1421 | (u32) scp->cmnd[5]); | |
c4a3e0a5 BS |
1422 | } |
1423 | ||
1424 | /* | |
1425 | * 16-byte READ(0x88) or WRITE(0x8A) cdb | |
1426 | */ | |
1427 | else if (scp->cmd_len == 16) { | |
94cd65dd SS |
1428 | ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) | |
1429 | ((u32) scp->cmnd[11] << 16) | | |
1430 | ((u32) scp->cmnd[12] << 8) | | |
1431 | (u32) scp->cmnd[13]); | |
c4a3e0a5 | 1432 | |
94cd65dd SS |
1433 | ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) | |
1434 | ((u32) scp->cmnd[7] << 16) | | |
1435 | ((u32) scp->cmnd[8] << 8) | | |
1436 | (u32) scp->cmnd[9]); | |
c4a3e0a5 | 1437 | |
94cd65dd SS |
1438 | ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) | |
1439 | ((u32) scp->cmnd[3] << 16) | | |
1440 | ((u32) scp->cmnd[4] << 8) | | |
1441 | (u32) scp->cmnd[5]); | |
c4a3e0a5 BS |
1442 | |
1443 | } | |
1444 | ||
1445 | /* | |
1446 | * Construct SGL | |
1447 | */ | |
f4c9a131 | 1448 | if (instance->flag_ieee) { |
94cd65dd | 1449 | ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64); |
f4c9a131 YB |
1450 | ldio->sge_count = megasas_make_sgl_skinny(instance, scp, |
1451 | &ldio->sgl); | |
1452 | } else if (IS_DMA64) { | |
94cd65dd | 1453 | ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64); |
c4a3e0a5 BS |
1454 | ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl); |
1455 | } else | |
1456 | ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl); | |
1457 | ||
bdc6fb8d | 1458 | if (ldio->sge_count > instance->max_num_sge) { |
1be18254 | 1459 | dev_err(&instance->pdev->dev, "build_ld_io: sge_count = %x\n", |
bdc6fb8d YB |
1460 | ldio->sge_count); |
1461 | return 0; | |
1462 | } | |
1463 | ||
c4a3e0a5 BS |
1464 | /* |
1465 | * Sense info specific | |
1466 | */ | |
1467 | ldio->sense_len = SCSI_SENSE_BUFFERSIZE; | |
1468 | ldio->sense_buf_phys_addr_hi = 0; | |
94cd65dd | 1469 | ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr); |
c4a3e0a5 | 1470 | |
b1df99d9 SP |
1471 | /* |
1472 | * Compute the total number of frames this command consumes. FW uses | |
1473 | * this number to pull sufficient number of frames from host memory. | |
1474 | */ | |
f4c9a131 YB |
1475 | cmd->frame_count = megasas_get_frame_count(instance, |
1476 | ldio->sge_count, IO_FRAME); | |
c4a3e0a5 BS |
1477 | |
1478 | return cmd->frame_count; | |
1479 | } | |
1480 | ||
1481 | /** | |
7497cde8 SS |
1482 | * megasas_cmd_type - Checks if the cmd is for logical drive/sysPD |
1483 | * and whether it's RW or non RW | |
cb59aa6a | 1484 | * @scmd: SCSI command |
0d49016b | 1485 | * |
c4a3e0a5 | 1486 | */ |
7497cde8 | 1487 | inline int megasas_cmd_type(struct scsi_cmnd *cmd) |
c4a3e0a5 | 1488 | { |
7497cde8 SS |
1489 | int ret; |
1490 | ||
cb59aa6a SP |
1491 | switch (cmd->cmnd[0]) { |
1492 | case READ_10: | |
1493 | case WRITE_10: | |
1494 | case READ_12: | |
1495 | case WRITE_12: | |
1496 | case READ_6: | |
1497 | case WRITE_6: | |
1498 | case READ_16: | |
1499 | case WRITE_16: | |
7497cde8 SS |
1500 | ret = (MEGASAS_IS_LOGICAL(cmd)) ? |
1501 | READ_WRITE_LDIO : READ_WRITE_SYSPDIO; | |
1502 | break; | |
cb59aa6a | 1503 | default: |
7497cde8 SS |
1504 | ret = (MEGASAS_IS_LOGICAL(cmd)) ? |
1505 | NON_READ_WRITE_LDIO : NON_READ_WRITE_SYSPDIO; | |
c4a3e0a5 | 1506 | } |
7497cde8 | 1507 | return ret; |
c4a3e0a5 BS |
1508 | } |
1509 | ||
658dcedb SP |
1510 | /** |
1511 | * megasas_dump_pending_frames - Dumps the frame address of all pending cmds | |
da0dc9fb | 1512 | * in FW |
658dcedb SP |
1513 | * @instance: Adapter soft state |
1514 | */ | |
1515 | static inline void | |
1516 | megasas_dump_pending_frames(struct megasas_instance *instance) | |
1517 | { | |
1518 | struct megasas_cmd *cmd; | |
1519 | int i,n; | |
1520 | union megasas_sgl *mfi_sgl; | |
1521 | struct megasas_io_frame *ldio; | |
1522 | struct megasas_pthru_frame *pthru; | |
1523 | u32 sgcount; | |
1524 | u32 max_cmd = instance->max_fw_cmds; | |
1525 | ||
1be18254 BH |
1526 | dev_err(&instance->pdev->dev, "[%d]: Dumping Frame Phys Address of all pending cmds in FW\n",instance->host->host_no); |
1527 | dev_err(&instance->pdev->dev, "[%d]: Total OS Pending cmds : %d\n",instance->host->host_no,atomic_read(&instance->fw_outstanding)); | |
658dcedb | 1528 | if (IS_DMA64) |
1be18254 | 1529 | dev_err(&instance->pdev->dev, "[%d]: 64 bit SGLs were sent to FW\n",instance->host->host_no); |
658dcedb | 1530 | else |
1be18254 | 1531 | dev_err(&instance->pdev->dev, "[%d]: 32 bit SGLs were sent to FW\n",instance->host->host_no); |
658dcedb | 1532 | |
1be18254 | 1533 | dev_err(&instance->pdev->dev, "[%d]: Pending OS cmds in FW : \n",instance->host->host_no); |
658dcedb SP |
1534 | for (i = 0; i < max_cmd; i++) { |
1535 | cmd = instance->cmd_list[i]; | |
da0dc9fb | 1536 | if (!cmd->scmd) |
658dcedb | 1537 | continue; |
1be18254 | 1538 | dev_err(&instance->pdev->dev, "[%d]: Frame addr :0x%08lx : ",instance->host->host_no,(unsigned long)cmd->frame_phys_addr); |
7497cde8 | 1539 | if (megasas_cmd_type(cmd->scmd) == READ_WRITE_LDIO) { |
658dcedb SP |
1540 | ldio = (struct megasas_io_frame *)cmd->frame; |
1541 | mfi_sgl = &ldio->sgl; | |
1542 | sgcount = ldio->sge_count; | |
1be18254 | 1543 | dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x," |
94cd65dd SS |
1544 | " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n", |
1545 | instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id, | |
1546 | le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi), | |
1547 | le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount); | |
da0dc9fb | 1548 | } else { |
658dcedb SP |
1549 | pthru = (struct megasas_pthru_frame *) cmd->frame; |
1550 | mfi_sgl = &pthru->sgl; | |
1551 | sgcount = pthru->sge_count; | |
1be18254 | 1552 | dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, " |
94cd65dd SS |
1553 | "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n", |
1554 | instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id, | |
1555 | pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len), | |
1556 | le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount); | |
658dcedb | 1557 | } |
da0dc9fb BH |
1558 | if (megasas_dbg_lvl & MEGASAS_DBG_LVL) { |
1559 | for (n = 0; n < sgcount; n++) { | |
1560 | if (IS_DMA64) | |
1561 | dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%llx\n", | |
1562 | le32_to_cpu(mfi_sgl->sge64[n].length), | |
1563 | le64_to_cpu(mfi_sgl->sge64[n].phys_addr)); | |
1564 | else | |
1565 | dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%x\n", | |
1566 | le32_to_cpu(mfi_sgl->sge32[n].length), | |
1567 | le32_to_cpu(mfi_sgl->sge32[n].phys_addr)); | |
658dcedb SP |
1568 | } |
1569 | } | |
658dcedb | 1570 | } /*for max_cmd*/ |
1be18254 | 1571 | dev_err(&instance->pdev->dev, "[%d]: Pending Internal cmds in FW : \n",instance->host->host_no); |
658dcedb SP |
1572 | for (i = 0; i < max_cmd; i++) { |
1573 | ||
1574 | cmd = instance->cmd_list[i]; | |
1575 | ||
da0dc9fb | 1576 | if (cmd->sync_cmd == 1) |
1be18254 | 1577 | dev_err(&instance->pdev->dev, "0x%08lx : ", (unsigned long)cmd->frame_phys_addr); |
658dcedb | 1578 | } |
1be18254 | 1579 | dev_err(&instance->pdev->dev, "[%d]: Dumping Done\n\n",instance->host->host_no); |
658dcedb SP |
1580 | } |
1581 | ||
cd50ba8e | 1582 | u32 |
1583 | megasas_build_and_issue_cmd(struct megasas_instance *instance, | |
1584 | struct scsi_cmnd *scmd) | |
1585 | { | |
1586 | struct megasas_cmd *cmd; | |
1587 | u32 frame_count; | |
1588 | ||
1589 | cmd = megasas_get_cmd(instance); | |
1590 | if (!cmd) | |
1591 | return SCSI_MLQUEUE_HOST_BUSY; | |
1592 | ||
1593 | /* | |
1594 | * Logical drive command | |
1595 | */ | |
7497cde8 | 1596 | if (megasas_cmd_type(scmd) == READ_WRITE_LDIO) |
cd50ba8e | 1597 | frame_count = megasas_build_ldio(instance, scmd, cmd); |
1598 | else | |
1599 | frame_count = megasas_build_dcdb(instance, scmd, cmd); | |
1600 | ||
1601 | if (!frame_count) | |
1602 | goto out_return_cmd; | |
1603 | ||
1604 | cmd->scmd = scmd; | |
1605 | scmd->SCp.ptr = (char *)cmd; | |
1606 | ||
1607 | /* | |
1608 | * Issue the command to the FW | |
1609 | */ | |
1610 | atomic_inc(&instance->fw_outstanding); | |
1611 | ||
1612 | instance->instancet->fire_cmd(instance, cmd->frame_phys_addr, | |
1613 | cmd->frame_count-1, instance->reg_set); | |
cd50ba8e | 1614 | |
1615 | return 0; | |
1616 | out_return_cmd: | |
1617 | megasas_return_cmd(instance, cmd); | |
1618 | return 1; | |
1619 | } | |
1620 | ||
1621 | ||
c4a3e0a5 BS |
1622 | /** |
1623 | * megasas_queue_command - Queue entry point | |
1624 | * @scmd: SCSI command to be queued | |
1625 | * @done: Callback entry point | |
1626 | */ | |
1627 | static int | |
fb1a24ff | 1628 | megasas_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd) |
c4a3e0a5 | 1629 | { |
c4a3e0a5 | 1630 | struct megasas_instance *instance; |
39a98554 | 1631 | unsigned long flags; |
c4a3e0a5 BS |
1632 | |
1633 | instance = (struct megasas_instance *) | |
1634 | scmd->device->host->hostdata; | |
af37acfb | 1635 | |
aa00832b SS |
1636 | if (instance->unload == 1) { |
1637 | scmd->result = DID_NO_CONNECT << 16; | |
1638 | scmd->scsi_done(scmd); | |
1639 | return 0; | |
1640 | } | |
1641 | ||
39a98554 | 1642 | if (instance->issuepend_done == 0) |
af37acfb SP |
1643 | return SCSI_MLQUEUE_HOST_BUSY; |
1644 | ||
39a98554 | 1645 | spin_lock_irqsave(&instance->hba_lock, flags); |
b09e66da | 1646 | |
229fe47c | 1647 | /* Check for an mpio path and adjust behavior */ |
1648 | if (instance->adprecovery == MEGASAS_ADPRESET_SM_INFAULT) { | |
1649 | if (megasas_check_mpio_paths(instance, scmd) == | |
1650 | (DID_RESET << 16)) { | |
1651 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
1652 | return SCSI_MLQUEUE_HOST_BUSY; | |
1653 | } else { | |
1654 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
1655 | scmd->result = DID_NO_CONNECT << 16; | |
fb1a24ff | 1656 | scmd->scsi_done(scmd); |
229fe47c | 1657 | return 0; |
1658 | } | |
1659 | } | |
1660 | ||
b09e66da SS |
1661 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) { |
1662 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
229fe47c | 1663 | scmd->result = DID_NO_CONNECT << 16; |
fb1a24ff | 1664 | scmd->scsi_done(scmd); |
b09e66da SS |
1665 | return 0; |
1666 | } | |
1667 | ||
39a98554 | 1668 | if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) { |
1669 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
1670 | return SCSI_MLQUEUE_HOST_BUSY; | |
1671 | } | |
1672 | ||
1673 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
1674 | ||
c4a3e0a5 BS |
1675 | scmd->result = 0; |
1676 | ||
cb59aa6a | 1677 | if (MEGASAS_IS_LOGICAL(scmd) && |
51087a86 SS |
1678 | (scmd->device->id >= instance->fw_supported_vd_count || |
1679 | scmd->device->lun)) { | |
cb59aa6a SP |
1680 | scmd->result = DID_BAD_TARGET << 16; |
1681 | goto out_done; | |
c4a3e0a5 BS |
1682 | } |
1683 | ||
02b01e01 SP |
1684 | switch (scmd->cmnd[0]) { |
1685 | case SYNCHRONIZE_CACHE: | |
1686 | /* | |
1687 | * FW takes care of flush cache on its own | |
1688 | * No need to send it down | |
1689 | */ | |
1690 | scmd->result = DID_OK << 16; | |
1691 | goto out_done; | |
1692 | default: | |
1693 | break; | |
1694 | } | |
1695 | ||
cd50ba8e | 1696 | if (instance->instancet->build_and_issue_cmd(instance, scmd)) { |
1be18254 | 1697 | dev_err(&instance->pdev->dev, "Err returned from build_and_issue_cmd\n"); |
cb59aa6a | 1698 | return SCSI_MLQUEUE_HOST_BUSY; |
cd50ba8e | 1699 | } |
c4a3e0a5 BS |
1700 | |
1701 | return 0; | |
cb59aa6a | 1702 | |
cb59aa6a | 1703 | out_done: |
fb1a24ff | 1704 | scmd->scsi_done(scmd); |
cb59aa6a | 1705 | return 0; |
c4a3e0a5 BS |
1706 | } |
1707 | ||
044833b5 YB |
1708 | static struct megasas_instance *megasas_lookup_instance(u16 host_no) |
1709 | { | |
1710 | int i; | |
1711 | ||
1712 | for (i = 0; i < megasas_mgmt_info.max_index; i++) { | |
1713 | ||
1714 | if ((megasas_mgmt_info.instance[i]) && | |
1715 | (megasas_mgmt_info.instance[i]->host->host_no == host_no)) | |
1716 | return megasas_mgmt_info.instance[i]; | |
1717 | } | |
1718 | ||
1719 | return NULL; | |
1720 | } | |
1721 | ||
147aab6a CH |
1722 | static int megasas_slave_configure(struct scsi_device *sdev) |
1723 | { | |
e5b3a65f | 1724 | /* |
da0dc9fb BH |
1725 | * The RAID firmware may require extended timeouts. |
1726 | */ | |
044833b5 YB |
1727 | blk_queue_rq_timeout(sdev->request_queue, |
1728 | MEGASAS_DEFAULT_CMD_TIMEOUT * HZ); | |
07e38d94 | 1729 | |
044833b5 YB |
1730 | return 0; |
1731 | } | |
1732 | ||
1733 | static int megasas_slave_alloc(struct scsi_device *sdev) | |
1734 | { | |
da0dc9fb | 1735 | u16 pd_index = 0; |
044833b5 | 1736 | struct megasas_instance *instance ; |
da0dc9fb | 1737 | |
044833b5 | 1738 | instance = megasas_lookup_instance(sdev->host->host_no); |
07e38d94 | 1739 | if (sdev->channel < MEGASAS_MAX_PD_CHANNELS) { |
044833b5 YB |
1740 | /* |
1741 | * Open the OS scan to the SYSTEM PD | |
1742 | */ | |
1743 | pd_index = | |
1744 | (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) + | |
1745 | sdev->id; | |
07e38d94 SS |
1746 | if (instance->pd_list[pd_index].driveState == |
1747 | MR_PD_STATE_SYSTEM) { | |
044833b5 YB |
1748 | return 0; |
1749 | } | |
1750 | return -ENXIO; | |
1751 | } | |
147aab6a CH |
1752 | return 0; |
1753 | } | |
1754 | ||
c8dd61ef SS |
1755 | /* |
1756 | * megasas_complete_outstanding_ioctls - Complete outstanding ioctls after a | |
1757 | * kill adapter | |
1758 | * @instance: Adapter soft state | |
1759 | * | |
1760 | */ | |
6a6981fe | 1761 | static void megasas_complete_outstanding_ioctls(struct megasas_instance *instance) |
c8dd61ef SS |
1762 | { |
1763 | int i; | |
1764 | struct megasas_cmd *cmd_mfi; | |
1765 | struct megasas_cmd_fusion *cmd_fusion; | |
1766 | struct fusion_context *fusion = instance->ctrl_context; | |
1767 | ||
1768 | /* Find all outstanding ioctls */ | |
1769 | if (fusion) { | |
1770 | for (i = 0; i < instance->max_fw_cmds; i++) { | |
1771 | cmd_fusion = fusion->cmd_list[i]; | |
1772 | if (cmd_fusion->sync_cmd_idx != (u32)ULONG_MAX) { | |
1773 | cmd_mfi = instance->cmd_list[cmd_fusion->sync_cmd_idx]; | |
1774 | if (cmd_mfi->sync_cmd && | |
1775 | cmd_mfi->frame->hdr.cmd != MFI_CMD_ABORT) | |
1776 | megasas_complete_cmd(instance, | |
1777 | cmd_mfi, DID_OK); | |
1778 | } | |
1779 | } | |
1780 | } else { | |
1781 | for (i = 0; i < instance->max_fw_cmds; i++) { | |
1782 | cmd_mfi = instance->cmd_list[i]; | |
1783 | if (cmd_mfi->sync_cmd && cmd_mfi->frame->hdr.cmd != | |
1784 | MFI_CMD_ABORT) | |
1785 | megasas_complete_cmd(instance, cmd_mfi, DID_OK); | |
1786 | } | |
1787 | } | |
1788 | } | |
1789 | ||
1790 | ||
9c915a8c | 1791 | void megaraid_sas_kill_hba(struct megasas_instance *instance) |
39a98554 | 1792 | { |
c8dd61ef SS |
1793 | /* Set critical error to block I/O & ioctls in case caller didn't */ |
1794 | instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR; | |
1795 | /* Wait 1 second to ensure IO or ioctls in build have posted */ | |
1796 | msleep(1000); | |
39a98554 | 1797 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) || |
c8dd61ef SS |
1798 | (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) || |
1799 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) || | |
1800 | (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) || | |
1801 | (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || | |
1802 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) { | |
da0dc9fb | 1803 | writel(MFI_STOP_ADP, &instance->reg_set->doorbell); |
229fe47c | 1804 | /* Flush */ |
1805 | readl(&instance->reg_set->doorbell); | |
1806 | if (instance->mpio && instance->requestorId) | |
1807 | memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS); | |
39a98554 | 1808 | } else { |
c8dd61ef SS |
1809 | writel(MFI_STOP_ADP, |
1810 | &instance->reg_set->inbound_doorbell); | |
9c915a8c | 1811 | } |
c8dd61ef SS |
1812 | /* Complete outstanding ioctls when adapter is killed */ |
1813 | megasas_complete_outstanding_ioctls(instance); | |
9c915a8c | 1814 | } |
1815 | ||
1816 | /** | |
1817 | * megasas_check_and_restore_queue_depth - Check if queue depth needs to be | |
1818 | * restored to max value | |
1819 | * @instance: Adapter soft state | |
1820 | * | |
1821 | */ | |
1822 | void | |
1823 | megasas_check_and_restore_queue_depth(struct megasas_instance *instance) | |
1824 | { | |
1825 | unsigned long flags; | |
ae09a6c1 | 1826 | |
9c915a8c | 1827 | if (instance->flag & MEGASAS_FW_BUSY |
c5daa6a9 | 1828 | && time_after(jiffies, instance->last_time + 5 * HZ) |
1829 | && atomic_read(&instance->fw_outstanding) < | |
1830 | instance->throttlequeuedepth + 1) { | |
9c915a8c | 1831 | |
1832 | spin_lock_irqsave(instance->host->host_lock, flags); | |
1833 | instance->flag &= ~MEGASAS_FW_BUSY; | |
9c915a8c | 1834 | |
ae09a6c1 | 1835 | instance->host->can_queue = instance->max_scsi_cmds; |
9c915a8c | 1836 | spin_unlock_irqrestore(instance->host->host_lock, flags); |
39a98554 | 1837 | } |
1838 | } | |
1839 | ||
7343eb65 | 1840 | /** |
1841 | * megasas_complete_cmd_dpc - Returns FW's controller structure | |
1842 | * @instance_addr: Address of adapter soft state | |
1843 | * | |
1844 | * Tasklet to complete cmds | |
1845 | */ | |
1846 | static void megasas_complete_cmd_dpc(unsigned long instance_addr) | |
1847 | { | |
1848 | u32 producer; | |
1849 | u32 consumer; | |
1850 | u32 context; | |
1851 | struct megasas_cmd *cmd; | |
1852 | struct megasas_instance *instance = | |
1853 | (struct megasas_instance *)instance_addr; | |
1854 | unsigned long flags; | |
1855 | ||
1856 | /* If we have already declared adapter dead, donot complete cmds */ | |
da0dc9fb | 1857 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) |
7343eb65 | 1858 | return; |
1859 | ||
1860 | spin_lock_irqsave(&instance->completion_lock, flags); | |
1861 | ||
94cd65dd SS |
1862 | producer = le32_to_cpu(*instance->producer); |
1863 | consumer = le32_to_cpu(*instance->consumer); | |
7343eb65 | 1864 | |
1865 | while (consumer != producer) { | |
94cd65dd | 1866 | context = le32_to_cpu(instance->reply_queue[consumer]); |
39a98554 | 1867 | if (context >= instance->max_fw_cmds) { |
1be18254 | 1868 | dev_err(&instance->pdev->dev, "Unexpected context value %x\n", |
39a98554 | 1869 | context); |
1870 | BUG(); | |
1871 | } | |
7343eb65 | 1872 | |
1873 | cmd = instance->cmd_list[context]; | |
1874 | ||
1875 | megasas_complete_cmd(instance, cmd, DID_OK); | |
1876 | ||
1877 | consumer++; | |
1878 | if (consumer == (instance->max_fw_cmds + 1)) { | |
1879 | consumer = 0; | |
1880 | } | |
1881 | } | |
1882 | ||
94cd65dd | 1883 | *instance->consumer = cpu_to_le32(producer); |
7343eb65 | 1884 | |
1885 | spin_unlock_irqrestore(&instance->completion_lock, flags); | |
1886 | ||
1887 | /* | |
1888 | * Check if we can restore can_queue | |
1889 | */ | |
9c915a8c | 1890 | megasas_check_and_restore_queue_depth(instance); |
7343eb65 | 1891 | } |
1892 | ||
229fe47c | 1893 | /** |
1894 | * megasas_start_timer - Initializes a timer object | |
1895 | * @instance: Adapter soft state | |
1896 | * @timer: timer object to be initialized | |
1897 | * @fn: timer function | |
1898 | * @interval: time interval between timer function call | |
1899 | * | |
1900 | */ | |
1901 | void megasas_start_timer(struct megasas_instance *instance, | |
1902 | struct timer_list *timer, | |
1903 | void *fn, unsigned long interval) | |
1904 | { | |
1905 | init_timer(timer); | |
1906 | timer->expires = jiffies + interval; | |
1907 | timer->data = (unsigned long)instance; | |
1908 | timer->function = fn; | |
1909 | add_timer(timer); | |
1910 | } | |
1911 | ||
707e09bd YB |
1912 | static void |
1913 | megasas_internal_reset_defer_cmds(struct megasas_instance *instance); | |
1914 | ||
1915 | static void | |
1916 | process_fw_state_change_wq(struct work_struct *work); | |
1917 | ||
1918 | void megasas_do_ocr(struct megasas_instance *instance) | |
1919 | { | |
1920 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) || | |
1921 | (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) || | |
1922 | (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) { | |
94cd65dd | 1923 | *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN); |
707e09bd | 1924 | } |
d46a3ad6 | 1925 | instance->instancet->disable_intr(instance); |
707e09bd YB |
1926 | instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT; |
1927 | instance->issuepend_done = 0; | |
1928 | ||
1929 | atomic_set(&instance->fw_outstanding, 0); | |
1930 | megasas_internal_reset_defer_cmds(instance); | |
1931 | process_fw_state_change_wq(&instance->work_init); | |
1932 | } | |
1933 | ||
4cbfea88 AR |
1934 | static int megasas_get_ld_vf_affiliation_111(struct megasas_instance *instance, |
1935 | int initial) | |
229fe47c | 1936 | { |
1937 | struct megasas_cmd *cmd; | |
1938 | struct megasas_dcmd_frame *dcmd; | |
229fe47c | 1939 | struct MR_LD_VF_AFFILIATION_111 *new_affiliation_111 = NULL; |
229fe47c | 1940 | dma_addr_t new_affiliation_111_h; |
1941 | int ld, retval = 0; | |
1942 | u8 thisVf; | |
1943 | ||
1944 | cmd = megasas_get_cmd(instance); | |
1945 | ||
1946 | if (!cmd) { | |
1be18254 BH |
1947 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation_111:" |
1948 | "Failed to get cmd for scsi%d\n", | |
229fe47c | 1949 | instance->host->host_no); |
1950 | return -ENOMEM; | |
1951 | } | |
1952 | ||
1953 | dcmd = &cmd->frame->dcmd; | |
1954 | ||
4cbfea88 | 1955 | if (!instance->vf_affiliation_111) { |
1be18254 BH |
1956 | dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF " |
1957 | "affiliation for scsi%d\n", instance->host->host_no); | |
229fe47c | 1958 | megasas_return_cmd(instance, cmd); |
1959 | return -ENOMEM; | |
1960 | } | |
1961 | ||
1962 | if (initial) | |
229fe47c | 1963 | memset(instance->vf_affiliation_111, 0, |
1964 | sizeof(struct MR_LD_VF_AFFILIATION_111)); | |
229fe47c | 1965 | else { |
4cbfea88 AR |
1966 | new_affiliation_111 = |
1967 | pci_alloc_consistent(instance->pdev, | |
1968 | sizeof(struct MR_LD_VF_AFFILIATION_111), | |
1969 | &new_affiliation_111_h); | |
1970 | if (!new_affiliation_111) { | |
1be18254 BH |
1971 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate " |
1972 | "memory for new affiliation for scsi%d\n", | |
4cbfea88 | 1973 | instance->host->host_no); |
229fe47c | 1974 | megasas_return_cmd(instance, cmd); |
1975 | return -ENOMEM; | |
1976 | } | |
4cbfea88 AR |
1977 | memset(new_affiliation_111, 0, |
1978 | sizeof(struct MR_LD_VF_AFFILIATION_111)); | |
229fe47c | 1979 | } |
1980 | ||
1981 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
1982 | ||
1983 | dcmd->cmd = MFI_CMD_DCMD; | |
2be2a988 | 1984 | dcmd->cmd_status = MFI_STAT_INVALID_STATUS; |
229fe47c | 1985 | dcmd->sge_count = 1; |
2213a467 | 1986 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH); |
229fe47c | 1987 | dcmd->timeout = 0; |
1988 | dcmd->pad_0 = 0; | |
2213a467 CH |
1989 | dcmd->data_xfer_len = |
1990 | cpu_to_le32(sizeof(struct MR_LD_VF_AFFILIATION_111)); | |
1991 | dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111); | |
229fe47c | 1992 | |
4cbfea88 AR |
1993 | if (initial) |
1994 | dcmd->sgl.sge32[0].phys_addr = | |
2213a467 | 1995 | cpu_to_le32(instance->vf_affiliation_111_h); |
229fe47c | 1996 | else |
2213a467 CH |
1997 | dcmd->sgl.sge32[0].phys_addr = |
1998 | cpu_to_le32(new_affiliation_111_h); | |
4cbfea88 | 1999 | |
2213a467 CH |
2000 | dcmd->sgl.sge32[0].length = cpu_to_le32( |
2001 | sizeof(struct MR_LD_VF_AFFILIATION_111)); | |
229fe47c | 2002 | |
1be18254 | 2003 | dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for " |
229fe47c | 2004 | "scsi%d\n", instance->host->host_no); |
2005 | ||
2006 | megasas_issue_blocked_cmd(instance, cmd, 0); | |
2007 | ||
2008 | if (dcmd->cmd_status) { | |
1be18254 BH |
2009 | dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD" |
2010 | " failed with status 0x%x for scsi%d\n", | |
229fe47c | 2011 | dcmd->cmd_status, instance->host->host_no); |
2012 | retval = 1; /* Do a scan if we couldn't get affiliation */ | |
2013 | goto out; | |
2014 | } | |
2015 | ||
2016 | if (!initial) { | |
4cbfea88 AR |
2017 | thisVf = new_affiliation_111->thisVf; |
2018 | for (ld = 0 ; ld < new_affiliation_111->vdCount; ld++) | |
2019 | if (instance->vf_affiliation_111->map[ld].policy[thisVf] != | |
2020 | new_affiliation_111->map[ld].policy[thisVf]) { | |
1be18254 BH |
2021 | dev_warn(&instance->pdev->dev, "SR-IOV: " |
2022 | "Got new LD/VF affiliation for scsi%d\n", | |
229fe47c | 2023 | instance->host->host_no); |
4cbfea88 AR |
2024 | memcpy(instance->vf_affiliation_111, |
2025 | new_affiliation_111, | |
2026 | sizeof(struct MR_LD_VF_AFFILIATION_111)); | |
229fe47c | 2027 | retval = 1; |
2028 | goto out; | |
2029 | } | |
4cbfea88 AR |
2030 | } |
2031 | out: | |
2032 | if (new_affiliation_111) { | |
2033 | pci_free_consistent(instance->pdev, | |
2034 | sizeof(struct MR_LD_VF_AFFILIATION_111), | |
2035 | new_affiliation_111, | |
2036 | new_affiliation_111_h); | |
2037 | } | |
90dc9d98 | 2038 | |
4026e9aa | 2039 | megasas_return_cmd(instance, cmd); |
4cbfea88 AR |
2040 | |
2041 | return retval; | |
2042 | } | |
2043 | ||
2044 | static int megasas_get_ld_vf_affiliation_12(struct megasas_instance *instance, | |
2045 | int initial) | |
2046 | { | |
2047 | struct megasas_cmd *cmd; | |
2048 | struct megasas_dcmd_frame *dcmd; | |
2049 | struct MR_LD_VF_AFFILIATION *new_affiliation = NULL; | |
2050 | struct MR_LD_VF_MAP *newmap = NULL, *savedmap = NULL; | |
2051 | dma_addr_t new_affiliation_h; | |
2052 | int i, j, retval = 0, found = 0, doscan = 0; | |
2053 | u8 thisVf; | |
2054 | ||
2055 | cmd = megasas_get_cmd(instance); | |
2056 | ||
2057 | if (!cmd) { | |
1be18254 BH |
2058 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation12: " |
2059 | "Failed to get cmd for scsi%d\n", | |
4cbfea88 AR |
2060 | instance->host->host_no); |
2061 | return -ENOMEM; | |
2062 | } | |
2063 | ||
2064 | dcmd = &cmd->frame->dcmd; | |
2065 | ||
2066 | if (!instance->vf_affiliation) { | |
1be18254 BH |
2067 | dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF " |
2068 | "affiliation for scsi%d\n", instance->host->host_no); | |
4cbfea88 AR |
2069 | megasas_return_cmd(instance, cmd); |
2070 | return -ENOMEM; | |
2071 | } | |
2072 | ||
2073 | if (initial) | |
2074 | memset(instance->vf_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) * | |
2075 | sizeof(struct MR_LD_VF_AFFILIATION)); | |
2076 | else { | |
2077 | new_affiliation = | |
2078 | pci_alloc_consistent(instance->pdev, | |
2079 | (MAX_LOGICAL_DRIVES + 1) * | |
2080 | sizeof(struct MR_LD_VF_AFFILIATION), | |
2081 | &new_affiliation_h); | |
2082 | if (!new_affiliation) { | |
1be18254 BH |
2083 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate " |
2084 | "memory for new affiliation for scsi%d\n", | |
4cbfea88 AR |
2085 | instance->host->host_no); |
2086 | megasas_return_cmd(instance, cmd); | |
2087 | return -ENOMEM; | |
2088 | } | |
2089 | memset(new_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) * | |
2090 | sizeof(struct MR_LD_VF_AFFILIATION)); | |
2091 | } | |
2092 | ||
2093 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
2094 | ||
2095 | dcmd->cmd = MFI_CMD_DCMD; | |
2be2a988 | 2096 | dcmd->cmd_status = MFI_STAT_INVALID_STATUS; |
4cbfea88 | 2097 | dcmd->sge_count = 1; |
2213a467 | 2098 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH); |
4cbfea88 AR |
2099 | dcmd->timeout = 0; |
2100 | dcmd->pad_0 = 0; | |
2213a467 CH |
2101 | dcmd->data_xfer_len = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) * |
2102 | sizeof(struct MR_LD_VF_AFFILIATION)); | |
2103 | dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS); | |
4cbfea88 AR |
2104 | |
2105 | if (initial) | |
2213a467 CH |
2106 | dcmd->sgl.sge32[0].phys_addr = |
2107 | cpu_to_le32(instance->vf_affiliation_h); | |
4cbfea88 | 2108 | else |
2213a467 CH |
2109 | dcmd->sgl.sge32[0].phys_addr = |
2110 | cpu_to_le32(new_affiliation_h); | |
4cbfea88 | 2111 | |
2213a467 CH |
2112 | dcmd->sgl.sge32[0].length = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) * |
2113 | sizeof(struct MR_LD_VF_AFFILIATION)); | |
4cbfea88 | 2114 | |
1be18254 | 2115 | dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for " |
4cbfea88 AR |
2116 | "scsi%d\n", instance->host->host_no); |
2117 | ||
2118 | megasas_issue_blocked_cmd(instance, cmd, 0); | |
2119 | ||
2120 | if (dcmd->cmd_status) { | |
1be18254 BH |
2121 | dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD" |
2122 | " failed with status 0x%x for scsi%d\n", | |
4cbfea88 AR |
2123 | dcmd->cmd_status, instance->host->host_no); |
2124 | retval = 1; /* Do a scan if we couldn't get affiliation */ | |
2125 | goto out; | |
2126 | } | |
2127 | ||
2128 | if (!initial) { | |
2129 | if (!new_affiliation->ldCount) { | |
1be18254 BH |
2130 | dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF " |
2131 | "affiliation for passive path for scsi%d\n", | |
4cbfea88 AR |
2132 | instance->host->host_no); |
2133 | retval = 1; | |
2134 | goto out; | |
2135 | } | |
2136 | newmap = new_affiliation->map; | |
2137 | savedmap = instance->vf_affiliation->map; | |
2138 | thisVf = new_affiliation->thisVf; | |
2139 | for (i = 0 ; i < new_affiliation->ldCount; i++) { | |
2140 | found = 0; | |
2141 | for (j = 0; j < instance->vf_affiliation->ldCount; | |
2142 | j++) { | |
2143 | if (newmap->ref.targetId == | |
2144 | savedmap->ref.targetId) { | |
2145 | found = 1; | |
2146 | if (newmap->policy[thisVf] != | |
2147 | savedmap->policy[thisVf]) { | |
2148 | doscan = 1; | |
2149 | goto out; | |
2150 | } | |
229fe47c | 2151 | } |
2152 | savedmap = (struct MR_LD_VF_MAP *) | |
2153 | ((unsigned char *)savedmap + | |
2154 | savedmap->size); | |
4cbfea88 AR |
2155 | } |
2156 | if (!found && newmap->policy[thisVf] != | |
2157 | MR_LD_ACCESS_HIDDEN) { | |
2158 | doscan = 1; | |
2159 | goto out; | |
2160 | } | |
2161 | newmap = (struct MR_LD_VF_MAP *) | |
2162 | ((unsigned char *)newmap + newmap->size); | |
2163 | } | |
2164 | ||
2165 | newmap = new_affiliation->map; | |
2166 | savedmap = instance->vf_affiliation->map; | |
2167 | ||
2168 | for (i = 0 ; i < instance->vf_affiliation->ldCount; i++) { | |
2169 | found = 0; | |
2170 | for (j = 0 ; j < new_affiliation->ldCount; j++) { | |
2171 | if (savedmap->ref.targetId == | |
2172 | newmap->ref.targetId) { | |
2173 | found = 1; | |
2174 | if (savedmap->policy[thisVf] != | |
2175 | newmap->policy[thisVf]) { | |
2176 | doscan = 1; | |
2177 | goto out; | |
2178 | } | |
2179 | } | |
229fe47c | 2180 | newmap = (struct MR_LD_VF_MAP *) |
2181 | ((unsigned char *)newmap + | |
2182 | newmap->size); | |
2183 | } | |
4cbfea88 AR |
2184 | if (!found && savedmap->policy[thisVf] != |
2185 | MR_LD_ACCESS_HIDDEN) { | |
2186 | doscan = 1; | |
2187 | goto out; | |
2188 | } | |
2189 | savedmap = (struct MR_LD_VF_MAP *) | |
2190 | ((unsigned char *)savedmap + | |
2191 | savedmap->size); | |
229fe47c | 2192 | } |
2193 | } | |
2194 | out: | |
4cbfea88 | 2195 | if (doscan) { |
1be18254 BH |
2196 | dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF " |
2197 | "affiliation for scsi%d\n", instance->host->host_no); | |
4cbfea88 AR |
2198 | memcpy(instance->vf_affiliation, new_affiliation, |
2199 | new_affiliation->size); | |
2200 | retval = 1; | |
229fe47c | 2201 | } |
4cbfea88 AR |
2202 | |
2203 | if (new_affiliation) | |
2204 | pci_free_consistent(instance->pdev, | |
2205 | (MAX_LOGICAL_DRIVES + 1) * | |
2206 | sizeof(struct MR_LD_VF_AFFILIATION), | |
2207 | new_affiliation, new_affiliation_h); | |
4026e9aa | 2208 | megasas_return_cmd(instance, cmd); |
229fe47c | 2209 | |
2210 | return retval; | |
2211 | } | |
2212 | ||
4cbfea88 AR |
2213 | /* This function will get the current SR-IOV LD/VF affiliation */ |
2214 | static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance, | |
2215 | int initial) | |
2216 | { | |
2217 | int retval; | |
2218 | ||
2219 | if (instance->PlasmaFW111) | |
2220 | retval = megasas_get_ld_vf_affiliation_111(instance, initial); | |
2221 | else | |
2222 | retval = megasas_get_ld_vf_affiliation_12(instance, initial); | |
2223 | return retval; | |
2224 | } | |
2225 | ||
229fe47c | 2226 | /* This function will tell FW to start the SR-IOV heartbeat */ |
2227 | int megasas_sriov_start_heartbeat(struct megasas_instance *instance, | |
2228 | int initial) | |
2229 | { | |
2230 | struct megasas_cmd *cmd; | |
2231 | struct megasas_dcmd_frame *dcmd; | |
2232 | int retval = 0; | |
2233 | ||
2234 | cmd = megasas_get_cmd(instance); | |
2235 | ||
2236 | if (!cmd) { | |
1be18254 BH |
2237 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_sriov_start_heartbeat: " |
2238 | "Failed to get cmd for scsi%d\n", | |
229fe47c | 2239 | instance->host->host_no); |
2240 | return -ENOMEM; | |
2241 | } | |
2242 | ||
2243 | dcmd = &cmd->frame->dcmd; | |
2244 | ||
2245 | if (initial) { | |
2246 | instance->hb_host_mem = | |
7c845eb5 JP |
2247 | pci_zalloc_consistent(instance->pdev, |
2248 | sizeof(struct MR_CTRL_HB_HOST_MEM), | |
2249 | &instance->hb_host_mem_h); | |
229fe47c | 2250 | if (!instance->hb_host_mem) { |
1be18254 BH |
2251 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate" |
2252 | " memory for heartbeat host memory for scsi%d\n", | |
2253 | instance->host->host_no); | |
229fe47c | 2254 | retval = -ENOMEM; |
2255 | goto out; | |
2256 | } | |
229fe47c | 2257 | } |
2258 | ||
2259 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
2260 | ||
2213a467 | 2261 | dcmd->mbox.s[0] = cpu_to_le16(sizeof(struct MR_CTRL_HB_HOST_MEM)); |
229fe47c | 2262 | dcmd->cmd = MFI_CMD_DCMD; |
2be2a988 | 2263 | dcmd->cmd_status = MFI_STAT_INVALID_STATUS; |
229fe47c | 2264 | dcmd->sge_count = 1; |
2213a467 | 2265 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH); |
229fe47c | 2266 | dcmd->timeout = 0; |
2267 | dcmd->pad_0 = 0; | |
2213a467 CH |
2268 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM)); |
2269 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC); | |
2270 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->hb_host_mem_h); | |
2271 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM)); | |
229fe47c | 2272 | |
1be18254 | 2273 | dev_warn(&instance->pdev->dev, "SR-IOV: Starting heartbeat for scsi%d\n", |
229fe47c | 2274 | instance->host->host_no); |
2275 | ||
4026e9aa SS |
2276 | if (instance->ctrl_context && !instance->mask_interrupts) |
2277 | retval = megasas_issue_blocked_cmd(instance, cmd, | |
2278 | MEGASAS_ROUTINE_WAIT_TIME_VF); | |
2279 | else | |
2280 | retval = megasas_issue_polled(instance, cmd); | |
229fe47c | 2281 | |
4026e9aa | 2282 | if (retval) { |
2be2a988 SS |
2283 | dev_warn(&instance->pdev->dev, "SR-IOV: MR_DCMD_CTRL_SHARED_HOST" |
2284 | "_MEM_ALLOC DCMD %s for scsi%d\n", | |
2285 | (dcmd->cmd_status == MFI_STAT_INVALID_STATUS) ? | |
2286 | "timed out" : "failed", instance->host->host_no); | |
229fe47c | 2287 | retval = 1; |
229fe47c | 2288 | } |
2289 | ||
2290 | out: | |
2291 | megasas_return_cmd(instance, cmd); | |
2292 | ||
2293 | return retval; | |
2294 | } | |
2295 | ||
2296 | /* Handler for SR-IOV heartbeat */ | |
2297 | void megasas_sriov_heartbeat_handler(unsigned long instance_addr) | |
2298 | { | |
2299 | struct megasas_instance *instance = | |
2300 | (struct megasas_instance *)instance_addr; | |
2301 | ||
2302 | if (instance->hb_host_mem->HB.fwCounter != | |
2303 | instance->hb_host_mem->HB.driverCounter) { | |
2304 | instance->hb_host_mem->HB.driverCounter = | |
2305 | instance->hb_host_mem->HB.fwCounter; | |
2306 | mod_timer(&instance->sriov_heartbeat_timer, | |
2307 | jiffies + MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF); | |
2308 | } else { | |
1be18254 | 2309 | dev_warn(&instance->pdev->dev, "SR-IOV: Heartbeat never " |
229fe47c | 2310 | "completed for scsi%d\n", instance->host->host_no); |
2311 | schedule_work(&instance->work_init); | |
2312 | } | |
2313 | } | |
2314 | ||
c4a3e0a5 BS |
2315 | /** |
2316 | * megasas_wait_for_outstanding - Wait for all outstanding cmds | |
2317 | * @instance: Adapter soft state | |
2318 | * | |
25985edc | 2319 | * This function waits for up to MEGASAS_RESET_WAIT_TIME seconds for FW to |
c4a3e0a5 BS |
2320 | * complete all its outstanding commands. Returns error if one or more IOs |
2321 | * are pending after this time period. It also marks the controller dead. | |
2322 | */ | |
2323 | static int megasas_wait_for_outstanding(struct megasas_instance *instance) | |
2324 | { | |
2325 | int i; | |
39a98554 | 2326 | u32 reset_index; |
c4a3e0a5 | 2327 | u32 wait_time = MEGASAS_RESET_WAIT_TIME; |
39a98554 | 2328 | u8 adprecovery; |
2329 | unsigned long flags; | |
2330 | struct list_head clist_local; | |
2331 | struct megasas_cmd *reset_cmd; | |
707e09bd YB |
2332 | u32 fw_state; |
2333 | u8 kill_adapter_flag; | |
39a98554 | 2334 | |
2335 | spin_lock_irqsave(&instance->hba_lock, flags); | |
2336 | adprecovery = instance->adprecovery; | |
2337 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
2338 | ||
2339 | if (adprecovery != MEGASAS_HBA_OPERATIONAL) { | |
2340 | ||
2341 | INIT_LIST_HEAD(&clist_local); | |
2342 | spin_lock_irqsave(&instance->hba_lock, flags); | |
2343 | list_splice_init(&instance->internal_reset_pending_q, | |
2344 | &clist_local); | |
2345 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
2346 | ||
1be18254 | 2347 | dev_notice(&instance->pdev->dev, "HBA reset wait ...\n"); |
39a98554 | 2348 | for (i = 0; i < wait_time; i++) { |
2349 | msleep(1000); | |
2350 | spin_lock_irqsave(&instance->hba_lock, flags); | |
2351 | adprecovery = instance->adprecovery; | |
2352 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
2353 | if (adprecovery == MEGASAS_HBA_OPERATIONAL) | |
2354 | break; | |
2355 | } | |
2356 | ||
2357 | if (adprecovery != MEGASAS_HBA_OPERATIONAL) { | |
1be18254 | 2358 | dev_notice(&instance->pdev->dev, "reset: Stopping HBA.\n"); |
39a98554 | 2359 | spin_lock_irqsave(&instance->hba_lock, flags); |
da0dc9fb | 2360 | instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR; |
39a98554 | 2361 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
2362 | return FAILED; | |
2363 | } | |
2364 | ||
da0dc9fb | 2365 | reset_index = 0; |
39a98554 | 2366 | while (!list_empty(&clist_local)) { |
da0dc9fb | 2367 | reset_cmd = list_entry((&clist_local)->next, |
39a98554 | 2368 | struct megasas_cmd, list); |
2369 | list_del_init(&reset_cmd->list); | |
2370 | if (reset_cmd->scmd) { | |
2371 | reset_cmd->scmd->result = DID_RESET << 16; | |
1be18254 | 2372 | dev_notice(&instance->pdev->dev, "%d:%p reset [%02x]\n", |
39a98554 | 2373 | reset_index, reset_cmd, |
5cd049a5 | 2374 | reset_cmd->scmd->cmnd[0]); |
39a98554 | 2375 | |
2376 | reset_cmd->scmd->scsi_done(reset_cmd->scmd); | |
2377 | megasas_return_cmd(instance, reset_cmd); | |
2378 | } else if (reset_cmd->sync_cmd) { | |
1be18254 | 2379 | dev_notice(&instance->pdev->dev, "%p synch cmds" |
39a98554 | 2380 | "reset queue\n", |
2381 | reset_cmd); | |
2382 | ||
2be2a988 | 2383 | reset_cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS; |
39a98554 | 2384 | instance->instancet->fire_cmd(instance, |
2385 | reset_cmd->frame_phys_addr, | |
2386 | 0, instance->reg_set); | |
2387 | } else { | |
1be18254 | 2388 | dev_notice(&instance->pdev->dev, "%p unexpected" |
39a98554 | 2389 | "cmds lst\n", |
2390 | reset_cmd); | |
2391 | } | |
2392 | reset_index++; | |
2393 | } | |
2394 | ||
2395 | return SUCCESS; | |
2396 | } | |
c4a3e0a5 | 2397 | |
c007b8b2 | 2398 | for (i = 0; i < resetwaittime; i++) { |
e4a082c7 SP |
2399 | int outstanding = atomic_read(&instance->fw_outstanding); |
2400 | ||
2401 | if (!outstanding) | |
c4a3e0a5 BS |
2402 | break; |
2403 | ||
2404 | if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) { | |
1be18254 | 2405 | dev_notice(&instance->pdev->dev, "[%2d]waiting for %d " |
e4a082c7 | 2406 | "commands to complete\n",i,outstanding); |
7343eb65 | 2407 | /* |
2408 | * Call cmd completion routine. Cmd to be | |
2409 | * be completed directly without depending on isr. | |
2410 | */ | |
2411 | megasas_complete_cmd_dpc((unsigned long)instance); | |
c4a3e0a5 BS |
2412 | } |
2413 | ||
2414 | msleep(1000); | |
2415 | } | |
2416 | ||
707e09bd YB |
2417 | i = 0; |
2418 | kill_adapter_flag = 0; | |
2419 | do { | |
2420 | fw_state = instance->instancet->read_fw_status_reg( | |
2421 | instance->reg_set) & MFI_STATE_MASK; | |
2422 | if ((fw_state == MFI_STATE_FAULT) && | |
2423 | (instance->disableOnlineCtrlReset == 0)) { | |
2424 | if (i == 3) { | |
2425 | kill_adapter_flag = 2; | |
2426 | break; | |
2427 | } | |
2428 | megasas_do_ocr(instance); | |
2429 | kill_adapter_flag = 1; | |
2430 | ||
2431 | /* wait for 1 secs to let FW finish the pending cmds */ | |
2432 | msleep(1000); | |
2433 | } | |
2434 | i++; | |
2435 | } while (i <= 3); | |
2436 | ||
da0dc9fb | 2437 | if (atomic_read(&instance->fw_outstanding) && !kill_adapter_flag) { |
707e09bd | 2438 | if (instance->disableOnlineCtrlReset == 0) { |
707e09bd YB |
2439 | megasas_do_ocr(instance); |
2440 | ||
2441 | /* wait for 5 secs to let FW finish the pending cmds */ | |
2442 | for (i = 0; i < wait_time; i++) { | |
2443 | int outstanding = | |
2444 | atomic_read(&instance->fw_outstanding); | |
2445 | if (!outstanding) | |
2446 | return SUCCESS; | |
2447 | msleep(1000); | |
2448 | } | |
2449 | } | |
2450 | } | |
2451 | ||
2452 | if (atomic_read(&instance->fw_outstanding) || | |
2453 | (kill_adapter_flag == 2)) { | |
1be18254 | 2454 | dev_notice(&instance->pdev->dev, "pending cmds after reset\n"); |
e3bbff9f | 2455 | /* |
da0dc9fb BH |
2456 | * Send signal to FW to stop processing any pending cmds. |
2457 | * The controller will be taken offline by the OS now. | |
2458 | */ | |
0c79e681 YB |
2459 | if ((instance->pdev->device == |
2460 | PCI_DEVICE_ID_LSI_SAS0073SKINNY) || | |
2461 | (instance->pdev->device == | |
2462 | PCI_DEVICE_ID_LSI_SAS0071SKINNY)) { | |
2463 | writel(MFI_STOP_ADP, | |
9c915a8c | 2464 | &instance->reg_set->doorbell); |
0c79e681 YB |
2465 | } else { |
2466 | writel(MFI_STOP_ADP, | |
e3bbff9f | 2467 | &instance->reg_set->inbound_doorbell); |
0c79e681 | 2468 | } |
658dcedb | 2469 | megasas_dump_pending_frames(instance); |
39a98554 | 2470 | spin_lock_irqsave(&instance->hba_lock, flags); |
da0dc9fb | 2471 | instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR; |
39a98554 | 2472 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
c4a3e0a5 BS |
2473 | return FAILED; |
2474 | } | |
2475 | ||
1be18254 | 2476 | dev_notice(&instance->pdev->dev, "no pending cmds after reset\n"); |
39a98554 | 2477 | |
c4a3e0a5 BS |
2478 | return SUCCESS; |
2479 | } | |
2480 | ||
2481 | /** | |
2482 | * megasas_generic_reset - Generic reset routine | |
2483 | * @scmd: Mid-layer SCSI command | |
2484 | * | |
2485 | * This routine implements a generic reset handler for device, bus and host | |
2486 | * reset requests. Device, bus and host specific reset handlers can use this | |
2487 | * function after they do their specific tasks. | |
2488 | */ | |
2489 | static int megasas_generic_reset(struct scsi_cmnd *scmd) | |
2490 | { | |
2491 | int ret_val; | |
2492 | struct megasas_instance *instance; | |
2493 | ||
2494 | instance = (struct megasas_instance *)scmd->device->host->hostdata; | |
2495 | ||
5cd049a5 CH |
2496 | scmd_printk(KERN_NOTICE, scmd, "megasas: RESET cmd=%x retries=%x\n", |
2497 | scmd->cmnd[0], scmd->retries); | |
c4a3e0a5 | 2498 | |
39a98554 | 2499 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) { |
1be18254 | 2500 | dev_err(&instance->pdev->dev, "cannot recover from previous reset failures\n"); |
c4a3e0a5 BS |
2501 | return FAILED; |
2502 | } | |
2503 | ||
c4a3e0a5 | 2504 | ret_val = megasas_wait_for_outstanding(instance); |
c4a3e0a5 | 2505 | if (ret_val == SUCCESS) |
1be18254 | 2506 | dev_notice(&instance->pdev->dev, "reset successful\n"); |
c4a3e0a5 | 2507 | else |
1be18254 | 2508 | dev_err(&instance->pdev->dev, "failed to do reset\n"); |
c4a3e0a5 | 2509 | |
c4a3e0a5 BS |
2510 | return ret_val; |
2511 | } | |
2512 | ||
05e9ebbe SP |
2513 | /** |
2514 | * megasas_reset_timer - quiesce the adapter if required | |
2515 | * @scmd: scsi cmnd | |
2516 | * | |
2517 | * Sets the FW busy flag and reduces the host->can_queue if the | |
2518 | * cmd has not been completed within the timeout period. | |
2519 | */ | |
2520 | static enum | |
242f9dcb | 2521 | blk_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd) |
05e9ebbe | 2522 | { |
05e9ebbe SP |
2523 | struct megasas_instance *instance; |
2524 | unsigned long flags; | |
2525 | ||
2526 | if (time_after(jiffies, scmd->jiffies_at_alloc + | |
2527 | (MEGASAS_DEFAULT_CMD_TIMEOUT * 2) * HZ)) { | |
242f9dcb | 2528 | return BLK_EH_NOT_HANDLED; |
05e9ebbe SP |
2529 | } |
2530 | ||
f575c5d3 | 2531 | instance = (struct megasas_instance *)scmd->device->host->hostdata; |
05e9ebbe SP |
2532 | if (!(instance->flag & MEGASAS_FW_BUSY)) { |
2533 | /* FW is busy, throttle IO */ | |
2534 | spin_lock_irqsave(instance->host->host_lock, flags); | |
2535 | ||
c5daa6a9 | 2536 | instance->host->can_queue = instance->throttlequeuedepth; |
05e9ebbe SP |
2537 | instance->last_time = jiffies; |
2538 | instance->flag |= MEGASAS_FW_BUSY; | |
2539 | ||
2540 | spin_unlock_irqrestore(instance->host->host_lock, flags); | |
2541 | } | |
242f9dcb | 2542 | return BLK_EH_RESET_TIMER; |
05e9ebbe SP |
2543 | } |
2544 | ||
c4a3e0a5 BS |
2545 | /** |
2546 | * megasas_reset_device - Device reset handler entry point | |
2547 | */ | |
2548 | static int megasas_reset_device(struct scsi_cmnd *scmd) | |
2549 | { | |
c4a3e0a5 BS |
2550 | /* |
2551 | * First wait for all commands to complete | |
2552 | */ | |
da0dc9fb | 2553 | return megasas_generic_reset(scmd); |
c4a3e0a5 BS |
2554 | } |
2555 | ||
2556 | /** | |
2557 | * megasas_reset_bus_host - Bus & host reset handler entry point | |
2558 | */ | |
2559 | static int megasas_reset_bus_host(struct scsi_cmnd *scmd) | |
2560 | { | |
2561 | int ret; | |
9c915a8c | 2562 | struct megasas_instance *instance; |
da0dc9fb | 2563 | |
9c915a8c | 2564 | instance = (struct megasas_instance *)scmd->device->host->hostdata; |
c4a3e0a5 BS |
2565 | |
2566 | /* | |
80682fa9 | 2567 | * First wait for all commands to complete |
c4a3e0a5 | 2568 | */ |
36807e67 | 2569 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) || |
229fe47c | 2570 | (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) || |
21d3c710 SS |
2571 | (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || |
2572 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) | |
229fe47c | 2573 | ret = megasas_reset_fusion(scmd->device->host, 1); |
9c915a8c | 2574 | else |
2575 | ret = megasas_generic_reset(scmd); | |
c4a3e0a5 BS |
2576 | |
2577 | return ret; | |
2578 | } | |
2579 | ||
cf62a0a5 SP |
2580 | /** |
2581 | * megasas_bios_param - Returns disk geometry for a disk | |
da0dc9fb | 2582 | * @sdev: device handle |
cf62a0a5 SP |
2583 | * @bdev: block device |
2584 | * @capacity: drive capacity | |
2585 | * @geom: geometry parameters | |
2586 | */ | |
2587 | static int | |
2588 | megasas_bios_param(struct scsi_device *sdev, struct block_device *bdev, | |
2589 | sector_t capacity, int geom[]) | |
2590 | { | |
2591 | int heads; | |
2592 | int sectors; | |
2593 | sector_t cylinders; | |
2594 | unsigned long tmp; | |
da0dc9fb | 2595 | |
cf62a0a5 SP |
2596 | /* Default heads (64) & sectors (32) */ |
2597 | heads = 64; | |
2598 | sectors = 32; | |
2599 | ||
2600 | tmp = heads * sectors; | |
2601 | cylinders = capacity; | |
2602 | ||
2603 | sector_div(cylinders, tmp); | |
2604 | ||
2605 | /* | |
2606 | * Handle extended translation size for logical drives > 1Gb | |
2607 | */ | |
2608 | ||
2609 | if (capacity >= 0x200000) { | |
2610 | heads = 255; | |
2611 | sectors = 63; | |
2612 | tmp = heads*sectors; | |
2613 | cylinders = capacity; | |
2614 | sector_div(cylinders, tmp); | |
2615 | } | |
2616 | ||
2617 | geom[0] = heads; | |
2618 | geom[1] = sectors; | |
2619 | geom[2] = cylinders; | |
2620 | ||
2621 | return 0; | |
2622 | } | |
2623 | ||
7e8a75f4 YB |
2624 | static void megasas_aen_polling(struct work_struct *work); |
2625 | ||
c4a3e0a5 BS |
2626 | /** |
2627 | * megasas_service_aen - Processes an event notification | |
2628 | * @instance: Adapter soft state | |
2629 | * @cmd: AEN command completed by the ISR | |
2630 | * | |
2631 | * For AEN, driver sends a command down to FW that is held by the FW till an | |
2632 | * event occurs. When an event of interest occurs, FW completes the command | |
2633 | * that it was previously holding. | |
2634 | * | |
2635 | * This routines sends SIGIO signal to processes that have registered with the | |
2636 | * driver for AEN. | |
2637 | */ | |
2638 | static void | |
2639 | megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd) | |
2640 | { | |
c3518837 | 2641 | unsigned long flags; |
da0dc9fb | 2642 | |
c4a3e0a5 BS |
2643 | /* |
2644 | * Don't signal app if it is just an aborted previously registered aen | |
2645 | */ | |
c3518837 YB |
2646 | if ((!cmd->abort_aen) && (instance->unload == 0)) { |
2647 | spin_lock_irqsave(&poll_aen_lock, flags); | |
2648 | megasas_poll_wait_aen = 1; | |
2649 | spin_unlock_irqrestore(&poll_aen_lock, flags); | |
2650 | wake_up(&megasas_poll_wait); | |
c4a3e0a5 | 2651 | kill_fasync(&megasas_async_queue, SIGIO, POLL_IN); |
c3518837 | 2652 | } |
c4a3e0a5 BS |
2653 | else |
2654 | cmd->abort_aen = 0; | |
2655 | ||
2656 | instance->aen_cmd = NULL; | |
90dc9d98 | 2657 | |
4026e9aa | 2658 | megasas_return_cmd(instance, cmd); |
7e8a75f4 | 2659 | |
39a98554 | 2660 | if ((instance->unload == 0) && |
2661 | ((instance->issuepend_done == 1))) { | |
7e8a75f4 | 2662 | struct megasas_aen_event *ev; |
da0dc9fb | 2663 | |
7e8a75f4 YB |
2664 | ev = kzalloc(sizeof(*ev), GFP_ATOMIC); |
2665 | if (!ev) { | |
1be18254 | 2666 | dev_err(&instance->pdev->dev, "megasas_service_aen: out of memory\n"); |
7e8a75f4 YB |
2667 | } else { |
2668 | ev->instance = instance; | |
2669 | instance->ev = ev; | |
c1d390d8 XF |
2670 | INIT_DELAYED_WORK(&ev->hotplug_work, |
2671 | megasas_aen_polling); | |
2672 | schedule_delayed_work(&ev->hotplug_work, 0); | |
7e8a75f4 YB |
2673 | } |
2674 | } | |
c4a3e0a5 BS |
2675 | } |
2676 | ||
fc62b3fc SS |
2677 | static ssize_t |
2678 | megasas_fw_crash_buffer_store(struct device *cdev, | |
2679 | struct device_attribute *attr, const char *buf, size_t count) | |
2680 | { | |
2681 | struct Scsi_Host *shost = class_to_shost(cdev); | |
2682 | struct megasas_instance *instance = | |
2683 | (struct megasas_instance *) shost->hostdata; | |
2684 | int val = 0; | |
2685 | unsigned long flags; | |
2686 | ||
2687 | if (kstrtoint(buf, 0, &val) != 0) | |
2688 | return -EINVAL; | |
2689 | ||
2690 | spin_lock_irqsave(&instance->crashdump_lock, flags); | |
2691 | instance->fw_crash_buffer_offset = val; | |
2692 | spin_unlock_irqrestore(&instance->crashdump_lock, flags); | |
2693 | return strlen(buf); | |
2694 | } | |
2695 | ||
2696 | static ssize_t | |
2697 | megasas_fw_crash_buffer_show(struct device *cdev, | |
2698 | struct device_attribute *attr, char *buf) | |
2699 | { | |
2700 | struct Scsi_Host *shost = class_to_shost(cdev); | |
2701 | struct megasas_instance *instance = | |
2702 | (struct megasas_instance *) shost->hostdata; | |
2703 | u32 size; | |
2704 | unsigned long buff_addr; | |
2705 | unsigned long dmachunk = CRASH_DMA_BUF_SIZE; | |
2706 | unsigned long src_addr; | |
2707 | unsigned long flags; | |
2708 | u32 buff_offset; | |
2709 | ||
2710 | spin_lock_irqsave(&instance->crashdump_lock, flags); | |
2711 | buff_offset = instance->fw_crash_buffer_offset; | |
2712 | if (!instance->crash_dump_buf && | |
2713 | !((instance->fw_crash_state == AVAILABLE) || | |
2714 | (instance->fw_crash_state == COPYING))) { | |
2715 | dev_err(&instance->pdev->dev, | |
2716 | "Firmware crash dump is not available\n"); | |
2717 | spin_unlock_irqrestore(&instance->crashdump_lock, flags); | |
2718 | return -EINVAL; | |
2719 | } | |
2720 | ||
2721 | buff_addr = (unsigned long) buf; | |
2722 | ||
da0dc9fb | 2723 | if (buff_offset > (instance->fw_crash_buffer_size * dmachunk)) { |
fc62b3fc SS |
2724 | dev_err(&instance->pdev->dev, |
2725 | "Firmware crash dump offset is out of range\n"); | |
2726 | spin_unlock_irqrestore(&instance->crashdump_lock, flags); | |
2727 | return 0; | |
2728 | } | |
2729 | ||
2730 | size = (instance->fw_crash_buffer_size * dmachunk) - buff_offset; | |
2731 | size = (size >= PAGE_SIZE) ? (PAGE_SIZE - 1) : size; | |
2732 | ||
2733 | src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] + | |
2734 | (buff_offset % dmachunk); | |
da0dc9fb | 2735 | memcpy(buf, (void *)src_addr, size); |
fc62b3fc SS |
2736 | spin_unlock_irqrestore(&instance->crashdump_lock, flags); |
2737 | ||
2738 | return size; | |
2739 | } | |
2740 | ||
2741 | static ssize_t | |
2742 | megasas_fw_crash_buffer_size_show(struct device *cdev, | |
2743 | struct device_attribute *attr, char *buf) | |
2744 | { | |
2745 | struct Scsi_Host *shost = class_to_shost(cdev); | |
2746 | struct megasas_instance *instance = | |
2747 | (struct megasas_instance *) shost->hostdata; | |
2748 | ||
2749 | return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long) | |
2750 | ((instance->fw_crash_buffer_size) * 1024 * 1024)/PAGE_SIZE); | |
2751 | } | |
2752 | ||
2753 | static ssize_t | |
2754 | megasas_fw_crash_state_store(struct device *cdev, | |
2755 | struct device_attribute *attr, const char *buf, size_t count) | |
2756 | { | |
2757 | struct Scsi_Host *shost = class_to_shost(cdev); | |
2758 | struct megasas_instance *instance = | |
2759 | (struct megasas_instance *) shost->hostdata; | |
2760 | int val = 0; | |
2761 | unsigned long flags; | |
2762 | ||
2763 | if (kstrtoint(buf, 0, &val) != 0) | |
2764 | return -EINVAL; | |
2765 | ||
2766 | if ((val <= AVAILABLE || val > COPY_ERROR)) { | |
2767 | dev_err(&instance->pdev->dev, "application updates invalid " | |
2768 | "firmware crash state\n"); | |
2769 | return -EINVAL; | |
2770 | } | |
2771 | ||
2772 | instance->fw_crash_state = val; | |
2773 | ||
2774 | if ((val == COPIED) || (val == COPY_ERROR)) { | |
2775 | spin_lock_irqsave(&instance->crashdump_lock, flags); | |
2776 | megasas_free_host_crash_buffer(instance); | |
2777 | spin_unlock_irqrestore(&instance->crashdump_lock, flags); | |
2778 | if (val == COPY_ERROR) | |
2779 | dev_info(&instance->pdev->dev, "application failed to " | |
2780 | "copy Firmware crash dump\n"); | |
2781 | else | |
2782 | dev_info(&instance->pdev->dev, "Firmware crash dump " | |
2783 | "copied successfully\n"); | |
2784 | } | |
2785 | return strlen(buf); | |
2786 | } | |
2787 | ||
2788 | static ssize_t | |
2789 | megasas_fw_crash_state_show(struct device *cdev, | |
2790 | struct device_attribute *attr, char *buf) | |
2791 | { | |
2792 | struct Scsi_Host *shost = class_to_shost(cdev); | |
2793 | struct megasas_instance *instance = | |
2794 | (struct megasas_instance *) shost->hostdata; | |
da0dc9fb | 2795 | |
fc62b3fc SS |
2796 | return snprintf(buf, PAGE_SIZE, "%d\n", instance->fw_crash_state); |
2797 | } | |
2798 | ||
2799 | static ssize_t | |
2800 | megasas_page_size_show(struct device *cdev, | |
2801 | struct device_attribute *attr, char *buf) | |
2802 | { | |
2803 | return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)PAGE_SIZE - 1); | |
2804 | } | |
2805 | ||
2806 | static DEVICE_ATTR(fw_crash_buffer, S_IRUGO | S_IWUSR, | |
2807 | megasas_fw_crash_buffer_show, megasas_fw_crash_buffer_store); | |
2808 | static DEVICE_ATTR(fw_crash_buffer_size, S_IRUGO, | |
2809 | megasas_fw_crash_buffer_size_show, NULL); | |
2810 | static DEVICE_ATTR(fw_crash_state, S_IRUGO | S_IWUSR, | |
2811 | megasas_fw_crash_state_show, megasas_fw_crash_state_store); | |
2812 | static DEVICE_ATTR(page_size, S_IRUGO, | |
2813 | megasas_page_size_show, NULL); | |
2814 | ||
2815 | struct device_attribute *megaraid_host_attrs[] = { | |
2816 | &dev_attr_fw_crash_buffer_size, | |
2817 | &dev_attr_fw_crash_buffer, | |
2818 | &dev_attr_fw_crash_state, | |
2819 | &dev_attr_page_size, | |
2820 | NULL, | |
2821 | }; | |
2822 | ||
c4a3e0a5 BS |
2823 | /* |
2824 | * Scsi host template for megaraid_sas driver | |
2825 | */ | |
2826 | static struct scsi_host_template megasas_template = { | |
2827 | ||
2828 | .module = THIS_MODULE, | |
43cd7fe4 | 2829 | .name = "Avago SAS based MegaRAID driver", |
c4a3e0a5 | 2830 | .proc_name = "megaraid_sas", |
147aab6a | 2831 | .slave_configure = megasas_slave_configure, |
044833b5 | 2832 | .slave_alloc = megasas_slave_alloc, |
c4a3e0a5 BS |
2833 | .queuecommand = megasas_queue_command, |
2834 | .eh_device_reset_handler = megasas_reset_device, | |
2835 | .eh_bus_reset_handler = megasas_reset_bus_host, | |
2836 | .eh_host_reset_handler = megasas_reset_bus_host, | |
05e9ebbe | 2837 | .eh_timed_out = megasas_reset_timer, |
fc62b3fc | 2838 | .shost_attrs = megaraid_host_attrs, |
cf62a0a5 | 2839 | .bios_param = megasas_bios_param, |
c4a3e0a5 | 2840 | .use_clustering = ENABLE_CLUSTERING, |
db5ed4df | 2841 | .change_queue_depth = scsi_change_queue_depth, |
54b2b50c | 2842 | .no_write_same = 1, |
c4a3e0a5 BS |
2843 | }; |
2844 | ||
2845 | /** | |
2846 | * megasas_complete_int_cmd - Completes an internal command | |
2847 | * @instance: Adapter soft state | |
2848 | * @cmd: Command to be completed | |
2849 | * | |
2850 | * The megasas_issue_blocked_cmd() function waits for a command to complete | |
2851 | * after it issues a command. This function wakes up that waiting routine by | |
2852 | * calling wake_up() on the wait queue. | |
2853 | */ | |
2854 | static void | |
2855 | megasas_complete_int_cmd(struct megasas_instance *instance, | |
2856 | struct megasas_cmd *cmd) | |
2857 | { | |
2be2a988 | 2858 | cmd->cmd_status_drv = cmd->frame->io.cmd_status; |
c4a3e0a5 BS |
2859 | wake_up(&instance->int_cmd_wait_q); |
2860 | } | |
2861 | ||
2862 | /** | |
2863 | * megasas_complete_abort - Completes aborting a command | |
2864 | * @instance: Adapter soft state | |
2865 | * @cmd: Cmd that was issued to abort another cmd | |
2866 | * | |
0d49016b | 2867 | * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q |
2868 | * after it issues an abort on a previously issued command. This function | |
c4a3e0a5 BS |
2869 | * wakes up all functions waiting on the same wait queue. |
2870 | */ | |
2871 | static void | |
2872 | megasas_complete_abort(struct megasas_instance *instance, | |
2873 | struct megasas_cmd *cmd) | |
2874 | { | |
2875 | if (cmd->sync_cmd) { | |
2876 | cmd->sync_cmd = 0; | |
2be2a988 | 2877 | cmd->cmd_status_drv = 0; |
c4a3e0a5 BS |
2878 | wake_up(&instance->abort_cmd_wait_q); |
2879 | } | |
c4a3e0a5 BS |
2880 | } |
2881 | ||
c4a3e0a5 BS |
2882 | /** |
2883 | * megasas_complete_cmd - Completes a command | |
2884 | * @instance: Adapter soft state | |
2885 | * @cmd: Command to be completed | |
0d49016b | 2886 | * @alt_status: If non-zero, use this value as status to |
da0dc9fb BH |
2887 | * SCSI mid-layer instead of the value returned |
2888 | * by the FW. This should be used if caller wants | |
2889 | * an alternate status (as in the case of aborted | |
2890 | * commands) | |
c4a3e0a5 | 2891 | */ |
9c915a8c | 2892 | void |
c4a3e0a5 BS |
2893 | megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd, |
2894 | u8 alt_status) | |
2895 | { | |
2896 | int exception = 0; | |
2897 | struct megasas_header *hdr = &cmd->frame->hdr; | |
c3518837 | 2898 | unsigned long flags; |
9c915a8c | 2899 | struct fusion_context *fusion = instance->ctrl_context; |
3761cb4c | 2900 | u32 opcode, status; |
c4a3e0a5 | 2901 | |
39a98554 | 2902 | /* flag for the retry reset */ |
2903 | cmd->retry_for_fw_reset = 0; | |
2904 | ||
05e9ebbe SP |
2905 | if (cmd->scmd) |
2906 | cmd->scmd->SCp.ptr = NULL; | |
c4a3e0a5 BS |
2907 | |
2908 | switch (hdr->cmd) { | |
e5f93a36 | 2909 | case MFI_CMD_INVALID: |
2910 | /* Some older 1068 controller FW may keep a pended | |
2911 | MR_DCMD_CTRL_EVENT_GET_INFO left over from the main kernel | |
2912 | when booting the kdump kernel. Ignore this command to | |
2913 | prevent a kernel panic on shutdown of the kdump kernel. */ | |
1be18254 BH |
2914 | dev_warn(&instance->pdev->dev, "MFI_CMD_INVALID command " |
2915 | "completed\n"); | |
2916 | dev_warn(&instance->pdev->dev, "If you have a controller " | |
2917 | "other than PERC5, please upgrade your firmware\n"); | |
e5f93a36 | 2918 | break; |
c4a3e0a5 BS |
2919 | case MFI_CMD_PD_SCSI_IO: |
2920 | case MFI_CMD_LD_SCSI_IO: | |
2921 | ||
2922 | /* | |
2923 | * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been | |
2924 | * issued either through an IO path or an IOCTL path. If it | |
2925 | * was via IOCTL, we will send it to internal completion. | |
2926 | */ | |
2927 | if (cmd->sync_cmd) { | |
2928 | cmd->sync_cmd = 0; | |
2929 | megasas_complete_int_cmd(instance, cmd); | |
2930 | break; | |
2931 | } | |
2932 | ||
c4a3e0a5 BS |
2933 | case MFI_CMD_LD_READ: |
2934 | case MFI_CMD_LD_WRITE: | |
2935 | ||
2936 | if (alt_status) { | |
2937 | cmd->scmd->result = alt_status << 16; | |
2938 | exception = 1; | |
2939 | } | |
2940 | ||
2941 | if (exception) { | |
2942 | ||
e4a082c7 | 2943 | atomic_dec(&instance->fw_outstanding); |
c4a3e0a5 | 2944 | |
155d98f0 | 2945 | scsi_dma_unmap(cmd->scmd); |
c4a3e0a5 BS |
2946 | cmd->scmd->scsi_done(cmd->scmd); |
2947 | megasas_return_cmd(instance, cmd); | |
2948 | ||
2949 | break; | |
2950 | } | |
2951 | ||
2952 | switch (hdr->cmd_status) { | |
2953 | ||
2954 | case MFI_STAT_OK: | |
2955 | cmd->scmd->result = DID_OK << 16; | |
2956 | break; | |
2957 | ||
2958 | case MFI_STAT_SCSI_IO_FAILED: | |
2959 | case MFI_STAT_LD_INIT_IN_PROGRESS: | |
2960 | cmd->scmd->result = | |
2961 | (DID_ERROR << 16) | hdr->scsi_status; | |
2962 | break; | |
2963 | ||
2964 | case MFI_STAT_SCSI_DONE_WITH_ERROR: | |
2965 | ||
2966 | cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status; | |
2967 | ||
2968 | if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) { | |
2969 | memset(cmd->scmd->sense_buffer, 0, | |
2970 | SCSI_SENSE_BUFFERSIZE); | |
2971 | memcpy(cmd->scmd->sense_buffer, cmd->sense, | |
2972 | hdr->sense_len); | |
2973 | ||
2974 | cmd->scmd->result |= DRIVER_SENSE << 24; | |
2975 | } | |
2976 | ||
2977 | break; | |
2978 | ||
2979 | case MFI_STAT_LD_OFFLINE: | |
2980 | case MFI_STAT_DEVICE_NOT_FOUND: | |
2981 | cmd->scmd->result = DID_BAD_TARGET << 16; | |
2982 | break; | |
2983 | ||
2984 | default: | |
1be18254 | 2985 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "MFI FW status %#x\n", |
c4a3e0a5 BS |
2986 | hdr->cmd_status); |
2987 | cmd->scmd->result = DID_ERROR << 16; | |
2988 | break; | |
2989 | } | |
2990 | ||
e4a082c7 | 2991 | atomic_dec(&instance->fw_outstanding); |
c4a3e0a5 | 2992 | |
155d98f0 | 2993 | scsi_dma_unmap(cmd->scmd); |
c4a3e0a5 BS |
2994 | cmd->scmd->scsi_done(cmd->scmd); |
2995 | megasas_return_cmd(instance, cmd); | |
2996 | ||
2997 | break; | |
2998 | ||
2999 | case MFI_CMD_SMP: | |
3000 | case MFI_CMD_STP: | |
3001 | case MFI_CMD_DCMD: | |
94cd65dd | 3002 | opcode = le32_to_cpu(cmd->frame->dcmd.opcode); |
9c915a8c | 3003 | /* Check for LD map update */ |
94cd65dd SS |
3004 | if ((opcode == MR_DCMD_LD_MAP_GET_INFO) |
3005 | && (cmd->frame->dcmd.mbox.b[1] == 1)) { | |
bc93d425 | 3006 | fusion->fast_path_io = 0; |
9c915a8c | 3007 | spin_lock_irqsave(instance->host->host_lock, flags); |
3761cb4c | 3008 | instance->map_update_cmd = NULL; |
9c915a8c | 3009 | if (cmd->frame->hdr.cmd_status != 0) { |
3010 | if (cmd->frame->hdr.cmd_status != | |
3011 | MFI_STAT_NOT_FOUND) | |
1be18254 | 3012 | dev_warn(&instance->pdev->dev, "map syncfailed, status = 0x%x\n", |
9c915a8c | 3013 | cmd->frame->hdr.cmd_status); |
3014 | else { | |
4026e9aa | 3015 | megasas_return_cmd(instance, cmd); |
9c915a8c | 3016 | spin_unlock_irqrestore( |
3017 | instance->host->host_lock, | |
3018 | flags); | |
3019 | break; | |
3020 | } | |
3021 | } else | |
3022 | instance->map_id++; | |
4026e9aa | 3023 | megasas_return_cmd(instance, cmd); |
bc93d425 SS |
3024 | |
3025 | /* | |
3026 | * Set fast path IO to ZERO. | |
3027 | * Validate Map will set proper value. | |
3028 | * Meanwhile all IOs will go as LD IO. | |
3029 | */ | |
3030 | if (MR_ValidateMapInfo(instance)) | |
9c915a8c | 3031 | fusion->fast_path_io = 1; |
3032 | else | |
3033 | fusion->fast_path_io = 0; | |
3034 | megasas_sync_map_info(instance); | |
3035 | spin_unlock_irqrestore(instance->host->host_lock, | |
3036 | flags); | |
3037 | break; | |
3038 | } | |
94cd65dd SS |
3039 | if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO || |
3040 | opcode == MR_DCMD_CTRL_EVENT_GET) { | |
c3518837 YB |
3041 | spin_lock_irqsave(&poll_aen_lock, flags); |
3042 | megasas_poll_wait_aen = 0; | |
3043 | spin_unlock_irqrestore(&poll_aen_lock, flags); | |
3044 | } | |
c4a3e0a5 | 3045 | |
3761cb4c | 3046 | /* FW has an updated PD sequence */ |
3047 | if ((opcode == MR_DCMD_SYSTEM_PD_MAP_GET_INFO) && | |
3048 | (cmd->frame->dcmd.mbox.b[0] == 1)) { | |
3049 | ||
3050 | spin_lock_irqsave(instance->host->host_lock, flags); | |
3051 | status = cmd->frame->hdr.cmd_status; | |
3052 | instance->jbod_seq_cmd = NULL; | |
3053 | megasas_return_cmd(instance, cmd); | |
3054 | ||
3055 | if (status == MFI_STAT_OK) { | |
3056 | instance->pd_seq_map_id++; | |
3057 | /* Re-register a pd sync seq num cmd */ | |
3058 | if (megasas_sync_pd_seq_num(instance, true)) | |
3059 | instance->use_seqnum_jbod_fp = false; | |
3060 | } else | |
3061 | instance->use_seqnum_jbod_fp = false; | |
3062 | ||
3063 | spin_unlock_irqrestore(instance->host->host_lock, flags); | |
3064 | break; | |
3065 | } | |
3066 | ||
c4a3e0a5 BS |
3067 | /* |
3068 | * See if got an event notification | |
3069 | */ | |
94cd65dd | 3070 | if (opcode == MR_DCMD_CTRL_EVENT_WAIT) |
c4a3e0a5 BS |
3071 | megasas_service_aen(instance, cmd); |
3072 | else | |
3073 | megasas_complete_int_cmd(instance, cmd); | |
3074 | ||
3075 | break; | |
3076 | ||
3077 | case MFI_CMD_ABORT: | |
3078 | /* | |
3079 | * Cmd issued to abort another cmd returned | |
3080 | */ | |
3081 | megasas_complete_abort(instance, cmd); | |
3082 | break; | |
3083 | ||
3084 | default: | |
1be18254 | 3085 | dev_info(&instance->pdev->dev, "Unknown command completed! [0x%X]\n", |
c4a3e0a5 BS |
3086 | hdr->cmd); |
3087 | break; | |
3088 | } | |
3089 | } | |
3090 | ||
39a98554 | 3091 | /** |
3092 | * megasas_issue_pending_cmds_again - issue all pending cmds | |
da0dc9fb | 3093 | * in FW again because of the fw reset |
39a98554 | 3094 | * @instance: Adapter soft state |
3095 | */ | |
3096 | static inline void | |
3097 | megasas_issue_pending_cmds_again(struct megasas_instance *instance) | |
3098 | { | |
3099 | struct megasas_cmd *cmd; | |
3100 | struct list_head clist_local; | |
3101 | union megasas_evt_class_locale class_locale; | |
3102 | unsigned long flags; | |
3103 | u32 seq_num; | |
3104 | ||
3105 | INIT_LIST_HEAD(&clist_local); | |
3106 | spin_lock_irqsave(&instance->hba_lock, flags); | |
3107 | list_splice_init(&instance->internal_reset_pending_q, &clist_local); | |
3108 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
3109 | ||
3110 | while (!list_empty(&clist_local)) { | |
da0dc9fb | 3111 | cmd = list_entry((&clist_local)->next, |
39a98554 | 3112 | struct megasas_cmd, list); |
3113 | list_del_init(&cmd->list); | |
3114 | ||
3115 | if (cmd->sync_cmd || cmd->scmd) { | |
1be18254 BH |
3116 | dev_notice(&instance->pdev->dev, "command %p, %p:%d" |
3117 | "detected to be pending while HBA reset\n", | |
39a98554 | 3118 | cmd, cmd->scmd, cmd->sync_cmd); |
3119 | ||
3120 | cmd->retry_for_fw_reset++; | |
3121 | ||
3122 | if (cmd->retry_for_fw_reset == 3) { | |
1be18254 | 3123 | dev_notice(&instance->pdev->dev, "cmd %p, %p:%d" |
39a98554 | 3124 | "was tried multiple times during reset." |
3125 | "Shutting down the HBA\n", | |
3126 | cmd, cmd->scmd, cmd->sync_cmd); | |
c8dd61ef SS |
3127 | instance->instancet->disable_intr(instance); |
3128 | atomic_set(&instance->fw_reset_no_pci_access, 1); | |
39a98554 | 3129 | megaraid_sas_kill_hba(instance); |
39a98554 | 3130 | return; |
3131 | } | |
3132 | } | |
3133 | ||
3134 | if (cmd->sync_cmd == 1) { | |
3135 | if (cmd->scmd) { | |
1be18254 | 3136 | dev_notice(&instance->pdev->dev, "unexpected" |
39a98554 | 3137 | "cmd attached to internal command!\n"); |
3138 | } | |
1be18254 | 3139 | dev_notice(&instance->pdev->dev, "%p synchronous cmd" |
39a98554 | 3140 | "on the internal reset queue," |
3141 | "issue it again.\n", cmd); | |
2be2a988 | 3142 | cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS; |
39a98554 | 3143 | instance->instancet->fire_cmd(instance, |
da0dc9fb | 3144 | cmd->frame_phys_addr, |
39a98554 | 3145 | 0, instance->reg_set); |
3146 | } else if (cmd->scmd) { | |
1be18254 | 3147 | dev_notice(&instance->pdev->dev, "%p scsi cmd [%02x]" |
39a98554 | 3148 | "detected on the internal queue, issue again.\n", |
5cd049a5 | 3149 | cmd, cmd->scmd->cmnd[0]); |
39a98554 | 3150 | |
3151 | atomic_inc(&instance->fw_outstanding); | |
3152 | instance->instancet->fire_cmd(instance, | |
3153 | cmd->frame_phys_addr, | |
3154 | cmd->frame_count-1, instance->reg_set); | |
3155 | } else { | |
1be18254 | 3156 | dev_notice(&instance->pdev->dev, "%p unexpected cmd on the" |
39a98554 | 3157 | "internal reset defer list while re-issue!!\n", |
3158 | cmd); | |
3159 | } | |
3160 | } | |
3161 | ||
3162 | if (instance->aen_cmd) { | |
1be18254 | 3163 | dev_notice(&instance->pdev->dev, "aen_cmd in def process\n"); |
39a98554 | 3164 | megasas_return_cmd(instance, instance->aen_cmd); |
3165 | ||
da0dc9fb | 3166 | instance->aen_cmd = NULL; |
39a98554 | 3167 | } |
3168 | ||
3169 | /* | |
da0dc9fb BH |
3170 | * Initiate AEN (Asynchronous Event Notification) |
3171 | */ | |
39a98554 | 3172 | seq_num = instance->last_seq_num; |
3173 | class_locale.members.reserved = 0; | |
3174 | class_locale.members.locale = MR_EVT_LOCALE_ALL; | |
3175 | class_locale.members.class = MR_EVT_CLASS_DEBUG; | |
3176 | ||
3177 | megasas_register_aen(instance, seq_num, class_locale.word); | |
3178 | } | |
3179 | ||
3180 | /** | |
3181 | * Move the internal reset pending commands to a deferred queue. | |
3182 | * | |
3183 | * We move the commands pending at internal reset time to a | |
3184 | * pending queue. This queue would be flushed after successful | |
3185 | * completion of the internal reset sequence. if the internal reset | |
3186 | * did not complete in time, the kernel reset handler would flush | |
3187 | * these commands. | |
3188 | **/ | |
3189 | static void | |
3190 | megasas_internal_reset_defer_cmds(struct megasas_instance *instance) | |
3191 | { | |
3192 | struct megasas_cmd *cmd; | |
3193 | int i; | |
3194 | u32 max_cmd = instance->max_fw_cmds; | |
3195 | u32 defer_index; | |
3196 | unsigned long flags; | |
3197 | ||
da0dc9fb | 3198 | defer_index = 0; |
90dc9d98 | 3199 | spin_lock_irqsave(&instance->mfi_pool_lock, flags); |
39a98554 | 3200 | for (i = 0; i < max_cmd; i++) { |
3201 | cmd = instance->cmd_list[i]; | |
3202 | if (cmd->sync_cmd == 1 || cmd->scmd) { | |
1be18254 | 3203 | dev_notice(&instance->pdev->dev, "moving cmd[%d]:%p:%d:%p" |
39a98554 | 3204 | "on the defer queue as internal\n", |
3205 | defer_index, cmd, cmd->sync_cmd, cmd->scmd); | |
3206 | ||
3207 | if (!list_empty(&cmd->list)) { | |
1be18254 | 3208 | dev_notice(&instance->pdev->dev, "ERROR while" |
39a98554 | 3209 | " moving this cmd:%p, %d %p, it was" |
3210 | "discovered on some list?\n", | |
3211 | cmd, cmd->sync_cmd, cmd->scmd); | |
3212 | ||
3213 | list_del_init(&cmd->list); | |
3214 | } | |
3215 | defer_index++; | |
3216 | list_add_tail(&cmd->list, | |
3217 | &instance->internal_reset_pending_q); | |
3218 | } | |
3219 | } | |
90dc9d98 | 3220 | spin_unlock_irqrestore(&instance->mfi_pool_lock, flags); |
39a98554 | 3221 | } |
3222 | ||
3223 | ||
3224 | static void | |
3225 | process_fw_state_change_wq(struct work_struct *work) | |
3226 | { | |
3227 | struct megasas_instance *instance = | |
3228 | container_of(work, struct megasas_instance, work_init); | |
3229 | u32 wait; | |
3230 | unsigned long flags; | |
3231 | ||
3232 | if (instance->adprecovery != MEGASAS_ADPRESET_SM_INFAULT) { | |
1be18254 | 3233 | dev_notice(&instance->pdev->dev, "error, recovery st %x\n", |
39a98554 | 3234 | instance->adprecovery); |
3235 | return ; | |
3236 | } | |
3237 | ||
3238 | if (instance->adprecovery == MEGASAS_ADPRESET_SM_INFAULT) { | |
1be18254 | 3239 | dev_notice(&instance->pdev->dev, "FW detected to be in fault" |
39a98554 | 3240 | "state, restarting it...\n"); |
3241 | ||
d46a3ad6 | 3242 | instance->instancet->disable_intr(instance); |
39a98554 | 3243 | atomic_set(&instance->fw_outstanding, 0); |
3244 | ||
3245 | atomic_set(&instance->fw_reset_no_pci_access, 1); | |
3246 | instance->instancet->adp_reset(instance, instance->reg_set); | |
da0dc9fb | 3247 | atomic_set(&instance->fw_reset_no_pci_access, 0); |
39a98554 | 3248 | |
1be18254 | 3249 | dev_notice(&instance->pdev->dev, "FW restarted successfully," |
39a98554 | 3250 | "initiating next stage...\n"); |
3251 | ||
1be18254 | 3252 | dev_notice(&instance->pdev->dev, "HBA recovery state machine," |
39a98554 | 3253 | "state 2 starting...\n"); |
3254 | ||
da0dc9fb | 3255 | /* waiting for about 20 second before start the second init */ |
39a98554 | 3256 | for (wait = 0; wait < 30; wait++) { |
3257 | msleep(1000); | |
3258 | } | |
3259 | ||
058a8fac | 3260 | if (megasas_transition_to_ready(instance, 1)) { |
1be18254 | 3261 | dev_notice(&instance->pdev->dev, "adapter not ready\n"); |
39a98554 | 3262 | |
c8dd61ef | 3263 | atomic_set(&instance->fw_reset_no_pci_access, 1); |
39a98554 | 3264 | megaraid_sas_kill_hba(instance); |
39a98554 | 3265 | return ; |
3266 | } | |
3267 | ||
3268 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) || | |
3269 | (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) || | |
3270 | (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR) | |
3271 | ) { | |
3272 | *instance->consumer = *instance->producer; | |
3273 | } else { | |
3274 | *instance->consumer = 0; | |
3275 | *instance->producer = 0; | |
3276 | } | |
3277 | ||
3278 | megasas_issue_init_mfi(instance); | |
3279 | ||
3280 | spin_lock_irqsave(&instance->hba_lock, flags); | |
3281 | instance->adprecovery = MEGASAS_HBA_OPERATIONAL; | |
3282 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
d46a3ad6 | 3283 | instance->instancet->enable_intr(instance); |
39a98554 | 3284 | |
3285 | megasas_issue_pending_cmds_again(instance); | |
3286 | instance->issuepend_done = 1; | |
3287 | } | |
39a98554 | 3288 | } |
3289 | ||
c4a3e0a5 BS |
3290 | /** |
3291 | * megasas_deplete_reply_queue - Processes all completed commands | |
3292 | * @instance: Adapter soft state | |
3293 | * @alt_status: Alternate status to be returned to | |
da0dc9fb BH |
3294 | * SCSI mid-layer instead of the status |
3295 | * returned by the FW | |
39a98554 | 3296 | * Note: this must be called with hba lock held |
c4a3e0a5 | 3297 | */ |
858119e1 | 3298 | static int |
39a98554 | 3299 | megasas_deplete_reply_queue(struct megasas_instance *instance, |
3300 | u8 alt_status) | |
c4a3e0a5 | 3301 | { |
39a98554 | 3302 | u32 mfiStatus; |
3303 | u32 fw_state; | |
3304 | ||
3305 | if ((mfiStatus = instance->instancet->check_reset(instance, | |
3306 | instance->reg_set)) == 1) { | |
3307 | return IRQ_HANDLED; | |
3308 | } | |
3309 | ||
3310 | if ((mfiStatus = instance->instancet->clear_intr( | |
3311 | instance->reg_set) | |
3312 | ) == 0) { | |
e1419191 | 3313 | /* Hardware may not set outbound_intr_status in MSI-X mode */ |
c8e858fe | 3314 | if (!instance->msix_vectors) |
e1419191 | 3315 | return IRQ_NONE; |
39a98554 | 3316 | } |
3317 | ||
3318 | instance->mfiStatus = mfiStatus; | |
3319 | ||
3320 | if ((mfiStatus & MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE)) { | |
3321 | fw_state = instance->instancet->read_fw_status_reg( | |
3322 | instance->reg_set) & MFI_STATE_MASK; | |
3323 | ||
3324 | if (fw_state != MFI_STATE_FAULT) { | |
1be18254 | 3325 | dev_notice(&instance->pdev->dev, "fw state:%x\n", |
39a98554 | 3326 | fw_state); |
3327 | } | |
3328 | ||
3329 | if ((fw_state == MFI_STATE_FAULT) && | |
3330 | (instance->disableOnlineCtrlReset == 0)) { | |
1be18254 | 3331 | dev_notice(&instance->pdev->dev, "wait adp restart\n"); |
39a98554 | 3332 | |
3333 | if ((instance->pdev->device == | |
3334 | PCI_DEVICE_ID_LSI_SAS1064R) || | |
3335 | (instance->pdev->device == | |
3336 | PCI_DEVICE_ID_DELL_PERC5) || | |
3337 | (instance->pdev->device == | |
3338 | PCI_DEVICE_ID_LSI_VERDE_ZCR)) { | |
3339 | ||
3340 | *instance->consumer = | |
94cd65dd | 3341 | cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN); |
39a98554 | 3342 | } |
3343 | ||
3344 | ||
d46a3ad6 | 3345 | instance->instancet->disable_intr(instance); |
39a98554 | 3346 | instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT; |
3347 | instance->issuepend_done = 0; | |
3348 | ||
3349 | atomic_set(&instance->fw_outstanding, 0); | |
3350 | megasas_internal_reset_defer_cmds(instance); | |
3351 | ||
1be18254 | 3352 | dev_notice(&instance->pdev->dev, "fwState=%x, stage:%d\n", |
39a98554 | 3353 | fw_state, instance->adprecovery); |
3354 | ||
3355 | schedule_work(&instance->work_init); | |
3356 | return IRQ_HANDLED; | |
3357 | ||
3358 | } else { | |
1be18254 | 3359 | dev_notice(&instance->pdev->dev, "fwstate:%x, dis_OCR=%x\n", |
39a98554 | 3360 | fw_state, instance->disableOnlineCtrlReset); |
3361 | } | |
3362 | } | |
c4a3e0a5 | 3363 | |
5d018ad0 | 3364 | tasklet_schedule(&instance->isr_tasklet); |
c4a3e0a5 BS |
3365 | return IRQ_HANDLED; |
3366 | } | |
c4a3e0a5 BS |
3367 | /** |
3368 | * megasas_isr - isr entry point | |
3369 | */ | |
7d12e780 | 3370 | static irqreturn_t megasas_isr(int irq, void *devp) |
c4a3e0a5 | 3371 | { |
c8e858fe | 3372 | struct megasas_irq_context *irq_context = devp; |
3373 | struct megasas_instance *instance = irq_context->instance; | |
39a98554 | 3374 | unsigned long flags; |
da0dc9fb | 3375 | irqreturn_t rc; |
39a98554 | 3376 | |
c8e858fe | 3377 | if (atomic_read(&instance->fw_reset_no_pci_access)) |
39a98554 | 3378 | return IRQ_HANDLED; |
3379 | ||
39a98554 | 3380 | spin_lock_irqsave(&instance->hba_lock, flags); |
da0dc9fb | 3381 | rc = megasas_deplete_reply_queue(instance, DID_OK); |
39a98554 | 3382 | spin_unlock_irqrestore(&instance->hba_lock, flags); |
3383 | ||
3384 | return rc; | |
c4a3e0a5 BS |
3385 | } |
3386 | ||
3387 | /** | |
3388 | * megasas_transition_to_ready - Move the FW to READY state | |
1341c939 | 3389 | * @instance: Adapter soft state |
c4a3e0a5 BS |
3390 | * |
3391 | * During the initialization, FW passes can potentially be in any one of | |
3392 | * several possible states. If the FW in operational, waiting-for-handshake | |
3393 | * states, driver must take steps to bring it to ready state. Otherwise, it | |
3394 | * has to wait for the ready state. | |
3395 | */ | |
9c915a8c | 3396 | int |
058a8fac | 3397 | megasas_transition_to_ready(struct megasas_instance *instance, int ocr) |
c4a3e0a5 BS |
3398 | { |
3399 | int i; | |
3400 | u8 max_wait; | |
3401 | u32 fw_state; | |
3402 | u32 cur_state; | |
7218df69 | 3403 | u32 abs_state, curr_abs_state; |
c4a3e0a5 | 3404 | |
bc6ac5e8 TH |
3405 | abs_state = instance->instancet->read_fw_status_reg(instance->reg_set); |
3406 | fw_state = abs_state & MFI_STATE_MASK; | |
c4a3e0a5 | 3407 | |
e3bbff9f | 3408 | if (fw_state != MFI_STATE_READY) |
1be18254 | 3409 | dev_info(&instance->pdev->dev, "Waiting for FW to come to ready" |
0d49016b | 3410 | " state\n"); |
e3bbff9f | 3411 | |
c4a3e0a5 BS |
3412 | while (fw_state != MFI_STATE_READY) { |
3413 | ||
c4a3e0a5 BS |
3414 | switch (fw_state) { |
3415 | ||
3416 | case MFI_STATE_FAULT: | |
1be18254 | 3417 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW in FAULT state!!\n"); |
058a8fac | 3418 | if (ocr) { |
3419 | max_wait = MEGASAS_RESET_WAIT_TIME; | |
3420 | cur_state = MFI_STATE_FAULT; | |
3421 | break; | |
3422 | } else | |
3423 | return -ENODEV; | |
c4a3e0a5 BS |
3424 | |
3425 | case MFI_STATE_WAIT_HANDSHAKE: | |
3426 | /* | |
3427 | * Set the CLR bit in inbound doorbell | |
3428 | */ | |
0c79e681 | 3429 | if ((instance->pdev->device == |
87911122 YB |
3430 | PCI_DEVICE_ID_LSI_SAS0073SKINNY) || |
3431 | (instance->pdev->device == | |
9c915a8c | 3432 | PCI_DEVICE_ID_LSI_SAS0071SKINNY) || |
3433 | (instance->pdev->device == | |
21d3c710 | 3434 | PCI_DEVICE_ID_LSI_FUSION) || |
36807e67 | 3435 | (instance->pdev->device == |
229fe47c | 3436 | PCI_DEVICE_ID_LSI_PLASMA) || |
3437 | (instance->pdev->device == | |
21d3c710 SS |
3438 | PCI_DEVICE_ID_LSI_INVADER) || |
3439 | (instance->pdev->device == | |
3440 | PCI_DEVICE_ID_LSI_FURY)) { | |
87911122 YB |
3441 | writel( |
3442 | MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG, | |
9c915a8c | 3443 | &instance->reg_set->doorbell); |
87911122 YB |
3444 | } else { |
3445 | writel( | |
3446 | MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG, | |
3447 | &instance->reg_set->inbound_doorbell); | |
3448 | } | |
c4a3e0a5 | 3449 | |
7218df69 | 3450 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
3451 | cur_state = MFI_STATE_WAIT_HANDSHAKE; |
3452 | break; | |
3453 | ||
e3bbff9f | 3454 | case MFI_STATE_BOOT_MESSAGE_PENDING: |
87911122 | 3455 | if ((instance->pdev->device == |
9c915a8c | 3456 | PCI_DEVICE_ID_LSI_SAS0073SKINNY) || |
3457 | (instance->pdev->device == | |
3458 | PCI_DEVICE_ID_LSI_SAS0071SKINNY) || | |
3459 | (instance->pdev->device == | |
36807e67 | 3460 | PCI_DEVICE_ID_LSI_FUSION) || |
229fe47c | 3461 | (instance->pdev->device == |
3462 | PCI_DEVICE_ID_LSI_PLASMA) || | |
36807e67 | 3463 | (instance->pdev->device == |
21d3c710 SS |
3464 | PCI_DEVICE_ID_LSI_INVADER) || |
3465 | (instance->pdev->device == | |
3466 | PCI_DEVICE_ID_LSI_FURY)) { | |
87911122 | 3467 | writel(MFI_INIT_HOTPLUG, |
9c915a8c | 3468 | &instance->reg_set->doorbell); |
87911122 YB |
3469 | } else |
3470 | writel(MFI_INIT_HOTPLUG, | |
3471 | &instance->reg_set->inbound_doorbell); | |
e3bbff9f | 3472 | |
7218df69 | 3473 | max_wait = MEGASAS_RESET_WAIT_TIME; |
e3bbff9f SP |
3474 | cur_state = MFI_STATE_BOOT_MESSAGE_PENDING; |
3475 | break; | |
3476 | ||
c4a3e0a5 BS |
3477 | case MFI_STATE_OPERATIONAL: |
3478 | /* | |
e3bbff9f | 3479 | * Bring it to READY state; assuming max wait 10 secs |
c4a3e0a5 | 3480 | */ |
d46a3ad6 | 3481 | instance->instancet->disable_intr(instance); |
87911122 YB |
3482 | if ((instance->pdev->device == |
3483 | PCI_DEVICE_ID_LSI_SAS0073SKINNY) || | |
3484 | (instance->pdev->device == | |
9c915a8c | 3485 | PCI_DEVICE_ID_LSI_SAS0071SKINNY) || |
3486 | (instance->pdev->device | |
36807e67 | 3487 | == PCI_DEVICE_ID_LSI_FUSION) || |
229fe47c | 3488 | (instance->pdev->device |
3489 | == PCI_DEVICE_ID_LSI_PLASMA) || | |
36807e67 | 3490 | (instance->pdev->device |
21d3c710 SS |
3491 | == PCI_DEVICE_ID_LSI_INVADER) || |
3492 | (instance->pdev->device | |
3493 | == PCI_DEVICE_ID_LSI_FURY)) { | |
87911122 | 3494 | writel(MFI_RESET_FLAGS, |
9c915a8c | 3495 | &instance->reg_set->doorbell); |
36807e67 | 3496 | if ((instance->pdev->device == |
21d3c710 SS |
3497 | PCI_DEVICE_ID_LSI_FUSION) || |
3498 | (instance->pdev->device == | |
229fe47c | 3499 | PCI_DEVICE_ID_LSI_PLASMA) || |
3500 | (instance->pdev->device == | |
21d3c710 SS |
3501 | PCI_DEVICE_ID_LSI_INVADER) || |
3502 | (instance->pdev->device == | |
3503 | PCI_DEVICE_ID_LSI_FURY)) { | |
9c915a8c | 3504 | for (i = 0; i < (10 * 1000); i += 20) { |
3505 | if (readl( | |
3506 | &instance-> | |
3507 | reg_set-> | |
3508 | doorbell) & 1) | |
3509 | msleep(20); | |
3510 | else | |
3511 | break; | |
3512 | } | |
3513 | } | |
87911122 YB |
3514 | } else |
3515 | writel(MFI_RESET_FLAGS, | |
3516 | &instance->reg_set->inbound_doorbell); | |
c4a3e0a5 | 3517 | |
7218df69 | 3518 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
3519 | cur_state = MFI_STATE_OPERATIONAL; |
3520 | break; | |
3521 | ||
3522 | case MFI_STATE_UNDEFINED: | |
3523 | /* | |
3524 | * This state should not last for more than 2 seconds | |
3525 | */ | |
7218df69 | 3526 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
3527 | cur_state = MFI_STATE_UNDEFINED; |
3528 | break; | |
3529 | ||
3530 | case MFI_STATE_BB_INIT: | |
7218df69 | 3531 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
3532 | cur_state = MFI_STATE_BB_INIT; |
3533 | break; | |
3534 | ||
3535 | case MFI_STATE_FW_INIT: | |
7218df69 | 3536 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
3537 | cur_state = MFI_STATE_FW_INIT; |
3538 | break; | |
3539 | ||
3540 | case MFI_STATE_FW_INIT_2: | |
7218df69 | 3541 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
3542 | cur_state = MFI_STATE_FW_INIT_2; |
3543 | break; | |
3544 | ||
3545 | case MFI_STATE_DEVICE_SCAN: | |
7218df69 | 3546 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
3547 | cur_state = MFI_STATE_DEVICE_SCAN; |
3548 | break; | |
3549 | ||
3550 | case MFI_STATE_FLUSH_CACHE: | |
7218df69 | 3551 | max_wait = MEGASAS_RESET_WAIT_TIME; |
c4a3e0a5 BS |
3552 | cur_state = MFI_STATE_FLUSH_CACHE; |
3553 | break; | |
3554 | ||
3555 | default: | |
1be18254 | 3556 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Unknown state 0x%x\n", |
c4a3e0a5 BS |
3557 | fw_state); |
3558 | return -ENODEV; | |
3559 | } | |
3560 | ||
3561 | /* | |
3562 | * The cur_state should not last for more than max_wait secs | |
3563 | */ | |
3564 | for (i = 0; i < (max_wait * 1000); i++) { | |
bc6ac5e8 TH |
3565 | curr_abs_state = instance->instancet-> |
3566 | read_fw_status_reg(instance->reg_set); | |
c4a3e0a5 | 3567 | |
7218df69 | 3568 | if (abs_state == curr_abs_state) { |
c4a3e0a5 BS |
3569 | msleep(1); |
3570 | } else | |
3571 | break; | |
3572 | } | |
3573 | ||
3574 | /* | |
3575 | * Return error if fw_state hasn't changed after max_wait | |
3576 | */ | |
7218df69 | 3577 | if (curr_abs_state == abs_state) { |
1be18254 | 3578 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW state [%d] hasn't changed " |
c4a3e0a5 BS |
3579 | "in %d secs\n", fw_state, max_wait); |
3580 | return -ENODEV; | |
3581 | } | |
bc6ac5e8 TH |
3582 | |
3583 | abs_state = curr_abs_state; | |
3584 | fw_state = curr_abs_state & MFI_STATE_MASK; | |
39a98554 | 3585 | } |
1be18254 | 3586 | dev_info(&instance->pdev->dev, "FW now in Ready state\n"); |
c4a3e0a5 BS |
3587 | |
3588 | return 0; | |
3589 | } | |
3590 | ||
3591 | /** | |
3592 | * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool | |
3593 | * @instance: Adapter soft state | |
3594 | */ | |
3595 | static void megasas_teardown_frame_pool(struct megasas_instance *instance) | |
3596 | { | |
3597 | int i; | |
9c915a8c | 3598 | u32 max_cmd = instance->max_mfi_cmds; |
c4a3e0a5 BS |
3599 | struct megasas_cmd *cmd; |
3600 | ||
3601 | if (!instance->frame_dma_pool) | |
3602 | return; | |
3603 | ||
3604 | /* | |
3605 | * Return all frames to pool | |
3606 | */ | |
3607 | for (i = 0; i < max_cmd; i++) { | |
3608 | ||
3609 | cmd = instance->cmd_list[i]; | |
3610 | ||
3611 | if (cmd->frame) | |
3612 | pci_pool_free(instance->frame_dma_pool, cmd->frame, | |
3613 | cmd->frame_phys_addr); | |
3614 | ||
3615 | if (cmd->sense) | |
e3bbff9f | 3616 | pci_pool_free(instance->sense_dma_pool, cmd->sense, |
c4a3e0a5 BS |
3617 | cmd->sense_phys_addr); |
3618 | } | |
3619 | ||
3620 | /* | |
3621 | * Now destroy the pool itself | |
3622 | */ | |
3623 | pci_pool_destroy(instance->frame_dma_pool); | |
3624 | pci_pool_destroy(instance->sense_dma_pool); | |
3625 | ||
3626 | instance->frame_dma_pool = NULL; | |
3627 | instance->sense_dma_pool = NULL; | |
3628 | } | |
3629 | ||
3630 | /** | |
3631 | * megasas_create_frame_pool - Creates DMA pool for cmd frames | |
3632 | * @instance: Adapter soft state | |
3633 | * | |
3634 | * Each command packet has an embedded DMA memory buffer that is used for | |
3635 | * filling MFI frame and the SG list that immediately follows the frame. This | |
3636 | * function creates those DMA memory buffers for each command packet by using | |
3637 | * PCI pool facility. | |
3638 | */ | |
3639 | static int megasas_create_frame_pool(struct megasas_instance *instance) | |
3640 | { | |
3641 | int i; | |
3642 | u32 max_cmd; | |
3643 | u32 sge_sz; | |
c4a3e0a5 BS |
3644 | u32 total_sz; |
3645 | u32 frame_count; | |
3646 | struct megasas_cmd *cmd; | |
3647 | ||
9c915a8c | 3648 | max_cmd = instance->max_mfi_cmds; |
c4a3e0a5 BS |
3649 | |
3650 | /* | |
3651 | * Size of our frame is 64 bytes for MFI frame, followed by max SG | |
3652 | * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer | |
3653 | */ | |
3654 | sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) : | |
3655 | sizeof(struct megasas_sge32); | |
3656 | ||
da0dc9fb | 3657 | if (instance->flag_ieee) |
f4c9a131 | 3658 | sge_sz = sizeof(struct megasas_sge_skinny); |
f4c9a131 | 3659 | |
c4a3e0a5 | 3660 | /* |
200aed58 SS |
3661 | * For MFI controllers. |
3662 | * max_num_sge = 60 | |
3663 | * max_sge_sz = 16 byte (sizeof megasas_sge_skinny) | |
3664 | * Total 960 byte (15 MFI frame of 64 byte) | |
3665 | * | |
3666 | * Fusion adapter require only 3 extra frame. | |
3667 | * max_num_sge = 16 (defined as MAX_IOCTL_SGE) | |
3668 | * max_sge_sz = 12 byte (sizeof megasas_sge64) | |
3669 | * Total 192 byte (3 MFI frame of 64 byte) | |
c4a3e0a5 | 3670 | */ |
200aed58 | 3671 | frame_count = instance->ctrl_context ? (3 + 1) : (15 + 1); |
c4a3e0a5 BS |
3672 | total_sz = MEGAMFI_FRAME_SIZE * frame_count; |
3673 | /* | |
3674 | * Use DMA pool facility provided by PCI layer | |
3675 | */ | |
3676 | instance->frame_dma_pool = pci_pool_create("megasas frame pool", | |
200aed58 | 3677 | instance->pdev, total_sz, 256, 0); |
c4a3e0a5 BS |
3678 | |
3679 | if (!instance->frame_dma_pool) { | |
1be18254 | 3680 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup frame pool\n"); |
c4a3e0a5 BS |
3681 | return -ENOMEM; |
3682 | } | |
3683 | ||
3684 | instance->sense_dma_pool = pci_pool_create("megasas sense pool", | |
3685 | instance->pdev, 128, 4, 0); | |
3686 | ||
3687 | if (!instance->sense_dma_pool) { | |
1be18254 | 3688 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup sense pool\n"); |
c4a3e0a5 BS |
3689 | |
3690 | pci_pool_destroy(instance->frame_dma_pool); | |
3691 | instance->frame_dma_pool = NULL; | |
3692 | ||
3693 | return -ENOMEM; | |
3694 | } | |
3695 | ||
3696 | /* | |
3697 | * Allocate and attach a frame to each of the commands in cmd_list. | |
3698 | * By making cmd->index as the context instead of the &cmd, we can | |
3699 | * always use 32bit context regardless of the architecture | |
3700 | */ | |
3701 | for (i = 0; i < max_cmd; i++) { | |
3702 | ||
3703 | cmd = instance->cmd_list[i]; | |
3704 | ||
3705 | cmd->frame = pci_pool_alloc(instance->frame_dma_pool, | |
3706 | GFP_KERNEL, &cmd->frame_phys_addr); | |
3707 | ||
3708 | cmd->sense = pci_pool_alloc(instance->sense_dma_pool, | |
3709 | GFP_KERNEL, &cmd->sense_phys_addr); | |
3710 | ||
3711 | /* | |
3712 | * megasas_teardown_frame_pool() takes care of freeing | |
3713 | * whatever has been allocated | |
3714 | */ | |
3715 | if (!cmd->frame || !cmd->sense) { | |
1be18254 | 3716 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "pci_pool_alloc failed\n"); |
c4a3e0a5 BS |
3717 | megasas_teardown_frame_pool(instance); |
3718 | return -ENOMEM; | |
3719 | } | |
3720 | ||
707e09bd | 3721 | memset(cmd->frame, 0, total_sz); |
94cd65dd | 3722 | cmd->frame->io.context = cpu_to_le32(cmd->index); |
7e8a75f4 | 3723 | cmd->frame->io.pad_0 = 0; |
e5f93a36 | 3724 | if ((instance->pdev->device != PCI_DEVICE_ID_LSI_FUSION) && |
229fe47c | 3725 | (instance->pdev->device != PCI_DEVICE_ID_LSI_PLASMA) && |
e5f93a36 | 3726 | (instance->pdev->device != PCI_DEVICE_ID_LSI_INVADER) && |
21d3c710 | 3727 | (instance->pdev->device != PCI_DEVICE_ID_LSI_FURY) && |
e5f93a36 | 3728 | (reset_devices)) |
3729 | cmd->frame->hdr.cmd = MFI_CMD_INVALID; | |
c4a3e0a5 BS |
3730 | } |
3731 | ||
3732 | return 0; | |
3733 | } | |
3734 | ||
3735 | /** | |
3736 | * megasas_free_cmds - Free all the cmds in the free cmd pool | |
3737 | * @instance: Adapter soft state | |
3738 | */ | |
9c915a8c | 3739 | void megasas_free_cmds(struct megasas_instance *instance) |
c4a3e0a5 BS |
3740 | { |
3741 | int i; | |
da0dc9fb | 3742 | |
c4a3e0a5 BS |
3743 | /* First free the MFI frame pool */ |
3744 | megasas_teardown_frame_pool(instance); | |
3745 | ||
3746 | /* Free all the commands in the cmd_list */ | |
9c915a8c | 3747 | for (i = 0; i < instance->max_mfi_cmds; i++) |
3748 | ||
c4a3e0a5 BS |
3749 | kfree(instance->cmd_list[i]); |
3750 | ||
3751 | /* Free the cmd_list buffer itself */ | |
3752 | kfree(instance->cmd_list); | |
3753 | instance->cmd_list = NULL; | |
3754 | ||
3755 | INIT_LIST_HEAD(&instance->cmd_pool); | |
3756 | } | |
3757 | ||
3758 | /** | |
3759 | * megasas_alloc_cmds - Allocates the command packets | |
3760 | * @instance: Adapter soft state | |
3761 | * | |
3762 | * Each command that is issued to the FW, whether IO commands from the OS or | |
3763 | * internal commands like IOCTLs, are wrapped in local data structure called | |
3764 | * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to | |
3765 | * the FW. | |
3766 | * | |
3767 | * Each frame has a 32-bit field called context (tag). This context is used | |
3768 | * to get back the megasas_cmd from the frame when a frame gets completed in | |
3769 | * the ISR. Typically the address of the megasas_cmd itself would be used as | |
3770 | * the context. But we wanted to keep the differences between 32 and 64 bit | |
3771 | * systems to the mininum. We always use 32 bit integers for the context. In | |
3772 | * this driver, the 32 bit values are the indices into an array cmd_list. | |
3773 | * This array is used only to look up the megasas_cmd given the context. The | |
3774 | * free commands themselves are maintained in a linked list called cmd_pool. | |
3775 | */ | |
9c915a8c | 3776 | int megasas_alloc_cmds(struct megasas_instance *instance) |
c4a3e0a5 BS |
3777 | { |
3778 | int i; | |
3779 | int j; | |
3780 | u32 max_cmd; | |
3781 | struct megasas_cmd *cmd; | |
90dc9d98 | 3782 | struct fusion_context *fusion; |
c4a3e0a5 | 3783 | |
90dc9d98 | 3784 | fusion = instance->ctrl_context; |
9c915a8c | 3785 | max_cmd = instance->max_mfi_cmds; |
c4a3e0a5 BS |
3786 | |
3787 | /* | |
3788 | * instance->cmd_list is an array of struct megasas_cmd pointers. | |
3789 | * Allocate the dynamic array first and then allocate individual | |
3790 | * commands. | |
3791 | */ | |
dd00cc48 | 3792 | instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL); |
c4a3e0a5 BS |
3793 | |
3794 | if (!instance->cmd_list) { | |
1be18254 | 3795 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "out of memory\n"); |
c4a3e0a5 BS |
3796 | return -ENOMEM; |
3797 | } | |
3798 | ||
9c915a8c | 3799 | memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd); |
c4a3e0a5 BS |
3800 | |
3801 | for (i = 0; i < max_cmd; i++) { | |
3802 | instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd), | |
3803 | GFP_KERNEL); | |
3804 | ||
3805 | if (!instance->cmd_list[i]) { | |
3806 | ||
3807 | for (j = 0; j < i; j++) | |
3808 | kfree(instance->cmd_list[j]); | |
3809 | ||
3810 | kfree(instance->cmd_list); | |
3811 | instance->cmd_list = NULL; | |
3812 | ||
3813 | return -ENOMEM; | |
3814 | } | |
3815 | } | |
3816 | ||
c4a3e0a5 BS |
3817 | for (i = 0; i < max_cmd; i++) { |
3818 | cmd = instance->cmd_list[i]; | |
3819 | memset(cmd, 0, sizeof(struct megasas_cmd)); | |
3820 | cmd->index = i; | |
39a98554 | 3821 | cmd->scmd = NULL; |
c4a3e0a5 BS |
3822 | cmd->instance = instance; |
3823 | ||
3824 | list_add_tail(&cmd->list, &instance->cmd_pool); | |
3825 | } | |
3826 | ||
3827 | /* | |
3828 | * Create a frame pool and assign one frame to each cmd | |
3829 | */ | |
3830 | if (megasas_create_frame_pool(instance)) { | |
1be18254 | 3831 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error creating frame DMA pool\n"); |
c4a3e0a5 BS |
3832 | megasas_free_cmds(instance); |
3833 | } | |
3834 | ||
3835 | return 0; | |
3836 | } | |
3837 | ||
81e403ce YB |
3838 | /* |
3839 | * megasas_get_pd_list_info - Returns FW's pd_list structure | |
3840 | * @instance: Adapter soft state | |
3841 | * @pd_list: pd_list structure | |
3842 | * | |
3843 | * Issues an internal command (DCMD) to get the FW's controller PD | |
3844 | * list structure. This information is mainly used to find out SYSTEM | |
3845 | * supported by the FW. | |
3846 | */ | |
3847 | static int | |
3848 | megasas_get_pd_list(struct megasas_instance *instance) | |
3849 | { | |
3850 | int ret = 0, pd_index = 0; | |
3851 | struct megasas_cmd *cmd; | |
3852 | struct megasas_dcmd_frame *dcmd; | |
3853 | struct MR_PD_LIST *ci; | |
3854 | struct MR_PD_ADDRESS *pd_addr; | |
3855 | dma_addr_t ci_h = 0; | |
3856 | ||
3857 | cmd = megasas_get_cmd(instance); | |
3858 | ||
3859 | if (!cmd) { | |
1be18254 | 3860 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "(get_pd_list): Failed to get cmd\n"); |
81e403ce YB |
3861 | return -ENOMEM; |
3862 | } | |
3863 | ||
3864 | dcmd = &cmd->frame->dcmd; | |
3865 | ||
3866 | ci = pci_alloc_consistent(instance->pdev, | |
3867 | MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), &ci_h); | |
3868 | ||
3869 | if (!ci) { | |
1be18254 | 3870 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for pd_list\n"); |
81e403ce YB |
3871 | megasas_return_cmd(instance, cmd); |
3872 | return -ENOMEM; | |
3873 | } | |
3874 | ||
3875 | memset(ci, 0, sizeof(*ci)); | |
3876 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
3877 | ||
3878 | dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST; | |
3879 | dcmd->mbox.b[1] = 0; | |
3880 | dcmd->cmd = MFI_CMD_DCMD; | |
2be2a988 | 3881 | dcmd->cmd_status = MFI_STAT_INVALID_STATUS; |
81e403ce | 3882 | dcmd->sge_count = 1; |
94cd65dd | 3883 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
81e403ce | 3884 | dcmd->timeout = 0; |
780a3762 | 3885 | dcmd->pad_0 = 0; |
94cd65dd SS |
3886 | dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST)); |
3887 | dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY); | |
3888 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); | |
3889 | dcmd->sgl.sge32[0].length = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST)); | |
81e403ce | 3890 | |
90dc9d98 SS |
3891 | if (instance->ctrl_context && !instance->mask_interrupts) |
3892 | ret = megasas_issue_blocked_cmd(instance, cmd, | |
3893 | MEGASAS_BLOCKED_CMD_TIMEOUT); | |
3894 | else | |
3895 | ret = megasas_issue_polled(instance, cmd); | |
81e403ce YB |
3896 | |
3897 | /* | |
da0dc9fb BH |
3898 | * the following function will get the instance PD LIST. |
3899 | */ | |
81e403ce YB |
3900 | |
3901 | pd_addr = ci->addr; | |
3902 | ||
da0dc9fb | 3903 | if (ret == 0 && |
94cd65dd | 3904 | (le32_to_cpu(ci->count) < |
81e403ce YB |
3905 | (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL))) { |
3906 | ||
999ece0a | 3907 | memset(instance->local_pd_list, 0, |
81e403ce YB |
3908 | MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)); |
3909 | ||
94cd65dd | 3910 | for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) { |
81e403ce | 3911 | |
999ece0a | 3912 | instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].tid = |
94cd65dd | 3913 | le16_to_cpu(pd_addr->deviceId); |
999ece0a | 3914 | instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveType = |
81e403ce | 3915 | pd_addr->scsiDevType; |
999ece0a | 3916 | instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveState = |
81e403ce YB |
3917 | MR_PD_STATE_SYSTEM; |
3918 | pd_addr++; | |
3919 | } | |
999ece0a SS |
3920 | memcpy(instance->pd_list, instance->local_pd_list, |
3921 | sizeof(instance->pd_list)); | |
81e403ce YB |
3922 | } |
3923 | ||
3924 | pci_free_consistent(instance->pdev, | |
3925 | MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), | |
3926 | ci, ci_h); | |
90dc9d98 | 3927 | |
4026e9aa | 3928 | megasas_return_cmd(instance, cmd); |
81e403ce YB |
3929 | |
3930 | return ret; | |
3931 | } | |
3932 | ||
bdc6fb8d YB |
3933 | /* |
3934 | * megasas_get_ld_list_info - Returns FW's ld_list structure | |
3935 | * @instance: Adapter soft state | |
3936 | * @ld_list: ld_list structure | |
3937 | * | |
3938 | * Issues an internal command (DCMD) to get the FW's controller PD | |
3939 | * list structure. This information is mainly used to find out SYSTEM | |
3940 | * supported by the FW. | |
3941 | */ | |
3942 | static int | |
3943 | megasas_get_ld_list(struct megasas_instance *instance) | |
3944 | { | |
3945 | int ret = 0, ld_index = 0, ids = 0; | |
3946 | struct megasas_cmd *cmd; | |
3947 | struct megasas_dcmd_frame *dcmd; | |
3948 | struct MR_LD_LIST *ci; | |
3949 | dma_addr_t ci_h = 0; | |
94cd65dd | 3950 | u32 ld_count; |
bdc6fb8d YB |
3951 | |
3952 | cmd = megasas_get_cmd(instance); | |
3953 | ||
3954 | if (!cmd) { | |
1be18254 | 3955 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_list: Failed to get cmd\n"); |
bdc6fb8d YB |
3956 | return -ENOMEM; |
3957 | } | |
3958 | ||
3959 | dcmd = &cmd->frame->dcmd; | |
3960 | ||
3961 | ci = pci_alloc_consistent(instance->pdev, | |
3962 | sizeof(struct MR_LD_LIST), | |
3963 | &ci_h); | |
3964 | ||
3965 | if (!ci) { | |
1be18254 | 3966 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem in get_ld_list\n"); |
bdc6fb8d YB |
3967 | megasas_return_cmd(instance, cmd); |
3968 | return -ENOMEM; | |
3969 | } | |
3970 | ||
3971 | memset(ci, 0, sizeof(*ci)); | |
3972 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
3973 | ||
51087a86 SS |
3974 | if (instance->supportmax256vd) |
3975 | dcmd->mbox.b[0] = 1; | |
bdc6fb8d | 3976 | dcmd->cmd = MFI_CMD_DCMD; |
2be2a988 | 3977 | dcmd->cmd_status = MFI_STAT_INVALID_STATUS; |
bdc6fb8d | 3978 | dcmd->sge_count = 1; |
94cd65dd | 3979 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
bdc6fb8d | 3980 | dcmd->timeout = 0; |
94cd65dd SS |
3981 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST)); |
3982 | dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST); | |
3983 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); | |
3984 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_LIST)); | |
bdc6fb8d YB |
3985 | dcmd->pad_0 = 0; |
3986 | ||
90dc9d98 SS |
3987 | if (instance->ctrl_context && !instance->mask_interrupts) |
3988 | ret = megasas_issue_blocked_cmd(instance, cmd, | |
3989 | MEGASAS_BLOCKED_CMD_TIMEOUT); | |
3990 | else | |
3991 | ret = megasas_issue_polled(instance, cmd); | |
3992 | ||
bdc6fb8d | 3993 | |
94cd65dd SS |
3994 | ld_count = le32_to_cpu(ci->ldCount); |
3995 | ||
bdc6fb8d YB |
3996 | /* the following function will get the instance PD LIST */ |
3997 | ||
51087a86 SS |
3998 | if ((ret == 0) && (ld_count <= instance->fw_supported_vd_count)) { |
3999 | memset(instance->ld_ids, 0xff, MAX_LOGICAL_DRIVES_EXT); | |
bdc6fb8d | 4000 | |
94cd65dd | 4001 | for (ld_index = 0; ld_index < ld_count; ld_index++) { |
bdc6fb8d YB |
4002 | if (ci->ldList[ld_index].state != 0) { |
4003 | ids = ci->ldList[ld_index].ref.targetId; | |
4004 | instance->ld_ids[ids] = | |
4005 | ci->ldList[ld_index].ref.targetId; | |
4006 | } | |
4007 | } | |
4008 | } | |
4009 | ||
4010 | pci_free_consistent(instance->pdev, | |
4011 | sizeof(struct MR_LD_LIST), | |
4012 | ci, | |
4013 | ci_h); | |
4014 | ||
4026e9aa | 4015 | megasas_return_cmd(instance, cmd); |
bdc6fb8d YB |
4016 | return ret; |
4017 | } | |
4018 | ||
21c9e160 | 4019 | /** |
4020 | * megasas_ld_list_query - Returns FW's ld_list structure | |
4021 | * @instance: Adapter soft state | |
4022 | * @ld_list: ld_list structure | |
4023 | * | |
4024 | * Issues an internal command (DCMD) to get the FW's controller PD | |
4025 | * list structure. This information is mainly used to find out SYSTEM | |
4026 | * supported by the FW. | |
4027 | */ | |
4028 | static int | |
4029 | megasas_ld_list_query(struct megasas_instance *instance, u8 query_type) | |
4030 | { | |
4031 | int ret = 0, ld_index = 0, ids = 0; | |
4032 | struct megasas_cmd *cmd; | |
4033 | struct megasas_dcmd_frame *dcmd; | |
4034 | struct MR_LD_TARGETID_LIST *ci; | |
4035 | dma_addr_t ci_h = 0; | |
94cd65dd | 4036 | u32 tgtid_count; |
21c9e160 | 4037 | |
4038 | cmd = megasas_get_cmd(instance); | |
4039 | ||
4040 | if (!cmd) { | |
1be18254 BH |
4041 | dev_warn(&instance->pdev->dev, |
4042 | "megasas_ld_list_query: Failed to get cmd\n"); | |
21c9e160 | 4043 | return -ENOMEM; |
4044 | } | |
4045 | ||
4046 | dcmd = &cmd->frame->dcmd; | |
4047 | ||
4048 | ci = pci_alloc_consistent(instance->pdev, | |
4049 | sizeof(struct MR_LD_TARGETID_LIST), &ci_h); | |
4050 | ||
4051 | if (!ci) { | |
1be18254 BH |
4052 | dev_warn(&instance->pdev->dev, |
4053 | "Failed to alloc mem for ld_list_query\n"); | |
21c9e160 | 4054 | megasas_return_cmd(instance, cmd); |
4055 | return -ENOMEM; | |
4056 | } | |
4057 | ||
4058 | memset(ci, 0, sizeof(*ci)); | |
4059 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
4060 | ||
4061 | dcmd->mbox.b[0] = query_type; | |
51087a86 SS |
4062 | if (instance->supportmax256vd) |
4063 | dcmd->mbox.b[2] = 1; | |
21c9e160 | 4064 | |
4065 | dcmd->cmd = MFI_CMD_DCMD; | |
2be2a988 | 4066 | dcmd->cmd_status = MFI_STAT_INVALID_STATUS; |
21c9e160 | 4067 | dcmd->sge_count = 1; |
94cd65dd | 4068 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
21c9e160 | 4069 | dcmd->timeout = 0; |
94cd65dd SS |
4070 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST)); |
4071 | dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY); | |
4072 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); | |
4073 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST)); | |
21c9e160 | 4074 | dcmd->pad_0 = 0; |
4075 | ||
90dc9d98 SS |
4076 | if (instance->ctrl_context && !instance->mask_interrupts) |
4077 | ret = megasas_issue_blocked_cmd(instance, cmd, | |
4078 | MEGASAS_BLOCKED_CMD_TIMEOUT); | |
4079 | else | |
4080 | ret = megasas_issue_polled(instance, cmd); | |
21c9e160 | 4081 | |
94cd65dd SS |
4082 | tgtid_count = le32_to_cpu(ci->count); |
4083 | ||
51087a86 | 4084 | if ((ret == 0) && (tgtid_count <= (instance->fw_supported_vd_count))) { |
21c9e160 | 4085 | memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS); |
94cd65dd | 4086 | for (ld_index = 0; ld_index < tgtid_count; ld_index++) { |
21c9e160 | 4087 | ids = ci->targetId[ld_index]; |
4088 | instance->ld_ids[ids] = ci->targetId[ld_index]; | |
4089 | } | |
4090 | ||
4091 | } | |
4092 | ||
4093 | pci_free_consistent(instance->pdev, sizeof(struct MR_LD_TARGETID_LIST), | |
4094 | ci, ci_h); | |
4095 | ||
4026e9aa | 4096 | megasas_return_cmd(instance, cmd); |
21c9e160 | 4097 | |
4098 | return ret; | |
4099 | } | |
4100 | ||
d009b576 SS |
4101 | /* |
4102 | * megasas_update_ext_vd_details : Update details w.r.t Extended VD | |
4103 | * instance : Controller's instance | |
4104 | */ | |
4105 | static void megasas_update_ext_vd_details(struct megasas_instance *instance) | |
4106 | { | |
4107 | struct fusion_context *fusion; | |
4108 | u32 old_map_sz; | |
4109 | u32 new_map_sz; | |
4110 | ||
4111 | fusion = instance->ctrl_context; | |
4112 | /* For MFI based controllers return dummy success */ | |
4113 | if (!fusion) | |
4114 | return; | |
4115 | ||
4116 | instance->supportmax256vd = | |
4117 | instance->ctrl_info->adapterOperations3.supportMaxExtLDs; | |
4118 | /* Below is additional check to address future FW enhancement */ | |
4119 | if (instance->ctrl_info->max_lds > 64) | |
4120 | instance->supportmax256vd = 1; | |
4121 | ||
4122 | instance->drv_supported_vd_count = MEGASAS_MAX_LD_CHANNELS | |
4123 | * MEGASAS_MAX_DEV_PER_CHANNEL; | |
4124 | instance->drv_supported_pd_count = MEGASAS_MAX_PD_CHANNELS | |
4125 | * MEGASAS_MAX_DEV_PER_CHANNEL; | |
4126 | if (instance->supportmax256vd) { | |
4127 | instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES_EXT; | |
4128 | instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES; | |
4129 | } else { | |
4130 | instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES; | |
4131 | instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES; | |
4132 | } | |
d88da09a SS |
4133 | |
4134 | dev_info(&instance->pdev->dev, | |
4135 | "firmware type\t: %s\n", | |
4136 | instance->supportmax256vd ? "Extended VD(240 VD)firmware" : | |
4137 | "Legacy(64 VD) firmware"); | |
d009b576 | 4138 | |
da0dc9fb | 4139 | old_map_sz = sizeof(struct MR_FW_RAID_MAP) + |
d009b576 SS |
4140 | (sizeof(struct MR_LD_SPAN_MAP) * |
4141 | (instance->fw_supported_vd_count - 1)); | |
da0dc9fb BH |
4142 | new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT); |
4143 | fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP) + | |
d009b576 SS |
4144 | (sizeof(struct MR_LD_SPAN_MAP) * |
4145 | (instance->drv_supported_vd_count - 1)); | |
4146 | ||
4147 | fusion->max_map_sz = max(old_map_sz, new_map_sz); | |
4148 | ||
4149 | ||
4150 | if (instance->supportmax256vd) | |
4151 | fusion->current_map_sz = new_map_sz; | |
4152 | else | |
4153 | fusion->current_map_sz = old_map_sz; | |
d009b576 SS |
4154 | } |
4155 | ||
c4a3e0a5 BS |
4156 | /** |
4157 | * megasas_get_controller_info - Returns FW's controller structure | |
4158 | * @instance: Adapter soft state | |
c4a3e0a5 BS |
4159 | * |
4160 | * Issues an internal command (DCMD) to get the FW's controller structure. | |
4161 | * This information is mainly used to find out the maximum IO transfer per | |
4162 | * command supported by the FW. | |
4163 | */ | |
51087a86 | 4164 | int |
d009b576 | 4165 | megasas_get_ctrl_info(struct megasas_instance *instance) |
c4a3e0a5 BS |
4166 | { |
4167 | int ret = 0; | |
4168 | struct megasas_cmd *cmd; | |
4169 | struct megasas_dcmd_frame *dcmd; | |
4170 | struct megasas_ctrl_info *ci; | |
d009b576 | 4171 | struct megasas_ctrl_info *ctrl_info; |
c4a3e0a5 BS |
4172 | dma_addr_t ci_h = 0; |
4173 | ||
d009b576 SS |
4174 | ctrl_info = instance->ctrl_info; |
4175 | ||
c4a3e0a5 BS |
4176 | cmd = megasas_get_cmd(instance); |
4177 | ||
4178 | if (!cmd) { | |
1be18254 | 4179 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a free cmd\n"); |
c4a3e0a5 BS |
4180 | return -ENOMEM; |
4181 | } | |
4182 | ||
4183 | dcmd = &cmd->frame->dcmd; | |
4184 | ||
4185 | ci = pci_alloc_consistent(instance->pdev, | |
4186 | sizeof(struct megasas_ctrl_info), &ci_h); | |
4187 | ||
4188 | if (!ci) { | |
1be18254 | 4189 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for ctrl info\n"); |
c4a3e0a5 BS |
4190 | megasas_return_cmd(instance, cmd); |
4191 | return -ENOMEM; | |
4192 | } | |
4193 | ||
4194 | memset(ci, 0, sizeof(*ci)); | |
4195 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
4196 | ||
4197 | dcmd->cmd = MFI_CMD_DCMD; | |
2be2a988 | 4198 | dcmd->cmd_status = MFI_STAT_INVALID_STATUS; |
c4a3e0a5 | 4199 | dcmd->sge_count = 1; |
94cd65dd | 4200 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
c4a3e0a5 | 4201 | dcmd->timeout = 0; |
780a3762 | 4202 | dcmd->pad_0 = 0; |
94cd65dd SS |
4203 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info)); |
4204 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO); | |
4205 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h); | |
4206 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_ctrl_info)); | |
51087a86 | 4207 | dcmd->mbox.b[0] = 1; |
c4a3e0a5 | 4208 | |
90dc9d98 SS |
4209 | if (instance->ctrl_context && !instance->mask_interrupts) |
4210 | ret = megasas_issue_blocked_cmd(instance, cmd, | |
4211 | MEGASAS_BLOCKED_CMD_TIMEOUT); | |
4212 | else | |
4213 | ret = megasas_issue_polled(instance, cmd); | |
4214 | ||
d009b576 | 4215 | if (!ret) { |
c4a3e0a5 | 4216 | memcpy(ctrl_info, ci, sizeof(struct megasas_ctrl_info)); |
d009b576 SS |
4217 | le32_to_cpus((u32 *)&ctrl_info->properties.OnOffProperties); |
4218 | le32_to_cpus((u32 *)&ctrl_info->adapterOperations2); | |
4219 | le32_to_cpus((u32 *)&ctrl_info->adapterOperations3); | |
4220 | megasas_update_ext_vd_details(instance); | |
3761cb4c | 4221 | instance->use_seqnum_jbod_fp = |
4222 | ctrl_info->adapterOperations3.useSeqNumJbodFP; | |
4026e9aa SS |
4223 | instance->is_imr = (ctrl_info->memory_size ? 0 : 1); |
4224 | dev_info(&instance->pdev->dev, | |
4225 | "controller type\t: %s(%dMB)\n", | |
4226 | instance->is_imr ? "iMR" : "MR", | |
4227 | le16_to_cpu(ctrl_info->memory_size)); | |
d009b576 | 4228 | } |
c4a3e0a5 BS |
4229 | |
4230 | pci_free_consistent(instance->pdev, sizeof(struct megasas_ctrl_info), | |
4231 | ci, ci_h); | |
4232 | ||
4026e9aa | 4233 | megasas_return_cmd(instance, cmd); |
c4a3e0a5 BS |
4234 | return ret; |
4235 | } | |
4236 | ||
fc62b3fc SS |
4237 | /* |
4238 | * megasas_set_crash_dump_params - Sends address of crash dump DMA buffer | |
4239 | * to firmware | |
4240 | * | |
4241 | * @instance: Adapter soft state | |
4242 | * @crash_buf_state - tell FW to turn ON/OFF crash dump feature | |
4243 | MR_CRASH_BUF_TURN_OFF = 0 | |
4244 | MR_CRASH_BUF_TURN_ON = 1 | |
4245 | * @return 0 on success non-zero on failure. | |
4246 | * Issues an internal command (DCMD) to set parameters for crash dump feature. | |
4247 | * Driver will send address of crash dump DMA buffer and set mbox to tell FW | |
4248 | * that driver supports crash dump feature. This DCMD will be sent only if | |
4249 | * crash dump feature is supported by the FW. | |
4250 | * | |
4251 | */ | |
4252 | int megasas_set_crash_dump_params(struct megasas_instance *instance, | |
4253 | u8 crash_buf_state) | |
4254 | { | |
4255 | int ret = 0; | |
4256 | struct megasas_cmd *cmd; | |
4257 | struct megasas_dcmd_frame *dcmd; | |
4258 | ||
4259 | cmd = megasas_get_cmd(instance); | |
4260 | ||
4261 | if (!cmd) { | |
4262 | dev_err(&instance->pdev->dev, "Failed to get a free cmd\n"); | |
4263 | return -ENOMEM; | |
4264 | } | |
4265 | ||
4266 | ||
4267 | dcmd = &cmd->frame->dcmd; | |
4268 | ||
4269 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
4270 | dcmd->mbox.b[0] = crash_buf_state; | |
4271 | dcmd->cmd = MFI_CMD_DCMD; | |
2be2a988 | 4272 | dcmd->cmd_status = MFI_STAT_INVALID_STATUS; |
fc62b3fc SS |
4273 | dcmd->sge_count = 1; |
4274 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE); | |
4275 | dcmd->timeout = 0; | |
4276 | dcmd->pad_0 = 0; | |
4277 | dcmd->data_xfer_len = cpu_to_le32(CRASH_DMA_BUF_SIZE); | |
4278 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SET_CRASH_DUMP_PARAMS); | |
4279 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->crash_dump_h); | |
4280 | dcmd->sgl.sge32[0].length = cpu_to_le32(CRASH_DMA_BUF_SIZE); | |
4281 | ||
90dc9d98 SS |
4282 | if (instance->ctrl_context && !instance->mask_interrupts) |
4283 | ret = megasas_issue_blocked_cmd(instance, cmd, | |
4284 | MEGASAS_BLOCKED_CMD_TIMEOUT); | |
fc62b3fc | 4285 | else |
90dc9d98 SS |
4286 | ret = megasas_issue_polled(instance, cmd); |
4287 | ||
4026e9aa | 4288 | megasas_return_cmd(instance, cmd); |
fc62b3fc SS |
4289 | return ret; |
4290 | } | |
4291 | ||
31ea7088 | 4292 | /** |
4293 | * megasas_issue_init_mfi - Initializes the FW | |
4294 | * @instance: Adapter soft state | |
4295 | * | |
4296 | * Issues the INIT MFI cmd | |
4297 | */ | |
4298 | static int | |
4299 | megasas_issue_init_mfi(struct megasas_instance *instance) | |
4300 | { | |
9ab9ed38 | 4301 | __le32 context; |
31ea7088 | 4302 | struct megasas_cmd *cmd; |
31ea7088 | 4303 | struct megasas_init_frame *init_frame; |
4304 | struct megasas_init_queue_info *initq_info; | |
4305 | dma_addr_t init_frame_h; | |
4306 | dma_addr_t initq_info_h; | |
4307 | ||
4308 | /* | |
4309 | * Prepare a init frame. Note the init frame points to queue info | |
4310 | * structure. Each frame has SGL allocated after first 64 bytes. For | |
4311 | * this frame - since we don't need any SGL - we use SGL's space as | |
4312 | * queue info structure | |
4313 | * | |
4314 | * We will not get a NULL command below. We just created the pool. | |
4315 | */ | |
4316 | cmd = megasas_get_cmd(instance); | |
4317 | ||
4318 | init_frame = (struct megasas_init_frame *)cmd->frame; | |
4319 | initq_info = (struct megasas_init_queue_info *) | |
4320 | ((unsigned long)init_frame + 64); | |
4321 | ||
4322 | init_frame_h = cmd->frame_phys_addr; | |
4323 | initq_info_h = init_frame_h + 64; | |
4324 | ||
4325 | context = init_frame->context; | |
4326 | memset(init_frame, 0, MEGAMFI_FRAME_SIZE); | |
4327 | memset(initq_info, 0, sizeof(struct megasas_init_queue_info)); | |
4328 | init_frame->context = context; | |
4329 | ||
94cd65dd SS |
4330 | initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1); |
4331 | initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h); | |
31ea7088 | 4332 | |
94cd65dd SS |
4333 | initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h); |
4334 | initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h); | |
31ea7088 | 4335 | |
4336 | init_frame->cmd = MFI_CMD_INIT; | |
2be2a988 | 4337 | init_frame->cmd_status = MFI_STAT_INVALID_STATUS; |
94cd65dd SS |
4338 | init_frame->queue_info_new_phys_addr_lo = |
4339 | cpu_to_le32(lower_32_bits(initq_info_h)); | |
4340 | init_frame->queue_info_new_phys_addr_hi = | |
4341 | cpu_to_le32(upper_32_bits(initq_info_h)); | |
31ea7088 | 4342 | |
94cd65dd | 4343 | init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info)); |
31ea7088 | 4344 | |
4345 | /* | |
4346 | * disable the intr before firing the init frame to FW | |
4347 | */ | |
d46a3ad6 | 4348 | instance->instancet->disable_intr(instance); |
31ea7088 | 4349 | |
4350 | /* | |
4351 | * Issue the init frame in polled mode | |
4352 | */ | |
4353 | ||
4354 | if (megasas_issue_polled(instance, cmd)) { | |
1be18254 | 4355 | dev_err(&instance->pdev->dev, "Failed to init firmware\n"); |
31ea7088 | 4356 | megasas_return_cmd(instance, cmd); |
4357 | goto fail_fw_init; | |
4358 | } | |
4359 | ||
4360 | megasas_return_cmd(instance, cmd); | |
4361 | ||
4362 | return 0; | |
4363 | ||
4364 | fail_fw_init: | |
4365 | return -EINVAL; | |
4366 | } | |
4367 | ||
cd50ba8e | 4368 | static u32 |
4369 | megasas_init_adapter_mfi(struct megasas_instance *instance) | |
c4a3e0a5 | 4370 | { |
cd50ba8e | 4371 | struct megasas_register_set __iomem *reg_set; |
c4a3e0a5 BS |
4372 | u32 context_sz; |
4373 | u32 reply_q_sz; | |
c4a3e0a5 BS |
4374 | |
4375 | reg_set = instance->reg_set; | |
4376 | ||
c4a3e0a5 BS |
4377 | /* |
4378 | * Get various operational parameters from status register | |
4379 | */ | |
1341c939 | 4380 | instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF; |
e3bbff9f SP |
4381 | /* |
4382 | * Reduce the max supported cmds by 1. This is to ensure that the | |
4383 | * reply_q_sz (1 more than the max cmd that driver may send) | |
4384 | * does not exceed max cmds that the FW can support | |
4385 | */ | |
4386 | instance->max_fw_cmds = instance->max_fw_cmds-1; | |
9c915a8c | 4387 | instance->max_mfi_cmds = instance->max_fw_cmds; |
0d49016b | 4388 | instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >> |
1341c939 | 4389 | 0x10; |
f26ac3a1 SS |
4390 | /* |
4391 | * For MFI skinny adapters, MEGASAS_SKINNY_INT_CMDS commands | |
4392 | * are reserved for IOCTL + driver's internal DCMDs. | |
4393 | */ | |
4394 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) || | |
4395 | (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) { | |
4396 | instance->max_scsi_cmds = (instance->max_fw_cmds - | |
4397 | MEGASAS_SKINNY_INT_CMDS); | |
4398 | sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS); | |
4399 | } else { | |
4400 | instance->max_scsi_cmds = (instance->max_fw_cmds - | |
4401 | MEGASAS_INT_CMDS); | |
4402 | sema_init(&instance->ioctl_sem, (MEGASAS_MFI_IOCTL_CMDS)); | |
4403 | } | |
4404 | ||
c4a3e0a5 BS |
4405 | /* |
4406 | * Create a pool of commands | |
4407 | */ | |
4408 | if (megasas_alloc_cmds(instance)) | |
4409 | goto fail_alloc_cmds; | |
4410 | ||
4411 | /* | |
4412 | * Allocate memory for reply queue. Length of reply queue should | |
4413 | * be _one_ more than the maximum commands handled by the firmware. | |
4414 | * | |
4415 | * Note: When FW completes commands, it places corresponding contex | |
4416 | * values in this circular reply queue. This circular queue is a fairly | |
4417 | * typical producer-consumer queue. FW is the producer (of completed | |
4418 | * commands) and the driver is the consumer. | |
4419 | */ | |
4420 | context_sz = sizeof(u32); | |
4421 | reply_q_sz = context_sz * (instance->max_fw_cmds + 1); | |
4422 | ||
4423 | instance->reply_queue = pci_alloc_consistent(instance->pdev, | |
4424 | reply_q_sz, | |
4425 | &instance->reply_queue_h); | |
4426 | ||
4427 | if (!instance->reply_queue) { | |
1be18254 | 4428 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Out of DMA mem for reply queue\n"); |
c4a3e0a5 BS |
4429 | goto fail_reply_queue; |
4430 | } | |
4431 | ||
31ea7088 | 4432 | if (megasas_issue_init_mfi(instance)) |
c4a3e0a5 | 4433 | goto fail_fw_init; |
c4a3e0a5 | 4434 | |
d009b576 | 4435 | if (megasas_get_ctrl_info(instance)) { |
51087a86 SS |
4436 | dev_err(&instance->pdev->dev, "(%d): Could get controller info " |
4437 | "Fail from %s %d\n", instance->unique_id, | |
4438 | __func__, __LINE__); | |
4439 | goto fail_fw_init; | |
4440 | } | |
4441 | ||
39a98554 | 4442 | instance->fw_support_ieee = 0; |
4443 | instance->fw_support_ieee = | |
4444 | (instance->instancet->read_fw_status_reg(reg_set) & | |
4445 | 0x04000000); | |
4446 | ||
1be18254 | 4447 | dev_notice(&instance->pdev->dev, "megasas_init_mfi: fw_support_ieee=%d", |
39a98554 | 4448 | instance->fw_support_ieee); |
4449 | ||
4450 | if (instance->fw_support_ieee) | |
4451 | instance->flag_ieee = 1; | |
4452 | ||
cd50ba8e | 4453 | return 0; |
4454 | ||
4455 | fail_fw_init: | |
4456 | ||
4457 | pci_free_consistent(instance->pdev, reply_q_sz, | |
4458 | instance->reply_queue, instance->reply_queue_h); | |
4459 | fail_reply_queue: | |
4460 | megasas_free_cmds(instance); | |
4461 | ||
4462 | fail_alloc_cmds: | |
cd50ba8e | 4463 | return 1; |
4464 | } | |
4465 | ||
d3557fc8 SS |
4466 | /* |
4467 | * megasas_setup_irqs_msix - register legacy interrupts. | |
4468 | * @instance: Adapter soft state | |
4469 | * | |
4470 | * Do not enable interrupt, only setup ISRs. | |
4471 | * | |
4472 | * Return 0 on success. | |
4473 | */ | |
4474 | static int | |
4475 | megasas_setup_irqs_ioapic(struct megasas_instance *instance) | |
4476 | { | |
4477 | struct pci_dev *pdev; | |
4478 | ||
4479 | pdev = instance->pdev; | |
4480 | instance->irq_context[0].instance = instance; | |
4481 | instance->irq_context[0].MSIxIndex = 0; | |
4482 | if (request_irq(pdev->irq, instance->instancet->service_isr, | |
4483 | IRQF_SHARED, "megasas", &instance->irq_context[0])) { | |
4484 | dev_err(&instance->pdev->dev, | |
4485 | "Failed to register IRQ from %s %d\n", | |
4486 | __func__, __LINE__); | |
4487 | return -1; | |
4488 | } | |
4489 | return 0; | |
4490 | } | |
4491 | ||
4492 | /** | |
4493 | * megasas_setup_irqs_msix - register MSI-x interrupts. | |
4494 | * @instance: Adapter soft state | |
4495 | * @is_probe: Driver probe check | |
4496 | * | |
4497 | * Do not enable interrupt, only setup ISRs. | |
4498 | * | |
4499 | * Return 0 on success. | |
4500 | */ | |
4501 | static int | |
4502 | megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe) | |
4503 | { | |
4504 | int i, j, cpu; | |
4505 | struct pci_dev *pdev; | |
4506 | ||
4507 | pdev = instance->pdev; | |
4508 | ||
4509 | /* Try MSI-x */ | |
4510 | cpu = cpumask_first(cpu_online_mask); | |
4511 | for (i = 0; i < instance->msix_vectors; i++) { | |
4512 | instance->irq_context[i].instance = instance; | |
4513 | instance->irq_context[i].MSIxIndex = i; | |
4514 | if (request_irq(instance->msixentry[i].vector, | |
4515 | instance->instancet->service_isr, 0, "megasas", | |
4516 | &instance->irq_context[i])) { | |
4517 | dev_err(&instance->pdev->dev, | |
4518 | "Failed to register IRQ for vector %d.\n", i); | |
4519 | for (j = 0; j < i; j++) { | |
4520 | if (smp_affinity_enable) | |
4521 | irq_set_affinity_hint( | |
4522 | instance->msixentry[j].vector, NULL); | |
4523 | free_irq(instance->msixentry[j].vector, | |
4524 | &instance->irq_context[j]); | |
4525 | } | |
4526 | /* Retry irq register for IO_APIC*/ | |
4527 | instance->msix_vectors = 0; | |
4528 | if (is_probe) | |
4529 | return megasas_setup_irqs_ioapic(instance); | |
4530 | else | |
4531 | return -1; | |
4532 | } | |
4533 | if (smp_affinity_enable) { | |
4534 | if (irq_set_affinity_hint(instance->msixentry[i].vector, | |
4535 | get_cpu_mask(cpu))) | |
4536 | dev_err(&instance->pdev->dev, | |
4537 | "Failed to set affinity hint" | |
4538 | " for cpu %d\n", cpu); | |
4539 | cpu = cpumask_next(cpu, cpu_online_mask); | |
4540 | } | |
4541 | } | |
4542 | return 0; | |
4543 | } | |
4544 | ||
4545 | /* | |
4546 | * megasas_destroy_irqs- unregister interrupts. | |
4547 | * @instance: Adapter soft state | |
4548 | * return: void | |
4549 | */ | |
4550 | static void | |
4551 | megasas_destroy_irqs(struct megasas_instance *instance) { | |
4552 | ||
4553 | int i; | |
4554 | ||
4555 | if (instance->msix_vectors) | |
4556 | for (i = 0; i < instance->msix_vectors; i++) { | |
4557 | if (smp_affinity_enable) | |
4558 | irq_set_affinity_hint( | |
4559 | instance->msixentry[i].vector, NULL); | |
4560 | free_irq(instance->msixentry[i].vector, | |
4561 | &instance->irq_context[i]); | |
4562 | } | |
4563 | else | |
4564 | free_irq(instance->pdev->irq, &instance->irq_context[0]); | |
4565 | } | |
4566 | ||
3761cb4c | 4567 | /** |
4568 | * megasas_setup_jbod_map - setup jbod map for FP seq_number. | |
4569 | * @instance: Adapter soft state | |
4570 | * @is_probe: Driver probe check | |
4571 | * | |
4572 | * Return 0 on success. | |
4573 | */ | |
4574 | void | |
4575 | megasas_setup_jbod_map(struct megasas_instance *instance) | |
4576 | { | |
4577 | int i; | |
4578 | struct fusion_context *fusion = instance->ctrl_context; | |
4579 | u32 pd_seq_map_sz; | |
4580 | ||
4581 | pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) + | |
4582 | (sizeof(struct MR_PD_CFG_SEQ) * (MAX_PHYSICAL_DEVICES - 1)); | |
4583 | ||
4584 | if (reset_devices || !fusion || | |
4585 | !instance->ctrl_info->adapterOperations3.useSeqNumJbodFP) { | |
4586 | dev_info(&instance->pdev->dev, | |
4587 | "Jbod map is not supported %s %d\n", | |
4588 | __func__, __LINE__); | |
4589 | instance->use_seqnum_jbod_fp = false; | |
4590 | return; | |
4591 | } | |
4592 | ||
4593 | if (fusion->pd_seq_sync[0]) | |
4594 | goto skip_alloc; | |
4595 | ||
4596 | for (i = 0; i < JBOD_MAPS_COUNT; i++) { | |
4597 | fusion->pd_seq_sync[i] = dma_alloc_coherent | |
4598 | (&instance->pdev->dev, pd_seq_map_sz, | |
4599 | &fusion->pd_seq_phys[i], GFP_KERNEL); | |
4600 | if (!fusion->pd_seq_sync[i]) { | |
4601 | dev_err(&instance->pdev->dev, | |
4602 | "Failed to allocate memory from %s %d\n", | |
4603 | __func__, __LINE__); | |
4604 | if (i == 1) { | |
4605 | dma_free_coherent(&instance->pdev->dev, | |
4606 | pd_seq_map_sz, fusion->pd_seq_sync[0], | |
4607 | fusion->pd_seq_phys[0]); | |
4608 | fusion->pd_seq_sync[0] = NULL; | |
4609 | } | |
4610 | instance->use_seqnum_jbod_fp = false; | |
4611 | return; | |
4612 | } | |
4613 | } | |
4614 | ||
4615 | skip_alloc: | |
4616 | if (!megasas_sync_pd_seq_num(instance, false) && | |
4617 | !megasas_sync_pd_seq_num(instance, true)) | |
4618 | instance->use_seqnum_jbod_fp = true; | |
4619 | else | |
4620 | instance->use_seqnum_jbod_fp = false; | |
4621 | } | |
4622 | ||
cd50ba8e | 4623 | /** |
4624 | * megasas_init_fw - Initializes the FW | |
4625 | * @instance: Adapter soft state | |
4626 | * | |
4627 | * This is the main function for initializing firmware | |
4628 | */ | |
4629 | ||
4630 | static int megasas_init_fw(struct megasas_instance *instance) | |
4631 | { | |
4632 | u32 max_sectors_1; | |
4633 | u32 max_sectors_2; | |
d46a3ad6 | 4634 | u32 tmp_sectors, msix_enable, scratch_pad_2; |
11f8a7b3 | 4635 | resource_size_t base_addr; |
cd50ba8e | 4636 | struct megasas_register_set __iomem *reg_set; |
51087a86 | 4637 | struct megasas_ctrl_info *ctrl_info = NULL; |
cd50ba8e | 4638 | unsigned long bar_list; |
d46a3ad6 | 4639 | int i, loop, fw_msix_count = 0; |
229fe47c | 4640 | struct IOV_111 *iovPtr; |
cd50ba8e | 4641 | |
4642 | /* Find first memory bar */ | |
4643 | bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM); | |
4644 | instance->bar = find_first_bit(&bar_list, sizeof(unsigned long)); | |
cd50ba8e | 4645 | if (pci_request_selected_regions(instance->pdev, instance->bar, |
4646 | "megasas: LSI")) { | |
1be18254 | 4647 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "IO memory region busy!\n"); |
cd50ba8e | 4648 | return -EBUSY; |
4649 | } | |
4650 | ||
11f8a7b3 BC |
4651 | base_addr = pci_resource_start(instance->pdev, instance->bar); |
4652 | instance->reg_set = ioremap_nocache(base_addr, 8192); | |
cd50ba8e | 4653 | |
4654 | if (!instance->reg_set) { | |
1be18254 | 4655 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to map IO mem\n"); |
cd50ba8e | 4656 | goto fail_ioremap; |
4657 | } | |
4658 | ||
4659 | reg_set = instance->reg_set; | |
4660 | ||
4661 | switch (instance->pdev->device) { | |
9c915a8c | 4662 | case PCI_DEVICE_ID_LSI_FUSION: |
229fe47c | 4663 | case PCI_DEVICE_ID_LSI_PLASMA: |
36807e67 | 4664 | case PCI_DEVICE_ID_LSI_INVADER: |
21d3c710 | 4665 | case PCI_DEVICE_ID_LSI_FURY: |
9c915a8c | 4666 | instance->instancet = &megasas_instance_template_fusion; |
4667 | break; | |
cd50ba8e | 4668 | case PCI_DEVICE_ID_LSI_SAS1078R: |
4669 | case PCI_DEVICE_ID_LSI_SAS1078DE: | |
4670 | instance->instancet = &megasas_instance_template_ppc; | |
4671 | break; | |
4672 | case PCI_DEVICE_ID_LSI_SAS1078GEN2: | |
4673 | case PCI_DEVICE_ID_LSI_SAS0079GEN2: | |
4674 | instance->instancet = &megasas_instance_template_gen2; | |
4675 | break; | |
4676 | case PCI_DEVICE_ID_LSI_SAS0073SKINNY: | |
4677 | case PCI_DEVICE_ID_LSI_SAS0071SKINNY: | |
4678 | instance->instancet = &megasas_instance_template_skinny; | |
4679 | break; | |
4680 | case PCI_DEVICE_ID_LSI_SAS1064R: | |
4681 | case PCI_DEVICE_ID_DELL_PERC5: | |
4682 | default: | |
4683 | instance->instancet = &megasas_instance_template_xscale; | |
4684 | break; | |
4685 | } | |
4686 | ||
6431f5d7 SS |
4687 | if (megasas_transition_to_ready(instance, 0)) { |
4688 | atomic_set(&instance->fw_reset_no_pci_access, 1); | |
4689 | instance->instancet->adp_reset | |
4690 | (instance, instance->reg_set); | |
4691 | atomic_set(&instance->fw_reset_no_pci_access, 0); | |
4692 | dev_info(&instance->pdev->dev, | |
1be18254 | 4693 | "FW restarted successfully from %s!\n", |
6431f5d7 SS |
4694 | __func__); |
4695 | ||
4696 | /*waitting for about 30 second before retry*/ | |
4697 | ssleep(30); | |
4698 | ||
4699 | if (megasas_transition_to_ready(instance, 0)) | |
4700 | goto fail_ready_state; | |
4701 | } | |
cd50ba8e | 4702 | |
d46a3ad6 SS |
4703 | /* |
4704 | * MSI-X host index 0 is common for all adapter. | |
4705 | * It is used for all MPT based Adapters. | |
4706 | */ | |
4707 | instance->reply_post_host_index_addr[0] = | |
8a232bb3 | 4708 | (u32 __iomem *)((u8 __iomem *)instance->reg_set + |
d46a3ad6 SS |
4709 | MPI2_REPLY_POST_HOST_INDEX_OFFSET); |
4710 | ||
3f1abce4 | 4711 | /* Check if MSI-X is supported while in ready state */ |
4712 | msix_enable = (instance->instancet->read_fw_status_reg(reg_set) & | |
4713 | 0x4000000) >> 0x1a; | |
c8e858fe | 4714 | if (msix_enable && !msix_disable) { |
d46a3ad6 SS |
4715 | scratch_pad_2 = readl |
4716 | (&instance->reg_set->outbound_scratch_pad_2); | |
c8e858fe | 4717 | /* Check max MSI-X vectors */ |
229fe47c | 4718 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) || |
4719 | (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA)) { | |
d46a3ad6 SS |
4720 | instance->msix_vectors = (scratch_pad_2 |
4721 | & MR_MAX_REPLY_QUEUES_OFFSET) + 1; | |
4722 | fw_msix_count = instance->msix_vectors; | |
079eaddf | 4723 | if (msix_vectors) |
4724 | instance->msix_vectors = | |
4725 | min(msix_vectors, | |
4726 | instance->msix_vectors); | |
d46a3ad6 SS |
4727 | } else if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) |
4728 | || (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) { | |
4729 | /* Invader/Fury supports more than 8 MSI-X */ | |
4730 | instance->msix_vectors = ((scratch_pad_2 | |
4731 | & MR_MAX_REPLY_QUEUES_EXT_OFFSET) | |
4732 | >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1; | |
4733 | fw_msix_count = instance->msix_vectors; | |
4734 | /* Save 1-15 reply post index address to local memory | |
4735 | * Index 0 is already saved from reg offset | |
4736 | * MPI2_REPLY_POST_HOST_INDEX_OFFSET | |
4737 | */ | |
4738 | for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) { | |
4739 | instance->reply_post_host_index_addr[loop] = | |
8a232bb3 CH |
4740 | (u32 __iomem *) |
4741 | ((u8 __iomem *)instance->reg_set + | |
d46a3ad6 SS |
4742 | MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET |
4743 | + (loop * 0x10)); | |
4744 | } | |
4745 | if (msix_vectors) | |
4746 | instance->msix_vectors = min(msix_vectors, | |
4747 | instance->msix_vectors); | |
c8e858fe | 4748 | } else |
4749 | instance->msix_vectors = 1; | |
4750 | /* Don't bother allocating more MSI-X vectors than cpus */ | |
4751 | instance->msix_vectors = min(instance->msix_vectors, | |
4752 | (unsigned int)num_online_cpus()); | |
4753 | for (i = 0; i < instance->msix_vectors; i++) | |
4754 | instance->msixentry[i].entry = i; | |
8ae80ed1 AG |
4755 | i = pci_enable_msix_range(instance->pdev, instance->msixentry, |
4756 | 1, instance->msix_vectors); | |
c12de882 | 4757 | if (i > 0) |
8ae80ed1 AG |
4758 | instance->msix_vectors = i; |
4759 | else | |
c8e858fe | 4760 | instance->msix_vectors = 0; |
4761 | } | |
3f1abce4 | 4762 | |
258c3af2 TH |
4763 | dev_info(&instance->pdev->dev, |
4764 | "firmware supports msix\t: (%d)", fw_msix_count); | |
4765 | dev_info(&instance->pdev->dev, | |
4766 | "current msix/online cpus\t: (%d/%d)\n", | |
4767 | instance->msix_vectors, (unsigned int)num_online_cpus()); | |
d3557fc8 | 4768 | |
258c3af2 TH |
4769 | if (instance->msix_vectors ? |
4770 | megasas_setup_irqs_msix(instance, 1) : | |
4771 | megasas_setup_irqs_ioapic(instance)) | |
4772 | goto fail_setup_irqs; | |
3f1abce4 | 4773 | |
51087a86 SS |
4774 | instance->ctrl_info = kzalloc(sizeof(struct megasas_ctrl_info), |
4775 | GFP_KERNEL); | |
4776 | if (instance->ctrl_info == NULL) | |
4777 | goto fail_init_adapter; | |
4778 | ||
4779 | /* | |
4780 | * Below are default value for legacy Firmware. | |
4781 | * non-fusion based controllers | |
4782 | */ | |
4783 | instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES; | |
4784 | instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES; | |
cd50ba8e | 4785 | /* Get operational params, sge flags, send init cmd to controller */ |
4786 | if (instance->instancet->init_adapter(instance)) | |
eb1b1237 | 4787 | goto fail_init_adapter; |
cd50ba8e | 4788 | |
258c3af2 TH |
4789 | tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet, |
4790 | (unsigned long)instance); | |
4791 | ||
d3557fc8 | 4792 | instance->instancet->enable_intr(instance); |
cd50ba8e | 4793 | |
1be18254 | 4794 | dev_err(&instance->pdev->dev, "INIT adapter done\n"); |
cd50ba8e | 4795 | |
3761cb4c | 4796 | megasas_setup_jbod_map(instance); |
4797 | ||
39a98554 | 4798 | /** for passthrough |
da0dc9fb BH |
4799 | * the following function will get the PD LIST. |
4800 | */ | |
4801 | memset(instance->pd_list, 0, | |
81e403ce | 4802 | (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list))); |
58968fc8 | 4803 | if (megasas_get_pd_list(instance) < 0) { |
1be18254 | 4804 | dev_err(&instance->pdev->dev, "failed to get PD list\n"); |
d3557fc8 | 4805 | goto fail_get_pd_list; |
58968fc8 | 4806 | } |
81e403ce | 4807 | |
bdc6fb8d | 4808 | memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS); |
21c9e160 | 4809 | if (megasas_ld_list_query(instance, |
4810 | MR_LD_QUERY_TYPE_EXPOSED_TO_HOST)) | |
4811 | megasas_get_ld_list(instance); | |
bdc6fb8d | 4812 | |
c4a3e0a5 BS |
4813 | /* |
4814 | * Compute the max allowed sectors per IO: The controller info has two | |
4815 | * limits on max sectors. Driver should use the minimum of these two. | |
4816 | * | |
4817 | * 1 << stripe_sz_ops.min = max sectors per strip | |
4818 | * | |
4819 | * Note that older firmwares ( < FW ver 30) didn't report information | |
4820 | * to calculate max_sectors_1. So the number ended up as zero always. | |
4821 | */ | |
14faea9f | 4822 | tmp_sectors = 0; |
51087a86 | 4823 | ctrl_info = instance->ctrl_info; |
c4a3e0a5 | 4824 | |
51087a86 SS |
4825 | max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) * |
4826 | le16_to_cpu(ctrl_info->max_strips_per_io); | |
4827 | max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size); | |
404a8a1a | 4828 | |
da0dc9fb | 4829 | tmp_sectors = min_t(u32, max_sectors_1, max_sectors_2); |
bc93d425 | 4830 | |
51087a86 SS |
4831 | instance->disableOnlineCtrlReset = |
4832 | ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset; | |
51087a86 SS |
4833 | instance->mpio = ctrl_info->adapterOperations2.mpio; |
4834 | instance->UnevenSpanSupport = | |
4835 | ctrl_info->adapterOperations2.supportUnevenSpans; | |
4836 | if (instance->UnevenSpanSupport) { | |
4837 | struct fusion_context *fusion = instance->ctrl_context; | |
51087a86 SS |
4838 | if (MR_ValidateMapInfo(instance)) |
4839 | fusion->fast_path_io = 1; | |
4840 | else | |
4841 | fusion->fast_path_io = 0; | |
fc62b3fc | 4842 | |
51087a86 SS |
4843 | } |
4844 | if (ctrl_info->host_interface.SRIOV) { | |
4845 | if (!ctrl_info->adapterOperations2.activePassive) | |
4846 | instance->PlasmaFW111 = 1; | |
fc62b3fc | 4847 | |
51087a86 SS |
4848 | if (!instance->PlasmaFW111) |
4849 | instance->requestorId = | |
4850 | ctrl_info->iov.requestorId; | |
4851 | else { | |
4852 | iovPtr = (struct IOV_111 *)((unsigned char *)ctrl_info + IOV_111_OFFSET); | |
4853 | instance->requestorId = iovPtr->requestorId; | |
fc62b3fc | 4854 | } |
51087a86 SS |
4855 | dev_warn(&instance->pdev->dev, "I am VF " |
4856 | "requestorId %d\n", instance->requestorId); | |
4857 | } | |
4858 | ||
51087a86 SS |
4859 | instance->crash_dump_fw_support = |
4860 | ctrl_info->adapterOperations3.supportCrashDump; | |
4861 | instance->crash_dump_drv_support = | |
4862 | (instance->crash_dump_fw_support && | |
4863 | instance->crash_dump_buf); | |
d88da09a | 4864 | if (instance->crash_dump_drv_support) |
51087a86 SS |
4865 | megasas_set_crash_dump_params(instance, |
4866 | MR_CRASH_BUF_TURN_OFF); | |
4867 | ||
d88da09a | 4868 | else { |
51087a86 SS |
4869 | if (instance->crash_dump_buf) |
4870 | pci_free_consistent(instance->pdev, | |
4871 | CRASH_DMA_BUF_SIZE, | |
4872 | instance->crash_dump_buf, | |
4873 | instance->crash_dump_h); | |
4874 | instance->crash_dump_buf = NULL; | |
14faea9f | 4875 | } |
7497cde8 SS |
4876 | |
4877 | instance->secure_jbod_support = | |
4878 | ctrl_info->adapterOperations3.supportSecurityonJBOD; | |
d88da09a SS |
4879 | |
4880 | dev_info(&instance->pdev->dev, | |
4881 | "pci id\t\t: (0x%04x)/(0x%04x)/(0x%04x)/(0x%04x)\n", | |
4882 | le16_to_cpu(ctrl_info->pci.vendor_id), | |
4883 | le16_to_cpu(ctrl_info->pci.device_id), | |
4884 | le16_to_cpu(ctrl_info->pci.sub_vendor_id), | |
4885 | le16_to_cpu(ctrl_info->pci.sub_device_id)); | |
4886 | dev_info(&instance->pdev->dev, "unevenspan support : %s\n", | |
4887 | instance->UnevenSpanSupport ? "yes" : "no"); | |
4888 | dev_info(&instance->pdev->dev, "disable ocr : %s\n", | |
4889 | instance->disableOnlineCtrlReset ? "yes" : "no"); | |
4890 | dev_info(&instance->pdev->dev, "firmware crash dump : %s\n", | |
4891 | instance->crash_dump_drv_support ? "yes" : "no"); | |
4892 | dev_info(&instance->pdev->dev, "secure jbod : %s\n", | |
4893 | instance->secure_jbod_support ? "yes" : "no"); | |
3761cb4c | 4894 | dev_info(&instance->pdev->dev, "jbod sync map : %s\n", |
4895 | instance->use_seqnum_jbod_fp ? "yes" : "no"); | |
d88da09a SS |
4896 | |
4897 | ||
14faea9f | 4898 | instance->max_sectors_per_req = instance->max_num_sge * |
4899 | PAGE_SIZE / 512; | |
4900 | if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors)) | |
4901 | instance->max_sectors_per_req = tmp_sectors; | |
c4a3e0a5 | 4902 | |
ae09a6c1 SS |
4903 | /* Check for valid throttlequeuedepth module parameter */ |
4904 | if (throttlequeuedepth && | |
4905 | throttlequeuedepth <= instance->max_scsi_cmds) | |
4906 | instance->throttlequeuedepth = throttlequeuedepth; | |
4907 | else | |
4908 | instance->throttlequeuedepth = | |
4909 | MEGASAS_THROTTLE_QUEUE_DEPTH; | |
4910 | ||
ad84db2e | 4911 | |
229fe47c | 4912 | /* Launch SR-IOV heartbeat timer */ |
4913 | if (instance->requestorId) { | |
4914 | if (!megasas_sriov_start_heartbeat(instance, 1)) | |
4915 | megasas_start_timer(instance, | |
4916 | &instance->sriov_heartbeat_timer, | |
4917 | megasas_sriov_heartbeat_handler, | |
4918 | MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF); | |
4919 | else | |
4920 | instance->skip_heartbeat_timer_del = 1; | |
4921 | } | |
4922 | ||
c4a3e0a5 BS |
4923 | return 0; |
4924 | ||
d3557fc8 SS |
4925 | fail_get_pd_list: |
4926 | instance->instancet->disable_intr(instance); | |
eb1b1237 | 4927 | fail_init_adapter: |
d3557fc8 SS |
4928 | megasas_destroy_irqs(instance); |
4929 | fail_setup_irqs: | |
4930 | if (instance->msix_vectors) | |
4931 | pci_disable_msix(instance->pdev); | |
4932 | instance->msix_vectors = 0; | |
cd50ba8e | 4933 | fail_ready_state: |
51087a86 SS |
4934 | kfree(instance->ctrl_info); |
4935 | instance->ctrl_info = NULL; | |
c4a3e0a5 BS |
4936 | iounmap(instance->reg_set); |
4937 | ||
4938 | fail_ioremap: | |
b6d5d880 | 4939 | pci_release_selected_regions(instance->pdev, instance->bar); |
c4a3e0a5 BS |
4940 | |
4941 | return -EINVAL; | |
4942 | } | |
4943 | ||
4944 | /** | |
4945 | * megasas_release_mfi - Reverses the FW initialization | |
4b63b286 | 4946 | * @instance: Adapter soft state |
c4a3e0a5 BS |
4947 | */ |
4948 | static void megasas_release_mfi(struct megasas_instance *instance) | |
4949 | { | |
9c915a8c | 4950 | u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1); |
c4a3e0a5 | 4951 | |
9c915a8c | 4952 | if (instance->reply_queue) |
4953 | pci_free_consistent(instance->pdev, reply_q_sz, | |
c4a3e0a5 BS |
4954 | instance->reply_queue, instance->reply_queue_h); |
4955 | ||
4956 | megasas_free_cmds(instance); | |
4957 | ||
4958 | iounmap(instance->reg_set); | |
4959 | ||
b6d5d880 | 4960 | pci_release_selected_regions(instance->pdev, instance->bar); |
c4a3e0a5 BS |
4961 | } |
4962 | ||
4963 | /** | |
4964 | * megasas_get_seq_num - Gets latest event sequence numbers | |
4965 | * @instance: Adapter soft state | |
4966 | * @eli: FW event log sequence numbers information | |
4967 | * | |
4968 | * FW maintains a log of all events in a non-volatile area. Upper layers would | |
4969 | * usually find out the latest sequence number of the events, the seq number at | |
4970 | * the boot etc. They would "read" all the events below the latest seq number | |
4971 | * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq | |
4972 | * number), they would subsribe to AEN (asynchronous event notification) and | |
4973 | * wait for the events to happen. | |
4974 | */ | |
4975 | static int | |
4976 | megasas_get_seq_num(struct megasas_instance *instance, | |
4977 | struct megasas_evt_log_info *eli) | |
4978 | { | |
4979 | struct megasas_cmd *cmd; | |
4980 | struct megasas_dcmd_frame *dcmd; | |
4981 | struct megasas_evt_log_info *el_info; | |
4982 | dma_addr_t el_info_h = 0; | |
4983 | ||
4984 | cmd = megasas_get_cmd(instance); | |
4985 | ||
4986 | if (!cmd) { | |
4987 | return -ENOMEM; | |
4988 | } | |
4989 | ||
4990 | dcmd = &cmd->frame->dcmd; | |
4991 | el_info = pci_alloc_consistent(instance->pdev, | |
4992 | sizeof(struct megasas_evt_log_info), | |
4993 | &el_info_h); | |
4994 | ||
4995 | if (!el_info) { | |
4996 | megasas_return_cmd(instance, cmd); | |
4997 | return -ENOMEM; | |
4998 | } | |
4999 | ||
5000 | memset(el_info, 0, sizeof(*el_info)); | |
5001 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
5002 | ||
5003 | dcmd->cmd = MFI_CMD_DCMD; | |
5004 | dcmd->cmd_status = 0x0; | |
5005 | dcmd->sge_count = 1; | |
94cd65dd | 5006 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
c4a3e0a5 | 5007 | dcmd->timeout = 0; |
780a3762 | 5008 | dcmd->pad_0 = 0; |
94cd65dd SS |
5009 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info)); |
5010 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO); | |
5011 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(el_info_h); | |
5012 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_log_info)); | |
c4a3e0a5 | 5013 | |
cfbe7554 SS |
5014 | if (megasas_issue_blocked_cmd(instance, cmd, 30)) |
5015 | dev_err(&instance->pdev->dev, "Command timedout" | |
5016 | "from %s\n", __func__); | |
5017 | else { | |
5018 | /* | |
5019 | * Copy the data back into callers buffer | |
5020 | */ | |
48100b0e CH |
5021 | eli->newest_seq_num = el_info->newest_seq_num; |
5022 | eli->oldest_seq_num = el_info->oldest_seq_num; | |
5023 | eli->clear_seq_num = el_info->clear_seq_num; | |
5024 | eli->shutdown_seq_num = el_info->shutdown_seq_num; | |
5025 | eli->boot_seq_num = el_info->boot_seq_num; | |
cfbe7554 | 5026 | } |
c4a3e0a5 BS |
5027 | |
5028 | pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info), | |
5029 | el_info, el_info_h); | |
5030 | ||
4026e9aa | 5031 | megasas_return_cmd(instance, cmd); |
c4a3e0a5 BS |
5032 | |
5033 | return 0; | |
5034 | } | |
5035 | ||
5036 | /** | |
5037 | * megasas_register_aen - Registers for asynchronous event notification | |
5038 | * @instance: Adapter soft state | |
5039 | * @seq_num: The starting sequence number | |
5040 | * @class_locale: Class of the event | |
5041 | * | |
5042 | * This function subscribes for AEN for events beyond the @seq_num. It requests | |
5043 | * to be notified if and only if the event is of type @class_locale | |
5044 | */ | |
5045 | static int | |
5046 | megasas_register_aen(struct megasas_instance *instance, u32 seq_num, | |
5047 | u32 class_locale_word) | |
5048 | { | |
5049 | int ret_val; | |
5050 | struct megasas_cmd *cmd; | |
5051 | struct megasas_dcmd_frame *dcmd; | |
5052 | union megasas_evt_class_locale curr_aen; | |
5053 | union megasas_evt_class_locale prev_aen; | |
5054 | ||
5055 | /* | |
5056 | * If there an AEN pending already (aen_cmd), check if the | |
5057 | * class_locale of that pending AEN is inclusive of the new | |
5058 | * AEN request we currently have. If it is, then we don't have | |
5059 | * to do anything. In other words, whichever events the current | |
5060 | * AEN request is subscribing to, have already been subscribed | |
5061 | * to. | |
5062 | * | |
5063 | * If the old_cmd is _not_ inclusive, then we have to abort | |
5064 | * that command, form a class_locale that is superset of both | |
5065 | * old and current and re-issue to the FW | |
5066 | */ | |
5067 | ||
5068 | curr_aen.word = class_locale_word; | |
5069 | ||
5070 | if (instance->aen_cmd) { | |
5071 | ||
a9555534 CH |
5072 | prev_aen.word = |
5073 | le32_to_cpu(instance->aen_cmd->frame->dcmd.mbox.w[1]); | |
c4a3e0a5 BS |
5074 | |
5075 | /* | |
5076 | * A class whose enum value is smaller is inclusive of all | |
5077 | * higher values. If a PROGRESS (= -1) was previously | |
5078 | * registered, then a new registration requests for higher | |
5079 | * classes need not be sent to FW. They are automatically | |
5080 | * included. | |
5081 | * | |
5082 | * Locale numbers don't have such hierarchy. They are bitmap | |
5083 | * values | |
5084 | */ | |
5085 | if ((prev_aen.members.class <= curr_aen.members.class) && | |
3993a862 | 5086 | !((prev_aen.members.locale & curr_aen.members.locale) ^ |
c4a3e0a5 BS |
5087 | curr_aen.members.locale)) { |
5088 | /* | |
5089 | * Previously issued event registration includes | |
5090 | * current request. Nothing to do. | |
5091 | */ | |
5092 | return 0; | |
5093 | } else { | |
3993a862 | 5094 | curr_aen.members.locale |= prev_aen.members.locale; |
c4a3e0a5 BS |
5095 | |
5096 | if (prev_aen.members.class < curr_aen.members.class) | |
5097 | curr_aen.members.class = prev_aen.members.class; | |
5098 | ||
5099 | instance->aen_cmd->abort_aen = 1; | |
5100 | ret_val = megasas_issue_blocked_abort_cmd(instance, | |
5101 | instance-> | |
cfbe7554 | 5102 | aen_cmd, 30); |
c4a3e0a5 BS |
5103 | |
5104 | if (ret_val) { | |
1be18254 | 5105 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to abort " |
c4a3e0a5 BS |
5106 | "previous AEN command\n"); |
5107 | return ret_val; | |
5108 | } | |
5109 | } | |
5110 | } | |
5111 | ||
5112 | cmd = megasas_get_cmd(instance); | |
5113 | ||
5114 | if (!cmd) | |
5115 | return -ENOMEM; | |
5116 | ||
5117 | dcmd = &cmd->frame->dcmd; | |
5118 | ||
5119 | memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail)); | |
5120 | ||
5121 | /* | |
5122 | * Prepare DCMD for aen registration | |
5123 | */ | |
5124 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
5125 | ||
5126 | dcmd->cmd = MFI_CMD_DCMD; | |
5127 | dcmd->cmd_status = 0x0; | |
5128 | dcmd->sge_count = 1; | |
94cd65dd | 5129 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ); |
c4a3e0a5 | 5130 | dcmd->timeout = 0; |
780a3762 | 5131 | dcmd->pad_0 = 0; |
94cd65dd SS |
5132 | dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail)); |
5133 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT); | |
5134 | dcmd->mbox.w[0] = cpu_to_le32(seq_num); | |
39a98554 | 5135 | instance->last_seq_num = seq_num; |
94cd65dd SS |
5136 | dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word); |
5137 | dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->evt_detail_h); | |
5138 | dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_detail)); | |
c4a3e0a5 | 5139 | |
f4c9a131 YB |
5140 | if (instance->aen_cmd != NULL) { |
5141 | megasas_return_cmd(instance, cmd); | |
5142 | return 0; | |
5143 | } | |
5144 | ||
c4a3e0a5 BS |
5145 | /* |
5146 | * Store reference to the cmd used to register for AEN. When an | |
5147 | * application wants us to register for AEN, we have to abort this | |
5148 | * cmd and re-register with a new EVENT LOCALE supplied by that app | |
5149 | */ | |
5150 | instance->aen_cmd = cmd; | |
5151 | ||
5152 | /* | |
5153 | * Issue the aen registration frame | |
5154 | */ | |
9c915a8c | 5155 | instance->instancet->issue_dcmd(instance, cmd); |
c4a3e0a5 BS |
5156 | |
5157 | return 0; | |
5158 | } | |
5159 | ||
5160 | /** | |
5161 | * megasas_start_aen - Subscribes to AEN during driver load time | |
5162 | * @instance: Adapter soft state | |
5163 | */ | |
5164 | static int megasas_start_aen(struct megasas_instance *instance) | |
5165 | { | |
5166 | struct megasas_evt_log_info eli; | |
5167 | union megasas_evt_class_locale class_locale; | |
5168 | ||
5169 | /* | |
5170 | * Get the latest sequence number from FW | |
5171 | */ | |
5172 | memset(&eli, 0, sizeof(eli)); | |
5173 | ||
5174 | if (megasas_get_seq_num(instance, &eli)) | |
5175 | return -1; | |
5176 | ||
5177 | /* | |
5178 | * Register AEN with FW for latest sequence number plus 1 | |
5179 | */ | |
5180 | class_locale.members.reserved = 0; | |
5181 | class_locale.members.locale = MR_EVT_LOCALE_ALL; | |
5182 | class_locale.members.class = MR_EVT_CLASS_DEBUG; | |
5183 | ||
94cd65dd | 5184 | return megasas_register_aen(instance, |
48100b0e | 5185 | le32_to_cpu(eli.newest_seq_num) + 1, |
94cd65dd | 5186 | class_locale.word); |
c4a3e0a5 BS |
5187 | } |
5188 | ||
5189 | /** | |
5190 | * megasas_io_attach - Attaches this driver to SCSI mid-layer | |
5191 | * @instance: Adapter soft state | |
5192 | */ | |
5193 | static int megasas_io_attach(struct megasas_instance *instance) | |
5194 | { | |
5195 | struct Scsi_Host *host = instance->host; | |
da0dc9fb | 5196 | u32 error; |
c4a3e0a5 BS |
5197 | |
5198 | /* | |
5199 | * Export parameters required by SCSI mid-layer | |
5200 | */ | |
5201 | host->irq = instance->pdev->irq; | |
5202 | host->unique_id = instance->unique_id; | |
ae09a6c1 | 5203 | host->can_queue = instance->max_scsi_cmds; |
c4a3e0a5 BS |
5204 | host->this_id = instance->init_id; |
5205 | host->sg_tablesize = instance->max_num_sge; | |
42a8d2b3 | 5206 | |
5207 | if (instance->fw_support_ieee) | |
5208 | instance->max_sectors_per_req = MEGASAS_MAX_SECTORS_IEEE; | |
5209 | ||
1fd10685 YB |
5210 | /* |
5211 | * Check if the module parameter value for max_sectors can be used | |
5212 | */ | |
5213 | if (max_sectors && max_sectors < instance->max_sectors_per_req) | |
5214 | instance->max_sectors_per_req = max_sectors; | |
5215 | else { | |
5216 | if (max_sectors) { | |
5217 | if (((instance->pdev->device == | |
5218 | PCI_DEVICE_ID_LSI_SAS1078GEN2) || | |
5219 | (instance->pdev->device == | |
5220 | PCI_DEVICE_ID_LSI_SAS0079GEN2)) && | |
5221 | (max_sectors <= MEGASAS_MAX_SECTORS)) { | |
5222 | instance->max_sectors_per_req = max_sectors; | |
5223 | } else { | |
1be18254 | 5224 | dev_info(&instance->pdev->dev, "max_sectors should be > 0" |
1fd10685 YB |
5225 | "and <= %d (or < 1MB for GEN2 controller)\n", |
5226 | instance->max_sectors_per_req); | |
5227 | } | |
5228 | } | |
5229 | } | |
5230 | ||
c4a3e0a5 | 5231 | host->max_sectors = instance->max_sectors_per_req; |
9c915a8c | 5232 | host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN; |
c4a3e0a5 BS |
5233 | host->max_channel = MEGASAS_MAX_CHANNELS - 1; |
5234 | host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL; | |
5235 | host->max_lun = MEGASAS_MAX_LUN; | |
122da302 | 5236 | host->max_cmd_len = 16; |
c4a3e0a5 | 5237 | |
9c915a8c | 5238 | /* Fusion only supports host reset */ |
36807e67 | 5239 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) || |
229fe47c | 5240 | (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) || |
21d3c710 SS |
5241 | (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || |
5242 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) { | |
9c915a8c | 5243 | host->hostt->eh_device_reset_handler = NULL; |
5244 | host->hostt->eh_bus_reset_handler = NULL; | |
5245 | } | |
4026e9aa SS |
5246 | error = scsi_init_shared_tag_map(host, host->can_queue); |
5247 | if (error) { | |
5248 | dev_err(&instance->pdev->dev, | |
5249 | "Failed to shared tag from %s %d\n", | |
5250 | __func__, __LINE__); | |
5251 | return -ENODEV; | |
5252 | } | |
9c915a8c | 5253 | |
c4a3e0a5 BS |
5254 | /* |
5255 | * Notify the mid-layer about the new controller | |
5256 | */ | |
5257 | if (scsi_add_host(host, &instance->pdev->dev)) { | |
4026e9aa SS |
5258 | dev_err(&instance->pdev->dev, |
5259 | "Failed to add host from %s %d\n", | |
5260 | __func__, __LINE__); | |
c4a3e0a5 BS |
5261 | return -ENODEV; |
5262 | } | |
5263 | ||
c4a3e0a5 BS |
5264 | return 0; |
5265 | } | |
5266 | ||
31ea7088 | 5267 | static int |
5268 | megasas_set_dma_mask(struct pci_dev *pdev) | |
5269 | { | |
5270 | /* | |
da0dc9fb | 5271 | * All our controllers are capable of performing 64-bit DMA |
31ea7088 | 5272 | */ |
5273 | if (IS_DMA64) { | |
6a35528a | 5274 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) { |
31ea7088 | 5275 | |
284901a9 | 5276 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) |
31ea7088 | 5277 | goto fail_set_dma_mask; |
5278 | } | |
5279 | } else { | |
284901a9 | 5280 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) |
31ea7088 | 5281 | goto fail_set_dma_mask; |
5282 | } | |
46de63e2 SS |
5283 | /* |
5284 | * Ensure that all data structures are allocated in 32-bit | |
5285 | * memory. | |
5286 | */ | |
5287 | if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) { | |
5288 | /* Try 32bit DMA mask and 32 bit Consistent dma mask */ | |
5289 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) | |
5290 | && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) | |
5291 | dev_info(&pdev->dev, "set 32bit DMA mask" | |
5292 | "and 32 bit consistent mask\n"); | |
5293 | else | |
5294 | goto fail_set_dma_mask; | |
5295 | } | |
94cd65dd | 5296 | |
31ea7088 | 5297 | return 0; |
5298 | ||
5299 | fail_set_dma_mask: | |
5300 | return 1; | |
5301 | } | |
5302 | ||
c4a3e0a5 BS |
5303 | /** |
5304 | * megasas_probe_one - PCI hotplug entry point | |
5305 | * @pdev: PCI device structure | |
0d49016b | 5306 | * @id: PCI ids of supported hotplugged adapter |
c4a3e0a5 | 5307 | */ |
6f039790 GKH |
5308 | static int megasas_probe_one(struct pci_dev *pdev, |
5309 | const struct pci_device_id *id) | |
c4a3e0a5 | 5310 | { |
d3557fc8 | 5311 | int rval, pos; |
c4a3e0a5 BS |
5312 | struct Scsi_Host *host; |
5313 | struct megasas_instance *instance; | |
66192dfe | 5314 | u16 control = 0; |
51087a86 | 5315 | struct fusion_context *fusion = NULL; |
66192dfe | 5316 | |
5317 | /* Reset MSI-X in the kdump kernel */ | |
5318 | if (reset_devices) { | |
5319 | pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX); | |
5320 | if (pos) { | |
99369065 | 5321 | pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS, |
66192dfe | 5322 | &control); |
5323 | if (control & PCI_MSIX_FLAGS_ENABLE) { | |
5324 | dev_info(&pdev->dev, "resetting MSI-X\n"); | |
5325 | pci_write_config_word(pdev, | |
99369065 | 5326 | pos + PCI_MSIX_FLAGS, |
66192dfe | 5327 | control & |
5328 | ~PCI_MSIX_FLAGS_ENABLE); | |
5329 | } | |
5330 | } | |
5331 | } | |
c4a3e0a5 | 5332 | |
c4a3e0a5 BS |
5333 | /* |
5334 | * PCI prepping: enable device set bus mastering and dma mask | |
5335 | */ | |
aeab3fd7 | 5336 | rval = pci_enable_device_mem(pdev); |
c4a3e0a5 BS |
5337 | |
5338 | if (rval) { | |
5339 | return rval; | |
5340 | } | |
5341 | ||
5342 | pci_set_master(pdev); | |
5343 | ||
31ea7088 | 5344 | if (megasas_set_dma_mask(pdev)) |
5345 | goto fail_set_dma_mask; | |
c4a3e0a5 BS |
5346 | |
5347 | host = scsi_host_alloc(&megasas_template, | |
5348 | sizeof(struct megasas_instance)); | |
5349 | ||
5350 | if (!host) { | |
1be18254 | 5351 | dev_printk(KERN_DEBUG, &pdev->dev, "scsi_host_alloc failed\n"); |
c4a3e0a5 BS |
5352 | goto fail_alloc_instance; |
5353 | } | |
5354 | ||
5355 | instance = (struct megasas_instance *)host->hostdata; | |
5356 | memset(instance, 0, sizeof(*instance)); | |
da0dc9fb | 5357 | atomic_set(&instance->fw_reset_no_pci_access, 0); |
9c915a8c | 5358 | instance->pdev = pdev; |
c4a3e0a5 | 5359 | |
9c915a8c | 5360 | switch (instance->pdev->device) { |
5361 | case PCI_DEVICE_ID_LSI_FUSION: | |
229fe47c | 5362 | case PCI_DEVICE_ID_LSI_PLASMA: |
36807e67 | 5363 | case PCI_DEVICE_ID_LSI_INVADER: |
21d3c710 | 5364 | case PCI_DEVICE_ID_LSI_FURY: |
9c915a8c | 5365 | { |
51087a86 SS |
5366 | instance->ctrl_context_pages = |
5367 | get_order(sizeof(struct fusion_context)); | |
5368 | instance->ctrl_context = (void *)__get_free_pages(GFP_KERNEL, | |
5369 | instance->ctrl_context_pages); | |
9c915a8c | 5370 | if (!instance->ctrl_context) { |
1be18254 | 5371 | dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate " |
9c915a8c | 5372 | "memory for Fusion context info\n"); |
5373 | goto fail_alloc_dma_buf; | |
5374 | } | |
5375 | fusion = instance->ctrl_context; | |
d009b576 SS |
5376 | memset(fusion, 0, |
5377 | ((1 << PAGE_SHIFT) << instance->ctrl_context_pages)); | |
9c915a8c | 5378 | } |
5379 | break; | |
5380 | default: /* For all other supported controllers */ | |
5381 | ||
5382 | instance->producer = | |
5383 | pci_alloc_consistent(pdev, sizeof(u32), | |
5384 | &instance->producer_h); | |
5385 | instance->consumer = | |
5386 | pci_alloc_consistent(pdev, sizeof(u32), | |
5387 | &instance->consumer_h); | |
5388 | ||
5389 | if (!instance->producer || !instance->consumer) { | |
1be18254 | 5390 | dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate" |
9c915a8c | 5391 | "memory for producer, consumer\n"); |
5392 | goto fail_alloc_dma_buf; | |
5393 | } | |
c4a3e0a5 | 5394 | |
9c915a8c | 5395 | *instance->producer = 0; |
5396 | *instance->consumer = 0; | |
5397 | break; | |
c4a3e0a5 BS |
5398 | } |
5399 | ||
5765c5b8 SS |
5400 | instance->system_info_buf = pci_zalloc_consistent(pdev, |
5401 | sizeof(struct MR_DRV_SYSTEM_INFO), | |
5402 | &instance->system_info_h); | |
5403 | ||
5404 | if (!instance->system_info_buf) | |
5405 | dev_info(&instance->pdev->dev, "Can't allocate system info buffer\n"); | |
5406 | ||
fc62b3fc SS |
5407 | /* Crash dump feature related initialisation*/ |
5408 | instance->drv_buf_index = 0; | |
5409 | instance->drv_buf_alloc = 0; | |
5410 | instance->crash_dump_fw_support = 0; | |
5411 | instance->crash_dump_app_support = 0; | |
5412 | instance->fw_crash_state = UNAVAILABLE; | |
5413 | spin_lock_init(&instance->crashdump_lock); | |
5414 | instance->crash_dump_buf = NULL; | |
5415 | ||
5416 | if (!reset_devices) | |
5417 | instance->crash_dump_buf = pci_alloc_consistent(pdev, | |
5418 | CRASH_DMA_BUF_SIZE, | |
5419 | &instance->crash_dump_h); | |
5420 | if (!instance->crash_dump_buf) | |
1be18254 | 5421 | dev_err(&pdev->dev, "Can't allocate Firmware " |
fc62b3fc SS |
5422 | "crash dump DMA buffer\n"); |
5423 | ||
c3518837 | 5424 | megasas_poll_wait_aen = 0; |
f4c9a131 | 5425 | instance->flag_ieee = 0; |
7e8a75f4 | 5426 | instance->ev = NULL; |
39a98554 | 5427 | instance->issuepend_done = 1; |
5428 | instance->adprecovery = MEGASAS_HBA_OPERATIONAL; | |
404a8a1a | 5429 | instance->is_imr = 0; |
c4a3e0a5 BS |
5430 | |
5431 | instance->evt_detail = pci_alloc_consistent(pdev, | |
5432 | sizeof(struct | |
5433 | megasas_evt_detail), | |
5434 | &instance->evt_detail_h); | |
5435 | ||
5436 | if (!instance->evt_detail) { | |
1be18254 | 5437 | dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate memory for " |
c4a3e0a5 BS |
5438 | "event detail structure\n"); |
5439 | goto fail_alloc_dma_buf; | |
5440 | } | |
5441 | ||
5442 | /* | |
5443 | * Initialize locks and queues | |
5444 | */ | |
5445 | INIT_LIST_HEAD(&instance->cmd_pool); | |
39a98554 | 5446 | INIT_LIST_HEAD(&instance->internal_reset_pending_q); |
c4a3e0a5 | 5447 | |
e4a082c7 SP |
5448 | atomic_set(&instance->fw_outstanding,0); |
5449 | ||
c4a3e0a5 BS |
5450 | init_waitqueue_head(&instance->int_cmd_wait_q); |
5451 | init_waitqueue_head(&instance->abort_cmd_wait_q); | |
5452 | ||
90dc9d98 | 5453 | spin_lock_init(&instance->mfi_pool_lock); |
39a98554 | 5454 | spin_lock_init(&instance->hba_lock); |
7343eb65 | 5455 | spin_lock_init(&instance->completion_lock); |
c4a3e0a5 | 5456 | |
e5a69e27 | 5457 | mutex_init(&instance->aen_mutex); |
9c915a8c | 5458 | mutex_init(&instance->reset_mutex); |
c4a3e0a5 BS |
5459 | |
5460 | /* | |
5461 | * Initialize PCI related and misc parameters | |
5462 | */ | |
c4a3e0a5 BS |
5463 | instance->host = host; |
5464 | instance->unique_id = pdev->bus->number << 8 | pdev->devfn; | |
5465 | instance->init_id = MEGASAS_DEFAULT_INIT_ID; | |
51087a86 | 5466 | instance->ctrl_info = NULL; |
c4a3e0a5 | 5467 | |
ae09a6c1 | 5468 | |
7bebf5c7 | 5469 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) || |
ae09a6c1 | 5470 | (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) |
f4c9a131 | 5471 | instance->flag_ieee = 1; |
7bebf5c7 | 5472 | |
658dcedb | 5473 | megasas_dbg_lvl = 0; |
05e9ebbe | 5474 | instance->flag = 0; |
0c79e681 | 5475 | instance->unload = 1; |
05e9ebbe | 5476 | instance->last_time = 0; |
39a98554 | 5477 | instance->disableOnlineCtrlReset = 1; |
bc93d425 | 5478 | instance->UnevenSpanSupport = 0; |
39a98554 | 5479 | |
36807e67 | 5480 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) || |
229fe47c | 5481 | (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) || |
21d3c710 | 5482 | (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || |
fc62b3fc | 5483 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) { |
9c915a8c | 5484 | INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq); |
fc62b3fc SS |
5485 | INIT_WORK(&instance->crash_init, megasas_fusion_crash_dump_wq); |
5486 | } else | |
9c915a8c | 5487 | INIT_WORK(&instance->work_init, process_fw_state_change_wq); |
658dcedb | 5488 | |
0a77066a | 5489 | /* |
5490 | * Initialize MFI Firmware | |
5491 | */ | |
5492 | if (megasas_init_fw(instance)) | |
5493 | goto fail_init_mfi; | |
5494 | ||
229fe47c | 5495 | if (instance->requestorId) { |
5496 | if (instance->PlasmaFW111) { | |
5497 | instance->vf_affiliation_111 = | |
5498 | pci_alloc_consistent(pdev, sizeof(struct MR_LD_VF_AFFILIATION_111), | |
5499 | &instance->vf_affiliation_111_h); | |
5500 | if (!instance->vf_affiliation_111) | |
1be18254 | 5501 | dev_warn(&pdev->dev, "Can't allocate " |
229fe47c | 5502 | "memory for VF affiliation buffer\n"); |
5503 | } else { | |
5504 | instance->vf_affiliation = | |
5505 | pci_alloc_consistent(pdev, | |
5506 | (MAX_LOGICAL_DRIVES + 1) * | |
5507 | sizeof(struct MR_LD_VF_AFFILIATION), | |
5508 | &instance->vf_affiliation_h); | |
5509 | if (!instance->vf_affiliation) | |
1be18254 | 5510 | dev_warn(&pdev->dev, "Can't allocate " |
229fe47c | 5511 | "memory for VF affiliation buffer\n"); |
5512 | } | |
5513 | } | |
5514 | ||
c4a3e0a5 BS |
5515 | /* |
5516 | * Store instance in PCI softstate | |
5517 | */ | |
5518 | pci_set_drvdata(pdev, instance); | |
5519 | ||
5520 | /* | |
5521 | * Add this controller to megasas_mgmt_info structure so that it | |
5522 | * can be exported to management applications | |
5523 | */ | |
5524 | megasas_mgmt_info.count++; | |
5525 | megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance; | |
5526 | megasas_mgmt_info.max_index++; | |
5527 | ||
541f90b7 | 5528 | /* |
5529 | * Register with SCSI mid-layer | |
5530 | */ | |
5531 | if (megasas_io_attach(instance)) | |
5532 | goto fail_io_attach; | |
5533 | ||
5534 | instance->unload = 0; | |
aa00832b SS |
5535 | /* |
5536 | * Trigger SCSI to scan our drives | |
5537 | */ | |
5538 | scsi_scan_host(host); | |
541f90b7 | 5539 | |
c4a3e0a5 BS |
5540 | /* |
5541 | * Initiate AEN (Asynchronous Event Notification) | |
5542 | */ | |
5543 | if (megasas_start_aen(instance)) { | |
1be18254 | 5544 | dev_printk(KERN_DEBUG, &pdev->dev, "start aen failed\n"); |
c4a3e0a5 BS |
5545 | goto fail_start_aen; |
5546 | } | |
5547 | ||
9ea81f81 AR |
5548 | /* Get current SR-IOV LD/VF affiliation */ |
5549 | if (instance->requestorId) | |
5550 | megasas_get_ld_vf_affiliation(instance, 1); | |
5551 | ||
c4a3e0a5 BS |
5552 | return 0; |
5553 | ||
da0dc9fb BH |
5554 | fail_start_aen: |
5555 | fail_io_attach: | |
c4a3e0a5 BS |
5556 | megasas_mgmt_info.count--; |
5557 | megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL; | |
5558 | megasas_mgmt_info.max_index--; | |
5559 | ||
d46a3ad6 | 5560 | instance->instancet->disable_intr(instance); |
d3557fc8 SS |
5561 | megasas_destroy_irqs(instance); |
5562 | ||
36807e67 | 5563 | if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) || |
229fe47c | 5564 | (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) || |
21d3c710 SS |
5565 | (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) || |
5566 | (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) | |
eb1b1237 | 5567 | megasas_release_fusion(instance); |
5568 | else | |
5569 | megasas_release_mfi(instance); | |
c8e858fe | 5570 | if (instance->msix_vectors) |
0a77066a | 5571 | pci_disable_msix(instance->pdev); |
d3557fc8 | 5572 | fail_init_mfi: |
da0dc9fb | 5573 | fail_alloc_dma_buf: |
c4a3e0a5 BS |
5574 | if (instance->evt_detail) |
5575 | pci_free_consistent(pdev, sizeof(struct megasas_evt_detail), | |
5576 | instance->evt_detail, | |
5577 | instance->evt_detail_h); | |
5578 | ||
eb1b1237 | 5579 | if (instance->producer) |
c4a3e0a5 BS |
5580 | pci_free_consistent(pdev, sizeof(u32), instance->producer, |
5581 | instance->producer_h); | |
5582 | if (instance->consumer) | |
5583 | pci_free_consistent(pdev, sizeof(u32), instance->consumer, | |
5584 | instance->consumer_h); | |
5585 | scsi_host_put(host); | |
5586 | ||
da0dc9fb BH |
5587 | fail_alloc_instance: |
5588 | fail_set_dma_mask: | |
c4a3e0a5 BS |
5589 | pci_disable_device(pdev); |
5590 | ||
5591 | return -ENODEV; | |
5592 | } | |
5593 | ||
5594 | /** | |
5595 | * megasas_flush_cache - Requests FW to flush all its caches | |
5596 | * @instance: Adapter soft state | |
5597 | */ | |
5598 | static void megasas_flush_cache(struct megasas_instance *instance) | |
5599 | { | |
5600 | struct megasas_cmd *cmd; | |
5601 | struct megasas_dcmd_frame *dcmd; | |
5602 | ||
39a98554 | 5603 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) |
5604 | return; | |
5605 | ||
c4a3e0a5 BS |
5606 | cmd = megasas_get_cmd(instance); |
5607 | ||
5608 | if (!cmd) | |
5609 | return; | |
5610 | ||
5611 | dcmd = &cmd->frame->dcmd; | |
5612 | ||
5613 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
5614 | ||
5615 | dcmd->cmd = MFI_CMD_DCMD; | |
5616 | dcmd->cmd_status = 0x0; | |
5617 | dcmd->sge_count = 0; | |
94cd65dd | 5618 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE); |
c4a3e0a5 | 5619 | dcmd->timeout = 0; |
780a3762 | 5620 | dcmd->pad_0 = 0; |
c4a3e0a5 | 5621 | dcmd->data_xfer_len = 0; |
94cd65dd | 5622 | dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH); |
c4a3e0a5 BS |
5623 | dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE; |
5624 | ||
cfbe7554 SS |
5625 | if (megasas_issue_blocked_cmd(instance, cmd, 30)) |
5626 | dev_err(&instance->pdev->dev, "Command timedout" | |
5627 | " from %s\n", __func__); | |
c4a3e0a5 | 5628 | |
4026e9aa | 5629 | megasas_return_cmd(instance, cmd); |
c4a3e0a5 BS |
5630 | } |
5631 | ||
5632 | /** | |
5633 | * megasas_shutdown_controller - Instructs FW to shutdown the controller | |
5634 | * @instance: Adapter soft state | |
31ea7088 | 5635 | * @opcode: Shutdown/Hibernate |
c4a3e0a5 | 5636 | */ |
31ea7088 | 5637 | static void megasas_shutdown_controller(struct megasas_instance *instance, |
5638 | u32 opcode) | |
c4a3e0a5 BS |
5639 | { |
5640 | struct megasas_cmd *cmd; | |
5641 | struct megasas_dcmd_frame *dcmd; | |
5642 | ||
39a98554 | 5643 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) |
5644 | return; | |
5645 | ||
c4a3e0a5 BS |
5646 | cmd = megasas_get_cmd(instance); |
5647 | ||
5648 | if (!cmd) | |
5649 | return; | |
5650 | ||
5651 | if (instance->aen_cmd) | |
cfbe7554 | 5652 | megasas_issue_blocked_abort_cmd(instance, |
e0bd0874 | 5653 | instance->aen_cmd, MEGASAS_BLOCKED_CMD_TIMEOUT); |
9c915a8c | 5654 | if (instance->map_update_cmd) |
5655 | megasas_issue_blocked_abort_cmd(instance, | |
e0bd0874 | 5656 | instance->map_update_cmd, MEGASAS_BLOCKED_CMD_TIMEOUT); |
3761cb4c | 5657 | if (instance->jbod_seq_cmd) |
5658 | megasas_issue_blocked_abort_cmd(instance, | |
5659 | instance->jbod_seq_cmd, MEGASAS_BLOCKED_CMD_TIMEOUT); | |
5660 | ||
c4a3e0a5 BS |
5661 | dcmd = &cmd->frame->dcmd; |
5662 | ||
5663 | memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE); | |
5664 | ||
5665 | dcmd->cmd = MFI_CMD_DCMD; | |
5666 | dcmd->cmd_status = 0x0; | |
5667 | dcmd->sge_count = 0; | |
94cd65dd | 5668 | dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE); |
c4a3e0a5 | 5669 | dcmd->timeout = 0; |
780a3762 | 5670 | dcmd->pad_0 = 0; |
c4a3e0a5 | 5671 | dcmd->data_xfer_len = 0; |
94cd65dd | 5672 | dcmd->opcode = cpu_to_le32(opcode); |
c4a3e0a5 | 5673 | |
cfbe7554 SS |
5674 | if (megasas_issue_blocked_cmd(instance, cmd, 30)) |
5675 | dev_err(&instance->pdev->dev, "Command timedout" | |
5676 | "from %s\n", __func__); | |
c4a3e0a5 | 5677 | |
4026e9aa | 5678 | megasas_return_cmd(instance, cmd); |
c4a3e0a5 BS |
5679 | } |
5680 | ||
33139b21 | 5681 | #ifdef CONFIG_PM |
31ea7088 | 5682 | /** |
ad84db2e | 5683 | * megasas_suspend - driver suspend entry point |
5684 | * @pdev: PCI device structure | |
31ea7088 | 5685 | * @state: PCI power state to suspend routine |
5686 | */ | |
33139b21 | 5687 | static int |
31ea7088 | 5688 | megasas_suspend(struct pci_dev *pdev, pm_message_t state) |
5689 | { | |
5690 | struct Scsi_Host *host; | |
5691 | struct megasas_instance *instance; | |
5692 | ||
5693 | instance = pci_get_drvdata(pdev); | |
5694 | host = instance->host; | |
0c79e681 | 5695 | instance->unload = 1; |
31ea7088 | 5696 | |
229fe47c | 5697 | /* Shutdown SR-IOV heartbeat timer */ |
5698 | if (instance->requestorId && !instance->skip_heartbeat_timer_del) | |
5699 | del_timer_sync(&instance->sriov_heartbeat_timer); | |
5700 | ||
31ea7088 | 5701 | megasas_flush_cache(instance); |
5702 | megasas_shutdown_controller(instance, MR_DCMD_HIBERNATE_SHUTDOWN); | |
7e8a75f4 YB |
5703 | |
5704 | /* cancel the delayed work if this work still in queue */ | |
5705 | if (instance->ev != NULL) { | |
5706 | struct megasas_aen_event *ev = instance->ev; | |
c1d390d8 | 5707 | cancel_delayed_work_sync(&ev->hotplug_work); |
7e8a75f4 YB |
5708 | instance->ev = NULL; |
5709 | } | |
5710 | ||
31ea7088 | 5711 | tasklet_kill(&instance->isr_tasklet); |
5712 | ||
5713 | pci_set_drvdata(instance->pdev, instance); | |
d46a3ad6 | 5714 | instance->instancet->disable_intr(instance); |
c8e858fe | 5715 | |
d3557fc8 SS |
5716 | megasas_destroy_irqs(instance); |
5717 | ||
c8e858fe | 5718 | if (instance->msix_vectors) |
80d9da98 | 5719 | pci_disable_msix(instance->pdev); |
31ea7088 | 5720 | |
5721 | pci_save_state(pdev); | |
5722 | pci_disable_device(pdev); | |
5723 | ||
5724 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
5725 | ||
5726 | return 0; | |
5727 | } | |
5728 | ||
5729 | /** | |
5730 | * megasas_resume- driver resume entry point | |
5731 | * @pdev: PCI device structure | |
5732 | */ | |
33139b21 | 5733 | static int |
31ea7088 | 5734 | megasas_resume(struct pci_dev *pdev) |
5735 | { | |
d3557fc8 | 5736 | int rval; |
31ea7088 | 5737 | struct Scsi_Host *host; |
5738 | struct megasas_instance *instance; | |
5739 | ||
5740 | instance = pci_get_drvdata(pdev); | |
5741 | host = instance->host; | |
5742 | pci_set_power_state(pdev, PCI_D0); | |
5743 | pci_enable_wake(pdev, PCI_D0, 0); | |
5744 | pci_restore_state(pdev); | |
5745 | ||
5746 | /* | |
5747 | * PCI prepping: enable device set bus mastering and dma mask | |
5748 | */ | |
aeab3fd7 | 5749 | rval = pci_enable_device_mem(pdev); |
31ea7088 | 5750 | |
5751 | if (rval) { | |
1be18254 | 5752 | dev_err(&pdev->dev, "Enable device failed\n"); |
31ea7088 | 5753 | return rval; |
5754 | } | |
5755 | ||
5756 | pci_set_master(pdev); | |
5757 | ||
5758 | if (megasas_set_dma_mask(pdev)) | |
5759 | goto fail_set_dma_mask; | |
5760 | ||
5761 | /* | |
5762 | * Initialize MFI Firmware | |
5763 | */ | |
5764 | ||
31ea7088 | 5765 | atomic_set(&instance->fw_outstanding, 0); |
5766 | ||
5767 | /* | |
5768 | * We expect the FW state to be READY | |
5769 | */ | |
058a8fac | 5770 | if (megasas_transition_to_ready(instance, 0)) |
31ea7088 | 5771 | goto fail_ready_state; |
5772 | ||
3f1abce4 | 5773 | /* Now re-enable MSI-X */ |
dd088128 | 5774 | if (instance->msix_vectors && |
8ae80ed1 AG |
5775 | pci_enable_msix_exact(instance->pdev, instance->msixentry, |
5776 | instance->msix_vectors)) | |
dd088128 | 5777 | goto fail_reenable_msix; |
3f1abce4 | 5778 | |
9c915a8c | 5779 | switch (instance->pdev->device) { |
5780 | case PCI_DEVICE_ID_LSI_FUSION: | |
229fe47c | 5781 | case PCI_DEVICE_ID_LSI_PLASMA: |
36807e67 | 5782 | case PCI_DEVICE_ID_LSI_INVADER: |
21d3c710 | 5783 | case PCI_DEVICE_ID_LSI_FURY: |
9c915a8c | 5784 | { |
5785 | megasas_reset_reply_desc(instance); | |
5786 | if (megasas_ioc_init_fusion(instance)) { | |
5787 | megasas_free_cmds(instance); | |
5788 | megasas_free_cmds_fusion(instance); | |
5789 | goto fail_init_mfi; | |
5790 | } | |
5791 | if (!megasas_get_map_info(instance)) | |
5792 | megasas_sync_map_info(instance); | |
5793 | } | |
5794 | break; | |
5795 | default: | |
5796 | *instance->producer = 0; | |
5797 | *instance->consumer = 0; | |
5798 | if (megasas_issue_init_mfi(instance)) | |
5799 | goto fail_init_mfi; | |
5800 | break; | |
5801 | } | |
31ea7088 | 5802 | |
9c915a8c | 5803 | tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet, |
5804 | (unsigned long)instance); | |
31ea7088 | 5805 | |
d3557fc8 SS |
5806 | if (instance->msix_vectors ? |
5807 | megasas_setup_irqs_msix(instance, 0) : | |
5808 | megasas_setup_irqs_ioapic(instance)) | |
5809 | goto fail_init_mfi; | |
31ea7088 | 5810 | |
229fe47c | 5811 | /* Re-launch SR-IOV heartbeat timer */ |
5812 | if (instance->requestorId) { | |
5813 | if (!megasas_sriov_start_heartbeat(instance, 0)) | |
5814 | megasas_start_timer(instance, | |
5815 | &instance->sriov_heartbeat_timer, | |
5816 | megasas_sriov_heartbeat_handler, | |
5817 | MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF); | |
5765c5b8 | 5818 | else { |
229fe47c | 5819 | instance->skip_heartbeat_timer_del = 1; |
5765c5b8 SS |
5820 | goto fail_init_mfi; |
5821 | } | |
229fe47c | 5822 | } |
5823 | ||
d46a3ad6 | 5824 | instance->instancet->enable_intr(instance); |
3761cb4c | 5825 | megasas_setup_jbod_map(instance); |
0c79e681 YB |
5826 | instance->unload = 0; |
5827 | ||
541f90b7 | 5828 | /* |
5829 | * Initiate AEN (Asynchronous Event Notification) | |
5830 | */ | |
5831 | if (megasas_start_aen(instance)) | |
1be18254 | 5832 | dev_err(&instance->pdev->dev, "Start AEN failed\n"); |
541f90b7 | 5833 | |
31ea7088 | 5834 | return 0; |
5835 | ||
31ea7088 | 5836 | fail_init_mfi: |
5837 | if (instance->evt_detail) | |
5838 | pci_free_consistent(pdev, sizeof(struct megasas_evt_detail), | |
5839 | instance->evt_detail, | |
5840 | instance->evt_detail_h); | |
5841 | ||
5842 | if (instance->producer) | |
5843 | pci_free_consistent(pdev, sizeof(u32), instance->producer, | |
5844 | instance->producer_h); | |
5845 | if (instance->consumer) | |
5846 | pci_free_consistent(pdev, sizeof(u32), instance->consumer, | |
5847 | instance->consumer_h); | |
5848 | scsi_host_put(host); | |
5849 | ||
5850 | fail_set_dma_mask: | |
5851 | fail_ready_state: | |
dd088128 | 5852 | fail_reenable_msix: |
31ea7088 | 5853 | |
5854 | pci_disable_device(pdev); | |
5855 | ||
5856 | return -ENODEV; | |
5857 | } | |
33139b21 JS |
5858 | #else |
5859 | #define megasas_suspend NULL | |
5860 | #define megasas_resume NULL | |
5861 | #endif | |
31ea7088 | 5862 | |
c4a3e0a5 BS |
5863 | /** |
5864 | * megasas_detach_one - PCI hot"un"plug entry point | |
5865 | * @pdev: PCI device structure | |
5866 | */ | |
6f039790 | 5867 | static void megasas_detach_one(struct pci_dev *pdev) |
c4a3e0a5 BS |
5868 | { |
5869 | int i; | |
5870 | struct Scsi_Host *host; | |
5871 | struct megasas_instance *instance; | |
9c915a8c | 5872 | struct fusion_context *fusion; |
3761cb4c | 5873 | u32 pd_seq_map_sz; |
c4a3e0a5 BS |
5874 | |
5875 | instance = pci_get_drvdata(pdev); | |
c3518837 | 5876 | instance->unload = 1; |
c4a3e0a5 | 5877 | host = instance->host; |
9c915a8c | 5878 | fusion = instance->ctrl_context; |
c4a3e0a5 | 5879 | |
229fe47c | 5880 | /* Shutdown SR-IOV heartbeat timer */ |
5881 | if (instance->requestorId && !instance->skip_heartbeat_timer_del) | |
5882 | del_timer_sync(&instance->sriov_heartbeat_timer); | |
5883 | ||
fc62b3fc SS |
5884 | if (instance->fw_crash_state != UNAVAILABLE) |
5885 | megasas_free_host_crash_buffer(instance); | |
c4a3e0a5 BS |
5886 | scsi_remove_host(instance->host); |
5887 | megasas_flush_cache(instance); | |
31ea7088 | 5888 | megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN); |
7e8a75f4 YB |
5889 | |
5890 | /* cancel the delayed work if this work still in queue*/ | |
5891 | if (instance->ev != NULL) { | |
5892 | struct megasas_aen_event *ev = instance->ev; | |
c1d390d8 | 5893 | cancel_delayed_work_sync(&ev->hotplug_work); |
7e8a75f4 YB |
5894 | instance->ev = NULL; |
5895 | } | |
5896 | ||
cfbe7554 SS |
5897 | /* cancel all wait events */ |
5898 | wake_up_all(&instance->int_cmd_wait_q); | |
5899 | ||
5d018ad0 | 5900 | tasklet_kill(&instance->isr_tasklet); |
c4a3e0a5 BS |
5901 | |
5902 | /* | |
5903 | * Take the instance off the instance array. Note that we will not | |
5904 | * decrement the max_index. We let this array be sparse array | |
5905 | */ | |
5906 | for (i = 0; i < megasas_mgmt_info.max_index; i++) { | |
5907 | if (megasas_mgmt_info.instance[i] == instance) { | |
5908 | megasas_mgmt_info.count--; | |
5909 | megasas_mgmt_info.instance[i] = NULL; | |
5910 | ||
5911 | break; | |
5912 | } | |
5913 | } | |
5914 | ||
d46a3ad6 | 5915 | instance->instancet->disable_intr(instance); |
c4a3e0a5 | 5916 | |
d3557fc8 SS |
5917 | megasas_destroy_irqs(instance); |
5918 | ||
c8e858fe | 5919 | if (instance->msix_vectors) |
80d9da98 | 5920 | pci_disable_msix(instance->pdev); |
c4a3e0a5 | 5921 | |
9c915a8c | 5922 | switch (instance->pdev->device) { |
5923 | case PCI_DEVICE_ID_LSI_FUSION: | |
229fe47c | 5924 | case PCI_DEVICE_ID_LSI_PLASMA: |
36807e67 | 5925 | case PCI_DEVICE_ID_LSI_INVADER: |
21d3c710 | 5926 | case PCI_DEVICE_ID_LSI_FURY: |
9c915a8c | 5927 | megasas_release_fusion(instance); |
3761cb4c | 5928 | pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) + |
5929 | (sizeof(struct MR_PD_CFG_SEQ) * | |
5930 | (MAX_PHYSICAL_DEVICES - 1)); | |
51087a86 | 5931 | for (i = 0; i < 2 ; i++) { |
9c915a8c | 5932 | if (fusion->ld_map[i]) |
5933 | dma_free_coherent(&instance->pdev->dev, | |
51087a86 | 5934 | fusion->max_map_sz, |
9c915a8c | 5935 | fusion->ld_map[i], |
51087a86 SS |
5936 | fusion->ld_map_phys[i]); |
5937 | if (fusion->ld_drv_map[i]) | |
5938 | free_pages((ulong)fusion->ld_drv_map[i], | |
5939 | fusion->drv_map_pages); | |
3761cb4c | 5940 | if (fusion->pd_seq_sync) |
5941 | dma_free_coherent(&instance->pdev->dev, | |
5942 | pd_seq_map_sz, | |
5943 | fusion->pd_seq_sync[i], | |
5944 | fusion->pd_seq_phys[i]); | |
51087a86 SS |
5945 | } |
5946 | free_pages((ulong)instance->ctrl_context, | |
5947 | instance->ctrl_context_pages); | |
9c915a8c | 5948 | break; |
5949 | default: | |
5950 | megasas_release_mfi(instance); | |
9c915a8c | 5951 | pci_free_consistent(pdev, sizeof(u32), |
5952 | instance->producer, | |
5953 | instance->producer_h); | |
5954 | pci_free_consistent(pdev, sizeof(u32), | |
5955 | instance->consumer, | |
5956 | instance->consumer_h); | |
5957 | break; | |
5958 | } | |
c4a3e0a5 | 5959 | |
51087a86 SS |
5960 | kfree(instance->ctrl_info); |
5961 | ||
105900d5 SS |
5962 | if (instance->evt_detail) |
5963 | pci_free_consistent(pdev, sizeof(struct megasas_evt_detail), | |
5964 | instance->evt_detail, instance->evt_detail_h); | |
229fe47c | 5965 | |
5966 | if (instance->vf_affiliation) | |
5967 | pci_free_consistent(pdev, (MAX_LOGICAL_DRIVES + 1) * | |
5968 | sizeof(struct MR_LD_VF_AFFILIATION), | |
5969 | instance->vf_affiliation, | |
5970 | instance->vf_affiliation_h); | |
5971 | ||
5972 | if (instance->vf_affiliation_111) | |
5973 | pci_free_consistent(pdev, | |
5974 | sizeof(struct MR_LD_VF_AFFILIATION_111), | |
5975 | instance->vf_affiliation_111, | |
5976 | instance->vf_affiliation_111_h); | |
5977 | ||
5978 | if (instance->hb_host_mem) | |
5979 | pci_free_consistent(pdev, sizeof(struct MR_CTRL_HB_HOST_MEM), | |
5980 | instance->hb_host_mem, | |
5981 | instance->hb_host_mem_h); | |
5982 | ||
fc62b3fc SS |
5983 | if (instance->crash_dump_buf) |
5984 | pci_free_consistent(pdev, CRASH_DMA_BUF_SIZE, | |
5985 | instance->crash_dump_buf, instance->crash_dump_h); | |
5986 | ||
5765c5b8 SS |
5987 | if (instance->system_info_buf) |
5988 | pci_free_consistent(pdev, sizeof(struct MR_DRV_SYSTEM_INFO), | |
5989 | instance->system_info_buf, instance->system_info_h); | |
5990 | ||
c4a3e0a5 BS |
5991 | scsi_host_put(host); |
5992 | ||
c4a3e0a5 | 5993 | pci_disable_device(pdev); |
c4a3e0a5 BS |
5994 | } |
5995 | ||
5996 | /** | |
5997 | * megasas_shutdown - Shutdown entry point | |
5998 | * @device: Generic device structure | |
5999 | */ | |
6000 | static void megasas_shutdown(struct pci_dev *pdev) | |
6001 | { | |
6002 | struct megasas_instance *instance = pci_get_drvdata(pdev); | |
c8e858fe | 6003 | |
0c79e681 | 6004 | instance->unload = 1; |
c4a3e0a5 | 6005 | megasas_flush_cache(instance); |
530e6fc1 | 6006 | megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN); |
d46a3ad6 | 6007 | instance->instancet->disable_intr(instance); |
d3557fc8 SS |
6008 | megasas_destroy_irqs(instance); |
6009 | ||
c8e858fe | 6010 | if (instance->msix_vectors) |
46fd256e | 6011 | pci_disable_msix(instance->pdev); |
c4a3e0a5 BS |
6012 | } |
6013 | ||
6014 | /** | |
6015 | * megasas_mgmt_open - char node "open" entry point | |
6016 | */ | |
6017 | static int megasas_mgmt_open(struct inode *inode, struct file *filep) | |
6018 | { | |
6019 | /* | |
6020 | * Allow only those users with admin rights | |
6021 | */ | |
6022 | if (!capable(CAP_SYS_ADMIN)) | |
6023 | return -EACCES; | |
6024 | ||
6025 | return 0; | |
6026 | } | |
6027 | ||
c4a3e0a5 BS |
6028 | /** |
6029 | * megasas_mgmt_fasync - Async notifier registration from applications | |
6030 | * | |
6031 | * This function adds the calling process to a driver global queue. When an | |
6032 | * event occurs, SIGIO will be sent to all processes in this queue. | |
6033 | */ | |
6034 | static int megasas_mgmt_fasync(int fd, struct file *filep, int mode) | |
6035 | { | |
6036 | int rc; | |
6037 | ||
0b950672 | 6038 | mutex_lock(&megasas_async_queue_mutex); |
c4a3e0a5 BS |
6039 | |
6040 | rc = fasync_helper(fd, filep, mode, &megasas_async_queue); | |
6041 | ||
0b950672 | 6042 | mutex_unlock(&megasas_async_queue_mutex); |
c4a3e0a5 BS |
6043 | |
6044 | if (rc >= 0) { | |
6045 | /* For sanity check when we get ioctl */ | |
6046 | filep->private_data = filep; | |
6047 | return 0; | |
6048 | } | |
6049 | ||
6050 | printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc); | |
6051 | ||
6052 | return rc; | |
6053 | } | |
6054 | ||
c3518837 YB |
6055 | /** |
6056 | * megasas_mgmt_poll - char node "poll" entry point | |
6057 | * */ | |
6058 | static unsigned int megasas_mgmt_poll(struct file *file, poll_table *wait) | |
6059 | { | |
6060 | unsigned int mask; | |
6061 | unsigned long flags; | |
da0dc9fb | 6062 | |
c3518837 YB |
6063 | poll_wait(file, &megasas_poll_wait, wait); |
6064 | spin_lock_irqsave(&poll_aen_lock, flags); | |
6065 | if (megasas_poll_wait_aen) | |
da0dc9fb | 6066 | mask = (POLLIN | POLLRDNORM); |
c3518837 YB |
6067 | else |
6068 | mask = 0; | |
51087a86 | 6069 | megasas_poll_wait_aen = 0; |
c3518837 YB |
6070 | spin_unlock_irqrestore(&poll_aen_lock, flags); |
6071 | return mask; | |
6072 | } | |
6073 | ||
fc62b3fc SS |
6074 | /* |
6075 | * megasas_set_crash_dump_params_ioctl: | |
6076 | * Send CRASH_DUMP_MODE DCMD to all controllers | |
6077 | * @cmd: MFI command frame | |
6078 | */ | |
6079 | ||
da0dc9fb | 6080 | static int megasas_set_crash_dump_params_ioctl(struct megasas_cmd *cmd) |
fc62b3fc SS |
6081 | { |
6082 | struct megasas_instance *local_instance; | |
6083 | int i, error = 0; | |
6084 | int crash_support; | |
6085 | ||
6086 | crash_support = cmd->frame->dcmd.mbox.w[0]; | |
6087 | ||
6088 | for (i = 0; i < megasas_mgmt_info.max_index; i++) { | |
6089 | local_instance = megasas_mgmt_info.instance[i]; | |
6090 | if (local_instance && local_instance->crash_dump_drv_support) { | |
6091 | if ((local_instance->adprecovery == | |
6092 | MEGASAS_HBA_OPERATIONAL) && | |
6093 | !megasas_set_crash_dump_params(local_instance, | |
6094 | crash_support)) { | |
6095 | local_instance->crash_dump_app_support = | |
6096 | crash_support; | |
6097 | dev_info(&local_instance->pdev->dev, | |
6098 | "Application firmware crash " | |
6099 | "dump mode set success\n"); | |
6100 | error = 0; | |
6101 | } else { | |
6102 | dev_info(&local_instance->pdev->dev, | |
6103 | "Application firmware crash " | |
6104 | "dump mode set failed\n"); | |
6105 | error = -1; | |
6106 | } | |
6107 | } | |
6108 | } | |
6109 | return error; | |
6110 | } | |
6111 | ||
c4a3e0a5 BS |
6112 | /** |
6113 | * megasas_mgmt_fw_ioctl - Issues management ioctls to FW | |
6114 | * @instance: Adapter soft state | |
6115 | * @argp: User's ioctl packet | |
6116 | */ | |
6117 | static int | |
6118 | megasas_mgmt_fw_ioctl(struct megasas_instance *instance, | |
6119 | struct megasas_iocpacket __user * user_ioc, | |
6120 | struct megasas_iocpacket *ioc) | |
6121 | { | |
6122 | struct megasas_sge32 *kern_sge32; | |
6123 | struct megasas_cmd *cmd; | |
6124 | void *kbuff_arr[MAX_IOCTL_SGE]; | |
6125 | dma_addr_t buf_handle = 0; | |
6126 | int error = 0, i; | |
6127 | void *sense = NULL; | |
6128 | dma_addr_t sense_handle; | |
7b2519af | 6129 | unsigned long *sense_ptr; |
c4a3e0a5 BS |
6130 | |
6131 | memset(kbuff_arr, 0, sizeof(kbuff_arr)); | |
6132 | ||
6133 | if (ioc->sge_count > MAX_IOCTL_SGE) { | |
1be18254 | 6134 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "SGE count [%d] > max limit [%d]\n", |
c4a3e0a5 BS |
6135 | ioc->sge_count, MAX_IOCTL_SGE); |
6136 | return -EINVAL; | |
6137 | } | |
6138 | ||
6139 | cmd = megasas_get_cmd(instance); | |
6140 | if (!cmd) { | |
1be18254 | 6141 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a cmd packet\n"); |
c4a3e0a5 BS |
6142 | return -ENOMEM; |
6143 | } | |
6144 | ||
6145 | /* | |
6146 | * User's IOCTL packet has 2 frames (maximum). Copy those two | |
6147 | * frames into our cmd's frames. cmd->frame's context will get | |
6148 | * overwritten when we copy from user's frames. So set that value | |
6149 | * alone separately | |
6150 | */ | |
6151 | memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE); | |
94cd65dd | 6152 | cmd->frame->hdr.context = cpu_to_le32(cmd->index); |
c3518837 | 6153 | cmd->frame->hdr.pad_0 = 0; |
94cd65dd SS |
6154 | cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_IEEE | |
6155 | MFI_FRAME_SGL64 | | |
6156 | MFI_FRAME_SENSE64)); | |
c4a3e0a5 | 6157 | |
fc62b3fc SS |
6158 | if (cmd->frame->dcmd.opcode == MR_DRIVER_SET_APP_CRASHDUMP_MODE) { |
6159 | error = megasas_set_crash_dump_params_ioctl(cmd); | |
6160 | megasas_return_cmd(instance, cmd); | |
6161 | return error; | |
6162 | } | |
6163 | ||
c4a3e0a5 BS |
6164 | /* |
6165 | * The management interface between applications and the fw uses | |
6166 | * MFI frames. E.g, RAID configuration changes, LD property changes | |
6167 | * etc are accomplishes through different kinds of MFI frames. The | |
6168 | * driver needs to care only about substituting user buffers with | |
6169 | * kernel buffers in SGLs. The location of SGL is embedded in the | |
6170 | * struct iocpacket itself. | |
6171 | */ | |
6172 | kern_sge32 = (struct megasas_sge32 *) | |
6173 | ((unsigned long)cmd->frame + ioc->sgl_off); | |
6174 | ||
6175 | /* | |
6176 | * For each user buffer, create a mirror buffer and copy in | |
6177 | */ | |
6178 | for (i = 0; i < ioc->sge_count; i++) { | |
98cb7e44 BM |
6179 | if (!ioc->sgl[i].iov_len) |
6180 | continue; | |
6181 | ||
9f35fa8a | 6182 | kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev, |
c4a3e0a5 | 6183 | ioc->sgl[i].iov_len, |
9f35fa8a | 6184 | &buf_handle, GFP_KERNEL); |
c4a3e0a5 | 6185 | if (!kbuff_arr[i]) { |
1be18254 BH |
6186 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc " |
6187 | "kernel SGL buffer for IOCTL\n"); | |
c4a3e0a5 BS |
6188 | error = -ENOMEM; |
6189 | goto out; | |
6190 | } | |
6191 | ||
6192 | /* | |
6193 | * We don't change the dma_coherent_mask, so | |
6194 | * pci_alloc_consistent only returns 32bit addresses | |
6195 | */ | |
94cd65dd SS |
6196 | kern_sge32[i].phys_addr = cpu_to_le32(buf_handle); |
6197 | kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len); | |
c4a3e0a5 BS |
6198 | |
6199 | /* | |
6200 | * We created a kernel buffer corresponding to the | |
6201 | * user buffer. Now copy in from the user buffer | |
6202 | */ | |
6203 | if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base, | |
6204 | (u32) (ioc->sgl[i].iov_len))) { | |
6205 | error = -EFAULT; | |
6206 | goto out; | |
6207 | } | |
6208 | } | |
6209 | ||
6210 | if (ioc->sense_len) { | |
9f35fa8a SP |
6211 | sense = dma_alloc_coherent(&instance->pdev->dev, ioc->sense_len, |
6212 | &sense_handle, GFP_KERNEL); | |
c4a3e0a5 BS |
6213 | if (!sense) { |
6214 | error = -ENOMEM; | |
6215 | goto out; | |
6216 | } | |
6217 | ||
6218 | sense_ptr = | |
7b2519af | 6219 | (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off); |
94cd65dd | 6220 | *sense_ptr = cpu_to_le32(sense_handle); |
c4a3e0a5 BS |
6221 | } |
6222 | ||
6223 | /* | |
6224 | * Set the sync_cmd flag so that the ISR knows not to complete this | |
6225 | * cmd to the SCSI mid-layer | |
6226 | */ | |
6227 | cmd->sync_cmd = 1; | |
cfbe7554 | 6228 | megasas_issue_blocked_cmd(instance, cmd, 0); |
c4a3e0a5 BS |
6229 | cmd->sync_cmd = 0; |
6230 | ||
aa00832b SS |
6231 | if (instance->unload == 1) { |
6232 | dev_info(&instance->pdev->dev, "Driver unload is in progress " | |
6233 | "don't submit data to application\n"); | |
6234 | goto out; | |
6235 | } | |
c4a3e0a5 BS |
6236 | /* |
6237 | * copy out the kernel buffers to user buffers | |
6238 | */ | |
6239 | for (i = 0; i < ioc->sge_count; i++) { | |
6240 | if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i], | |
6241 | ioc->sgl[i].iov_len)) { | |
6242 | error = -EFAULT; | |
6243 | goto out; | |
6244 | } | |
6245 | } | |
6246 | ||
6247 | /* | |
6248 | * copy out the sense | |
6249 | */ | |
6250 | if (ioc->sense_len) { | |
6251 | /* | |
b70a41e0 | 6252 | * sense_ptr points to the location that has the user |
c4a3e0a5 BS |
6253 | * sense buffer address |
6254 | */ | |
7b2519af YB |
6255 | sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw + |
6256 | ioc->sense_off); | |
c4a3e0a5 | 6257 | |
b70a41e0 | 6258 | if (copy_to_user((void __user *)((unsigned long)(*sense_ptr)), |
6259 | sense, ioc->sense_len)) { | |
1be18254 | 6260 | dev_err(&instance->pdev->dev, "Failed to copy out to user " |
b10c36a5 | 6261 | "sense data\n"); |
c4a3e0a5 BS |
6262 | error = -EFAULT; |
6263 | goto out; | |
6264 | } | |
6265 | } | |
6266 | ||
6267 | /* | |
6268 | * copy the status codes returned by the fw | |
6269 | */ | |
6270 | if (copy_to_user(&user_ioc->frame.hdr.cmd_status, | |
6271 | &cmd->frame->hdr.cmd_status, sizeof(u8))) { | |
1be18254 | 6272 | dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error copying out cmd_status\n"); |
c4a3e0a5 BS |
6273 | error = -EFAULT; |
6274 | } | |
6275 | ||
da0dc9fb | 6276 | out: |
c4a3e0a5 | 6277 | if (sense) { |
9f35fa8a | 6278 | dma_free_coherent(&instance->pdev->dev, ioc->sense_len, |
c4a3e0a5 BS |
6279 | sense, sense_handle); |
6280 | } | |
6281 | ||
7a6a731b BM |
6282 | for (i = 0; i < ioc->sge_count; i++) { |
6283 | if (kbuff_arr[i]) | |
6284 | dma_free_coherent(&instance->pdev->dev, | |
94cd65dd | 6285 | le32_to_cpu(kern_sge32[i].length), |
7a6a731b | 6286 | kbuff_arr[i], |
94cd65dd | 6287 | le32_to_cpu(kern_sge32[i].phys_addr)); |
90dc9d98 | 6288 | kbuff_arr[i] = NULL; |
c4a3e0a5 BS |
6289 | } |
6290 | ||
4026e9aa | 6291 | megasas_return_cmd(instance, cmd); |
c4a3e0a5 BS |
6292 | return error; |
6293 | } | |
6294 | ||
c4a3e0a5 BS |
6295 | static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg) |
6296 | { | |
6297 | struct megasas_iocpacket __user *user_ioc = | |
6298 | (struct megasas_iocpacket __user *)arg; | |
6299 | struct megasas_iocpacket *ioc; | |
6300 | struct megasas_instance *instance; | |
6301 | int error; | |
39a98554 | 6302 | int i; |
6303 | unsigned long flags; | |
6304 | u32 wait_time = MEGASAS_RESET_WAIT_TIME; | |
c4a3e0a5 BS |
6305 | |
6306 | ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); | |
6307 | if (!ioc) | |
6308 | return -ENOMEM; | |
6309 | ||
6310 | if (copy_from_user(ioc, user_ioc, sizeof(*ioc))) { | |
6311 | error = -EFAULT; | |
6312 | goto out_kfree_ioc; | |
6313 | } | |
6314 | ||
6315 | instance = megasas_lookup_instance(ioc->host_no); | |
6316 | if (!instance) { | |
6317 | error = -ENODEV; | |
6318 | goto out_kfree_ioc; | |
6319 | } | |
6320 | ||
229fe47c | 6321 | /* Adjust ioctl wait time for VF mode */ |
6322 | if (instance->requestorId) | |
6323 | wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF; | |
6324 | ||
6325 | /* Block ioctls in VF mode */ | |
6326 | if (instance->requestorId && !allow_vf_ioctls) { | |
6327 | error = -ENODEV; | |
6328 | goto out_kfree_ioc; | |
6329 | } | |
6330 | ||
39a98554 | 6331 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) { |
1be18254 | 6332 | dev_err(&instance->pdev->dev, "Controller in crit error\n"); |
0c79e681 YB |
6333 | error = -ENODEV; |
6334 | goto out_kfree_ioc; | |
6335 | } | |
6336 | ||
6337 | if (instance->unload == 1) { | |
6338 | error = -ENODEV; | |
6339 | goto out_kfree_ioc; | |
6340 | } | |
6341 | ||
c4a3e0a5 BS |
6342 | if (down_interruptible(&instance->ioctl_sem)) { |
6343 | error = -ERESTARTSYS; | |
6344 | goto out_kfree_ioc; | |
6345 | } | |
39a98554 | 6346 | |
6347 | for (i = 0; i < wait_time; i++) { | |
6348 | ||
6349 | spin_lock_irqsave(&instance->hba_lock, flags); | |
6350 | if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) { | |
6351 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
6352 | break; | |
6353 | } | |
6354 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
6355 | ||
6356 | if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) { | |
1be18254 | 6357 | dev_notice(&instance->pdev->dev, "waiting" |
39a98554 | 6358 | "for controller reset to finish\n"); |
6359 | } | |
6360 | ||
6361 | msleep(1000); | |
6362 | } | |
6363 | ||
6364 | spin_lock_irqsave(&instance->hba_lock, flags); | |
6365 | if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) { | |
6366 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
6367 | ||
1be18254 | 6368 | dev_err(&instance->pdev->dev, "timed out while" |
39a98554 | 6369 | "waiting for HBA to recover\n"); |
6370 | error = -ENODEV; | |
c64e483e | 6371 | goto out_up; |
39a98554 | 6372 | } |
6373 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
6374 | ||
c4a3e0a5 | 6375 | error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc); |
da0dc9fb | 6376 | out_up: |
c4a3e0a5 BS |
6377 | up(&instance->ioctl_sem); |
6378 | ||
da0dc9fb | 6379 | out_kfree_ioc: |
c4a3e0a5 BS |
6380 | kfree(ioc); |
6381 | return error; | |
6382 | } | |
6383 | ||
6384 | static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg) | |
6385 | { | |
6386 | struct megasas_instance *instance; | |
6387 | struct megasas_aen aen; | |
6388 | int error; | |
39a98554 | 6389 | int i; |
6390 | unsigned long flags; | |
6391 | u32 wait_time = MEGASAS_RESET_WAIT_TIME; | |
c4a3e0a5 BS |
6392 | |
6393 | if (file->private_data != file) { | |
6394 | printk(KERN_DEBUG "megasas: fasync_helper was not " | |
6395 | "called first\n"); | |
6396 | return -EINVAL; | |
6397 | } | |
6398 | ||
6399 | if (copy_from_user(&aen, (void __user *)arg, sizeof(aen))) | |
6400 | return -EFAULT; | |
6401 | ||
6402 | instance = megasas_lookup_instance(aen.host_no); | |
6403 | ||
6404 | if (!instance) | |
6405 | return -ENODEV; | |
6406 | ||
39a98554 | 6407 | if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) { |
6408 | return -ENODEV; | |
0c79e681 YB |
6409 | } |
6410 | ||
6411 | if (instance->unload == 1) { | |
6412 | return -ENODEV; | |
6413 | } | |
6414 | ||
39a98554 | 6415 | for (i = 0; i < wait_time; i++) { |
6416 | ||
6417 | spin_lock_irqsave(&instance->hba_lock, flags); | |
6418 | if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) { | |
6419 | spin_unlock_irqrestore(&instance->hba_lock, | |
6420 | flags); | |
6421 | break; | |
6422 | } | |
6423 | ||
6424 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
6425 | ||
6426 | if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) { | |
1be18254 | 6427 | dev_notice(&instance->pdev->dev, "waiting for" |
39a98554 | 6428 | "controller reset to finish\n"); |
6429 | } | |
6430 | ||
6431 | msleep(1000); | |
6432 | } | |
6433 | ||
6434 | spin_lock_irqsave(&instance->hba_lock, flags); | |
6435 | if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) { | |
6436 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
1be18254 BH |
6437 | dev_err(&instance->pdev->dev, "timed out while waiting" |
6438 | "for HBA to recover\n"); | |
39a98554 | 6439 | return -ENODEV; |
6440 | } | |
6441 | spin_unlock_irqrestore(&instance->hba_lock, flags); | |
6442 | ||
e5a69e27 | 6443 | mutex_lock(&instance->aen_mutex); |
c4a3e0a5 BS |
6444 | error = megasas_register_aen(instance, aen.seq_num, |
6445 | aen.class_locale_word); | |
e5a69e27 | 6446 | mutex_unlock(&instance->aen_mutex); |
c4a3e0a5 BS |
6447 | return error; |
6448 | } | |
6449 | ||
6450 | /** | |
6451 | * megasas_mgmt_ioctl - char node ioctl entry point | |
6452 | */ | |
6453 | static long | |
6454 | megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
6455 | { | |
6456 | switch (cmd) { | |
6457 | case MEGASAS_IOC_FIRMWARE: | |
6458 | return megasas_mgmt_ioctl_fw(file, arg); | |
6459 | ||
6460 | case MEGASAS_IOC_GET_AEN: | |
6461 | return megasas_mgmt_ioctl_aen(file, arg); | |
6462 | } | |
6463 | ||
6464 | return -ENOTTY; | |
6465 | } | |
6466 | ||
6467 | #ifdef CONFIG_COMPAT | |
6468 | static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg) | |
6469 | { | |
6470 | struct compat_megasas_iocpacket __user *cioc = | |
6471 | (struct compat_megasas_iocpacket __user *)arg; | |
6472 | struct megasas_iocpacket __user *ioc = | |
6473 | compat_alloc_user_space(sizeof(struct megasas_iocpacket)); | |
6474 | int i; | |
6475 | int error = 0; | |
b3dc1a21 | 6476 | compat_uptr_t ptr; |
c4a3e0a5 | 6477 | |
83aabc1b JG |
6478 | if (clear_user(ioc, sizeof(*ioc))) |
6479 | return -EFAULT; | |
c4a3e0a5 BS |
6480 | |
6481 | if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) || | |
6482 | copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) || | |
6483 | copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) || | |
6484 | copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) || | |
6485 | copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) || | |
6486 | copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32))) | |
6487 | return -EFAULT; | |
6488 | ||
b3dc1a21 TH |
6489 | /* |
6490 | * The sense_ptr is used in megasas_mgmt_fw_ioctl only when | |
6491 | * sense_len is not null, so prepare the 64bit value under | |
6492 | * the same condition. | |
6493 | */ | |
6494 | if (ioc->sense_len) { | |
6495 | void __user **sense_ioc_ptr = | |
6496 | (void __user **)(ioc->frame.raw + ioc->sense_off); | |
6497 | compat_uptr_t *sense_cioc_ptr = | |
6498 | (compat_uptr_t *)(cioc->frame.raw + cioc->sense_off); | |
6499 | if (get_user(ptr, sense_cioc_ptr) || | |
6500 | put_user(compat_ptr(ptr), sense_ioc_ptr)) | |
6501 | return -EFAULT; | |
6502 | } | |
c4a3e0a5 | 6503 | |
b3dc1a21 | 6504 | for (i = 0; i < MAX_IOCTL_SGE; i++) { |
c4a3e0a5 BS |
6505 | if (get_user(ptr, &cioc->sgl[i].iov_base) || |
6506 | put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) || | |
6507 | copy_in_user(&ioc->sgl[i].iov_len, | |
6508 | &cioc->sgl[i].iov_len, sizeof(compat_size_t))) | |
6509 | return -EFAULT; | |
6510 | } | |
6511 | ||
6512 | error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc); | |
6513 | ||
6514 | if (copy_in_user(&cioc->frame.hdr.cmd_status, | |
6515 | &ioc->frame.hdr.cmd_status, sizeof(u8))) { | |
6516 | printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n"); | |
6517 | return -EFAULT; | |
6518 | } | |
6519 | return error; | |
6520 | } | |
6521 | ||
6522 | static long | |
6523 | megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd, | |
6524 | unsigned long arg) | |
6525 | { | |
6526 | switch (cmd) { | |
cb59aa6a SP |
6527 | case MEGASAS_IOC_FIRMWARE32: |
6528 | return megasas_mgmt_compat_ioctl_fw(file, arg); | |
c4a3e0a5 BS |
6529 | case MEGASAS_IOC_GET_AEN: |
6530 | return megasas_mgmt_ioctl_aen(file, arg); | |
6531 | } | |
6532 | ||
6533 | return -ENOTTY; | |
6534 | } | |
6535 | #endif | |
6536 | ||
6537 | /* | |
6538 | * File operations structure for management interface | |
6539 | */ | |
00977a59 | 6540 | static const struct file_operations megasas_mgmt_fops = { |
c4a3e0a5 BS |
6541 | .owner = THIS_MODULE, |
6542 | .open = megasas_mgmt_open, | |
c4a3e0a5 BS |
6543 | .fasync = megasas_mgmt_fasync, |
6544 | .unlocked_ioctl = megasas_mgmt_ioctl, | |
c3518837 | 6545 | .poll = megasas_mgmt_poll, |
c4a3e0a5 BS |
6546 | #ifdef CONFIG_COMPAT |
6547 | .compat_ioctl = megasas_mgmt_compat_ioctl, | |
6548 | #endif | |
6038f373 | 6549 | .llseek = noop_llseek, |
c4a3e0a5 BS |
6550 | }; |
6551 | ||
6552 | /* | |
6553 | * PCI hotplug support registration structure | |
6554 | */ | |
6555 | static struct pci_driver megasas_pci_driver = { | |
6556 | ||
6557 | .name = "megaraid_sas", | |
6558 | .id_table = megasas_pci_table, | |
6559 | .probe = megasas_probe_one, | |
6f039790 | 6560 | .remove = megasas_detach_one, |
31ea7088 | 6561 | .suspend = megasas_suspend, |
6562 | .resume = megasas_resume, | |
c4a3e0a5 BS |
6563 | .shutdown = megasas_shutdown, |
6564 | }; | |
6565 | ||
6566 | /* | |
6567 | * Sysfs driver attributes | |
6568 | */ | |
6569 | static ssize_t megasas_sysfs_show_version(struct device_driver *dd, char *buf) | |
6570 | { | |
6571 | return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n", | |
6572 | MEGASAS_VERSION); | |
6573 | } | |
6574 | ||
6575 | static DRIVER_ATTR(version, S_IRUGO, megasas_sysfs_show_version, NULL); | |
6576 | ||
09fced19 SS |
6577 | static ssize_t |
6578 | megasas_sysfs_show_release_date(struct device_driver *dd, char *buf) | |
6579 | { | |
6580 | return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n", | |
6581 | MEGASAS_RELDATE); | |
6582 | } | |
6583 | ||
6584 | static DRIVER_ATTR(release_date, S_IRUGO, megasas_sysfs_show_release_date, NULL); | |
6585 | ||
72c4fd36 YB |
6586 | static ssize_t |
6587 | megasas_sysfs_show_support_poll_for_event(struct device_driver *dd, char *buf) | |
6588 | { | |
6589 | return sprintf(buf, "%u\n", support_poll_for_event); | |
6590 | } | |
6591 | ||
6592 | static DRIVER_ATTR(support_poll_for_event, S_IRUGO, | |
6593 | megasas_sysfs_show_support_poll_for_event, NULL); | |
6594 | ||
837f5fe8 YB |
6595 | static ssize_t |
6596 | megasas_sysfs_show_support_device_change(struct device_driver *dd, char *buf) | |
6597 | { | |
6598 | return sprintf(buf, "%u\n", support_device_change); | |
6599 | } | |
6600 | ||
6601 | static DRIVER_ATTR(support_device_change, S_IRUGO, | |
6602 | megasas_sysfs_show_support_device_change, NULL); | |
6603 | ||
658dcedb SP |
6604 | static ssize_t |
6605 | megasas_sysfs_show_dbg_lvl(struct device_driver *dd, char *buf) | |
6606 | { | |
ad84db2e | 6607 | return sprintf(buf, "%u\n", megasas_dbg_lvl); |
658dcedb SP |
6608 | } |
6609 | ||
6610 | static ssize_t | |
6611 | megasas_sysfs_set_dbg_lvl(struct device_driver *dd, const char *buf, size_t count) | |
6612 | { | |
6613 | int retval = count; | |
da0dc9fb BH |
6614 | |
6615 | if (sscanf(buf, "%u", &megasas_dbg_lvl) < 1) { | |
658dcedb SP |
6616 | printk(KERN_ERR "megasas: could not set dbg_lvl\n"); |
6617 | retval = -EINVAL; | |
6618 | } | |
6619 | return retval; | |
6620 | } | |
6621 | ||
66dca9b8 | 6622 | static DRIVER_ATTR(dbg_lvl, S_IRUGO|S_IWUSR, megasas_sysfs_show_dbg_lvl, |
ad84db2e | 6623 | megasas_sysfs_set_dbg_lvl); |
6624 | ||
7e8a75f4 YB |
6625 | static void |
6626 | megasas_aen_polling(struct work_struct *work) | |
6627 | { | |
6628 | struct megasas_aen_event *ev = | |
c1d390d8 | 6629 | container_of(work, struct megasas_aen_event, hotplug_work.work); |
7e8a75f4 YB |
6630 | struct megasas_instance *instance = ev->instance; |
6631 | union megasas_evt_class_locale class_locale; | |
6632 | struct Scsi_Host *host; | |
6633 | struct scsi_device *sdev1; | |
6634 | u16 pd_index = 0; | |
c9786842 | 6635 | u16 ld_index = 0; |
7e8a75f4 | 6636 | int i, j, doscan = 0; |
229fe47c | 6637 | u32 seq_num, wait_time = MEGASAS_RESET_WAIT_TIME; |
7e8a75f4 YB |
6638 | int error; |
6639 | ||
6640 | if (!instance) { | |
6641 | printk(KERN_ERR "invalid instance!\n"); | |
6642 | kfree(ev); | |
6643 | return; | |
6644 | } | |
229fe47c | 6645 | |
6646 | /* Adjust event workqueue thread wait time for VF mode */ | |
6647 | if (instance->requestorId) | |
6648 | wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF; | |
6649 | ||
6650 | /* Don't run the event workqueue thread if OCR is running */ | |
6651 | for (i = 0; i < wait_time; i++) { | |
6652 | if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) | |
6653 | break; | |
6654 | if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) { | |
1be18254 | 6655 | dev_notice(&instance->pdev->dev, "%s waiting for " |
229fe47c | 6656 | "controller reset to finish for scsi%d\n", |
6657 | __func__, instance->host->host_no); | |
6658 | } | |
6659 | msleep(1000); | |
6660 | } | |
6661 | ||
7e8a75f4 YB |
6662 | instance->ev = NULL; |
6663 | host = instance->host; | |
6664 | if (instance->evt_detail) { | |
714f5177 | 6665 | megasas_decode_evt(instance); |
7e8a75f4 | 6666 | |
94cd65dd | 6667 | switch (le32_to_cpu(instance->evt_detail->code)) { |
7e8a75f4 | 6668 | case MR_EVT_PD_INSERTED: |
c9786842 YB |
6669 | if (megasas_get_pd_list(instance) == 0) { |
6670 | for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) { | |
6671 | for (j = 0; | |
6672 | j < MEGASAS_MAX_DEV_PER_CHANNEL; | |
6673 | j++) { | |
6674 | ||
6675 | pd_index = | |
6676 | (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j; | |
6677 | ||
da0dc9fb | 6678 | sdev1 = scsi_device_lookup(host, i, j, 0); |
c9786842 YB |
6679 | |
6680 | if (instance->pd_list[pd_index].driveState | |
6681 | == MR_PD_STATE_SYSTEM) { | |
da0dc9fb | 6682 | if (!sdev1) |
c9786842 | 6683 | scsi_add_device(host, i, j, 0); |
c9786842 YB |
6684 | |
6685 | if (sdev1) | |
6686 | scsi_device_put(sdev1); | |
6687 | } | |
6688 | } | |
6689 | } | |
6690 | } | |
6691 | doscan = 0; | |
6692 | break; | |
6693 | ||
7e8a75f4 | 6694 | case MR_EVT_PD_REMOVED: |
c9786842 | 6695 | if (megasas_get_pd_list(instance) == 0) { |
c9786842 YB |
6696 | for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) { |
6697 | for (j = 0; | |
6698 | j < MEGASAS_MAX_DEV_PER_CHANNEL; | |
6699 | j++) { | |
6700 | ||
6701 | pd_index = | |
6702 | (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j; | |
6703 | ||
da0dc9fb | 6704 | sdev1 = scsi_device_lookup(host, i, j, 0); |
c9786842 YB |
6705 | |
6706 | if (instance->pd_list[pd_index].driveState | |
6707 | == MR_PD_STATE_SYSTEM) { | |
da0dc9fb | 6708 | if (sdev1) |
c9786842 | 6709 | scsi_device_put(sdev1); |
c9786842 YB |
6710 | } else { |
6711 | if (sdev1) { | |
6712 | scsi_remove_device(sdev1); | |
6713 | scsi_device_put(sdev1); | |
6714 | } | |
6715 | } | |
6716 | } | |
6717 | } | |
6718 | } | |
6719 | doscan = 0; | |
6720 | break; | |
6721 | ||
6722 | case MR_EVT_LD_OFFLINE: | |
4c598b23 | 6723 | case MR_EVT_CFG_CLEARED: |
c9786842 | 6724 | case MR_EVT_LD_DELETED: |
229fe47c | 6725 | if (!instance->requestorId || |
6726 | (instance->requestorId && | |
6727 | megasas_get_ld_vf_affiliation(instance, 0))) { | |
6728 | if (megasas_ld_list_query(instance, | |
6729 | MR_LD_QUERY_TYPE_EXPOSED_TO_HOST)) | |
6730 | megasas_get_ld_list(instance); | |
6731 | for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) { | |
6732 | for (j = 0; | |
6733 | j < MEGASAS_MAX_DEV_PER_CHANNEL; | |
6734 | j++) { | |
6735 | ||
6736 | ld_index = | |
6737 | (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j; | |
6738 | ||
6739 | sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0); | |
6740 | ||
6741 | if (instance->ld_ids[ld_index] | |
6742 | != 0xff) { | |
6743 | if (sdev1) | |
6744 | scsi_device_put(sdev1); | |
6745 | } else { | |
6746 | if (sdev1) { | |
6747 | scsi_remove_device(sdev1); | |
6748 | scsi_device_put(sdev1); | |
6749 | } | |
6750 | } | |
c9786842 YB |
6751 | } |
6752 | } | |
229fe47c | 6753 | doscan = 0; |
c9786842 | 6754 | } |
c9786842 YB |
6755 | break; |
6756 | case MR_EVT_LD_CREATED: | |
229fe47c | 6757 | if (!instance->requestorId || |
6758 | (instance->requestorId && | |
6759 | megasas_get_ld_vf_affiliation(instance, 0))) { | |
6760 | if (megasas_ld_list_query(instance, | |
6761 | MR_LD_QUERY_TYPE_EXPOSED_TO_HOST)) | |
6762 | megasas_get_ld_list(instance); | |
6763 | for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) { | |
6764 | for (j = 0; | |
6765 | j < MEGASAS_MAX_DEV_PER_CHANNEL; | |
6766 | j++) { | |
6767 | ld_index = | |
6768 | (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j; | |
6769 | ||
6770 | sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0); | |
6771 | ||
6772 | if (instance->ld_ids[ld_index] | |
6773 | != 0xff) { | |
6774 | if (!sdev1) | |
6775 | scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0); | |
c9786842 | 6776 | } |
229fe47c | 6777 | if (sdev1) |
6778 | scsi_device_put(sdev1); | |
c9786842 YB |
6779 | } |
6780 | } | |
229fe47c | 6781 | doscan = 0; |
c9786842 | 6782 | } |
c9786842 | 6783 | break; |
7e8a75f4 | 6784 | case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED: |
c9786842 | 6785 | case MR_EVT_FOREIGN_CFG_IMPORTED: |
9c915a8c | 6786 | case MR_EVT_LD_STATE_CHANGE: |
7e8a75f4 YB |
6787 | doscan = 1; |
6788 | break; | |
6789 | default: | |
6790 | doscan = 0; | |
6791 | break; | |
6792 | } | |
6793 | } else { | |
1be18254 | 6794 | dev_err(&instance->pdev->dev, "invalid evt_detail!\n"); |
7e8a75f4 YB |
6795 | kfree(ev); |
6796 | return; | |
6797 | } | |
6798 | ||
6799 | if (doscan) { | |
1be18254 | 6800 | dev_info(&instance->pdev->dev, "scanning for scsi%d...\n", |
229fe47c | 6801 | instance->host->host_no); |
58968fc8 HR |
6802 | if (megasas_get_pd_list(instance) == 0) { |
6803 | for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) { | |
6804 | for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) { | |
6805 | pd_index = i*MEGASAS_MAX_DEV_PER_CHANNEL + j; | |
6806 | sdev1 = scsi_device_lookup(host, i, j, 0); | |
6807 | if (instance->pd_list[pd_index].driveState == | |
6808 | MR_PD_STATE_SYSTEM) { | |
6809 | if (!sdev1) { | |
6810 | scsi_add_device(host, i, j, 0); | |
6811 | } | |
6812 | if (sdev1) | |
6813 | scsi_device_put(sdev1); | |
6814 | } else { | |
6815 | if (sdev1) { | |
6816 | scsi_remove_device(sdev1); | |
6817 | scsi_device_put(sdev1); | |
6818 | } | |
7e8a75f4 YB |
6819 | } |
6820 | } | |
6821 | } | |
6822 | } | |
c9786842 | 6823 | |
229fe47c | 6824 | if (!instance->requestorId || |
6825 | (instance->requestorId && | |
6826 | megasas_get_ld_vf_affiliation(instance, 0))) { | |
6827 | if (megasas_ld_list_query(instance, | |
6828 | MR_LD_QUERY_TYPE_EXPOSED_TO_HOST)) | |
6829 | megasas_get_ld_list(instance); | |
6830 | for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) { | |
6831 | for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; | |
6832 | j++) { | |
6833 | ld_index = | |
6834 | (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j; | |
c9786842 | 6835 | |
229fe47c | 6836 | sdev1 = scsi_device_lookup(host, |
6837 | MEGASAS_MAX_PD_CHANNELS + i, j, 0); | |
6838 | if (instance->ld_ids[ld_index] | |
6839 | != 0xff) { | |
6840 | if (!sdev1) | |
6841 | scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0); | |
6842 | else | |
6843 | scsi_device_put(sdev1); | |
c9786842 | 6844 | } else { |
229fe47c | 6845 | if (sdev1) { |
6846 | scsi_remove_device(sdev1); | |
6847 | scsi_device_put(sdev1); | |
6848 | } | |
c9786842 YB |
6849 | } |
6850 | } | |
6851 | } | |
6852 | } | |
7e8a75f4 YB |
6853 | } |
6854 | ||
da0dc9fb | 6855 | if (instance->aen_cmd != NULL) { |
7e8a75f4 YB |
6856 | kfree(ev); |
6857 | return ; | |
6858 | } | |
6859 | ||
94cd65dd | 6860 | seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1; |
7e8a75f4 YB |
6861 | |
6862 | /* Register AEN with FW for latest sequence number plus 1 */ | |
6863 | class_locale.members.reserved = 0; | |
6864 | class_locale.members.locale = MR_EVT_LOCALE_ALL; | |
6865 | class_locale.members.class = MR_EVT_CLASS_DEBUG; | |
6866 | mutex_lock(&instance->aen_mutex); | |
6867 | error = megasas_register_aen(instance, seq_num, | |
6868 | class_locale.word); | |
6869 | mutex_unlock(&instance->aen_mutex); | |
6870 | ||
6871 | if (error) | |
1be18254 | 6872 | dev_err(&instance->pdev->dev, "register aen failed error %x\n", error); |
7e8a75f4 YB |
6873 | |
6874 | kfree(ev); | |
6875 | } | |
6876 | ||
c4a3e0a5 BS |
6877 | /** |
6878 | * megasas_init - Driver load entry point | |
6879 | */ | |
6880 | static int __init megasas_init(void) | |
6881 | { | |
6882 | int rval; | |
6883 | ||
6884 | /* | |
6885 | * Announce driver version and other information | |
6886 | */ | |
d98a6deb | 6887 | pr_info("megasas: %s\n", MEGASAS_VERSION); |
c4a3e0a5 | 6888 | |
bd8d6dd4 KD |
6889 | spin_lock_init(&poll_aen_lock); |
6890 | ||
72c4fd36 | 6891 | support_poll_for_event = 2; |
837f5fe8 | 6892 | support_device_change = 1; |
72c4fd36 | 6893 | |
c4a3e0a5 BS |
6894 | memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info)); |
6895 | ||
6896 | /* | |
6897 | * Register character device node | |
6898 | */ | |
6899 | rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops); | |
6900 | ||
6901 | if (rval < 0) { | |
6902 | printk(KERN_DEBUG "megasas: failed to open device node\n"); | |
6903 | return rval; | |
6904 | } | |
6905 | ||
6906 | megasas_mgmt_majorno = rval; | |
6907 | ||
6908 | /* | |
6909 | * Register ourselves as PCI hotplug module | |
6910 | */ | |
4041b9cd | 6911 | rval = pci_register_driver(&megasas_pci_driver); |
c4a3e0a5 BS |
6912 | |
6913 | if (rval) { | |
6774def6 | 6914 | printk(KERN_DEBUG "megasas: PCI hotplug registration failed \n"); |
83aabc1b JG |
6915 | goto err_pcidrv; |
6916 | } | |
6917 | ||
6918 | rval = driver_create_file(&megasas_pci_driver.driver, | |
6919 | &driver_attr_version); | |
6920 | if (rval) | |
6921 | goto err_dcf_attr_ver; | |
72c4fd36 | 6922 | |
09fced19 SS |
6923 | rval = driver_create_file(&megasas_pci_driver.driver, |
6924 | &driver_attr_release_date); | |
6925 | if (rval) | |
6926 | goto err_dcf_rel_date; | |
6927 | ||
72c4fd36 YB |
6928 | rval = driver_create_file(&megasas_pci_driver.driver, |
6929 | &driver_attr_support_poll_for_event); | |
6930 | if (rval) | |
6931 | goto err_dcf_support_poll_for_event; | |
6932 | ||
83aabc1b JG |
6933 | rval = driver_create_file(&megasas_pci_driver.driver, |
6934 | &driver_attr_dbg_lvl); | |
6935 | if (rval) | |
6936 | goto err_dcf_dbg_lvl; | |
837f5fe8 YB |
6937 | rval = driver_create_file(&megasas_pci_driver.driver, |
6938 | &driver_attr_support_device_change); | |
6939 | if (rval) | |
6940 | goto err_dcf_support_device_change; | |
6941 | ||
c4a3e0a5 | 6942 | return rval; |
ad84db2e | 6943 | |
837f5fe8 | 6944 | err_dcf_support_device_change: |
ad84db2e | 6945 | driver_remove_file(&megasas_pci_driver.driver, |
6946 | &driver_attr_dbg_lvl); | |
83aabc1b | 6947 | err_dcf_dbg_lvl: |
72c4fd36 YB |
6948 | driver_remove_file(&megasas_pci_driver.driver, |
6949 | &driver_attr_support_poll_for_event); | |
72c4fd36 | 6950 | err_dcf_support_poll_for_event: |
09fced19 SS |
6951 | driver_remove_file(&megasas_pci_driver.driver, |
6952 | &driver_attr_release_date); | |
6953 | err_dcf_rel_date: | |
83aabc1b JG |
6954 | driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version); |
6955 | err_dcf_attr_ver: | |
6956 | pci_unregister_driver(&megasas_pci_driver); | |
6957 | err_pcidrv: | |
6958 | unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl"); | |
0d49016b | 6959 | return rval; |
c4a3e0a5 BS |
6960 | } |
6961 | ||
6962 | /** | |
6963 | * megasas_exit - Driver unload entry point | |
6964 | */ | |
6965 | static void __exit megasas_exit(void) | |
6966 | { | |
658dcedb SP |
6967 | driver_remove_file(&megasas_pci_driver.driver, |
6968 | &driver_attr_dbg_lvl); | |
837f5fe8 YB |
6969 | driver_remove_file(&megasas_pci_driver.driver, |
6970 | &driver_attr_support_poll_for_event); | |
6971 | driver_remove_file(&megasas_pci_driver.driver, | |
6972 | &driver_attr_support_device_change); | |
09fced19 SS |
6973 | driver_remove_file(&megasas_pci_driver.driver, |
6974 | &driver_attr_release_date); | |
83aabc1b | 6975 | driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version); |
c4a3e0a5 BS |
6976 | |
6977 | pci_unregister_driver(&megasas_pci_driver); | |
6978 | unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl"); | |
6979 | } | |
6980 | ||
6981 | module_init(megasas_init); | |
6982 | module_exit(megasas_exit); |