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megaraid_sas: Chip reset if driver fails to get IOC ready
[deliverable/linux.git] / drivers / scsi / megaraid / megaraid_sas_base.c
CommitLineData
c4a3e0a5 1/*
3f1530c1 2 * Linux MegaRAID driver for SAS based RAID controllers
c4a3e0a5 3 *
e399065b
SS		 4 * Copyright (c) 2003-2013 LSI Corporation
5 * Copyright (c) 2013-2014 Avago Technologies
c4a3e0a5 6 *
3f1530c1 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
c4a3e0a5 11 *
3f1530c1 12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
c4a3e0a5 16 *
3f1530c1 17 * You should have received a copy of the GNU General Public License
e399065b 18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
c4a3e0a5 19 *
e399065b 20 * Authors: Avago Technologies
3f1530c1 21 * Sreenivas Bagalkote
22 * Sumant Patro
23 * Bo Yang
e399065b
SS		 24 * Adam Radford
25 * Kashyap Desai <kashyap.desai@avagotech.com>
26 * Sumit Saxena <sumit.saxena@avagotech.com>
c4a3e0a5 27 *
e399065b 28 * Send feedback to: megaraidlinux.pdl@avagotech.com
3f1530c1 29 *
e399065b
SS		 30 * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
31 * San Jose, California 95131
c4a3e0a5
BS		 32 */
33
34#include <linux/kernel.h>
35#include <linux/types.h>
36#include <linux/pci.h>
37#include <linux/list.h>
c4a3e0a5
BS		 38#include <linux/moduleparam.h>
39#include <linux/module.h>
40#include <linux/spinlock.h>
41#include <linux/interrupt.h>
42#include <linux/delay.h>
43#include <linux/uio.h>
5a0e3ad6 44#include <linux/slab.h>
c4a3e0a5 45#include <asm/uaccess.h>
43399236 46#include <linux/fs.h>
c4a3e0a5 47#include <linux/compat.h>
cf62a0a5 48#include <linux/blkdev.h>
0b950672 49#include <linux/mutex.h>
c3518837 50#include <linux/poll.h>
c4a3e0a5
BS		 51
52#include <scsi/scsi.h>
53#include <scsi/scsi_cmnd.h>
54#include <scsi/scsi_device.h>
55#include <scsi/scsi_host.h>
4bcde509 56#include <scsi/scsi_tcq.h>
9c915a8c 57#include "megaraid_sas_fusion.h"
c4a3e0a5
BS		 58#include "megaraid_sas.h"
59
1fd10685
YB		 60/*
61 * Number of sectors per IO command
62 * Will be set in megasas_init_mfi if user does not provide
63 */
64static unsigned int max_sectors;
65module_param_named(max_sectors, max_sectors, int, 0);
66MODULE_PARM_DESC(max_sectors,
67 "Maximum number of sectors per IO command");
68
80d9da98 69static int msix_disable;
70module_param(msix_disable, int, S_IRUGO);
71MODULE_PARM_DESC(msix_disable, "Disable MSI-X interrupt handling. Default: 0");
72
079eaddf 73static unsigned int msix_vectors;
74module_param(msix_vectors, int, S_IRUGO);
75MODULE_PARM_DESC(msix_vectors, "MSI-X max vector count. Default: Set by FW");
76
229fe47c 77static int allow_vf_ioctls;
78module_param(allow_vf_ioctls, int, S_IRUGO);
79MODULE_PARM_DESC(allow_vf_ioctls, "Allow ioctls in SR-IOV VF mode. Default: 0");
80
ae09a6c1 81static unsigned int throttlequeuedepth = MEGASAS_THROTTLE_QUEUE_DEPTH;
c5daa6a9 82module_param(throttlequeuedepth, int, S_IRUGO);
83MODULE_PARM_DESC(throttlequeuedepth,
84 "Adapter queue depth when throttled due to I/O timeout. Default: 16");
85
c007b8b2 86int resetwaittime = MEGASAS_RESET_WAIT_TIME;
87module_param(resetwaittime, int, S_IRUGO);
88MODULE_PARM_DESC(resetwaittime, "Wait time in seconds after I/O timeout "
89 "before resetting adapter. Default: 180");
90
ac95136a
SS		 91int smp_affinity_enable = 1;
92module_param(smp_affinity_enable, int, S_IRUGO);
93MODULE_PARM_DESC(smp_affinity_enable, "SMP affinity feature enable/disbale Default: enable(1)");
94
c4a3e0a5
BS		 95MODULE_LICENSE("GPL");
96MODULE_VERSION(MEGASAS_VERSION);
43cd7fe4
SS		 97MODULE_AUTHOR("megaraidlinux.pdl@avagotech.com");
98MODULE_DESCRIPTION("Avago MegaRAID SAS Driver");
c4a3e0a5 99
058a8fac 100int megasas_transition_to_ready(struct megasas_instance *instance, int ocr);
39a98554 101static int megasas_get_pd_list(struct megasas_instance *instance);
21c9e160 102static int megasas_ld_list_query(struct megasas_instance *instance,
103 u8 query_type);
39a98554 104static int megasas_issue_init_mfi(struct megasas_instance *instance);
105static int megasas_register_aen(struct megasas_instance *instance,
106 u32 seq_num, u32 class_locale_word);
c4a3e0a5
BS		 107/*
108 * PCI ID table for all supported controllers
109 */
110static struct pci_device_id megasas_pci_table[] = {
111
f3d7271c
HK		 112 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064R)},
113 /* xscale IOP */
114 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078R)},
115 /* ppc IOP */
af7a5647 116 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)},
117 /* ppc IOP */
6610a6b3
YB		 118 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)},
119 /* gen2*/
120 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)},
121 /* gen2*/
87911122
YB		 122 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)},
123 /* skinny*/
124 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)},
125 /* skinny*/
f3d7271c
HK		 126 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)},
127 /* xscale IOP, vega */
128 {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
129 /* xscale IOP */
9c915a8c 130 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)},
131 /* Fusion */
229fe47c 132 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_PLASMA)},
133 /* Plasma */
36807e67 134 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INVADER)},
135 /* Invader */
21d3c710
SS		 136 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FURY)},
137 /* Fury */
f3d7271c 138 {}
c4a3e0a5
BS		 139};
140
141MODULE_DEVICE_TABLE(pci, megasas_pci_table);
142
143static int megasas_mgmt_majorno;
229fe47c 144struct megasas_mgmt_info megasas_mgmt_info;
c4a3e0a5 145static struct fasync_struct *megasas_async_queue;
0b950672 146static DEFINE_MUTEX(megasas_async_queue_mutex);
c4a3e0a5 147
c3518837
YB		 148static int megasas_poll_wait_aen;
149static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait);
72c4fd36 150static u32 support_poll_for_event;
9c915a8c 151u32 megasas_dbg_lvl;
837f5fe8 152static u32 support_device_change;
658dcedb 153
c3518837
YB		 154/* define lock for aen poll */
155spinlock_t poll_aen_lock;
156
9c915a8c 157void
7343eb65 158megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
159 u8 alt_status);
ebf054b0 160static u32
161megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs);
162static int
163megasas_adp_reset_gen2(struct megasas_instance *instance,
164 struct megasas_register_set __iomem *reg_set);
cd50ba8e 165static irqreturn_t megasas_isr(int irq, void *devp);
166static u32
167megasas_init_adapter_mfi(struct megasas_instance *instance);
168u32
169megasas_build_and_issue_cmd(struct megasas_instance *instance,
170 struct scsi_cmnd *scmd);
171static void megasas_complete_cmd_dpc(unsigned long instance_addr);
9c915a8c 172void
173megasas_release_fusion(struct megasas_instance *instance);
174int
175megasas_ioc_init_fusion(struct megasas_instance *instance);
176void
177megasas_free_cmds_fusion(struct megasas_instance *instance);
178u8
179megasas_get_map_info(struct megasas_instance *instance);
180int
181megasas_sync_map_info(struct megasas_instance *instance);
182int
229fe47c 183wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd,
184 int seconds);
9c915a8c 185void megasas_reset_reply_desc(struct megasas_instance *instance);
229fe47c 186int megasas_reset_fusion(struct Scsi_Host *shost, int iotimeout);
9c915a8c 187void megasas_fusion_ocr_wq(struct work_struct *work);
229fe47c 188static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
189 int initial);
190int megasas_check_mpio_paths(struct megasas_instance *instance,
191 struct scsi_cmnd *scmd);
cd50ba8e 192
193void
194megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
195{
196 instance->instancet->fire_cmd(instance,
197 cmd->frame_phys_addr, 0, instance->reg_set);
198}
7343eb65 199
c4a3e0a5
BS		 200/**
201 * megasas_get_cmd - Get a command from the free pool
202 * @instance: Adapter soft state
203 *
204 * Returns a free command from the pool
205 */
9c915a8c 206struct megasas_cmd *megasas_get_cmd(struct megasas_instance
c4a3e0a5
BS		 207 *instance)
208{
209 unsigned long flags;
210 struct megasas_cmd *cmd = NULL;
211
90dc9d98 212 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 213
214 if (!list_empty(&instance->cmd_pool)) {
215 cmd = list_entry((&instance->cmd_pool)->next,
216 struct megasas_cmd, list);
217 list_del_init(&cmd->list);
218 } else {
1be18254 219 dev_err(&instance->pdev->dev, "Command pool empty!\n");
c4a3e0a5
BS		 220 }
221
90dc9d98 222 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 223 return cmd;
224}
225
226/**
4026e9aa 227 * megasas_return_cmd - Return a cmd to free command pool
c4a3e0a5
BS		 228 * @instance: Adapter soft state
229 * @cmd: Command packet to be returned to free command pool
230 */
9c915a8c 231inline void
4026e9aa 232megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
c4a3e0a5 233{
4026e9aa
SS		 234 unsigned long flags;
235 u32 blk_tags;
236 struct megasas_cmd_fusion *cmd_fusion;
237 struct fusion_context *fusion = instance->ctrl_context;
238
239 /* This flag is used only for fusion adapter.
240 * Wait for Interrupt for Polled mode DCMD
90dc9d98 241 */
4026e9aa 242 if (cmd->flags & DRV_DCMD_POLLED_MODE)
90dc9d98 243 return;
c4a3e0a5 244
4026e9aa
SS		 245 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
246
247 if (fusion) {
248 blk_tags = instance->max_scsi_cmds + cmd->index;
249 cmd_fusion = fusion->cmd_list[blk_tags];
250 megasas_return_cmd_fusion(instance, cmd_fusion);
251 }
c4a3e0a5 252 cmd->scmd = NULL;
9c915a8c 253 cmd->frame_count = 0;
4026e9aa
SS		 254 cmd->flags = 0;
255 if (!fusion && reset_devices)
e5f93a36 256 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
90dc9d98 257 list_add(&cmd->list, (&instance->cmd_pool)->next);
90dc9d98 258
90dc9d98 259 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5 260
4026e9aa 261}
1341c939
SP		 262
263/**
0d49016b 264* The following functions are defined for xscale
1341c939
SP		 265* (deviceid : 1064R, PERC5) controllers
266*/
267
c4a3e0a5 268/**
1341c939 269 * megasas_enable_intr_xscale - Enables interrupts
c4a3e0a5
BS		 270 * @regs: MFI register set
271 */
272static inline void
d46a3ad6 273megasas_enable_intr_xscale(struct megasas_instance *instance)
c4a3e0a5 274{
d46a3ad6 275 struct megasas_register_set __iomem *regs;
da0dc9fb 276
d46a3ad6 277 regs = instance->reg_set;
39a98554 278 writel(0, &(regs)->outbound_intr_mask);
c4a3e0a5
BS		 279
280 /* Dummy readl to force pci flush */
281 readl(&regs->outbound_intr_mask);
282}
283
b274cab7
SP		 284/**
285 * megasas_disable_intr_xscale -Disables interrupt
286 * @regs: MFI register set
287 */
288static inline void
d46a3ad6 289megasas_disable_intr_xscale(struct megasas_instance *instance)
b274cab7 290{
d46a3ad6 291 struct megasas_register_set __iomem *regs;
b274cab7 292 u32 mask = 0x1f;
da0dc9fb 293
d46a3ad6 294 regs = instance->reg_set;
b274cab7
SP		 295 writel(mask, &regs->outbound_intr_mask);
296 /* Dummy readl to force pci flush */
297 readl(&regs->outbound_intr_mask);
298}
299
1341c939
SP		 300/**
301 * megasas_read_fw_status_reg_xscale - returns the current FW status value
302 * @regs: MFI register set
303 */
304static u32
305megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs)
306{
307 return readl(&(regs)->outbound_msg_0);
308}
309/**
310 * megasas_clear_interrupt_xscale - Check & clear interrupt
311 * @regs: MFI register set
312 */
0d49016b 313static int
1341c939
SP		 314megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs)
315{
316 u32 status;
39a98554 317 u32 mfiStatus = 0;
da0dc9fb 318
1341c939
SP		 319 /*
320 * Check if it is our interrupt
321 */
322 status = readl(&regs->outbound_intr_status);
323
39a98554 324 if (status & MFI_OB_INTR_STATUS_MASK)
325 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
326 if (status & MFI_XSCALE_OMR0_CHANGE_INTERRUPT)
327 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
1341c939
SP		 328
329 /*
330 * Clear the interrupt by writing back the same value
331 */
39a98554 332 if (mfiStatus)
333 writel(status, &regs->outbound_intr_status);
1341c939 334
06f579de
YB		 335 /* Dummy readl to force pci flush */
336 readl(&regs->outbound_intr_status);
337
39a98554 338 return mfiStatus;
1341c939
SP		 339}
340
341/**
342 * megasas_fire_cmd_xscale - Sends command to the FW
343 * @frame_phys_addr : Physical address of cmd
344 * @frame_count : Number of frames for the command
345 * @regs : MFI register set
346 */
0d49016b 347static inline void
0c79e681
YB		 348megasas_fire_cmd_xscale(struct megasas_instance *instance,
349 dma_addr_t frame_phys_addr,
350 u32 frame_count,
351 struct megasas_register_set __iomem *regs)
1341c939 352{
39a98554 353 unsigned long flags;
da0dc9fb 354
39a98554 355 spin_lock_irqsave(&instance->hba_lock, flags);
1341c939
SP		 356 writel((frame_phys_addr >> 3)|(frame_count),
357 &(regs)->inbound_queue_port);
39a98554 358 spin_unlock_irqrestore(&instance->hba_lock, flags);
359}
360
361/**
362 * megasas_adp_reset_xscale - For controller reset
363 * @regs: MFI register set
364 */
365static int
366megasas_adp_reset_xscale(struct megasas_instance *instance,
367 struct megasas_register_set __iomem *regs)
368{
369 u32 i;
370 u32 pcidata;
da0dc9fb 371
39a98554 372 writel(MFI_ADP_RESET, &regs->inbound_doorbell);
373
374 for (i = 0; i < 3; i++)
375 msleep(1000); /* sleep for 3 secs */
376 pcidata = 0;
377 pci_read_config_dword(instance->pdev, MFI_1068_PCSR_OFFSET, &pcidata);
1be18254 378 dev_notice(&instance->pdev->dev, "pcidata = %x\n", pcidata);
39a98554 379 if (pcidata & 0x2) {
1be18254 380 dev_notice(&instance->pdev->dev, "mfi 1068 offset read=%x\n", pcidata);
39a98554 381 pcidata &= ~0x2;
382 pci_write_config_dword(instance->pdev,
383 MFI_1068_PCSR_OFFSET, pcidata);
384
385 for (i = 0; i < 2; i++)
386 msleep(1000); /* need to wait 2 secs again */
387
388 pcidata = 0;
389 pci_read_config_dword(instance->pdev,
390 MFI_1068_FW_HANDSHAKE_OFFSET, &pcidata);
1be18254 391 dev_notice(&instance->pdev->dev, "1068 offset handshake read=%x\n", pcidata);
39a98554 392 if ((pcidata & 0xffff0000) == MFI_1068_FW_READY) {
1be18254 393 dev_notice(&instance->pdev->dev, "1068 offset pcidt=%x\n", pcidata);
39a98554 394 pcidata = 0;
395 pci_write_config_dword(instance->pdev,
396 MFI_1068_FW_HANDSHAKE_OFFSET, pcidata);
397 }
398 }
399 return 0;
400}
401
402/**
403 * megasas_check_reset_xscale - For controller reset check
404 * @regs: MFI register set
405 */
406static int
407megasas_check_reset_xscale(struct megasas_instance *instance,
408 struct megasas_register_set __iomem *regs)
409{
39a98554 410 if ((instance->adprecovery != MEGASAS_HBA_OPERATIONAL) &&
94cd65dd
SS		 411 (le32_to_cpu(*instance->consumer) ==
412 MEGASAS_ADPRESET_INPROG_SIGN))
39a98554 413 return 1;
39a98554 414 return 0;
1341c939
SP		 415}
416
417static struct megasas_instance_template megasas_instance_template_xscale = {
418
419 .fire_cmd = megasas_fire_cmd_xscale,
420 .enable_intr = megasas_enable_intr_xscale,
b274cab7 421 .disable_intr = megasas_disable_intr_xscale,
1341c939
SP		 422 .clear_intr = megasas_clear_intr_xscale,
423 .read_fw_status_reg = megasas_read_fw_status_reg_xscale,
39a98554 424 .adp_reset = megasas_adp_reset_xscale,
425 .check_reset = megasas_check_reset_xscale,
cd50ba8e 426 .service_isr = megasas_isr,
427 .tasklet = megasas_complete_cmd_dpc,
428 .init_adapter = megasas_init_adapter_mfi,
429 .build_and_issue_cmd = megasas_build_and_issue_cmd,
430 .issue_dcmd = megasas_issue_dcmd,
1341c939
SP		 431};
432
433/**
0d49016b 434* This is the end of set of functions & definitions specific
1341c939
SP		 435* to xscale (deviceid : 1064R, PERC5) controllers
436*/
437
f9876f0b 438/**
0d49016b 439* The following functions are defined for ppc (deviceid : 0x60)
da0dc9fb 440* controllers
f9876f0b
SP		 441*/
442
443/**
444 * megasas_enable_intr_ppc - Enables interrupts
445 * @regs: MFI register set
446 */
447static inline void
d46a3ad6 448megasas_enable_intr_ppc(struct megasas_instance *instance)
f9876f0b 449{
d46a3ad6 450 struct megasas_register_set __iomem *regs;
da0dc9fb 451
d46a3ad6 452 regs = instance->reg_set;
f9876f0b 453 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
0d49016b 454
39a98554 455 writel(~0x80000000, &(regs)->outbound_intr_mask);
f9876f0b
SP		 456
457 /* Dummy readl to force pci flush */
458 readl(&regs->outbound_intr_mask);
459}
460
b274cab7
SP		 461/**
462 * megasas_disable_intr_ppc - Disable interrupt
463 * @regs: MFI register set
464 */
465static inline void
d46a3ad6 466megasas_disable_intr_ppc(struct megasas_instance *instance)
b274cab7 467{
d46a3ad6 468 struct megasas_register_set __iomem *regs;
b274cab7 469 u32 mask = 0xFFFFFFFF;
da0dc9fb 470
d46a3ad6 471 regs = instance->reg_set;
b274cab7
SP		 472 writel(mask, &regs->outbound_intr_mask);
473 /* Dummy readl to force pci flush */
474 readl(&regs->outbound_intr_mask);
475}
476
f9876f0b
SP		 477/**
478 * megasas_read_fw_status_reg_ppc - returns the current FW status value
479 * @regs: MFI register set
480 */
481static u32
482megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs)
483{
484 return readl(&(regs)->outbound_scratch_pad);
485}
486
487/**
488 * megasas_clear_interrupt_ppc - Check & clear interrupt
489 * @regs: MFI register set
490 */
0d49016b 491static int
f9876f0b
SP		 492megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs)
493{
3cc6851f 494 u32 status, mfiStatus = 0;
495
f9876f0b
SP		 496 /*
497 * Check if it is our interrupt
498 */
499 status = readl(&regs->outbound_intr_status);
500
3cc6851f 501 if (status & MFI_REPLY_1078_MESSAGE_INTERRUPT)
502 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
503
504 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT)
505 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
f9876f0b
SP		 506
507 /*
508 * Clear the interrupt by writing back the same value
509 */
510 writel(status, &regs->outbound_doorbell_clear);
511
06f579de
YB		 512 /* Dummy readl to force pci flush */
513 readl(&regs->outbound_doorbell_clear);
514
3cc6851f 515 return mfiStatus;
f9876f0b 516}
3cc6851f 517
f9876f0b
SP		 518/**
519 * megasas_fire_cmd_ppc - Sends command to the FW
520 * @frame_phys_addr : Physical address of cmd
521 * @frame_count : Number of frames for the command
522 * @regs : MFI register set
523 */
0d49016b 524static inline void
0c79e681
YB		 525megasas_fire_cmd_ppc(struct megasas_instance *instance,
526 dma_addr_t frame_phys_addr,
527 u32 frame_count,
528 struct megasas_register_set __iomem *regs)
f9876f0b 529{
39a98554 530 unsigned long flags;
da0dc9fb 531
39a98554 532 spin_lock_irqsave(&instance->hba_lock, flags);
0d49016b 533 writel((frame_phys_addr | (frame_count<<1))|1,
f9876f0b 534 &(regs)->inbound_queue_port);
39a98554 535 spin_unlock_irqrestore(&instance->hba_lock, flags);
f9876f0b
SP		 536}
537
39a98554 538/**
539 * megasas_check_reset_ppc - For controller reset check
540 * @regs: MFI register set
541 */
542static int
543megasas_check_reset_ppc(struct megasas_instance *instance,
544 struct megasas_register_set __iomem *regs)
545{
3cc6851f 546 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL)
547 return 1;
548
39a98554 549 return 0;
550}
3cc6851f 551
f9876f0b 552static struct megasas_instance_template megasas_instance_template_ppc = {
0d49016b 553
f9876f0b
SP		 554 .fire_cmd = megasas_fire_cmd_ppc,
555 .enable_intr = megasas_enable_intr_ppc,
b274cab7 556 .disable_intr = megasas_disable_intr_ppc,
f9876f0b
SP		 557 .clear_intr = megasas_clear_intr_ppc,
558 .read_fw_status_reg = megasas_read_fw_status_reg_ppc,
3cc6851f 559 .adp_reset = megasas_adp_reset_xscale,
39a98554 560 .check_reset = megasas_check_reset_ppc,
cd50ba8e 561 .service_isr = megasas_isr,
562 .tasklet = megasas_complete_cmd_dpc,
563 .init_adapter = megasas_init_adapter_mfi,
564 .build_and_issue_cmd = megasas_build_and_issue_cmd,
565 .issue_dcmd = megasas_issue_dcmd,
f9876f0b
SP		 566};
567
87911122
YB		 568/**
569 * megasas_enable_intr_skinny - Enables interrupts
570 * @regs: MFI register set
571 */
572static inline void
d46a3ad6 573megasas_enable_intr_skinny(struct megasas_instance *instance)
87911122 574{
d46a3ad6 575 struct megasas_register_set __iomem *regs;
da0dc9fb 576
d46a3ad6 577 regs = instance->reg_set;
87911122
YB		 578 writel(0xFFFFFFFF, &(regs)->outbound_intr_mask);
579
580 writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
581
582 /* Dummy readl to force pci flush */
583 readl(&regs->outbound_intr_mask);
584}
585
586/**
587 * megasas_disable_intr_skinny - Disables interrupt
588 * @regs: MFI register set
589 */
590static inline void
d46a3ad6 591megasas_disable_intr_skinny(struct megasas_instance *instance)
87911122 592{
d46a3ad6 593 struct megasas_register_set __iomem *regs;
87911122 594 u32 mask = 0xFFFFFFFF;
da0dc9fb 595
d46a3ad6 596 regs = instance->reg_set;
87911122
YB		 597 writel(mask, &regs->outbound_intr_mask);
598 /* Dummy readl to force pci flush */
599 readl(&regs->outbound_intr_mask);
600}
601
602/**
603 * megasas_read_fw_status_reg_skinny - returns the current FW status value
604 * @regs: MFI register set
605 */
606static u32
607megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs)
608{
609 return readl(&(regs)->outbound_scratch_pad);
610}
611
612/**
613 * megasas_clear_interrupt_skinny - Check & clear interrupt
614 * @regs: MFI register set
615 */
616static int
617megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs)
618{
619 u32 status;
ebf054b0 620 u32 mfiStatus = 0;
621
87911122
YB		 622 /*
623 * Check if it is our interrupt
624 */
625 status = readl(&regs->outbound_intr_status);
626
627 if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) {
39a98554 628 return 0;
87911122
YB		 629 }
630
ebf054b0 631 /*
632 * Check if it is our interrupt
633 */
a3fda7dd 634 if ((megasas_read_fw_status_reg_skinny(regs) & MFI_STATE_MASK) ==
ebf054b0 635 MFI_STATE_FAULT) {
636 mfiStatus = MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
637 } else
638 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
639
87911122
YB		 640 /*
641 * Clear the interrupt by writing back the same value
642 */
643 writel(status, &regs->outbound_intr_status);
644
645 /*
da0dc9fb
BH		 646 * dummy read to flush PCI
647 */
87911122
YB		 648 readl(&regs->outbound_intr_status);
649
ebf054b0 650 return mfiStatus;
87911122
YB		 651}
652
653/**
654 * megasas_fire_cmd_skinny - Sends command to the FW
655 * @frame_phys_addr : Physical address of cmd
656 * @frame_count : Number of frames for the command
657 * @regs : MFI register set
658 */
659static inline void
0c79e681
YB		 660megasas_fire_cmd_skinny(struct megasas_instance *instance,
661 dma_addr_t frame_phys_addr,
662 u32 frame_count,
87911122
YB		 663 struct megasas_register_set __iomem *regs)
664{
0c79e681 665 unsigned long flags;
da0dc9fb 666
39a98554 667 spin_lock_irqsave(&instance->hba_lock, flags);
94cd65dd
SS		 668 writel(upper_32_bits(frame_phys_addr),
669 &(regs)->inbound_high_queue_port);
670 writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1,
671 &(regs)->inbound_low_queue_port);
39a98554 672 spin_unlock_irqrestore(&instance->hba_lock, flags);
673}
674
39a98554 675/**
676 * megasas_check_reset_skinny - For controller reset check
677 * @regs: MFI register set
678 */
679static int
680megasas_check_reset_skinny(struct megasas_instance *instance,
681 struct megasas_register_set __iomem *regs)
682{
3cc6851f 683 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL)
684 return 1;
685
39a98554 686 return 0;
87911122
YB		 687}
688
689static struct megasas_instance_template megasas_instance_template_skinny = {
690
691 .fire_cmd = megasas_fire_cmd_skinny,
692 .enable_intr = megasas_enable_intr_skinny,
693 .disable_intr = megasas_disable_intr_skinny,
694 .clear_intr = megasas_clear_intr_skinny,
695 .read_fw_status_reg = megasas_read_fw_status_reg_skinny,
ebf054b0 696 .adp_reset = megasas_adp_reset_gen2,
39a98554 697 .check_reset = megasas_check_reset_skinny,
cd50ba8e 698 .service_isr = megasas_isr,
699 .tasklet = megasas_complete_cmd_dpc,
700 .init_adapter = megasas_init_adapter_mfi,
701 .build_and_issue_cmd = megasas_build_and_issue_cmd,
702 .issue_dcmd = megasas_issue_dcmd,
87911122
YB		 703};
704
705
6610a6b3
YB		 706/**
707* The following functions are defined for gen2 (deviceid : 0x78 0x79)
708* controllers
709*/
710
711/**
712 * megasas_enable_intr_gen2 - Enables interrupts
713 * @regs: MFI register set
714 */
715static inline void
d46a3ad6 716megasas_enable_intr_gen2(struct megasas_instance *instance)
6610a6b3 717{
d46a3ad6 718 struct megasas_register_set __iomem *regs;
da0dc9fb 719
d46a3ad6 720 regs = instance->reg_set;
6610a6b3
YB		 721 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
722
723 /* write ~0x00000005 (4 & 1) to the intr mask*/
724 writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
725
726 /* Dummy readl to force pci flush */
727 readl(&regs->outbound_intr_mask);
728}
729
730/**
731 * megasas_disable_intr_gen2 - Disables interrupt
732 * @regs: MFI register set
733 */
734static inline void
d46a3ad6 735megasas_disable_intr_gen2(struct megasas_instance *instance)
6610a6b3 736{
d46a3ad6 737 struct megasas_register_set __iomem *regs;
6610a6b3 738 u32 mask = 0xFFFFFFFF;
da0dc9fb 739
d46a3ad6 740 regs = instance->reg_set;
6610a6b3
YB		 741 writel(mask, &regs->outbound_intr_mask);
742 /* Dummy readl to force pci flush */
743 readl(&regs->outbound_intr_mask);
744}
745
746/**
747 * megasas_read_fw_status_reg_gen2 - returns the current FW status value
748 * @regs: MFI register set
749 */
750static u32
751megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs)
752{
753 return readl(&(regs)->outbound_scratch_pad);
754}
755
756/**
757 * megasas_clear_interrupt_gen2 - Check & clear interrupt
758 * @regs: MFI register set
759 */
760static int
761megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs)
762{
763 u32 status;
39a98554 764 u32 mfiStatus = 0;
da0dc9fb 765
6610a6b3
YB		 766 /*
767 * Check if it is our interrupt
768 */
769 status = readl(&regs->outbound_intr_status);
770
b5bccadd 771 if (status & MFI_INTR_FLAG_REPLY_MESSAGE) {
39a98554 772 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
773 }
774 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) {
775 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
776 }
6610a6b3
YB		 777
778 /*
779 * Clear the interrupt by writing back the same value
780 */
39a98554 781 if (mfiStatus)
782 writel(status, &regs->outbound_doorbell_clear);
6610a6b3
YB		 783
784 /* Dummy readl to force pci flush */
785 readl(&regs->outbound_intr_status);
786
39a98554 787 return mfiStatus;
6610a6b3
YB		 788}
789/**
790 * megasas_fire_cmd_gen2 - Sends command to the FW
791 * @frame_phys_addr : Physical address of cmd
792 * @frame_count : Number of frames for the command
793 * @regs : MFI register set
794 */
795static inline void
0c79e681
YB		 796megasas_fire_cmd_gen2(struct megasas_instance *instance,
797 dma_addr_t frame_phys_addr,
798 u32 frame_count,
6610a6b3
YB		 799 struct megasas_register_set __iomem *regs)
800{
39a98554 801 unsigned long flags;
da0dc9fb 802
39a98554 803 spin_lock_irqsave(&instance->hba_lock, flags);
6610a6b3
YB		 804 writel((frame_phys_addr | (frame_count<<1))|1,
805 &(regs)->inbound_queue_port);
39a98554 806 spin_unlock_irqrestore(&instance->hba_lock, flags);
807}
808
809/**
810 * megasas_adp_reset_gen2 - For controller reset
811 * @regs: MFI register set
812 */
813static int
814megasas_adp_reset_gen2(struct megasas_instance *instance,
815 struct megasas_register_set __iomem *reg_set)
816{
da0dc9fb
BH		 817 u32 retry = 0 ;
818 u32 HostDiag;
819 u32 __iomem *seq_offset = &reg_set->seq_offset;
820 u32 __iomem *hostdiag_offset = &reg_set->host_diag;
ebf054b0 821
822 if (instance->instancet == &megasas_instance_template_skinny) {
823 seq_offset = &reg_set->fusion_seq_offset;
824 hostdiag_offset = &reg_set->fusion_host_diag;
825 }
826
827 writel(0, seq_offset);
828 writel(4, seq_offset);
829 writel(0xb, seq_offset);
830 writel(2, seq_offset);
831 writel(7, seq_offset);
832 writel(0xd, seq_offset);
39a98554 833
39a98554 834 msleep(1000);
835
ebf054b0 836 HostDiag = (u32)readl(hostdiag_offset);
39a98554 837
da0dc9fb 838 while (!(HostDiag & DIAG_WRITE_ENABLE)) {
39a98554 839 msleep(100);
ebf054b0 840 HostDiag = (u32)readl(hostdiag_offset);
1be18254 841 dev_notice(&instance->pdev->dev, "RESETGEN2: retry=%x, hostdiag=%x\n",
39a98554 842 retry, HostDiag);
843
844 if (retry++ >= 100)
845 return 1;
846
847 }
848
1be18254 849 dev_notice(&instance->pdev->dev, "ADP_RESET_GEN2: HostDiag=%x\n", HostDiag);
39a98554 850
ebf054b0 851 writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset);
39a98554 852
853 ssleep(10);
854
ebf054b0 855 HostDiag = (u32)readl(hostdiag_offset);
da0dc9fb 856 while (HostDiag & DIAG_RESET_ADAPTER) {
39a98554 857 msleep(100);
ebf054b0 858 HostDiag = (u32)readl(hostdiag_offset);
1be18254 859 dev_notice(&instance->pdev->dev, "RESET_GEN2: retry=%x, hostdiag=%x\n",
39a98554 860 retry, HostDiag);
861
862 if (retry++ >= 1000)
863 return 1;
864
865 }
866 return 0;
867}
868
869/**
870 * megasas_check_reset_gen2 - For controller reset check
871 * @regs: MFI register set
872 */
873static int
874megasas_check_reset_gen2(struct megasas_instance *instance,
875 struct megasas_register_set __iomem *regs)
876{
707e09bd
YB		 877 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
878 return 1;
879 }
880
39a98554 881 return 0;
6610a6b3
YB		 882}
883
884static struct megasas_instance_template megasas_instance_template_gen2 = {
885
886 .fire_cmd = megasas_fire_cmd_gen2,
887 .enable_intr = megasas_enable_intr_gen2,
888 .disable_intr = megasas_disable_intr_gen2,
889 .clear_intr = megasas_clear_intr_gen2,
890 .read_fw_status_reg = megasas_read_fw_status_reg_gen2,
39a98554 891 .adp_reset = megasas_adp_reset_gen2,
892 .check_reset = megasas_check_reset_gen2,
cd50ba8e 893 .service_isr = megasas_isr,
894 .tasklet = megasas_complete_cmd_dpc,
895 .init_adapter = megasas_init_adapter_mfi,
896 .build_and_issue_cmd = megasas_build_and_issue_cmd,
897 .issue_dcmd = megasas_issue_dcmd,
6610a6b3
YB		 898};
899
f9876f0b
SP		 900/**
901* This is the end of set of functions & definitions
39a98554 902* specific to gen2 (deviceid : 0x78, 0x79) controllers
f9876f0b
SP		 903*/
904
9c915a8c 905/*
906 * Template added for TB (Fusion)
907 */
908extern struct megasas_instance_template megasas_instance_template_fusion;
909
c4a3e0a5
BS		 910/**
911 * megasas_issue_polled - Issues a polling command
912 * @instance: Adapter soft state
0d49016b 913 * @cmd: Command packet to be issued
c4a3e0a5 914 *
2be2a988 915 * For polling, MFI requires the cmd_status to be set to MFI_STAT_INVALID_STATUS before posting.
c4a3e0a5 916 */
9c915a8c 917int
c4a3e0a5
BS		 918megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
919{
229fe47c 920 int seconds;
c4a3e0a5
BS		 921 struct megasas_header *frame_hdr = &cmd->frame->hdr;
922
94cd65dd
SS		 923 frame_hdr->cmd_status = MFI_CMD_STATUS_POLL_MODE;
924 frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE);
c4a3e0a5
BS		 925
926 /*
927 * Issue the frame using inbound queue port
928 */
9c915a8c 929 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS		 930
931 /*
932 * Wait for cmd_status to change
933 */
229fe47c 934 if (instance->requestorId)
935 seconds = MEGASAS_ROUTINE_WAIT_TIME_VF;
936 else
937 seconds = MFI_POLL_TIMEOUT_SECS;
938 return wait_and_poll(instance, cmd, seconds);
c4a3e0a5
BS		 939}
940
941/**
942 * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds
943 * @instance: Adapter soft state
944 * @cmd: Command to be issued
cfbe7554 945 * @timeout: Timeout in seconds
c4a3e0a5
BS		 946 *
947 * This function waits on an event for the command to be returned from ISR.
2a3681e5 948 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 949 * Used to issue ioctl commands.
950 */
90dc9d98 951int
c4a3e0a5 952megasas_issue_blocked_cmd(struct megasas_instance *instance,
cfbe7554 953 struct megasas_cmd *cmd, int timeout)
c4a3e0a5 954{
cfbe7554 955 int ret = 0;
da0dc9fb 956
2be2a988 957 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 958
9c915a8c 959 instance->instancet->issue_dcmd(instance, cmd);
cfbe7554
SS		 960 if (timeout) {
961 ret = wait_event_timeout(instance->int_cmd_wait_q,
2be2a988 962 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554
SS		 963 if (!ret)
964 return 1;
965 } else
966 wait_event(instance->int_cmd_wait_q,
2be2a988 967 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
c4a3e0a5 968
2be2a988
SS		 969 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
970 0 : 1;
c4a3e0a5
BS		 971}
972
973/**
974 * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd
975 * @instance: Adapter soft state
976 * @cmd_to_abort: Previously issued cmd to be aborted
cfbe7554 977 * @timeout: Timeout in seconds
c4a3e0a5 978 *
cfbe7554 979 * MFI firmware can abort previously issued AEN comamnd (automatic event
c4a3e0a5 980 * notification). The megasas_issue_blocked_abort_cmd() issues such abort
2a3681e5
SP		 981 * cmd and waits for return status.
982 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 983 */
984static int
985megasas_issue_blocked_abort_cmd(struct megasas_instance *instance,
cfbe7554 986 struct megasas_cmd *cmd_to_abort, int timeout)
c4a3e0a5
BS		 987{
988 struct megasas_cmd *cmd;
989 struct megasas_abort_frame *abort_fr;
cfbe7554 990 int ret = 0;
c4a3e0a5
BS		 991
992 cmd = megasas_get_cmd(instance);
993
994 if (!cmd)
995 return -1;
996
997 abort_fr = &cmd->frame->abort;
998
999 /*
1000 * Prepare and issue the abort frame
1001 */
1002 abort_fr->cmd = MFI_CMD_ABORT;
2be2a988 1003 abort_fr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 1004 abort_fr->flags = cpu_to_le16(0);
1005 abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index);
1006 abort_fr->abort_mfi_phys_addr_lo =
1007 cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr));
1008 abort_fr->abort_mfi_phys_addr_hi =
1009 cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr));
c4a3e0a5
BS		 1010
1011 cmd->sync_cmd = 1;
2be2a988 1012 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1013
9c915a8c 1014 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5 1015
cfbe7554
SS		 1016 if (timeout) {
1017 ret = wait_event_timeout(instance->abort_cmd_wait_q,
2be2a988 1018 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554
SS		 1019 if (!ret) {
1020 dev_err(&instance->pdev->dev, "Command timedout"
1021 "from %s\n", __func__);
1022 return 1;
1023 }
1024 } else
1025 wait_event(instance->abort_cmd_wait_q,
2be2a988 1026 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
cfbe7554 1027
39a98554 1028 cmd->sync_cmd = 0;
c4a3e0a5
BS		 1029
1030 megasas_return_cmd(instance, cmd);
1031 return 0;
1032}
1033
1034/**
1035 * megasas_make_sgl32 - Prepares 32-bit SGL
1036 * @instance: Adapter soft state
1037 * @scp: SCSI command from the mid-layer
1038 * @mfi_sgl: SGL to be filled in
1039 *
1040 * If successful, this function returns the number of SG elements. Otherwise,
1041 * it returnes -1.
1042 */
858119e1 1043static int
c4a3e0a5
BS		 1044megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp,
1045 union megasas_sgl *mfi_sgl)
1046{
1047 int i;
1048 int sge_count;
1049 struct scatterlist *os_sgl;
1050
155d98f0
FT		 1051 sge_count = scsi_dma_map(scp);
1052 BUG_ON(sge_count < 0);
c4a3e0a5 1053
155d98f0
FT		 1054 if (sge_count) {
1055 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1056 mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1057 mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl));
155d98f0 1058 }
c4a3e0a5 1059 }
c4a3e0a5
BS		 1060 return sge_count;
1061}
1062
1063/**
1064 * megasas_make_sgl64 - Prepares 64-bit SGL
1065 * @instance: Adapter soft state
1066 * @scp: SCSI command from the mid-layer
1067 * @mfi_sgl: SGL to be filled in
1068 *
1069 * If successful, this function returns the number of SG elements. Otherwise,
1070 * it returnes -1.
1071 */
858119e1 1072static int
c4a3e0a5
BS		 1073megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp,
1074 union megasas_sgl *mfi_sgl)
1075{
1076 int i;
1077 int sge_count;
1078 struct scatterlist *os_sgl;
1079
155d98f0
FT		 1080 sge_count = scsi_dma_map(scp);
1081 BUG_ON(sge_count < 0);
c4a3e0a5 1082
155d98f0
FT		 1083 if (sge_count) {
1084 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1085 mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1086 mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl));
155d98f0 1087 }
c4a3e0a5 1088 }
c4a3e0a5
BS		 1089 return sge_count;
1090}
1091
f4c9a131
YB		 1092/**
1093 * megasas_make_sgl_skinny - Prepares IEEE SGL
1094 * @instance: Adapter soft state
1095 * @scp: SCSI command from the mid-layer
1096 * @mfi_sgl: SGL to be filled in
1097 *
1098 * If successful, this function returns the number of SG elements. Otherwise,
1099 * it returnes -1.
1100 */
1101static int
1102megasas_make_sgl_skinny(struct megasas_instance *instance,
1103 struct scsi_cmnd *scp, union megasas_sgl *mfi_sgl)
1104{
1105 int i;
1106 int sge_count;
1107 struct scatterlist *os_sgl;
1108
1109 sge_count = scsi_dma_map(scp);
1110
1111 if (sge_count) {
1112 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1113 mfi_sgl->sge_skinny[i].length =
1114 cpu_to_le32(sg_dma_len(os_sgl));
f4c9a131 1115 mfi_sgl->sge_skinny[i].phys_addr =
94cd65dd
SS		 1116 cpu_to_le64(sg_dma_address(os_sgl));
1117 mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0);
f4c9a131
YB		 1118 }
1119 }
1120 return sge_count;
1121}
1122
b1df99d9
SP		 1123 /**
1124 * megasas_get_frame_count - Computes the number of frames
d532dbe2 1125 * @frame_type : type of frame- io or pthru frame
b1df99d9
SP		 1126 * @sge_count : number of sg elements
1127 *
1128 * Returns the number of frames required for numnber of sge's (sge_count)
1129 */
1130
f4c9a131
YB		 1131static u32 megasas_get_frame_count(struct megasas_instance *instance,
1132 u8 sge_count, u8 frame_type)
b1df99d9
SP		 1133{
1134 int num_cnt;
1135 int sge_bytes;
1136 u32 sge_sz;
da0dc9fb 1137 u32 frame_count = 0;
b1df99d9
SP		 1138
1139 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
1140 sizeof(struct megasas_sge32);
1141
f4c9a131
YB		 1142 if (instance->flag_ieee) {
1143 sge_sz = sizeof(struct megasas_sge_skinny);
1144 }
1145
b1df99d9 1146 /*
d532dbe2 1147 * Main frame can contain 2 SGEs for 64-bit SGLs and
1148 * 3 SGEs for 32-bit SGLs for ldio &
1149 * 1 SGEs for 64-bit SGLs and
1150 * 2 SGEs for 32-bit SGLs for pthru frame
1151 */
1152 if (unlikely(frame_type == PTHRU_FRAME)) {
f4c9a131
YB		 1153 if (instance->flag_ieee == 1) {
1154 num_cnt = sge_count - 1;
1155 } else if (IS_DMA64)
d532dbe2 1156 num_cnt = sge_count - 1;
1157 else
1158 num_cnt = sge_count - 2;
1159 } else {
f4c9a131
YB		 1160 if (instance->flag_ieee == 1) {
1161 num_cnt = sge_count - 1;
1162 } else if (IS_DMA64)
d532dbe2 1163 num_cnt = sge_count - 2;
1164 else
1165 num_cnt = sge_count - 3;
1166 }
b1df99d9 1167
da0dc9fb 1168 if (num_cnt > 0) {
b1df99d9
SP		 1169 sge_bytes = sge_sz * num_cnt;
1170
1171 frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) +
1172 ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) ;
1173 }
1174 /* Main frame */
da0dc9fb 1175 frame_count += 1;
b1df99d9
SP		 1176
1177 if (frame_count > 7)
1178 frame_count = 8;
1179 return frame_count;
1180}
1181
c4a3e0a5
BS		 1182/**
1183 * megasas_build_dcdb - Prepares a direct cdb (DCDB) command
1184 * @instance: Adapter soft state
1185 * @scp: SCSI command
1186 * @cmd: Command to be prepared in
1187 *
1188 * This function prepares CDB commands. These are typcially pass-through
1189 * commands to the devices.
1190 */
858119e1 1191static int
c4a3e0a5
BS		 1192megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
1193 struct megasas_cmd *cmd)
1194{
c4a3e0a5
BS		 1195 u32 is_logical;
1196 u32 device_id;
1197 u16 flags = 0;
1198 struct megasas_pthru_frame *pthru;
1199
1200 is_logical = MEGASAS_IS_LOGICAL(scp);
4a5c814d 1201 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1202 pthru = (struct megasas_pthru_frame *)cmd->frame;
1203
1204 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1205 flags = MFI_FRAME_DIR_WRITE;
1206 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1207 flags = MFI_FRAME_DIR_READ;
1208 else if (scp->sc_data_direction == PCI_DMA_NONE)
1209 flags = MFI_FRAME_DIR_NONE;
1210
f4c9a131
YB		 1211 if (instance->flag_ieee == 1) {
1212 flags |= MFI_FRAME_IEEE;
1213 }
1214
c4a3e0a5
BS		 1215 /*
1216 * Prepare the DCDB frame
1217 */
1218 pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO;
1219 pthru->cmd_status = 0x0;
1220 pthru->scsi_status = 0x0;
1221 pthru->target_id = device_id;
1222 pthru->lun = scp->device->lun;
1223 pthru->cdb_len = scp->cmd_len;
1224 pthru->timeout = 0;
780a3762 1225 pthru->pad_0 = 0;
94cd65dd
SS		 1226 pthru->flags = cpu_to_le16(flags);
1227 pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp));
c4a3e0a5
BS		 1228
1229 memcpy(pthru->cdb, scp->cmnd, scp->cmd_len);
1230
8d568253 1231 /*
da0dc9fb
BH		 1232 * If the command is for the tape device, set the
1233 * pthru timeout to the os layer timeout value.
1234 */
8d568253
YB		 1235 if (scp->device->type == TYPE_TAPE) {
1236 if ((scp->request->timeout / HZ) > 0xFFFF)
c6f5bf81 1237 pthru->timeout = cpu_to_le16(0xFFFF);
8d568253 1238 else
94cd65dd 1239 pthru->timeout = cpu_to_le16(scp->request->timeout / HZ);
8d568253
YB		 1240 }
1241
c4a3e0a5
BS		 1242 /*
1243 * Construct SGL
1244 */
f4c9a131 1245 if (instance->flag_ieee == 1) {
94cd65dd 1246 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1247 pthru->sge_count = megasas_make_sgl_skinny(instance, scp,
1248 &pthru->sgl);
1249 } else if (IS_DMA64) {
94cd65dd 1250 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1251 pthru->sge_count = megasas_make_sgl64(instance, scp,
1252 &pthru->sgl);
1253 } else
1254 pthru->sge_count = megasas_make_sgl32(instance, scp,
1255 &pthru->sgl);
1256
bdc6fb8d 1257 if (pthru->sge_count > instance->max_num_sge) {
1be18254 1258 dev_err(&instance->pdev->dev, "DCDB too many SGE NUM=%x\n",
bdc6fb8d
YB		 1259 pthru->sge_count);
1260 return 0;
1261 }
1262
c4a3e0a5
BS		 1263 /*
1264 * Sense info specific
1265 */
1266 pthru->sense_len = SCSI_SENSE_BUFFERSIZE;
94cd65dd
SS		 1267 pthru->sense_buf_phys_addr_hi =
1268 cpu_to_le32(upper_32_bits(cmd->sense_phys_addr));
1269 pthru->sense_buf_phys_addr_lo =
1270 cpu_to_le32(lower_32_bits(cmd->sense_phys_addr));
c4a3e0a5 1271
c4a3e0a5
BS		 1272 /*
1273 * Compute the total number of frames this command consumes. FW uses
1274 * this number to pull sufficient number of frames from host memory.
1275 */
f4c9a131 1276 cmd->frame_count = megasas_get_frame_count(instance, pthru->sge_count,
d532dbe2 1277 PTHRU_FRAME);
c4a3e0a5
BS		 1278
1279 return cmd->frame_count;
1280}
1281
1282/**
1283 * megasas_build_ldio - Prepares IOs to logical devices
1284 * @instance: Adapter soft state
1285 * @scp: SCSI command
fd589a8f 1286 * @cmd: Command to be prepared
c4a3e0a5
BS		 1287 *
1288 * Frames (and accompanying SGLs) for regular SCSI IOs use this function.
1289 */
858119e1 1290static int
c4a3e0a5
BS		 1291megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
1292 struct megasas_cmd *cmd)
1293{
c4a3e0a5
BS		 1294 u32 device_id;
1295 u8 sc = scp->cmnd[0];
1296 u16 flags = 0;
1297 struct megasas_io_frame *ldio;
1298
4a5c814d 1299 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1300 ldio = (struct megasas_io_frame *)cmd->frame;
1301
1302 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1303 flags = MFI_FRAME_DIR_WRITE;
1304 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1305 flags = MFI_FRAME_DIR_READ;
1306
f4c9a131
YB		 1307 if (instance->flag_ieee == 1) {
1308 flags |= MFI_FRAME_IEEE;
1309 }
1310
c4a3e0a5 1311 /*
b1df99d9 1312 * Prepare the Logical IO frame: 2nd bit is zero for all read cmds
c4a3e0a5
BS		 1313 */
1314 ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ;
1315 ldio->cmd_status = 0x0;
1316 ldio->scsi_status = 0x0;
1317 ldio->target_id = device_id;
1318 ldio->timeout = 0;
1319 ldio->reserved_0 = 0;
1320 ldio->pad_0 = 0;
94cd65dd 1321 ldio->flags = cpu_to_le16(flags);
c4a3e0a5
BS		 1322 ldio->start_lba_hi = 0;
1323 ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0;
1324
1325 /*
1326 * 6-byte READ(0x08) or WRITE(0x0A) cdb
1327 */
1328 if (scp->cmd_len == 6) {
94cd65dd
SS		 1329 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]);
1330 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) |
1331 ((u32) scp->cmnd[2] << 8) |
1332 (u32) scp->cmnd[3]);
c4a3e0a5 1333
94cd65dd 1334 ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF);
c4a3e0a5
BS		 1335 }
1336
1337 /*
1338 * 10-byte READ(0x28) or WRITE(0x2A) cdb
1339 */
1340 else if (scp->cmd_len == 10) {
94cd65dd
SS		 1341 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] |
1342 ((u32) scp->cmnd[7] << 8));
1343 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1344 ((u32) scp->cmnd[3] << 16) |
1345 ((u32) scp->cmnd[4] << 8) |
1346 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1347 }
1348
1349 /*
1350 * 12-byte READ(0xA8) or WRITE(0xAA) cdb
1351 */
1352 else if (scp->cmd_len == 12) {
94cd65dd
SS		 1353 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1354 ((u32) scp->cmnd[7] << 16) |
1355 ((u32) scp->cmnd[8] << 8) |
1356 (u32) scp->cmnd[9]);
c4a3e0a5 1357
94cd65dd
SS		 1358 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1359 ((u32) scp->cmnd[3] << 16) |
1360 ((u32) scp->cmnd[4] << 8) |
1361 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1362 }
1363
1364 /*
1365 * 16-byte READ(0x88) or WRITE(0x8A) cdb
1366 */
1367 else if (scp->cmd_len == 16) {
94cd65dd
SS		 1368 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) |
1369 ((u32) scp->cmnd[11] << 16) |
1370 ((u32) scp->cmnd[12] << 8) |
1371 (u32) scp->cmnd[13]);
c4a3e0a5 1372
94cd65dd
SS		 1373 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1374 ((u32) scp->cmnd[7] << 16) |
1375 ((u32) scp->cmnd[8] << 8) |
1376 (u32) scp->cmnd[9]);
c4a3e0a5 1377
94cd65dd
SS		 1378 ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1379 ((u32) scp->cmnd[3] << 16) |
1380 ((u32) scp->cmnd[4] << 8) |
1381 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1382
1383 }
1384
1385 /*
1386 * Construct SGL
1387 */
f4c9a131 1388 if (instance->flag_ieee) {
94cd65dd 1389 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1390 ldio->sge_count = megasas_make_sgl_skinny(instance, scp,
1391 &ldio->sgl);
1392 } else if (IS_DMA64) {
94cd65dd 1393 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1394 ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl);
1395 } else
1396 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl);
1397
bdc6fb8d 1398 if (ldio->sge_count > instance->max_num_sge) {
1be18254 1399 dev_err(&instance->pdev->dev, "build_ld_io: sge_count = %x\n",
bdc6fb8d
YB		 1400 ldio->sge_count);
1401 return 0;
1402 }
1403
c4a3e0a5
BS		 1404 /*
1405 * Sense info specific
1406 */
1407 ldio->sense_len = SCSI_SENSE_BUFFERSIZE;
1408 ldio->sense_buf_phys_addr_hi = 0;
94cd65dd 1409 ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr);
c4a3e0a5 1410
b1df99d9
SP		 1411 /*
1412 * Compute the total number of frames this command consumes. FW uses
1413 * this number to pull sufficient number of frames from host memory.
1414 */
f4c9a131
YB		 1415 cmd->frame_count = megasas_get_frame_count(instance,
1416 ldio->sge_count, IO_FRAME);
c4a3e0a5
BS		 1417
1418 return cmd->frame_count;
1419}
1420
1421/**
7497cde8
SS		 1422 * megasas_cmd_type - Checks if the cmd is for logical drive/sysPD
1423 * and whether it's RW or non RW
cb59aa6a 1424 * @scmd: SCSI command
0d49016b 1425 *
c4a3e0a5 1426 */
7497cde8 1427inline int megasas_cmd_type(struct scsi_cmnd *cmd)
c4a3e0a5 1428{
7497cde8
SS		 1429 int ret;
1430
cb59aa6a
SP		 1431 switch (cmd->cmnd[0]) {
1432 case READ_10:
1433 case WRITE_10:
1434 case READ_12:
1435 case WRITE_12:
1436 case READ_6:
1437 case WRITE_6:
1438 case READ_16:
1439 case WRITE_16:
7497cde8
SS		 1440 ret = (MEGASAS_IS_LOGICAL(cmd)) ?
1441 READ_WRITE_LDIO : READ_WRITE_SYSPDIO;
1442 break;
cb59aa6a 1443 default:
7497cde8
SS		 1444 ret = (MEGASAS_IS_LOGICAL(cmd)) ?
1445 NON_READ_WRITE_LDIO : NON_READ_WRITE_SYSPDIO;
c4a3e0a5 1446 }
7497cde8 1447 return ret;
c4a3e0a5
BS		 1448}
1449
658dcedb
SP		 1450 /**
1451 * megasas_dump_pending_frames - Dumps the frame address of all pending cmds
da0dc9fb 1452 * in FW
658dcedb
SP		 1453 * @instance: Adapter soft state
1454 */
1455static inline void
1456megasas_dump_pending_frames(struct megasas_instance *instance)
1457{
1458 struct megasas_cmd *cmd;
1459 int i,n;
1460 union megasas_sgl *mfi_sgl;
1461 struct megasas_io_frame *ldio;
1462 struct megasas_pthru_frame *pthru;
1463 u32 sgcount;
1464 u32 max_cmd = instance->max_fw_cmds;
1465
1be18254
BH		 1466 dev_err(&instance->pdev->dev, "[%d]: Dumping Frame Phys Address of all pending cmds in FW\n",instance->host->host_no);
1467 dev_err(&instance->pdev->dev, "[%d]: Total OS Pending cmds : %d\n",instance->host->host_no,atomic_read(&instance->fw_outstanding));
658dcedb 1468 if (IS_DMA64)
1be18254 1469 dev_err(&instance->pdev->dev, "[%d]: 64 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1470 else
1be18254 1471 dev_err(&instance->pdev->dev, "[%d]: 32 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1472
1be18254 1473 dev_err(&instance->pdev->dev, "[%d]: Pending OS cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1474 for (i = 0; i < max_cmd; i++) {
1475 cmd = instance->cmd_list[i];
da0dc9fb 1476 if (!cmd->scmd)
658dcedb 1477 continue;
1be18254 1478 dev_err(&instance->pdev->dev, "[%d]: Frame addr :0x%08lx : ",instance->host->host_no,(unsigned long)cmd->frame_phys_addr);
7497cde8 1479 if (megasas_cmd_type(cmd->scmd) == READ_WRITE_LDIO) {
658dcedb
SP		 1480 ldio = (struct megasas_io_frame *)cmd->frame;
1481 mfi_sgl = &ldio->sgl;
1482 sgcount = ldio->sge_count;
1be18254 1483 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x,"
94cd65dd
SS		 1484 " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1485 instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id,
1486 le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi),
1487 le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount);
da0dc9fb 1488 } else {
658dcedb
SP		 1489 pthru = (struct megasas_pthru_frame *) cmd->frame;
1490 mfi_sgl = &pthru->sgl;
1491 sgcount = pthru->sge_count;
1be18254 1492 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, "
94cd65dd
SS		 1493 "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1494 instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id,
1495 pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len),
1496 le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount);
658dcedb 1497 }
da0dc9fb
BH		 1498 if (megasas_dbg_lvl & MEGASAS_DBG_LVL) {
1499 for (n = 0; n < sgcount; n++) {
1500 if (IS_DMA64)
1501 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%llx\n",
1502 le32_to_cpu(mfi_sgl->sge64[n].length),
1503 le64_to_cpu(mfi_sgl->sge64[n].phys_addr));
1504 else
1505 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%x\n",
1506 le32_to_cpu(mfi_sgl->sge32[n].length),
1507 le32_to_cpu(mfi_sgl->sge32[n].phys_addr));
658dcedb
SP		 1508 }
1509 }
658dcedb 1510 } /*for max_cmd*/
1be18254 1511 dev_err(&instance->pdev->dev, "[%d]: Pending Internal cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1512 for (i = 0; i < max_cmd; i++) {
1513
1514 cmd = instance->cmd_list[i];
1515
da0dc9fb 1516 if (cmd->sync_cmd == 1)
1be18254 1517 dev_err(&instance->pdev->dev, "0x%08lx : ", (unsigned long)cmd->frame_phys_addr);
658dcedb 1518 }
1be18254 1519 dev_err(&instance->pdev->dev, "[%d]: Dumping Done\n\n",instance->host->host_no);
658dcedb
SP		 1520}
1521
cd50ba8e 1522u32
1523megasas_build_and_issue_cmd(struct megasas_instance *instance,
1524 struct scsi_cmnd *scmd)
1525{
1526 struct megasas_cmd *cmd;
1527 u32 frame_count;
1528
1529 cmd = megasas_get_cmd(instance);
1530 if (!cmd)
1531 return SCSI_MLQUEUE_HOST_BUSY;
1532
1533 /*
1534 * Logical drive command
1535 */
7497cde8 1536 if (megasas_cmd_type(scmd) == READ_WRITE_LDIO)
cd50ba8e 1537 frame_count = megasas_build_ldio(instance, scmd, cmd);
1538 else
1539 frame_count = megasas_build_dcdb(instance, scmd, cmd);
1540
1541 if (!frame_count)
1542 goto out_return_cmd;
1543
1544 cmd->scmd = scmd;
1545 scmd->SCp.ptr = (char *)cmd;
1546
1547 /*
1548 * Issue the command to the FW
1549 */
1550 atomic_inc(&instance->fw_outstanding);
1551
1552 instance->instancet->fire_cmd(instance, cmd->frame_phys_addr,
1553 cmd->frame_count-1, instance->reg_set);
cd50ba8e 1554
1555 return 0;
1556out_return_cmd:
1557 megasas_return_cmd(instance, cmd);
1558 return 1;
1559}
1560
1561
c4a3e0a5
BS		 1562/**
1563 * megasas_queue_command - Queue entry point
1564 * @scmd: SCSI command to be queued
1565 * @done: Callback entry point
1566 */
1567static int
fb1a24ff 1568megasas_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
c4a3e0a5 1569{
c4a3e0a5 1570 struct megasas_instance *instance;
39a98554 1571 unsigned long flags;
c4a3e0a5
BS		 1572
1573 instance = (struct megasas_instance *)
1574 scmd->device->host->hostdata;
af37acfb 1575
aa00832b
SS		 1576 if (instance->unload == 1) {
1577 scmd->result = DID_NO_CONNECT << 16;
1578 scmd->scsi_done(scmd);
1579 return 0;
1580 }
1581
39a98554 1582 if (instance->issuepend_done == 0)
af37acfb
SP		 1583 return SCSI_MLQUEUE_HOST_BUSY;
1584
39a98554 1585 spin_lock_irqsave(&instance->hba_lock, flags);
b09e66da 1586
229fe47c 1587 /* Check for an mpio path and adjust behavior */
1588 if (instance->adprecovery == MEGASAS_ADPRESET_SM_INFAULT) {
1589 if (megasas_check_mpio_paths(instance, scmd) ==
1590 (DID_RESET << 16)) {
1591 spin_unlock_irqrestore(&instance->hba_lock, flags);
1592 return SCSI_MLQUEUE_HOST_BUSY;
1593 } else {
1594 spin_unlock_irqrestore(&instance->hba_lock, flags);
1595 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1596 scmd->scsi_done(scmd);
229fe47c 1597 return 0;
1598 }
1599 }
1600
b09e66da
SS		 1601 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
1602 spin_unlock_irqrestore(&instance->hba_lock, flags);
229fe47c 1603 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1604 scmd->scsi_done(scmd);
b09e66da
SS		 1605 return 0;
1606 }
1607
39a98554 1608 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
1609 spin_unlock_irqrestore(&instance->hba_lock, flags);
1610 return SCSI_MLQUEUE_HOST_BUSY;
1611 }
1612
1613 spin_unlock_irqrestore(&instance->hba_lock, flags);
1614
c4a3e0a5
BS		 1615 scmd->result = 0;
1616
cb59aa6a 1617 if (MEGASAS_IS_LOGICAL(scmd) &&
51087a86
SS		 1618 (scmd->device->id >= instance->fw_supported_vd_count ||
1619 scmd->device->lun)) {
cb59aa6a
SP		 1620 scmd->result = DID_BAD_TARGET << 16;
1621 goto out_done;
c4a3e0a5
BS		 1622 }
1623
02b01e01
SP		 1624 switch (scmd->cmnd[0]) {
1625 case SYNCHRONIZE_CACHE:
1626 /*
1627 * FW takes care of flush cache on its own
1628 * No need to send it down
1629 */
1630 scmd->result = DID_OK << 16;
1631 goto out_done;
1632 default:
1633 break;
1634 }
1635
cd50ba8e 1636 if (instance->instancet->build_and_issue_cmd(instance, scmd)) {
1be18254 1637 dev_err(&instance->pdev->dev, "Err returned from build_and_issue_cmd\n");
cb59aa6a 1638 return SCSI_MLQUEUE_HOST_BUSY;
cd50ba8e 1639 }
c4a3e0a5
BS		 1640
1641 return 0;
cb59aa6a 1642
cb59aa6a 1643 out_done:
fb1a24ff 1644 scmd->scsi_done(scmd);
cb59aa6a 1645 return 0;
c4a3e0a5
BS		 1646}
1647
044833b5
YB		 1648static struct megasas_instance *megasas_lookup_instance(u16 host_no)
1649{
1650 int i;
1651
1652 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
1653
1654 if ((megasas_mgmt_info.instance[i]) &&
1655 (megasas_mgmt_info.instance[i]->host->host_no == host_no))
1656 return megasas_mgmt_info.instance[i];
1657 }
1658
1659 return NULL;
1660}
1661
147aab6a
CH		 1662static int megasas_slave_configure(struct scsi_device *sdev)
1663{
e5b3a65f 1664 /*
da0dc9fb
BH		 1665 * The RAID firmware may require extended timeouts.
1666 */
044833b5
YB		 1667 blk_queue_rq_timeout(sdev->request_queue,
1668 MEGASAS_DEFAULT_CMD_TIMEOUT * HZ);
07e38d94 1669
044833b5
YB		 1670 return 0;
1671}
1672
1673static int megasas_slave_alloc(struct scsi_device *sdev)
1674{
da0dc9fb 1675 u16 pd_index = 0;
044833b5 1676 struct megasas_instance *instance ;
da0dc9fb 1677
044833b5 1678 instance = megasas_lookup_instance(sdev->host->host_no);
07e38d94 1679 if (sdev->channel < MEGASAS_MAX_PD_CHANNELS) {
044833b5
YB		 1680 /*
1681 * Open the OS scan to the SYSTEM PD
1682 */
1683 pd_index =
1684 (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1685 sdev->id;
07e38d94
SS		 1686 if (instance->pd_list[pd_index].driveState ==
1687 MR_PD_STATE_SYSTEM) {
044833b5
YB		 1688 return 0;
1689 }
1690 return -ENXIO;
1691 }
147aab6a
CH		 1692 return 0;
1693}
1694
c8dd61ef
SS		 1695/*
1696* megasas_complete_outstanding_ioctls - Complete outstanding ioctls after a
1697* kill adapter
1698* @instance: Adapter soft state
1699*
1700*/
6a6981fe 1701static void megasas_complete_outstanding_ioctls(struct megasas_instance *instance)
c8dd61ef
SS		 1702{
1703 int i;
1704 struct megasas_cmd *cmd_mfi;
1705 struct megasas_cmd_fusion *cmd_fusion;
1706 struct fusion_context *fusion = instance->ctrl_context;
1707
1708 /* Find all outstanding ioctls */
1709 if (fusion) {
1710 for (i = 0; i < instance->max_fw_cmds; i++) {
1711 cmd_fusion = fusion->cmd_list[i];
1712 if (cmd_fusion->sync_cmd_idx != (u32)ULONG_MAX) {
1713 cmd_mfi = instance->cmd_list[cmd_fusion->sync_cmd_idx];
1714 if (cmd_mfi->sync_cmd &&
1715 cmd_mfi->frame->hdr.cmd != MFI_CMD_ABORT)
1716 megasas_complete_cmd(instance,
1717 cmd_mfi, DID_OK);
1718 }
1719 }
1720 } else {
1721 for (i = 0; i < instance->max_fw_cmds; i++) {
1722 cmd_mfi = instance->cmd_list[i];
1723 if (cmd_mfi->sync_cmd && cmd_mfi->frame->hdr.cmd !=
1724 MFI_CMD_ABORT)
1725 megasas_complete_cmd(instance, cmd_mfi, DID_OK);
1726 }
1727 }
1728}
1729
1730
9c915a8c 1731void megaraid_sas_kill_hba(struct megasas_instance *instance)
39a98554 1732{
c8dd61ef
SS		 1733 /* Set critical error to block I/O & ioctls in case caller didn't */
1734 instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR;
1735 /* Wait 1 second to ensure IO or ioctls in build have posted */
1736 msleep(1000);
39a98554 1737 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
c8dd61ef
SS		 1738 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
1739 (instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
1740 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
1741 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
1742 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
da0dc9fb 1743 writel(MFI_STOP_ADP, &instance->reg_set->doorbell);
229fe47c 1744 /* Flush */
1745 readl(&instance->reg_set->doorbell);
1746 if (instance->mpio && instance->requestorId)
1747 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
39a98554 1748 } else {
c8dd61ef
SS		 1749 writel(MFI_STOP_ADP,
1750 &instance->reg_set->inbound_doorbell);
9c915a8c 1751 }
c8dd61ef
SS		 1752 /* Complete outstanding ioctls when adapter is killed */
1753 megasas_complete_outstanding_ioctls(instance);
9c915a8c 1754}
1755
1756 /**
1757 * megasas_check_and_restore_queue_depth - Check if queue depth needs to be
1758 * restored to max value
1759 * @instance: Adapter soft state
1760 *
1761 */
1762void
1763megasas_check_and_restore_queue_depth(struct megasas_instance *instance)
1764{
1765 unsigned long flags;
ae09a6c1 1766
9c915a8c 1767 if (instance->flag & MEGASAS_FW_BUSY
c5daa6a9 1768 && time_after(jiffies, instance->last_time + 5 * HZ)
1769 && atomic_read(&instance->fw_outstanding) <
1770 instance->throttlequeuedepth + 1) {
9c915a8c 1771
1772 spin_lock_irqsave(instance->host->host_lock, flags);
1773 instance->flag &= ~MEGASAS_FW_BUSY;
9c915a8c 1774
ae09a6c1 1775 instance->host->can_queue = instance->max_scsi_cmds;
9c915a8c 1776 spin_unlock_irqrestore(instance->host->host_lock, flags);
39a98554 1777 }
1778}
1779
7343eb65 1780/**
1781 * megasas_complete_cmd_dpc - Returns FW's controller structure
1782 * @instance_addr: Address of adapter soft state
1783 *
1784 * Tasklet to complete cmds
1785 */
1786static void megasas_complete_cmd_dpc(unsigned long instance_addr)
1787{
1788 u32 producer;
1789 u32 consumer;
1790 u32 context;
1791 struct megasas_cmd *cmd;
1792 struct megasas_instance *instance =
1793 (struct megasas_instance *)instance_addr;
1794 unsigned long flags;
1795
1796 /* If we have already declared adapter dead, donot complete cmds */
da0dc9fb 1797 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR)
7343eb65 1798 return;
1799
1800 spin_lock_irqsave(&instance->completion_lock, flags);
1801
94cd65dd
SS		 1802 producer = le32_to_cpu(*instance->producer);
1803 consumer = le32_to_cpu(*instance->consumer);
7343eb65 1804
1805 while (consumer != producer) {
94cd65dd 1806 context = le32_to_cpu(instance->reply_queue[consumer]);
39a98554 1807 if (context >= instance->max_fw_cmds) {
1be18254 1808 dev_err(&instance->pdev->dev, "Unexpected context value %x\n",
39a98554 1809 context);
1810 BUG();
1811 }
7343eb65 1812
1813 cmd = instance->cmd_list[context];
1814
1815 megasas_complete_cmd(instance, cmd, DID_OK);
1816
1817 consumer++;
1818 if (consumer == (instance->max_fw_cmds + 1)) {
1819 consumer = 0;
1820 }
1821 }
1822
94cd65dd 1823 *instance->consumer = cpu_to_le32(producer);
7343eb65 1824
1825 spin_unlock_irqrestore(&instance->completion_lock, flags);
1826
1827 /*
1828 * Check if we can restore can_queue
1829 */
9c915a8c 1830 megasas_check_and_restore_queue_depth(instance);
7343eb65 1831}
1832
229fe47c 1833/**
1834 * megasas_start_timer - Initializes a timer object
1835 * @instance: Adapter soft state
1836 * @timer: timer object to be initialized
1837 * @fn: timer function
1838 * @interval: time interval between timer function call
1839 *
1840 */
1841void megasas_start_timer(struct megasas_instance *instance,
1842 struct timer_list *timer,
1843 void *fn, unsigned long interval)
1844{
1845 init_timer(timer);
1846 timer->expires = jiffies + interval;
1847 timer->data = (unsigned long)instance;
1848 timer->function = fn;
1849 add_timer(timer);
1850}
1851
707e09bd
YB		 1852static void
1853megasas_internal_reset_defer_cmds(struct megasas_instance *instance);
1854
1855static void
1856process_fw_state_change_wq(struct work_struct *work);
1857
1858void megasas_do_ocr(struct megasas_instance *instance)
1859{
1860 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
1861 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
1862 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
94cd65dd 1863 *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
707e09bd 1864 }
d46a3ad6 1865 instance->instancet->disable_intr(instance);
707e09bd
YB		 1866 instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT;
1867 instance->issuepend_done = 0;
1868
1869 atomic_set(&instance->fw_outstanding, 0);
1870 megasas_internal_reset_defer_cmds(instance);
1871 process_fw_state_change_wq(&instance->work_init);
1872}
1873
4cbfea88
AR		 1874static int megasas_get_ld_vf_affiliation_111(struct megasas_instance *instance,
1875 int initial)
229fe47c 1876{
1877 struct megasas_cmd *cmd;
1878 struct megasas_dcmd_frame *dcmd;
229fe47c 1879 struct MR_LD_VF_AFFILIATION_111 *new_affiliation_111 = NULL;
229fe47c 1880 dma_addr_t new_affiliation_111_h;
1881 int ld, retval = 0;
1882 u8 thisVf;
1883
1884 cmd = megasas_get_cmd(instance);
1885
1886 if (!cmd) {
1be18254
BH		 1887 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation_111:"
1888 "Failed to get cmd for scsi%d\n",
229fe47c 1889 instance->host->host_no);
1890 return -ENOMEM;
1891 }
1892
1893 dcmd = &cmd->frame->dcmd;
1894
4cbfea88 1895 if (!instance->vf_affiliation_111) {
1be18254
BH		 1896 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
1897 "affiliation for scsi%d\n", instance->host->host_no);
229fe47c 1898 megasas_return_cmd(instance, cmd);
1899 return -ENOMEM;
1900 }
1901
1902 if (initial)
229fe47c 1903 memset(instance->vf_affiliation_111, 0,
1904 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 1905 else {
4cbfea88
AR		 1906 new_affiliation_111 =
1907 pci_alloc_consistent(instance->pdev,
1908 sizeof(struct MR_LD_VF_AFFILIATION_111),
1909 &new_affiliation_111_h);
1910 if (!new_affiliation_111) {
1be18254
BH		 1911 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
1912 "memory for new affiliation for scsi%d\n",
4cbfea88 1913 instance->host->host_no);
229fe47c 1914 megasas_return_cmd(instance, cmd);
1915 return -ENOMEM;
1916 }
4cbfea88
AR		 1917 memset(new_affiliation_111, 0,
1918 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 1919 }
1920
1921 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
1922
1923 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 1924 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 1925 dcmd->sge_count = 1;
2213a467 1926 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c 1927 dcmd->timeout = 0;
1928 dcmd->pad_0 = 0;
2213a467
CH		 1929 dcmd->data_xfer_len =
1930 cpu_to_le32(sizeof(struct MR_LD_VF_AFFILIATION_111));
1931 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111);
229fe47c 1932
4cbfea88
AR		 1933 if (initial)
1934 dcmd->sgl.sge32[0].phys_addr =
2213a467 1935 cpu_to_le32(instance->vf_affiliation_111_h);
229fe47c 1936 else
2213a467
CH		 1937 dcmd->sgl.sge32[0].phys_addr =
1938 cpu_to_le32(new_affiliation_111_h);
4cbfea88 1939
2213a467
CH		 1940 dcmd->sgl.sge32[0].length = cpu_to_le32(
1941 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 1942
1be18254 1943 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
229fe47c 1944 "scsi%d\n", instance->host->host_no);
1945
1946 megasas_issue_blocked_cmd(instance, cmd, 0);
1947
1948 if (dcmd->cmd_status) {
1be18254
BH		 1949 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
1950 " failed with status 0x%x for scsi%d\n",
229fe47c 1951 dcmd->cmd_status, instance->host->host_no);
1952 retval = 1; /* Do a scan if we couldn't get affiliation */
1953 goto out;
1954 }
1955
1956 if (!initial) {
4cbfea88
AR		 1957 thisVf = new_affiliation_111->thisVf;
1958 for (ld = 0 ; ld < new_affiliation_111->vdCount; ld++)
1959 if (instance->vf_affiliation_111->map[ld].policy[thisVf] !=
1960 new_affiliation_111->map[ld].policy[thisVf]) {
1be18254
BH		 1961 dev_warn(&instance->pdev->dev, "SR-IOV: "
1962 "Got new LD/VF affiliation for scsi%d\n",
229fe47c 1963 instance->host->host_no);
4cbfea88
AR		 1964 memcpy(instance->vf_affiliation_111,
1965 new_affiliation_111,
1966 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 1967 retval = 1;
1968 goto out;
1969 }
4cbfea88
AR		 1970 }
1971out:
1972 if (new_affiliation_111) {
1973 pci_free_consistent(instance->pdev,
1974 sizeof(struct MR_LD_VF_AFFILIATION_111),
1975 new_affiliation_111,
1976 new_affiliation_111_h);
1977 }
90dc9d98 1978
4026e9aa 1979 megasas_return_cmd(instance, cmd);
4cbfea88
AR		 1980
1981 return retval;
1982}
1983
1984static int megasas_get_ld_vf_affiliation_12(struct megasas_instance *instance,
1985 int initial)
1986{
1987 struct megasas_cmd *cmd;
1988 struct megasas_dcmd_frame *dcmd;
1989 struct MR_LD_VF_AFFILIATION *new_affiliation = NULL;
1990 struct MR_LD_VF_MAP *newmap = NULL, *savedmap = NULL;
1991 dma_addr_t new_affiliation_h;
1992 int i, j, retval = 0, found = 0, doscan = 0;
1993 u8 thisVf;
1994
1995 cmd = megasas_get_cmd(instance);
1996
1997 if (!cmd) {
1be18254
BH		 1998 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation12: "
1999 "Failed to get cmd for scsi%d\n",
4cbfea88
AR		 2000 instance->host->host_no);
2001 return -ENOMEM;
2002 }
2003
2004 dcmd = &cmd->frame->dcmd;
2005
2006 if (!instance->vf_affiliation) {
1be18254
BH		 2007 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2008 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2009 megasas_return_cmd(instance, cmd);
2010 return -ENOMEM;
2011 }
2012
2013 if (initial)
2014 memset(instance->vf_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2015 sizeof(struct MR_LD_VF_AFFILIATION));
2016 else {
2017 new_affiliation =
2018 pci_alloc_consistent(instance->pdev,
2019 (MAX_LOGICAL_DRIVES + 1) *
2020 sizeof(struct MR_LD_VF_AFFILIATION),
2021 &new_affiliation_h);
2022 if (!new_affiliation) {
1be18254
BH		 2023 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2024 "memory for new affiliation for scsi%d\n",
4cbfea88
AR		 2025 instance->host->host_no);
2026 megasas_return_cmd(instance, cmd);
2027 return -ENOMEM;
2028 }
2029 memset(new_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2030 sizeof(struct MR_LD_VF_AFFILIATION));
2031 }
2032
2033 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2034
2035 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2036 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
4cbfea88 2037 dcmd->sge_count = 1;
2213a467 2038 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
4cbfea88
AR		 2039 dcmd->timeout = 0;
2040 dcmd->pad_0 = 0;
2213a467
CH		 2041 dcmd->data_xfer_len = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2042 sizeof(struct MR_LD_VF_AFFILIATION));
2043 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS);
4cbfea88
AR		 2044
2045 if (initial)
2213a467
CH		 2046 dcmd->sgl.sge32[0].phys_addr =
2047 cpu_to_le32(instance->vf_affiliation_h);
4cbfea88 2048 else
2213a467
CH		 2049 dcmd->sgl.sge32[0].phys_addr =
2050 cpu_to_le32(new_affiliation_h);
4cbfea88 2051
2213a467
CH		 2052 dcmd->sgl.sge32[0].length = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2053 sizeof(struct MR_LD_VF_AFFILIATION));
4cbfea88 2054
1be18254 2055 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
4cbfea88
AR		 2056 "scsi%d\n", instance->host->host_no);
2057
2058 megasas_issue_blocked_cmd(instance, cmd, 0);
2059
2060 if (dcmd->cmd_status) {
1be18254
BH		 2061 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2062 " failed with status 0x%x for scsi%d\n",
4cbfea88
AR		 2063 dcmd->cmd_status, instance->host->host_no);
2064 retval = 1; /* Do a scan if we couldn't get affiliation */
2065 goto out;
2066 }
2067
2068 if (!initial) {
2069 if (!new_affiliation->ldCount) {
1be18254
BH		 2070 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2071 "affiliation for passive path for scsi%d\n",
4cbfea88
AR		 2072 instance->host->host_no);
2073 retval = 1;
2074 goto out;
2075 }
2076 newmap = new_affiliation->map;
2077 savedmap = instance->vf_affiliation->map;
2078 thisVf = new_affiliation->thisVf;
2079 for (i = 0 ; i < new_affiliation->ldCount; i++) {
2080 found = 0;
2081 for (j = 0; j < instance->vf_affiliation->ldCount;
2082 j++) {
2083 if (newmap->ref.targetId ==
2084 savedmap->ref.targetId) {
2085 found = 1;
2086 if (newmap->policy[thisVf] !=
2087 savedmap->policy[thisVf]) {
2088 doscan = 1;
2089 goto out;
2090 }
229fe47c 2091 }
2092 savedmap = (struct MR_LD_VF_MAP *)
2093 ((unsigned char *)savedmap +
2094 savedmap->size);
4cbfea88
AR		 2095 }
2096 if (!found && newmap->policy[thisVf] !=
2097 MR_LD_ACCESS_HIDDEN) {
2098 doscan = 1;
2099 goto out;
2100 }
2101 newmap = (struct MR_LD_VF_MAP *)
2102 ((unsigned char *)newmap + newmap->size);
2103 }
2104
2105 newmap = new_affiliation->map;
2106 savedmap = instance->vf_affiliation->map;
2107
2108 for (i = 0 ; i < instance->vf_affiliation->ldCount; i++) {
2109 found = 0;
2110 for (j = 0 ; j < new_affiliation->ldCount; j++) {
2111 if (savedmap->ref.targetId ==
2112 newmap->ref.targetId) {
2113 found = 1;
2114 if (savedmap->policy[thisVf] !=
2115 newmap->policy[thisVf]) {
2116 doscan = 1;
2117 goto out;
2118 }
2119 }
229fe47c 2120 newmap = (struct MR_LD_VF_MAP *)
2121 ((unsigned char *)newmap +
2122 newmap->size);
2123 }
4cbfea88
AR		 2124 if (!found && savedmap->policy[thisVf] !=
2125 MR_LD_ACCESS_HIDDEN) {
2126 doscan = 1;
2127 goto out;
2128 }
2129 savedmap = (struct MR_LD_VF_MAP *)
2130 ((unsigned char *)savedmap +
2131 savedmap->size);
229fe47c 2132 }
2133 }
2134out:
4cbfea88 2135 if (doscan) {
1be18254
BH		 2136 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2137 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2138 memcpy(instance->vf_affiliation, new_affiliation,
2139 new_affiliation->size);
2140 retval = 1;
229fe47c 2141 }
4cbfea88
AR		 2142
2143 if (new_affiliation)
2144 pci_free_consistent(instance->pdev,
2145 (MAX_LOGICAL_DRIVES + 1) *
2146 sizeof(struct MR_LD_VF_AFFILIATION),
2147 new_affiliation, new_affiliation_h);
4026e9aa 2148 megasas_return_cmd(instance, cmd);
229fe47c 2149
2150 return retval;
2151}
2152
4cbfea88
AR		 2153/* This function will get the current SR-IOV LD/VF affiliation */
2154static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
2155 int initial)
2156{
2157 int retval;
2158
2159 if (instance->PlasmaFW111)
2160 retval = megasas_get_ld_vf_affiliation_111(instance, initial);
2161 else
2162 retval = megasas_get_ld_vf_affiliation_12(instance, initial);
2163 return retval;
2164}
2165
229fe47c 2166/* This function will tell FW to start the SR-IOV heartbeat */
2167int megasas_sriov_start_heartbeat(struct megasas_instance *instance,
2168 int initial)
2169{
2170 struct megasas_cmd *cmd;
2171 struct megasas_dcmd_frame *dcmd;
2172 int retval = 0;
2173
2174 cmd = megasas_get_cmd(instance);
2175
2176 if (!cmd) {
1be18254
BH		 2177 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_sriov_start_heartbeat: "
2178 "Failed to get cmd for scsi%d\n",
229fe47c 2179 instance->host->host_no);
2180 return -ENOMEM;
2181 }
2182
2183 dcmd = &cmd->frame->dcmd;
2184
2185 if (initial) {
2186 instance->hb_host_mem =
7c845eb5
JP		 2187 pci_zalloc_consistent(instance->pdev,
2188 sizeof(struct MR_CTRL_HB_HOST_MEM),
2189 &instance->hb_host_mem_h);
229fe47c 2190 if (!instance->hb_host_mem) {
1be18254
BH		 2191 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate"
2192 " memory for heartbeat host memory for scsi%d\n",
2193 instance->host->host_no);
229fe47c 2194 retval = -ENOMEM;
2195 goto out;
2196 }
229fe47c 2197 }
2198
2199 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2200
2213a467 2201 dcmd->mbox.s[0] = cpu_to_le16(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2202 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2203 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2204 dcmd->sge_count = 1;
2213a467 2205 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c 2206 dcmd->timeout = 0;
2207 dcmd->pad_0 = 0;
2213a467
CH		 2208 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
2209 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC);
2210 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->hb_host_mem_h);
2211 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2212
1be18254 2213 dev_warn(&instance->pdev->dev, "SR-IOV: Starting heartbeat for scsi%d\n",
229fe47c 2214 instance->host->host_no);
2215
4026e9aa
SS		 2216 if (instance->ctrl_context && !instance->mask_interrupts)
2217 retval = megasas_issue_blocked_cmd(instance, cmd,
2218 MEGASAS_ROUTINE_WAIT_TIME_VF);
2219 else
2220 retval = megasas_issue_polled(instance, cmd);
229fe47c 2221
4026e9aa 2222 if (retval) {
2be2a988
SS		 2223 dev_warn(&instance->pdev->dev, "SR-IOV: MR_DCMD_CTRL_SHARED_HOST"
2224 "_MEM_ALLOC DCMD %s for scsi%d\n",
2225 (dcmd->cmd_status == MFI_STAT_INVALID_STATUS) ?
2226 "timed out" : "failed", instance->host->host_no);
229fe47c 2227 retval = 1;
229fe47c 2228 }
2229
2230out:
2231 megasas_return_cmd(instance, cmd);
2232
2233 return retval;
2234}
2235
2236/* Handler for SR-IOV heartbeat */
2237void megasas_sriov_heartbeat_handler(unsigned long instance_addr)
2238{
2239 struct megasas_instance *instance =
2240 (struct megasas_instance *)instance_addr;
2241
2242 if (instance->hb_host_mem->HB.fwCounter !=
2243 instance->hb_host_mem->HB.driverCounter) {
2244 instance->hb_host_mem->HB.driverCounter =
2245 instance->hb_host_mem->HB.fwCounter;
2246 mod_timer(&instance->sriov_heartbeat_timer,
2247 jiffies + MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
2248 } else {
1be18254 2249 dev_warn(&instance->pdev->dev, "SR-IOV: Heartbeat never "
229fe47c 2250 "completed for scsi%d\n", instance->host->host_no);
2251 schedule_work(&instance->work_init);
2252 }
2253}
2254
c4a3e0a5
BS		 2255/**
2256 * megasas_wait_for_outstanding - Wait for all outstanding cmds
2257 * @instance: Adapter soft state
2258 *
25985edc 2259 * This function waits for up to MEGASAS_RESET_WAIT_TIME seconds for FW to
c4a3e0a5
BS		 2260 * complete all its outstanding commands. Returns error if one or more IOs
2261 * are pending after this time period. It also marks the controller dead.
2262 */
2263static int megasas_wait_for_outstanding(struct megasas_instance *instance)
2264{
2265 int i;
39a98554 2266 u32 reset_index;
c4a3e0a5 2267 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
39a98554 2268 u8 adprecovery;
2269 unsigned long flags;
2270 struct list_head clist_local;
2271 struct megasas_cmd *reset_cmd;
707e09bd
YB		 2272 u32 fw_state;
2273 u8 kill_adapter_flag;
39a98554 2274
2275 spin_lock_irqsave(&instance->hba_lock, flags);
2276 adprecovery = instance->adprecovery;
2277 spin_unlock_irqrestore(&instance->hba_lock, flags);
2278
2279 if (adprecovery != MEGASAS_HBA_OPERATIONAL) {
2280
2281 INIT_LIST_HEAD(&clist_local);
2282 spin_lock_irqsave(&instance->hba_lock, flags);
2283 list_splice_init(&instance->internal_reset_pending_q,
2284 &clist_local);
2285 spin_unlock_irqrestore(&instance->hba_lock, flags);
2286
1be18254 2287 dev_notice(&instance->pdev->dev, "HBA reset wait ...\n");
39a98554 2288 for (i = 0; i < wait_time; i++) {
2289 msleep(1000);
2290 spin_lock_irqsave(&instance->hba_lock, flags);
2291 adprecovery = instance->adprecovery;
2292 spin_unlock_irqrestore(&instance->hba_lock, flags);
2293 if (adprecovery == MEGASAS_HBA_OPERATIONAL)
2294 break;
2295 }
2296
2297 if (adprecovery != MEGASAS_HBA_OPERATIONAL) {
1be18254 2298 dev_notice(&instance->pdev->dev, "reset: Stopping HBA.\n");
39a98554 2299 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 2300 instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR;
39a98554 2301 spin_unlock_irqrestore(&instance->hba_lock, flags);
2302 return FAILED;
2303 }
2304
da0dc9fb 2305 reset_index = 0;
39a98554 2306 while (!list_empty(&clist_local)) {
da0dc9fb 2307 reset_cmd = list_entry((&clist_local)->next,
39a98554 2308 struct megasas_cmd, list);
2309 list_del_init(&reset_cmd->list);
2310 if (reset_cmd->scmd) {
2311 reset_cmd->scmd->result = DID_RESET << 16;
1be18254 2312 dev_notice(&instance->pdev->dev, "%d:%p reset [%02x]\n",
39a98554 2313 reset_index, reset_cmd,
5cd049a5 2314 reset_cmd->scmd->cmnd[0]);
39a98554 2315
2316 reset_cmd->scmd->scsi_done(reset_cmd->scmd);
2317 megasas_return_cmd(instance, reset_cmd);
2318 } else if (reset_cmd->sync_cmd) {
1be18254 2319 dev_notice(&instance->pdev->dev, "%p synch cmds"
39a98554 2320 "reset queue\n",
2321 reset_cmd);
2322
2be2a988 2323 reset_cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 2324 instance->instancet->fire_cmd(instance,
2325 reset_cmd->frame_phys_addr,
2326 0, instance->reg_set);
2327 } else {
1be18254 2328 dev_notice(&instance->pdev->dev, "%p unexpected"
39a98554 2329 "cmds lst\n",
2330 reset_cmd);
2331 }
2332 reset_index++;
2333 }
2334
2335 return SUCCESS;
2336 }
c4a3e0a5 2337
c007b8b2 2338 for (i = 0; i < resetwaittime; i++) {
e4a082c7
SP		 2339 int outstanding = atomic_read(&instance->fw_outstanding);
2340
2341 if (!outstanding)
c4a3e0a5
BS		 2342 break;
2343
2344 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 2345 dev_notice(&instance->pdev->dev, "[%2d]waiting for %d "
e4a082c7 2346 "commands to complete\n",i,outstanding);
7343eb65 2347 /*
2348 * Call cmd completion routine. Cmd to be
2349 * be completed directly without depending on isr.
2350 */
2351 megasas_complete_cmd_dpc((unsigned long)instance);
c4a3e0a5
BS		 2352 }
2353
2354 msleep(1000);
2355 }
2356
707e09bd
YB		 2357 i = 0;
2358 kill_adapter_flag = 0;
2359 do {
2360 fw_state = instance->instancet->read_fw_status_reg(
2361 instance->reg_set) & MFI_STATE_MASK;
2362 if ((fw_state == MFI_STATE_FAULT) &&
2363 (instance->disableOnlineCtrlReset == 0)) {
2364 if (i == 3) {
2365 kill_adapter_flag = 2;
2366 break;
2367 }
2368 megasas_do_ocr(instance);
2369 kill_adapter_flag = 1;
2370
2371 /* wait for 1 secs to let FW finish the pending cmds */
2372 msleep(1000);
2373 }
2374 i++;
2375 } while (i <= 3);
2376
da0dc9fb 2377 if (atomic_read(&instance->fw_outstanding) && !kill_adapter_flag) {
707e09bd 2378 if (instance->disableOnlineCtrlReset == 0) {
707e09bd
YB		 2379 megasas_do_ocr(instance);
2380
2381 /* wait for 5 secs to let FW finish the pending cmds */
2382 for (i = 0; i < wait_time; i++) {
2383 int outstanding =
2384 atomic_read(&instance->fw_outstanding);
2385 if (!outstanding)
2386 return SUCCESS;
2387 msleep(1000);
2388 }
2389 }
2390 }
2391
2392 if (atomic_read(&instance->fw_outstanding) ||
2393 (kill_adapter_flag == 2)) {
1be18254 2394 dev_notice(&instance->pdev->dev, "pending cmds after reset\n");
e3bbff9f 2395 /*
da0dc9fb
BH		 2396 * Send signal to FW to stop processing any pending cmds.
2397 * The controller will be taken offline by the OS now.
2398 */
0c79e681
YB		 2399 if ((instance->pdev->device ==
2400 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
2401 (instance->pdev->device ==
2402 PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
2403 writel(MFI_STOP_ADP,
9c915a8c 2404 &instance->reg_set->doorbell);
0c79e681
YB		 2405 } else {
2406 writel(MFI_STOP_ADP,
e3bbff9f 2407 &instance->reg_set->inbound_doorbell);
0c79e681 2408 }
658dcedb 2409 megasas_dump_pending_frames(instance);
39a98554 2410 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 2411 instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR;
39a98554 2412 spin_unlock_irqrestore(&instance->hba_lock, flags);
c4a3e0a5
BS		 2413 return FAILED;
2414 }
2415
1be18254 2416 dev_notice(&instance->pdev->dev, "no pending cmds after reset\n");
39a98554 2417
c4a3e0a5
BS		 2418 return SUCCESS;
2419}
2420
2421/**
2422 * megasas_generic_reset - Generic reset routine
2423 * @scmd: Mid-layer SCSI command
2424 *
2425 * This routine implements a generic reset handler for device, bus and host
2426 * reset requests. Device, bus and host specific reset handlers can use this
2427 * function after they do their specific tasks.
2428 */
2429static int megasas_generic_reset(struct scsi_cmnd *scmd)
2430{
2431 int ret_val;
2432 struct megasas_instance *instance;
2433
2434 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2435
5cd049a5
CH		 2436 scmd_printk(KERN_NOTICE, scmd, "megasas: RESET cmd=%x retries=%x\n",
2437 scmd->cmnd[0], scmd->retries);
c4a3e0a5 2438
39a98554 2439 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 2440 dev_err(&instance->pdev->dev, "cannot recover from previous reset failures\n");
c4a3e0a5
BS		 2441 return FAILED;
2442 }
2443
c4a3e0a5 2444 ret_val = megasas_wait_for_outstanding(instance);
c4a3e0a5 2445 if (ret_val == SUCCESS)
1be18254 2446 dev_notice(&instance->pdev->dev, "reset successful\n");
c4a3e0a5 2447 else
1be18254 2448 dev_err(&instance->pdev->dev, "failed to do reset\n");
c4a3e0a5 2449
c4a3e0a5
BS		 2450 return ret_val;
2451}
2452
05e9ebbe
SP		 2453/**
2454 * megasas_reset_timer - quiesce the adapter if required
2455 * @scmd: scsi cmnd
2456 *
2457 * Sets the FW busy flag and reduces the host->can_queue if the
2458 * cmd has not been completed within the timeout period.
2459 */
2460static enum
242f9dcb 2461blk_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd)
05e9ebbe 2462{
05e9ebbe
SP		 2463 struct megasas_instance *instance;
2464 unsigned long flags;
2465
2466 if (time_after(jiffies, scmd->jiffies_at_alloc +
2467 (MEGASAS_DEFAULT_CMD_TIMEOUT * 2) * HZ)) {
242f9dcb 2468 return BLK_EH_NOT_HANDLED;
05e9ebbe
SP		 2469 }
2470
f575c5d3 2471 instance = (struct megasas_instance *)scmd->device->host->hostdata;
05e9ebbe
SP		 2472 if (!(instance->flag & MEGASAS_FW_BUSY)) {
2473 /* FW is busy, throttle IO */
2474 spin_lock_irqsave(instance->host->host_lock, flags);
2475
c5daa6a9 2476 instance->host->can_queue = instance->throttlequeuedepth;
05e9ebbe
SP		 2477 instance->last_time = jiffies;
2478 instance->flag |= MEGASAS_FW_BUSY;
2479
2480 spin_unlock_irqrestore(instance->host->host_lock, flags);
2481 }
242f9dcb 2482 return BLK_EH_RESET_TIMER;
05e9ebbe
SP		 2483}
2484
c4a3e0a5
BS		 2485/**
2486 * megasas_reset_device - Device reset handler entry point
2487 */
2488static int megasas_reset_device(struct scsi_cmnd *scmd)
2489{
c4a3e0a5
BS		 2490 /*
2491 * First wait for all commands to complete
2492 */
da0dc9fb 2493 return megasas_generic_reset(scmd);
c4a3e0a5
BS		 2494}
2495
2496/**
2497 * megasas_reset_bus_host - Bus & host reset handler entry point
2498 */
2499static int megasas_reset_bus_host(struct scsi_cmnd *scmd)
2500{
2501 int ret;
9c915a8c 2502 struct megasas_instance *instance;
da0dc9fb 2503
9c915a8c 2504 instance = (struct megasas_instance *)scmd->device->host->hostdata;
c4a3e0a5
BS		 2505
2506 /*
80682fa9 2507 * First wait for all commands to complete
c4a3e0a5 2508 */
36807e67 2509 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 2510 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
21d3c710
SS		 2511 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
2512 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
229fe47c 2513 ret = megasas_reset_fusion(scmd->device->host, 1);
9c915a8c 2514 else
2515 ret = megasas_generic_reset(scmd);
c4a3e0a5
BS		 2516
2517 return ret;
2518}
2519
cf62a0a5
SP		 2520/**
2521 * megasas_bios_param - Returns disk geometry for a disk
da0dc9fb 2522 * @sdev: device handle
cf62a0a5
SP		 2523 * @bdev: block device
2524 * @capacity: drive capacity
2525 * @geom: geometry parameters
2526 */
2527static int
2528megasas_bios_param(struct scsi_device *sdev, struct block_device *bdev,
2529 sector_t capacity, int geom[])
2530{
2531 int heads;
2532 int sectors;
2533 sector_t cylinders;
2534 unsigned long tmp;
da0dc9fb 2535
cf62a0a5
SP		 2536 /* Default heads (64) & sectors (32) */
2537 heads = 64;
2538 sectors = 32;
2539
2540 tmp = heads * sectors;
2541 cylinders = capacity;
2542
2543 sector_div(cylinders, tmp);
2544
2545 /*
2546 * Handle extended translation size for logical drives > 1Gb
2547 */
2548
2549 if (capacity >= 0x200000) {
2550 heads = 255;
2551 sectors = 63;
2552 tmp = heads*sectors;
2553 cylinders = capacity;
2554 sector_div(cylinders, tmp);
2555 }
2556
2557 geom[0] = heads;
2558 geom[1] = sectors;
2559 geom[2] = cylinders;
2560
2561 return 0;
2562}
2563
7e8a75f4
YB		 2564static void megasas_aen_polling(struct work_struct *work);
2565
c4a3e0a5
BS		 2566/**
2567 * megasas_service_aen - Processes an event notification
2568 * @instance: Adapter soft state
2569 * @cmd: AEN command completed by the ISR
2570 *
2571 * For AEN, driver sends a command down to FW that is held by the FW till an
2572 * event occurs. When an event of interest occurs, FW completes the command
2573 * that it was previously holding.
2574 *
2575 * This routines sends SIGIO signal to processes that have registered with the
2576 * driver for AEN.
2577 */
2578static void
2579megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd)
2580{
c3518837 2581 unsigned long flags;
da0dc9fb 2582
c4a3e0a5
BS		 2583 /*
2584 * Don't signal app if it is just an aborted previously registered aen
2585 */
c3518837
YB		 2586 if ((!cmd->abort_aen) && (instance->unload == 0)) {
2587 spin_lock_irqsave(&poll_aen_lock, flags);
2588 megasas_poll_wait_aen = 1;
2589 spin_unlock_irqrestore(&poll_aen_lock, flags);
2590 wake_up(&megasas_poll_wait);
c4a3e0a5 2591 kill_fasync(&megasas_async_queue, SIGIO, POLL_IN);
c3518837 2592 }
c4a3e0a5
BS		 2593 else
2594 cmd->abort_aen = 0;
2595
2596 instance->aen_cmd = NULL;
90dc9d98 2597
4026e9aa 2598 megasas_return_cmd(instance, cmd);
7e8a75f4 2599
39a98554 2600 if ((instance->unload == 0) &&
2601 ((instance->issuepend_done == 1))) {
7e8a75f4 2602 struct megasas_aen_event *ev;
da0dc9fb 2603
7e8a75f4
YB		 2604 ev = kzalloc(sizeof(*ev), GFP_ATOMIC);
2605 if (!ev) {
1be18254 2606 dev_err(&instance->pdev->dev, "megasas_service_aen: out of memory\n");
7e8a75f4
YB		 2607 } else {
2608 ev->instance = instance;
2609 instance->ev = ev;
c1d390d8
XF		 2610 INIT_DELAYED_WORK(&ev->hotplug_work,
2611 megasas_aen_polling);
2612 schedule_delayed_work(&ev->hotplug_work, 0);
7e8a75f4
YB		 2613 }
2614 }
c4a3e0a5
BS		 2615}
2616
fc62b3fc
SS		 2617static ssize_t
2618megasas_fw_crash_buffer_store(struct device *cdev,
2619 struct device_attribute *attr, const char *buf, size_t count)
2620{
2621 struct Scsi_Host *shost = class_to_shost(cdev);
2622 struct megasas_instance *instance =
2623 (struct megasas_instance *) shost->hostdata;
2624 int val = 0;
2625 unsigned long flags;
2626
2627 if (kstrtoint(buf, 0, &val) != 0)
2628 return -EINVAL;
2629
2630 spin_lock_irqsave(&instance->crashdump_lock, flags);
2631 instance->fw_crash_buffer_offset = val;
2632 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2633 return strlen(buf);
2634}
2635
2636static ssize_t
2637megasas_fw_crash_buffer_show(struct device *cdev,
2638 struct device_attribute *attr, char *buf)
2639{
2640 struct Scsi_Host *shost = class_to_shost(cdev);
2641 struct megasas_instance *instance =
2642 (struct megasas_instance *) shost->hostdata;
2643 u32 size;
2644 unsigned long buff_addr;
2645 unsigned long dmachunk = CRASH_DMA_BUF_SIZE;
2646 unsigned long src_addr;
2647 unsigned long flags;
2648 u32 buff_offset;
2649
2650 spin_lock_irqsave(&instance->crashdump_lock, flags);
2651 buff_offset = instance->fw_crash_buffer_offset;
2652 if (!instance->crash_dump_buf &&
2653 !((instance->fw_crash_state == AVAILABLE) ||
2654 (instance->fw_crash_state == COPYING))) {
2655 dev_err(&instance->pdev->dev,
2656 "Firmware crash dump is not available\n");
2657 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2658 return -EINVAL;
2659 }
2660
2661 buff_addr = (unsigned long) buf;
2662
da0dc9fb 2663 if (buff_offset > (instance->fw_crash_buffer_size * dmachunk)) {
fc62b3fc
SS		 2664 dev_err(&instance->pdev->dev,
2665 "Firmware crash dump offset is out of range\n");
2666 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2667 return 0;
2668 }
2669
2670 size = (instance->fw_crash_buffer_size * dmachunk) - buff_offset;
2671 size = (size >= PAGE_SIZE) ? (PAGE_SIZE - 1) : size;
2672
2673 src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] +
2674 (buff_offset % dmachunk);
da0dc9fb 2675 memcpy(buf, (void *)src_addr, size);
fc62b3fc
SS		 2676 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2677
2678 return size;
2679}
2680
2681static ssize_t
2682megasas_fw_crash_buffer_size_show(struct device *cdev,
2683 struct device_attribute *attr, char *buf)
2684{
2685 struct Scsi_Host *shost = class_to_shost(cdev);
2686 struct megasas_instance *instance =
2687 (struct megasas_instance *) shost->hostdata;
2688
2689 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)
2690 ((instance->fw_crash_buffer_size) * 1024 * 1024)/PAGE_SIZE);
2691}
2692
2693static ssize_t
2694megasas_fw_crash_state_store(struct device *cdev,
2695 struct device_attribute *attr, const char *buf, size_t count)
2696{
2697 struct Scsi_Host *shost = class_to_shost(cdev);
2698 struct megasas_instance *instance =
2699 (struct megasas_instance *) shost->hostdata;
2700 int val = 0;
2701 unsigned long flags;
2702
2703 if (kstrtoint(buf, 0, &val) != 0)
2704 return -EINVAL;
2705
2706 if ((val <= AVAILABLE || val > COPY_ERROR)) {
2707 dev_err(&instance->pdev->dev, "application updates invalid "
2708 "firmware crash state\n");
2709 return -EINVAL;
2710 }
2711
2712 instance->fw_crash_state = val;
2713
2714 if ((val == COPIED) || (val == COPY_ERROR)) {
2715 spin_lock_irqsave(&instance->crashdump_lock, flags);
2716 megasas_free_host_crash_buffer(instance);
2717 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2718 if (val == COPY_ERROR)
2719 dev_info(&instance->pdev->dev, "application failed to "
2720 "copy Firmware crash dump\n");
2721 else
2722 dev_info(&instance->pdev->dev, "Firmware crash dump "
2723 "copied successfully\n");
2724 }
2725 return strlen(buf);
2726}
2727
2728static ssize_t
2729megasas_fw_crash_state_show(struct device *cdev,
2730 struct device_attribute *attr, char *buf)
2731{
2732 struct Scsi_Host *shost = class_to_shost(cdev);
2733 struct megasas_instance *instance =
2734 (struct megasas_instance *) shost->hostdata;
da0dc9fb 2735
fc62b3fc
SS		 2736 return snprintf(buf, PAGE_SIZE, "%d\n", instance->fw_crash_state);
2737}
2738
2739static ssize_t
2740megasas_page_size_show(struct device *cdev,
2741 struct device_attribute *attr, char *buf)
2742{
2743 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)PAGE_SIZE - 1);
2744}
2745
2746static DEVICE_ATTR(fw_crash_buffer, S_IRUGO | S_IWUSR,
2747 megasas_fw_crash_buffer_show, megasas_fw_crash_buffer_store);
2748static DEVICE_ATTR(fw_crash_buffer_size, S_IRUGO,
2749 megasas_fw_crash_buffer_size_show, NULL);
2750static DEVICE_ATTR(fw_crash_state, S_IRUGO | S_IWUSR,
2751 megasas_fw_crash_state_show, megasas_fw_crash_state_store);
2752static DEVICE_ATTR(page_size, S_IRUGO,
2753 megasas_page_size_show, NULL);
2754
2755struct device_attribute *megaraid_host_attrs[] = {
2756 &dev_attr_fw_crash_buffer_size,
2757 &dev_attr_fw_crash_buffer,
2758 &dev_attr_fw_crash_state,
2759 &dev_attr_page_size,
2760 NULL,
2761};
2762
c4a3e0a5
BS		 2763/*
2764 * Scsi host template for megaraid_sas driver
2765 */
2766static struct scsi_host_template megasas_template = {
2767
2768 .module = THIS_MODULE,
43cd7fe4 2769 .name = "Avago SAS based MegaRAID driver",
c4a3e0a5 2770 .proc_name = "megaraid_sas",
147aab6a 2771 .slave_configure = megasas_slave_configure,
044833b5 2772 .slave_alloc = megasas_slave_alloc,
c4a3e0a5
BS		 2773 .queuecommand = megasas_queue_command,
2774 .eh_device_reset_handler = megasas_reset_device,
2775 .eh_bus_reset_handler = megasas_reset_bus_host,
2776 .eh_host_reset_handler = megasas_reset_bus_host,
05e9ebbe 2777 .eh_timed_out = megasas_reset_timer,
fc62b3fc 2778 .shost_attrs = megaraid_host_attrs,
cf62a0a5 2779 .bios_param = megasas_bios_param,
c4a3e0a5 2780 .use_clustering = ENABLE_CLUSTERING,
db5ed4df 2781 .change_queue_depth = scsi_change_queue_depth,
54b2b50c 2782 .no_write_same = 1,
c4a3e0a5
BS		 2783};
2784
2785/**
2786 * megasas_complete_int_cmd - Completes an internal command
2787 * @instance: Adapter soft state
2788 * @cmd: Command to be completed
2789 *
2790 * The megasas_issue_blocked_cmd() function waits for a command to complete
2791 * after it issues a command. This function wakes up that waiting routine by
2792 * calling wake_up() on the wait queue.
2793 */
2794static void
2795megasas_complete_int_cmd(struct megasas_instance *instance,
2796 struct megasas_cmd *cmd)
2797{
2be2a988 2798 cmd->cmd_status_drv = cmd->frame->io.cmd_status;
c4a3e0a5
BS		 2799 wake_up(&instance->int_cmd_wait_q);
2800}
2801
2802/**
2803 * megasas_complete_abort - Completes aborting a command
2804 * @instance: Adapter soft state
2805 * @cmd: Cmd that was issued to abort another cmd
2806 *
0d49016b 2807 * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q
2808 * after it issues an abort on a previously issued command. This function
c4a3e0a5
BS		 2809 * wakes up all functions waiting on the same wait queue.
2810 */
2811static void
2812megasas_complete_abort(struct megasas_instance *instance,
2813 struct megasas_cmd *cmd)
2814{
2815 if (cmd->sync_cmd) {
2816 cmd->sync_cmd = 0;
2be2a988 2817 cmd->cmd_status_drv = 0;
c4a3e0a5
BS		 2818 wake_up(&instance->abort_cmd_wait_q);
2819 }
c4a3e0a5
BS		 2820}
2821
c4a3e0a5
BS		 2822/**
2823 * megasas_complete_cmd - Completes a command
2824 * @instance: Adapter soft state
2825 * @cmd: Command to be completed
0d49016b 2826 * @alt_status: If non-zero, use this value as status to
da0dc9fb
BH		 2827 * SCSI mid-layer instead of the value returned
2828 * by the FW. This should be used if caller wants
2829 * an alternate status (as in the case of aborted
2830 * commands)
c4a3e0a5 2831 */
9c915a8c 2832void
c4a3e0a5
BS		 2833megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
2834 u8 alt_status)
2835{
2836 int exception = 0;
2837 struct megasas_header *hdr = &cmd->frame->hdr;
c3518837 2838 unsigned long flags;
9c915a8c 2839 struct fusion_context *fusion = instance->ctrl_context;
3761cb4c 2840 u32 opcode, status;
c4a3e0a5 2841
39a98554 2842 /* flag for the retry reset */
2843 cmd->retry_for_fw_reset = 0;
2844
05e9ebbe
SP		 2845 if (cmd->scmd)
2846 cmd->scmd->SCp.ptr = NULL;
c4a3e0a5
BS		 2847
2848 switch (hdr->cmd) {
e5f93a36 2849 case MFI_CMD_INVALID:
2850 /* Some older 1068 controller FW may keep a pended
2851 MR_DCMD_CTRL_EVENT_GET_INFO left over from the main kernel
2852 when booting the kdump kernel. Ignore this command to
2853 prevent a kernel panic on shutdown of the kdump kernel. */
1be18254
BH		 2854 dev_warn(&instance->pdev->dev, "MFI_CMD_INVALID command "
2855 "completed\n");
2856 dev_warn(&instance->pdev->dev, "If you have a controller "
2857 "other than PERC5, please upgrade your firmware\n");
e5f93a36 2858 break;
c4a3e0a5
BS		 2859 case MFI_CMD_PD_SCSI_IO:
2860 case MFI_CMD_LD_SCSI_IO:
2861
2862 /*
2863 * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been
2864 * issued either through an IO path or an IOCTL path. If it
2865 * was via IOCTL, we will send it to internal completion.
2866 */
2867 if (cmd->sync_cmd) {
2868 cmd->sync_cmd = 0;
2869 megasas_complete_int_cmd(instance, cmd);
2870 break;
2871 }
2872
c4a3e0a5
BS		 2873 case MFI_CMD_LD_READ:
2874 case MFI_CMD_LD_WRITE:
2875
2876 if (alt_status) {
2877 cmd->scmd->result = alt_status << 16;
2878 exception = 1;
2879 }
2880
2881 if (exception) {
2882
e4a082c7 2883 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 2884
155d98f0 2885 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 2886 cmd->scmd->scsi_done(cmd->scmd);
2887 megasas_return_cmd(instance, cmd);
2888
2889 break;
2890 }
2891
2892 switch (hdr->cmd_status) {
2893
2894 case MFI_STAT_OK:
2895 cmd->scmd->result = DID_OK << 16;
2896 break;
2897
2898 case MFI_STAT_SCSI_IO_FAILED:
2899 case MFI_STAT_LD_INIT_IN_PROGRESS:
2900 cmd->scmd->result =
2901 (DID_ERROR << 16) | hdr->scsi_status;
2902 break;
2903
2904 case MFI_STAT_SCSI_DONE_WITH_ERROR:
2905
2906 cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status;
2907
2908 if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) {
2909 memset(cmd->scmd->sense_buffer, 0,
2910 SCSI_SENSE_BUFFERSIZE);
2911 memcpy(cmd->scmd->sense_buffer, cmd->sense,
2912 hdr->sense_len);
2913
2914 cmd->scmd->result |= DRIVER_SENSE << 24;
2915 }
2916
2917 break;
2918
2919 case MFI_STAT_LD_OFFLINE:
2920 case MFI_STAT_DEVICE_NOT_FOUND:
2921 cmd->scmd->result = DID_BAD_TARGET << 16;
2922 break;
2923
2924 default:
1be18254 2925 dev_printk(KERN_DEBUG, &instance->pdev->dev, "MFI FW status %#x\n",
c4a3e0a5
BS		 2926 hdr->cmd_status);
2927 cmd->scmd->result = DID_ERROR << 16;
2928 break;
2929 }
2930
e4a082c7 2931 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 2932
155d98f0 2933 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 2934 cmd->scmd->scsi_done(cmd->scmd);
2935 megasas_return_cmd(instance, cmd);
2936
2937 break;
2938
2939 case MFI_CMD_SMP:
2940 case MFI_CMD_STP:
2941 case MFI_CMD_DCMD:
94cd65dd 2942 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
9c915a8c 2943 /* Check for LD map update */
94cd65dd
SS		 2944 if ((opcode == MR_DCMD_LD_MAP_GET_INFO)
2945 && (cmd->frame->dcmd.mbox.b[1] == 1)) {
bc93d425 2946 fusion->fast_path_io = 0;
9c915a8c 2947 spin_lock_irqsave(instance->host->host_lock, flags);
3761cb4c 2948 instance->map_update_cmd = NULL;
9c915a8c 2949 if (cmd->frame->hdr.cmd_status != 0) {
2950 if (cmd->frame->hdr.cmd_status !=
2951 MFI_STAT_NOT_FOUND)
1be18254 2952 dev_warn(&instance->pdev->dev, "map syncfailed, status = 0x%x\n",
9c915a8c 2953 cmd->frame->hdr.cmd_status);
2954 else {
4026e9aa 2955 megasas_return_cmd(instance, cmd);
9c915a8c 2956 spin_unlock_irqrestore(
2957 instance->host->host_lock,
2958 flags);
2959 break;
2960 }
2961 } else
2962 instance->map_id++;
4026e9aa 2963 megasas_return_cmd(instance, cmd);
bc93d425
SS		 2964
2965 /*
2966 * Set fast path IO to ZERO.
2967 * Validate Map will set proper value.
2968 * Meanwhile all IOs will go as LD IO.
2969 */
2970 if (MR_ValidateMapInfo(instance))
9c915a8c 2971 fusion->fast_path_io = 1;
2972 else
2973 fusion->fast_path_io = 0;
2974 megasas_sync_map_info(instance);
2975 spin_unlock_irqrestore(instance->host->host_lock,
2976 flags);
2977 break;
2978 }
94cd65dd
SS		 2979 if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO ||
2980 opcode == MR_DCMD_CTRL_EVENT_GET) {
c3518837
YB		 2981 spin_lock_irqsave(&poll_aen_lock, flags);
2982 megasas_poll_wait_aen = 0;
2983 spin_unlock_irqrestore(&poll_aen_lock, flags);
2984 }
c4a3e0a5 2985
3761cb4c 2986 /* FW has an updated PD sequence */
2987 if ((opcode == MR_DCMD_SYSTEM_PD_MAP_GET_INFO) &&
2988 (cmd->frame->dcmd.mbox.b[0] == 1)) {
2989
2990 spin_lock_irqsave(instance->host->host_lock, flags);
2991 status = cmd->frame->hdr.cmd_status;
2992 instance->jbod_seq_cmd = NULL;
2993 megasas_return_cmd(instance, cmd);
2994
2995 if (status == MFI_STAT_OK) {
2996 instance->pd_seq_map_id++;
2997 /* Re-register a pd sync seq num cmd */
2998 if (megasas_sync_pd_seq_num(instance, true))
2999 instance->use_seqnum_jbod_fp = false;
3000 } else
3001 instance->use_seqnum_jbod_fp = false;
3002
3003 spin_unlock_irqrestore(instance->host->host_lock, flags);
3004 break;
3005 }
3006
c4a3e0a5
BS		 3007 /*
3008 * See if got an event notification
3009 */
94cd65dd 3010 if (opcode == MR_DCMD_CTRL_EVENT_WAIT)
c4a3e0a5
BS		 3011 megasas_service_aen(instance, cmd);
3012 else
3013 megasas_complete_int_cmd(instance, cmd);
3014
3015 break;
3016
3017 case MFI_CMD_ABORT:
3018 /*
3019 * Cmd issued to abort another cmd returned
3020 */
3021 megasas_complete_abort(instance, cmd);
3022 break;
3023
3024 default:
1be18254 3025 dev_info(&instance->pdev->dev, "Unknown command completed! [0x%X]\n",
c4a3e0a5
BS		 3026 hdr->cmd);
3027 break;
3028 }
3029}
3030
39a98554 3031/**
3032 * megasas_issue_pending_cmds_again - issue all pending cmds
da0dc9fb 3033 * in FW again because of the fw reset
39a98554 3034 * @instance: Adapter soft state
3035 */
3036static inline void
3037megasas_issue_pending_cmds_again(struct megasas_instance *instance)
3038{
3039 struct megasas_cmd *cmd;
3040 struct list_head clist_local;
3041 union megasas_evt_class_locale class_locale;
3042 unsigned long flags;
3043 u32 seq_num;
3044
3045 INIT_LIST_HEAD(&clist_local);
3046 spin_lock_irqsave(&instance->hba_lock, flags);
3047 list_splice_init(&instance->internal_reset_pending_q, &clist_local);
3048 spin_unlock_irqrestore(&instance->hba_lock, flags);
3049
3050 while (!list_empty(&clist_local)) {
da0dc9fb 3051 cmd = list_entry((&clist_local)->next,
39a98554 3052 struct megasas_cmd, list);
3053 list_del_init(&cmd->list);
3054
3055 if (cmd->sync_cmd || cmd->scmd) {
1be18254
BH		 3056 dev_notice(&instance->pdev->dev, "command %p, %p:%d"
3057 "detected to be pending while HBA reset\n",
39a98554 3058 cmd, cmd->scmd, cmd->sync_cmd);
3059
3060 cmd->retry_for_fw_reset++;
3061
3062 if (cmd->retry_for_fw_reset == 3) {
1be18254 3063 dev_notice(&instance->pdev->dev, "cmd %p, %p:%d"
39a98554 3064 "was tried multiple times during reset."
3065 "Shutting down the HBA\n",
3066 cmd, cmd->scmd, cmd->sync_cmd);
c8dd61ef
SS		 3067 instance->instancet->disable_intr(instance);
3068 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3069 megaraid_sas_kill_hba(instance);
39a98554 3070 return;
3071 }
3072 }
3073
3074 if (cmd->sync_cmd == 1) {
3075 if (cmd->scmd) {
1be18254 3076 dev_notice(&instance->pdev->dev, "unexpected"
39a98554 3077 "cmd attached to internal command!\n");
3078 }
1be18254 3079 dev_notice(&instance->pdev->dev, "%p synchronous cmd"
39a98554 3080 "on the internal reset queue,"
3081 "issue it again.\n", cmd);
2be2a988 3082 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 3083 instance->instancet->fire_cmd(instance,
da0dc9fb 3084 cmd->frame_phys_addr,
39a98554 3085 0, instance->reg_set);
3086 } else if (cmd->scmd) {
1be18254 3087 dev_notice(&instance->pdev->dev, "%p scsi cmd [%02x]"
39a98554 3088 "detected on the internal queue, issue again.\n",
5cd049a5 3089 cmd, cmd->scmd->cmnd[0]);
39a98554 3090
3091 atomic_inc(&instance->fw_outstanding);
3092 instance->instancet->fire_cmd(instance,
3093 cmd->frame_phys_addr,
3094 cmd->frame_count-1, instance->reg_set);
3095 } else {
1be18254 3096 dev_notice(&instance->pdev->dev, "%p unexpected cmd on the"
39a98554 3097 "internal reset defer list while re-issue!!\n",
3098 cmd);
3099 }
3100 }
3101
3102 if (instance->aen_cmd) {
1be18254 3103 dev_notice(&instance->pdev->dev, "aen_cmd in def process\n");
39a98554 3104 megasas_return_cmd(instance, instance->aen_cmd);
3105
da0dc9fb 3106 instance->aen_cmd = NULL;
39a98554 3107 }
3108
3109 /*
da0dc9fb
BH		 3110 * Initiate AEN (Asynchronous Event Notification)
3111 */
39a98554 3112 seq_num = instance->last_seq_num;
3113 class_locale.members.reserved = 0;
3114 class_locale.members.locale = MR_EVT_LOCALE_ALL;
3115 class_locale.members.class = MR_EVT_CLASS_DEBUG;
3116
3117 megasas_register_aen(instance, seq_num, class_locale.word);
3118}
3119
3120/**
3121 * Move the internal reset pending commands to a deferred queue.
3122 *
3123 * We move the commands pending at internal reset time to a
3124 * pending queue. This queue would be flushed after successful
3125 * completion of the internal reset sequence. if the internal reset
3126 * did not complete in time, the kernel reset handler would flush
3127 * these commands.
3128 **/
3129static void
3130megasas_internal_reset_defer_cmds(struct megasas_instance *instance)
3131{
3132 struct megasas_cmd *cmd;
3133 int i;
3134 u32 max_cmd = instance->max_fw_cmds;
3135 u32 defer_index;
3136 unsigned long flags;
3137
da0dc9fb 3138 defer_index = 0;
90dc9d98 3139 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
39a98554 3140 for (i = 0; i < max_cmd; i++) {
3141 cmd = instance->cmd_list[i];
3142 if (cmd->sync_cmd == 1 || cmd->scmd) {
1be18254 3143 dev_notice(&instance->pdev->dev, "moving cmd[%d]:%p:%d:%p"
39a98554 3144 "on the defer queue as internal\n",
3145 defer_index, cmd, cmd->sync_cmd, cmd->scmd);
3146
3147 if (!list_empty(&cmd->list)) {
1be18254 3148 dev_notice(&instance->pdev->dev, "ERROR while"
39a98554 3149 " moving this cmd:%p, %d %p, it was"
3150 "discovered on some list?\n",
3151 cmd, cmd->sync_cmd, cmd->scmd);
3152
3153 list_del_init(&cmd->list);
3154 }
3155 defer_index++;
3156 list_add_tail(&cmd->list,
3157 &instance->internal_reset_pending_q);
3158 }
3159 }
90dc9d98 3160 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
39a98554 3161}
3162
3163
3164static void
3165process_fw_state_change_wq(struct work_struct *work)
3166{
3167 struct megasas_instance *instance =
3168 container_of(work, struct megasas_instance, work_init);
3169 u32 wait;
3170 unsigned long flags;
3171
3172 if (instance->adprecovery != MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3173 dev_notice(&instance->pdev->dev, "error, recovery st %x\n",
39a98554 3174 instance->adprecovery);
3175 return ;
3176 }
3177
3178 if (instance->adprecovery == MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3179 dev_notice(&instance->pdev->dev, "FW detected to be in fault"
39a98554 3180 "state, restarting it...\n");
3181
d46a3ad6 3182 instance->instancet->disable_intr(instance);
39a98554 3183 atomic_set(&instance->fw_outstanding, 0);
3184
3185 atomic_set(&instance->fw_reset_no_pci_access, 1);
3186 instance->instancet->adp_reset(instance, instance->reg_set);
da0dc9fb 3187 atomic_set(&instance->fw_reset_no_pci_access, 0);
39a98554 3188
1be18254 3189 dev_notice(&instance->pdev->dev, "FW restarted successfully,"
39a98554 3190 "initiating next stage...\n");
3191
1be18254 3192 dev_notice(&instance->pdev->dev, "HBA recovery state machine,"
39a98554 3193 "state 2 starting...\n");
3194
da0dc9fb 3195 /* waiting for about 20 second before start the second init */
39a98554 3196 for (wait = 0; wait < 30; wait++) {
3197 msleep(1000);
3198 }
3199
058a8fac 3200 if (megasas_transition_to_ready(instance, 1)) {
1be18254 3201 dev_notice(&instance->pdev->dev, "adapter not ready\n");
39a98554 3202
c8dd61ef 3203 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3204 megaraid_sas_kill_hba(instance);
39a98554 3205 return ;
3206 }
3207
3208 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
3209 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
3210 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)
3211 ) {
3212 *instance->consumer = *instance->producer;
3213 } else {
3214 *instance->consumer = 0;
3215 *instance->producer = 0;
3216 }
3217
3218 megasas_issue_init_mfi(instance);
3219
3220 spin_lock_irqsave(&instance->hba_lock, flags);
3221 instance->adprecovery = MEGASAS_HBA_OPERATIONAL;
3222 spin_unlock_irqrestore(&instance->hba_lock, flags);
d46a3ad6 3223 instance->instancet->enable_intr(instance);
39a98554 3224
3225 megasas_issue_pending_cmds_again(instance);
3226 instance->issuepend_done = 1;
3227 }
39a98554 3228}
3229
c4a3e0a5
BS		 3230/**
3231 * megasas_deplete_reply_queue - Processes all completed commands
3232 * @instance: Adapter soft state
3233 * @alt_status: Alternate status to be returned to
da0dc9fb
BH		 3234 * SCSI mid-layer instead of the status
3235 * returned by the FW
39a98554 3236 * Note: this must be called with hba lock held
c4a3e0a5 3237 */
858119e1 3238static int
39a98554 3239megasas_deplete_reply_queue(struct megasas_instance *instance,
3240 u8 alt_status)
c4a3e0a5 3241{
39a98554 3242 u32 mfiStatus;
3243 u32 fw_state;
3244
3245 if ((mfiStatus = instance->instancet->check_reset(instance,
3246 instance->reg_set)) == 1) {
3247 return IRQ_HANDLED;
3248 }
3249
3250 if ((mfiStatus = instance->instancet->clear_intr(
3251 instance->reg_set)
3252 ) == 0) {
e1419191 3253 /* Hardware may not set outbound_intr_status in MSI-X mode */
c8e858fe 3254 if (!instance->msix_vectors)
e1419191 3255 return IRQ_NONE;
39a98554 3256 }
3257
3258 instance->mfiStatus = mfiStatus;
3259
3260 if ((mfiStatus & MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE)) {
3261 fw_state = instance->instancet->read_fw_status_reg(
3262 instance->reg_set) & MFI_STATE_MASK;
3263
3264 if (fw_state != MFI_STATE_FAULT) {
1be18254 3265 dev_notice(&instance->pdev->dev, "fw state:%x\n",
39a98554 3266 fw_state);
3267 }
3268
3269 if ((fw_state == MFI_STATE_FAULT) &&
3270 (instance->disableOnlineCtrlReset == 0)) {
1be18254 3271 dev_notice(&instance->pdev->dev, "wait adp restart\n");
39a98554 3272
3273 if ((instance->pdev->device ==
3274 PCI_DEVICE_ID_LSI_SAS1064R) ||
3275 (instance->pdev->device ==
3276 PCI_DEVICE_ID_DELL_PERC5) ||
3277 (instance->pdev->device ==
3278 PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
3279
3280 *instance->consumer =
94cd65dd 3281 cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
39a98554 3282 }
3283
3284
d46a3ad6 3285 instance->instancet->disable_intr(instance);
39a98554 3286 instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT;
3287 instance->issuepend_done = 0;
3288
3289 atomic_set(&instance->fw_outstanding, 0);
3290 megasas_internal_reset_defer_cmds(instance);
3291
1be18254 3292 dev_notice(&instance->pdev->dev, "fwState=%x, stage:%d\n",
39a98554 3293 fw_state, instance->adprecovery);
3294
3295 schedule_work(&instance->work_init);
3296 return IRQ_HANDLED;
3297
3298 } else {
1be18254 3299 dev_notice(&instance->pdev->dev, "fwstate:%x, dis_OCR=%x\n",
39a98554 3300 fw_state, instance->disableOnlineCtrlReset);
3301 }
3302 }
c4a3e0a5 3303
5d018ad0 3304 tasklet_schedule(&instance->isr_tasklet);
c4a3e0a5
BS		 3305 return IRQ_HANDLED;
3306}
c4a3e0a5
BS		 3307/**
3308 * megasas_isr - isr entry point
3309 */
7d12e780 3310static irqreturn_t megasas_isr(int irq, void *devp)
c4a3e0a5 3311{
c8e858fe 3312 struct megasas_irq_context *irq_context = devp;
3313 struct megasas_instance *instance = irq_context->instance;
39a98554 3314 unsigned long flags;
da0dc9fb 3315 irqreturn_t rc;
39a98554 3316
c8e858fe 3317 if (atomic_read(&instance->fw_reset_no_pci_access))
39a98554 3318 return IRQ_HANDLED;
3319
39a98554 3320 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 3321 rc = megasas_deplete_reply_queue(instance, DID_OK);
39a98554 3322 spin_unlock_irqrestore(&instance->hba_lock, flags);
3323
3324 return rc;
c4a3e0a5
BS		 3325}
3326
3327/**
3328 * megasas_transition_to_ready - Move the FW to READY state
1341c939 3329 * @instance: Adapter soft state
c4a3e0a5
BS		 3330 *
3331 * During the initialization, FW passes can potentially be in any one of
3332 * several possible states. If the FW in operational, waiting-for-handshake
3333 * states, driver must take steps to bring it to ready state. Otherwise, it
3334 * has to wait for the ready state.
3335 */
9c915a8c 3336int
058a8fac 3337megasas_transition_to_ready(struct megasas_instance *instance, int ocr)
c4a3e0a5
BS		 3338{
3339 int i;
3340 u8 max_wait;
3341 u32 fw_state;
3342 u32 cur_state;
7218df69 3343 u32 abs_state, curr_abs_state;
c4a3e0a5 3344
bc6ac5e8
TH		 3345 abs_state = instance->instancet->read_fw_status_reg(instance->reg_set);
3346 fw_state = abs_state & MFI_STATE_MASK;
c4a3e0a5 3347
e3bbff9f 3348 if (fw_state != MFI_STATE_READY)
1be18254 3349 dev_info(&instance->pdev->dev, "Waiting for FW to come to ready"
0d49016b 3350 " state\n");
e3bbff9f 3351
c4a3e0a5
BS		 3352 while (fw_state != MFI_STATE_READY) {
3353
c4a3e0a5
BS		 3354 switch (fw_state) {
3355
3356 case MFI_STATE_FAULT:
1be18254 3357 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW in FAULT state!!\n");
058a8fac 3358 if (ocr) {
3359 max_wait = MEGASAS_RESET_WAIT_TIME;
3360 cur_state = MFI_STATE_FAULT;
3361 break;
3362 } else
3363 return -ENODEV;
c4a3e0a5
BS		 3364
3365 case MFI_STATE_WAIT_HANDSHAKE:
3366 /*
3367 * Set the CLR bit in inbound doorbell
3368 */
0c79e681 3369 if ((instance->pdev->device ==
87911122
YB		 3370 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3371 (instance->pdev->device ==
9c915a8c 3372 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
3373 (instance->pdev->device ==
21d3c710 3374 PCI_DEVICE_ID_LSI_FUSION) ||
36807e67 3375 (instance->pdev->device ==
229fe47c 3376 PCI_DEVICE_ID_LSI_PLASMA) ||
3377 (instance->pdev->device ==
21d3c710
SS		 3378 PCI_DEVICE_ID_LSI_INVADER) ||
3379 (instance->pdev->device ==
3380 PCI_DEVICE_ID_LSI_FURY)) {
87911122
YB		 3381 writel(
3382 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
9c915a8c 3383 &instance->reg_set->doorbell);
87911122
YB		 3384 } else {
3385 writel(
3386 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
3387 &instance->reg_set->inbound_doorbell);
3388 }
c4a3e0a5 3389
7218df69 3390 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3391 cur_state = MFI_STATE_WAIT_HANDSHAKE;
3392 break;
3393
e3bbff9f 3394 case MFI_STATE_BOOT_MESSAGE_PENDING:
87911122 3395 if ((instance->pdev->device ==
9c915a8c 3396 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3397 (instance->pdev->device ==
3398 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
3399 (instance->pdev->device ==
36807e67 3400 PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 3401 (instance->pdev->device ==
3402 PCI_DEVICE_ID_LSI_PLASMA) ||
36807e67 3403 (instance->pdev->device ==
21d3c710
SS		 3404 PCI_DEVICE_ID_LSI_INVADER) ||
3405 (instance->pdev->device ==
3406 PCI_DEVICE_ID_LSI_FURY)) {
87911122 3407 writel(MFI_INIT_HOTPLUG,
9c915a8c 3408 &instance->reg_set->doorbell);
87911122
YB		 3409 } else
3410 writel(MFI_INIT_HOTPLUG,
3411 &instance->reg_set->inbound_doorbell);
e3bbff9f 3412
7218df69 3413 max_wait = MEGASAS_RESET_WAIT_TIME;
e3bbff9f
SP		 3414 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
3415 break;
3416
c4a3e0a5
BS		 3417 case MFI_STATE_OPERATIONAL:
3418 /*
e3bbff9f 3419 * Bring it to READY state; assuming max wait 10 secs
c4a3e0a5 3420 */
d46a3ad6 3421 instance->instancet->disable_intr(instance);
87911122
YB		 3422 if ((instance->pdev->device ==
3423 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3424 (instance->pdev->device ==
9c915a8c 3425 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
3426 (instance->pdev->device
36807e67 3427 == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 3428 (instance->pdev->device
3429 == PCI_DEVICE_ID_LSI_PLASMA) ||
36807e67 3430 (instance->pdev->device
21d3c710
SS		 3431 == PCI_DEVICE_ID_LSI_INVADER) ||
3432 (instance->pdev->device
3433 == PCI_DEVICE_ID_LSI_FURY)) {
87911122 3434 writel(MFI_RESET_FLAGS,
9c915a8c 3435 &instance->reg_set->doorbell);
36807e67 3436 if ((instance->pdev->device ==
21d3c710
SS		 3437 PCI_DEVICE_ID_LSI_FUSION) ||
3438 (instance->pdev->device ==
229fe47c 3439 PCI_DEVICE_ID_LSI_PLASMA) ||
3440 (instance->pdev->device ==
21d3c710
SS		 3441 PCI_DEVICE_ID_LSI_INVADER) ||
3442 (instance->pdev->device ==
3443 PCI_DEVICE_ID_LSI_FURY)) {
9c915a8c 3444 for (i = 0; i < (10 * 1000); i += 20) {
3445 if (readl(
3446 &instance->
3447 reg_set->
3448 doorbell) & 1)
3449 msleep(20);
3450 else
3451 break;
3452 }
3453 }
87911122
YB		 3454 } else
3455 writel(MFI_RESET_FLAGS,
3456 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3457
7218df69 3458 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3459 cur_state = MFI_STATE_OPERATIONAL;
3460 break;
3461
3462 case MFI_STATE_UNDEFINED:
3463 /*
3464 * This state should not last for more than 2 seconds
3465 */
7218df69 3466 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3467 cur_state = MFI_STATE_UNDEFINED;
3468 break;
3469
3470 case MFI_STATE_BB_INIT:
7218df69 3471 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3472 cur_state = MFI_STATE_BB_INIT;
3473 break;
3474
3475 case MFI_STATE_FW_INIT:
7218df69 3476 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3477 cur_state = MFI_STATE_FW_INIT;
3478 break;
3479
3480 case MFI_STATE_FW_INIT_2:
7218df69 3481 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3482 cur_state = MFI_STATE_FW_INIT_2;
3483 break;
3484
3485 case MFI_STATE_DEVICE_SCAN:
7218df69 3486 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3487 cur_state = MFI_STATE_DEVICE_SCAN;
3488 break;
3489
3490 case MFI_STATE_FLUSH_CACHE:
7218df69 3491 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3492 cur_state = MFI_STATE_FLUSH_CACHE;
3493 break;
3494
3495 default:
1be18254 3496 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Unknown state 0x%x\n",
c4a3e0a5
BS		 3497 fw_state);
3498 return -ENODEV;
3499 }
3500
3501 /*
3502 * The cur_state should not last for more than max_wait secs
3503 */
3504 for (i = 0; i < (max_wait * 1000); i++) {
bc6ac5e8
TH		 3505 curr_abs_state = instance->instancet->
3506 read_fw_status_reg(instance->reg_set);
c4a3e0a5 3507
7218df69 3508 if (abs_state == curr_abs_state) {
c4a3e0a5
BS		 3509 msleep(1);
3510 } else
3511 break;
3512 }
3513
3514 /*
3515 * Return error if fw_state hasn't changed after max_wait
3516 */
7218df69 3517 if (curr_abs_state == abs_state) {
1be18254 3518 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW state [%d] hasn't changed "
c4a3e0a5
BS		 3519 "in %d secs\n", fw_state, max_wait);
3520 return -ENODEV;
3521 }
bc6ac5e8
TH		 3522
3523 abs_state = curr_abs_state;
3524 fw_state = curr_abs_state & MFI_STATE_MASK;
39a98554 3525 }
1be18254 3526 dev_info(&instance->pdev->dev, "FW now in Ready state\n");
c4a3e0a5
BS		 3527
3528 return 0;
3529}
3530
3531/**
3532 * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool
3533 * @instance: Adapter soft state
3534 */
3535static void megasas_teardown_frame_pool(struct megasas_instance *instance)
3536{
3537 int i;
9c915a8c 3538 u32 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3539 struct megasas_cmd *cmd;
3540
3541 if (!instance->frame_dma_pool)
3542 return;
3543
3544 /*
3545 * Return all frames to pool
3546 */
3547 for (i = 0; i < max_cmd; i++) {
3548
3549 cmd = instance->cmd_list[i];
3550
3551 if (cmd->frame)
3552 pci_pool_free(instance->frame_dma_pool, cmd->frame,
3553 cmd->frame_phys_addr);
3554
3555 if (cmd->sense)
e3bbff9f 3556 pci_pool_free(instance->sense_dma_pool, cmd->sense,
c4a3e0a5
BS		 3557 cmd->sense_phys_addr);
3558 }
3559
3560 /*
3561 * Now destroy the pool itself
3562 */
3563 pci_pool_destroy(instance->frame_dma_pool);
3564 pci_pool_destroy(instance->sense_dma_pool);
3565
3566 instance->frame_dma_pool = NULL;
3567 instance->sense_dma_pool = NULL;
3568}
3569
3570/**
3571 * megasas_create_frame_pool - Creates DMA pool for cmd frames
3572 * @instance: Adapter soft state
3573 *
3574 * Each command packet has an embedded DMA memory buffer that is used for
3575 * filling MFI frame and the SG list that immediately follows the frame. This
3576 * function creates those DMA memory buffers for each command packet by using
3577 * PCI pool facility.
3578 */
3579static int megasas_create_frame_pool(struct megasas_instance *instance)
3580{
3581 int i;
3582 u32 max_cmd;
3583 u32 sge_sz;
c4a3e0a5
BS		 3584 u32 total_sz;
3585 u32 frame_count;
3586 struct megasas_cmd *cmd;
3587
9c915a8c 3588 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3589
3590 /*
3591 * Size of our frame is 64 bytes for MFI frame, followed by max SG
3592 * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer
3593 */
3594 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
3595 sizeof(struct megasas_sge32);
3596
da0dc9fb 3597 if (instance->flag_ieee)
f4c9a131 3598 sge_sz = sizeof(struct megasas_sge_skinny);
f4c9a131 3599
c4a3e0a5 3600 /*
200aed58
SS		 3601 * For MFI controllers.
3602 * max_num_sge = 60
3603 * max_sge_sz = 16 byte (sizeof megasas_sge_skinny)
3604 * Total 960 byte (15 MFI frame of 64 byte)
3605 *
3606 * Fusion adapter require only 3 extra frame.
3607 * max_num_sge = 16 (defined as MAX_IOCTL_SGE)
3608 * max_sge_sz = 12 byte (sizeof megasas_sge64)
3609 * Total 192 byte (3 MFI frame of 64 byte)
c4a3e0a5 3610 */
200aed58 3611 frame_count = instance->ctrl_context ? (3 + 1) : (15 + 1);
c4a3e0a5
BS		 3612 total_sz = MEGAMFI_FRAME_SIZE * frame_count;
3613 /*
3614 * Use DMA pool facility provided by PCI layer
3615 */
3616 instance->frame_dma_pool = pci_pool_create("megasas frame pool",
200aed58 3617 instance->pdev, total_sz, 256, 0);
c4a3e0a5
BS		 3618
3619 if (!instance->frame_dma_pool) {
1be18254 3620 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup frame pool\n");
c4a3e0a5
BS		 3621 return -ENOMEM;
3622 }
3623
3624 instance->sense_dma_pool = pci_pool_create("megasas sense pool",
3625 instance->pdev, 128, 4, 0);
3626
3627 if (!instance->sense_dma_pool) {
1be18254 3628 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup sense pool\n");
c4a3e0a5
BS		 3629
3630 pci_pool_destroy(instance->frame_dma_pool);
3631 instance->frame_dma_pool = NULL;
3632
3633 return -ENOMEM;
3634 }
3635
3636 /*
3637 * Allocate and attach a frame to each of the commands in cmd_list.
3638 * By making cmd->index as the context instead of the &cmd, we can
3639 * always use 32bit context regardless of the architecture
3640 */
3641 for (i = 0; i < max_cmd; i++) {
3642
3643 cmd = instance->cmd_list[i];
3644
3645 cmd->frame = pci_pool_alloc(instance->frame_dma_pool,
3646 GFP_KERNEL, &cmd->frame_phys_addr);
3647
3648 cmd->sense = pci_pool_alloc(instance->sense_dma_pool,
3649 GFP_KERNEL, &cmd->sense_phys_addr);
3650
3651 /*
3652 * megasas_teardown_frame_pool() takes care of freeing
3653 * whatever has been allocated
3654 */
3655 if (!cmd->frame || !cmd->sense) {
1be18254 3656 dev_printk(KERN_DEBUG, &instance->pdev->dev, "pci_pool_alloc failed\n");
c4a3e0a5
BS		 3657 megasas_teardown_frame_pool(instance);
3658 return -ENOMEM;
3659 }
3660
707e09bd 3661 memset(cmd->frame, 0, total_sz);
94cd65dd 3662 cmd->frame->io.context = cpu_to_le32(cmd->index);
7e8a75f4 3663 cmd->frame->io.pad_0 = 0;
e5f93a36 3664 if ((instance->pdev->device != PCI_DEVICE_ID_LSI_FUSION) &&
229fe47c 3665 (instance->pdev->device != PCI_DEVICE_ID_LSI_PLASMA) &&
e5f93a36 3666 (instance->pdev->device != PCI_DEVICE_ID_LSI_INVADER) &&
21d3c710 3667 (instance->pdev->device != PCI_DEVICE_ID_LSI_FURY) &&
e5f93a36 3668 (reset_devices))
3669 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
c4a3e0a5
BS		 3670 }
3671
3672 return 0;
3673}
3674
3675/**
3676 * megasas_free_cmds - Free all the cmds in the free cmd pool
3677 * @instance: Adapter soft state
3678 */
9c915a8c 3679void megasas_free_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 3680{
3681 int i;
da0dc9fb 3682
c4a3e0a5
BS		 3683 /* First free the MFI frame pool */
3684 megasas_teardown_frame_pool(instance);
3685
3686 /* Free all the commands in the cmd_list */
9c915a8c 3687 for (i = 0; i < instance->max_mfi_cmds; i++)
3688
c4a3e0a5
BS		 3689 kfree(instance->cmd_list[i]);
3690
3691 /* Free the cmd_list buffer itself */
3692 kfree(instance->cmd_list);
3693 instance->cmd_list = NULL;
3694
3695 INIT_LIST_HEAD(&instance->cmd_pool);
3696}
3697
3698/**
3699 * megasas_alloc_cmds - Allocates the command packets
3700 * @instance: Adapter soft state
3701 *
3702 * Each command that is issued to the FW, whether IO commands from the OS or
3703 * internal commands like IOCTLs, are wrapped in local data structure called
3704 * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to
3705 * the FW.
3706 *
3707 * Each frame has a 32-bit field called context (tag). This context is used
3708 * to get back the megasas_cmd from the frame when a frame gets completed in
3709 * the ISR. Typically the address of the megasas_cmd itself would be used as
3710 * the context. But we wanted to keep the differences between 32 and 64 bit
3711 * systems to the mininum. We always use 32 bit integers for the context. In
3712 * this driver, the 32 bit values are the indices into an array cmd_list.
3713 * This array is used only to look up the megasas_cmd given the context. The
3714 * free commands themselves are maintained in a linked list called cmd_pool.
3715 */
9c915a8c 3716int megasas_alloc_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 3717{
3718 int i;
3719 int j;
3720 u32 max_cmd;
3721 struct megasas_cmd *cmd;
90dc9d98 3722 struct fusion_context *fusion;
c4a3e0a5 3723
90dc9d98 3724 fusion = instance->ctrl_context;
9c915a8c 3725 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3726
3727 /*
3728 * instance->cmd_list is an array of struct megasas_cmd pointers.
3729 * Allocate the dynamic array first and then allocate individual
3730 * commands.
3731 */
dd00cc48 3732 instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL);
c4a3e0a5
BS		 3733
3734 if (!instance->cmd_list) {
1be18254 3735 dev_printk(KERN_DEBUG, &instance->pdev->dev, "out of memory\n");
c4a3e0a5
BS		 3736 return -ENOMEM;
3737 }
3738
9c915a8c 3739 memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd);
c4a3e0a5
BS		 3740
3741 for (i = 0; i < max_cmd; i++) {
3742 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
3743 GFP_KERNEL);
3744
3745 if (!instance->cmd_list[i]) {
3746
3747 for (j = 0; j < i; j++)
3748 kfree(instance->cmd_list[j]);
3749
3750 kfree(instance->cmd_list);
3751 instance->cmd_list = NULL;
3752
3753 return -ENOMEM;
3754 }
3755 }
3756
c4a3e0a5
BS		 3757 for (i = 0; i < max_cmd; i++) {
3758 cmd = instance->cmd_list[i];
3759 memset(cmd, 0, sizeof(struct megasas_cmd));
3760 cmd->index = i;
39a98554 3761 cmd->scmd = NULL;
c4a3e0a5
BS		 3762 cmd->instance = instance;
3763
3764 list_add_tail(&cmd->list, &instance->cmd_pool);
3765 }
3766
3767 /*
3768 * Create a frame pool and assign one frame to each cmd
3769 */
3770 if (megasas_create_frame_pool(instance)) {
1be18254 3771 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error creating frame DMA pool\n");
c4a3e0a5
BS		 3772 megasas_free_cmds(instance);
3773 }
3774
3775 return 0;
3776}
3777
81e403ce
YB		 3778/*
3779 * megasas_get_pd_list_info - Returns FW's pd_list structure
3780 * @instance: Adapter soft state
3781 * @pd_list: pd_list structure
3782 *
3783 * Issues an internal command (DCMD) to get the FW's controller PD
3784 * list structure. This information is mainly used to find out SYSTEM
3785 * supported by the FW.
3786 */
3787static int
3788megasas_get_pd_list(struct megasas_instance *instance)
3789{
3790 int ret = 0, pd_index = 0;
3791 struct megasas_cmd *cmd;
3792 struct megasas_dcmd_frame *dcmd;
3793 struct MR_PD_LIST *ci;
3794 struct MR_PD_ADDRESS *pd_addr;
3795 dma_addr_t ci_h = 0;
3796
3797 cmd = megasas_get_cmd(instance);
3798
3799 if (!cmd) {
1be18254 3800 dev_printk(KERN_DEBUG, &instance->pdev->dev, "(get_pd_list): Failed to get cmd\n");
81e403ce
YB		 3801 return -ENOMEM;
3802 }
3803
3804 dcmd = &cmd->frame->dcmd;
3805
3806 ci = pci_alloc_consistent(instance->pdev,
3807 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), &ci_h);
3808
3809 if (!ci) {
1be18254 3810 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for pd_list\n");
81e403ce
YB		 3811 megasas_return_cmd(instance, cmd);
3812 return -ENOMEM;
3813 }
3814
3815 memset(ci, 0, sizeof(*ci));
3816 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
3817
3818 dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST;
3819 dcmd->mbox.b[1] = 0;
3820 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 3821 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
81e403ce 3822 dcmd->sge_count = 1;
94cd65dd 3823 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
81e403ce 3824 dcmd->timeout = 0;
780a3762 3825 dcmd->pad_0 = 0;
94cd65dd
SS		 3826 dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
3827 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY);
3828 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
3829 dcmd->sgl.sge32[0].length = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
81e403ce 3830
90dc9d98
SS		 3831 if (instance->ctrl_context && !instance->mask_interrupts)
3832 ret = megasas_issue_blocked_cmd(instance, cmd,
3833 MEGASAS_BLOCKED_CMD_TIMEOUT);
3834 else
3835 ret = megasas_issue_polled(instance, cmd);
81e403ce
YB		 3836
3837 /*
da0dc9fb
BH		 3838 * the following function will get the instance PD LIST.
3839 */
81e403ce
YB		 3840
3841 pd_addr = ci->addr;
3842
da0dc9fb 3843 if (ret == 0 &&
94cd65dd 3844 (le32_to_cpu(ci->count) <
81e403ce
YB		 3845 (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL))) {
3846
999ece0a 3847 memset(instance->local_pd_list, 0,
81e403ce
YB		 3848 MEGASAS_MAX_PD * sizeof(struct megasas_pd_list));
3849
94cd65dd 3850 for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) {
81e403ce 3851
999ece0a 3852 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].tid =
94cd65dd 3853 le16_to_cpu(pd_addr->deviceId);
999ece0a 3854 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveType =
81e403ce 3855 pd_addr->scsiDevType;
999ece0a 3856 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveState =
81e403ce
YB		 3857 MR_PD_STATE_SYSTEM;
3858 pd_addr++;
3859 }
999ece0a
SS		 3860 memcpy(instance->pd_list, instance->local_pd_list,
3861 sizeof(instance->pd_list));
81e403ce
YB		 3862 }
3863
3864 pci_free_consistent(instance->pdev,
3865 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST),
3866 ci, ci_h);
90dc9d98 3867
4026e9aa 3868 megasas_return_cmd(instance, cmd);
81e403ce
YB		 3869
3870 return ret;
3871}
3872
bdc6fb8d
YB		 3873/*
3874 * megasas_get_ld_list_info - Returns FW's ld_list structure
3875 * @instance: Adapter soft state
3876 * @ld_list: ld_list structure
3877 *
3878 * Issues an internal command (DCMD) to get the FW's controller PD
3879 * list structure. This information is mainly used to find out SYSTEM
3880 * supported by the FW.
3881 */
3882static int
3883megasas_get_ld_list(struct megasas_instance *instance)
3884{
3885 int ret = 0, ld_index = 0, ids = 0;
3886 struct megasas_cmd *cmd;
3887 struct megasas_dcmd_frame *dcmd;
3888 struct MR_LD_LIST *ci;
3889 dma_addr_t ci_h = 0;
94cd65dd 3890 u32 ld_count;
bdc6fb8d
YB		 3891
3892 cmd = megasas_get_cmd(instance);
3893
3894 if (!cmd) {
1be18254 3895 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_list: Failed to get cmd\n");
bdc6fb8d
YB		 3896 return -ENOMEM;
3897 }
3898
3899 dcmd = &cmd->frame->dcmd;
3900
3901 ci = pci_alloc_consistent(instance->pdev,
3902 sizeof(struct MR_LD_LIST),
3903 &ci_h);
3904
3905 if (!ci) {
1be18254 3906 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem in get_ld_list\n");
bdc6fb8d
YB		 3907 megasas_return_cmd(instance, cmd);
3908 return -ENOMEM;
3909 }
3910
3911 memset(ci, 0, sizeof(*ci));
3912 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
3913
51087a86
SS		 3914 if (instance->supportmax256vd)
3915 dcmd->mbox.b[0] = 1;
bdc6fb8d 3916 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 3917 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
bdc6fb8d 3918 dcmd->sge_count = 1;
94cd65dd 3919 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
bdc6fb8d 3920 dcmd->timeout = 0;
94cd65dd
SS		 3921 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST));
3922 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST);
3923 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
3924 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_LIST));
bdc6fb8d
YB		 3925 dcmd->pad_0 = 0;
3926
90dc9d98
SS		 3927 if (instance->ctrl_context && !instance->mask_interrupts)
3928 ret = megasas_issue_blocked_cmd(instance, cmd,
3929 MEGASAS_BLOCKED_CMD_TIMEOUT);
3930 else
3931 ret = megasas_issue_polled(instance, cmd);
3932
bdc6fb8d 3933
94cd65dd
SS		 3934 ld_count = le32_to_cpu(ci->ldCount);
3935
bdc6fb8d
YB		 3936 /* the following function will get the instance PD LIST */
3937
51087a86
SS		 3938 if ((ret == 0) && (ld_count <= instance->fw_supported_vd_count)) {
3939 memset(instance->ld_ids, 0xff, MAX_LOGICAL_DRIVES_EXT);
bdc6fb8d 3940
94cd65dd 3941 for (ld_index = 0; ld_index < ld_count; ld_index++) {
bdc6fb8d
YB		 3942 if (ci->ldList[ld_index].state != 0) {
3943 ids = ci->ldList[ld_index].ref.targetId;
3944 instance->ld_ids[ids] =
3945 ci->ldList[ld_index].ref.targetId;
3946 }
3947 }
3948 }
3949
3950 pci_free_consistent(instance->pdev,
3951 sizeof(struct MR_LD_LIST),
3952 ci,
3953 ci_h);
3954
4026e9aa 3955 megasas_return_cmd(instance, cmd);
bdc6fb8d
YB		 3956 return ret;
3957}
3958
21c9e160 3959/**
3960 * megasas_ld_list_query - Returns FW's ld_list structure
3961 * @instance: Adapter soft state
3962 * @ld_list: ld_list structure
3963 *
3964 * Issues an internal command (DCMD) to get the FW's controller PD
3965 * list structure. This information is mainly used to find out SYSTEM
3966 * supported by the FW.
3967 */
3968static int
3969megasas_ld_list_query(struct megasas_instance *instance, u8 query_type)
3970{
3971 int ret = 0, ld_index = 0, ids = 0;
3972 struct megasas_cmd *cmd;
3973 struct megasas_dcmd_frame *dcmd;
3974 struct MR_LD_TARGETID_LIST *ci;
3975 dma_addr_t ci_h = 0;
94cd65dd 3976 u32 tgtid_count;
21c9e160 3977
3978 cmd = megasas_get_cmd(instance);
3979
3980 if (!cmd) {
1be18254
BH		 3981 dev_warn(&instance->pdev->dev,
3982 "megasas_ld_list_query: Failed to get cmd\n");
21c9e160 3983 return -ENOMEM;
3984 }
3985
3986 dcmd = &cmd->frame->dcmd;
3987
3988 ci = pci_alloc_consistent(instance->pdev,
3989 sizeof(struct MR_LD_TARGETID_LIST), &ci_h);
3990
3991 if (!ci) {
1be18254
BH		 3992 dev_warn(&instance->pdev->dev,
3993 "Failed to alloc mem for ld_list_query\n");
21c9e160 3994 megasas_return_cmd(instance, cmd);
3995 return -ENOMEM;
3996 }
3997
3998 memset(ci, 0, sizeof(*ci));
3999 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4000
4001 dcmd->mbox.b[0] = query_type;
51087a86
SS		 4002 if (instance->supportmax256vd)
4003 dcmd->mbox.b[2] = 1;
21c9e160 4004
4005 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4006 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
21c9e160 4007 dcmd->sge_count = 1;
94cd65dd 4008 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
21c9e160 4009 dcmd->timeout = 0;
94cd65dd
SS		 4010 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
4011 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY);
4012 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4013 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
21c9e160 4014 dcmd->pad_0 = 0;
4015
90dc9d98
SS		 4016 if (instance->ctrl_context && !instance->mask_interrupts)
4017 ret = megasas_issue_blocked_cmd(instance, cmd,
4018 MEGASAS_BLOCKED_CMD_TIMEOUT);
4019 else
4020 ret = megasas_issue_polled(instance, cmd);
21c9e160 4021
94cd65dd
SS		 4022 tgtid_count = le32_to_cpu(ci->count);
4023
51087a86 4024 if ((ret == 0) && (tgtid_count <= (instance->fw_supported_vd_count))) {
21c9e160 4025 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
94cd65dd 4026 for (ld_index = 0; ld_index < tgtid_count; ld_index++) {
21c9e160 4027 ids = ci->targetId[ld_index];
4028 instance->ld_ids[ids] = ci->targetId[ld_index];
4029 }
4030
4031 }
4032
4033 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_TARGETID_LIST),
4034 ci, ci_h);
4035
4026e9aa 4036 megasas_return_cmd(instance, cmd);
21c9e160 4037
4038 return ret;
4039}
4040
d009b576
SS		 4041/*
4042 * megasas_update_ext_vd_details : Update details w.r.t Extended VD
4043 * instance : Controller's instance
4044*/
4045static void megasas_update_ext_vd_details(struct megasas_instance *instance)
4046{
4047 struct fusion_context *fusion;
4048 u32 old_map_sz;
4049 u32 new_map_sz;
4050
4051 fusion = instance->ctrl_context;
4052 /* For MFI based controllers return dummy success */
4053 if (!fusion)
4054 return;
4055
4056 instance->supportmax256vd =
4057 instance->ctrl_info->adapterOperations3.supportMaxExtLDs;
4058 /* Below is additional check to address future FW enhancement */
4059 if (instance->ctrl_info->max_lds > 64)
4060 instance->supportmax256vd = 1;
4061
4062 instance->drv_supported_vd_count = MEGASAS_MAX_LD_CHANNELS
4063 * MEGASAS_MAX_DEV_PER_CHANNEL;
4064 instance->drv_supported_pd_count = MEGASAS_MAX_PD_CHANNELS
4065 * MEGASAS_MAX_DEV_PER_CHANNEL;
4066 if (instance->supportmax256vd) {
4067 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES_EXT;
4068 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4069 } else {
4070 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4071 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4072 }
d88da09a
SS		 4073
4074 dev_info(&instance->pdev->dev,
4075 "firmware type\t: %s\n",
4076 instance->supportmax256vd ? "Extended VD(240 VD)firmware" :
4077 "Legacy(64 VD) firmware");
d009b576 4078
da0dc9fb 4079 old_map_sz = sizeof(struct MR_FW_RAID_MAP) +
d009b576
SS		 4080 (sizeof(struct MR_LD_SPAN_MAP) *
4081 (instance->fw_supported_vd_count - 1));
da0dc9fb
BH		 4082 new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT);
4083 fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP) +
d009b576
SS		 4084 (sizeof(struct MR_LD_SPAN_MAP) *
4085 (instance->drv_supported_vd_count - 1));
4086
4087 fusion->max_map_sz = max(old_map_sz, new_map_sz);
4088
4089
4090 if (instance->supportmax256vd)
4091 fusion->current_map_sz = new_map_sz;
4092 else
4093 fusion->current_map_sz = old_map_sz;
d009b576
SS		 4094}
4095
c4a3e0a5
BS		 4096/**
4097 * megasas_get_controller_info - Returns FW's controller structure
4098 * @instance: Adapter soft state
c4a3e0a5
BS		 4099 *
4100 * Issues an internal command (DCMD) to get the FW's controller structure.
4101 * This information is mainly used to find out the maximum IO transfer per
4102 * command supported by the FW.
4103 */
51087a86 4104int
d009b576 4105megasas_get_ctrl_info(struct megasas_instance *instance)
c4a3e0a5
BS		 4106{
4107 int ret = 0;
4108 struct megasas_cmd *cmd;
4109 struct megasas_dcmd_frame *dcmd;
4110 struct megasas_ctrl_info *ci;
d009b576 4111 struct megasas_ctrl_info *ctrl_info;
c4a3e0a5
BS		 4112 dma_addr_t ci_h = 0;
4113
d009b576
SS		 4114 ctrl_info = instance->ctrl_info;
4115
c4a3e0a5
BS		 4116 cmd = megasas_get_cmd(instance);
4117
4118 if (!cmd) {
1be18254 4119 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a free cmd\n");
c4a3e0a5
BS		 4120 return -ENOMEM;
4121 }
4122
4123 dcmd = &cmd->frame->dcmd;
4124
4125 ci = pci_alloc_consistent(instance->pdev,
4126 sizeof(struct megasas_ctrl_info), &ci_h);
4127
4128 if (!ci) {
1be18254 4129 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for ctrl info\n");
c4a3e0a5
BS		 4130 megasas_return_cmd(instance, cmd);
4131 return -ENOMEM;
4132 }
4133
4134 memset(ci, 0, sizeof(*ci));
4135 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4136
4137 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4138 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
c4a3e0a5 4139 dcmd->sge_count = 1;
94cd65dd 4140 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4141 dcmd->timeout = 0;
780a3762 4142 dcmd->pad_0 = 0;
94cd65dd
SS		 4143 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info));
4144 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO);
4145 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4146 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_ctrl_info));
51087a86 4147 dcmd->mbox.b[0] = 1;
c4a3e0a5 4148
90dc9d98
SS		 4149 if (instance->ctrl_context && !instance->mask_interrupts)
4150 ret = megasas_issue_blocked_cmd(instance, cmd,
4151 MEGASAS_BLOCKED_CMD_TIMEOUT);
4152 else
4153 ret = megasas_issue_polled(instance, cmd);
4154
d009b576 4155 if (!ret) {
c4a3e0a5 4156 memcpy(ctrl_info, ci, sizeof(struct megasas_ctrl_info));
d009b576
SS		 4157 le32_to_cpus((u32 *)&ctrl_info->properties.OnOffProperties);
4158 le32_to_cpus((u32 *)&ctrl_info->adapterOperations2);
4159 le32_to_cpus((u32 *)&ctrl_info->adapterOperations3);
4160 megasas_update_ext_vd_details(instance);
3761cb4c 4161 instance->use_seqnum_jbod_fp =
4162 ctrl_info->adapterOperations3.useSeqNumJbodFP;
4026e9aa
SS		 4163 instance->is_imr = (ctrl_info->memory_size ? 0 : 1);
4164 dev_info(&instance->pdev->dev,
4165 "controller type\t: %s(%dMB)\n",
4166 instance->is_imr ? "iMR" : "MR",
4167 le16_to_cpu(ctrl_info->memory_size));
d009b576 4168 }
c4a3e0a5
BS		 4169
4170 pci_free_consistent(instance->pdev, sizeof(struct megasas_ctrl_info),
4171 ci, ci_h);
4172
4026e9aa 4173 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 4174 return ret;
4175}
4176
fc62b3fc
SS		 4177/*
4178 * megasas_set_crash_dump_params - Sends address of crash dump DMA buffer
4179 * to firmware
4180 *
4181 * @instance: Adapter soft state
4182 * @crash_buf_state - tell FW to turn ON/OFF crash dump feature
4183 MR_CRASH_BUF_TURN_OFF = 0
4184 MR_CRASH_BUF_TURN_ON = 1
4185 * @return 0 on success non-zero on failure.
4186 * Issues an internal command (DCMD) to set parameters for crash dump feature.
4187 * Driver will send address of crash dump DMA buffer and set mbox to tell FW
4188 * that driver supports crash dump feature. This DCMD will be sent only if
4189 * crash dump feature is supported by the FW.
4190 *
4191 */
4192int megasas_set_crash_dump_params(struct megasas_instance *instance,
4193 u8 crash_buf_state)
4194{
4195 int ret = 0;
4196 struct megasas_cmd *cmd;
4197 struct megasas_dcmd_frame *dcmd;
4198
4199 cmd = megasas_get_cmd(instance);
4200
4201 if (!cmd) {
4202 dev_err(&instance->pdev->dev, "Failed to get a free cmd\n");
4203 return -ENOMEM;
4204 }
4205
4206
4207 dcmd = &cmd->frame->dcmd;
4208
4209 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4210 dcmd->mbox.b[0] = crash_buf_state;
4211 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4212 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
fc62b3fc
SS		 4213 dcmd->sge_count = 1;
4214 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
4215 dcmd->timeout = 0;
4216 dcmd->pad_0 = 0;
4217 dcmd->data_xfer_len = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4218 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SET_CRASH_DUMP_PARAMS);
4219 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->crash_dump_h);
4220 dcmd->sgl.sge32[0].length = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4221
90dc9d98
SS		 4222 if (instance->ctrl_context && !instance->mask_interrupts)
4223 ret = megasas_issue_blocked_cmd(instance, cmd,
4224 MEGASAS_BLOCKED_CMD_TIMEOUT);
fc62b3fc 4225 else
90dc9d98
SS		 4226 ret = megasas_issue_polled(instance, cmd);
4227
4026e9aa 4228 megasas_return_cmd(instance, cmd);
fc62b3fc
SS		 4229 return ret;
4230}
4231
31ea7088 4232/**
4233 * megasas_issue_init_mfi - Initializes the FW
4234 * @instance: Adapter soft state
4235 *
4236 * Issues the INIT MFI cmd
4237 */
4238static int
4239megasas_issue_init_mfi(struct megasas_instance *instance)
4240{
9ab9ed38 4241 __le32 context;
31ea7088 4242 struct megasas_cmd *cmd;
31ea7088 4243 struct megasas_init_frame *init_frame;
4244 struct megasas_init_queue_info *initq_info;
4245 dma_addr_t init_frame_h;
4246 dma_addr_t initq_info_h;
4247
4248 /*
4249 * Prepare a init frame. Note the init frame points to queue info
4250 * structure. Each frame has SGL allocated after first 64 bytes. For
4251 * this frame - since we don't need any SGL - we use SGL's space as
4252 * queue info structure
4253 *
4254 * We will not get a NULL command below. We just created the pool.
4255 */
4256 cmd = megasas_get_cmd(instance);
4257
4258 init_frame = (struct megasas_init_frame *)cmd->frame;
4259 initq_info = (struct megasas_init_queue_info *)
4260 ((unsigned long)init_frame + 64);
4261
4262 init_frame_h = cmd->frame_phys_addr;
4263 initq_info_h = init_frame_h + 64;
4264
4265 context = init_frame->context;
4266 memset(init_frame, 0, MEGAMFI_FRAME_SIZE);
4267 memset(initq_info, 0, sizeof(struct megasas_init_queue_info));
4268 init_frame->context = context;
4269
94cd65dd
SS		 4270 initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1);
4271 initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h);
31ea7088 4272
94cd65dd
SS		 4273 initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h);
4274 initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h);
31ea7088 4275
4276 init_frame->cmd = MFI_CMD_INIT;
2be2a988 4277 init_frame->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 4278 init_frame->queue_info_new_phys_addr_lo =
4279 cpu_to_le32(lower_32_bits(initq_info_h));
4280 init_frame->queue_info_new_phys_addr_hi =
4281 cpu_to_le32(upper_32_bits(initq_info_h));
31ea7088 4282
94cd65dd 4283 init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info));
31ea7088 4284
4285 /*
4286 * disable the intr before firing the init frame to FW
4287 */
d46a3ad6 4288 instance->instancet->disable_intr(instance);
31ea7088 4289
4290 /*
4291 * Issue the init frame in polled mode
4292 */
4293
4294 if (megasas_issue_polled(instance, cmd)) {
1be18254 4295 dev_err(&instance->pdev->dev, "Failed to init firmware\n");
31ea7088 4296 megasas_return_cmd(instance, cmd);
4297 goto fail_fw_init;
4298 }
4299
4300 megasas_return_cmd(instance, cmd);
4301
4302 return 0;
4303
4304fail_fw_init:
4305 return -EINVAL;
4306}
4307
cd50ba8e 4308static u32
4309megasas_init_adapter_mfi(struct megasas_instance *instance)
c4a3e0a5 4310{
cd50ba8e 4311 struct megasas_register_set __iomem *reg_set;
c4a3e0a5
BS		 4312 u32 context_sz;
4313 u32 reply_q_sz;
c4a3e0a5
BS		 4314
4315 reg_set = instance->reg_set;
4316
c4a3e0a5
BS		 4317 /*
4318 * Get various operational parameters from status register
4319 */
1341c939 4320 instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF;
e3bbff9f
SP		 4321 /*
4322 * Reduce the max supported cmds by 1. This is to ensure that the
4323 * reply_q_sz (1 more than the max cmd that driver may send)
4324 * does not exceed max cmds that the FW can support
4325 */
4326 instance->max_fw_cmds = instance->max_fw_cmds-1;
9c915a8c 4327 instance->max_mfi_cmds = instance->max_fw_cmds;
0d49016b 4328 instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >>
1341c939 4329 0x10;
f26ac3a1
SS		 4330 /*
4331 * For MFI skinny adapters, MEGASAS_SKINNY_INT_CMDS commands
4332 * are reserved for IOCTL + driver's internal DCMDs.
4333 */
4334 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
4335 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
4336 instance->max_scsi_cmds = (instance->max_fw_cmds -
4337 MEGASAS_SKINNY_INT_CMDS);
4338 sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS);
4339 } else {
4340 instance->max_scsi_cmds = (instance->max_fw_cmds -
4341 MEGASAS_INT_CMDS);
4342 sema_init(&instance->ioctl_sem, (MEGASAS_MFI_IOCTL_CMDS));
4343 }
4344
c4a3e0a5
BS		 4345 /*
4346 * Create a pool of commands
4347 */
4348 if (megasas_alloc_cmds(instance))
4349 goto fail_alloc_cmds;
4350
4351 /*
4352 * Allocate memory for reply queue. Length of reply queue should
4353 * be _one_ more than the maximum commands handled by the firmware.
4354 *
4355 * Note: When FW completes commands, it places corresponding contex
4356 * values in this circular reply queue. This circular queue is a fairly
4357 * typical producer-consumer queue. FW is the producer (of completed
4358 * commands) and the driver is the consumer.
4359 */
4360 context_sz = sizeof(u32);
4361 reply_q_sz = context_sz * (instance->max_fw_cmds + 1);
4362
4363 instance->reply_queue = pci_alloc_consistent(instance->pdev,
4364 reply_q_sz,
4365 &instance->reply_queue_h);
4366
4367 if (!instance->reply_queue) {
1be18254 4368 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Out of DMA mem for reply queue\n");
c4a3e0a5
BS		 4369 goto fail_reply_queue;
4370 }
4371
31ea7088 4372 if (megasas_issue_init_mfi(instance))
c4a3e0a5 4373 goto fail_fw_init;
c4a3e0a5 4374
d009b576 4375 if (megasas_get_ctrl_info(instance)) {
51087a86
SS		 4376 dev_err(&instance->pdev->dev, "(%d): Could get controller info "
4377 "Fail from %s %d\n", instance->unique_id,
4378 __func__, __LINE__);
4379 goto fail_fw_init;
4380 }
4381
39a98554 4382 instance->fw_support_ieee = 0;
4383 instance->fw_support_ieee =
4384 (instance->instancet->read_fw_status_reg(reg_set) &
4385 0x04000000);
4386
1be18254 4387 dev_notice(&instance->pdev->dev, "megasas_init_mfi: fw_support_ieee=%d",
39a98554 4388 instance->fw_support_ieee);
4389
4390 if (instance->fw_support_ieee)
4391 instance->flag_ieee = 1;
4392
cd50ba8e 4393 return 0;
4394
4395fail_fw_init:
4396
4397 pci_free_consistent(instance->pdev, reply_q_sz,
4398 instance->reply_queue, instance->reply_queue_h);
4399fail_reply_queue:
4400 megasas_free_cmds(instance);
4401
4402fail_alloc_cmds:
cd50ba8e 4403 return 1;
4404}
4405
d3557fc8
SS		 4406/*
4407 * megasas_setup_irqs_msix - register legacy interrupts.
4408 * @instance: Adapter soft state
4409 *
4410 * Do not enable interrupt, only setup ISRs.
4411 *
4412 * Return 0 on success.
4413 */
4414static int
4415megasas_setup_irqs_ioapic(struct megasas_instance *instance)
4416{
4417 struct pci_dev *pdev;
4418
4419 pdev = instance->pdev;
4420 instance->irq_context[0].instance = instance;
4421 instance->irq_context[0].MSIxIndex = 0;
4422 if (request_irq(pdev->irq, instance->instancet->service_isr,
4423 IRQF_SHARED, "megasas", &instance->irq_context[0])) {
4424 dev_err(&instance->pdev->dev,
4425 "Failed to register IRQ from %s %d\n",
4426 __func__, __LINE__);
4427 return -1;
4428 }
4429 return 0;
4430}
4431
4432/**
4433 * megasas_setup_irqs_msix - register MSI-x interrupts.
4434 * @instance: Adapter soft state
4435 * @is_probe: Driver probe check
4436 *
4437 * Do not enable interrupt, only setup ISRs.
4438 *
4439 * Return 0 on success.
4440 */
4441static int
4442megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe)
4443{
4444 int i, j, cpu;
4445 struct pci_dev *pdev;
4446
4447 pdev = instance->pdev;
4448
4449 /* Try MSI-x */
4450 cpu = cpumask_first(cpu_online_mask);
4451 for (i = 0; i < instance->msix_vectors; i++) {
4452 instance->irq_context[i].instance = instance;
4453 instance->irq_context[i].MSIxIndex = i;
4454 if (request_irq(instance->msixentry[i].vector,
4455 instance->instancet->service_isr, 0, "megasas",
4456 &instance->irq_context[i])) {
4457 dev_err(&instance->pdev->dev,
4458 "Failed to register IRQ for vector %d.\n", i);
4459 for (j = 0; j < i; j++) {
4460 if (smp_affinity_enable)
4461 irq_set_affinity_hint(
4462 instance->msixentry[j].vector, NULL);
4463 free_irq(instance->msixentry[j].vector,
4464 &instance->irq_context[j]);
4465 }
4466 /* Retry irq register for IO_APIC*/
4467 instance->msix_vectors = 0;
4468 if (is_probe)
4469 return megasas_setup_irqs_ioapic(instance);
4470 else
4471 return -1;
4472 }
4473 if (smp_affinity_enable) {
4474 if (irq_set_affinity_hint(instance->msixentry[i].vector,
4475 get_cpu_mask(cpu)))
4476 dev_err(&instance->pdev->dev,
4477 "Failed to set affinity hint"
4478 " for cpu %d\n", cpu);
4479 cpu = cpumask_next(cpu, cpu_online_mask);
4480 }
4481 }
4482 return 0;
4483}
4484
4485/*
4486 * megasas_destroy_irqs- unregister interrupts.
4487 * @instance: Adapter soft state
4488 * return: void
4489 */
4490static void
4491megasas_destroy_irqs(struct megasas_instance *instance) {
4492
4493 int i;
4494
4495 if (instance->msix_vectors)
4496 for (i = 0; i < instance->msix_vectors; i++) {
4497 if (smp_affinity_enable)
4498 irq_set_affinity_hint(
4499 instance->msixentry[i].vector, NULL);
4500 free_irq(instance->msixentry[i].vector,
4501 &instance->irq_context[i]);
4502 }
4503 else
4504 free_irq(instance->pdev->irq, &instance->irq_context[0]);
4505}
4506
3761cb4c 4507/**
4508 * megasas_setup_jbod_map - setup jbod map for FP seq_number.
4509 * @instance: Adapter soft state
4510 * @is_probe: Driver probe check
4511 *
4512 * Return 0 on success.
4513 */
4514void
4515megasas_setup_jbod_map(struct megasas_instance *instance)
4516{
4517 int i;
4518 struct fusion_context *fusion = instance->ctrl_context;
4519 u32 pd_seq_map_sz;
4520
4521 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
4522 (sizeof(struct MR_PD_CFG_SEQ) * (MAX_PHYSICAL_DEVICES - 1));
4523
4524 if (reset_devices || !fusion ||
4525 !instance->ctrl_info->adapterOperations3.useSeqNumJbodFP) {
4526 dev_info(&instance->pdev->dev,
4527 "Jbod map is not supported %s %d\n",
4528 __func__, __LINE__);
4529 instance->use_seqnum_jbod_fp = false;
4530 return;
4531 }
4532
4533 if (fusion->pd_seq_sync[0])
4534 goto skip_alloc;
4535
4536 for (i = 0; i < JBOD_MAPS_COUNT; i++) {
4537 fusion->pd_seq_sync[i] = dma_alloc_coherent
4538 (&instance->pdev->dev, pd_seq_map_sz,
4539 &fusion->pd_seq_phys[i], GFP_KERNEL);
4540 if (!fusion->pd_seq_sync[i]) {
4541 dev_err(&instance->pdev->dev,
4542 "Failed to allocate memory from %s %d\n",
4543 __func__, __LINE__);
4544 if (i == 1) {
4545 dma_free_coherent(&instance->pdev->dev,
4546 pd_seq_map_sz, fusion->pd_seq_sync[0],
4547 fusion->pd_seq_phys[0]);
4548 fusion->pd_seq_sync[0] = NULL;
4549 }
4550 instance->use_seqnum_jbod_fp = false;
4551 return;
4552 }
4553 }
4554
4555skip_alloc:
4556 if (!megasas_sync_pd_seq_num(instance, false) &&
4557 !megasas_sync_pd_seq_num(instance, true))
4558 instance->use_seqnum_jbod_fp = true;
4559 else
4560 instance->use_seqnum_jbod_fp = false;
4561}
4562
cd50ba8e 4563/**
4564 * megasas_init_fw - Initializes the FW
4565 * @instance: Adapter soft state
4566 *
4567 * This is the main function for initializing firmware
4568 */
4569
4570static int megasas_init_fw(struct megasas_instance *instance)
4571{
4572 u32 max_sectors_1;
4573 u32 max_sectors_2;
d46a3ad6 4574 u32 tmp_sectors, msix_enable, scratch_pad_2;
11f8a7b3 4575 resource_size_t base_addr;
cd50ba8e 4576 struct megasas_register_set __iomem *reg_set;
51087a86 4577 struct megasas_ctrl_info *ctrl_info = NULL;
cd50ba8e 4578 unsigned long bar_list;
d46a3ad6 4579 int i, loop, fw_msix_count = 0;
229fe47c 4580 struct IOV_111 *iovPtr;
cd50ba8e 4581
4582 /* Find first memory bar */
4583 bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM);
4584 instance->bar = find_first_bit(&bar_list, sizeof(unsigned long));
cd50ba8e 4585 if (pci_request_selected_regions(instance->pdev, instance->bar,
4586 "megasas: LSI")) {
1be18254 4587 dev_printk(KERN_DEBUG, &instance->pdev->dev, "IO memory region busy!\n");
cd50ba8e 4588 return -EBUSY;
4589 }
4590
11f8a7b3
BC		 4591 base_addr = pci_resource_start(instance->pdev, instance->bar);
4592 instance->reg_set = ioremap_nocache(base_addr, 8192);
cd50ba8e 4593
4594 if (!instance->reg_set) {
1be18254 4595 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to map IO mem\n");
cd50ba8e 4596 goto fail_ioremap;
4597 }
4598
4599 reg_set = instance->reg_set;
4600
4601 switch (instance->pdev->device) {
9c915a8c 4602 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 4603 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 4604 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 4605 case PCI_DEVICE_ID_LSI_FURY:
9c915a8c 4606 instance->instancet = &megasas_instance_template_fusion;
4607 break;
cd50ba8e 4608 case PCI_DEVICE_ID_LSI_SAS1078R:
4609 case PCI_DEVICE_ID_LSI_SAS1078DE:
4610 instance->instancet = &megasas_instance_template_ppc;
4611 break;
4612 case PCI_DEVICE_ID_LSI_SAS1078GEN2:
4613 case PCI_DEVICE_ID_LSI_SAS0079GEN2:
4614 instance->instancet = &megasas_instance_template_gen2;
4615 break;
4616 case PCI_DEVICE_ID_LSI_SAS0073SKINNY:
4617 case PCI_DEVICE_ID_LSI_SAS0071SKINNY:
4618 instance->instancet = &megasas_instance_template_skinny;
4619 break;
4620 case PCI_DEVICE_ID_LSI_SAS1064R:
4621 case PCI_DEVICE_ID_DELL_PERC5:
4622 default:
4623 instance->instancet = &megasas_instance_template_xscale;
4624 break;
4625 }
4626
6431f5d7
SS		 4627 if (megasas_transition_to_ready(instance, 0)) {
4628 atomic_set(&instance->fw_reset_no_pci_access, 1);
4629 instance->instancet->adp_reset
4630 (instance, instance->reg_set);
4631 atomic_set(&instance->fw_reset_no_pci_access, 0);
4632 dev_info(&instance->pdev->dev,
1be18254 4633 "FW restarted successfully from %s!\n",
6431f5d7
SS		 4634 __func__);
4635
4636 /*waitting for about 30 second before retry*/
4637 ssleep(30);
4638
4639 if (megasas_transition_to_ready(instance, 0))
4640 goto fail_ready_state;
4641 }
cd50ba8e 4642
d46a3ad6
SS		 4643 /*
4644 * MSI-X host index 0 is common for all adapter.
4645 * It is used for all MPT based Adapters.
4646 */
4647 instance->reply_post_host_index_addr[0] =
8a232bb3 4648 (u32 __iomem *)((u8 __iomem *)instance->reg_set +
d46a3ad6
SS		 4649 MPI2_REPLY_POST_HOST_INDEX_OFFSET);
4650
3f1abce4 4651 /* Check if MSI-X is supported while in ready state */
4652 msix_enable = (instance->instancet->read_fw_status_reg(reg_set) &
4653 0x4000000) >> 0x1a;
c8e858fe 4654 if (msix_enable && !msix_disable) {
d46a3ad6
SS		 4655 scratch_pad_2 = readl
4656 (&instance->reg_set->outbound_scratch_pad_2);
c8e858fe 4657 /* Check max MSI-X vectors */
229fe47c 4658 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
4659 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA)) {
d46a3ad6
SS		 4660 instance->msix_vectors = (scratch_pad_2
4661 & MR_MAX_REPLY_QUEUES_OFFSET) + 1;
4662 fw_msix_count = instance->msix_vectors;
079eaddf 4663 if (msix_vectors)
4664 instance->msix_vectors =
4665 min(msix_vectors,
4666 instance->msix_vectors);
d46a3ad6
SS		 4667 } else if ((instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER)
4668 || (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
4669 /* Invader/Fury supports more than 8 MSI-X */
4670 instance->msix_vectors = ((scratch_pad_2
4671 & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
4672 >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
4673 fw_msix_count = instance->msix_vectors;
4674 /* Save 1-15 reply post index address to local memory
4675 * Index 0 is already saved from reg offset
4676 * MPI2_REPLY_POST_HOST_INDEX_OFFSET
4677 */
4678 for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) {
4679 instance->reply_post_host_index_addr[loop] =
8a232bb3
CH		 4680 (u32 __iomem *)
4681 ((u8 __iomem *)instance->reg_set +
d46a3ad6
SS		 4682 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET
4683 + (loop * 0x10));
4684 }
4685 if (msix_vectors)
4686 instance->msix_vectors = min(msix_vectors,
4687 instance->msix_vectors);
c8e858fe 4688 } else
4689 instance->msix_vectors = 1;
4690 /* Don't bother allocating more MSI-X vectors than cpus */
4691 instance->msix_vectors = min(instance->msix_vectors,
4692 (unsigned int)num_online_cpus());
4693 for (i = 0; i < instance->msix_vectors; i++)
4694 instance->msixentry[i].entry = i;
8ae80ed1
AG		 4695 i = pci_enable_msix_range(instance->pdev, instance->msixentry,
4696 1, instance->msix_vectors);
c12de882 4697 if (i > 0)
8ae80ed1
AG		 4698 instance->msix_vectors = i;
4699 else
c8e858fe 4700 instance->msix_vectors = 0;
4701 }
3f1abce4 4702
258c3af2
TH		 4703 dev_info(&instance->pdev->dev,
4704 "firmware supports msix\t: (%d)", fw_msix_count);
4705 dev_info(&instance->pdev->dev,
4706 "current msix/online cpus\t: (%d/%d)\n",
4707 instance->msix_vectors, (unsigned int)num_online_cpus());
d3557fc8 4708
258c3af2
TH		 4709 if (instance->msix_vectors ?
4710 megasas_setup_irqs_msix(instance, 1) :
4711 megasas_setup_irqs_ioapic(instance))
4712 goto fail_setup_irqs;
3f1abce4 4713
51087a86
SS		 4714 instance->ctrl_info = kzalloc(sizeof(struct megasas_ctrl_info),
4715 GFP_KERNEL);
4716 if (instance->ctrl_info == NULL)
4717 goto fail_init_adapter;
4718
4719 /*
4720 * Below are default value for legacy Firmware.
4721 * non-fusion based controllers
4722 */
4723 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4724 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
cd50ba8e 4725 /* Get operational params, sge flags, send init cmd to controller */
4726 if (instance->instancet->init_adapter(instance))
eb1b1237 4727 goto fail_init_adapter;
cd50ba8e 4728
258c3af2
TH		 4729 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
4730 (unsigned long)instance);
4731
d3557fc8 4732 instance->instancet->enable_intr(instance);
cd50ba8e 4733
1be18254 4734 dev_err(&instance->pdev->dev, "INIT adapter done\n");
cd50ba8e 4735
3761cb4c 4736 megasas_setup_jbod_map(instance);
4737
39a98554 4738 /** for passthrough
da0dc9fb
BH		 4739 * the following function will get the PD LIST.
4740 */
4741 memset(instance->pd_list, 0,
81e403ce 4742 (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)));
58968fc8 4743 if (megasas_get_pd_list(instance) < 0) {
1be18254 4744 dev_err(&instance->pdev->dev, "failed to get PD list\n");
d3557fc8 4745 goto fail_get_pd_list;
58968fc8 4746 }
81e403ce 4747
bdc6fb8d 4748 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
21c9e160 4749 if (megasas_ld_list_query(instance,
4750 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
4751 megasas_get_ld_list(instance);
bdc6fb8d 4752
c4a3e0a5
BS		 4753 /*
4754 * Compute the max allowed sectors per IO: The controller info has two
4755 * limits on max sectors. Driver should use the minimum of these two.
4756 *
4757 * 1 << stripe_sz_ops.min = max sectors per strip
4758 *
4759 * Note that older firmwares ( < FW ver 30) didn't report information
4760 * to calculate max_sectors_1. So the number ended up as zero always.
4761 */
14faea9f 4762 tmp_sectors = 0;
51087a86 4763 ctrl_info = instance->ctrl_info;
c4a3e0a5 4764
51087a86
SS		 4765 max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) *
4766 le16_to_cpu(ctrl_info->max_strips_per_io);
4767 max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size);
404a8a1a 4768
da0dc9fb 4769 tmp_sectors = min_t(u32, max_sectors_1, max_sectors_2);
bc93d425 4770
51087a86
SS		 4771 instance->disableOnlineCtrlReset =
4772 ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset;
51087a86
SS		 4773 instance->mpio = ctrl_info->adapterOperations2.mpio;
4774 instance->UnevenSpanSupport =
4775 ctrl_info->adapterOperations2.supportUnevenSpans;
4776 if (instance->UnevenSpanSupport) {
4777 struct fusion_context *fusion = instance->ctrl_context;
51087a86
SS		 4778 if (MR_ValidateMapInfo(instance))
4779 fusion->fast_path_io = 1;
4780 else
4781 fusion->fast_path_io = 0;
fc62b3fc 4782
51087a86
SS		 4783 }
4784 if (ctrl_info->host_interface.SRIOV) {
4785 if (!ctrl_info->adapterOperations2.activePassive)
4786 instance->PlasmaFW111 = 1;
fc62b3fc 4787
51087a86
SS		 4788 if (!instance->PlasmaFW111)
4789 instance->requestorId =
4790 ctrl_info->iov.requestorId;
4791 else {
4792 iovPtr = (struct IOV_111 *)((unsigned char *)ctrl_info + IOV_111_OFFSET);
4793 instance->requestorId = iovPtr->requestorId;
fc62b3fc 4794 }
51087a86
SS		 4795 dev_warn(&instance->pdev->dev, "I am VF "
4796 "requestorId %d\n", instance->requestorId);
4797 }
4798
51087a86
SS		 4799 instance->crash_dump_fw_support =
4800 ctrl_info->adapterOperations3.supportCrashDump;
4801 instance->crash_dump_drv_support =
4802 (instance->crash_dump_fw_support &&
4803 instance->crash_dump_buf);
d88da09a 4804 if (instance->crash_dump_drv_support)
51087a86
SS		 4805 megasas_set_crash_dump_params(instance,
4806 MR_CRASH_BUF_TURN_OFF);
4807
d88da09a 4808 else {
51087a86
SS		 4809 if (instance->crash_dump_buf)
4810 pci_free_consistent(instance->pdev,
4811 CRASH_DMA_BUF_SIZE,
4812 instance->crash_dump_buf,
4813 instance->crash_dump_h);
4814 instance->crash_dump_buf = NULL;
14faea9f 4815 }
7497cde8
SS		 4816
4817 instance->secure_jbod_support =
4818 ctrl_info->adapterOperations3.supportSecurityonJBOD;
d88da09a
SS		 4819
4820 dev_info(&instance->pdev->dev,
4821 "pci id\t\t: (0x%04x)/(0x%04x)/(0x%04x)/(0x%04x)\n",
4822 le16_to_cpu(ctrl_info->pci.vendor_id),
4823 le16_to_cpu(ctrl_info->pci.device_id),
4824 le16_to_cpu(ctrl_info->pci.sub_vendor_id),
4825 le16_to_cpu(ctrl_info->pci.sub_device_id));
4826 dev_info(&instance->pdev->dev, "unevenspan support : %s\n",
4827 instance->UnevenSpanSupport ? "yes" : "no");
4828 dev_info(&instance->pdev->dev, "disable ocr : %s\n",
4829 instance->disableOnlineCtrlReset ? "yes" : "no");
4830 dev_info(&instance->pdev->dev, "firmware crash dump : %s\n",
4831 instance->crash_dump_drv_support ? "yes" : "no");
4832 dev_info(&instance->pdev->dev, "secure jbod : %s\n",
4833 instance->secure_jbod_support ? "yes" : "no");
3761cb4c 4834 dev_info(&instance->pdev->dev, "jbod sync map : %s\n",
4835 instance->use_seqnum_jbod_fp ? "yes" : "no");
d88da09a
SS		 4836
4837
14faea9f 4838 instance->max_sectors_per_req = instance->max_num_sge *
4839 PAGE_SIZE / 512;
4840 if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors))
4841 instance->max_sectors_per_req = tmp_sectors;
c4a3e0a5 4842
ae09a6c1
SS		 4843 /* Check for valid throttlequeuedepth module parameter */
4844 if (throttlequeuedepth &&
4845 throttlequeuedepth <= instance->max_scsi_cmds)
4846 instance->throttlequeuedepth = throttlequeuedepth;
4847 else
4848 instance->throttlequeuedepth =
4849 MEGASAS_THROTTLE_QUEUE_DEPTH;
4850
ad84db2e 4851
229fe47c 4852 /* Launch SR-IOV heartbeat timer */
4853 if (instance->requestorId) {
4854 if (!megasas_sriov_start_heartbeat(instance, 1))
4855 megasas_start_timer(instance,
4856 &instance->sriov_heartbeat_timer,
4857 megasas_sriov_heartbeat_handler,
4858 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
4859 else
4860 instance->skip_heartbeat_timer_del = 1;
4861 }
4862
c4a3e0a5
BS		 4863 return 0;
4864
d3557fc8
SS		 4865fail_get_pd_list:
4866 instance->instancet->disable_intr(instance);
eb1b1237 4867fail_init_adapter:
d3557fc8
SS		 4868 megasas_destroy_irqs(instance);
4869fail_setup_irqs:
4870 if (instance->msix_vectors)
4871 pci_disable_msix(instance->pdev);
4872 instance->msix_vectors = 0;
cd50ba8e 4873fail_ready_state:
51087a86
SS		 4874 kfree(instance->ctrl_info);
4875 instance->ctrl_info = NULL;
c4a3e0a5
BS		 4876 iounmap(instance->reg_set);
4877
4878 fail_ioremap:
b6d5d880 4879 pci_release_selected_regions(instance->pdev, instance->bar);
c4a3e0a5
BS		 4880
4881 return -EINVAL;
4882}
4883
4884/**
4885 * megasas_release_mfi - Reverses the FW initialization
4b63b286 4886 * @instance: Adapter soft state
c4a3e0a5
BS		 4887 */
4888static void megasas_release_mfi(struct megasas_instance *instance)
4889{
9c915a8c 4890 u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1);
c4a3e0a5 4891
9c915a8c 4892 if (instance->reply_queue)
4893 pci_free_consistent(instance->pdev, reply_q_sz,
c4a3e0a5
BS		 4894 instance->reply_queue, instance->reply_queue_h);
4895
4896 megasas_free_cmds(instance);
4897
4898 iounmap(instance->reg_set);
4899
b6d5d880 4900 pci_release_selected_regions(instance->pdev, instance->bar);
c4a3e0a5
BS		 4901}
4902
4903/**
4904 * megasas_get_seq_num - Gets latest event sequence numbers
4905 * @instance: Adapter soft state
4906 * @eli: FW event log sequence numbers information
4907 *
4908 * FW maintains a log of all events in a non-volatile area. Upper layers would
4909 * usually find out the latest sequence number of the events, the seq number at
4910 * the boot etc. They would "read" all the events below the latest seq number
4911 * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq
4912 * number), they would subsribe to AEN (asynchronous event notification) and
4913 * wait for the events to happen.
4914 */
4915static int
4916megasas_get_seq_num(struct megasas_instance *instance,
4917 struct megasas_evt_log_info *eli)
4918{
4919 struct megasas_cmd *cmd;
4920 struct megasas_dcmd_frame *dcmd;
4921 struct megasas_evt_log_info *el_info;
4922 dma_addr_t el_info_h = 0;
4923
4924 cmd = megasas_get_cmd(instance);
4925
4926 if (!cmd) {
4927 return -ENOMEM;
4928 }
4929
4930 dcmd = &cmd->frame->dcmd;
4931 el_info = pci_alloc_consistent(instance->pdev,
4932 sizeof(struct megasas_evt_log_info),
4933 &el_info_h);
4934
4935 if (!el_info) {
4936 megasas_return_cmd(instance, cmd);
4937 return -ENOMEM;
4938 }
4939
4940 memset(el_info, 0, sizeof(*el_info));
4941 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4942
4943 dcmd->cmd = MFI_CMD_DCMD;
4944 dcmd->cmd_status = 0x0;
4945 dcmd->sge_count = 1;
94cd65dd 4946 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4947 dcmd->timeout = 0;
780a3762 4948 dcmd->pad_0 = 0;
94cd65dd
SS		 4949 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info));
4950 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO);
4951 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(el_info_h);
4952 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_log_info));
c4a3e0a5 4953
cfbe7554
SS		 4954 if (megasas_issue_blocked_cmd(instance, cmd, 30))
4955 dev_err(&instance->pdev->dev, "Command timedout"
4956 "from %s\n", __func__);
4957 else {
4958 /*
4959 * Copy the data back into callers buffer
4960 */
48100b0e
CH		 4961 eli->newest_seq_num = el_info->newest_seq_num;
4962 eli->oldest_seq_num = el_info->oldest_seq_num;
4963 eli->clear_seq_num = el_info->clear_seq_num;
4964 eli->shutdown_seq_num = el_info->shutdown_seq_num;
4965 eli->boot_seq_num = el_info->boot_seq_num;
cfbe7554 4966 }
c4a3e0a5
BS		 4967
4968 pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info),
4969 el_info, el_info_h);
4970
4026e9aa 4971 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 4972
4973 return 0;
4974}
4975
4976/**
4977 * megasas_register_aen - Registers for asynchronous event notification
4978 * @instance: Adapter soft state
4979 * @seq_num: The starting sequence number
4980 * @class_locale: Class of the event
4981 *
4982 * This function subscribes for AEN for events beyond the @seq_num. It requests
4983 * to be notified if and only if the event is of type @class_locale
4984 */
4985static int
4986megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
4987 u32 class_locale_word)
4988{
4989 int ret_val;
4990 struct megasas_cmd *cmd;
4991 struct megasas_dcmd_frame *dcmd;
4992 union megasas_evt_class_locale curr_aen;
4993 union megasas_evt_class_locale prev_aen;
4994
4995 /*
4996 * If there an AEN pending already (aen_cmd), check if the
4997 * class_locale of that pending AEN is inclusive of the new
4998 * AEN request we currently have. If it is, then we don't have
4999 * to do anything. In other words, whichever events the current
5000 * AEN request is subscribing to, have already been subscribed
5001 * to.
5002 *
5003 * If the old_cmd is _not_ inclusive, then we have to abort
5004 * that command, form a class_locale that is superset of both
5005 * old and current and re-issue to the FW
5006 */
5007
5008 curr_aen.word = class_locale_word;
5009
5010 if (instance->aen_cmd) {
5011
a9555534
CH		 5012 prev_aen.word =
5013 le32_to_cpu(instance->aen_cmd->frame->dcmd.mbox.w[1]);
c4a3e0a5
BS		 5014
5015 /*
5016 * A class whose enum value is smaller is inclusive of all
5017 * higher values. If a PROGRESS (= -1) was previously
5018 * registered, then a new registration requests for higher
5019 * classes need not be sent to FW. They are automatically
5020 * included.
5021 *
5022 * Locale numbers don't have such hierarchy. They are bitmap
5023 * values
5024 */
5025 if ((prev_aen.members.class <= curr_aen.members.class) &&
3993a862 5026 !((prev_aen.members.locale & curr_aen.members.locale) ^
c4a3e0a5
BS		 5027 curr_aen.members.locale)) {
5028 /*
5029 * Previously issued event registration includes
5030 * current request. Nothing to do.
5031 */
5032 return 0;
5033 } else {
3993a862 5034 curr_aen.members.locale |= prev_aen.members.locale;
c4a3e0a5
BS		 5035
5036 if (prev_aen.members.class < curr_aen.members.class)
5037 curr_aen.members.class = prev_aen.members.class;
5038
5039 instance->aen_cmd->abort_aen = 1;
5040 ret_val = megasas_issue_blocked_abort_cmd(instance,
5041 instance->
cfbe7554 5042 aen_cmd, 30);
c4a3e0a5
BS		 5043
5044 if (ret_val) {
1be18254 5045 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to abort "
c4a3e0a5
BS		 5046 "previous AEN command\n");
5047 return ret_val;
5048 }
5049 }
5050 }
5051
5052 cmd = megasas_get_cmd(instance);
5053
5054 if (!cmd)
5055 return -ENOMEM;
5056
5057 dcmd = &cmd->frame->dcmd;
5058
5059 memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail));
5060
5061 /*
5062 * Prepare DCMD for aen registration
5063 */
5064 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5065
5066 dcmd->cmd = MFI_CMD_DCMD;
5067 dcmd->cmd_status = 0x0;
5068 dcmd->sge_count = 1;
94cd65dd 5069 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5070 dcmd->timeout = 0;
780a3762 5071 dcmd->pad_0 = 0;
94cd65dd
SS		 5072 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail));
5073 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT);
5074 dcmd->mbox.w[0] = cpu_to_le32(seq_num);
39a98554 5075 instance->last_seq_num = seq_num;
94cd65dd
SS		 5076 dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word);
5077 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->evt_detail_h);
5078 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_detail));
c4a3e0a5 5079
f4c9a131
YB		 5080 if (instance->aen_cmd != NULL) {
5081 megasas_return_cmd(instance, cmd);
5082 return 0;
5083 }
5084
c4a3e0a5
BS		 5085 /*
5086 * Store reference to the cmd used to register for AEN. When an
5087 * application wants us to register for AEN, we have to abort this
5088 * cmd and re-register with a new EVENT LOCALE supplied by that app
5089 */
5090 instance->aen_cmd = cmd;
5091
5092 /*
5093 * Issue the aen registration frame
5094 */
9c915a8c 5095 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS		 5096
5097 return 0;
5098}
5099
5100/**
5101 * megasas_start_aen - Subscribes to AEN during driver load time
5102 * @instance: Adapter soft state
5103 */
5104static int megasas_start_aen(struct megasas_instance *instance)
5105{
5106 struct megasas_evt_log_info eli;
5107 union megasas_evt_class_locale class_locale;
5108
5109 /*
5110 * Get the latest sequence number from FW
5111 */
5112 memset(&eli, 0, sizeof(eli));
5113
5114 if (megasas_get_seq_num(instance, &eli))
5115 return -1;
5116
5117 /*
5118 * Register AEN with FW for latest sequence number plus 1
5119 */
5120 class_locale.members.reserved = 0;
5121 class_locale.members.locale = MR_EVT_LOCALE_ALL;
5122 class_locale.members.class = MR_EVT_CLASS_DEBUG;
5123
94cd65dd 5124 return megasas_register_aen(instance,
48100b0e 5125 le32_to_cpu(eli.newest_seq_num) + 1,
94cd65dd 5126 class_locale.word);
c4a3e0a5
BS		 5127}
5128
5129/**
5130 * megasas_io_attach - Attaches this driver to SCSI mid-layer
5131 * @instance: Adapter soft state
5132 */
5133static int megasas_io_attach(struct megasas_instance *instance)
5134{
5135 struct Scsi_Host *host = instance->host;
da0dc9fb 5136 u32 error;
c4a3e0a5
BS		 5137
5138 /*
5139 * Export parameters required by SCSI mid-layer
5140 */
5141 host->irq = instance->pdev->irq;
5142 host->unique_id = instance->unique_id;
ae09a6c1 5143 host->can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS		 5144 host->this_id = instance->init_id;
5145 host->sg_tablesize = instance->max_num_sge;
42a8d2b3 5146
5147 if (instance->fw_support_ieee)
5148 instance->max_sectors_per_req = MEGASAS_MAX_SECTORS_IEEE;
5149
1fd10685
YB		 5150 /*
5151 * Check if the module parameter value for max_sectors can be used
5152 */
5153 if (max_sectors && max_sectors < instance->max_sectors_per_req)
5154 instance->max_sectors_per_req = max_sectors;
5155 else {
5156 if (max_sectors) {
5157 if (((instance->pdev->device ==
5158 PCI_DEVICE_ID_LSI_SAS1078GEN2) ||
5159 (instance->pdev->device ==
5160 PCI_DEVICE_ID_LSI_SAS0079GEN2)) &&
5161 (max_sectors <= MEGASAS_MAX_SECTORS)) {
5162 instance->max_sectors_per_req = max_sectors;
5163 } else {
1be18254 5164 dev_info(&instance->pdev->dev, "max_sectors should be > 0"
1fd10685
YB		 5165 "and <= %d (or < 1MB for GEN2 controller)\n",
5166 instance->max_sectors_per_req);
5167 }
5168 }
5169 }
5170
c4a3e0a5 5171 host->max_sectors = instance->max_sectors_per_req;
9c915a8c 5172 host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN;
c4a3e0a5
BS		 5173 host->max_channel = MEGASAS_MAX_CHANNELS - 1;
5174 host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL;
5175 host->max_lun = MEGASAS_MAX_LUN;
122da302 5176 host->max_cmd_len = 16;
c4a3e0a5 5177
9c915a8c 5178 /* Fusion only supports host reset */
36807e67 5179 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 5180 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
21d3c710
SS		 5181 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
5182 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
9c915a8c 5183 host->hostt->eh_device_reset_handler = NULL;
5184 host->hostt->eh_bus_reset_handler = NULL;
5185 }
4026e9aa
SS		 5186 error = scsi_init_shared_tag_map(host, host->can_queue);
5187 if (error) {
5188 dev_err(&instance->pdev->dev,
5189 "Failed to shared tag from %s %d\n",
5190 __func__, __LINE__);
5191 return -ENODEV;
5192 }
9c915a8c 5193
c4a3e0a5
BS		 5194 /*
5195 * Notify the mid-layer about the new controller
5196 */
5197 if (scsi_add_host(host, &instance->pdev->dev)) {
4026e9aa
SS		 5198 dev_err(&instance->pdev->dev,
5199 "Failed to add host from %s %d\n",
5200 __func__, __LINE__);
c4a3e0a5
BS		 5201 return -ENODEV;
5202 }
5203
c4a3e0a5
BS		 5204 return 0;
5205}
5206
31ea7088 5207static int
5208megasas_set_dma_mask(struct pci_dev *pdev)
5209{
5210 /*
da0dc9fb 5211 * All our controllers are capable of performing 64-bit DMA
31ea7088 5212 */
5213 if (IS_DMA64) {
6a35528a 5214 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
31ea7088 5215
284901a9 5216 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5217 goto fail_set_dma_mask;
5218 }
5219 } else {
284901a9 5220 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5221 goto fail_set_dma_mask;
5222 }
46de63e2
SS		 5223 /*
5224 * Ensure that all data structures are allocated in 32-bit
5225 * memory.
5226 */
5227 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
5228 /* Try 32bit DMA mask and 32 bit Consistent dma mask */
5229 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
5230 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
5231 dev_info(&pdev->dev, "set 32bit DMA mask"
5232 "and 32 bit consistent mask\n");
5233 else
5234 goto fail_set_dma_mask;
5235 }
94cd65dd 5236
31ea7088 5237 return 0;
5238
5239fail_set_dma_mask:
5240 return 1;
5241}
5242
c4a3e0a5
BS		 5243/**
5244 * megasas_probe_one - PCI hotplug entry point
5245 * @pdev: PCI device structure
0d49016b 5246 * @id: PCI ids of supported hotplugged adapter
c4a3e0a5 5247 */
6f039790
GKH		 5248static int megasas_probe_one(struct pci_dev *pdev,
5249 const struct pci_device_id *id)
c4a3e0a5 5250{
d3557fc8 5251 int rval, pos;
c4a3e0a5
BS		 5252 struct Scsi_Host *host;
5253 struct megasas_instance *instance;
66192dfe 5254 u16 control = 0;
51087a86 5255 struct fusion_context *fusion = NULL;
66192dfe 5256
5257 /* Reset MSI-X in the kdump kernel */
5258 if (reset_devices) {
5259 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
5260 if (pos) {
99369065 5261 pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS,
66192dfe 5262 &control);
5263 if (control & PCI_MSIX_FLAGS_ENABLE) {
5264 dev_info(&pdev->dev, "resetting MSI-X\n");
5265 pci_write_config_word(pdev,
99369065 5266 pos + PCI_MSIX_FLAGS,
66192dfe 5267 control &
5268 ~PCI_MSIX_FLAGS_ENABLE);
5269 }
5270 }
5271 }
c4a3e0a5 5272
c4a3e0a5
BS		 5273 /*
5274 * PCI prepping: enable device set bus mastering and dma mask
5275 */
aeab3fd7 5276 rval = pci_enable_device_mem(pdev);
c4a3e0a5
BS		 5277
5278 if (rval) {
5279 return rval;
5280 }
5281
5282 pci_set_master(pdev);
5283
31ea7088 5284 if (megasas_set_dma_mask(pdev))
5285 goto fail_set_dma_mask;
c4a3e0a5
BS		 5286
5287 host = scsi_host_alloc(&megasas_template,
5288 sizeof(struct megasas_instance));
5289
5290 if (!host) {
1be18254 5291 dev_printk(KERN_DEBUG, &pdev->dev, "scsi_host_alloc failed\n");
c4a3e0a5
BS		 5292 goto fail_alloc_instance;
5293 }
5294
5295 instance = (struct megasas_instance *)host->hostdata;
5296 memset(instance, 0, sizeof(*instance));
da0dc9fb 5297 atomic_set(&instance->fw_reset_no_pci_access, 0);
9c915a8c 5298 instance->pdev = pdev;
c4a3e0a5 5299
9c915a8c 5300 switch (instance->pdev->device) {
5301 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5302 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5303 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5304 case PCI_DEVICE_ID_LSI_FURY:
9c915a8c 5305 {
51087a86
SS		 5306 instance->ctrl_context_pages =
5307 get_order(sizeof(struct fusion_context));
5308 instance->ctrl_context = (void *)__get_free_pages(GFP_KERNEL,
5309 instance->ctrl_context_pages);
9c915a8c 5310 if (!instance->ctrl_context) {
1be18254 5311 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate "
9c915a8c 5312 "memory for Fusion context info\n");
5313 goto fail_alloc_dma_buf;
5314 }
5315 fusion = instance->ctrl_context;
d009b576
SS		 5316 memset(fusion, 0,
5317 ((1 << PAGE_SHIFT) << instance->ctrl_context_pages));
9c915a8c 5318 }
5319 break;
5320 default: /* For all other supported controllers */
5321
5322 instance->producer =
5323 pci_alloc_consistent(pdev, sizeof(u32),
5324 &instance->producer_h);
5325 instance->consumer =
5326 pci_alloc_consistent(pdev, sizeof(u32),
5327 &instance->consumer_h);
5328
5329 if (!instance->producer || !instance->consumer) {
1be18254 5330 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate"
9c915a8c 5331 "memory for producer, consumer\n");
5332 goto fail_alloc_dma_buf;
5333 }
c4a3e0a5 5334
9c915a8c 5335 *instance->producer = 0;
5336 *instance->consumer = 0;
5337 break;
c4a3e0a5
BS		 5338 }
5339
5765c5b8
SS		 5340 instance->system_info_buf = pci_zalloc_consistent(pdev,
5341 sizeof(struct MR_DRV_SYSTEM_INFO),
5342 &instance->system_info_h);
5343
5344 if (!instance->system_info_buf)
5345 dev_info(&instance->pdev->dev, "Can't allocate system info buffer\n");
5346
fc62b3fc
SS		 5347 /* Crash dump feature related initialisation*/
5348 instance->drv_buf_index = 0;
5349 instance->drv_buf_alloc = 0;
5350 instance->crash_dump_fw_support = 0;
5351 instance->crash_dump_app_support = 0;
5352 instance->fw_crash_state = UNAVAILABLE;
5353 spin_lock_init(&instance->crashdump_lock);
5354 instance->crash_dump_buf = NULL;
5355
5356 if (!reset_devices)
5357 instance->crash_dump_buf = pci_alloc_consistent(pdev,
5358 CRASH_DMA_BUF_SIZE,
5359 &instance->crash_dump_h);
5360 if (!instance->crash_dump_buf)
1be18254 5361 dev_err(&pdev->dev, "Can't allocate Firmware "
fc62b3fc
SS		 5362 "crash dump DMA buffer\n");
5363
c3518837 5364 megasas_poll_wait_aen = 0;
f4c9a131 5365 instance->flag_ieee = 0;
7e8a75f4 5366 instance->ev = NULL;
39a98554 5367 instance->issuepend_done = 1;
5368 instance->adprecovery = MEGASAS_HBA_OPERATIONAL;
404a8a1a 5369 instance->is_imr = 0;
c4a3e0a5
BS		 5370
5371 instance->evt_detail = pci_alloc_consistent(pdev,
5372 sizeof(struct
5373 megasas_evt_detail),
5374 &instance->evt_detail_h);
5375
5376 if (!instance->evt_detail) {
1be18254 5377 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate memory for "
c4a3e0a5
BS		 5378 "event detail structure\n");
5379 goto fail_alloc_dma_buf;
5380 }
5381
5382 /*
5383 * Initialize locks and queues
5384 */
5385 INIT_LIST_HEAD(&instance->cmd_pool);
39a98554 5386 INIT_LIST_HEAD(&instance->internal_reset_pending_q);
c4a3e0a5 5387
e4a082c7
SP		 5388 atomic_set(&instance->fw_outstanding,0);
5389
c4a3e0a5
BS		 5390 init_waitqueue_head(&instance->int_cmd_wait_q);
5391 init_waitqueue_head(&instance->abort_cmd_wait_q);
5392
90dc9d98 5393 spin_lock_init(&instance->mfi_pool_lock);
39a98554 5394 spin_lock_init(&instance->hba_lock);
7343eb65 5395 spin_lock_init(&instance->completion_lock);
c4a3e0a5 5396
e5a69e27 5397 mutex_init(&instance->aen_mutex);
9c915a8c 5398 mutex_init(&instance->reset_mutex);
c4a3e0a5
BS		 5399
5400 /*
5401 * Initialize PCI related and misc parameters
5402 */
c4a3e0a5
BS		 5403 instance->host = host;
5404 instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
5405 instance->init_id = MEGASAS_DEFAULT_INIT_ID;
51087a86 5406 instance->ctrl_info = NULL;
c4a3e0a5 5407
ae09a6c1 5408
7bebf5c7 5409 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
ae09a6c1 5410 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY))
f4c9a131 5411 instance->flag_ieee = 1;
7bebf5c7 5412
658dcedb 5413 megasas_dbg_lvl = 0;
05e9ebbe 5414 instance->flag = 0;
0c79e681 5415 instance->unload = 1;
05e9ebbe 5416 instance->last_time = 0;
39a98554 5417 instance->disableOnlineCtrlReset = 1;
bc93d425 5418 instance->UnevenSpanSupport = 0;
39a98554 5419
36807e67 5420 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 5421 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
21d3c710 5422 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
fc62b3fc 5423 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY)) {
9c915a8c 5424 INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq);
fc62b3fc
SS		 5425 INIT_WORK(&instance->crash_init, megasas_fusion_crash_dump_wq);
5426 } else
9c915a8c 5427 INIT_WORK(&instance->work_init, process_fw_state_change_wq);
658dcedb 5428
0a77066a 5429 /*
5430 * Initialize MFI Firmware
5431 */
5432 if (megasas_init_fw(instance))
5433 goto fail_init_mfi;
5434
229fe47c 5435 if (instance->requestorId) {
5436 if (instance->PlasmaFW111) {
5437 instance->vf_affiliation_111 =
5438 pci_alloc_consistent(pdev, sizeof(struct MR_LD_VF_AFFILIATION_111),
5439 &instance->vf_affiliation_111_h);
5440 if (!instance->vf_affiliation_111)
1be18254 5441 dev_warn(&pdev->dev, "Can't allocate "
229fe47c 5442 "memory for VF affiliation buffer\n");
5443 } else {
5444 instance->vf_affiliation =
5445 pci_alloc_consistent(pdev,
5446 (MAX_LOGICAL_DRIVES + 1) *
5447 sizeof(struct MR_LD_VF_AFFILIATION),
5448 &instance->vf_affiliation_h);
5449 if (!instance->vf_affiliation)
1be18254 5450 dev_warn(&pdev->dev, "Can't allocate "
229fe47c 5451 "memory for VF affiliation buffer\n");
5452 }
5453 }
5454
c4a3e0a5
BS		 5455 /*
5456 * Store instance in PCI softstate
5457 */
5458 pci_set_drvdata(pdev, instance);
5459
5460 /*
5461 * Add this controller to megasas_mgmt_info structure so that it
5462 * can be exported to management applications
5463 */
5464 megasas_mgmt_info.count++;
5465 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance;
5466 megasas_mgmt_info.max_index++;
5467
541f90b7 5468 /*
5469 * Register with SCSI mid-layer
5470 */
5471 if (megasas_io_attach(instance))
5472 goto fail_io_attach;
5473
5474 instance->unload = 0;
aa00832b
SS		 5475 /*
5476 * Trigger SCSI to scan our drives
5477 */
5478 scsi_scan_host(host);
541f90b7 5479
c4a3e0a5
BS		 5480 /*
5481 * Initiate AEN (Asynchronous Event Notification)
5482 */
5483 if (megasas_start_aen(instance)) {
1be18254 5484 dev_printk(KERN_DEBUG, &pdev->dev, "start aen failed\n");
c4a3e0a5
BS		 5485 goto fail_start_aen;
5486 }
5487
9ea81f81
AR		 5488 /* Get current SR-IOV LD/VF affiliation */
5489 if (instance->requestorId)
5490 megasas_get_ld_vf_affiliation(instance, 1);
5491
c4a3e0a5
BS		 5492 return 0;
5493
da0dc9fb
BH		 5494fail_start_aen:
5495fail_io_attach:
c4a3e0a5
BS		 5496 megasas_mgmt_info.count--;
5497 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL;
5498 megasas_mgmt_info.max_index--;
5499
d46a3ad6 5500 instance->instancet->disable_intr(instance);
d3557fc8
SS		 5501 megasas_destroy_irqs(instance);
5502
36807e67 5503 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
229fe47c 5504 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) ||
21d3c710
SS		 5505 (instance->pdev->device == PCI_DEVICE_ID_LSI_INVADER) ||
5506 (instance->pdev->device == PCI_DEVICE_ID_LSI_FURY))
eb1b1237 5507 megasas_release_fusion(instance);
5508 else
5509 megasas_release_mfi(instance);
c8e858fe 5510 if (instance->msix_vectors)
0a77066a 5511 pci_disable_msix(instance->pdev);
d3557fc8 5512fail_init_mfi:
da0dc9fb 5513fail_alloc_dma_buf:
c4a3e0a5
BS		 5514 if (instance->evt_detail)
5515 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5516 instance->evt_detail,
5517 instance->evt_detail_h);
5518
eb1b1237 5519 if (instance->producer)
c4a3e0a5
BS		 5520 pci_free_consistent(pdev, sizeof(u32), instance->producer,
5521 instance->producer_h);
5522 if (instance->consumer)
5523 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
5524 instance->consumer_h);
5525 scsi_host_put(host);
5526
da0dc9fb
BH		 5527fail_alloc_instance:
5528fail_set_dma_mask:
c4a3e0a5
BS		 5529 pci_disable_device(pdev);
5530
5531 return -ENODEV;
5532}
5533
5534/**
5535 * megasas_flush_cache - Requests FW to flush all its caches
5536 * @instance: Adapter soft state
5537 */
5538static void megasas_flush_cache(struct megasas_instance *instance)
5539{
5540 struct megasas_cmd *cmd;
5541 struct megasas_dcmd_frame *dcmd;
5542
39a98554 5543 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR)
5544 return;
5545
c4a3e0a5
BS		 5546 cmd = megasas_get_cmd(instance);
5547
5548 if (!cmd)
5549 return;
5550
5551 dcmd = &cmd->frame->dcmd;
5552
5553 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5554
5555 dcmd->cmd = MFI_CMD_DCMD;
5556 dcmd->cmd_status = 0x0;
5557 dcmd->sge_count = 0;
94cd65dd 5558 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 5559 dcmd->timeout = 0;
780a3762 5560 dcmd->pad_0 = 0;
c4a3e0a5 5561 dcmd->data_xfer_len = 0;
94cd65dd 5562 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH);
c4a3e0a5
BS		 5563 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
5564
cfbe7554
SS		 5565 if (megasas_issue_blocked_cmd(instance, cmd, 30))
5566 dev_err(&instance->pdev->dev, "Command timedout"
5567 " from %s\n", __func__);
c4a3e0a5 5568
4026e9aa 5569 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 5570}
5571
5572/**
5573 * megasas_shutdown_controller - Instructs FW to shutdown the controller
5574 * @instance: Adapter soft state
31ea7088 5575 * @opcode: Shutdown/Hibernate
c4a3e0a5 5576 */
31ea7088 5577static void megasas_shutdown_controller(struct megasas_instance *instance,
5578 u32 opcode)
c4a3e0a5
BS		 5579{
5580 struct megasas_cmd *cmd;
5581 struct megasas_dcmd_frame *dcmd;
5582
39a98554 5583 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR)
5584 return;
5585
c4a3e0a5
BS		 5586 cmd = megasas_get_cmd(instance);
5587
5588 if (!cmd)
5589 return;
5590
5591 if (instance->aen_cmd)
cfbe7554 5592 megasas_issue_blocked_abort_cmd(instance,
e0bd0874 5593 instance->aen_cmd, MEGASAS_BLOCKED_CMD_TIMEOUT);
9c915a8c 5594 if (instance->map_update_cmd)
5595 megasas_issue_blocked_abort_cmd(instance,
e0bd0874 5596 instance->map_update_cmd, MEGASAS_BLOCKED_CMD_TIMEOUT);
3761cb4c 5597 if (instance->jbod_seq_cmd)
5598 megasas_issue_blocked_abort_cmd(instance,
5599 instance->jbod_seq_cmd, MEGASAS_BLOCKED_CMD_TIMEOUT);
5600
c4a3e0a5
BS		 5601 dcmd = &cmd->frame->dcmd;
5602
5603 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5604
5605 dcmd->cmd = MFI_CMD_DCMD;
5606 dcmd->cmd_status = 0x0;
5607 dcmd->sge_count = 0;
94cd65dd 5608 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 5609 dcmd->timeout = 0;
780a3762 5610 dcmd->pad_0 = 0;
c4a3e0a5 5611 dcmd->data_xfer_len = 0;
94cd65dd 5612 dcmd->opcode = cpu_to_le32(opcode);
c4a3e0a5 5613
cfbe7554
SS		 5614 if (megasas_issue_blocked_cmd(instance, cmd, 30))
5615 dev_err(&instance->pdev->dev, "Command timedout"
5616 "from %s\n", __func__);
c4a3e0a5 5617
4026e9aa 5618 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 5619}
5620
33139b21 5621#ifdef CONFIG_PM
31ea7088 5622/**
ad84db2e 5623 * megasas_suspend - driver suspend entry point
5624 * @pdev: PCI device structure
31ea7088 5625 * @state: PCI power state to suspend routine
5626 */
33139b21 5627static int
31ea7088 5628megasas_suspend(struct pci_dev *pdev, pm_message_t state)
5629{
5630 struct Scsi_Host *host;
5631 struct megasas_instance *instance;
5632
5633 instance = pci_get_drvdata(pdev);
5634 host = instance->host;
0c79e681 5635 instance->unload = 1;
31ea7088 5636
229fe47c 5637 /* Shutdown SR-IOV heartbeat timer */
5638 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
5639 del_timer_sync(&instance->sriov_heartbeat_timer);
5640
31ea7088 5641 megasas_flush_cache(instance);
5642 megasas_shutdown_controller(instance, MR_DCMD_HIBERNATE_SHUTDOWN);
7e8a75f4
YB		 5643
5644 /* cancel the delayed work if this work still in queue */
5645 if (instance->ev != NULL) {
5646 struct megasas_aen_event *ev = instance->ev;
c1d390d8 5647 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 5648 instance->ev = NULL;
5649 }
5650
31ea7088 5651 tasklet_kill(&instance->isr_tasklet);
5652
5653 pci_set_drvdata(instance->pdev, instance);
d46a3ad6 5654 instance->instancet->disable_intr(instance);
c8e858fe 5655
d3557fc8
SS		 5656 megasas_destroy_irqs(instance);
5657
c8e858fe 5658 if (instance->msix_vectors)
80d9da98 5659 pci_disable_msix(instance->pdev);
31ea7088 5660
5661 pci_save_state(pdev);
5662 pci_disable_device(pdev);
5663
5664 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5665
5666 return 0;
5667}
5668
5669/**
5670 * megasas_resume- driver resume entry point
5671 * @pdev: PCI device structure
5672 */
33139b21 5673static int
31ea7088 5674megasas_resume(struct pci_dev *pdev)
5675{
d3557fc8 5676 int rval;
31ea7088 5677 struct Scsi_Host *host;
5678 struct megasas_instance *instance;
5679
5680 instance = pci_get_drvdata(pdev);
5681 host = instance->host;
5682 pci_set_power_state(pdev, PCI_D0);
5683 pci_enable_wake(pdev, PCI_D0, 0);
5684 pci_restore_state(pdev);
5685
5686 /*
5687 * PCI prepping: enable device set bus mastering and dma mask
5688 */
aeab3fd7 5689 rval = pci_enable_device_mem(pdev);
31ea7088 5690
5691 if (rval) {
1be18254 5692 dev_err(&pdev->dev, "Enable device failed\n");
31ea7088 5693 return rval;
5694 }
5695
5696 pci_set_master(pdev);
5697
5698 if (megasas_set_dma_mask(pdev))
5699 goto fail_set_dma_mask;
5700
5701 /*
5702 * Initialize MFI Firmware
5703 */
5704
31ea7088 5705 atomic_set(&instance->fw_outstanding, 0);
5706
5707 /*
5708 * We expect the FW state to be READY
5709 */
058a8fac 5710 if (megasas_transition_to_ready(instance, 0))
31ea7088 5711 goto fail_ready_state;
5712
3f1abce4 5713 /* Now re-enable MSI-X */
dd088128 5714 if (instance->msix_vectors &&
8ae80ed1
AG		 5715 pci_enable_msix_exact(instance->pdev, instance->msixentry,
5716 instance->msix_vectors))
dd088128 5717 goto fail_reenable_msix;
3f1abce4 5718
9c915a8c 5719 switch (instance->pdev->device) {
5720 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5721 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5722 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5723 case PCI_DEVICE_ID_LSI_FURY:
9c915a8c 5724 {
5725 megasas_reset_reply_desc(instance);
5726 if (megasas_ioc_init_fusion(instance)) {
5727 megasas_free_cmds(instance);
5728 megasas_free_cmds_fusion(instance);
5729 goto fail_init_mfi;
5730 }
5731 if (!megasas_get_map_info(instance))
5732 megasas_sync_map_info(instance);
5733 }
5734 break;
5735 default:
5736 *instance->producer = 0;
5737 *instance->consumer = 0;
5738 if (megasas_issue_init_mfi(instance))
5739 goto fail_init_mfi;
5740 break;
5741 }
31ea7088 5742
9c915a8c 5743 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
5744 (unsigned long)instance);
31ea7088 5745
d3557fc8
SS		 5746 if (instance->msix_vectors ?
5747 megasas_setup_irqs_msix(instance, 0) :
5748 megasas_setup_irqs_ioapic(instance))
5749 goto fail_init_mfi;
31ea7088 5750
229fe47c 5751 /* Re-launch SR-IOV heartbeat timer */
5752 if (instance->requestorId) {
5753 if (!megasas_sriov_start_heartbeat(instance, 0))
5754 megasas_start_timer(instance,
5755 &instance->sriov_heartbeat_timer,
5756 megasas_sriov_heartbeat_handler,
5757 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5765c5b8 5758 else {
229fe47c 5759 instance->skip_heartbeat_timer_del = 1;
5765c5b8
SS		 5760 goto fail_init_mfi;
5761 }
229fe47c 5762 }
5763
d46a3ad6 5764 instance->instancet->enable_intr(instance);
3761cb4c 5765 megasas_setup_jbod_map(instance);
0c79e681
YB		 5766 instance->unload = 0;
5767
541f90b7 5768 /*
5769 * Initiate AEN (Asynchronous Event Notification)
5770 */
5771 if (megasas_start_aen(instance))
1be18254 5772 dev_err(&instance->pdev->dev, "Start AEN failed\n");
541f90b7 5773
31ea7088 5774 return 0;
5775
31ea7088 5776fail_init_mfi:
5777 if (instance->evt_detail)
5778 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5779 instance->evt_detail,
5780 instance->evt_detail_h);
5781
5782 if (instance->producer)
5783 pci_free_consistent(pdev, sizeof(u32), instance->producer,
5784 instance->producer_h);
5785 if (instance->consumer)
5786 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
5787 instance->consumer_h);
5788 scsi_host_put(host);
5789
5790fail_set_dma_mask:
5791fail_ready_state:
dd088128 5792fail_reenable_msix:
31ea7088 5793
5794 pci_disable_device(pdev);
5795
5796 return -ENODEV;
5797}
33139b21
JS		 5798#else
5799#define megasas_suspend NULL
5800#define megasas_resume NULL
5801#endif
31ea7088 5802
c4a3e0a5
BS		 5803/**
5804 * megasas_detach_one - PCI hot"un"plug entry point
5805 * @pdev: PCI device structure
5806 */
6f039790 5807static void megasas_detach_one(struct pci_dev *pdev)
c4a3e0a5
BS		 5808{
5809 int i;
5810 struct Scsi_Host *host;
5811 struct megasas_instance *instance;
9c915a8c 5812 struct fusion_context *fusion;
3761cb4c 5813 u32 pd_seq_map_sz;
c4a3e0a5
BS		 5814
5815 instance = pci_get_drvdata(pdev);
c3518837 5816 instance->unload = 1;
c4a3e0a5 5817 host = instance->host;
9c915a8c 5818 fusion = instance->ctrl_context;
c4a3e0a5 5819
229fe47c 5820 /* Shutdown SR-IOV heartbeat timer */
5821 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
5822 del_timer_sync(&instance->sriov_heartbeat_timer);
5823
fc62b3fc
SS		 5824 if (instance->fw_crash_state != UNAVAILABLE)
5825 megasas_free_host_crash_buffer(instance);
c4a3e0a5
BS		 5826 scsi_remove_host(instance->host);
5827 megasas_flush_cache(instance);
31ea7088 5828 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
7e8a75f4
YB		 5829
5830 /* cancel the delayed work if this work still in queue*/
5831 if (instance->ev != NULL) {
5832 struct megasas_aen_event *ev = instance->ev;
c1d390d8 5833 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 5834 instance->ev = NULL;
5835 }
5836
cfbe7554
SS		 5837 /* cancel all wait events */
5838 wake_up_all(&instance->int_cmd_wait_q);
5839
5d018ad0 5840 tasklet_kill(&instance->isr_tasklet);
c4a3e0a5
BS		 5841
5842 /*
5843 * Take the instance off the instance array. Note that we will not
5844 * decrement the max_index. We let this array be sparse array
5845 */
5846 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
5847 if (megasas_mgmt_info.instance[i] == instance) {
5848 megasas_mgmt_info.count--;
5849 megasas_mgmt_info.instance[i] = NULL;
5850
5851 break;
5852 }
5853 }
5854
d46a3ad6 5855 instance->instancet->disable_intr(instance);
c4a3e0a5 5856
d3557fc8
SS		 5857 megasas_destroy_irqs(instance);
5858
c8e858fe 5859 if (instance->msix_vectors)
80d9da98 5860 pci_disable_msix(instance->pdev);
c4a3e0a5 5861
9c915a8c 5862 switch (instance->pdev->device) {
5863 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5864 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5865 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5866 case PCI_DEVICE_ID_LSI_FURY:
9c915a8c 5867 megasas_release_fusion(instance);
3761cb4c 5868 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
5869 (sizeof(struct MR_PD_CFG_SEQ) *
5870 (MAX_PHYSICAL_DEVICES - 1));
51087a86 5871 for (i = 0; i < 2 ; i++) {
9c915a8c 5872 if (fusion->ld_map[i])
5873 dma_free_coherent(&instance->pdev->dev,
51087a86 5874 fusion->max_map_sz,
9c915a8c 5875 fusion->ld_map[i],
51087a86
SS		 5876 fusion->ld_map_phys[i]);
5877 if (fusion->ld_drv_map[i])
5878 free_pages((ulong)fusion->ld_drv_map[i],
5879 fusion->drv_map_pages);
3761cb4c 5880 if (fusion->pd_seq_sync)
5881 dma_free_coherent(&instance->pdev->dev,
5882 pd_seq_map_sz,
5883 fusion->pd_seq_sync[i],
5884 fusion->pd_seq_phys[i]);
51087a86
SS		 5885 }
5886 free_pages((ulong)instance->ctrl_context,
5887 instance->ctrl_context_pages);
9c915a8c 5888 break;
5889 default:
5890 megasas_release_mfi(instance);
9c915a8c 5891 pci_free_consistent(pdev, sizeof(u32),
5892 instance->producer,
5893 instance->producer_h);
5894 pci_free_consistent(pdev, sizeof(u32),
5895 instance->consumer,
5896 instance->consumer_h);
5897 break;
5898 }
c4a3e0a5 5899
51087a86
SS		 5900 kfree(instance->ctrl_info);
5901
105900d5
SS		 5902 if (instance->evt_detail)
5903 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5904 instance->evt_detail, instance->evt_detail_h);
229fe47c 5905
5906 if (instance->vf_affiliation)
5907 pci_free_consistent(pdev, (MAX_LOGICAL_DRIVES + 1) *
5908 sizeof(struct MR_LD_VF_AFFILIATION),
5909 instance->vf_affiliation,
5910 instance->vf_affiliation_h);
5911
5912 if (instance->vf_affiliation_111)
5913 pci_free_consistent(pdev,
5914 sizeof(struct MR_LD_VF_AFFILIATION_111),
5915 instance->vf_affiliation_111,
5916 instance->vf_affiliation_111_h);
5917
5918 if (instance->hb_host_mem)
5919 pci_free_consistent(pdev, sizeof(struct MR_CTRL_HB_HOST_MEM),
5920 instance->hb_host_mem,
5921 instance->hb_host_mem_h);
5922
fc62b3fc
SS		 5923 if (instance->crash_dump_buf)
5924 pci_free_consistent(pdev, CRASH_DMA_BUF_SIZE,
5925 instance->crash_dump_buf, instance->crash_dump_h);
5926
5765c5b8
SS		 5927 if (instance->system_info_buf)
5928 pci_free_consistent(pdev, sizeof(struct MR_DRV_SYSTEM_INFO),
5929 instance->system_info_buf, instance->system_info_h);
5930
c4a3e0a5
BS		 5931 scsi_host_put(host);
5932
c4a3e0a5 5933 pci_disable_device(pdev);
c4a3e0a5
BS		 5934}
5935
5936/**
5937 * megasas_shutdown - Shutdown entry point
5938 * @device: Generic device structure
5939 */
5940static void megasas_shutdown(struct pci_dev *pdev)
5941{
5942 struct megasas_instance *instance = pci_get_drvdata(pdev);
c8e858fe 5943
0c79e681 5944 instance->unload = 1;
c4a3e0a5 5945 megasas_flush_cache(instance);
530e6fc1 5946 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
d46a3ad6 5947 instance->instancet->disable_intr(instance);
d3557fc8
SS		 5948 megasas_destroy_irqs(instance);
5949
c8e858fe 5950 if (instance->msix_vectors)
46fd256e 5951 pci_disable_msix(instance->pdev);
c4a3e0a5
BS		 5952}
5953
5954/**
5955 * megasas_mgmt_open - char node "open" entry point
5956 */
5957static int megasas_mgmt_open(struct inode *inode, struct file *filep)
5958{
5959 /*
5960 * Allow only those users with admin rights
5961 */
5962 if (!capable(CAP_SYS_ADMIN))
5963 return -EACCES;
5964
5965 return 0;
5966}
5967
c4a3e0a5
BS		 5968/**
5969 * megasas_mgmt_fasync - Async notifier registration from applications
5970 *
5971 * This function adds the calling process to a driver global queue. When an
5972 * event occurs, SIGIO will be sent to all processes in this queue.
5973 */
5974static int megasas_mgmt_fasync(int fd, struct file *filep, int mode)
5975{
5976 int rc;
5977
0b950672 5978 mutex_lock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 5979
5980 rc = fasync_helper(fd, filep, mode, &megasas_async_queue);
5981
0b950672 5982 mutex_unlock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 5983
5984 if (rc >= 0) {
5985 /* For sanity check when we get ioctl */
5986 filep->private_data = filep;
5987 return 0;
5988 }
5989
5990 printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc);
5991
5992 return rc;
5993}
5994
c3518837
YB		 5995/**
5996 * megasas_mgmt_poll - char node "poll" entry point
5997 * */
5998static unsigned int megasas_mgmt_poll(struct file *file, poll_table *wait)
5999{
6000 unsigned int mask;
6001 unsigned long flags;
da0dc9fb 6002
c3518837
YB		 6003 poll_wait(file, &megasas_poll_wait, wait);
6004 spin_lock_irqsave(&poll_aen_lock, flags);
6005 if (megasas_poll_wait_aen)
da0dc9fb 6006 mask = (POLLIN | POLLRDNORM);
c3518837
YB		 6007 else
6008 mask = 0;
51087a86 6009 megasas_poll_wait_aen = 0;
c3518837
YB		 6010 spin_unlock_irqrestore(&poll_aen_lock, flags);
6011 return mask;
6012}
6013
fc62b3fc
SS		 6014/*
6015 * megasas_set_crash_dump_params_ioctl:
6016 * Send CRASH_DUMP_MODE DCMD to all controllers
6017 * @cmd: MFI command frame
6018 */
6019
da0dc9fb 6020static int megasas_set_crash_dump_params_ioctl(struct megasas_cmd *cmd)
fc62b3fc
SS		 6021{
6022 struct megasas_instance *local_instance;
6023 int i, error = 0;
6024 int crash_support;
6025
6026 crash_support = cmd->frame->dcmd.mbox.w[0];
6027
6028 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6029 local_instance = megasas_mgmt_info.instance[i];
6030 if (local_instance && local_instance->crash_dump_drv_support) {
6031 if ((local_instance->adprecovery ==
6032 MEGASAS_HBA_OPERATIONAL) &&
6033 !megasas_set_crash_dump_params(local_instance,
6034 crash_support)) {
6035 local_instance->crash_dump_app_support =
6036 crash_support;
6037 dev_info(&local_instance->pdev->dev,
6038 "Application firmware crash "
6039 "dump mode set success\n");
6040 error = 0;
6041 } else {
6042 dev_info(&local_instance->pdev->dev,
6043 "Application firmware crash "
6044 "dump mode set failed\n");
6045 error = -1;
6046 }
6047 }
6048 }
6049 return error;
6050}
6051
c4a3e0a5
BS		 6052/**
6053 * megasas_mgmt_fw_ioctl - Issues management ioctls to FW
6054 * @instance: Adapter soft state
6055 * @argp: User's ioctl packet
6056 */
6057static int
6058megasas_mgmt_fw_ioctl(struct megasas_instance *instance,
6059 struct megasas_iocpacket __user * user_ioc,
6060 struct megasas_iocpacket *ioc)
6061{
6062 struct megasas_sge32 *kern_sge32;
6063 struct megasas_cmd *cmd;
6064 void *kbuff_arr[MAX_IOCTL_SGE];
6065 dma_addr_t buf_handle = 0;
6066 int error = 0, i;
6067 void *sense = NULL;
6068 dma_addr_t sense_handle;
7b2519af 6069 unsigned long *sense_ptr;
c4a3e0a5
BS		 6070
6071 memset(kbuff_arr, 0, sizeof(kbuff_arr));
6072
6073 if (ioc->sge_count > MAX_IOCTL_SGE) {
1be18254 6074 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SGE count [%d] > max limit [%d]\n",
c4a3e0a5
BS		 6075 ioc->sge_count, MAX_IOCTL_SGE);
6076 return -EINVAL;
6077 }
6078
6079 cmd = megasas_get_cmd(instance);
6080 if (!cmd) {
1be18254 6081 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a cmd packet\n");
c4a3e0a5
BS		 6082 return -ENOMEM;
6083 }
6084
6085 /*
6086 * User's IOCTL packet has 2 frames (maximum). Copy those two
6087 * frames into our cmd's frames. cmd->frame's context will get
6088 * overwritten when we copy from user's frames. So set that value
6089 * alone separately
6090 */
6091 memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE);
94cd65dd 6092 cmd->frame->hdr.context = cpu_to_le32(cmd->index);
c3518837 6093 cmd->frame->hdr.pad_0 = 0;
94cd65dd
SS		 6094 cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_IEEE |
6095 MFI_FRAME_SGL64 |
6096 MFI_FRAME_SENSE64));
c4a3e0a5 6097
fc62b3fc
SS		 6098 if (cmd->frame->dcmd.opcode == MR_DRIVER_SET_APP_CRASHDUMP_MODE) {
6099 error = megasas_set_crash_dump_params_ioctl(cmd);
6100 megasas_return_cmd(instance, cmd);
6101 return error;
6102 }
6103
c4a3e0a5
BS		 6104 /*
6105 * The management interface between applications and the fw uses
6106 * MFI frames. E.g, RAID configuration changes, LD property changes
6107 * etc are accomplishes through different kinds of MFI frames. The
6108 * driver needs to care only about substituting user buffers with
6109 * kernel buffers in SGLs. The location of SGL is embedded in the
6110 * struct iocpacket itself.
6111 */
6112 kern_sge32 = (struct megasas_sge32 *)
6113 ((unsigned long)cmd->frame + ioc->sgl_off);
6114
6115 /*
6116 * For each user buffer, create a mirror buffer and copy in
6117 */
6118 for (i = 0; i < ioc->sge_count; i++) {
98cb7e44
BM		 6119 if (!ioc->sgl[i].iov_len)
6120 continue;
6121
9f35fa8a 6122 kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev,
c4a3e0a5 6123 ioc->sgl[i].iov_len,
9f35fa8a 6124 &buf_handle, GFP_KERNEL);
c4a3e0a5 6125 if (!kbuff_arr[i]) {
1be18254
BH		 6126 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc "
6127 "kernel SGL buffer for IOCTL\n");
c4a3e0a5
BS		 6128 error = -ENOMEM;
6129 goto out;
6130 }
6131
6132 /*
6133 * We don't change the dma_coherent_mask, so
6134 * pci_alloc_consistent only returns 32bit addresses
6135 */
94cd65dd
SS		 6136 kern_sge32[i].phys_addr = cpu_to_le32(buf_handle);
6137 kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len);
c4a3e0a5
BS		 6138
6139 /*
6140 * We created a kernel buffer corresponding to the
6141 * user buffer. Now copy in from the user buffer
6142 */
6143 if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base,
6144 (u32) (ioc->sgl[i].iov_len))) {
6145 error = -EFAULT;
6146 goto out;
6147 }
6148 }
6149
6150 if (ioc->sense_len) {
9f35fa8a
SP		 6151 sense = dma_alloc_coherent(&instance->pdev->dev, ioc->sense_len,
6152 &sense_handle, GFP_KERNEL);
c4a3e0a5
BS		 6153 if (!sense) {
6154 error = -ENOMEM;
6155 goto out;
6156 }
6157
6158 sense_ptr =
7b2519af 6159 (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off);
94cd65dd 6160 *sense_ptr = cpu_to_le32(sense_handle);
c4a3e0a5
BS		 6161 }
6162
6163 /*
6164 * Set the sync_cmd flag so that the ISR knows not to complete this
6165 * cmd to the SCSI mid-layer
6166 */
6167 cmd->sync_cmd = 1;
cfbe7554 6168 megasas_issue_blocked_cmd(instance, cmd, 0);
c4a3e0a5
BS		 6169 cmd->sync_cmd = 0;
6170
aa00832b
SS		 6171 if (instance->unload == 1) {
6172 dev_info(&instance->pdev->dev, "Driver unload is in progress "
6173 "don't submit data to application\n");
6174 goto out;
6175 }
c4a3e0a5
BS		 6176 /*
6177 * copy out the kernel buffers to user buffers
6178 */
6179 for (i = 0; i < ioc->sge_count; i++) {
6180 if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i],
6181 ioc->sgl[i].iov_len)) {
6182 error = -EFAULT;
6183 goto out;
6184 }
6185 }
6186
6187 /*
6188 * copy out the sense
6189 */
6190 if (ioc->sense_len) {
6191 /*
b70a41e0 6192 * sense_ptr points to the location that has the user
c4a3e0a5
BS		 6193 * sense buffer address
6194 */
7b2519af
YB		 6195 sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw +
6196 ioc->sense_off);
c4a3e0a5 6197
b70a41e0 6198 if (copy_to_user((void __user *)((unsigned long)(*sense_ptr)),
6199 sense, ioc->sense_len)) {
1be18254 6200 dev_err(&instance->pdev->dev, "Failed to copy out to user "
b10c36a5 6201 "sense data\n");
c4a3e0a5
BS		 6202 error = -EFAULT;
6203 goto out;
6204 }
6205 }
6206
6207 /*
6208 * copy the status codes returned by the fw
6209 */
6210 if (copy_to_user(&user_ioc->frame.hdr.cmd_status,
6211 &cmd->frame->hdr.cmd_status, sizeof(u8))) {
1be18254 6212 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error copying out cmd_status\n");
c4a3e0a5
BS		 6213 error = -EFAULT;
6214 }
6215
da0dc9fb 6216out:
c4a3e0a5 6217 if (sense) {
9f35fa8a 6218 dma_free_coherent(&instance->pdev->dev, ioc->sense_len,
c4a3e0a5
BS		 6219 sense, sense_handle);
6220 }
6221
7a6a731b
BM		 6222 for (i = 0; i < ioc->sge_count; i++) {
6223 if (kbuff_arr[i])
6224 dma_free_coherent(&instance->pdev->dev,
94cd65dd 6225 le32_to_cpu(kern_sge32[i].length),
7a6a731b 6226 kbuff_arr[i],
94cd65dd 6227 le32_to_cpu(kern_sge32[i].phys_addr));
90dc9d98 6228 kbuff_arr[i] = NULL;
c4a3e0a5
BS		 6229 }
6230
4026e9aa 6231 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 6232 return error;
6233}
6234
c4a3e0a5
BS		 6235static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg)
6236{
6237 struct megasas_iocpacket __user *user_ioc =
6238 (struct megasas_iocpacket __user *)arg;
6239 struct megasas_iocpacket *ioc;
6240 struct megasas_instance *instance;
6241 int error;
39a98554 6242 int i;
6243 unsigned long flags;
6244 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 6245
6246 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
6247 if (!ioc)
6248 return -ENOMEM;
6249
6250 if (copy_from_user(ioc, user_ioc, sizeof(*ioc))) {
6251 error = -EFAULT;
6252 goto out_kfree_ioc;
6253 }
6254
6255 instance = megasas_lookup_instance(ioc->host_no);
6256 if (!instance) {
6257 error = -ENODEV;
6258 goto out_kfree_ioc;
6259 }
6260
229fe47c 6261 /* Adjust ioctl wait time for VF mode */
6262 if (instance->requestorId)
6263 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
6264
6265 /* Block ioctls in VF mode */
6266 if (instance->requestorId && !allow_vf_ioctls) {
6267 error = -ENODEV;
6268 goto out_kfree_ioc;
6269 }
6270
39a98554 6271 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 6272 dev_err(&instance->pdev->dev, "Controller in crit error\n");
0c79e681
YB		 6273 error = -ENODEV;
6274 goto out_kfree_ioc;
6275 }
6276
6277 if (instance->unload == 1) {
6278 error = -ENODEV;
6279 goto out_kfree_ioc;
6280 }
6281
c4a3e0a5
BS		 6282 if (down_interruptible(&instance->ioctl_sem)) {
6283 error = -ERESTARTSYS;
6284 goto out_kfree_ioc;
6285 }
39a98554 6286
6287 for (i = 0; i < wait_time; i++) {
6288
6289 spin_lock_irqsave(&instance->hba_lock, flags);
6290 if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) {
6291 spin_unlock_irqrestore(&instance->hba_lock, flags);
6292 break;
6293 }
6294 spin_unlock_irqrestore(&instance->hba_lock, flags);
6295
6296 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6297 dev_notice(&instance->pdev->dev, "waiting"
39a98554 6298 "for controller reset to finish\n");
6299 }
6300
6301 msleep(1000);
6302 }
6303
6304 spin_lock_irqsave(&instance->hba_lock, flags);
6305 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
6306 spin_unlock_irqrestore(&instance->hba_lock, flags);
6307
1be18254 6308 dev_err(&instance->pdev->dev, "timed out while"
39a98554 6309 "waiting for HBA to recover\n");
6310 error = -ENODEV;
c64e483e 6311 goto out_up;
39a98554 6312 }
6313 spin_unlock_irqrestore(&instance->hba_lock, flags);
6314
c4a3e0a5 6315 error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc);
da0dc9fb 6316out_up:
c4a3e0a5
BS		 6317 up(&instance->ioctl_sem);
6318
da0dc9fb 6319out_kfree_ioc:
c4a3e0a5
BS		 6320 kfree(ioc);
6321 return error;
6322}
6323
6324static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg)
6325{
6326 struct megasas_instance *instance;
6327 struct megasas_aen aen;
6328 int error;
39a98554 6329 int i;
6330 unsigned long flags;
6331 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 6332
6333 if (file->private_data != file) {
6334 printk(KERN_DEBUG "megasas: fasync_helper was not "
6335 "called first\n");
6336 return -EINVAL;
6337 }
6338
6339 if (copy_from_user(&aen, (void __user *)arg, sizeof(aen)))
6340 return -EFAULT;
6341
6342 instance = megasas_lookup_instance(aen.host_no);
6343
6344 if (!instance)
6345 return -ENODEV;
6346
39a98554 6347 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
6348 return -ENODEV;
0c79e681
YB		 6349 }
6350
6351 if (instance->unload == 1) {
6352 return -ENODEV;
6353 }
6354
39a98554 6355 for (i = 0; i < wait_time; i++) {
6356
6357 spin_lock_irqsave(&instance->hba_lock, flags);
6358 if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) {
6359 spin_unlock_irqrestore(&instance->hba_lock,
6360 flags);
6361 break;
6362 }
6363
6364 spin_unlock_irqrestore(&instance->hba_lock, flags);
6365
6366 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6367 dev_notice(&instance->pdev->dev, "waiting for"
39a98554 6368 "controller reset to finish\n");
6369 }
6370
6371 msleep(1000);
6372 }
6373
6374 spin_lock_irqsave(&instance->hba_lock, flags);
6375 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
6376 spin_unlock_irqrestore(&instance->hba_lock, flags);
1be18254
BH		 6377 dev_err(&instance->pdev->dev, "timed out while waiting"
6378 "for HBA to recover\n");
39a98554 6379 return -ENODEV;
6380 }
6381 spin_unlock_irqrestore(&instance->hba_lock, flags);
6382
e5a69e27 6383 mutex_lock(&instance->aen_mutex);
c4a3e0a5
BS		 6384 error = megasas_register_aen(instance, aen.seq_num,
6385 aen.class_locale_word);
e5a69e27 6386 mutex_unlock(&instance->aen_mutex);
c4a3e0a5
BS		 6387 return error;
6388}
6389
6390/**
6391 * megasas_mgmt_ioctl - char node ioctl entry point
6392 */
6393static long
6394megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
6395{
6396 switch (cmd) {
6397 case MEGASAS_IOC_FIRMWARE:
6398 return megasas_mgmt_ioctl_fw(file, arg);
6399
6400 case MEGASAS_IOC_GET_AEN:
6401 return megasas_mgmt_ioctl_aen(file, arg);
6402 }
6403
6404 return -ENOTTY;
6405}
6406
6407#ifdef CONFIG_COMPAT
6408static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
6409{
6410 struct compat_megasas_iocpacket __user *cioc =
6411 (struct compat_megasas_iocpacket __user *)arg;
6412 struct megasas_iocpacket __user *ioc =
6413 compat_alloc_user_space(sizeof(struct megasas_iocpacket));
6414 int i;
6415 int error = 0;
b3dc1a21 6416 compat_uptr_t ptr;
c4a3e0a5 6417
83aabc1b
JG		 6418 if (clear_user(ioc, sizeof(*ioc)))
6419 return -EFAULT;
c4a3e0a5
BS		 6420
6421 if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) ||
6422 copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) ||
6423 copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) ||
6424 copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) ||
6425 copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) ||
6426 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
6427 return -EFAULT;
6428
b3dc1a21
TH		 6429 /*
6430 * The sense_ptr is used in megasas_mgmt_fw_ioctl only when
6431 * sense_len is not null, so prepare the 64bit value under
6432 * the same condition.
6433 */
6434 if (ioc->sense_len) {
6435 void __user **sense_ioc_ptr =
6436 (void __user **)(ioc->frame.raw + ioc->sense_off);
6437 compat_uptr_t *sense_cioc_ptr =
6438 (compat_uptr_t *)(cioc->frame.raw + cioc->sense_off);
6439 if (get_user(ptr, sense_cioc_ptr) ||
6440 put_user(compat_ptr(ptr), sense_ioc_ptr))
6441 return -EFAULT;
6442 }
c4a3e0a5 6443
b3dc1a21 6444 for (i = 0; i < MAX_IOCTL_SGE; i++) {
c4a3e0a5
BS		 6445 if (get_user(ptr, &cioc->sgl[i].iov_base) ||
6446 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
6447 copy_in_user(&ioc->sgl[i].iov_len,
6448 &cioc->sgl[i].iov_len, sizeof(compat_size_t)))
6449 return -EFAULT;
6450 }
6451
6452 error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc);
6453
6454 if (copy_in_user(&cioc->frame.hdr.cmd_status,
6455 &ioc->frame.hdr.cmd_status, sizeof(u8))) {
6456 printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n");
6457 return -EFAULT;
6458 }
6459 return error;
6460}
6461
6462static long
6463megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd,
6464 unsigned long arg)
6465{
6466 switch (cmd) {
cb59aa6a
SP		 6467 case MEGASAS_IOC_FIRMWARE32:
6468 return megasas_mgmt_compat_ioctl_fw(file, arg);
c4a3e0a5
BS		 6469 case MEGASAS_IOC_GET_AEN:
6470 return megasas_mgmt_ioctl_aen(file, arg);
6471 }
6472
6473 return -ENOTTY;
6474}
6475#endif
6476
6477/*
6478 * File operations structure for management interface
6479 */
00977a59 6480static const struct file_operations megasas_mgmt_fops = {
c4a3e0a5
BS		 6481 .owner = THIS_MODULE,
6482 .open = megasas_mgmt_open,
c4a3e0a5
BS		 6483 .fasync = megasas_mgmt_fasync,
6484 .unlocked_ioctl = megasas_mgmt_ioctl,
c3518837 6485 .poll = megasas_mgmt_poll,
c4a3e0a5
BS		 6486#ifdef CONFIG_COMPAT
6487 .compat_ioctl = megasas_mgmt_compat_ioctl,
6488#endif
6038f373 6489 .llseek = noop_llseek,
c4a3e0a5
BS		 6490};
6491
6492/*
6493 * PCI hotplug support registration structure
6494 */
6495static struct pci_driver megasas_pci_driver = {
6496
6497 .name = "megaraid_sas",
6498 .id_table = megasas_pci_table,
6499 .probe = megasas_probe_one,
6f039790 6500 .remove = megasas_detach_one,
31ea7088 6501 .suspend = megasas_suspend,
6502 .resume = megasas_resume,
c4a3e0a5
BS		 6503 .shutdown = megasas_shutdown,
6504};
6505
6506/*
6507 * Sysfs driver attributes
6508 */
6509static ssize_t megasas_sysfs_show_version(struct device_driver *dd, char *buf)
6510{
6511 return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n",
6512 MEGASAS_VERSION);
6513}
6514
6515static DRIVER_ATTR(version, S_IRUGO, megasas_sysfs_show_version, NULL);
6516
09fced19
SS		 6517static ssize_t
6518megasas_sysfs_show_release_date(struct device_driver *dd, char *buf)
6519{
6520 return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n",
6521 MEGASAS_RELDATE);
6522}
6523
6524static DRIVER_ATTR(release_date, S_IRUGO, megasas_sysfs_show_release_date, NULL);
6525
72c4fd36
YB		 6526static ssize_t
6527megasas_sysfs_show_support_poll_for_event(struct device_driver *dd, char *buf)
6528{
6529 return sprintf(buf, "%u\n", support_poll_for_event);
6530}
6531
6532static DRIVER_ATTR(support_poll_for_event, S_IRUGO,
6533 megasas_sysfs_show_support_poll_for_event, NULL);
6534
837f5fe8
YB		 6535 static ssize_t
6536megasas_sysfs_show_support_device_change(struct device_driver *dd, char *buf)
6537{
6538 return sprintf(buf, "%u\n", support_device_change);
6539}
6540
6541static DRIVER_ATTR(support_device_change, S_IRUGO,
6542 megasas_sysfs_show_support_device_change, NULL);
6543
658dcedb
SP		 6544static ssize_t
6545megasas_sysfs_show_dbg_lvl(struct device_driver *dd, char *buf)
6546{
ad84db2e 6547 return sprintf(buf, "%u\n", megasas_dbg_lvl);
658dcedb
SP		 6548}
6549
6550static ssize_t
6551megasas_sysfs_set_dbg_lvl(struct device_driver *dd, const char *buf, size_t count)
6552{
6553 int retval = count;
da0dc9fb
BH		 6554
6555 if (sscanf(buf, "%u", &megasas_dbg_lvl) < 1) {
658dcedb
SP		 6556 printk(KERN_ERR "megasas: could not set dbg_lvl\n");
6557 retval = -EINVAL;
6558 }
6559 return retval;
6560}
6561
66dca9b8 6562static DRIVER_ATTR(dbg_lvl, S_IRUGO|S_IWUSR, megasas_sysfs_show_dbg_lvl,
ad84db2e 6563 megasas_sysfs_set_dbg_lvl);
6564
7e8a75f4
YB		 6565static void
6566megasas_aen_polling(struct work_struct *work)
6567{
6568 struct megasas_aen_event *ev =
c1d390d8 6569 container_of(work, struct megasas_aen_event, hotplug_work.work);
7e8a75f4
YB		 6570 struct megasas_instance *instance = ev->instance;
6571 union megasas_evt_class_locale class_locale;
6572 struct Scsi_Host *host;
6573 struct scsi_device *sdev1;
6574 u16 pd_index = 0;
c9786842 6575 u16 ld_index = 0;
7e8a75f4 6576 int i, j, doscan = 0;
229fe47c 6577 u32 seq_num, wait_time = MEGASAS_RESET_WAIT_TIME;
7e8a75f4
YB		 6578 int error;
6579
6580 if (!instance) {
6581 printk(KERN_ERR "invalid instance!\n");
6582 kfree(ev);
6583 return;
6584 }
229fe47c 6585
6586 /* Adjust event workqueue thread wait time for VF mode */
6587 if (instance->requestorId)
6588 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
6589
6590 /* Don't run the event workqueue thread if OCR is running */
6591 for (i = 0; i < wait_time; i++) {
6592 if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL)
6593 break;
6594 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6595 dev_notice(&instance->pdev->dev, "%s waiting for "
229fe47c 6596 "controller reset to finish for scsi%d\n",
6597 __func__, instance->host->host_no);
6598 }
6599 msleep(1000);
6600 }
6601
7e8a75f4
YB		 6602 instance->ev = NULL;
6603 host = instance->host;
6604 if (instance->evt_detail) {
6605
94cd65dd 6606 switch (le32_to_cpu(instance->evt_detail->code)) {
7e8a75f4 6607 case MR_EVT_PD_INSERTED:
c9786842
YB		 6608 if (megasas_get_pd_list(instance) == 0) {
6609 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
6610 for (j = 0;
6611 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6612 j++) {
6613
6614 pd_index =
6615 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6616
da0dc9fb 6617 sdev1 = scsi_device_lookup(host, i, j, 0);
c9786842
YB		 6618
6619 if (instance->pd_list[pd_index].driveState
6620 == MR_PD_STATE_SYSTEM) {
da0dc9fb 6621 if (!sdev1)
c9786842 6622 scsi_add_device(host, i, j, 0);
c9786842
YB		 6623
6624 if (sdev1)
6625 scsi_device_put(sdev1);
6626 }
6627 }
6628 }
6629 }
6630 doscan = 0;
6631 break;
6632
7e8a75f4 6633 case MR_EVT_PD_REMOVED:
c9786842 6634 if (megasas_get_pd_list(instance) == 0) {
c9786842
YB		 6635 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
6636 for (j = 0;
6637 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6638 j++) {
6639
6640 pd_index =
6641 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6642
da0dc9fb 6643 sdev1 = scsi_device_lookup(host, i, j, 0);
c9786842
YB		 6644
6645 if (instance->pd_list[pd_index].driveState
6646 == MR_PD_STATE_SYSTEM) {
da0dc9fb 6647 if (sdev1)
c9786842 6648 scsi_device_put(sdev1);
c9786842
YB		 6649 } else {
6650 if (sdev1) {
6651 scsi_remove_device(sdev1);
6652 scsi_device_put(sdev1);
6653 }
6654 }
6655 }
6656 }
6657 }
6658 doscan = 0;
6659 break;
6660
6661 case MR_EVT_LD_OFFLINE:
4c598b23 6662 case MR_EVT_CFG_CLEARED:
c9786842 6663 case MR_EVT_LD_DELETED:
229fe47c 6664 if (!instance->requestorId ||
6665 (instance->requestorId &&
6666 megasas_get_ld_vf_affiliation(instance, 0))) {
6667 if (megasas_ld_list_query(instance,
6668 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
6669 megasas_get_ld_list(instance);
6670 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
6671 for (j = 0;
6672 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6673 j++) {
6674
6675 ld_index =
6676 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6677
6678 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6679
6680 if (instance->ld_ids[ld_index]
6681 != 0xff) {
6682 if (sdev1)
6683 scsi_device_put(sdev1);
6684 } else {
6685 if (sdev1) {
6686 scsi_remove_device(sdev1);
6687 scsi_device_put(sdev1);
6688 }
6689 }
c9786842
YB		 6690 }
6691 }
229fe47c 6692 doscan = 0;
c9786842 6693 }
c9786842
YB		 6694 break;
6695 case MR_EVT_LD_CREATED:
229fe47c 6696 if (!instance->requestorId ||
6697 (instance->requestorId &&
6698 megasas_get_ld_vf_affiliation(instance, 0))) {
6699 if (megasas_ld_list_query(instance,
6700 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
6701 megasas_get_ld_list(instance);
6702 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
6703 for (j = 0;
6704 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6705 j++) {
6706 ld_index =
6707 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6708
6709 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6710
6711 if (instance->ld_ids[ld_index]
6712 != 0xff) {
6713 if (!sdev1)
6714 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
c9786842 6715 }
229fe47c 6716 if (sdev1)
6717 scsi_device_put(sdev1);
c9786842
YB		 6718 }
6719 }
229fe47c 6720 doscan = 0;
c9786842 6721 }
c9786842 6722 break;
7e8a75f4 6723 case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED:
c9786842 6724 case MR_EVT_FOREIGN_CFG_IMPORTED:
9c915a8c 6725 case MR_EVT_LD_STATE_CHANGE:
7e8a75f4
YB		 6726 doscan = 1;
6727 break;
6728 default:
6729 doscan = 0;
6730 break;
6731 }
6732 } else {
1be18254 6733 dev_err(&instance->pdev->dev, "invalid evt_detail!\n");
7e8a75f4
YB		 6734 kfree(ev);
6735 return;
6736 }
6737
6738 if (doscan) {
1be18254 6739 dev_info(&instance->pdev->dev, "scanning for scsi%d...\n",
229fe47c 6740 instance->host->host_no);
58968fc8
HR		 6741 if (megasas_get_pd_list(instance) == 0) {
6742 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
6743 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
6744 pd_index = i*MEGASAS_MAX_DEV_PER_CHANNEL + j;
6745 sdev1 = scsi_device_lookup(host, i, j, 0);
6746 if (instance->pd_list[pd_index].driveState ==
6747 MR_PD_STATE_SYSTEM) {
6748 if (!sdev1) {
6749 scsi_add_device(host, i, j, 0);
6750 }
6751 if (sdev1)
6752 scsi_device_put(sdev1);
6753 } else {
6754 if (sdev1) {
6755 scsi_remove_device(sdev1);
6756 scsi_device_put(sdev1);
6757 }
7e8a75f4
YB		 6758 }
6759 }
6760 }
6761 }
c9786842 6762
229fe47c 6763 if (!instance->requestorId ||
6764 (instance->requestorId &&
6765 megasas_get_ld_vf_affiliation(instance, 0))) {
6766 if (megasas_ld_list_query(instance,
6767 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
6768 megasas_get_ld_list(instance);
6769 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
6770 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL;
6771 j++) {
6772 ld_index =
6773 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
c9786842 6774
229fe47c 6775 sdev1 = scsi_device_lookup(host,
6776 MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6777 if (instance->ld_ids[ld_index]
6778 != 0xff) {
6779 if (!sdev1)
6780 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6781 else
6782 scsi_device_put(sdev1);
c9786842 6783 } else {
229fe47c 6784 if (sdev1) {
6785 scsi_remove_device(sdev1);
6786 scsi_device_put(sdev1);
6787 }
c9786842
YB		 6788 }
6789 }
6790 }
6791 }
7e8a75f4
YB		 6792 }
6793
da0dc9fb 6794 if (instance->aen_cmd != NULL) {
7e8a75f4
YB		 6795 kfree(ev);
6796 return ;
6797 }
6798
94cd65dd 6799 seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1;
7e8a75f4
YB		 6800
6801 /* Register AEN with FW for latest sequence number plus 1 */
6802 class_locale.members.reserved = 0;
6803 class_locale.members.locale = MR_EVT_LOCALE_ALL;
6804 class_locale.members.class = MR_EVT_CLASS_DEBUG;
6805 mutex_lock(&instance->aen_mutex);
6806 error = megasas_register_aen(instance, seq_num,
6807 class_locale.word);
6808 mutex_unlock(&instance->aen_mutex);
6809
6810 if (error)
1be18254 6811 dev_err(&instance->pdev->dev, "register aen failed error %x\n", error);
7e8a75f4
YB		 6812
6813 kfree(ev);
6814}
6815
c4a3e0a5
BS		 6816/**
6817 * megasas_init - Driver load entry point
6818 */
6819static int __init megasas_init(void)
6820{
6821 int rval;
6822
6823 /*
6824 * Announce driver version and other information
6825 */
d98a6deb 6826 pr_info("megasas: %s\n", MEGASAS_VERSION);
c4a3e0a5 6827
bd8d6dd4
KD		 6828 spin_lock_init(&poll_aen_lock);
6829
72c4fd36 6830 support_poll_for_event = 2;
837f5fe8 6831 support_device_change = 1;
72c4fd36 6832
c4a3e0a5
BS		 6833 memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info));
6834
6835 /*
6836 * Register character device node
6837 */
6838 rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops);
6839
6840 if (rval < 0) {
6841 printk(KERN_DEBUG "megasas: failed to open device node\n");
6842 return rval;
6843 }
6844
6845 megasas_mgmt_majorno = rval;
6846
6847 /*
6848 * Register ourselves as PCI hotplug module
6849 */
4041b9cd 6850 rval = pci_register_driver(&megasas_pci_driver);
c4a3e0a5
BS		 6851
6852 if (rval) {
6774def6 6853 printk(KERN_DEBUG "megasas: PCI hotplug registration failed \n");
83aabc1b
JG		 6854 goto err_pcidrv;
6855 }
6856
6857 rval = driver_create_file(&megasas_pci_driver.driver,
6858 &driver_attr_version);
6859 if (rval)
6860 goto err_dcf_attr_ver;
72c4fd36 6861
09fced19
SS		 6862 rval = driver_create_file(&megasas_pci_driver.driver,
6863 &driver_attr_release_date);
6864 if (rval)
6865 goto err_dcf_rel_date;
6866
72c4fd36
YB		 6867 rval = driver_create_file(&megasas_pci_driver.driver,
6868 &driver_attr_support_poll_for_event);
6869 if (rval)
6870 goto err_dcf_support_poll_for_event;
6871
83aabc1b
JG		 6872 rval = driver_create_file(&megasas_pci_driver.driver,
6873 &driver_attr_dbg_lvl);
6874 if (rval)
6875 goto err_dcf_dbg_lvl;
837f5fe8
YB		 6876 rval = driver_create_file(&megasas_pci_driver.driver,
6877 &driver_attr_support_device_change);
6878 if (rval)
6879 goto err_dcf_support_device_change;
6880
c4a3e0a5 6881 return rval;
ad84db2e 6882
837f5fe8 6883err_dcf_support_device_change:
ad84db2e 6884 driver_remove_file(&megasas_pci_driver.driver,
6885 &driver_attr_dbg_lvl);
83aabc1b 6886err_dcf_dbg_lvl:
72c4fd36
YB		 6887 driver_remove_file(&megasas_pci_driver.driver,
6888 &driver_attr_support_poll_for_event);
72c4fd36 6889err_dcf_support_poll_for_event:
09fced19
SS		 6890 driver_remove_file(&megasas_pci_driver.driver,
6891 &driver_attr_release_date);
6892err_dcf_rel_date:
83aabc1b
JG		 6893 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
6894err_dcf_attr_ver:
6895 pci_unregister_driver(&megasas_pci_driver);
6896err_pcidrv:
6897 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
0d49016b 6898 return rval;
c4a3e0a5
BS		 6899}
6900
6901/**
6902 * megasas_exit - Driver unload entry point
6903 */
6904static void __exit megasas_exit(void)
6905{
658dcedb
SP		 6906 driver_remove_file(&megasas_pci_driver.driver,
6907 &driver_attr_dbg_lvl);
837f5fe8
YB		 6908 driver_remove_file(&megasas_pci_driver.driver,
6909 &driver_attr_support_poll_for_event);
6910 driver_remove_file(&megasas_pci_driver.driver,
6911 &driver_attr_support_device_change);
09fced19
SS		 6912 driver_remove_file(&megasas_pci_driver.driver,
6913 &driver_attr_release_date);
83aabc1b 6914 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
c4a3e0a5
BS		 6915
6916 pci_unregister_driver(&megasas_pci_driver);
6917 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
6918}
6919
6920module_init(megasas_init);
6921module_exit(megasas_exit);
Linux kernel - Deliverables
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