projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
sg: Fix double-free when drives detach during SG_IO
[deliverable/linux.git] / drivers / scsi / megaraid / megaraid_sas_base.c
CommitLineData
c4a3e0a5 1/*
3f1530c1 2 * Linux MegaRAID driver for SAS based RAID controllers
c4a3e0a5 3 *
e399065b
SS		 4 * Copyright (c) 2003-2013 LSI Corporation
5 * Copyright (c) 2013-2014 Avago Technologies
c4a3e0a5 6 *
3f1530c1 7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version 2
10 * of the License, or (at your option) any later version.
c4a3e0a5 11 *
3f1530c1 12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
c4a3e0a5 16 *
3f1530c1 17 * You should have received a copy of the GNU General Public License
e399065b 18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
c4a3e0a5 19 *
e399065b 20 * Authors: Avago Technologies
3f1530c1 21 * Sreenivas Bagalkote
22 * Sumant Patro
23 * Bo Yang
e399065b
SS		 24 * Adam Radford
25 * Kashyap Desai <kashyap.desai@avagotech.com>
26 * Sumit Saxena <sumit.saxena@avagotech.com>
c4a3e0a5 27 *
e399065b 28 * Send feedback to: megaraidlinux.pdl@avagotech.com
3f1530c1 29 *
e399065b
SS		 30 * Mail to: Avago Technologies, 350 West Trimble Road, Building 90,
31 * San Jose, California 95131
c4a3e0a5
BS		 32 */
33
34#include <linux/kernel.h>
35#include <linux/types.h>
36#include <linux/pci.h>
37#include <linux/list.h>
c4a3e0a5
BS		 38#include <linux/moduleparam.h>
39#include <linux/module.h>
40#include <linux/spinlock.h>
41#include <linux/interrupt.h>
42#include <linux/delay.h>
43#include <linux/uio.h>
5a0e3ad6 44#include <linux/slab.h>
c4a3e0a5 45#include <asm/uaccess.h>
43399236 46#include <linux/fs.h>
c4a3e0a5 47#include <linux/compat.h>
cf62a0a5 48#include <linux/blkdev.h>
0b950672 49#include <linux/mutex.h>
c3518837 50#include <linux/poll.h>
c4a3e0a5
BS		 51
52#include <scsi/scsi.h>
53#include <scsi/scsi_cmnd.h>
54#include <scsi/scsi_device.h>
55#include <scsi/scsi_host.h>
4bcde509 56#include <scsi/scsi_tcq.h>
9c915a8c 57#include "megaraid_sas_fusion.h"
c4a3e0a5
BS		 58#include "megaraid_sas.h"
59
1fd10685
YB		 60/*
61 * Number of sectors per IO command
62 * Will be set in megasas_init_mfi if user does not provide
63 */
64static unsigned int max_sectors;
65module_param_named(max_sectors, max_sectors, int, 0);
66MODULE_PARM_DESC(max_sectors,
67 "Maximum number of sectors per IO command");
68
80d9da98 69static int msix_disable;
70module_param(msix_disable, int, S_IRUGO);
71MODULE_PARM_DESC(msix_disable, "Disable MSI-X interrupt handling. Default: 0");
72
079eaddf 73static unsigned int msix_vectors;
74module_param(msix_vectors, int, S_IRUGO);
75MODULE_PARM_DESC(msix_vectors, "MSI-X max vector count. Default: Set by FW");
76
229fe47c 77static int allow_vf_ioctls;
78module_param(allow_vf_ioctls, int, S_IRUGO);
79MODULE_PARM_DESC(allow_vf_ioctls, "Allow ioctls in SR-IOV VF mode. Default: 0");
80
ae09a6c1 81static unsigned int throttlequeuedepth = MEGASAS_THROTTLE_QUEUE_DEPTH;
c5daa6a9 82module_param(throttlequeuedepth, int, S_IRUGO);
83MODULE_PARM_DESC(throttlequeuedepth,
84 "Adapter queue depth when throttled due to I/O timeout. Default: 16");
85
c007b8b2 86int resetwaittime = MEGASAS_RESET_WAIT_TIME;
87module_param(resetwaittime, int, S_IRUGO);
88MODULE_PARM_DESC(resetwaittime, "Wait time in seconds after I/O timeout "
89 "before resetting adapter. Default: 180");
90
ac95136a
SS		 91int smp_affinity_enable = 1;
92module_param(smp_affinity_enable, int, S_IRUGO);
93MODULE_PARM_DESC(smp_affinity_enable, "SMP affinity feature enable/disbale Default: enable(1)");
94
c4a3e0a5
BS		 95MODULE_LICENSE("GPL");
96MODULE_VERSION(MEGASAS_VERSION);
43cd7fe4
SS		 97MODULE_AUTHOR("megaraidlinux.pdl@avagotech.com");
98MODULE_DESCRIPTION("Avago MegaRAID SAS Driver");
c4a3e0a5 99
058a8fac 100int megasas_transition_to_ready(struct megasas_instance *instance, int ocr);
39a98554 101static int megasas_get_pd_list(struct megasas_instance *instance);
21c9e160 102static int megasas_ld_list_query(struct megasas_instance *instance,
103 u8 query_type);
39a98554 104static int megasas_issue_init_mfi(struct megasas_instance *instance);
105static int megasas_register_aen(struct megasas_instance *instance,
106 u32 seq_num, u32 class_locale_word);
c4a3e0a5
BS		 107/*
108 * PCI ID table for all supported controllers
109 */
110static struct pci_device_id megasas_pci_table[] = {
111
f3d7271c
HK		 112 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1064R)},
113 /* xscale IOP */
114 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078R)},
115 /* ppc IOP */
af7a5647 116 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078DE)},
117 /* ppc IOP */
6610a6b3
YB		 118 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS1078GEN2)},
119 /* gen2*/
120 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0079GEN2)},
121 /* gen2*/
87911122
YB		 122 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0073SKINNY)},
123 /* skinny*/
124 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_SAS0071SKINNY)},
125 /* skinny*/
f3d7271c
HK		 126 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_VERDE_ZCR)},
127 /* xscale IOP, vega */
128 {PCI_DEVICE(PCI_VENDOR_ID_DELL, PCI_DEVICE_ID_DELL_PERC5)},
129 /* xscale IOP */
9c915a8c 130 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FUSION)},
131 /* Fusion */
229fe47c 132 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_PLASMA)},
133 /* Plasma */
36807e67 134 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INVADER)},
135 /* Invader */
21d3c710
SS		 136 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_FURY)},
137 /* Fury */
90c204bc 138 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER)},
139 /* Intruder */
140 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_INTRUDER_24)},
141 /* Intruder 24 port*/
7364d34b 142 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_52)},
143 {PCI_DEVICE(PCI_VENDOR_ID_LSI_LOGIC, PCI_DEVICE_ID_LSI_CUTLASS_53)},
f3d7271c 144 {}
c4a3e0a5
BS		 145};
146
147MODULE_DEVICE_TABLE(pci, megasas_pci_table);
148
149static int megasas_mgmt_majorno;
229fe47c 150struct megasas_mgmt_info megasas_mgmt_info;
c4a3e0a5 151static struct fasync_struct *megasas_async_queue;
0b950672 152static DEFINE_MUTEX(megasas_async_queue_mutex);
c4a3e0a5 153
c3518837
YB		 154static int megasas_poll_wait_aen;
155static DECLARE_WAIT_QUEUE_HEAD(megasas_poll_wait);
72c4fd36 156static u32 support_poll_for_event;
9c915a8c 157u32 megasas_dbg_lvl;
837f5fe8 158static u32 support_device_change;
658dcedb 159
c3518837
YB		 160/* define lock for aen poll */
161spinlock_t poll_aen_lock;
162
9c915a8c 163void
7343eb65 164megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
165 u8 alt_status);
ebf054b0 166static u32
167megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs);
168static int
169megasas_adp_reset_gen2(struct megasas_instance *instance,
170 struct megasas_register_set __iomem *reg_set);
cd50ba8e 171static irqreturn_t megasas_isr(int irq, void *devp);
172static u32
173megasas_init_adapter_mfi(struct megasas_instance *instance);
174u32
175megasas_build_and_issue_cmd(struct megasas_instance *instance,
176 struct scsi_cmnd *scmd);
177static void megasas_complete_cmd_dpc(unsigned long instance_addr);
9c915a8c 178void
179megasas_release_fusion(struct megasas_instance *instance);
180int
181megasas_ioc_init_fusion(struct megasas_instance *instance);
182void
183megasas_free_cmds_fusion(struct megasas_instance *instance);
184u8
185megasas_get_map_info(struct megasas_instance *instance);
186int
187megasas_sync_map_info(struct megasas_instance *instance);
188int
229fe47c 189wait_and_poll(struct megasas_instance *instance, struct megasas_cmd *cmd,
190 int seconds);
9c915a8c 191void megasas_reset_reply_desc(struct megasas_instance *instance);
229fe47c 192int megasas_reset_fusion(struct Scsi_Host *shost, int iotimeout);
9c915a8c 193void megasas_fusion_ocr_wq(struct work_struct *work);
229fe47c 194static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
195 int initial);
196int megasas_check_mpio_paths(struct megasas_instance *instance,
197 struct scsi_cmnd *scmd);
cd50ba8e 198
199void
200megasas_issue_dcmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
201{
202 instance->instancet->fire_cmd(instance,
203 cmd->frame_phys_addr, 0, instance->reg_set);
204}
7343eb65 205
c4a3e0a5
BS		 206/**
207 * megasas_get_cmd - Get a command from the free pool
208 * @instance: Adapter soft state
209 *
210 * Returns a free command from the pool
211 */
9c915a8c 212struct megasas_cmd *megasas_get_cmd(struct megasas_instance
c4a3e0a5
BS		 213 *instance)
214{
215 unsigned long flags;
216 struct megasas_cmd *cmd = NULL;
217
90dc9d98 218 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 219
220 if (!list_empty(&instance->cmd_pool)) {
221 cmd = list_entry((&instance->cmd_pool)->next,
222 struct megasas_cmd, list);
223 list_del_init(&cmd->list);
224 } else {
1be18254 225 dev_err(&instance->pdev->dev, "Command pool empty!\n");
c4a3e0a5
BS		 226 }
227
90dc9d98 228 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5
BS		 229 return cmd;
230}
231
232/**
4026e9aa 233 * megasas_return_cmd - Return a cmd to free command pool
c4a3e0a5
BS		 234 * @instance: Adapter soft state
235 * @cmd: Command packet to be returned to free command pool
236 */
9c915a8c 237inline void
4026e9aa 238megasas_return_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd)
c4a3e0a5 239{
4026e9aa
SS		 240 unsigned long flags;
241 u32 blk_tags;
242 struct megasas_cmd_fusion *cmd_fusion;
243 struct fusion_context *fusion = instance->ctrl_context;
244
245 /* This flag is used only for fusion adapter.
246 * Wait for Interrupt for Polled mode DCMD
90dc9d98 247 */
4026e9aa 248 if (cmd->flags & DRV_DCMD_POLLED_MODE)
90dc9d98 249 return;
c4a3e0a5 250
4026e9aa
SS		 251 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
252
253 if (fusion) {
254 blk_tags = instance->max_scsi_cmds + cmd->index;
255 cmd_fusion = fusion->cmd_list[blk_tags];
256 megasas_return_cmd_fusion(instance, cmd_fusion);
257 }
c4a3e0a5 258 cmd->scmd = NULL;
9c915a8c 259 cmd->frame_count = 0;
4026e9aa
SS		 260 cmd->flags = 0;
261 if (!fusion && reset_devices)
e5f93a36 262 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
90dc9d98 263 list_add(&cmd->list, (&instance->cmd_pool)->next);
90dc9d98 264
90dc9d98 265 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
c4a3e0a5 266
4026e9aa 267}
1341c939 268
714f5177 269static const char *
270format_timestamp(uint32_t timestamp)
271{
272 static char buffer[32];
273
274 if ((timestamp & 0xff000000) == 0xff000000)
275 snprintf(buffer, sizeof(buffer), "boot + %us", timestamp &
276 0x00ffffff);
277 else
278 snprintf(buffer, sizeof(buffer), "%us", timestamp);
279 return buffer;
280}
281
282static const char *
283format_class(int8_t class)
284{
285 static char buffer[6];
286
287 switch (class) {
288 case MFI_EVT_CLASS_DEBUG:
289 return "debug";
290 case MFI_EVT_CLASS_PROGRESS:
291 return "progress";
292 case MFI_EVT_CLASS_INFO:
293 return "info";
294 case MFI_EVT_CLASS_WARNING:
295 return "WARN";
296 case MFI_EVT_CLASS_CRITICAL:
297 return "CRIT";
298 case MFI_EVT_CLASS_FATAL:
299 return "FATAL";
300 case MFI_EVT_CLASS_DEAD:
301 return "DEAD";
302 default:
303 snprintf(buffer, sizeof(buffer), "%d", class);
304 return buffer;
305 }
306}
307
308/**
309 * megasas_decode_evt: Decode FW AEN event and print critical event
310 * for information.
311 * @instance: Adapter soft state
312 */
313static void
314megasas_decode_evt(struct megasas_instance *instance)
315{
316 struct megasas_evt_detail *evt_detail = instance->evt_detail;
317 union megasas_evt_class_locale class_locale;
318 class_locale.word = le32_to_cpu(evt_detail->cl.word);
319
320 if (class_locale.members.class >= MFI_EVT_CLASS_CRITICAL)
321 dev_info(&instance->pdev->dev, "%d (%s/0x%04x/%s) - %s\n",
322 le32_to_cpu(evt_detail->seq_num),
323 format_timestamp(le32_to_cpu(evt_detail->time_stamp)),
324 (class_locale.members.locale),
325 format_class(class_locale.members.class),
326 evt_detail->description);
327}
328
1341c939 329/**
0d49016b 330* The following functions are defined for xscale
1341c939
SP		 331* (deviceid : 1064R, PERC5) controllers
332*/
333
c4a3e0a5 334/**
1341c939 335 * megasas_enable_intr_xscale - Enables interrupts
c4a3e0a5
BS		 336 * @regs: MFI register set
337 */
338static inline void
d46a3ad6 339megasas_enable_intr_xscale(struct megasas_instance *instance)
c4a3e0a5 340{
d46a3ad6 341 struct megasas_register_set __iomem *regs;
da0dc9fb 342
d46a3ad6 343 regs = instance->reg_set;
39a98554 344 writel(0, &(regs)->outbound_intr_mask);
c4a3e0a5
BS		 345
346 /* Dummy readl to force pci flush */
347 readl(&regs->outbound_intr_mask);
348}
349
b274cab7
SP		 350/**
351 * megasas_disable_intr_xscale -Disables interrupt
352 * @regs: MFI register set
353 */
354static inline void
d46a3ad6 355megasas_disable_intr_xscale(struct megasas_instance *instance)
b274cab7 356{
d46a3ad6 357 struct megasas_register_set __iomem *regs;
b274cab7 358 u32 mask = 0x1f;
da0dc9fb 359
d46a3ad6 360 regs = instance->reg_set;
b274cab7
SP		 361 writel(mask, &regs->outbound_intr_mask);
362 /* Dummy readl to force pci flush */
363 readl(&regs->outbound_intr_mask);
364}
365
1341c939
SP		 366/**
367 * megasas_read_fw_status_reg_xscale - returns the current FW status value
368 * @regs: MFI register set
369 */
370static u32
371megasas_read_fw_status_reg_xscale(struct megasas_register_set __iomem * regs)
372{
373 return readl(&(regs)->outbound_msg_0);
374}
375/**
376 * megasas_clear_interrupt_xscale - Check & clear interrupt
377 * @regs: MFI register set
378 */
0d49016b 379static int
1341c939
SP		 380megasas_clear_intr_xscale(struct megasas_register_set __iomem * regs)
381{
382 u32 status;
39a98554 383 u32 mfiStatus = 0;
da0dc9fb 384
1341c939
SP		 385 /*
386 * Check if it is our interrupt
387 */
388 status = readl(&regs->outbound_intr_status);
389
39a98554 390 if (status & MFI_OB_INTR_STATUS_MASK)
391 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
392 if (status & MFI_XSCALE_OMR0_CHANGE_INTERRUPT)
393 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
1341c939
SP		 394
395 /*
396 * Clear the interrupt by writing back the same value
397 */
39a98554 398 if (mfiStatus)
399 writel(status, &regs->outbound_intr_status);
1341c939 400
06f579de
YB		 401 /* Dummy readl to force pci flush */
402 readl(&regs->outbound_intr_status);
403
39a98554 404 return mfiStatus;
1341c939
SP		 405}
406
407/**
408 * megasas_fire_cmd_xscale - Sends command to the FW
409 * @frame_phys_addr : Physical address of cmd
410 * @frame_count : Number of frames for the command
411 * @regs : MFI register set
412 */
0d49016b 413static inline void
0c79e681
YB		 414megasas_fire_cmd_xscale(struct megasas_instance *instance,
415 dma_addr_t frame_phys_addr,
416 u32 frame_count,
417 struct megasas_register_set __iomem *regs)
1341c939 418{
39a98554 419 unsigned long flags;
da0dc9fb 420
39a98554 421 spin_lock_irqsave(&instance->hba_lock, flags);
1341c939
SP		 422 writel((frame_phys_addr >> 3)|(frame_count),
423 &(regs)->inbound_queue_port);
39a98554 424 spin_unlock_irqrestore(&instance->hba_lock, flags);
425}
426
427/**
428 * megasas_adp_reset_xscale - For controller reset
429 * @regs: MFI register set
430 */
431static int
432megasas_adp_reset_xscale(struct megasas_instance *instance,
433 struct megasas_register_set __iomem *regs)
434{
435 u32 i;
436 u32 pcidata;
da0dc9fb 437
39a98554 438 writel(MFI_ADP_RESET, &regs->inbound_doorbell);
439
440 for (i = 0; i < 3; i++)
441 msleep(1000); /* sleep for 3 secs */
442 pcidata = 0;
443 pci_read_config_dword(instance->pdev, MFI_1068_PCSR_OFFSET, &pcidata);
1be18254 444 dev_notice(&instance->pdev->dev, "pcidata = %x\n", pcidata);
39a98554 445 if (pcidata & 0x2) {
1be18254 446 dev_notice(&instance->pdev->dev, "mfi 1068 offset read=%x\n", pcidata);
39a98554 447 pcidata &= ~0x2;
448 pci_write_config_dword(instance->pdev,
449 MFI_1068_PCSR_OFFSET, pcidata);
450
451 for (i = 0; i < 2; i++)
452 msleep(1000); /* need to wait 2 secs again */
453
454 pcidata = 0;
455 pci_read_config_dword(instance->pdev,
456 MFI_1068_FW_HANDSHAKE_OFFSET, &pcidata);
1be18254 457 dev_notice(&instance->pdev->dev, "1068 offset handshake read=%x\n", pcidata);
39a98554 458 if ((pcidata & 0xffff0000) == MFI_1068_FW_READY) {
1be18254 459 dev_notice(&instance->pdev->dev, "1068 offset pcidt=%x\n", pcidata);
39a98554 460 pcidata = 0;
461 pci_write_config_dword(instance->pdev,
462 MFI_1068_FW_HANDSHAKE_OFFSET, pcidata);
463 }
464 }
465 return 0;
466}
467
468/**
469 * megasas_check_reset_xscale - For controller reset check
470 * @regs: MFI register set
471 */
472static int
473megasas_check_reset_xscale(struct megasas_instance *instance,
474 struct megasas_register_set __iomem *regs)
475{
39a98554 476 if ((instance->adprecovery != MEGASAS_HBA_OPERATIONAL) &&
94cd65dd
SS		 477 (le32_to_cpu(*instance->consumer) ==
478 MEGASAS_ADPRESET_INPROG_SIGN))
39a98554 479 return 1;
39a98554 480 return 0;
1341c939
SP		 481}
482
483static struct megasas_instance_template megasas_instance_template_xscale = {
484
485 .fire_cmd = megasas_fire_cmd_xscale,
486 .enable_intr = megasas_enable_intr_xscale,
b274cab7 487 .disable_intr = megasas_disable_intr_xscale,
1341c939
SP		 488 .clear_intr = megasas_clear_intr_xscale,
489 .read_fw_status_reg = megasas_read_fw_status_reg_xscale,
39a98554 490 .adp_reset = megasas_adp_reset_xscale,
491 .check_reset = megasas_check_reset_xscale,
cd50ba8e 492 .service_isr = megasas_isr,
493 .tasklet = megasas_complete_cmd_dpc,
494 .init_adapter = megasas_init_adapter_mfi,
495 .build_and_issue_cmd = megasas_build_and_issue_cmd,
496 .issue_dcmd = megasas_issue_dcmd,
1341c939
SP		 497};
498
499/**
0d49016b 500* This is the end of set of functions & definitions specific
1341c939
SP		 501* to xscale (deviceid : 1064R, PERC5) controllers
502*/
503
f9876f0b 504/**
0d49016b 505* The following functions are defined for ppc (deviceid : 0x60)
da0dc9fb 506* controllers
f9876f0b
SP		 507*/
508
509/**
510 * megasas_enable_intr_ppc - Enables interrupts
511 * @regs: MFI register set
512 */
513static inline void
d46a3ad6 514megasas_enable_intr_ppc(struct megasas_instance *instance)
f9876f0b 515{
d46a3ad6 516 struct megasas_register_set __iomem *regs;
da0dc9fb 517
d46a3ad6 518 regs = instance->reg_set;
f9876f0b 519 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
0d49016b 520
39a98554 521 writel(~0x80000000, &(regs)->outbound_intr_mask);
f9876f0b
SP		 522
523 /* Dummy readl to force pci flush */
524 readl(&regs->outbound_intr_mask);
525}
526
b274cab7
SP		 527/**
528 * megasas_disable_intr_ppc - Disable interrupt
529 * @regs: MFI register set
530 */
531static inline void
d46a3ad6 532megasas_disable_intr_ppc(struct megasas_instance *instance)
b274cab7 533{
d46a3ad6 534 struct megasas_register_set __iomem *regs;
b274cab7 535 u32 mask = 0xFFFFFFFF;
da0dc9fb 536
d46a3ad6 537 regs = instance->reg_set;
b274cab7
SP		 538 writel(mask, &regs->outbound_intr_mask);
539 /* Dummy readl to force pci flush */
540 readl(&regs->outbound_intr_mask);
541}
542
f9876f0b
SP		 543/**
544 * megasas_read_fw_status_reg_ppc - returns the current FW status value
545 * @regs: MFI register set
546 */
547static u32
548megasas_read_fw_status_reg_ppc(struct megasas_register_set __iomem * regs)
549{
550 return readl(&(regs)->outbound_scratch_pad);
551}
552
553/**
554 * megasas_clear_interrupt_ppc - Check & clear interrupt
555 * @regs: MFI register set
556 */
0d49016b 557static int
f9876f0b
SP		 558megasas_clear_intr_ppc(struct megasas_register_set __iomem * regs)
559{
3cc6851f 560 u32 status, mfiStatus = 0;
561
f9876f0b
SP		 562 /*
563 * Check if it is our interrupt
564 */
565 status = readl(&regs->outbound_intr_status);
566
3cc6851f 567 if (status & MFI_REPLY_1078_MESSAGE_INTERRUPT)
568 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
569
570 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT)
571 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
f9876f0b
SP		 572
573 /*
574 * Clear the interrupt by writing back the same value
575 */
576 writel(status, &regs->outbound_doorbell_clear);
577
06f579de
YB		 578 /* Dummy readl to force pci flush */
579 readl(&regs->outbound_doorbell_clear);
580
3cc6851f 581 return mfiStatus;
f9876f0b 582}
3cc6851f 583
f9876f0b
SP		 584/**
585 * megasas_fire_cmd_ppc - Sends command to the FW
586 * @frame_phys_addr : Physical address of cmd
587 * @frame_count : Number of frames for the command
588 * @regs : MFI register set
589 */
0d49016b 590static inline void
0c79e681
YB		 591megasas_fire_cmd_ppc(struct megasas_instance *instance,
592 dma_addr_t frame_phys_addr,
593 u32 frame_count,
594 struct megasas_register_set __iomem *regs)
f9876f0b 595{
39a98554 596 unsigned long flags;
da0dc9fb 597
39a98554 598 spin_lock_irqsave(&instance->hba_lock, flags);
0d49016b 599 writel((frame_phys_addr | (frame_count<<1))|1,
f9876f0b 600 &(regs)->inbound_queue_port);
39a98554 601 spin_unlock_irqrestore(&instance->hba_lock, flags);
f9876f0b
SP		 602}
603
39a98554 604/**
605 * megasas_check_reset_ppc - For controller reset check
606 * @regs: MFI register set
607 */
608static int
609megasas_check_reset_ppc(struct megasas_instance *instance,
610 struct megasas_register_set __iomem *regs)
611{
3cc6851f 612 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL)
613 return 1;
614
39a98554 615 return 0;
616}
3cc6851f 617
f9876f0b 618static struct megasas_instance_template megasas_instance_template_ppc = {
0d49016b 619
f9876f0b
SP		 620 .fire_cmd = megasas_fire_cmd_ppc,
621 .enable_intr = megasas_enable_intr_ppc,
b274cab7 622 .disable_intr = megasas_disable_intr_ppc,
f9876f0b
SP		 623 .clear_intr = megasas_clear_intr_ppc,
624 .read_fw_status_reg = megasas_read_fw_status_reg_ppc,
3cc6851f 625 .adp_reset = megasas_adp_reset_xscale,
39a98554 626 .check_reset = megasas_check_reset_ppc,
cd50ba8e 627 .service_isr = megasas_isr,
628 .tasklet = megasas_complete_cmd_dpc,
629 .init_adapter = megasas_init_adapter_mfi,
630 .build_and_issue_cmd = megasas_build_and_issue_cmd,
631 .issue_dcmd = megasas_issue_dcmd,
f9876f0b
SP		 632};
633
87911122
YB		 634/**
635 * megasas_enable_intr_skinny - Enables interrupts
636 * @regs: MFI register set
637 */
638static inline void
d46a3ad6 639megasas_enable_intr_skinny(struct megasas_instance *instance)
87911122 640{
d46a3ad6 641 struct megasas_register_set __iomem *regs;
da0dc9fb 642
d46a3ad6 643 regs = instance->reg_set;
87911122
YB		 644 writel(0xFFFFFFFF, &(regs)->outbound_intr_mask);
645
646 writel(~MFI_SKINNY_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
647
648 /* Dummy readl to force pci flush */
649 readl(&regs->outbound_intr_mask);
650}
651
652/**
653 * megasas_disable_intr_skinny - Disables interrupt
654 * @regs: MFI register set
655 */
656static inline void
d46a3ad6 657megasas_disable_intr_skinny(struct megasas_instance *instance)
87911122 658{
d46a3ad6 659 struct megasas_register_set __iomem *regs;
87911122 660 u32 mask = 0xFFFFFFFF;
da0dc9fb 661
d46a3ad6 662 regs = instance->reg_set;
87911122
YB		 663 writel(mask, &regs->outbound_intr_mask);
664 /* Dummy readl to force pci flush */
665 readl(&regs->outbound_intr_mask);
666}
667
668/**
669 * megasas_read_fw_status_reg_skinny - returns the current FW status value
670 * @regs: MFI register set
671 */
672static u32
673megasas_read_fw_status_reg_skinny(struct megasas_register_set __iomem *regs)
674{
675 return readl(&(regs)->outbound_scratch_pad);
676}
677
678/**
679 * megasas_clear_interrupt_skinny - Check & clear interrupt
680 * @regs: MFI register set
681 */
682static int
683megasas_clear_intr_skinny(struct megasas_register_set __iomem *regs)
684{
685 u32 status;
ebf054b0 686 u32 mfiStatus = 0;
687
87911122
YB		 688 /*
689 * Check if it is our interrupt
690 */
691 status = readl(&regs->outbound_intr_status);
692
693 if (!(status & MFI_SKINNY_ENABLE_INTERRUPT_MASK)) {
39a98554 694 return 0;
87911122
YB		 695 }
696
ebf054b0 697 /*
698 * Check if it is our interrupt
699 */
a3fda7dd 700 if ((megasas_read_fw_status_reg_skinny(regs) & MFI_STATE_MASK) ==
ebf054b0 701 MFI_STATE_FAULT) {
702 mfiStatus = MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
703 } else
704 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
705
87911122
YB		 706 /*
707 * Clear the interrupt by writing back the same value
708 */
709 writel(status, &regs->outbound_intr_status);
710
711 /*
da0dc9fb
BH		 712 * dummy read to flush PCI
713 */
87911122
YB		 714 readl(&regs->outbound_intr_status);
715
ebf054b0 716 return mfiStatus;
87911122
YB		 717}
718
719/**
720 * megasas_fire_cmd_skinny - Sends command to the FW
721 * @frame_phys_addr : Physical address of cmd
722 * @frame_count : Number of frames for the command
723 * @regs : MFI register set
724 */
725static inline void
0c79e681
YB		 726megasas_fire_cmd_skinny(struct megasas_instance *instance,
727 dma_addr_t frame_phys_addr,
728 u32 frame_count,
87911122
YB		 729 struct megasas_register_set __iomem *regs)
730{
0c79e681 731 unsigned long flags;
da0dc9fb 732
39a98554 733 spin_lock_irqsave(&instance->hba_lock, flags);
94cd65dd
SS		 734 writel(upper_32_bits(frame_phys_addr),
735 &(regs)->inbound_high_queue_port);
736 writel((lower_32_bits(frame_phys_addr) | (frame_count<<1))|1,
737 &(regs)->inbound_low_queue_port);
39a98554 738 spin_unlock_irqrestore(&instance->hba_lock, flags);
739}
740
39a98554 741/**
742 * megasas_check_reset_skinny - For controller reset check
743 * @regs: MFI register set
744 */
745static int
746megasas_check_reset_skinny(struct megasas_instance *instance,
747 struct megasas_register_set __iomem *regs)
748{
3cc6851f 749 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL)
750 return 1;
751
39a98554 752 return 0;
87911122
YB		 753}
754
755static struct megasas_instance_template megasas_instance_template_skinny = {
756
757 .fire_cmd = megasas_fire_cmd_skinny,
758 .enable_intr = megasas_enable_intr_skinny,
759 .disable_intr = megasas_disable_intr_skinny,
760 .clear_intr = megasas_clear_intr_skinny,
761 .read_fw_status_reg = megasas_read_fw_status_reg_skinny,
ebf054b0 762 .adp_reset = megasas_adp_reset_gen2,
39a98554 763 .check_reset = megasas_check_reset_skinny,
cd50ba8e 764 .service_isr = megasas_isr,
765 .tasklet = megasas_complete_cmd_dpc,
766 .init_adapter = megasas_init_adapter_mfi,
767 .build_and_issue_cmd = megasas_build_and_issue_cmd,
768 .issue_dcmd = megasas_issue_dcmd,
87911122
YB		 769};
770
771
6610a6b3
YB		 772/**
773* The following functions are defined for gen2 (deviceid : 0x78 0x79)
774* controllers
775*/
776
777/**
778 * megasas_enable_intr_gen2 - Enables interrupts
779 * @regs: MFI register set
780 */
781static inline void
d46a3ad6 782megasas_enable_intr_gen2(struct megasas_instance *instance)
6610a6b3 783{
d46a3ad6 784 struct megasas_register_set __iomem *regs;
da0dc9fb 785
d46a3ad6 786 regs = instance->reg_set;
6610a6b3
YB		 787 writel(0xFFFFFFFF, &(regs)->outbound_doorbell_clear);
788
789 /* write ~0x00000005 (4 & 1) to the intr mask*/
790 writel(~MFI_GEN2_ENABLE_INTERRUPT_MASK, &(regs)->outbound_intr_mask);
791
792 /* Dummy readl to force pci flush */
793 readl(&regs->outbound_intr_mask);
794}
795
796/**
797 * megasas_disable_intr_gen2 - Disables interrupt
798 * @regs: MFI register set
799 */
800static inline void
d46a3ad6 801megasas_disable_intr_gen2(struct megasas_instance *instance)
6610a6b3 802{
d46a3ad6 803 struct megasas_register_set __iomem *regs;
6610a6b3 804 u32 mask = 0xFFFFFFFF;
da0dc9fb 805
d46a3ad6 806 regs = instance->reg_set;
6610a6b3
YB		 807 writel(mask, &regs->outbound_intr_mask);
808 /* Dummy readl to force pci flush */
809 readl(&regs->outbound_intr_mask);
810}
811
812/**
813 * megasas_read_fw_status_reg_gen2 - returns the current FW status value
814 * @regs: MFI register set
815 */
816static u32
817megasas_read_fw_status_reg_gen2(struct megasas_register_set __iomem *regs)
818{
819 return readl(&(regs)->outbound_scratch_pad);
820}
821
822/**
823 * megasas_clear_interrupt_gen2 - Check & clear interrupt
824 * @regs: MFI register set
825 */
826static int
827megasas_clear_intr_gen2(struct megasas_register_set __iomem *regs)
828{
829 u32 status;
39a98554 830 u32 mfiStatus = 0;
da0dc9fb 831
6610a6b3
YB		 832 /*
833 * Check if it is our interrupt
834 */
835 status = readl(&regs->outbound_intr_status);
836
b5bccadd 837 if (status & MFI_INTR_FLAG_REPLY_MESSAGE) {
39a98554 838 mfiStatus = MFI_INTR_FLAG_REPLY_MESSAGE;
839 }
840 if (status & MFI_G2_OUTBOUND_DOORBELL_CHANGE_INTERRUPT) {
841 mfiStatus |= MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE;
842 }
6610a6b3
YB		 843
844 /*
845 * Clear the interrupt by writing back the same value
846 */
39a98554 847 if (mfiStatus)
848 writel(status, &regs->outbound_doorbell_clear);
6610a6b3
YB		 849
850 /* Dummy readl to force pci flush */
851 readl(&regs->outbound_intr_status);
852
39a98554 853 return mfiStatus;
6610a6b3
YB		 854}
855/**
856 * megasas_fire_cmd_gen2 - Sends command to the FW
857 * @frame_phys_addr : Physical address of cmd
858 * @frame_count : Number of frames for the command
859 * @regs : MFI register set
860 */
861static inline void
0c79e681
YB		 862megasas_fire_cmd_gen2(struct megasas_instance *instance,
863 dma_addr_t frame_phys_addr,
864 u32 frame_count,
6610a6b3
YB		 865 struct megasas_register_set __iomem *regs)
866{
39a98554 867 unsigned long flags;
da0dc9fb 868
39a98554 869 spin_lock_irqsave(&instance->hba_lock, flags);
6610a6b3
YB		 870 writel((frame_phys_addr | (frame_count<<1))|1,
871 &(regs)->inbound_queue_port);
39a98554 872 spin_unlock_irqrestore(&instance->hba_lock, flags);
873}
874
875/**
876 * megasas_adp_reset_gen2 - For controller reset
877 * @regs: MFI register set
878 */
879static int
880megasas_adp_reset_gen2(struct megasas_instance *instance,
881 struct megasas_register_set __iomem *reg_set)
882{
da0dc9fb
BH		 883 u32 retry = 0 ;
884 u32 HostDiag;
885 u32 __iomem *seq_offset = &reg_set->seq_offset;
886 u32 __iomem *hostdiag_offset = &reg_set->host_diag;
ebf054b0 887
888 if (instance->instancet == &megasas_instance_template_skinny) {
889 seq_offset = &reg_set->fusion_seq_offset;
890 hostdiag_offset = &reg_set->fusion_host_diag;
891 }
892
893 writel(0, seq_offset);
894 writel(4, seq_offset);
895 writel(0xb, seq_offset);
896 writel(2, seq_offset);
897 writel(7, seq_offset);
898 writel(0xd, seq_offset);
39a98554 899
39a98554 900 msleep(1000);
901
ebf054b0 902 HostDiag = (u32)readl(hostdiag_offset);
39a98554 903
da0dc9fb 904 while (!(HostDiag & DIAG_WRITE_ENABLE)) {
39a98554 905 msleep(100);
ebf054b0 906 HostDiag = (u32)readl(hostdiag_offset);
1be18254 907 dev_notice(&instance->pdev->dev, "RESETGEN2: retry=%x, hostdiag=%x\n",
39a98554 908 retry, HostDiag);
909
910 if (retry++ >= 100)
911 return 1;
912
913 }
914
1be18254 915 dev_notice(&instance->pdev->dev, "ADP_RESET_GEN2: HostDiag=%x\n", HostDiag);
39a98554 916
ebf054b0 917 writel((HostDiag | DIAG_RESET_ADAPTER), hostdiag_offset);
39a98554 918
919 ssleep(10);
920
ebf054b0 921 HostDiag = (u32)readl(hostdiag_offset);
da0dc9fb 922 while (HostDiag & DIAG_RESET_ADAPTER) {
39a98554 923 msleep(100);
ebf054b0 924 HostDiag = (u32)readl(hostdiag_offset);
1be18254 925 dev_notice(&instance->pdev->dev, "RESET_GEN2: retry=%x, hostdiag=%x\n",
39a98554 926 retry, HostDiag);
927
928 if (retry++ >= 1000)
929 return 1;
930
931 }
932 return 0;
933}
934
935/**
936 * megasas_check_reset_gen2 - For controller reset check
937 * @regs: MFI register set
938 */
939static int
940megasas_check_reset_gen2(struct megasas_instance *instance,
941 struct megasas_register_set __iomem *regs)
942{
707e09bd
YB		 943 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
944 return 1;
945 }
946
39a98554 947 return 0;
6610a6b3
YB		 948}
949
950static struct megasas_instance_template megasas_instance_template_gen2 = {
951
952 .fire_cmd = megasas_fire_cmd_gen2,
953 .enable_intr = megasas_enable_intr_gen2,
954 .disable_intr = megasas_disable_intr_gen2,
955 .clear_intr = megasas_clear_intr_gen2,
956 .read_fw_status_reg = megasas_read_fw_status_reg_gen2,
39a98554 957 .adp_reset = megasas_adp_reset_gen2,
958 .check_reset = megasas_check_reset_gen2,
cd50ba8e 959 .service_isr = megasas_isr,
960 .tasklet = megasas_complete_cmd_dpc,
961 .init_adapter = megasas_init_adapter_mfi,
962 .build_and_issue_cmd = megasas_build_and_issue_cmd,
963 .issue_dcmd = megasas_issue_dcmd,
6610a6b3
YB		 964};
965
f9876f0b
SP		 966/**
967* This is the end of set of functions & definitions
39a98554 968* specific to gen2 (deviceid : 0x78, 0x79) controllers
f9876f0b
SP		 969*/
970
9c915a8c 971/*
972 * Template added for TB (Fusion)
973 */
974extern struct megasas_instance_template megasas_instance_template_fusion;
975
c4a3e0a5
BS		 976/**
977 * megasas_issue_polled - Issues a polling command
978 * @instance: Adapter soft state
0d49016b 979 * @cmd: Command packet to be issued
c4a3e0a5 980 *
2be2a988 981 * For polling, MFI requires the cmd_status to be set to MFI_STAT_INVALID_STATUS before posting.
c4a3e0a5 982 */
9c915a8c 983int
c4a3e0a5
BS		 984megasas_issue_polled(struct megasas_instance *instance, struct megasas_cmd *cmd)
985{
229fe47c 986 int seconds;
c4a3e0a5
BS		 987 struct megasas_header *frame_hdr = &cmd->frame->hdr;
988
94cd65dd
SS		 989 frame_hdr->cmd_status = MFI_CMD_STATUS_POLL_MODE;
990 frame_hdr->flags |= cpu_to_le16(MFI_FRAME_DONT_POST_IN_REPLY_QUEUE);
c4a3e0a5
BS		 991
992 /*
993 * Issue the frame using inbound queue port
994 */
9c915a8c 995 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS		 996
997 /*
998 * Wait for cmd_status to change
999 */
229fe47c 1000 if (instance->requestorId)
1001 seconds = MEGASAS_ROUTINE_WAIT_TIME_VF;
1002 else
1003 seconds = MFI_POLL_TIMEOUT_SECS;
1004 return wait_and_poll(instance, cmd, seconds);
c4a3e0a5
BS		 1005}
1006
1007/**
1008 * megasas_issue_blocked_cmd - Synchronous wrapper around regular FW cmds
1009 * @instance: Adapter soft state
1010 * @cmd: Command to be issued
cfbe7554 1011 * @timeout: Timeout in seconds
c4a3e0a5
BS		 1012 *
1013 * This function waits on an event for the command to be returned from ISR.
2a3681e5 1014 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 1015 * Used to issue ioctl commands.
1016 */
90dc9d98 1017int
c4a3e0a5 1018megasas_issue_blocked_cmd(struct megasas_instance *instance,
cfbe7554 1019 struct megasas_cmd *cmd, int timeout)
c4a3e0a5 1020{
cfbe7554 1021 int ret = 0;
da0dc9fb 1022
2be2a988 1023 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1024
9c915a8c 1025 instance->instancet->issue_dcmd(instance, cmd);
cfbe7554
SS		 1026 if (timeout) {
1027 ret = wait_event_timeout(instance->int_cmd_wait_q,
2be2a988 1028 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554
SS		 1029 if (!ret)
1030 return 1;
1031 } else
1032 wait_event(instance->int_cmd_wait_q,
2be2a988 1033 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
c4a3e0a5 1034
2be2a988
SS		 1035 return (cmd->cmd_status_drv == MFI_STAT_OK) ?
1036 0 : 1;
c4a3e0a5
BS		 1037}
1038
1039/**
1040 * megasas_issue_blocked_abort_cmd - Aborts previously issued cmd
1041 * @instance: Adapter soft state
1042 * @cmd_to_abort: Previously issued cmd to be aborted
cfbe7554 1043 * @timeout: Timeout in seconds
c4a3e0a5 1044 *
cfbe7554 1045 * MFI firmware can abort previously issued AEN comamnd (automatic event
c4a3e0a5 1046 * notification). The megasas_issue_blocked_abort_cmd() issues such abort
2a3681e5
SP		 1047 * cmd and waits for return status.
1048 * Max wait time is MEGASAS_INTERNAL_CMD_WAIT_TIME secs
c4a3e0a5
BS		 1049 */
1050static int
1051megasas_issue_blocked_abort_cmd(struct megasas_instance *instance,
cfbe7554 1052 struct megasas_cmd *cmd_to_abort, int timeout)
c4a3e0a5
BS		 1053{
1054 struct megasas_cmd *cmd;
1055 struct megasas_abort_frame *abort_fr;
cfbe7554 1056 int ret = 0;
c4a3e0a5
BS		 1057
1058 cmd = megasas_get_cmd(instance);
1059
1060 if (!cmd)
1061 return -1;
1062
1063 abort_fr = &cmd->frame->abort;
1064
1065 /*
1066 * Prepare and issue the abort frame
1067 */
1068 abort_fr->cmd = MFI_CMD_ABORT;
2be2a988 1069 abort_fr->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 1070 abort_fr->flags = cpu_to_le16(0);
1071 abort_fr->abort_context = cpu_to_le32(cmd_to_abort->index);
1072 abort_fr->abort_mfi_phys_addr_lo =
1073 cpu_to_le32(lower_32_bits(cmd_to_abort->frame_phys_addr));
1074 abort_fr->abort_mfi_phys_addr_hi =
1075 cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr));
c4a3e0a5
BS		 1076
1077 cmd->sync_cmd = 1;
2be2a988 1078 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
c4a3e0a5 1079
9c915a8c 1080 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5 1081
cfbe7554
SS		 1082 if (timeout) {
1083 ret = wait_event_timeout(instance->abort_cmd_wait_q,
2be2a988 1084 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS, timeout * HZ);
cfbe7554
SS		 1085 if (!ret) {
1086 dev_err(&instance->pdev->dev, "Command timedout"
1087 "from %s\n", __func__);
1088 return 1;
1089 }
1090 } else
1091 wait_event(instance->abort_cmd_wait_q,
2be2a988 1092 cmd->cmd_status_drv != MFI_STAT_INVALID_STATUS);
cfbe7554 1093
39a98554 1094 cmd->sync_cmd = 0;
c4a3e0a5
BS		 1095
1096 megasas_return_cmd(instance, cmd);
1097 return 0;
1098}
1099
1100/**
1101 * megasas_make_sgl32 - Prepares 32-bit SGL
1102 * @instance: Adapter soft state
1103 * @scp: SCSI command from the mid-layer
1104 * @mfi_sgl: SGL to be filled in
1105 *
1106 * If successful, this function returns the number of SG elements. Otherwise,
1107 * it returnes -1.
1108 */
858119e1 1109static int
c4a3e0a5
BS		 1110megasas_make_sgl32(struct megasas_instance *instance, struct scsi_cmnd *scp,
1111 union megasas_sgl *mfi_sgl)
1112{
1113 int i;
1114 int sge_count;
1115 struct scatterlist *os_sgl;
1116
155d98f0
FT		 1117 sge_count = scsi_dma_map(scp);
1118 BUG_ON(sge_count < 0);
c4a3e0a5 1119
155d98f0
FT		 1120 if (sge_count) {
1121 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1122 mfi_sgl->sge32[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1123 mfi_sgl->sge32[i].phys_addr = cpu_to_le32(sg_dma_address(os_sgl));
155d98f0 1124 }
c4a3e0a5 1125 }
c4a3e0a5
BS		 1126 return sge_count;
1127}
1128
1129/**
1130 * megasas_make_sgl64 - Prepares 64-bit SGL
1131 * @instance: Adapter soft state
1132 * @scp: SCSI command from the mid-layer
1133 * @mfi_sgl: SGL to be filled in
1134 *
1135 * If successful, this function returns the number of SG elements. Otherwise,
1136 * it returnes -1.
1137 */
858119e1 1138static int
c4a3e0a5
BS		 1139megasas_make_sgl64(struct megasas_instance *instance, struct scsi_cmnd *scp,
1140 union megasas_sgl *mfi_sgl)
1141{
1142 int i;
1143 int sge_count;
1144 struct scatterlist *os_sgl;
1145
155d98f0
FT		 1146 sge_count = scsi_dma_map(scp);
1147 BUG_ON(sge_count < 0);
c4a3e0a5 1148
155d98f0
FT		 1149 if (sge_count) {
1150 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1151 mfi_sgl->sge64[i].length = cpu_to_le32(sg_dma_len(os_sgl));
1152 mfi_sgl->sge64[i].phys_addr = cpu_to_le64(sg_dma_address(os_sgl));
155d98f0 1153 }
c4a3e0a5 1154 }
c4a3e0a5
BS		 1155 return sge_count;
1156}
1157
f4c9a131
YB		 1158/**
1159 * megasas_make_sgl_skinny - Prepares IEEE SGL
1160 * @instance: Adapter soft state
1161 * @scp: SCSI command from the mid-layer
1162 * @mfi_sgl: SGL to be filled in
1163 *
1164 * If successful, this function returns the number of SG elements. Otherwise,
1165 * it returnes -1.
1166 */
1167static int
1168megasas_make_sgl_skinny(struct megasas_instance *instance,
1169 struct scsi_cmnd *scp, union megasas_sgl *mfi_sgl)
1170{
1171 int i;
1172 int sge_count;
1173 struct scatterlist *os_sgl;
1174
1175 sge_count = scsi_dma_map(scp);
1176
1177 if (sge_count) {
1178 scsi_for_each_sg(scp, os_sgl, sge_count, i) {
94cd65dd
SS		 1179 mfi_sgl->sge_skinny[i].length =
1180 cpu_to_le32(sg_dma_len(os_sgl));
f4c9a131 1181 mfi_sgl->sge_skinny[i].phys_addr =
94cd65dd
SS		 1182 cpu_to_le64(sg_dma_address(os_sgl));
1183 mfi_sgl->sge_skinny[i].flag = cpu_to_le32(0);
f4c9a131
YB		 1184 }
1185 }
1186 return sge_count;
1187}
1188
b1df99d9
SP		 1189 /**
1190 * megasas_get_frame_count - Computes the number of frames
d532dbe2 1191 * @frame_type : type of frame- io or pthru frame
b1df99d9
SP		 1192 * @sge_count : number of sg elements
1193 *
1194 * Returns the number of frames required for numnber of sge's (sge_count)
1195 */
1196
f4c9a131
YB		 1197static u32 megasas_get_frame_count(struct megasas_instance *instance,
1198 u8 sge_count, u8 frame_type)
b1df99d9
SP		 1199{
1200 int num_cnt;
1201 int sge_bytes;
1202 u32 sge_sz;
da0dc9fb 1203 u32 frame_count = 0;
b1df99d9
SP		 1204
1205 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
1206 sizeof(struct megasas_sge32);
1207
f4c9a131
YB		 1208 if (instance->flag_ieee) {
1209 sge_sz = sizeof(struct megasas_sge_skinny);
1210 }
1211
b1df99d9 1212 /*
d532dbe2 1213 * Main frame can contain 2 SGEs for 64-bit SGLs and
1214 * 3 SGEs for 32-bit SGLs for ldio &
1215 * 1 SGEs for 64-bit SGLs and
1216 * 2 SGEs for 32-bit SGLs for pthru frame
1217 */
1218 if (unlikely(frame_type == PTHRU_FRAME)) {
f4c9a131
YB		 1219 if (instance->flag_ieee == 1) {
1220 num_cnt = sge_count - 1;
1221 } else if (IS_DMA64)
d532dbe2 1222 num_cnt = sge_count - 1;
1223 else
1224 num_cnt = sge_count - 2;
1225 } else {
f4c9a131
YB		 1226 if (instance->flag_ieee == 1) {
1227 num_cnt = sge_count - 1;
1228 } else if (IS_DMA64)
d532dbe2 1229 num_cnt = sge_count - 2;
1230 else
1231 num_cnt = sge_count - 3;
1232 }
b1df99d9 1233
da0dc9fb 1234 if (num_cnt > 0) {
b1df99d9
SP		 1235 sge_bytes = sge_sz * num_cnt;
1236
1237 frame_count = (sge_bytes / MEGAMFI_FRAME_SIZE) +
1238 ((sge_bytes % MEGAMFI_FRAME_SIZE) ? 1 : 0) ;
1239 }
1240 /* Main frame */
da0dc9fb 1241 frame_count += 1;
b1df99d9
SP		 1242
1243 if (frame_count > 7)
1244 frame_count = 8;
1245 return frame_count;
1246}
1247
c4a3e0a5
BS		 1248/**
1249 * megasas_build_dcdb - Prepares a direct cdb (DCDB) command
1250 * @instance: Adapter soft state
1251 * @scp: SCSI command
1252 * @cmd: Command to be prepared in
1253 *
1254 * This function prepares CDB commands. These are typcially pass-through
1255 * commands to the devices.
1256 */
858119e1 1257static int
c4a3e0a5
BS		 1258megasas_build_dcdb(struct megasas_instance *instance, struct scsi_cmnd *scp,
1259 struct megasas_cmd *cmd)
1260{
c4a3e0a5
BS		 1261 u32 is_logical;
1262 u32 device_id;
1263 u16 flags = 0;
1264 struct megasas_pthru_frame *pthru;
1265
1266 is_logical = MEGASAS_IS_LOGICAL(scp);
4a5c814d 1267 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1268 pthru = (struct megasas_pthru_frame *)cmd->frame;
1269
1270 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1271 flags = MFI_FRAME_DIR_WRITE;
1272 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1273 flags = MFI_FRAME_DIR_READ;
1274 else if (scp->sc_data_direction == PCI_DMA_NONE)
1275 flags = MFI_FRAME_DIR_NONE;
1276
f4c9a131
YB		 1277 if (instance->flag_ieee == 1) {
1278 flags |= MFI_FRAME_IEEE;
1279 }
1280
c4a3e0a5
BS		 1281 /*
1282 * Prepare the DCDB frame
1283 */
1284 pthru->cmd = (is_logical) ? MFI_CMD_LD_SCSI_IO : MFI_CMD_PD_SCSI_IO;
1285 pthru->cmd_status = 0x0;
1286 pthru->scsi_status = 0x0;
1287 pthru->target_id = device_id;
1288 pthru->lun = scp->device->lun;
1289 pthru->cdb_len = scp->cmd_len;
1290 pthru->timeout = 0;
780a3762 1291 pthru->pad_0 = 0;
94cd65dd
SS		 1292 pthru->flags = cpu_to_le16(flags);
1293 pthru->data_xfer_len = cpu_to_le32(scsi_bufflen(scp));
c4a3e0a5
BS		 1294
1295 memcpy(pthru->cdb, scp->cmnd, scp->cmd_len);
1296
8d568253 1297 /*
da0dc9fb
BH		 1298 * If the command is for the tape device, set the
1299 * pthru timeout to the os layer timeout value.
1300 */
8d568253
YB		 1301 if (scp->device->type == TYPE_TAPE) {
1302 if ((scp->request->timeout / HZ) > 0xFFFF)
c6f5bf81 1303 pthru->timeout = cpu_to_le16(0xFFFF);
8d568253 1304 else
94cd65dd 1305 pthru->timeout = cpu_to_le16(scp->request->timeout / HZ);
8d568253
YB		 1306 }
1307
c4a3e0a5
BS		 1308 /*
1309 * Construct SGL
1310 */
f4c9a131 1311 if (instance->flag_ieee == 1) {
94cd65dd 1312 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1313 pthru->sge_count = megasas_make_sgl_skinny(instance, scp,
1314 &pthru->sgl);
1315 } else if (IS_DMA64) {
94cd65dd 1316 pthru->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1317 pthru->sge_count = megasas_make_sgl64(instance, scp,
1318 &pthru->sgl);
1319 } else
1320 pthru->sge_count = megasas_make_sgl32(instance, scp,
1321 &pthru->sgl);
1322
bdc6fb8d 1323 if (pthru->sge_count > instance->max_num_sge) {
1be18254 1324 dev_err(&instance->pdev->dev, "DCDB too many SGE NUM=%x\n",
bdc6fb8d
YB		 1325 pthru->sge_count);
1326 return 0;
1327 }
1328
c4a3e0a5
BS		 1329 /*
1330 * Sense info specific
1331 */
1332 pthru->sense_len = SCSI_SENSE_BUFFERSIZE;
94cd65dd
SS		 1333 pthru->sense_buf_phys_addr_hi =
1334 cpu_to_le32(upper_32_bits(cmd->sense_phys_addr));
1335 pthru->sense_buf_phys_addr_lo =
1336 cpu_to_le32(lower_32_bits(cmd->sense_phys_addr));
c4a3e0a5 1337
c4a3e0a5
BS		 1338 /*
1339 * Compute the total number of frames this command consumes. FW uses
1340 * this number to pull sufficient number of frames from host memory.
1341 */
f4c9a131 1342 cmd->frame_count = megasas_get_frame_count(instance, pthru->sge_count,
d532dbe2 1343 PTHRU_FRAME);
c4a3e0a5
BS		 1344
1345 return cmd->frame_count;
1346}
1347
1348/**
1349 * megasas_build_ldio - Prepares IOs to logical devices
1350 * @instance: Adapter soft state
1351 * @scp: SCSI command
fd589a8f 1352 * @cmd: Command to be prepared
c4a3e0a5
BS		 1353 *
1354 * Frames (and accompanying SGLs) for regular SCSI IOs use this function.
1355 */
858119e1 1356static int
c4a3e0a5
BS		 1357megasas_build_ldio(struct megasas_instance *instance, struct scsi_cmnd *scp,
1358 struct megasas_cmd *cmd)
1359{
c4a3e0a5
BS		 1360 u32 device_id;
1361 u8 sc = scp->cmnd[0];
1362 u16 flags = 0;
1363 struct megasas_io_frame *ldio;
1364
4a5c814d 1365 device_id = MEGASAS_DEV_INDEX(scp);
c4a3e0a5
BS		 1366 ldio = (struct megasas_io_frame *)cmd->frame;
1367
1368 if (scp->sc_data_direction == PCI_DMA_TODEVICE)
1369 flags = MFI_FRAME_DIR_WRITE;
1370 else if (scp->sc_data_direction == PCI_DMA_FROMDEVICE)
1371 flags = MFI_FRAME_DIR_READ;
1372
f4c9a131
YB		 1373 if (instance->flag_ieee == 1) {
1374 flags |= MFI_FRAME_IEEE;
1375 }
1376
c4a3e0a5 1377 /*
b1df99d9 1378 * Prepare the Logical IO frame: 2nd bit is zero for all read cmds
c4a3e0a5
BS		 1379 */
1380 ldio->cmd = (sc & 0x02) ? MFI_CMD_LD_WRITE : MFI_CMD_LD_READ;
1381 ldio->cmd_status = 0x0;
1382 ldio->scsi_status = 0x0;
1383 ldio->target_id = device_id;
1384 ldio->timeout = 0;
1385 ldio->reserved_0 = 0;
1386 ldio->pad_0 = 0;
94cd65dd 1387 ldio->flags = cpu_to_le16(flags);
c4a3e0a5
BS		 1388 ldio->start_lba_hi = 0;
1389 ldio->access_byte = (scp->cmd_len != 6) ? scp->cmnd[1] : 0;
1390
1391 /*
1392 * 6-byte READ(0x08) or WRITE(0x0A) cdb
1393 */
1394 if (scp->cmd_len == 6) {
94cd65dd
SS		 1395 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[4]);
1396 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[1] << 16) |
1397 ((u32) scp->cmnd[2] << 8) |
1398 (u32) scp->cmnd[3]);
c4a3e0a5 1399
94cd65dd 1400 ldio->start_lba_lo &= cpu_to_le32(0x1FFFFF);
c4a3e0a5
BS		 1401 }
1402
1403 /*
1404 * 10-byte READ(0x28) or WRITE(0x2A) cdb
1405 */
1406 else if (scp->cmd_len == 10) {
94cd65dd
SS		 1407 ldio->lba_count = cpu_to_le32((u32) scp->cmnd[8] |
1408 ((u32) scp->cmnd[7] << 8));
1409 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1410 ((u32) scp->cmnd[3] << 16) |
1411 ((u32) scp->cmnd[4] << 8) |
1412 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1413 }
1414
1415 /*
1416 * 12-byte READ(0xA8) or WRITE(0xAA) cdb
1417 */
1418 else if (scp->cmd_len == 12) {
94cd65dd
SS		 1419 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1420 ((u32) scp->cmnd[7] << 16) |
1421 ((u32) scp->cmnd[8] << 8) |
1422 (u32) scp->cmnd[9]);
c4a3e0a5 1423
94cd65dd
SS		 1424 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1425 ((u32) scp->cmnd[3] << 16) |
1426 ((u32) scp->cmnd[4] << 8) |
1427 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1428 }
1429
1430 /*
1431 * 16-byte READ(0x88) or WRITE(0x8A) cdb
1432 */
1433 else if (scp->cmd_len == 16) {
94cd65dd
SS		 1434 ldio->lba_count = cpu_to_le32(((u32) scp->cmnd[10] << 24) |
1435 ((u32) scp->cmnd[11] << 16) |
1436 ((u32) scp->cmnd[12] << 8) |
1437 (u32) scp->cmnd[13]);
c4a3e0a5 1438
94cd65dd
SS		 1439 ldio->start_lba_lo = cpu_to_le32(((u32) scp->cmnd[6] << 24) |
1440 ((u32) scp->cmnd[7] << 16) |
1441 ((u32) scp->cmnd[8] << 8) |
1442 (u32) scp->cmnd[9]);
c4a3e0a5 1443
94cd65dd
SS		 1444 ldio->start_lba_hi = cpu_to_le32(((u32) scp->cmnd[2] << 24) |
1445 ((u32) scp->cmnd[3] << 16) |
1446 ((u32) scp->cmnd[4] << 8) |
1447 (u32) scp->cmnd[5]);
c4a3e0a5
BS		 1448
1449 }
1450
1451 /*
1452 * Construct SGL
1453 */
f4c9a131 1454 if (instance->flag_ieee) {
94cd65dd 1455 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
f4c9a131
YB		 1456 ldio->sge_count = megasas_make_sgl_skinny(instance, scp,
1457 &ldio->sgl);
1458 } else if (IS_DMA64) {
94cd65dd 1459 ldio->flags |= cpu_to_le16(MFI_FRAME_SGL64);
c4a3e0a5
BS		 1460 ldio->sge_count = megasas_make_sgl64(instance, scp, &ldio->sgl);
1461 } else
1462 ldio->sge_count = megasas_make_sgl32(instance, scp, &ldio->sgl);
1463
bdc6fb8d 1464 if (ldio->sge_count > instance->max_num_sge) {
1be18254 1465 dev_err(&instance->pdev->dev, "build_ld_io: sge_count = %x\n",
bdc6fb8d
YB		 1466 ldio->sge_count);
1467 return 0;
1468 }
1469
c4a3e0a5
BS		 1470 /*
1471 * Sense info specific
1472 */
1473 ldio->sense_len = SCSI_SENSE_BUFFERSIZE;
1474 ldio->sense_buf_phys_addr_hi = 0;
94cd65dd 1475 ldio->sense_buf_phys_addr_lo = cpu_to_le32(cmd->sense_phys_addr);
c4a3e0a5 1476
b1df99d9
SP		 1477 /*
1478 * Compute the total number of frames this command consumes. FW uses
1479 * this number to pull sufficient number of frames from host memory.
1480 */
f4c9a131
YB		 1481 cmd->frame_count = megasas_get_frame_count(instance,
1482 ldio->sge_count, IO_FRAME);
c4a3e0a5
BS		 1483
1484 return cmd->frame_count;
1485}
1486
1487/**
7497cde8
SS		 1488 * megasas_cmd_type - Checks if the cmd is for logical drive/sysPD
1489 * and whether it's RW or non RW
cb59aa6a 1490 * @scmd: SCSI command
0d49016b 1491 *
c4a3e0a5 1492 */
7497cde8 1493inline int megasas_cmd_type(struct scsi_cmnd *cmd)
c4a3e0a5 1494{
7497cde8
SS		 1495 int ret;
1496
cb59aa6a
SP		 1497 switch (cmd->cmnd[0]) {
1498 case READ_10:
1499 case WRITE_10:
1500 case READ_12:
1501 case WRITE_12:
1502 case READ_6:
1503 case WRITE_6:
1504 case READ_16:
1505 case WRITE_16:
7497cde8
SS		 1506 ret = (MEGASAS_IS_LOGICAL(cmd)) ?
1507 READ_WRITE_LDIO : READ_WRITE_SYSPDIO;
1508 break;
cb59aa6a 1509 default:
7497cde8
SS		 1510 ret = (MEGASAS_IS_LOGICAL(cmd)) ?
1511 NON_READ_WRITE_LDIO : NON_READ_WRITE_SYSPDIO;
c4a3e0a5 1512 }
7497cde8 1513 return ret;
c4a3e0a5
BS		 1514}
1515
658dcedb
SP		 1516 /**
1517 * megasas_dump_pending_frames - Dumps the frame address of all pending cmds
da0dc9fb 1518 * in FW
658dcedb
SP		 1519 * @instance: Adapter soft state
1520 */
1521static inline void
1522megasas_dump_pending_frames(struct megasas_instance *instance)
1523{
1524 struct megasas_cmd *cmd;
1525 int i,n;
1526 union megasas_sgl *mfi_sgl;
1527 struct megasas_io_frame *ldio;
1528 struct megasas_pthru_frame *pthru;
1529 u32 sgcount;
1530 u32 max_cmd = instance->max_fw_cmds;
1531
1be18254
BH		 1532 dev_err(&instance->pdev->dev, "[%d]: Dumping Frame Phys Address of all pending cmds in FW\n",instance->host->host_no);
1533 dev_err(&instance->pdev->dev, "[%d]: Total OS Pending cmds : %d\n",instance->host->host_no,atomic_read(&instance->fw_outstanding));
658dcedb 1534 if (IS_DMA64)
1be18254 1535 dev_err(&instance->pdev->dev, "[%d]: 64 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1536 else
1be18254 1537 dev_err(&instance->pdev->dev, "[%d]: 32 bit SGLs were sent to FW\n",instance->host->host_no);
658dcedb 1538
1be18254 1539 dev_err(&instance->pdev->dev, "[%d]: Pending OS cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1540 for (i = 0; i < max_cmd; i++) {
1541 cmd = instance->cmd_list[i];
da0dc9fb 1542 if (!cmd->scmd)
658dcedb 1543 continue;
1be18254 1544 dev_err(&instance->pdev->dev, "[%d]: Frame addr :0x%08lx : ",instance->host->host_no,(unsigned long)cmd->frame_phys_addr);
7497cde8 1545 if (megasas_cmd_type(cmd->scmd) == READ_WRITE_LDIO) {
658dcedb
SP		 1546 ldio = (struct megasas_io_frame *)cmd->frame;
1547 mfi_sgl = &ldio->sgl;
1548 sgcount = ldio->sge_count;
1be18254 1549 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x,"
94cd65dd
SS		 1550 " lba lo : 0x%x, lba_hi : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1551 instance->host->host_no, cmd->frame_count, ldio->cmd, ldio->target_id,
1552 le32_to_cpu(ldio->start_lba_lo), le32_to_cpu(ldio->start_lba_hi),
1553 le32_to_cpu(ldio->sense_buf_phys_addr_lo), sgcount);
da0dc9fb 1554 } else {
658dcedb
SP		 1555 pthru = (struct megasas_pthru_frame *) cmd->frame;
1556 mfi_sgl = &pthru->sgl;
1557 sgcount = pthru->sge_count;
1be18254 1558 dev_err(&instance->pdev->dev, "[%d]: frame count : 0x%x, Cmd : 0x%x, Tgt id : 0x%x, "
94cd65dd
SS		 1559 "lun : 0x%x, cdb_len : 0x%x, data xfer len : 0x%x, sense_buf addr : 0x%x,sge count : 0x%x\n",
1560 instance->host->host_no, cmd->frame_count, pthru->cmd, pthru->target_id,
1561 pthru->lun, pthru->cdb_len, le32_to_cpu(pthru->data_xfer_len),
1562 le32_to_cpu(pthru->sense_buf_phys_addr_lo), sgcount);
658dcedb 1563 }
da0dc9fb
BH		 1564 if (megasas_dbg_lvl & MEGASAS_DBG_LVL) {
1565 for (n = 0; n < sgcount; n++) {
1566 if (IS_DMA64)
1567 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%llx\n",
1568 le32_to_cpu(mfi_sgl->sge64[n].length),
1569 le64_to_cpu(mfi_sgl->sge64[n].phys_addr));
1570 else
1571 dev_err(&instance->pdev->dev, "sgl len : 0x%x, sgl addr : 0x%x\n",
1572 le32_to_cpu(mfi_sgl->sge32[n].length),
1573 le32_to_cpu(mfi_sgl->sge32[n].phys_addr));
658dcedb
SP		 1574 }
1575 }
658dcedb 1576 } /*for max_cmd*/
1be18254 1577 dev_err(&instance->pdev->dev, "[%d]: Pending Internal cmds in FW : \n",instance->host->host_no);
658dcedb
SP		 1578 for (i = 0; i < max_cmd; i++) {
1579
1580 cmd = instance->cmd_list[i];
1581
da0dc9fb 1582 if (cmd->sync_cmd == 1)
1be18254 1583 dev_err(&instance->pdev->dev, "0x%08lx : ", (unsigned long)cmd->frame_phys_addr);
658dcedb 1584 }
1be18254 1585 dev_err(&instance->pdev->dev, "[%d]: Dumping Done\n\n",instance->host->host_no);
658dcedb
SP		 1586}
1587
cd50ba8e 1588u32
1589megasas_build_and_issue_cmd(struct megasas_instance *instance,
1590 struct scsi_cmnd *scmd)
1591{
1592 struct megasas_cmd *cmd;
1593 u32 frame_count;
1594
1595 cmd = megasas_get_cmd(instance);
1596 if (!cmd)
1597 return SCSI_MLQUEUE_HOST_BUSY;
1598
1599 /*
1600 * Logical drive command
1601 */
7497cde8 1602 if (megasas_cmd_type(scmd) == READ_WRITE_LDIO)
cd50ba8e 1603 frame_count = megasas_build_ldio(instance, scmd, cmd);
1604 else
1605 frame_count = megasas_build_dcdb(instance, scmd, cmd);
1606
1607 if (!frame_count)
1608 goto out_return_cmd;
1609
1610 cmd->scmd = scmd;
1611 scmd->SCp.ptr = (char *)cmd;
1612
1613 /*
1614 * Issue the command to the FW
1615 */
1616 atomic_inc(&instance->fw_outstanding);
1617
1618 instance->instancet->fire_cmd(instance, cmd->frame_phys_addr,
1619 cmd->frame_count-1, instance->reg_set);
cd50ba8e 1620
1621 return 0;
1622out_return_cmd:
1623 megasas_return_cmd(instance, cmd);
1624 return 1;
1625}
1626
1627
c4a3e0a5
BS		 1628/**
1629 * megasas_queue_command - Queue entry point
1630 * @scmd: SCSI command to be queued
1631 * @done: Callback entry point
1632 */
1633static int
fb1a24ff 1634megasas_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd)
c4a3e0a5 1635{
c4a3e0a5 1636 struct megasas_instance *instance;
39a98554 1637 unsigned long flags;
c4a3e0a5
BS		 1638
1639 instance = (struct megasas_instance *)
1640 scmd->device->host->hostdata;
af37acfb 1641
aa00832b
SS		 1642 if (instance->unload == 1) {
1643 scmd->result = DID_NO_CONNECT << 16;
1644 scmd->scsi_done(scmd);
1645 return 0;
1646 }
1647
39a98554 1648 if (instance->issuepend_done == 0)
af37acfb
SP		 1649 return SCSI_MLQUEUE_HOST_BUSY;
1650
39a98554 1651 spin_lock_irqsave(&instance->hba_lock, flags);
b09e66da 1652
229fe47c 1653 /* Check for an mpio path and adjust behavior */
1654 if (instance->adprecovery == MEGASAS_ADPRESET_SM_INFAULT) {
1655 if (megasas_check_mpio_paths(instance, scmd) ==
1656 (DID_RESET << 16)) {
1657 spin_unlock_irqrestore(&instance->hba_lock, flags);
1658 return SCSI_MLQUEUE_HOST_BUSY;
1659 } else {
1660 spin_unlock_irqrestore(&instance->hba_lock, flags);
1661 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1662 scmd->scsi_done(scmd);
229fe47c 1663 return 0;
1664 }
1665 }
1666
b09e66da
SS		 1667 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
1668 spin_unlock_irqrestore(&instance->hba_lock, flags);
229fe47c 1669 scmd->result = DID_NO_CONNECT << 16;
fb1a24ff 1670 scmd->scsi_done(scmd);
b09e66da
SS		 1671 return 0;
1672 }
1673
39a98554 1674 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
1675 spin_unlock_irqrestore(&instance->hba_lock, flags);
1676 return SCSI_MLQUEUE_HOST_BUSY;
1677 }
1678
1679 spin_unlock_irqrestore(&instance->hba_lock, flags);
1680
c4a3e0a5
BS		 1681 scmd->result = 0;
1682
cb59aa6a 1683 if (MEGASAS_IS_LOGICAL(scmd) &&
51087a86
SS		 1684 (scmd->device->id >= instance->fw_supported_vd_count ||
1685 scmd->device->lun)) {
cb59aa6a
SP		 1686 scmd->result = DID_BAD_TARGET << 16;
1687 goto out_done;
c4a3e0a5
BS		 1688 }
1689
02b01e01
SP		 1690 switch (scmd->cmnd[0]) {
1691 case SYNCHRONIZE_CACHE:
1692 /*
1693 * FW takes care of flush cache on its own
1694 * No need to send it down
1695 */
1696 scmd->result = DID_OK << 16;
1697 goto out_done;
1698 default:
1699 break;
1700 }
1701
cd50ba8e 1702 if (instance->instancet->build_and_issue_cmd(instance, scmd)) {
1be18254 1703 dev_err(&instance->pdev->dev, "Err returned from build_and_issue_cmd\n");
cb59aa6a 1704 return SCSI_MLQUEUE_HOST_BUSY;
cd50ba8e 1705 }
c4a3e0a5
BS		 1706
1707 return 0;
cb59aa6a 1708
cb59aa6a 1709 out_done:
fb1a24ff 1710 scmd->scsi_done(scmd);
cb59aa6a 1711 return 0;
c4a3e0a5
BS		 1712}
1713
044833b5
YB		 1714static struct megasas_instance *megasas_lookup_instance(u16 host_no)
1715{
1716 int i;
1717
1718 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
1719
1720 if ((megasas_mgmt_info.instance[i]) &&
1721 (megasas_mgmt_info.instance[i]->host->host_no == host_no))
1722 return megasas_mgmt_info.instance[i];
1723 }
1724
1725 return NULL;
1726}
1727
0b48d12d 1728/*
1729* megasas_set_dma_alignment - Set DMA alignment for PI enabled VD
1730*
1731* @sdev: OS provided scsi device
1732*
1733* Returns void
1734*/
1735static void megasas_set_dma_alignment(struct scsi_device *sdev)
1736{
1737 u32 device_id, ld;
1738 struct megasas_instance *instance;
1739 struct fusion_context *fusion;
1740 struct MR_LD_RAID *raid;
1741 struct MR_DRV_RAID_MAP_ALL *local_map_ptr;
1742
1743 instance = megasas_lookup_instance(sdev->host->host_no);
1744 fusion = instance->ctrl_context;
1745
1746 if (!fusion)
1747 return;
1748
1749 if (sdev->channel >= MEGASAS_MAX_PD_CHANNELS) {
1750 device_id = ((sdev->channel % 2) * MEGASAS_MAX_DEV_PER_CHANNEL)
1751 + sdev->id;
1752 local_map_ptr = fusion->ld_drv_map[(instance->map_id & 1)];
1753 ld = MR_TargetIdToLdGet(device_id, local_map_ptr);
1754 raid = MR_LdRaidGet(ld, local_map_ptr);
1755
1756 if (raid->capability.ldPiMode == MR_PROT_INFO_TYPE_CONTROLLER)
1757 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1758 }
1759}
1760
147aab6a
CH		 1761static int megasas_slave_configure(struct scsi_device *sdev)
1762{
0b48d12d 1763 megasas_set_dma_alignment(sdev);
e5b3a65f 1764 /*
da0dc9fb
BH		 1765 * The RAID firmware may require extended timeouts.
1766 */
044833b5
YB		 1767 blk_queue_rq_timeout(sdev->request_queue,
1768 MEGASAS_DEFAULT_CMD_TIMEOUT * HZ);
07e38d94 1769
044833b5
YB		 1770 return 0;
1771}
1772
1773static int megasas_slave_alloc(struct scsi_device *sdev)
1774{
da0dc9fb 1775 u16 pd_index = 0;
044833b5 1776 struct megasas_instance *instance ;
da0dc9fb 1777
044833b5 1778 instance = megasas_lookup_instance(sdev->host->host_no);
07e38d94 1779 if (sdev->channel < MEGASAS_MAX_PD_CHANNELS) {
044833b5
YB		 1780 /*
1781 * Open the OS scan to the SYSTEM PD
1782 */
1783 pd_index =
1784 (sdev->channel * MEGASAS_MAX_DEV_PER_CHANNEL) +
1785 sdev->id;
0d5b47a7 1786 if ((instance->pd_list[pd_index].driveState ==
1787 MR_PD_STATE_SYSTEM) ||
1788 (instance->pd_list[pd_index].driveType != TYPE_DISK)) {
044833b5
YB		 1789 return 0;
1790 }
1791 return -ENXIO;
1792 }
147aab6a
CH		 1793 return 0;
1794}
1795
c8dd61ef
SS		 1796/*
1797* megasas_complete_outstanding_ioctls - Complete outstanding ioctls after a
1798* kill adapter
1799* @instance: Adapter soft state
1800*
1801*/
6a6981fe 1802static void megasas_complete_outstanding_ioctls(struct megasas_instance *instance)
c8dd61ef
SS		 1803{
1804 int i;
1805 struct megasas_cmd *cmd_mfi;
1806 struct megasas_cmd_fusion *cmd_fusion;
1807 struct fusion_context *fusion = instance->ctrl_context;
1808
1809 /* Find all outstanding ioctls */
1810 if (fusion) {
1811 for (i = 0; i < instance->max_fw_cmds; i++) {
1812 cmd_fusion = fusion->cmd_list[i];
1813 if (cmd_fusion->sync_cmd_idx != (u32)ULONG_MAX) {
1814 cmd_mfi = instance->cmd_list[cmd_fusion->sync_cmd_idx];
1815 if (cmd_mfi->sync_cmd &&
1816 cmd_mfi->frame->hdr.cmd != MFI_CMD_ABORT)
1817 megasas_complete_cmd(instance,
1818 cmd_mfi, DID_OK);
1819 }
1820 }
1821 } else {
1822 for (i = 0; i < instance->max_fw_cmds; i++) {
1823 cmd_mfi = instance->cmd_list[i];
1824 if (cmd_mfi->sync_cmd && cmd_mfi->frame->hdr.cmd !=
1825 MFI_CMD_ABORT)
1826 megasas_complete_cmd(instance, cmd_mfi, DID_OK);
1827 }
1828 }
1829}
1830
1831
9c915a8c 1832void megaraid_sas_kill_hba(struct megasas_instance *instance)
39a98554 1833{
c8dd61ef
SS		 1834 /* Set critical error to block I/O & ioctls in case caller didn't */
1835 instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR;
1836 /* Wait 1 second to ensure IO or ioctls in build have posted */
1837 msleep(1000);
39a98554 1838 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
c8dd61ef 1839 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 1840 (instance->ctrl_context)) {
da0dc9fb 1841 writel(MFI_STOP_ADP, &instance->reg_set->doorbell);
229fe47c 1842 /* Flush */
1843 readl(&instance->reg_set->doorbell);
1844 if (instance->mpio && instance->requestorId)
1845 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
39a98554 1846 } else {
c8dd61ef
SS		 1847 writel(MFI_STOP_ADP,
1848 &instance->reg_set->inbound_doorbell);
9c915a8c 1849 }
c8dd61ef
SS		 1850 /* Complete outstanding ioctls when adapter is killed */
1851 megasas_complete_outstanding_ioctls(instance);
9c915a8c 1852}
1853
1854 /**
1855 * megasas_check_and_restore_queue_depth - Check if queue depth needs to be
1856 * restored to max value
1857 * @instance: Adapter soft state
1858 *
1859 */
1860void
1861megasas_check_and_restore_queue_depth(struct megasas_instance *instance)
1862{
1863 unsigned long flags;
ae09a6c1 1864
9c915a8c 1865 if (instance->flag & MEGASAS_FW_BUSY
c5daa6a9 1866 && time_after(jiffies, instance->last_time + 5 * HZ)
1867 && atomic_read(&instance->fw_outstanding) <
1868 instance->throttlequeuedepth + 1) {
9c915a8c 1869
1870 spin_lock_irqsave(instance->host->host_lock, flags);
1871 instance->flag &= ~MEGASAS_FW_BUSY;
9c915a8c 1872
ae09a6c1 1873 instance->host->can_queue = instance->max_scsi_cmds;
9c915a8c 1874 spin_unlock_irqrestore(instance->host->host_lock, flags);
39a98554 1875 }
1876}
1877
7343eb65 1878/**
1879 * megasas_complete_cmd_dpc - Returns FW's controller structure
1880 * @instance_addr: Address of adapter soft state
1881 *
1882 * Tasklet to complete cmds
1883 */
1884static void megasas_complete_cmd_dpc(unsigned long instance_addr)
1885{
1886 u32 producer;
1887 u32 consumer;
1888 u32 context;
1889 struct megasas_cmd *cmd;
1890 struct megasas_instance *instance =
1891 (struct megasas_instance *)instance_addr;
1892 unsigned long flags;
1893
1894 /* If we have already declared adapter dead, donot complete cmds */
da0dc9fb 1895 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR)
7343eb65 1896 return;
1897
1898 spin_lock_irqsave(&instance->completion_lock, flags);
1899
94cd65dd
SS		 1900 producer = le32_to_cpu(*instance->producer);
1901 consumer = le32_to_cpu(*instance->consumer);
7343eb65 1902
1903 while (consumer != producer) {
94cd65dd 1904 context = le32_to_cpu(instance->reply_queue[consumer]);
39a98554 1905 if (context >= instance->max_fw_cmds) {
1be18254 1906 dev_err(&instance->pdev->dev, "Unexpected context value %x\n",
39a98554 1907 context);
1908 BUG();
1909 }
7343eb65 1910
1911 cmd = instance->cmd_list[context];
1912
1913 megasas_complete_cmd(instance, cmd, DID_OK);
1914
1915 consumer++;
1916 if (consumer == (instance->max_fw_cmds + 1)) {
1917 consumer = 0;
1918 }
1919 }
1920
94cd65dd 1921 *instance->consumer = cpu_to_le32(producer);
7343eb65 1922
1923 spin_unlock_irqrestore(&instance->completion_lock, flags);
1924
1925 /*
1926 * Check if we can restore can_queue
1927 */
9c915a8c 1928 megasas_check_and_restore_queue_depth(instance);
7343eb65 1929}
1930
229fe47c 1931/**
1932 * megasas_start_timer - Initializes a timer object
1933 * @instance: Adapter soft state
1934 * @timer: timer object to be initialized
1935 * @fn: timer function
1936 * @interval: time interval between timer function call
1937 *
1938 */
1939void megasas_start_timer(struct megasas_instance *instance,
1940 struct timer_list *timer,
1941 void *fn, unsigned long interval)
1942{
1943 init_timer(timer);
1944 timer->expires = jiffies + interval;
1945 timer->data = (unsigned long)instance;
1946 timer->function = fn;
1947 add_timer(timer);
1948}
1949
707e09bd
YB		 1950static void
1951megasas_internal_reset_defer_cmds(struct megasas_instance *instance);
1952
1953static void
1954process_fw_state_change_wq(struct work_struct *work);
1955
1956void megasas_do_ocr(struct megasas_instance *instance)
1957{
1958 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
1959 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
1960 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
94cd65dd 1961 *instance->consumer = cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
707e09bd 1962 }
d46a3ad6 1963 instance->instancet->disable_intr(instance);
707e09bd
YB		 1964 instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT;
1965 instance->issuepend_done = 0;
1966
1967 atomic_set(&instance->fw_outstanding, 0);
1968 megasas_internal_reset_defer_cmds(instance);
1969 process_fw_state_change_wq(&instance->work_init);
1970}
1971
4cbfea88
AR		 1972static int megasas_get_ld_vf_affiliation_111(struct megasas_instance *instance,
1973 int initial)
229fe47c 1974{
1975 struct megasas_cmd *cmd;
1976 struct megasas_dcmd_frame *dcmd;
229fe47c 1977 struct MR_LD_VF_AFFILIATION_111 *new_affiliation_111 = NULL;
229fe47c 1978 dma_addr_t new_affiliation_111_h;
1979 int ld, retval = 0;
1980 u8 thisVf;
1981
1982 cmd = megasas_get_cmd(instance);
1983
1984 if (!cmd) {
1be18254
BH		 1985 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation_111:"
1986 "Failed to get cmd for scsi%d\n",
229fe47c 1987 instance->host->host_no);
1988 return -ENOMEM;
1989 }
1990
1991 dcmd = &cmd->frame->dcmd;
1992
4cbfea88 1993 if (!instance->vf_affiliation_111) {
1be18254
BH		 1994 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
1995 "affiliation for scsi%d\n", instance->host->host_no);
229fe47c 1996 megasas_return_cmd(instance, cmd);
1997 return -ENOMEM;
1998 }
1999
2000 if (initial)
229fe47c 2001 memset(instance->vf_affiliation_111, 0,
2002 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2003 else {
4cbfea88
AR		 2004 new_affiliation_111 =
2005 pci_alloc_consistent(instance->pdev,
2006 sizeof(struct MR_LD_VF_AFFILIATION_111),
2007 &new_affiliation_111_h);
2008 if (!new_affiliation_111) {
1be18254
BH		 2009 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2010 "memory for new affiliation for scsi%d\n",
4cbfea88 2011 instance->host->host_no);
229fe47c 2012 megasas_return_cmd(instance, cmd);
2013 return -ENOMEM;
2014 }
4cbfea88
AR		 2015 memset(new_affiliation_111, 0,
2016 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2017 }
2018
2019 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2020
2021 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2022 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2023 dcmd->sge_count = 1;
2213a467 2024 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c 2025 dcmd->timeout = 0;
2026 dcmd->pad_0 = 0;
2213a467
CH		 2027 dcmd->data_xfer_len =
2028 cpu_to_le32(sizeof(struct MR_LD_VF_AFFILIATION_111));
2029 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS_111);
229fe47c 2030
4cbfea88
AR		 2031 if (initial)
2032 dcmd->sgl.sge32[0].phys_addr =
2213a467 2033 cpu_to_le32(instance->vf_affiliation_111_h);
229fe47c 2034 else
2213a467
CH		 2035 dcmd->sgl.sge32[0].phys_addr =
2036 cpu_to_le32(new_affiliation_111_h);
4cbfea88 2037
2213a467
CH		 2038 dcmd->sgl.sge32[0].length = cpu_to_le32(
2039 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2040
1be18254 2041 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
229fe47c 2042 "scsi%d\n", instance->host->host_no);
2043
2044 megasas_issue_blocked_cmd(instance, cmd, 0);
2045
2046 if (dcmd->cmd_status) {
1be18254
BH		 2047 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2048 " failed with status 0x%x for scsi%d\n",
229fe47c 2049 dcmd->cmd_status, instance->host->host_no);
2050 retval = 1; /* Do a scan if we couldn't get affiliation */
2051 goto out;
2052 }
2053
2054 if (!initial) {
4cbfea88
AR		 2055 thisVf = new_affiliation_111->thisVf;
2056 for (ld = 0 ; ld < new_affiliation_111->vdCount; ld++)
2057 if (instance->vf_affiliation_111->map[ld].policy[thisVf] !=
2058 new_affiliation_111->map[ld].policy[thisVf]) {
1be18254
BH		 2059 dev_warn(&instance->pdev->dev, "SR-IOV: "
2060 "Got new LD/VF affiliation for scsi%d\n",
229fe47c 2061 instance->host->host_no);
4cbfea88
AR		 2062 memcpy(instance->vf_affiliation_111,
2063 new_affiliation_111,
2064 sizeof(struct MR_LD_VF_AFFILIATION_111));
229fe47c 2065 retval = 1;
2066 goto out;
2067 }
4cbfea88
AR		 2068 }
2069out:
2070 if (new_affiliation_111) {
2071 pci_free_consistent(instance->pdev,
2072 sizeof(struct MR_LD_VF_AFFILIATION_111),
2073 new_affiliation_111,
2074 new_affiliation_111_h);
2075 }
90dc9d98 2076
4026e9aa 2077 megasas_return_cmd(instance, cmd);
4cbfea88
AR		 2078
2079 return retval;
2080}
2081
2082static int megasas_get_ld_vf_affiliation_12(struct megasas_instance *instance,
2083 int initial)
2084{
2085 struct megasas_cmd *cmd;
2086 struct megasas_dcmd_frame *dcmd;
2087 struct MR_LD_VF_AFFILIATION *new_affiliation = NULL;
2088 struct MR_LD_VF_MAP *newmap = NULL, *savedmap = NULL;
2089 dma_addr_t new_affiliation_h;
2090 int i, j, retval = 0, found = 0, doscan = 0;
2091 u8 thisVf;
2092
2093 cmd = megasas_get_cmd(instance);
2094
2095 if (!cmd) {
1be18254
BH		 2096 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_vf_affiliation12: "
2097 "Failed to get cmd for scsi%d\n",
4cbfea88
AR		 2098 instance->host->host_no);
2099 return -ENOMEM;
2100 }
2101
2102 dcmd = &cmd->frame->dcmd;
2103
2104 if (!instance->vf_affiliation) {
1be18254
BH		 2105 dev_warn(&instance->pdev->dev, "SR-IOV: Couldn't get LD/VF "
2106 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2107 megasas_return_cmd(instance, cmd);
2108 return -ENOMEM;
2109 }
2110
2111 if (initial)
2112 memset(instance->vf_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2113 sizeof(struct MR_LD_VF_AFFILIATION));
2114 else {
2115 new_affiliation =
2116 pci_alloc_consistent(instance->pdev,
2117 (MAX_LOGICAL_DRIVES + 1) *
2118 sizeof(struct MR_LD_VF_AFFILIATION),
2119 &new_affiliation_h);
2120 if (!new_affiliation) {
1be18254
BH		 2121 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate "
2122 "memory for new affiliation for scsi%d\n",
4cbfea88
AR		 2123 instance->host->host_no);
2124 megasas_return_cmd(instance, cmd);
2125 return -ENOMEM;
2126 }
2127 memset(new_affiliation, 0, (MAX_LOGICAL_DRIVES + 1) *
2128 sizeof(struct MR_LD_VF_AFFILIATION));
2129 }
2130
2131 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2132
2133 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2134 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
4cbfea88 2135 dcmd->sge_count = 1;
2213a467 2136 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
4cbfea88
AR		 2137 dcmd->timeout = 0;
2138 dcmd->pad_0 = 0;
2213a467
CH		 2139 dcmd->data_xfer_len = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2140 sizeof(struct MR_LD_VF_AFFILIATION));
2141 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_VF_MAP_GET_ALL_LDS);
4cbfea88
AR		 2142
2143 if (initial)
2213a467
CH		 2144 dcmd->sgl.sge32[0].phys_addr =
2145 cpu_to_le32(instance->vf_affiliation_h);
4cbfea88 2146 else
2213a467
CH		 2147 dcmd->sgl.sge32[0].phys_addr =
2148 cpu_to_le32(new_affiliation_h);
4cbfea88 2149
2213a467
CH		 2150 dcmd->sgl.sge32[0].length = cpu_to_le32((MAX_LOGICAL_DRIVES + 1) *
2151 sizeof(struct MR_LD_VF_AFFILIATION));
4cbfea88 2152
1be18254 2153 dev_warn(&instance->pdev->dev, "SR-IOV: Getting LD/VF affiliation for "
4cbfea88
AR		 2154 "scsi%d\n", instance->host->host_no);
2155
2156 megasas_issue_blocked_cmd(instance, cmd, 0);
2157
2158 if (dcmd->cmd_status) {
1be18254
BH		 2159 dev_warn(&instance->pdev->dev, "SR-IOV: LD/VF affiliation DCMD"
2160 " failed with status 0x%x for scsi%d\n",
4cbfea88
AR		 2161 dcmd->cmd_status, instance->host->host_no);
2162 retval = 1; /* Do a scan if we couldn't get affiliation */
2163 goto out;
2164 }
2165
2166 if (!initial) {
2167 if (!new_affiliation->ldCount) {
1be18254
BH		 2168 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2169 "affiliation for passive path for scsi%d\n",
4cbfea88
AR		 2170 instance->host->host_no);
2171 retval = 1;
2172 goto out;
2173 }
2174 newmap = new_affiliation->map;
2175 savedmap = instance->vf_affiliation->map;
2176 thisVf = new_affiliation->thisVf;
2177 for (i = 0 ; i < new_affiliation->ldCount; i++) {
2178 found = 0;
2179 for (j = 0; j < instance->vf_affiliation->ldCount;
2180 j++) {
2181 if (newmap->ref.targetId ==
2182 savedmap->ref.targetId) {
2183 found = 1;
2184 if (newmap->policy[thisVf] !=
2185 savedmap->policy[thisVf]) {
2186 doscan = 1;
2187 goto out;
2188 }
229fe47c 2189 }
2190 savedmap = (struct MR_LD_VF_MAP *)
2191 ((unsigned char *)savedmap +
2192 savedmap->size);
4cbfea88
AR		 2193 }
2194 if (!found && newmap->policy[thisVf] !=
2195 MR_LD_ACCESS_HIDDEN) {
2196 doscan = 1;
2197 goto out;
2198 }
2199 newmap = (struct MR_LD_VF_MAP *)
2200 ((unsigned char *)newmap + newmap->size);
2201 }
2202
2203 newmap = new_affiliation->map;
2204 savedmap = instance->vf_affiliation->map;
2205
2206 for (i = 0 ; i < instance->vf_affiliation->ldCount; i++) {
2207 found = 0;
2208 for (j = 0 ; j < new_affiliation->ldCount; j++) {
2209 if (savedmap->ref.targetId ==
2210 newmap->ref.targetId) {
2211 found = 1;
2212 if (savedmap->policy[thisVf] !=
2213 newmap->policy[thisVf]) {
2214 doscan = 1;
2215 goto out;
2216 }
2217 }
229fe47c 2218 newmap = (struct MR_LD_VF_MAP *)
2219 ((unsigned char *)newmap +
2220 newmap->size);
2221 }
4cbfea88
AR		 2222 if (!found && savedmap->policy[thisVf] !=
2223 MR_LD_ACCESS_HIDDEN) {
2224 doscan = 1;
2225 goto out;
2226 }
2227 savedmap = (struct MR_LD_VF_MAP *)
2228 ((unsigned char *)savedmap +
2229 savedmap->size);
229fe47c 2230 }
2231 }
2232out:
4cbfea88 2233 if (doscan) {
1be18254
BH		 2234 dev_warn(&instance->pdev->dev, "SR-IOV: Got new LD/VF "
2235 "affiliation for scsi%d\n", instance->host->host_no);
4cbfea88
AR		 2236 memcpy(instance->vf_affiliation, new_affiliation,
2237 new_affiliation->size);
2238 retval = 1;
229fe47c 2239 }
4cbfea88
AR		 2240
2241 if (new_affiliation)
2242 pci_free_consistent(instance->pdev,
2243 (MAX_LOGICAL_DRIVES + 1) *
2244 sizeof(struct MR_LD_VF_AFFILIATION),
2245 new_affiliation, new_affiliation_h);
4026e9aa 2246 megasas_return_cmd(instance, cmd);
229fe47c 2247
2248 return retval;
2249}
2250
4cbfea88
AR		 2251/* This function will get the current SR-IOV LD/VF affiliation */
2252static int megasas_get_ld_vf_affiliation(struct megasas_instance *instance,
2253 int initial)
2254{
2255 int retval;
2256
2257 if (instance->PlasmaFW111)
2258 retval = megasas_get_ld_vf_affiliation_111(instance, initial);
2259 else
2260 retval = megasas_get_ld_vf_affiliation_12(instance, initial);
2261 return retval;
2262}
2263
229fe47c 2264/* This function will tell FW to start the SR-IOV heartbeat */
2265int megasas_sriov_start_heartbeat(struct megasas_instance *instance,
2266 int initial)
2267{
2268 struct megasas_cmd *cmd;
2269 struct megasas_dcmd_frame *dcmd;
2270 int retval = 0;
2271
2272 cmd = megasas_get_cmd(instance);
2273
2274 if (!cmd) {
1be18254
BH		 2275 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_sriov_start_heartbeat: "
2276 "Failed to get cmd for scsi%d\n",
229fe47c 2277 instance->host->host_no);
2278 return -ENOMEM;
2279 }
2280
2281 dcmd = &cmd->frame->dcmd;
2282
2283 if (initial) {
2284 instance->hb_host_mem =
7c845eb5
JP		 2285 pci_zalloc_consistent(instance->pdev,
2286 sizeof(struct MR_CTRL_HB_HOST_MEM),
2287 &instance->hb_host_mem_h);
229fe47c 2288 if (!instance->hb_host_mem) {
1be18254
BH		 2289 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SR-IOV: Couldn't allocate"
2290 " memory for heartbeat host memory for scsi%d\n",
2291 instance->host->host_no);
229fe47c 2292 retval = -ENOMEM;
2293 goto out;
2294 }
229fe47c 2295 }
2296
2297 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
2298
2213a467 2299 dcmd->mbox.s[0] = cpu_to_le16(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2300 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 2301 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
229fe47c 2302 dcmd->sge_count = 1;
2213a467 2303 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_BOTH);
229fe47c 2304 dcmd->timeout = 0;
2305 dcmd->pad_0 = 0;
2213a467
CH		 2306 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
2307 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SHARED_HOST_MEM_ALLOC);
2308 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->hb_host_mem_h);
2309 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_CTRL_HB_HOST_MEM));
229fe47c 2310
1be18254 2311 dev_warn(&instance->pdev->dev, "SR-IOV: Starting heartbeat for scsi%d\n",
229fe47c 2312 instance->host->host_no);
2313
4026e9aa
SS		 2314 if (instance->ctrl_context && !instance->mask_interrupts)
2315 retval = megasas_issue_blocked_cmd(instance, cmd,
2316 MEGASAS_ROUTINE_WAIT_TIME_VF);
2317 else
2318 retval = megasas_issue_polled(instance, cmd);
229fe47c 2319
4026e9aa 2320 if (retval) {
2be2a988
SS		 2321 dev_warn(&instance->pdev->dev, "SR-IOV: MR_DCMD_CTRL_SHARED_HOST"
2322 "_MEM_ALLOC DCMD %s for scsi%d\n",
2323 (dcmd->cmd_status == MFI_STAT_INVALID_STATUS) ?
2324 "timed out" : "failed", instance->host->host_no);
229fe47c 2325 retval = 1;
229fe47c 2326 }
2327
2328out:
2329 megasas_return_cmd(instance, cmd);
2330
2331 return retval;
2332}
2333
2334/* Handler for SR-IOV heartbeat */
2335void megasas_sriov_heartbeat_handler(unsigned long instance_addr)
2336{
2337 struct megasas_instance *instance =
2338 (struct megasas_instance *)instance_addr;
2339
2340 if (instance->hb_host_mem->HB.fwCounter !=
2341 instance->hb_host_mem->HB.driverCounter) {
2342 instance->hb_host_mem->HB.driverCounter =
2343 instance->hb_host_mem->HB.fwCounter;
2344 mod_timer(&instance->sriov_heartbeat_timer,
2345 jiffies + MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
2346 } else {
1be18254 2347 dev_warn(&instance->pdev->dev, "SR-IOV: Heartbeat never "
229fe47c 2348 "completed for scsi%d\n", instance->host->host_no);
2349 schedule_work(&instance->work_init);
2350 }
2351}
2352
c4a3e0a5
BS		 2353/**
2354 * megasas_wait_for_outstanding - Wait for all outstanding cmds
2355 * @instance: Adapter soft state
2356 *
25985edc 2357 * This function waits for up to MEGASAS_RESET_WAIT_TIME seconds for FW to
c4a3e0a5
BS		 2358 * complete all its outstanding commands. Returns error if one or more IOs
2359 * are pending after this time period. It also marks the controller dead.
2360 */
2361static int megasas_wait_for_outstanding(struct megasas_instance *instance)
2362{
2363 int i;
39a98554 2364 u32 reset_index;
c4a3e0a5 2365 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
39a98554 2366 u8 adprecovery;
2367 unsigned long flags;
2368 struct list_head clist_local;
2369 struct megasas_cmd *reset_cmd;
707e09bd
YB		 2370 u32 fw_state;
2371 u8 kill_adapter_flag;
39a98554 2372
2373 spin_lock_irqsave(&instance->hba_lock, flags);
2374 adprecovery = instance->adprecovery;
2375 spin_unlock_irqrestore(&instance->hba_lock, flags);
2376
2377 if (adprecovery != MEGASAS_HBA_OPERATIONAL) {
2378
2379 INIT_LIST_HEAD(&clist_local);
2380 spin_lock_irqsave(&instance->hba_lock, flags);
2381 list_splice_init(&instance->internal_reset_pending_q,
2382 &clist_local);
2383 spin_unlock_irqrestore(&instance->hba_lock, flags);
2384
1be18254 2385 dev_notice(&instance->pdev->dev, "HBA reset wait ...\n");
39a98554 2386 for (i = 0; i < wait_time; i++) {
2387 msleep(1000);
2388 spin_lock_irqsave(&instance->hba_lock, flags);
2389 adprecovery = instance->adprecovery;
2390 spin_unlock_irqrestore(&instance->hba_lock, flags);
2391 if (adprecovery == MEGASAS_HBA_OPERATIONAL)
2392 break;
2393 }
2394
2395 if (adprecovery != MEGASAS_HBA_OPERATIONAL) {
1be18254 2396 dev_notice(&instance->pdev->dev, "reset: Stopping HBA.\n");
39a98554 2397 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 2398 instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR;
39a98554 2399 spin_unlock_irqrestore(&instance->hba_lock, flags);
2400 return FAILED;
2401 }
2402
da0dc9fb 2403 reset_index = 0;
39a98554 2404 while (!list_empty(&clist_local)) {
da0dc9fb 2405 reset_cmd = list_entry((&clist_local)->next,
39a98554 2406 struct megasas_cmd, list);
2407 list_del_init(&reset_cmd->list);
2408 if (reset_cmd->scmd) {
2409 reset_cmd->scmd->result = DID_RESET << 16;
1be18254 2410 dev_notice(&instance->pdev->dev, "%d:%p reset [%02x]\n",
39a98554 2411 reset_index, reset_cmd,
5cd049a5 2412 reset_cmd->scmd->cmnd[0]);
39a98554 2413
2414 reset_cmd->scmd->scsi_done(reset_cmd->scmd);
2415 megasas_return_cmd(instance, reset_cmd);
2416 } else if (reset_cmd->sync_cmd) {
1be18254 2417 dev_notice(&instance->pdev->dev, "%p synch cmds"
39a98554 2418 "reset queue\n",
2419 reset_cmd);
2420
2be2a988 2421 reset_cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 2422 instance->instancet->fire_cmd(instance,
2423 reset_cmd->frame_phys_addr,
2424 0, instance->reg_set);
2425 } else {
1be18254 2426 dev_notice(&instance->pdev->dev, "%p unexpected"
39a98554 2427 "cmds lst\n",
2428 reset_cmd);
2429 }
2430 reset_index++;
2431 }
2432
2433 return SUCCESS;
2434 }
c4a3e0a5 2435
c007b8b2 2436 for (i = 0; i < resetwaittime; i++) {
e4a082c7
SP		 2437 int outstanding = atomic_read(&instance->fw_outstanding);
2438
2439 if (!outstanding)
c4a3e0a5
BS		 2440 break;
2441
2442 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 2443 dev_notice(&instance->pdev->dev, "[%2d]waiting for %d "
e4a082c7 2444 "commands to complete\n",i,outstanding);
7343eb65 2445 /*
2446 * Call cmd completion routine. Cmd to be
2447 * be completed directly without depending on isr.
2448 */
2449 megasas_complete_cmd_dpc((unsigned long)instance);
c4a3e0a5
BS		 2450 }
2451
2452 msleep(1000);
2453 }
2454
707e09bd
YB		 2455 i = 0;
2456 kill_adapter_flag = 0;
2457 do {
2458 fw_state = instance->instancet->read_fw_status_reg(
2459 instance->reg_set) & MFI_STATE_MASK;
2460 if ((fw_state == MFI_STATE_FAULT) &&
2461 (instance->disableOnlineCtrlReset == 0)) {
2462 if (i == 3) {
2463 kill_adapter_flag = 2;
2464 break;
2465 }
2466 megasas_do_ocr(instance);
2467 kill_adapter_flag = 1;
2468
2469 /* wait for 1 secs to let FW finish the pending cmds */
2470 msleep(1000);
2471 }
2472 i++;
2473 } while (i <= 3);
2474
da0dc9fb 2475 if (atomic_read(&instance->fw_outstanding) && !kill_adapter_flag) {
707e09bd 2476 if (instance->disableOnlineCtrlReset == 0) {
707e09bd
YB		 2477 megasas_do_ocr(instance);
2478
2479 /* wait for 5 secs to let FW finish the pending cmds */
2480 for (i = 0; i < wait_time; i++) {
2481 int outstanding =
2482 atomic_read(&instance->fw_outstanding);
2483 if (!outstanding)
2484 return SUCCESS;
2485 msleep(1000);
2486 }
2487 }
2488 }
2489
2490 if (atomic_read(&instance->fw_outstanding) ||
2491 (kill_adapter_flag == 2)) {
1be18254 2492 dev_notice(&instance->pdev->dev, "pending cmds after reset\n");
e3bbff9f 2493 /*
da0dc9fb
BH		 2494 * Send signal to FW to stop processing any pending cmds.
2495 * The controller will be taken offline by the OS now.
2496 */
0c79e681
YB		 2497 if ((instance->pdev->device ==
2498 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
2499 (instance->pdev->device ==
2500 PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
2501 writel(MFI_STOP_ADP,
9c915a8c 2502 &instance->reg_set->doorbell);
0c79e681
YB		 2503 } else {
2504 writel(MFI_STOP_ADP,
e3bbff9f 2505 &instance->reg_set->inbound_doorbell);
0c79e681 2506 }
658dcedb 2507 megasas_dump_pending_frames(instance);
39a98554 2508 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 2509 instance->adprecovery = MEGASAS_HW_CRITICAL_ERROR;
39a98554 2510 spin_unlock_irqrestore(&instance->hba_lock, flags);
c4a3e0a5
BS		 2511 return FAILED;
2512 }
2513
1be18254 2514 dev_notice(&instance->pdev->dev, "no pending cmds after reset\n");
39a98554 2515
c4a3e0a5
BS		 2516 return SUCCESS;
2517}
2518
2519/**
2520 * megasas_generic_reset - Generic reset routine
2521 * @scmd: Mid-layer SCSI command
2522 *
2523 * This routine implements a generic reset handler for device, bus and host
2524 * reset requests. Device, bus and host specific reset handlers can use this
2525 * function after they do their specific tasks.
2526 */
2527static int megasas_generic_reset(struct scsi_cmnd *scmd)
2528{
2529 int ret_val;
2530 struct megasas_instance *instance;
2531
2532 instance = (struct megasas_instance *)scmd->device->host->hostdata;
2533
5cd049a5
CH		 2534 scmd_printk(KERN_NOTICE, scmd, "megasas: RESET cmd=%x retries=%x\n",
2535 scmd->cmnd[0], scmd->retries);
c4a3e0a5 2536
39a98554 2537 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 2538 dev_err(&instance->pdev->dev, "cannot recover from previous reset failures\n");
c4a3e0a5
BS		 2539 return FAILED;
2540 }
2541
c4a3e0a5 2542 ret_val = megasas_wait_for_outstanding(instance);
c4a3e0a5 2543 if (ret_val == SUCCESS)
1be18254 2544 dev_notice(&instance->pdev->dev, "reset successful\n");
c4a3e0a5 2545 else
1be18254 2546 dev_err(&instance->pdev->dev, "failed to do reset\n");
c4a3e0a5 2547
c4a3e0a5
BS		 2548 return ret_val;
2549}
2550
05e9ebbe
SP		 2551/**
2552 * megasas_reset_timer - quiesce the adapter if required
2553 * @scmd: scsi cmnd
2554 *
2555 * Sets the FW busy flag and reduces the host->can_queue if the
2556 * cmd has not been completed within the timeout period.
2557 */
2558static enum
242f9dcb 2559blk_eh_timer_return megasas_reset_timer(struct scsi_cmnd *scmd)
05e9ebbe 2560{
05e9ebbe
SP		 2561 struct megasas_instance *instance;
2562 unsigned long flags;
2563
2564 if (time_after(jiffies, scmd->jiffies_at_alloc +
2565 (MEGASAS_DEFAULT_CMD_TIMEOUT * 2) * HZ)) {
242f9dcb 2566 return BLK_EH_NOT_HANDLED;
05e9ebbe
SP		 2567 }
2568
f575c5d3 2569 instance = (struct megasas_instance *)scmd->device->host->hostdata;
05e9ebbe
SP		 2570 if (!(instance->flag & MEGASAS_FW_BUSY)) {
2571 /* FW is busy, throttle IO */
2572 spin_lock_irqsave(instance->host->host_lock, flags);
2573
c5daa6a9 2574 instance->host->can_queue = instance->throttlequeuedepth;
05e9ebbe
SP		 2575 instance->last_time = jiffies;
2576 instance->flag |= MEGASAS_FW_BUSY;
2577
2578 spin_unlock_irqrestore(instance->host->host_lock, flags);
2579 }
242f9dcb 2580 return BLK_EH_RESET_TIMER;
05e9ebbe
SP		 2581}
2582
c4a3e0a5
BS		 2583/**
2584 * megasas_reset_device - Device reset handler entry point
2585 */
2586static int megasas_reset_device(struct scsi_cmnd *scmd)
2587{
c4a3e0a5
BS		 2588 /*
2589 * First wait for all commands to complete
2590 */
da0dc9fb 2591 return megasas_generic_reset(scmd);
c4a3e0a5
BS		 2592}
2593
2594/**
2595 * megasas_reset_bus_host - Bus & host reset handler entry point
2596 */
2597static int megasas_reset_bus_host(struct scsi_cmnd *scmd)
2598{
2599 int ret;
9c915a8c 2600 struct megasas_instance *instance;
da0dc9fb 2601
9c915a8c 2602 instance = (struct megasas_instance *)scmd->device->host->hostdata;
c4a3e0a5
BS		 2603
2604 /*
80682fa9 2605 * First wait for all commands to complete
c4a3e0a5 2606 */
5a8cb85b 2607 if (instance->ctrl_context)
229fe47c 2608 ret = megasas_reset_fusion(scmd->device->host, 1);
9c915a8c 2609 else
2610 ret = megasas_generic_reset(scmd);
c4a3e0a5
BS		 2611
2612 return ret;
2613}
2614
cf62a0a5
SP		 2615/**
2616 * megasas_bios_param - Returns disk geometry for a disk
da0dc9fb 2617 * @sdev: device handle
cf62a0a5
SP		 2618 * @bdev: block device
2619 * @capacity: drive capacity
2620 * @geom: geometry parameters
2621 */
2622static int
2623megasas_bios_param(struct scsi_device *sdev, struct block_device *bdev,
2624 sector_t capacity, int geom[])
2625{
2626 int heads;
2627 int sectors;
2628 sector_t cylinders;
2629 unsigned long tmp;
da0dc9fb 2630
cf62a0a5
SP		 2631 /* Default heads (64) & sectors (32) */
2632 heads = 64;
2633 sectors = 32;
2634
2635 tmp = heads * sectors;
2636 cylinders = capacity;
2637
2638 sector_div(cylinders, tmp);
2639
2640 /*
2641 * Handle extended translation size for logical drives > 1Gb
2642 */
2643
2644 if (capacity >= 0x200000) {
2645 heads = 255;
2646 sectors = 63;
2647 tmp = heads*sectors;
2648 cylinders = capacity;
2649 sector_div(cylinders, tmp);
2650 }
2651
2652 geom[0] = heads;
2653 geom[1] = sectors;
2654 geom[2] = cylinders;
2655
2656 return 0;
2657}
2658
7e8a75f4
YB		 2659static void megasas_aen_polling(struct work_struct *work);
2660
c4a3e0a5
BS		 2661/**
2662 * megasas_service_aen - Processes an event notification
2663 * @instance: Adapter soft state
2664 * @cmd: AEN command completed by the ISR
2665 *
2666 * For AEN, driver sends a command down to FW that is held by the FW till an
2667 * event occurs. When an event of interest occurs, FW completes the command
2668 * that it was previously holding.
2669 *
2670 * This routines sends SIGIO signal to processes that have registered with the
2671 * driver for AEN.
2672 */
2673static void
2674megasas_service_aen(struct megasas_instance *instance, struct megasas_cmd *cmd)
2675{
c3518837 2676 unsigned long flags;
da0dc9fb 2677
c4a3e0a5
BS		 2678 /*
2679 * Don't signal app if it is just an aborted previously registered aen
2680 */
c3518837
YB		 2681 if ((!cmd->abort_aen) && (instance->unload == 0)) {
2682 spin_lock_irqsave(&poll_aen_lock, flags);
2683 megasas_poll_wait_aen = 1;
2684 spin_unlock_irqrestore(&poll_aen_lock, flags);
2685 wake_up(&megasas_poll_wait);
c4a3e0a5 2686 kill_fasync(&megasas_async_queue, SIGIO, POLL_IN);
c3518837 2687 }
c4a3e0a5
BS		 2688 else
2689 cmd->abort_aen = 0;
2690
2691 instance->aen_cmd = NULL;
90dc9d98 2692
4026e9aa 2693 megasas_return_cmd(instance, cmd);
7e8a75f4 2694
39a98554 2695 if ((instance->unload == 0) &&
2696 ((instance->issuepend_done == 1))) {
7e8a75f4 2697 struct megasas_aen_event *ev;
da0dc9fb 2698
7e8a75f4
YB		 2699 ev = kzalloc(sizeof(*ev), GFP_ATOMIC);
2700 if (!ev) {
1be18254 2701 dev_err(&instance->pdev->dev, "megasas_service_aen: out of memory\n");
7e8a75f4
YB		 2702 } else {
2703 ev->instance = instance;
2704 instance->ev = ev;
c1d390d8
XF		 2705 INIT_DELAYED_WORK(&ev->hotplug_work,
2706 megasas_aen_polling);
2707 schedule_delayed_work(&ev->hotplug_work, 0);
7e8a75f4
YB		 2708 }
2709 }
c4a3e0a5
BS		 2710}
2711
fc62b3fc
SS		 2712static ssize_t
2713megasas_fw_crash_buffer_store(struct device *cdev,
2714 struct device_attribute *attr, const char *buf, size_t count)
2715{
2716 struct Scsi_Host *shost = class_to_shost(cdev);
2717 struct megasas_instance *instance =
2718 (struct megasas_instance *) shost->hostdata;
2719 int val = 0;
2720 unsigned long flags;
2721
2722 if (kstrtoint(buf, 0, &val) != 0)
2723 return -EINVAL;
2724
2725 spin_lock_irqsave(&instance->crashdump_lock, flags);
2726 instance->fw_crash_buffer_offset = val;
2727 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2728 return strlen(buf);
2729}
2730
2731static ssize_t
2732megasas_fw_crash_buffer_show(struct device *cdev,
2733 struct device_attribute *attr, char *buf)
2734{
2735 struct Scsi_Host *shost = class_to_shost(cdev);
2736 struct megasas_instance *instance =
2737 (struct megasas_instance *) shost->hostdata;
2738 u32 size;
2739 unsigned long buff_addr;
2740 unsigned long dmachunk = CRASH_DMA_BUF_SIZE;
2741 unsigned long src_addr;
2742 unsigned long flags;
2743 u32 buff_offset;
2744
2745 spin_lock_irqsave(&instance->crashdump_lock, flags);
2746 buff_offset = instance->fw_crash_buffer_offset;
2747 if (!instance->crash_dump_buf &&
2748 !((instance->fw_crash_state == AVAILABLE) ||
2749 (instance->fw_crash_state == COPYING))) {
2750 dev_err(&instance->pdev->dev,
2751 "Firmware crash dump is not available\n");
2752 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2753 return -EINVAL;
2754 }
2755
2756 buff_addr = (unsigned long) buf;
2757
da0dc9fb 2758 if (buff_offset > (instance->fw_crash_buffer_size * dmachunk)) {
fc62b3fc
SS		 2759 dev_err(&instance->pdev->dev,
2760 "Firmware crash dump offset is out of range\n");
2761 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2762 return 0;
2763 }
2764
2765 size = (instance->fw_crash_buffer_size * dmachunk) - buff_offset;
2766 size = (size >= PAGE_SIZE) ? (PAGE_SIZE - 1) : size;
2767
2768 src_addr = (unsigned long)instance->crash_buf[buff_offset / dmachunk] +
2769 (buff_offset % dmachunk);
da0dc9fb 2770 memcpy(buf, (void *)src_addr, size);
fc62b3fc
SS		 2771 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2772
2773 return size;
2774}
2775
2776static ssize_t
2777megasas_fw_crash_buffer_size_show(struct device *cdev,
2778 struct device_attribute *attr, char *buf)
2779{
2780 struct Scsi_Host *shost = class_to_shost(cdev);
2781 struct megasas_instance *instance =
2782 (struct megasas_instance *) shost->hostdata;
2783
2784 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)
2785 ((instance->fw_crash_buffer_size) * 1024 * 1024)/PAGE_SIZE);
2786}
2787
2788static ssize_t
2789megasas_fw_crash_state_store(struct device *cdev,
2790 struct device_attribute *attr, const char *buf, size_t count)
2791{
2792 struct Scsi_Host *shost = class_to_shost(cdev);
2793 struct megasas_instance *instance =
2794 (struct megasas_instance *) shost->hostdata;
2795 int val = 0;
2796 unsigned long flags;
2797
2798 if (kstrtoint(buf, 0, &val) != 0)
2799 return -EINVAL;
2800
2801 if ((val <= AVAILABLE || val > COPY_ERROR)) {
2802 dev_err(&instance->pdev->dev, "application updates invalid "
2803 "firmware crash state\n");
2804 return -EINVAL;
2805 }
2806
2807 instance->fw_crash_state = val;
2808
2809 if ((val == COPIED) || (val == COPY_ERROR)) {
2810 spin_lock_irqsave(&instance->crashdump_lock, flags);
2811 megasas_free_host_crash_buffer(instance);
2812 spin_unlock_irqrestore(&instance->crashdump_lock, flags);
2813 if (val == COPY_ERROR)
2814 dev_info(&instance->pdev->dev, "application failed to "
2815 "copy Firmware crash dump\n");
2816 else
2817 dev_info(&instance->pdev->dev, "Firmware crash dump "
2818 "copied successfully\n");
2819 }
2820 return strlen(buf);
2821}
2822
2823static ssize_t
2824megasas_fw_crash_state_show(struct device *cdev,
2825 struct device_attribute *attr, char *buf)
2826{
2827 struct Scsi_Host *shost = class_to_shost(cdev);
2828 struct megasas_instance *instance =
2829 (struct megasas_instance *) shost->hostdata;
da0dc9fb 2830
fc62b3fc
SS		 2831 return snprintf(buf, PAGE_SIZE, "%d\n", instance->fw_crash_state);
2832}
2833
2834static ssize_t
2835megasas_page_size_show(struct device *cdev,
2836 struct device_attribute *attr, char *buf)
2837{
2838 return snprintf(buf, PAGE_SIZE, "%ld\n", (unsigned long)PAGE_SIZE - 1);
2839}
2840
2841static DEVICE_ATTR(fw_crash_buffer, S_IRUGO | S_IWUSR,
2842 megasas_fw_crash_buffer_show, megasas_fw_crash_buffer_store);
2843static DEVICE_ATTR(fw_crash_buffer_size, S_IRUGO,
2844 megasas_fw_crash_buffer_size_show, NULL);
2845static DEVICE_ATTR(fw_crash_state, S_IRUGO | S_IWUSR,
2846 megasas_fw_crash_state_show, megasas_fw_crash_state_store);
2847static DEVICE_ATTR(page_size, S_IRUGO,
2848 megasas_page_size_show, NULL);
2849
2850struct device_attribute *megaraid_host_attrs[] = {
2851 &dev_attr_fw_crash_buffer_size,
2852 &dev_attr_fw_crash_buffer,
2853 &dev_attr_fw_crash_state,
2854 &dev_attr_page_size,
2855 NULL,
2856};
2857
c4a3e0a5
BS		 2858/*
2859 * Scsi host template for megaraid_sas driver
2860 */
2861static struct scsi_host_template megasas_template = {
2862
2863 .module = THIS_MODULE,
43cd7fe4 2864 .name = "Avago SAS based MegaRAID driver",
c4a3e0a5 2865 .proc_name = "megaraid_sas",
147aab6a 2866 .slave_configure = megasas_slave_configure,
044833b5 2867 .slave_alloc = megasas_slave_alloc,
c4a3e0a5
BS		 2868 .queuecommand = megasas_queue_command,
2869 .eh_device_reset_handler = megasas_reset_device,
2870 .eh_bus_reset_handler = megasas_reset_bus_host,
2871 .eh_host_reset_handler = megasas_reset_bus_host,
05e9ebbe 2872 .eh_timed_out = megasas_reset_timer,
fc62b3fc 2873 .shost_attrs = megaraid_host_attrs,
cf62a0a5 2874 .bios_param = megasas_bios_param,
c4a3e0a5 2875 .use_clustering = ENABLE_CLUSTERING,
db5ed4df 2876 .change_queue_depth = scsi_change_queue_depth,
54b2b50c 2877 .no_write_same = 1,
c4a3e0a5
BS		 2878};
2879
2880/**
2881 * megasas_complete_int_cmd - Completes an internal command
2882 * @instance: Adapter soft state
2883 * @cmd: Command to be completed
2884 *
2885 * The megasas_issue_blocked_cmd() function waits for a command to complete
2886 * after it issues a command. This function wakes up that waiting routine by
2887 * calling wake_up() on the wait queue.
2888 */
2889static void
2890megasas_complete_int_cmd(struct megasas_instance *instance,
2891 struct megasas_cmd *cmd)
2892{
2be2a988 2893 cmd->cmd_status_drv = cmd->frame->io.cmd_status;
c4a3e0a5
BS		 2894 wake_up(&instance->int_cmd_wait_q);
2895}
2896
2897/**
2898 * megasas_complete_abort - Completes aborting a command
2899 * @instance: Adapter soft state
2900 * @cmd: Cmd that was issued to abort another cmd
2901 *
0d49016b 2902 * The megasas_issue_blocked_abort_cmd() function waits on abort_cmd_wait_q
2903 * after it issues an abort on a previously issued command. This function
c4a3e0a5
BS		 2904 * wakes up all functions waiting on the same wait queue.
2905 */
2906static void
2907megasas_complete_abort(struct megasas_instance *instance,
2908 struct megasas_cmd *cmd)
2909{
2910 if (cmd->sync_cmd) {
2911 cmd->sync_cmd = 0;
2be2a988 2912 cmd->cmd_status_drv = 0;
c4a3e0a5
BS		 2913 wake_up(&instance->abort_cmd_wait_q);
2914 }
c4a3e0a5
BS		 2915}
2916
c4a3e0a5
BS		 2917/**
2918 * megasas_complete_cmd - Completes a command
2919 * @instance: Adapter soft state
2920 * @cmd: Command to be completed
0d49016b 2921 * @alt_status: If non-zero, use this value as status to
da0dc9fb
BH		 2922 * SCSI mid-layer instead of the value returned
2923 * by the FW. This should be used if caller wants
2924 * an alternate status (as in the case of aborted
2925 * commands)
c4a3e0a5 2926 */
9c915a8c 2927void
c4a3e0a5
BS		 2928megasas_complete_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd,
2929 u8 alt_status)
2930{
2931 int exception = 0;
2932 struct megasas_header *hdr = &cmd->frame->hdr;
c3518837 2933 unsigned long flags;
9c915a8c 2934 struct fusion_context *fusion = instance->ctrl_context;
3761cb4c 2935 u32 opcode, status;
c4a3e0a5 2936
39a98554 2937 /* flag for the retry reset */
2938 cmd->retry_for_fw_reset = 0;
2939
05e9ebbe
SP		 2940 if (cmd->scmd)
2941 cmd->scmd->SCp.ptr = NULL;
c4a3e0a5
BS		 2942
2943 switch (hdr->cmd) {
e5f93a36 2944 case MFI_CMD_INVALID:
2945 /* Some older 1068 controller FW may keep a pended
2946 MR_DCMD_CTRL_EVENT_GET_INFO left over from the main kernel
2947 when booting the kdump kernel. Ignore this command to
2948 prevent a kernel panic on shutdown of the kdump kernel. */
1be18254
BH		 2949 dev_warn(&instance->pdev->dev, "MFI_CMD_INVALID command "
2950 "completed\n");
2951 dev_warn(&instance->pdev->dev, "If you have a controller "
2952 "other than PERC5, please upgrade your firmware\n");
e5f93a36 2953 break;
c4a3e0a5
BS		 2954 case MFI_CMD_PD_SCSI_IO:
2955 case MFI_CMD_LD_SCSI_IO:
2956
2957 /*
2958 * MFI_CMD_PD_SCSI_IO and MFI_CMD_LD_SCSI_IO could have been
2959 * issued either through an IO path or an IOCTL path. If it
2960 * was via IOCTL, we will send it to internal completion.
2961 */
2962 if (cmd->sync_cmd) {
2963 cmd->sync_cmd = 0;
2964 megasas_complete_int_cmd(instance, cmd);
2965 break;
2966 }
2967
c4a3e0a5
BS		 2968 case MFI_CMD_LD_READ:
2969 case MFI_CMD_LD_WRITE:
2970
2971 if (alt_status) {
2972 cmd->scmd->result = alt_status << 16;
2973 exception = 1;
2974 }
2975
2976 if (exception) {
2977
e4a082c7 2978 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 2979
155d98f0 2980 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 2981 cmd->scmd->scsi_done(cmd->scmd);
2982 megasas_return_cmd(instance, cmd);
2983
2984 break;
2985 }
2986
2987 switch (hdr->cmd_status) {
2988
2989 case MFI_STAT_OK:
2990 cmd->scmd->result = DID_OK << 16;
2991 break;
2992
2993 case MFI_STAT_SCSI_IO_FAILED:
2994 case MFI_STAT_LD_INIT_IN_PROGRESS:
2995 cmd->scmd->result =
2996 (DID_ERROR << 16) | hdr->scsi_status;
2997 break;
2998
2999 case MFI_STAT_SCSI_DONE_WITH_ERROR:
3000
3001 cmd->scmd->result = (DID_OK << 16) | hdr->scsi_status;
3002
3003 if (hdr->scsi_status == SAM_STAT_CHECK_CONDITION) {
3004 memset(cmd->scmd->sense_buffer, 0,
3005 SCSI_SENSE_BUFFERSIZE);
3006 memcpy(cmd->scmd->sense_buffer, cmd->sense,
3007 hdr->sense_len);
3008
3009 cmd->scmd->result |= DRIVER_SENSE << 24;
3010 }
3011
3012 break;
3013
3014 case MFI_STAT_LD_OFFLINE:
3015 case MFI_STAT_DEVICE_NOT_FOUND:
3016 cmd->scmd->result = DID_BAD_TARGET << 16;
3017 break;
3018
3019 default:
1be18254 3020 dev_printk(KERN_DEBUG, &instance->pdev->dev, "MFI FW status %#x\n",
c4a3e0a5
BS		 3021 hdr->cmd_status);
3022 cmd->scmd->result = DID_ERROR << 16;
3023 break;
3024 }
3025
e4a082c7 3026 atomic_dec(&instance->fw_outstanding);
c4a3e0a5 3027
155d98f0 3028 scsi_dma_unmap(cmd->scmd);
c4a3e0a5
BS		 3029 cmd->scmd->scsi_done(cmd->scmd);
3030 megasas_return_cmd(instance, cmd);
3031
3032 break;
3033
3034 case MFI_CMD_SMP:
3035 case MFI_CMD_STP:
3036 case MFI_CMD_DCMD:
94cd65dd 3037 opcode = le32_to_cpu(cmd->frame->dcmd.opcode);
9c915a8c 3038 /* Check for LD map update */
94cd65dd
SS		 3039 if ((opcode == MR_DCMD_LD_MAP_GET_INFO)
3040 && (cmd->frame->dcmd.mbox.b[1] == 1)) {
bc93d425 3041 fusion->fast_path_io = 0;
9c915a8c 3042 spin_lock_irqsave(instance->host->host_lock, flags);
3761cb4c 3043 instance->map_update_cmd = NULL;
9c915a8c 3044 if (cmd->frame->hdr.cmd_status != 0) {
3045 if (cmd->frame->hdr.cmd_status !=
3046 MFI_STAT_NOT_FOUND)
1be18254 3047 dev_warn(&instance->pdev->dev, "map syncfailed, status = 0x%x\n",
9c915a8c 3048 cmd->frame->hdr.cmd_status);
3049 else {
4026e9aa 3050 megasas_return_cmd(instance, cmd);
9c915a8c 3051 spin_unlock_irqrestore(
3052 instance->host->host_lock,
3053 flags);
3054 break;
3055 }
3056 } else
3057 instance->map_id++;
4026e9aa 3058 megasas_return_cmd(instance, cmd);
bc93d425
SS		 3059
3060 /*
3061 * Set fast path IO to ZERO.
3062 * Validate Map will set proper value.
3063 * Meanwhile all IOs will go as LD IO.
3064 */
3065 if (MR_ValidateMapInfo(instance))
9c915a8c 3066 fusion->fast_path_io = 1;
3067 else
3068 fusion->fast_path_io = 0;
3069 megasas_sync_map_info(instance);
3070 spin_unlock_irqrestore(instance->host->host_lock,
3071 flags);
3072 break;
3073 }
94cd65dd
SS		 3074 if (opcode == MR_DCMD_CTRL_EVENT_GET_INFO ||
3075 opcode == MR_DCMD_CTRL_EVENT_GET) {
c3518837
YB		 3076 spin_lock_irqsave(&poll_aen_lock, flags);
3077 megasas_poll_wait_aen = 0;
3078 spin_unlock_irqrestore(&poll_aen_lock, flags);
3079 }
c4a3e0a5 3080
3761cb4c 3081 /* FW has an updated PD sequence */
3082 if ((opcode == MR_DCMD_SYSTEM_PD_MAP_GET_INFO) &&
3083 (cmd->frame->dcmd.mbox.b[0] == 1)) {
3084
3085 spin_lock_irqsave(instance->host->host_lock, flags);
3086 status = cmd->frame->hdr.cmd_status;
3087 instance->jbod_seq_cmd = NULL;
3088 megasas_return_cmd(instance, cmd);
3089
3090 if (status == MFI_STAT_OK) {
3091 instance->pd_seq_map_id++;
3092 /* Re-register a pd sync seq num cmd */
3093 if (megasas_sync_pd_seq_num(instance, true))
3094 instance->use_seqnum_jbod_fp = false;
3095 } else
3096 instance->use_seqnum_jbod_fp = false;
3097
3098 spin_unlock_irqrestore(instance->host->host_lock, flags);
3099 break;
3100 }
3101
c4a3e0a5
BS		 3102 /*
3103 * See if got an event notification
3104 */
94cd65dd 3105 if (opcode == MR_DCMD_CTRL_EVENT_WAIT)
c4a3e0a5
BS		 3106 megasas_service_aen(instance, cmd);
3107 else
3108 megasas_complete_int_cmd(instance, cmd);
3109
3110 break;
3111
3112 case MFI_CMD_ABORT:
3113 /*
3114 * Cmd issued to abort another cmd returned
3115 */
3116 megasas_complete_abort(instance, cmd);
3117 break;
3118
3119 default:
1be18254 3120 dev_info(&instance->pdev->dev, "Unknown command completed! [0x%X]\n",
c4a3e0a5
BS		 3121 hdr->cmd);
3122 break;
3123 }
3124}
3125
39a98554 3126/**
3127 * megasas_issue_pending_cmds_again - issue all pending cmds
da0dc9fb 3128 * in FW again because of the fw reset
39a98554 3129 * @instance: Adapter soft state
3130 */
3131static inline void
3132megasas_issue_pending_cmds_again(struct megasas_instance *instance)
3133{
3134 struct megasas_cmd *cmd;
3135 struct list_head clist_local;
3136 union megasas_evt_class_locale class_locale;
3137 unsigned long flags;
3138 u32 seq_num;
3139
3140 INIT_LIST_HEAD(&clist_local);
3141 spin_lock_irqsave(&instance->hba_lock, flags);
3142 list_splice_init(&instance->internal_reset_pending_q, &clist_local);
3143 spin_unlock_irqrestore(&instance->hba_lock, flags);
3144
3145 while (!list_empty(&clist_local)) {
da0dc9fb 3146 cmd = list_entry((&clist_local)->next,
39a98554 3147 struct megasas_cmd, list);
3148 list_del_init(&cmd->list);
3149
3150 if (cmd->sync_cmd || cmd->scmd) {
1be18254
BH		 3151 dev_notice(&instance->pdev->dev, "command %p, %p:%d"
3152 "detected to be pending while HBA reset\n",
39a98554 3153 cmd, cmd->scmd, cmd->sync_cmd);
3154
3155 cmd->retry_for_fw_reset++;
3156
3157 if (cmd->retry_for_fw_reset == 3) {
1be18254 3158 dev_notice(&instance->pdev->dev, "cmd %p, %p:%d"
39a98554 3159 "was tried multiple times during reset."
3160 "Shutting down the HBA\n",
3161 cmd, cmd->scmd, cmd->sync_cmd);
c8dd61ef
SS		 3162 instance->instancet->disable_intr(instance);
3163 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3164 megaraid_sas_kill_hba(instance);
39a98554 3165 return;
3166 }
3167 }
3168
3169 if (cmd->sync_cmd == 1) {
3170 if (cmd->scmd) {
1be18254 3171 dev_notice(&instance->pdev->dev, "unexpected"
39a98554 3172 "cmd attached to internal command!\n");
3173 }
1be18254 3174 dev_notice(&instance->pdev->dev, "%p synchronous cmd"
39a98554 3175 "on the internal reset queue,"
3176 "issue it again.\n", cmd);
2be2a988 3177 cmd->cmd_status_drv = MFI_STAT_INVALID_STATUS;
39a98554 3178 instance->instancet->fire_cmd(instance,
da0dc9fb 3179 cmd->frame_phys_addr,
39a98554 3180 0, instance->reg_set);
3181 } else if (cmd->scmd) {
1be18254 3182 dev_notice(&instance->pdev->dev, "%p scsi cmd [%02x]"
39a98554 3183 "detected on the internal queue, issue again.\n",
5cd049a5 3184 cmd, cmd->scmd->cmnd[0]);
39a98554 3185
3186 atomic_inc(&instance->fw_outstanding);
3187 instance->instancet->fire_cmd(instance,
3188 cmd->frame_phys_addr,
3189 cmd->frame_count-1, instance->reg_set);
3190 } else {
1be18254 3191 dev_notice(&instance->pdev->dev, "%p unexpected cmd on the"
39a98554 3192 "internal reset defer list while re-issue!!\n",
3193 cmd);
3194 }
3195 }
3196
3197 if (instance->aen_cmd) {
1be18254 3198 dev_notice(&instance->pdev->dev, "aen_cmd in def process\n");
39a98554 3199 megasas_return_cmd(instance, instance->aen_cmd);
3200
da0dc9fb 3201 instance->aen_cmd = NULL;
39a98554 3202 }
3203
3204 /*
da0dc9fb
BH		 3205 * Initiate AEN (Asynchronous Event Notification)
3206 */
39a98554 3207 seq_num = instance->last_seq_num;
3208 class_locale.members.reserved = 0;
3209 class_locale.members.locale = MR_EVT_LOCALE_ALL;
3210 class_locale.members.class = MR_EVT_CLASS_DEBUG;
3211
3212 megasas_register_aen(instance, seq_num, class_locale.word);
3213}
3214
3215/**
3216 * Move the internal reset pending commands to a deferred queue.
3217 *
3218 * We move the commands pending at internal reset time to a
3219 * pending queue. This queue would be flushed after successful
3220 * completion of the internal reset sequence. if the internal reset
3221 * did not complete in time, the kernel reset handler would flush
3222 * these commands.
3223 **/
3224static void
3225megasas_internal_reset_defer_cmds(struct megasas_instance *instance)
3226{
3227 struct megasas_cmd *cmd;
3228 int i;
3229 u32 max_cmd = instance->max_fw_cmds;
3230 u32 defer_index;
3231 unsigned long flags;
3232
da0dc9fb 3233 defer_index = 0;
90dc9d98 3234 spin_lock_irqsave(&instance->mfi_pool_lock, flags);
39a98554 3235 for (i = 0; i < max_cmd; i++) {
3236 cmd = instance->cmd_list[i];
3237 if (cmd->sync_cmd == 1 || cmd->scmd) {
1be18254 3238 dev_notice(&instance->pdev->dev, "moving cmd[%d]:%p:%d:%p"
39a98554 3239 "on the defer queue as internal\n",
3240 defer_index, cmd, cmd->sync_cmd, cmd->scmd);
3241
3242 if (!list_empty(&cmd->list)) {
1be18254 3243 dev_notice(&instance->pdev->dev, "ERROR while"
39a98554 3244 " moving this cmd:%p, %d %p, it was"
3245 "discovered on some list?\n",
3246 cmd, cmd->sync_cmd, cmd->scmd);
3247
3248 list_del_init(&cmd->list);
3249 }
3250 defer_index++;
3251 list_add_tail(&cmd->list,
3252 &instance->internal_reset_pending_q);
3253 }
3254 }
90dc9d98 3255 spin_unlock_irqrestore(&instance->mfi_pool_lock, flags);
39a98554 3256}
3257
3258
3259static void
3260process_fw_state_change_wq(struct work_struct *work)
3261{
3262 struct megasas_instance *instance =
3263 container_of(work, struct megasas_instance, work_init);
3264 u32 wait;
3265 unsigned long flags;
3266
3267 if (instance->adprecovery != MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3268 dev_notice(&instance->pdev->dev, "error, recovery st %x\n",
39a98554 3269 instance->adprecovery);
3270 return ;
3271 }
3272
3273 if (instance->adprecovery == MEGASAS_ADPRESET_SM_INFAULT) {
1be18254 3274 dev_notice(&instance->pdev->dev, "FW detected to be in fault"
39a98554 3275 "state, restarting it...\n");
3276
d46a3ad6 3277 instance->instancet->disable_intr(instance);
39a98554 3278 atomic_set(&instance->fw_outstanding, 0);
3279
3280 atomic_set(&instance->fw_reset_no_pci_access, 1);
3281 instance->instancet->adp_reset(instance, instance->reg_set);
da0dc9fb 3282 atomic_set(&instance->fw_reset_no_pci_access, 0);
39a98554 3283
1be18254 3284 dev_notice(&instance->pdev->dev, "FW restarted successfully,"
39a98554 3285 "initiating next stage...\n");
3286
1be18254 3287 dev_notice(&instance->pdev->dev, "HBA recovery state machine,"
39a98554 3288 "state 2 starting...\n");
3289
da0dc9fb 3290 /* waiting for about 20 second before start the second init */
39a98554 3291 for (wait = 0; wait < 30; wait++) {
3292 msleep(1000);
3293 }
3294
058a8fac 3295 if (megasas_transition_to_ready(instance, 1)) {
1be18254 3296 dev_notice(&instance->pdev->dev, "adapter not ready\n");
39a98554 3297
c8dd61ef 3298 atomic_set(&instance->fw_reset_no_pci_access, 1);
39a98554 3299 megaraid_sas_kill_hba(instance);
39a98554 3300 return ;
3301 }
3302
3303 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS1064R) ||
3304 (instance->pdev->device == PCI_DEVICE_ID_DELL_PERC5) ||
3305 (instance->pdev->device == PCI_DEVICE_ID_LSI_VERDE_ZCR)
3306 ) {
3307 *instance->consumer = *instance->producer;
3308 } else {
3309 *instance->consumer = 0;
3310 *instance->producer = 0;
3311 }
3312
3313 megasas_issue_init_mfi(instance);
3314
3315 spin_lock_irqsave(&instance->hba_lock, flags);
3316 instance->adprecovery = MEGASAS_HBA_OPERATIONAL;
3317 spin_unlock_irqrestore(&instance->hba_lock, flags);
d46a3ad6 3318 instance->instancet->enable_intr(instance);
39a98554 3319
3320 megasas_issue_pending_cmds_again(instance);
3321 instance->issuepend_done = 1;
3322 }
39a98554 3323}
3324
c4a3e0a5
BS		 3325/**
3326 * megasas_deplete_reply_queue - Processes all completed commands
3327 * @instance: Adapter soft state
3328 * @alt_status: Alternate status to be returned to
da0dc9fb
BH		 3329 * SCSI mid-layer instead of the status
3330 * returned by the FW
39a98554 3331 * Note: this must be called with hba lock held
c4a3e0a5 3332 */
858119e1 3333static int
39a98554 3334megasas_deplete_reply_queue(struct megasas_instance *instance,
3335 u8 alt_status)
c4a3e0a5 3336{
39a98554 3337 u32 mfiStatus;
3338 u32 fw_state;
3339
3340 if ((mfiStatus = instance->instancet->check_reset(instance,
3341 instance->reg_set)) == 1) {
3342 return IRQ_HANDLED;
3343 }
3344
3345 if ((mfiStatus = instance->instancet->clear_intr(
3346 instance->reg_set)
3347 ) == 0) {
e1419191 3348 /* Hardware may not set outbound_intr_status in MSI-X mode */
c8e858fe 3349 if (!instance->msix_vectors)
e1419191 3350 return IRQ_NONE;
39a98554 3351 }
3352
3353 instance->mfiStatus = mfiStatus;
3354
3355 if ((mfiStatus & MFI_INTR_FLAG_FIRMWARE_STATE_CHANGE)) {
3356 fw_state = instance->instancet->read_fw_status_reg(
3357 instance->reg_set) & MFI_STATE_MASK;
3358
3359 if (fw_state != MFI_STATE_FAULT) {
1be18254 3360 dev_notice(&instance->pdev->dev, "fw state:%x\n",
39a98554 3361 fw_state);
3362 }
3363
3364 if ((fw_state == MFI_STATE_FAULT) &&
3365 (instance->disableOnlineCtrlReset == 0)) {
1be18254 3366 dev_notice(&instance->pdev->dev, "wait adp restart\n");
39a98554 3367
3368 if ((instance->pdev->device ==
3369 PCI_DEVICE_ID_LSI_SAS1064R) ||
3370 (instance->pdev->device ==
3371 PCI_DEVICE_ID_DELL_PERC5) ||
3372 (instance->pdev->device ==
3373 PCI_DEVICE_ID_LSI_VERDE_ZCR)) {
3374
3375 *instance->consumer =
94cd65dd 3376 cpu_to_le32(MEGASAS_ADPRESET_INPROG_SIGN);
39a98554 3377 }
3378
3379
d46a3ad6 3380 instance->instancet->disable_intr(instance);
39a98554 3381 instance->adprecovery = MEGASAS_ADPRESET_SM_INFAULT;
3382 instance->issuepend_done = 0;
3383
3384 atomic_set(&instance->fw_outstanding, 0);
3385 megasas_internal_reset_defer_cmds(instance);
3386
1be18254 3387 dev_notice(&instance->pdev->dev, "fwState=%x, stage:%d\n",
39a98554 3388 fw_state, instance->adprecovery);
3389
3390 schedule_work(&instance->work_init);
3391 return IRQ_HANDLED;
3392
3393 } else {
1be18254 3394 dev_notice(&instance->pdev->dev, "fwstate:%x, dis_OCR=%x\n",
39a98554 3395 fw_state, instance->disableOnlineCtrlReset);
3396 }
3397 }
c4a3e0a5 3398
5d018ad0 3399 tasklet_schedule(&instance->isr_tasklet);
c4a3e0a5
BS		 3400 return IRQ_HANDLED;
3401}
c4a3e0a5
BS		 3402/**
3403 * megasas_isr - isr entry point
3404 */
7d12e780 3405static irqreturn_t megasas_isr(int irq, void *devp)
c4a3e0a5 3406{
c8e858fe 3407 struct megasas_irq_context *irq_context = devp;
3408 struct megasas_instance *instance = irq_context->instance;
39a98554 3409 unsigned long flags;
da0dc9fb 3410 irqreturn_t rc;
39a98554 3411
c8e858fe 3412 if (atomic_read(&instance->fw_reset_no_pci_access))
39a98554 3413 return IRQ_HANDLED;
3414
39a98554 3415 spin_lock_irqsave(&instance->hba_lock, flags);
da0dc9fb 3416 rc = megasas_deplete_reply_queue(instance, DID_OK);
39a98554 3417 spin_unlock_irqrestore(&instance->hba_lock, flags);
3418
3419 return rc;
c4a3e0a5
BS		 3420}
3421
3422/**
3423 * megasas_transition_to_ready - Move the FW to READY state
1341c939 3424 * @instance: Adapter soft state
c4a3e0a5
BS		 3425 *
3426 * During the initialization, FW passes can potentially be in any one of
3427 * several possible states. If the FW in operational, waiting-for-handshake
3428 * states, driver must take steps to bring it to ready state. Otherwise, it
3429 * has to wait for the ready state.
3430 */
9c915a8c 3431int
058a8fac 3432megasas_transition_to_ready(struct megasas_instance *instance, int ocr)
c4a3e0a5
BS		 3433{
3434 int i;
3435 u8 max_wait;
3436 u32 fw_state;
3437 u32 cur_state;
7218df69 3438 u32 abs_state, curr_abs_state;
c4a3e0a5 3439
bc6ac5e8
TH		 3440 abs_state = instance->instancet->read_fw_status_reg(instance->reg_set);
3441 fw_state = abs_state & MFI_STATE_MASK;
c4a3e0a5 3442
e3bbff9f 3443 if (fw_state != MFI_STATE_READY)
1be18254 3444 dev_info(&instance->pdev->dev, "Waiting for FW to come to ready"
0d49016b 3445 " state\n");
e3bbff9f 3446
c4a3e0a5
BS		 3447 while (fw_state != MFI_STATE_READY) {
3448
c4a3e0a5
BS		 3449 switch (fw_state) {
3450
3451 case MFI_STATE_FAULT:
1be18254 3452 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW in FAULT state!!\n");
058a8fac 3453 if (ocr) {
3454 max_wait = MEGASAS_RESET_WAIT_TIME;
3455 cur_state = MFI_STATE_FAULT;
3456 break;
3457 } else
3458 return -ENODEV;
c4a3e0a5
BS		 3459
3460 case MFI_STATE_WAIT_HANDSHAKE:
3461 /*
3462 * Set the CLR bit in inbound doorbell
3463 */
0c79e681 3464 if ((instance->pdev->device ==
87911122
YB		 3465 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3466 (instance->pdev->device ==
9c915a8c 3467 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3468 (instance->ctrl_context))
87911122
YB		 3469 writel(
3470 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
9c915a8c 3471 &instance->reg_set->doorbell);
5a8cb85b 3472 else
87911122
YB		 3473 writel(
3474 MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG,
3475 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3476
7218df69 3477 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3478 cur_state = MFI_STATE_WAIT_HANDSHAKE;
3479 break;
3480
e3bbff9f 3481 case MFI_STATE_BOOT_MESSAGE_PENDING:
87911122 3482 if ((instance->pdev->device ==
9c915a8c 3483 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3484 (instance->pdev->device ==
3485 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3486 (instance->ctrl_context))
87911122 3487 writel(MFI_INIT_HOTPLUG,
9c915a8c 3488 &instance->reg_set->doorbell);
5a8cb85b 3489 else
87911122
YB		 3490 writel(MFI_INIT_HOTPLUG,
3491 &instance->reg_set->inbound_doorbell);
e3bbff9f 3492
7218df69 3493 max_wait = MEGASAS_RESET_WAIT_TIME;
e3bbff9f
SP		 3494 cur_state = MFI_STATE_BOOT_MESSAGE_PENDING;
3495 break;
3496
c4a3e0a5
BS		 3497 case MFI_STATE_OPERATIONAL:
3498 /*
e3bbff9f 3499 * Bring it to READY state; assuming max wait 10 secs
c4a3e0a5 3500 */
d46a3ad6 3501 instance->instancet->disable_intr(instance);
87911122
YB		 3502 if ((instance->pdev->device ==
3503 PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
3504 (instance->pdev->device ==
9c915a8c 3505 PCI_DEVICE_ID_LSI_SAS0071SKINNY) ||
5a8cb85b 3506 (instance->ctrl_context)) {
87911122 3507 writel(MFI_RESET_FLAGS,
9c915a8c 3508 &instance->reg_set->doorbell);
5a8cb85b 3509
3510 if (instance->ctrl_context) {
9c915a8c 3511 for (i = 0; i < (10 * 1000); i += 20) {
3512 if (readl(
3513 &instance->
3514 reg_set->
3515 doorbell) & 1)
3516 msleep(20);
3517 else
3518 break;
3519 }
3520 }
87911122
YB		 3521 } else
3522 writel(MFI_RESET_FLAGS,
3523 &instance->reg_set->inbound_doorbell);
c4a3e0a5 3524
7218df69 3525 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3526 cur_state = MFI_STATE_OPERATIONAL;
3527 break;
3528
3529 case MFI_STATE_UNDEFINED:
3530 /*
3531 * This state should not last for more than 2 seconds
3532 */
7218df69 3533 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3534 cur_state = MFI_STATE_UNDEFINED;
3535 break;
3536
3537 case MFI_STATE_BB_INIT:
7218df69 3538 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3539 cur_state = MFI_STATE_BB_INIT;
3540 break;
3541
3542 case MFI_STATE_FW_INIT:
7218df69 3543 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3544 cur_state = MFI_STATE_FW_INIT;
3545 break;
3546
3547 case MFI_STATE_FW_INIT_2:
7218df69 3548 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3549 cur_state = MFI_STATE_FW_INIT_2;
3550 break;
3551
3552 case MFI_STATE_DEVICE_SCAN:
7218df69 3553 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3554 cur_state = MFI_STATE_DEVICE_SCAN;
3555 break;
3556
3557 case MFI_STATE_FLUSH_CACHE:
7218df69 3558 max_wait = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 3559 cur_state = MFI_STATE_FLUSH_CACHE;
3560 break;
3561
3562 default:
1be18254 3563 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Unknown state 0x%x\n",
c4a3e0a5
BS		 3564 fw_state);
3565 return -ENODEV;
3566 }
3567
3568 /*
3569 * The cur_state should not last for more than max_wait secs
3570 */
3571 for (i = 0; i < (max_wait * 1000); i++) {
bc6ac5e8
TH		 3572 curr_abs_state = instance->instancet->
3573 read_fw_status_reg(instance->reg_set);
c4a3e0a5 3574
7218df69 3575 if (abs_state == curr_abs_state) {
c4a3e0a5
BS		 3576 msleep(1);
3577 } else
3578 break;
3579 }
3580
3581 /*
3582 * Return error if fw_state hasn't changed after max_wait
3583 */
7218df69 3584 if (curr_abs_state == abs_state) {
1be18254 3585 dev_printk(KERN_DEBUG, &instance->pdev->dev, "FW state [%d] hasn't changed "
c4a3e0a5
BS		 3586 "in %d secs\n", fw_state, max_wait);
3587 return -ENODEV;
3588 }
bc6ac5e8
TH		 3589
3590 abs_state = curr_abs_state;
3591 fw_state = curr_abs_state & MFI_STATE_MASK;
39a98554 3592 }
1be18254 3593 dev_info(&instance->pdev->dev, "FW now in Ready state\n");
c4a3e0a5
BS		 3594
3595 return 0;
3596}
3597
3598/**
3599 * megasas_teardown_frame_pool - Destroy the cmd frame DMA pool
3600 * @instance: Adapter soft state
3601 */
3602static void megasas_teardown_frame_pool(struct megasas_instance *instance)
3603{
3604 int i;
9c915a8c 3605 u32 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3606 struct megasas_cmd *cmd;
3607
3608 if (!instance->frame_dma_pool)
3609 return;
3610
3611 /*
3612 * Return all frames to pool
3613 */
3614 for (i = 0; i < max_cmd; i++) {
3615
3616 cmd = instance->cmd_list[i];
3617
3618 if (cmd->frame)
3619 pci_pool_free(instance->frame_dma_pool, cmd->frame,
3620 cmd->frame_phys_addr);
3621
3622 if (cmd->sense)
e3bbff9f 3623 pci_pool_free(instance->sense_dma_pool, cmd->sense,
c4a3e0a5
BS		 3624 cmd->sense_phys_addr);
3625 }
3626
3627 /*
3628 * Now destroy the pool itself
3629 */
3630 pci_pool_destroy(instance->frame_dma_pool);
3631 pci_pool_destroy(instance->sense_dma_pool);
3632
3633 instance->frame_dma_pool = NULL;
3634 instance->sense_dma_pool = NULL;
3635}
3636
3637/**
3638 * megasas_create_frame_pool - Creates DMA pool for cmd frames
3639 * @instance: Adapter soft state
3640 *
3641 * Each command packet has an embedded DMA memory buffer that is used for
3642 * filling MFI frame and the SG list that immediately follows the frame. This
3643 * function creates those DMA memory buffers for each command packet by using
3644 * PCI pool facility.
3645 */
3646static int megasas_create_frame_pool(struct megasas_instance *instance)
3647{
3648 int i;
3649 u32 max_cmd;
3650 u32 sge_sz;
c4a3e0a5
BS		 3651 u32 total_sz;
3652 u32 frame_count;
3653 struct megasas_cmd *cmd;
3654
9c915a8c 3655 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3656
3657 /*
3658 * Size of our frame is 64 bytes for MFI frame, followed by max SG
3659 * elements and finally SCSI_SENSE_BUFFERSIZE bytes for sense buffer
3660 */
3661 sge_sz = (IS_DMA64) ? sizeof(struct megasas_sge64) :
3662 sizeof(struct megasas_sge32);
3663
da0dc9fb 3664 if (instance->flag_ieee)
f4c9a131 3665 sge_sz = sizeof(struct megasas_sge_skinny);
f4c9a131 3666
c4a3e0a5 3667 /*
200aed58
SS		 3668 * For MFI controllers.
3669 * max_num_sge = 60
3670 * max_sge_sz = 16 byte (sizeof megasas_sge_skinny)
3671 * Total 960 byte (15 MFI frame of 64 byte)
3672 *
3673 * Fusion adapter require only 3 extra frame.
3674 * max_num_sge = 16 (defined as MAX_IOCTL_SGE)
3675 * max_sge_sz = 12 byte (sizeof megasas_sge64)
3676 * Total 192 byte (3 MFI frame of 64 byte)
c4a3e0a5 3677 */
200aed58 3678 frame_count = instance->ctrl_context ? (3 + 1) : (15 + 1);
c4a3e0a5
BS		 3679 total_sz = MEGAMFI_FRAME_SIZE * frame_count;
3680 /*
3681 * Use DMA pool facility provided by PCI layer
3682 */
3683 instance->frame_dma_pool = pci_pool_create("megasas frame pool",
200aed58 3684 instance->pdev, total_sz, 256, 0);
c4a3e0a5
BS		 3685
3686 if (!instance->frame_dma_pool) {
1be18254 3687 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup frame pool\n");
c4a3e0a5
BS		 3688 return -ENOMEM;
3689 }
3690
3691 instance->sense_dma_pool = pci_pool_create("megasas sense pool",
3692 instance->pdev, 128, 4, 0);
3693
3694 if (!instance->sense_dma_pool) {
1be18254 3695 dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup sense pool\n");
c4a3e0a5
BS		 3696
3697 pci_pool_destroy(instance->frame_dma_pool);
3698 instance->frame_dma_pool = NULL;
3699
3700 return -ENOMEM;
3701 }
3702
3703 /*
3704 * Allocate and attach a frame to each of the commands in cmd_list.
3705 * By making cmd->index as the context instead of the &cmd, we can
3706 * always use 32bit context regardless of the architecture
3707 */
3708 for (i = 0; i < max_cmd; i++) {
3709
3710 cmd = instance->cmd_list[i];
3711
3712 cmd->frame = pci_pool_alloc(instance->frame_dma_pool,
3713 GFP_KERNEL, &cmd->frame_phys_addr);
3714
3715 cmd->sense = pci_pool_alloc(instance->sense_dma_pool,
3716 GFP_KERNEL, &cmd->sense_phys_addr);
3717
3718 /*
3719 * megasas_teardown_frame_pool() takes care of freeing
3720 * whatever has been allocated
3721 */
3722 if (!cmd->frame || !cmd->sense) {
1be18254 3723 dev_printk(KERN_DEBUG, &instance->pdev->dev, "pci_pool_alloc failed\n");
c4a3e0a5
BS		 3724 megasas_teardown_frame_pool(instance);
3725 return -ENOMEM;
3726 }
3727
707e09bd 3728 memset(cmd->frame, 0, total_sz);
94cd65dd 3729 cmd->frame->io.context = cpu_to_le32(cmd->index);
7e8a75f4 3730 cmd->frame->io.pad_0 = 0;
5a8cb85b 3731 if (!instance->ctrl_context && reset_devices)
e5f93a36 3732 cmd->frame->hdr.cmd = MFI_CMD_INVALID;
c4a3e0a5
BS		 3733 }
3734
3735 return 0;
3736}
3737
3738/**
3739 * megasas_free_cmds - Free all the cmds in the free cmd pool
3740 * @instance: Adapter soft state
3741 */
9c915a8c 3742void megasas_free_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 3743{
3744 int i;
da0dc9fb 3745
c4a3e0a5
BS		 3746 /* First free the MFI frame pool */
3747 megasas_teardown_frame_pool(instance);
3748
3749 /* Free all the commands in the cmd_list */
9c915a8c 3750 for (i = 0; i < instance->max_mfi_cmds; i++)
3751
c4a3e0a5
BS		 3752 kfree(instance->cmd_list[i]);
3753
3754 /* Free the cmd_list buffer itself */
3755 kfree(instance->cmd_list);
3756 instance->cmd_list = NULL;
3757
3758 INIT_LIST_HEAD(&instance->cmd_pool);
3759}
3760
3761/**
3762 * megasas_alloc_cmds - Allocates the command packets
3763 * @instance: Adapter soft state
3764 *
3765 * Each command that is issued to the FW, whether IO commands from the OS or
3766 * internal commands like IOCTLs, are wrapped in local data structure called
3767 * megasas_cmd. The frame embedded in this megasas_cmd is actually issued to
3768 * the FW.
3769 *
3770 * Each frame has a 32-bit field called context (tag). This context is used
3771 * to get back the megasas_cmd from the frame when a frame gets completed in
3772 * the ISR. Typically the address of the megasas_cmd itself would be used as
3773 * the context. But we wanted to keep the differences between 32 and 64 bit
3774 * systems to the mininum. We always use 32 bit integers for the context. In
3775 * this driver, the 32 bit values are the indices into an array cmd_list.
3776 * This array is used only to look up the megasas_cmd given the context. The
3777 * free commands themselves are maintained in a linked list called cmd_pool.
3778 */
9c915a8c 3779int megasas_alloc_cmds(struct megasas_instance *instance)
c4a3e0a5
BS		 3780{
3781 int i;
3782 int j;
3783 u32 max_cmd;
3784 struct megasas_cmd *cmd;
90dc9d98 3785 struct fusion_context *fusion;
c4a3e0a5 3786
90dc9d98 3787 fusion = instance->ctrl_context;
9c915a8c 3788 max_cmd = instance->max_mfi_cmds;
c4a3e0a5
BS		 3789
3790 /*
3791 * instance->cmd_list is an array of struct megasas_cmd pointers.
3792 * Allocate the dynamic array first and then allocate individual
3793 * commands.
3794 */
dd00cc48 3795 instance->cmd_list = kcalloc(max_cmd, sizeof(struct megasas_cmd*), GFP_KERNEL);
c4a3e0a5
BS		 3796
3797 if (!instance->cmd_list) {
1be18254 3798 dev_printk(KERN_DEBUG, &instance->pdev->dev, "out of memory\n");
c4a3e0a5
BS		 3799 return -ENOMEM;
3800 }
3801
9c915a8c 3802 memset(instance->cmd_list, 0, sizeof(struct megasas_cmd *) *max_cmd);
c4a3e0a5
BS		 3803
3804 for (i = 0; i < max_cmd; i++) {
3805 instance->cmd_list[i] = kmalloc(sizeof(struct megasas_cmd),
3806 GFP_KERNEL);
3807
3808 if (!instance->cmd_list[i]) {
3809
3810 for (j = 0; j < i; j++)
3811 kfree(instance->cmd_list[j]);
3812
3813 kfree(instance->cmd_list);
3814 instance->cmd_list = NULL;
3815
3816 return -ENOMEM;
3817 }
3818 }
3819
c4a3e0a5
BS		 3820 for (i = 0; i < max_cmd; i++) {
3821 cmd = instance->cmd_list[i];
3822 memset(cmd, 0, sizeof(struct megasas_cmd));
3823 cmd->index = i;
39a98554 3824 cmd->scmd = NULL;
c4a3e0a5
BS		 3825 cmd->instance = instance;
3826
3827 list_add_tail(&cmd->list, &instance->cmd_pool);
3828 }
3829
3830 /*
3831 * Create a frame pool and assign one frame to each cmd
3832 */
3833 if (megasas_create_frame_pool(instance)) {
1be18254 3834 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error creating frame DMA pool\n");
c4a3e0a5
BS		 3835 megasas_free_cmds(instance);
3836 }
3837
3838 return 0;
3839}
3840
81e403ce
YB		 3841/*
3842 * megasas_get_pd_list_info - Returns FW's pd_list structure
3843 * @instance: Adapter soft state
3844 * @pd_list: pd_list structure
3845 *
3846 * Issues an internal command (DCMD) to get the FW's controller PD
3847 * list structure. This information is mainly used to find out SYSTEM
3848 * supported by the FW.
3849 */
3850static int
3851megasas_get_pd_list(struct megasas_instance *instance)
3852{
3853 int ret = 0, pd_index = 0;
3854 struct megasas_cmd *cmd;
3855 struct megasas_dcmd_frame *dcmd;
3856 struct MR_PD_LIST *ci;
3857 struct MR_PD_ADDRESS *pd_addr;
3858 dma_addr_t ci_h = 0;
3859
3860 cmd = megasas_get_cmd(instance);
3861
3862 if (!cmd) {
1be18254 3863 dev_printk(KERN_DEBUG, &instance->pdev->dev, "(get_pd_list): Failed to get cmd\n");
81e403ce
YB		 3864 return -ENOMEM;
3865 }
3866
3867 dcmd = &cmd->frame->dcmd;
3868
3869 ci = pci_alloc_consistent(instance->pdev,
3870 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST), &ci_h);
3871
3872 if (!ci) {
1be18254 3873 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for pd_list\n");
81e403ce
YB		 3874 megasas_return_cmd(instance, cmd);
3875 return -ENOMEM;
3876 }
3877
3878 memset(ci, 0, sizeof(*ci));
3879 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
3880
3881 dcmd->mbox.b[0] = MR_PD_QUERY_TYPE_EXPOSED_TO_HOST;
3882 dcmd->mbox.b[1] = 0;
3883 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 3884 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
81e403ce 3885 dcmd->sge_count = 1;
94cd65dd 3886 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
81e403ce 3887 dcmd->timeout = 0;
780a3762 3888 dcmd->pad_0 = 0;
94cd65dd
SS		 3889 dcmd->data_xfer_len = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
3890 dcmd->opcode = cpu_to_le32(MR_DCMD_PD_LIST_QUERY);
3891 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
3892 dcmd->sgl.sge32[0].length = cpu_to_le32(MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST));
81e403ce 3893
90dc9d98
SS		 3894 if (instance->ctrl_context && !instance->mask_interrupts)
3895 ret = megasas_issue_blocked_cmd(instance, cmd,
3896 MEGASAS_BLOCKED_CMD_TIMEOUT);
3897 else
3898 ret = megasas_issue_polled(instance, cmd);
81e403ce
YB		 3899
3900 /*
da0dc9fb
BH		 3901 * the following function will get the instance PD LIST.
3902 */
81e403ce
YB		 3903
3904 pd_addr = ci->addr;
3905
da0dc9fb 3906 if (ret == 0 &&
94cd65dd 3907 (le32_to_cpu(ci->count) <
81e403ce
YB		 3908 (MEGASAS_MAX_PD_CHANNELS * MEGASAS_MAX_DEV_PER_CHANNEL))) {
3909
999ece0a 3910 memset(instance->local_pd_list, 0,
81e403ce
YB		 3911 MEGASAS_MAX_PD * sizeof(struct megasas_pd_list));
3912
94cd65dd 3913 for (pd_index = 0; pd_index < le32_to_cpu(ci->count); pd_index++) {
81e403ce 3914
999ece0a 3915 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].tid =
94cd65dd 3916 le16_to_cpu(pd_addr->deviceId);
999ece0a 3917 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveType =
81e403ce 3918 pd_addr->scsiDevType;
999ece0a 3919 instance->local_pd_list[le16_to_cpu(pd_addr->deviceId)].driveState =
81e403ce
YB		 3920 MR_PD_STATE_SYSTEM;
3921 pd_addr++;
3922 }
999ece0a
SS		 3923 memcpy(instance->pd_list, instance->local_pd_list,
3924 sizeof(instance->pd_list));
81e403ce
YB		 3925 }
3926
3927 pci_free_consistent(instance->pdev,
3928 MEGASAS_MAX_PD * sizeof(struct MR_PD_LIST),
3929 ci, ci_h);
90dc9d98 3930
4026e9aa 3931 megasas_return_cmd(instance, cmd);
81e403ce
YB		 3932
3933 return ret;
3934}
3935
bdc6fb8d
YB		 3936/*
3937 * megasas_get_ld_list_info - Returns FW's ld_list structure
3938 * @instance: Adapter soft state
3939 * @ld_list: ld_list structure
3940 *
3941 * Issues an internal command (DCMD) to get the FW's controller PD
3942 * list structure. This information is mainly used to find out SYSTEM
3943 * supported by the FW.
3944 */
3945static int
3946megasas_get_ld_list(struct megasas_instance *instance)
3947{
3948 int ret = 0, ld_index = 0, ids = 0;
3949 struct megasas_cmd *cmd;
3950 struct megasas_dcmd_frame *dcmd;
3951 struct MR_LD_LIST *ci;
3952 dma_addr_t ci_h = 0;
94cd65dd 3953 u32 ld_count;
bdc6fb8d
YB		 3954
3955 cmd = megasas_get_cmd(instance);
3956
3957 if (!cmd) {
1be18254 3958 dev_printk(KERN_DEBUG, &instance->pdev->dev, "megasas_get_ld_list: Failed to get cmd\n");
bdc6fb8d
YB		 3959 return -ENOMEM;
3960 }
3961
3962 dcmd = &cmd->frame->dcmd;
3963
3964 ci = pci_alloc_consistent(instance->pdev,
3965 sizeof(struct MR_LD_LIST),
3966 &ci_h);
3967
3968 if (!ci) {
1be18254 3969 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem in get_ld_list\n");
bdc6fb8d
YB		 3970 megasas_return_cmd(instance, cmd);
3971 return -ENOMEM;
3972 }
3973
3974 memset(ci, 0, sizeof(*ci));
3975 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
3976
51087a86
SS		 3977 if (instance->supportmax256vd)
3978 dcmd->mbox.b[0] = 1;
bdc6fb8d 3979 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 3980 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
bdc6fb8d 3981 dcmd->sge_count = 1;
94cd65dd 3982 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
bdc6fb8d 3983 dcmd->timeout = 0;
94cd65dd
SS		 3984 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_LIST));
3985 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_GET_LIST);
3986 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
3987 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_LIST));
bdc6fb8d
YB		 3988 dcmd->pad_0 = 0;
3989
90dc9d98
SS		 3990 if (instance->ctrl_context && !instance->mask_interrupts)
3991 ret = megasas_issue_blocked_cmd(instance, cmd,
3992 MEGASAS_BLOCKED_CMD_TIMEOUT);
3993 else
3994 ret = megasas_issue_polled(instance, cmd);
3995
bdc6fb8d 3996
94cd65dd
SS		 3997 ld_count = le32_to_cpu(ci->ldCount);
3998
bdc6fb8d
YB		 3999 /* the following function will get the instance PD LIST */
4000
51087a86
SS		 4001 if ((ret == 0) && (ld_count <= instance->fw_supported_vd_count)) {
4002 memset(instance->ld_ids, 0xff, MAX_LOGICAL_DRIVES_EXT);
bdc6fb8d 4003
94cd65dd 4004 for (ld_index = 0; ld_index < ld_count; ld_index++) {
bdc6fb8d
YB		 4005 if (ci->ldList[ld_index].state != 0) {
4006 ids = ci->ldList[ld_index].ref.targetId;
4007 instance->ld_ids[ids] =
4008 ci->ldList[ld_index].ref.targetId;
4009 }
4010 }
4011 }
4012
4013 pci_free_consistent(instance->pdev,
4014 sizeof(struct MR_LD_LIST),
4015 ci,
4016 ci_h);
4017
4026e9aa 4018 megasas_return_cmd(instance, cmd);
bdc6fb8d
YB		 4019 return ret;
4020}
4021
21c9e160 4022/**
4023 * megasas_ld_list_query - Returns FW's ld_list structure
4024 * @instance: Adapter soft state
4025 * @ld_list: ld_list structure
4026 *
4027 * Issues an internal command (DCMD) to get the FW's controller PD
4028 * list structure. This information is mainly used to find out SYSTEM
4029 * supported by the FW.
4030 */
4031static int
4032megasas_ld_list_query(struct megasas_instance *instance, u8 query_type)
4033{
4034 int ret = 0, ld_index = 0, ids = 0;
4035 struct megasas_cmd *cmd;
4036 struct megasas_dcmd_frame *dcmd;
4037 struct MR_LD_TARGETID_LIST *ci;
4038 dma_addr_t ci_h = 0;
94cd65dd 4039 u32 tgtid_count;
21c9e160 4040
4041 cmd = megasas_get_cmd(instance);
4042
4043 if (!cmd) {
1be18254
BH		 4044 dev_warn(&instance->pdev->dev,
4045 "megasas_ld_list_query: Failed to get cmd\n");
21c9e160 4046 return -ENOMEM;
4047 }
4048
4049 dcmd = &cmd->frame->dcmd;
4050
4051 ci = pci_alloc_consistent(instance->pdev,
4052 sizeof(struct MR_LD_TARGETID_LIST), &ci_h);
4053
4054 if (!ci) {
1be18254
BH		 4055 dev_warn(&instance->pdev->dev,
4056 "Failed to alloc mem for ld_list_query\n");
21c9e160 4057 megasas_return_cmd(instance, cmd);
4058 return -ENOMEM;
4059 }
4060
4061 memset(ci, 0, sizeof(*ci));
4062 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4063
4064 dcmd->mbox.b[0] = query_type;
51087a86
SS		 4065 if (instance->supportmax256vd)
4066 dcmd->mbox.b[2] = 1;
21c9e160 4067
4068 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4069 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
21c9e160 4070 dcmd->sge_count = 1;
94cd65dd 4071 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
21c9e160 4072 dcmd->timeout = 0;
94cd65dd
SS		 4073 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
4074 dcmd->opcode = cpu_to_le32(MR_DCMD_LD_LIST_QUERY);
4075 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4076 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct MR_LD_TARGETID_LIST));
21c9e160 4077 dcmd->pad_0 = 0;
4078
90dc9d98
SS		 4079 if (instance->ctrl_context && !instance->mask_interrupts)
4080 ret = megasas_issue_blocked_cmd(instance, cmd,
4081 MEGASAS_BLOCKED_CMD_TIMEOUT);
4082 else
4083 ret = megasas_issue_polled(instance, cmd);
21c9e160 4084
94cd65dd
SS		 4085 tgtid_count = le32_to_cpu(ci->count);
4086
51087a86 4087 if ((ret == 0) && (tgtid_count <= (instance->fw_supported_vd_count))) {
21c9e160 4088 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
94cd65dd 4089 for (ld_index = 0; ld_index < tgtid_count; ld_index++) {
21c9e160 4090 ids = ci->targetId[ld_index];
4091 instance->ld_ids[ids] = ci->targetId[ld_index];
4092 }
4093
4094 }
4095
4096 pci_free_consistent(instance->pdev, sizeof(struct MR_LD_TARGETID_LIST),
4097 ci, ci_h);
4098
4026e9aa 4099 megasas_return_cmd(instance, cmd);
21c9e160 4100
4101 return ret;
4102}
4103
d009b576
SS		 4104/*
4105 * megasas_update_ext_vd_details : Update details w.r.t Extended VD
4106 * instance : Controller's instance
4107*/
4108static void megasas_update_ext_vd_details(struct megasas_instance *instance)
4109{
4110 struct fusion_context *fusion;
4111 u32 old_map_sz;
4112 u32 new_map_sz;
4113
4114 fusion = instance->ctrl_context;
4115 /* For MFI based controllers return dummy success */
4116 if (!fusion)
4117 return;
4118
4119 instance->supportmax256vd =
4120 instance->ctrl_info->adapterOperations3.supportMaxExtLDs;
4121 /* Below is additional check to address future FW enhancement */
4122 if (instance->ctrl_info->max_lds > 64)
4123 instance->supportmax256vd = 1;
4124
4125 instance->drv_supported_vd_count = MEGASAS_MAX_LD_CHANNELS
4126 * MEGASAS_MAX_DEV_PER_CHANNEL;
4127 instance->drv_supported_pd_count = MEGASAS_MAX_PD_CHANNELS
4128 * MEGASAS_MAX_DEV_PER_CHANNEL;
4129 if (instance->supportmax256vd) {
4130 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES_EXT;
4131 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4132 } else {
4133 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4134 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
4135 }
d88da09a
SS		 4136
4137 dev_info(&instance->pdev->dev,
4138 "firmware type\t: %s\n",
4139 instance->supportmax256vd ? "Extended VD(240 VD)firmware" :
4140 "Legacy(64 VD) firmware");
d009b576 4141
da0dc9fb 4142 old_map_sz = sizeof(struct MR_FW_RAID_MAP) +
d009b576
SS		 4143 (sizeof(struct MR_LD_SPAN_MAP) *
4144 (instance->fw_supported_vd_count - 1));
da0dc9fb
BH		 4145 new_map_sz = sizeof(struct MR_FW_RAID_MAP_EXT);
4146 fusion->drv_map_sz = sizeof(struct MR_DRV_RAID_MAP) +
d009b576
SS		 4147 (sizeof(struct MR_LD_SPAN_MAP) *
4148 (instance->drv_supported_vd_count - 1));
4149
4150 fusion->max_map_sz = max(old_map_sz, new_map_sz);
4151
4152
4153 if (instance->supportmax256vd)
4154 fusion->current_map_sz = new_map_sz;
4155 else
4156 fusion->current_map_sz = old_map_sz;
d009b576
SS		 4157}
4158
c4a3e0a5
BS		 4159/**
4160 * megasas_get_controller_info - Returns FW's controller structure
4161 * @instance: Adapter soft state
c4a3e0a5
BS		 4162 *
4163 * Issues an internal command (DCMD) to get the FW's controller structure.
4164 * This information is mainly used to find out the maximum IO transfer per
4165 * command supported by the FW.
4166 */
51087a86 4167int
d009b576 4168megasas_get_ctrl_info(struct megasas_instance *instance)
c4a3e0a5
BS		 4169{
4170 int ret = 0;
4171 struct megasas_cmd *cmd;
4172 struct megasas_dcmd_frame *dcmd;
4173 struct megasas_ctrl_info *ci;
d009b576 4174 struct megasas_ctrl_info *ctrl_info;
c4a3e0a5
BS		 4175 dma_addr_t ci_h = 0;
4176
d009b576
SS		 4177 ctrl_info = instance->ctrl_info;
4178
c4a3e0a5
BS		 4179 cmd = megasas_get_cmd(instance);
4180
4181 if (!cmd) {
1be18254 4182 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a free cmd\n");
c4a3e0a5
BS		 4183 return -ENOMEM;
4184 }
4185
4186 dcmd = &cmd->frame->dcmd;
4187
4188 ci = pci_alloc_consistent(instance->pdev,
4189 sizeof(struct megasas_ctrl_info), &ci_h);
4190
4191 if (!ci) {
1be18254 4192 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc mem for ctrl info\n");
c4a3e0a5
BS		 4193 megasas_return_cmd(instance, cmd);
4194 return -ENOMEM;
4195 }
4196
4197 memset(ci, 0, sizeof(*ci));
4198 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4199
4200 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4201 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
c4a3e0a5 4202 dcmd->sge_count = 1;
94cd65dd 4203 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 4204 dcmd->timeout = 0;
780a3762 4205 dcmd->pad_0 = 0;
94cd65dd
SS		 4206 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_ctrl_info));
4207 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_GET_INFO);
4208 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(ci_h);
4209 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_ctrl_info));
51087a86 4210 dcmd->mbox.b[0] = 1;
c4a3e0a5 4211
90dc9d98
SS		 4212 if (instance->ctrl_context && !instance->mask_interrupts)
4213 ret = megasas_issue_blocked_cmd(instance, cmd,
4214 MEGASAS_BLOCKED_CMD_TIMEOUT);
4215 else
4216 ret = megasas_issue_polled(instance, cmd);
4217
d009b576 4218 if (!ret) {
c4a3e0a5 4219 memcpy(ctrl_info, ci, sizeof(struct megasas_ctrl_info));
d009b576
SS		 4220 le32_to_cpus((u32 *)&ctrl_info->properties.OnOffProperties);
4221 le32_to_cpus((u32 *)&ctrl_info->adapterOperations2);
4222 le32_to_cpus((u32 *)&ctrl_info->adapterOperations3);
4223 megasas_update_ext_vd_details(instance);
3761cb4c 4224 instance->use_seqnum_jbod_fp =
4225 ctrl_info->adapterOperations3.useSeqNumJbodFP;
4026e9aa
SS		 4226 instance->is_imr = (ctrl_info->memory_size ? 0 : 1);
4227 dev_info(&instance->pdev->dev,
4228 "controller type\t: %s(%dMB)\n",
4229 instance->is_imr ? "iMR" : "MR",
4230 le16_to_cpu(ctrl_info->memory_size));
c4bd2654 4231 instance->disableOnlineCtrlReset =
4232 ctrl_info->properties.OnOffProperties.disableOnlineCtrlReset;
4233 dev_info(&instance->pdev->dev, "Online Controller Reset(OCR)\t: %s\n",
4234 instance->disableOnlineCtrlReset ? "Disabled" : "Enabled");
3222251d 4235 instance->secure_jbod_support =
4236 ctrl_info->adapterOperations3.supportSecurityonJBOD;
4237 dev_info(&instance->pdev->dev, "Secure JBOD support\t: %s\n",
4238 instance->secure_jbod_support ? "Yes" : "No");
d009b576 4239 }
c4a3e0a5
BS		 4240
4241 pci_free_consistent(instance->pdev, sizeof(struct megasas_ctrl_info),
4242 ci, ci_h);
4243
4026e9aa 4244 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 4245 return ret;
4246}
4247
fc62b3fc
SS		 4248/*
4249 * megasas_set_crash_dump_params - Sends address of crash dump DMA buffer
4250 * to firmware
4251 *
4252 * @instance: Adapter soft state
4253 * @crash_buf_state - tell FW to turn ON/OFF crash dump feature
4254 MR_CRASH_BUF_TURN_OFF = 0
4255 MR_CRASH_BUF_TURN_ON = 1
4256 * @return 0 on success non-zero on failure.
4257 * Issues an internal command (DCMD) to set parameters for crash dump feature.
4258 * Driver will send address of crash dump DMA buffer and set mbox to tell FW
4259 * that driver supports crash dump feature. This DCMD will be sent only if
4260 * crash dump feature is supported by the FW.
4261 *
4262 */
4263int megasas_set_crash_dump_params(struct megasas_instance *instance,
4264 u8 crash_buf_state)
4265{
4266 int ret = 0;
4267 struct megasas_cmd *cmd;
4268 struct megasas_dcmd_frame *dcmd;
4269
4270 cmd = megasas_get_cmd(instance);
4271
4272 if (!cmd) {
4273 dev_err(&instance->pdev->dev, "Failed to get a free cmd\n");
4274 return -ENOMEM;
4275 }
4276
4277
4278 dcmd = &cmd->frame->dcmd;
4279
4280 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
4281 dcmd->mbox.b[0] = crash_buf_state;
4282 dcmd->cmd = MFI_CMD_DCMD;
2be2a988 4283 dcmd->cmd_status = MFI_STAT_INVALID_STATUS;
fc62b3fc
SS		 4284 dcmd->sge_count = 1;
4285 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
4286 dcmd->timeout = 0;
4287 dcmd->pad_0 = 0;
4288 dcmd->data_xfer_len = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4289 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_SET_CRASH_DUMP_PARAMS);
4290 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->crash_dump_h);
4291 dcmd->sgl.sge32[0].length = cpu_to_le32(CRASH_DMA_BUF_SIZE);
4292
90dc9d98
SS		 4293 if (instance->ctrl_context && !instance->mask_interrupts)
4294 ret = megasas_issue_blocked_cmd(instance, cmd,
4295 MEGASAS_BLOCKED_CMD_TIMEOUT);
fc62b3fc 4296 else
90dc9d98
SS		 4297 ret = megasas_issue_polled(instance, cmd);
4298
4026e9aa 4299 megasas_return_cmd(instance, cmd);
fc62b3fc
SS		 4300 return ret;
4301}
4302
31ea7088 4303/**
4304 * megasas_issue_init_mfi - Initializes the FW
4305 * @instance: Adapter soft state
4306 *
4307 * Issues the INIT MFI cmd
4308 */
4309static int
4310megasas_issue_init_mfi(struct megasas_instance *instance)
4311{
9ab9ed38 4312 __le32 context;
31ea7088 4313 struct megasas_cmd *cmd;
31ea7088 4314 struct megasas_init_frame *init_frame;
4315 struct megasas_init_queue_info *initq_info;
4316 dma_addr_t init_frame_h;
4317 dma_addr_t initq_info_h;
4318
4319 /*
4320 * Prepare a init frame. Note the init frame points to queue info
4321 * structure. Each frame has SGL allocated after first 64 bytes. For
4322 * this frame - since we don't need any SGL - we use SGL's space as
4323 * queue info structure
4324 *
4325 * We will not get a NULL command below. We just created the pool.
4326 */
4327 cmd = megasas_get_cmd(instance);
4328
4329 init_frame = (struct megasas_init_frame *)cmd->frame;
4330 initq_info = (struct megasas_init_queue_info *)
4331 ((unsigned long)init_frame + 64);
4332
4333 init_frame_h = cmd->frame_phys_addr;
4334 initq_info_h = init_frame_h + 64;
4335
4336 context = init_frame->context;
4337 memset(init_frame, 0, MEGAMFI_FRAME_SIZE);
4338 memset(initq_info, 0, sizeof(struct megasas_init_queue_info));
4339 init_frame->context = context;
4340
94cd65dd
SS		 4341 initq_info->reply_queue_entries = cpu_to_le32(instance->max_fw_cmds + 1);
4342 initq_info->reply_queue_start_phys_addr_lo = cpu_to_le32(instance->reply_queue_h);
31ea7088 4343
94cd65dd
SS		 4344 initq_info->producer_index_phys_addr_lo = cpu_to_le32(instance->producer_h);
4345 initq_info->consumer_index_phys_addr_lo = cpu_to_le32(instance->consumer_h);
31ea7088 4346
4347 init_frame->cmd = MFI_CMD_INIT;
2be2a988 4348 init_frame->cmd_status = MFI_STAT_INVALID_STATUS;
94cd65dd
SS		 4349 init_frame->queue_info_new_phys_addr_lo =
4350 cpu_to_le32(lower_32_bits(initq_info_h));
4351 init_frame->queue_info_new_phys_addr_hi =
4352 cpu_to_le32(upper_32_bits(initq_info_h));
31ea7088 4353
94cd65dd 4354 init_frame->data_xfer_len = cpu_to_le32(sizeof(struct megasas_init_queue_info));
31ea7088 4355
4356 /*
4357 * disable the intr before firing the init frame to FW
4358 */
d46a3ad6 4359 instance->instancet->disable_intr(instance);
31ea7088 4360
4361 /*
4362 * Issue the init frame in polled mode
4363 */
4364
4365 if (megasas_issue_polled(instance, cmd)) {
1be18254 4366 dev_err(&instance->pdev->dev, "Failed to init firmware\n");
31ea7088 4367 megasas_return_cmd(instance, cmd);
4368 goto fail_fw_init;
4369 }
4370
4371 megasas_return_cmd(instance, cmd);
4372
4373 return 0;
4374
4375fail_fw_init:
4376 return -EINVAL;
4377}
4378
cd50ba8e 4379static u32
4380megasas_init_adapter_mfi(struct megasas_instance *instance)
c4a3e0a5 4381{
cd50ba8e 4382 struct megasas_register_set __iomem *reg_set;
c4a3e0a5
BS		 4383 u32 context_sz;
4384 u32 reply_q_sz;
c4a3e0a5
BS		 4385
4386 reg_set = instance->reg_set;
4387
c4a3e0a5
BS		 4388 /*
4389 * Get various operational parameters from status register
4390 */
1341c939 4391 instance->max_fw_cmds = instance->instancet->read_fw_status_reg(reg_set) & 0x00FFFF;
e3bbff9f
SP		 4392 /*
4393 * Reduce the max supported cmds by 1. This is to ensure that the
4394 * reply_q_sz (1 more than the max cmd that driver may send)
4395 * does not exceed max cmds that the FW can support
4396 */
4397 instance->max_fw_cmds = instance->max_fw_cmds-1;
9c915a8c 4398 instance->max_mfi_cmds = instance->max_fw_cmds;
0d49016b 4399 instance->max_num_sge = (instance->instancet->read_fw_status_reg(reg_set) & 0xFF0000) >>
1341c939 4400 0x10;
f26ac3a1
SS		 4401 /*
4402 * For MFI skinny adapters, MEGASAS_SKINNY_INT_CMDS commands
4403 * are reserved for IOCTL + driver's internal DCMDs.
4404 */
4405 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
4406 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY)) {
4407 instance->max_scsi_cmds = (instance->max_fw_cmds -
4408 MEGASAS_SKINNY_INT_CMDS);
4409 sema_init(&instance->ioctl_sem, MEGASAS_SKINNY_INT_CMDS);
4410 } else {
4411 instance->max_scsi_cmds = (instance->max_fw_cmds -
4412 MEGASAS_INT_CMDS);
4413 sema_init(&instance->ioctl_sem, (MEGASAS_MFI_IOCTL_CMDS));
4414 }
4415
c4a3e0a5
BS		 4416 /*
4417 * Create a pool of commands
4418 */
4419 if (megasas_alloc_cmds(instance))
4420 goto fail_alloc_cmds;
4421
4422 /*
4423 * Allocate memory for reply queue. Length of reply queue should
4424 * be _one_ more than the maximum commands handled by the firmware.
4425 *
4426 * Note: When FW completes commands, it places corresponding contex
4427 * values in this circular reply queue. This circular queue is a fairly
4428 * typical producer-consumer queue. FW is the producer (of completed
4429 * commands) and the driver is the consumer.
4430 */
4431 context_sz = sizeof(u32);
4432 reply_q_sz = context_sz * (instance->max_fw_cmds + 1);
4433
4434 instance->reply_queue = pci_alloc_consistent(instance->pdev,
4435 reply_q_sz,
4436 &instance->reply_queue_h);
4437
4438 if (!instance->reply_queue) {
1be18254 4439 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Out of DMA mem for reply queue\n");
c4a3e0a5
BS		 4440 goto fail_reply_queue;
4441 }
4442
31ea7088 4443 if (megasas_issue_init_mfi(instance))
c4a3e0a5 4444 goto fail_fw_init;
c4a3e0a5 4445
d009b576 4446 if (megasas_get_ctrl_info(instance)) {
51087a86
SS		 4447 dev_err(&instance->pdev->dev, "(%d): Could get controller info "
4448 "Fail from %s %d\n", instance->unique_id,
4449 __func__, __LINE__);
4450 goto fail_fw_init;
4451 }
4452
39a98554 4453 instance->fw_support_ieee = 0;
4454 instance->fw_support_ieee =
4455 (instance->instancet->read_fw_status_reg(reg_set) &
4456 0x04000000);
4457
1be18254 4458 dev_notice(&instance->pdev->dev, "megasas_init_mfi: fw_support_ieee=%d",
39a98554 4459 instance->fw_support_ieee);
4460
4461 if (instance->fw_support_ieee)
4462 instance->flag_ieee = 1;
4463
cd50ba8e 4464 return 0;
4465
4466fail_fw_init:
4467
4468 pci_free_consistent(instance->pdev, reply_q_sz,
4469 instance->reply_queue, instance->reply_queue_h);
4470fail_reply_queue:
4471 megasas_free_cmds(instance);
4472
4473fail_alloc_cmds:
cd50ba8e 4474 return 1;
4475}
4476
d3557fc8
SS		 4477/*
4478 * megasas_setup_irqs_msix - register legacy interrupts.
4479 * @instance: Adapter soft state
4480 *
4481 * Do not enable interrupt, only setup ISRs.
4482 *
4483 * Return 0 on success.
4484 */
4485static int
4486megasas_setup_irqs_ioapic(struct megasas_instance *instance)
4487{
4488 struct pci_dev *pdev;
4489
4490 pdev = instance->pdev;
4491 instance->irq_context[0].instance = instance;
4492 instance->irq_context[0].MSIxIndex = 0;
4493 if (request_irq(pdev->irq, instance->instancet->service_isr,
4494 IRQF_SHARED, "megasas", &instance->irq_context[0])) {
4495 dev_err(&instance->pdev->dev,
4496 "Failed to register IRQ from %s %d\n",
4497 __func__, __LINE__);
4498 return -1;
4499 }
4500 return 0;
4501}
4502
4503/**
4504 * megasas_setup_irqs_msix - register MSI-x interrupts.
4505 * @instance: Adapter soft state
4506 * @is_probe: Driver probe check
4507 *
4508 * Do not enable interrupt, only setup ISRs.
4509 *
4510 * Return 0 on success.
4511 */
4512static int
4513megasas_setup_irqs_msix(struct megasas_instance *instance, u8 is_probe)
4514{
4515 int i, j, cpu;
4516 struct pci_dev *pdev;
4517
4518 pdev = instance->pdev;
4519
4520 /* Try MSI-x */
4521 cpu = cpumask_first(cpu_online_mask);
4522 for (i = 0; i < instance->msix_vectors; i++) {
4523 instance->irq_context[i].instance = instance;
4524 instance->irq_context[i].MSIxIndex = i;
4525 if (request_irq(instance->msixentry[i].vector,
4526 instance->instancet->service_isr, 0, "megasas",
4527 &instance->irq_context[i])) {
4528 dev_err(&instance->pdev->dev,
4529 "Failed to register IRQ for vector %d.\n", i);
4530 for (j = 0; j < i; j++) {
4531 if (smp_affinity_enable)
4532 irq_set_affinity_hint(
4533 instance->msixentry[j].vector, NULL);
4534 free_irq(instance->msixentry[j].vector,
4535 &instance->irq_context[j]);
4536 }
4537 /* Retry irq register for IO_APIC*/
4538 instance->msix_vectors = 0;
4539 if (is_probe)
4540 return megasas_setup_irqs_ioapic(instance);
4541 else
4542 return -1;
4543 }
4544 if (smp_affinity_enable) {
4545 if (irq_set_affinity_hint(instance->msixentry[i].vector,
4546 get_cpu_mask(cpu)))
4547 dev_err(&instance->pdev->dev,
4548 "Failed to set affinity hint"
4549 " for cpu %d\n", cpu);
4550 cpu = cpumask_next(cpu, cpu_online_mask);
4551 }
4552 }
4553 return 0;
4554}
4555
4556/*
4557 * megasas_destroy_irqs- unregister interrupts.
4558 * @instance: Adapter soft state
4559 * return: void
4560 */
4561static void
4562megasas_destroy_irqs(struct megasas_instance *instance) {
4563
4564 int i;
4565
4566 if (instance->msix_vectors)
4567 for (i = 0; i < instance->msix_vectors; i++) {
4568 if (smp_affinity_enable)
4569 irq_set_affinity_hint(
4570 instance->msixentry[i].vector, NULL);
4571 free_irq(instance->msixentry[i].vector,
4572 &instance->irq_context[i]);
4573 }
4574 else
4575 free_irq(instance->pdev->irq, &instance->irq_context[0]);
4576}
4577
3761cb4c 4578/**
4579 * megasas_setup_jbod_map - setup jbod map for FP seq_number.
4580 * @instance: Adapter soft state
4581 * @is_probe: Driver probe check
4582 *
4583 * Return 0 on success.
4584 */
4585void
4586megasas_setup_jbod_map(struct megasas_instance *instance)
4587{
4588 int i;
4589 struct fusion_context *fusion = instance->ctrl_context;
4590 u32 pd_seq_map_sz;
4591
4592 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
4593 (sizeof(struct MR_PD_CFG_SEQ) * (MAX_PHYSICAL_DEVICES - 1));
4594
4595 if (reset_devices || !fusion ||
4596 !instance->ctrl_info->adapterOperations3.useSeqNumJbodFP) {
4597 dev_info(&instance->pdev->dev,
4598 "Jbod map is not supported %s %d\n",
4599 __func__, __LINE__);
4600 instance->use_seqnum_jbod_fp = false;
4601 return;
4602 }
4603
4604 if (fusion->pd_seq_sync[0])
4605 goto skip_alloc;
4606
4607 for (i = 0; i < JBOD_MAPS_COUNT; i++) {
4608 fusion->pd_seq_sync[i] = dma_alloc_coherent
4609 (&instance->pdev->dev, pd_seq_map_sz,
4610 &fusion->pd_seq_phys[i], GFP_KERNEL);
4611 if (!fusion->pd_seq_sync[i]) {
4612 dev_err(&instance->pdev->dev,
4613 "Failed to allocate memory from %s %d\n",
4614 __func__, __LINE__);
4615 if (i == 1) {
4616 dma_free_coherent(&instance->pdev->dev,
4617 pd_seq_map_sz, fusion->pd_seq_sync[0],
4618 fusion->pd_seq_phys[0]);
4619 fusion->pd_seq_sync[0] = NULL;
4620 }
4621 instance->use_seqnum_jbod_fp = false;
4622 return;
4623 }
4624 }
4625
4626skip_alloc:
4627 if (!megasas_sync_pd_seq_num(instance, false) &&
4628 !megasas_sync_pd_seq_num(instance, true))
4629 instance->use_seqnum_jbod_fp = true;
4630 else
4631 instance->use_seqnum_jbod_fp = false;
4632}
4633
cd50ba8e 4634/**
4635 * megasas_init_fw - Initializes the FW
4636 * @instance: Adapter soft state
4637 *
4638 * This is the main function for initializing firmware
4639 */
4640
4641static int megasas_init_fw(struct megasas_instance *instance)
4642{
4643 u32 max_sectors_1;
4644 u32 max_sectors_2;
d46a3ad6 4645 u32 tmp_sectors, msix_enable, scratch_pad_2;
11f8a7b3 4646 resource_size_t base_addr;
cd50ba8e 4647 struct megasas_register_set __iomem *reg_set;
51087a86 4648 struct megasas_ctrl_info *ctrl_info = NULL;
cd50ba8e 4649 unsigned long bar_list;
d46a3ad6 4650 int i, loop, fw_msix_count = 0;
229fe47c 4651 struct IOV_111 *iovPtr;
5a8cb85b 4652 struct fusion_context *fusion;
4653
4654 fusion = instance->ctrl_context;
cd50ba8e 4655
4656 /* Find first memory bar */
4657 bar_list = pci_select_bars(instance->pdev, IORESOURCE_MEM);
4658 instance->bar = find_first_bit(&bar_list, sizeof(unsigned long));
cd50ba8e 4659 if (pci_request_selected_regions(instance->pdev, instance->bar,
4660 "megasas: LSI")) {
1be18254 4661 dev_printk(KERN_DEBUG, &instance->pdev->dev, "IO memory region busy!\n");
cd50ba8e 4662 return -EBUSY;
4663 }
4664
11f8a7b3
BC		 4665 base_addr = pci_resource_start(instance->pdev, instance->bar);
4666 instance->reg_set = ioremap_nocache(base_addr, 8192);
cd50ba8e 4667
4668 if (!instance->reg_set) {
1be18254 4669 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to map IO mem\n");
cd50ba8e 4670 goto fail_ioremap;
4671 }
4672
4673 reg_set = instance->reg_set;
4674
4675 switch (instance->pdev->device) {
9c915a8c 4676 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 4677 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 4678 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 4679 case PCI_DEVICE_ID_LSI_FURY:
90c204bc 4680 case PCI_DEVICE_ID_LSI_INTRUDER:
4681 case PCI_DEVICE_ID_LSI_INTRUDER_24:
7364d34b 4682 case PCI_DEVICE_ID_LSI_CUTLASS_52:
4683 case PCI_DEVICE_ID_LSI_CUTLASS_53:
9c915a8c 4684 instance->instancet = &megasas_instance_template_fusion;
4685 break;
cd50ba8e 4686 case PCI_DEVICE_ID_LSI_SAS1078R:
4687 case PCI_DEVICE_ID_LSI_SAS1078DE:
4688 instance->instancet = &megasas_instance_template_ppc;
4689 break;
4690 case PCI_DEVICE_ID_LSI_SAS1078GEN2:
4691 case PCI_DEVICE_ID_LSI_SAS0079GEN2:
4692 instance->instancet = &megasas_instance_template_gen2;
4693 break;
4694 case PCI_DEVICE_ID_LSI_SAS0073SKINNY:
4695 case PCI_DEVICE_ID_LSI_SAS0071SKINNY:
4696 instance->instancet = &megasas_instance_template_skinny;
4697 break;
4698 case PCI_DEVICE_ID_LSI_SAS1064R:
4699 case PCI_DEVICE_ID_DELL_PERC5:
4700 default:
4701 instance->instancet = &megasas_instance_template_xscale;
4702 break;
4703 }
4704
6431f5d7
SS		 4705 if (megasas_transition_to_ready(instance, 0)) {
4706 atomic_set(&instance->fw_reset_no_pci_access, 1);
4707 instance->instancet->adp_reset
4708 (instance, instance->reg_set);
4709 atomic_set(&instance->fw_reset_no_pci_access, 0);
4710 dev_info(&instance->pdev->dev,
1be18254 4711 "FW restarted successfully from %s!\n",
6431f5d7
SS		 4712 __func__);
4713
4714 /*waitting for about 30 second before retry*/
4715 ssleep(30);
4716
4717 if (megasas_transition_to_ready(instance, 0))
4718 goto fail_ready_state;
4719 }
cd50ba8e 4720
d46a3ad6
SS		 4721 /*
4722 * MSI-X host index 0 is common for all adapter.
4723 * It is used for all MPT based Adapters.
4724 */
4725 instance->reply_post_host_index_addr[0] =
8a232bb3 4726 (u32 __iomem *)((u8 __iomem *)instance->reg_set +
d46a3ad6
SS		 4727 MPI2_REPLY_POST_HOST_INDEX_OFFSET);
4728
3f1abce4 4729 /* Check if MSI-X is supported while in ready state */
4730 msix_enable = (instance->instancet->read_fw_status_reg(reg_set) &
4731 0x4000000) >> 0x1a;
c8e858fe 4732 if (msix_enable && !msix_disable) {
d46a3ad6
SS		 4733 scratch_pad_2 = readl
4734 (&instance->reg_set->outbound_scratch_pad_2);
c8e858fe 4735 /* Check max MSI-X vectors */
5a8cb85b 4736 if (fusion) {
4737 if (fusion->adapter_type == THUNDERBOLT_SERIES) { /* Thunderbolt Series*/
4738 instance->msix_vectors = (scratch_pad_2
4739 & MR_MAX_REPLY_QUEUES_OFFSET) + 1;
4740 fw_msix_count = instance->msix_vectors;
4741 } else { /* Invader series supports more than 8 MSI-x vectors*/
4742 instance->msix_vectors = ((scratch_pad_2
4743 & MR_MAX_REPLY_QUEUES_EXT_OFFSET)
4744 >> MR_MAX_REPLY_QUEUES_EXT_OFFSET_SHIFT) + 1;
4745 fw_msix_count = instance->msix_vectors;
4746 /* Save 1-15 reply post index address to local memory
4747 * Index 0 is already saved from reg offset
4748 * MPI2_REPLY_POST_HOST_INDEX_OFFSET
4749 */
4750 for (loop = 1; loop < MR_MAX_MSIX_REG_ARRAY; loop++) {
4751 instance->reply_post_host_index_addr[loop] =
4752 (u32 __iomem *)
4753 ((u8 __iomem *)instance->reg_set +
4754 MPI2_SUP_REPLY_POST_HOST_INDEX_OFFSET
4755 + (loop * 0x10));
4756 }
d46a3ad6
SS		 4757 }
4758 if (msix_vectors)
4759 instance->msix_vectors = min(msix_vectors,
4760 instance->msix_vectors);
5a8cb85b 4761 } else /* MFI adapters */
c8e858fe 4762 instance->msix_vectors = 1;
4763 /* Don't bother allocating more MSI-X vectors than cpus */
4764 instance->msix_vectors = min(instance->msix_vectors,
4765 (unsigned int)num_online_cpus());
4766 for (i = 0; i < instance->msix_vectors; i++)
4767 instance->msixentry[i].entry = i;
8ae80ed1
AG		 4768 i = pci_enable_msix_range(instance->pdev, instance->msixentry,
4769 1, instance->msix_vectors);
c12de882 4770 if (i > 0)
8ae80ed1
AG		 4771 instance->msix_vectors = i;
4772 else
c8e858fe 4773 instance->msix_vectors = 0;
4774 }
3f1abce4 4775
258c3af2
TH		 4776 dev_info(&instance->pdev->dev,
4777 "firmware supports msix\t: (%d)", fw_msix_count);
4778 dev_info(&instance->pdev->dev,
4779 "current msix/online cpus\t: (%d/%d)\n",
4780 instance->msix_vectors, (unsigned int)num_online_cpus());
d3557fc8 4781
91626c27 4782 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
4783 (unsigned long)instance);
4784
258c3af2
TH		 4785 if (instance->msix_vectors ?
4786 megasas_setup_irqs_msix(instance, 1) :
4787 megasas_setup_irqs_ioapic(instance))
4788 goto fail_setup_irqs;
3f1abce4 4789
51087a86
SS		 4790 instance->ctrl_info = kzalloc(sizeof(struct megasas_ctrl_info),
4791 GFP_KERNEL);
4792 if (instance->ctrl_info == NULL)
4793 goto fail_init_adapter;
4794
4795 /*
4796 * Below are default value for legacy Firmware.
4797 * non-fusion based controllers
4798 */
4799 instance->fw_supported_vd_count = MAX_LOGICAL_DRIVES;
4800 instance->fw_supported_pd_count = MAX_PHYSICAL_DEVICES;
cd50ba8e 4801 /* Get operational params, sge flags, send init cmd to controller */
4802 if (instance->instancet->init_adapter(instance))
eb1b1237 4803 goto fail_init_adapter;
cd50ba8e 4804
258c3af2 4805
d3557fc8 4806 instance->instancet->enable_intr(instance);
cd50ba8e 4807
1be18254 4808 dev_err(&instance->pdev->dev, "INIT adapter done\n");
cd50ba8e 4809
3761cb4c 4810 megasas_setup_jbod_map(instance);
4811
39a98554 4812 /** for passthrough
da0dc9fb
BH		 4813 * the following function will get the PD LIST.
4814 */
4815 memset(instance->pd_list, 0,
81e403ce 4816 (MEGASAS_MAX_PD * sizeof(struct megasas_pd_list)));
58968fc8 4817 if (megasas_get_pd_list(instance) < 0) {
1be18254 4818 dev_err(&instance->pdev->dev, "failed to get PD list\n");
d3557fc8 4819 goto fail_get_pd_list;
58968fc8 4820 }
81e403ce 4821
bdc6fb8d 4822 memset(instance->ld_ids, 0xff, MEGASAS_MAX_LD_IDS);
21c9e160 4823 if (megasas_ld_list_query(instance,
4824 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
4825 megasas_get_ld_list(instance);
bdc6fb8d 4826
c4a3e0a5
BS		 4827 /*
4828 * Compute the max allowed sectors per IO: The controller info has two
4829 * limits on max sectors. Driver should use the minimum of these two.
4830 *
4831 * 1 << stripe_sz_ops.min = max sectors per strip
4832 *
4833 * Note that older firmwares ( < FW ver 30) didn't report information
4834 * to calculate max_sectors_1. So the number ended up as zero always.
4835 */
14faea9f 4836 tmp_sectors = 0;
51087a86 4837 ctrl_info = instance->ctrl_info;
c4a3e0a5 4838
51087a86
SS		 4839 max_sectors_1 = (1 << ctrl_info->stripe_sz_ops.min) *
4840 le16_to_cpu(ctrl_info->max_strips_per_io);
4841 max_sectors_2 = le32_to_cpu(ctrl_info->max_request_size);
404a8a1a 4842
da0dc9fb 4843 tmp_sectors = min_t(u32, max_sectors_1, max_sectors_2);
bc93d425 4844
51087a86
SS		 4845 instance->mpio = ctrl_info->adapterOperations2.mpio;
4846 instance->UnevenSpanSupport =
4847 ctrl_info->adapterOperations2.supportUnevenSpans;
4848 if (instance->UnevenSpanSupport) {
4849 struct fusion_context *fusion = instance->ctrl_context;
51087a86
SS		 4850 if (MR_ValidateMapInfo(instance))
4851 fusion->fast_path_io = 1;
4852 else
4853 fusion->fast_path_io = 0;
fc62b3fc 4854
51087a86
SS		 4855 }
4856 if (ctrl_info->host_interface.SRIOV) {
92bb6505 4857 instance->requestorId = ctrl_info->iov.requestorId;
4858 if (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA) {
4859 if (!ctrl_info->adapterOperations2.activePassive)
4860 instance->PlasmaFW111 = 1;
4861
4862 dev_info(&instance->pdev->dev, "SR-IOV: firmware type: %s\n",
4863 instance->PlasmaFW111 ? "1.11" : "new");
4864
4865 if (instance->PlasmaFW111) {
4866 iovPtr = (struct IOV_111 *)
4867 ((unsigned char *)ctrl_info + IOV_111_OFFSET);
4868 instance->requestorId = iovPtr->requestorId;
4869 }
fc62b3fc 4870 }
92bb6505 4871 dev_info(&instance->pdev->dev, "SRIOV: VF requestorId %d\n",
4872 instance->requestorId);
51087a86
SS		 4873 }
4874
51087a86
SS		 4875 instance->crash_dump_fw_support =
4876 ctrl_info->adapterOperations3.supportCrashDump;
4877 instance->crash_dump_drv_support =
4878 (instance->crash_dump_fw_support &&
4879 instance->crash_dump_buf);
d88da09a 4880 if (instance->crash_dump_drv_support)
51087a86
SS		 4881 megasas_set_crash_dump_params(instance,
4882 MR_CRASH_BUF_TURN_OFF);
4883
d88da09a 4884 else {
51087a86
SS		 4885 if (instance->crash_dump_buf)
4886 pci_free_consistent(instance->pdev,
4887 CRASH_DMA_BUF_SIZE,
4888 instance->crash_dump_buf,
4889 instance->crash_dump_h);
4890 instance->crash_dump_buf = NULL;
14faea9f 4891 }
7497cde8 4892
d88da09a
SS		 4893
4894 dev_info(&instance->pdev->dev,
4895 "pci id\t\t: (0x%04x)/(0x%04x)/(0x%04x)/(0x%04x)\n",
4896 le16_to_cpu(ctrl_info->pci.vendor_id),
4897 le16_to_cpu(ctrl_info->pci.device_id),
4898 le16_to_cpu(ctrl_info->pci.sub_vendor_id),
4899 le16_to_cpu(ctrl_info->pci.sub_device_id));
4900 dev_info(&instance->pdev->dev, "unevenspan support : %s\n",
4901 instance->UnevenSpanSupport ? "yes" : "no");
d88da09a
SS		 4902 dev_info(&instance->pdev->dev, "firmware crash dump : %s\n",
4903 instance->crash_dump_drv_support ? "yes" : "no");
3761cb4c 4904 dev_info(&instance->pdev->dev, "jbod sync map : %s\n",
4905 instance->use_seqnum_jbod_fp ? "yes" : "no");
d88da09a
SS		 4906
4907
14faea9f 4908 instance->max_sectors_per_req = instance->max_num_sge *
357ae967 4909 SGE_BUFFER_SIZE / 512;
14faea9f 4910 if (tmp_sectors && (instance->max_sectors_per_req > tmp_sectors))
4911 instance->max_sectors_per_req = tmp_sectors;
c4a3e0a5 4912
ae09a6c1
SS		 4913 /* Check for valid throttlequeuedepth module parameter */
4914 if (throttlequeuedepth &&
4915 throttlequeuedepth <= instance->max_scsi_cmds)
4916 instance->throttlequeuedepth = throttlequeuedepth;
4917 else
4918 instance->throttlequeuedepth =
4919 MEGASAS_THROTTLE_QUEUE_DEPTH;
4920
ad84db2e 4921
229fe47c 4922 /* Launch SR-IOV heartbeat timer */
4923 if (instance->requestorId) {
4924 if (!megasas_sriov_start_heartbeat(instance, 1))
4925 megasas_start_timer(instance,
4926 &instance->sriov_heartbeat_timer,
4927 megasas_sriov_heartbeat_handler,
4928 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
4929 else
4930 instance->skip_heartbeat_timer_del = 1;
4931 }
4932
c4a3e0a5
BS		 4933 return 0;
4934
d3557fc8
SS		 4935fail_get_pd_list:
4936 instance->instancet->disable_intr(instance);
eb1b1237 4937fail_init_adapter:
d3557fc8
SS		 4938 megasas_destroy_irqs(instance);
4939fail_setup_irqs:
4940 if (instance->msix_vectors)
4941 pci_disable_msix(instance->pdev);
4942 instance->msix_vectors = 0;
cd50ba8e 4943fail_ready_state:
51087a86
SS		 4944 kfree(instance->ctrl_info);
4945 instance->ctrl_info = NULL;
c4a3e0a5
BS		 4946 iounmap(instance->reg_set);
4947
4948 fail_ioremap:
b6d5d880 4949 pci_release_selected_regions(instance->pdev, instance->bar);
c4a3e0a5
BS		 4950
4951 return -EINVAL;
4952}
4953
4954/**
4955 * megasas_release_mfi - Reverses the FW initialization
4b63b286 4956 * @instance: Adapter soft state
c4a3e0a5
BS		 4957 */
4958static void megasas_release_mfi(struct megasas_instance *instance)
4959{
9c915a8c 4960 u32 reply_q_sz = sizeof(u32) *(instance->max_mfi_cmds + 1);
c4a3e0a5 4961
9c915a8c 4962 if (instance->reply_queue)
4963 pci_free_consistent(instance->pdev, reply_q_sz,
c4a3e0a5
BS		 4964 instance->reply_queue, instance->reply_queue_h);
4965
4966 megasas_free_cmds(instance);
4967
4968 iounmap(instance->reg_set);
4969
b6d5d880 4970 pci_release_selected_regions(instance->pdev, instance->bar);
c4a3e0a5
BS		 4971}
4972
4973/**
4974 * megasas_get_seq_num - Gets latest event sequence numbers
4975 * @instance: Adapter soft state
4976 * @eli: FW event log sequence numbers information
4977 *
4978 * FW maintains a log of all events in a non-volatile area. Upper layers would
4979 * usually find out the latest sequence number of the events, the seq number at
4980 * the boot etc. They would "read" all the events below the latest seq number
4981 * by issuing a direct fw cmd (DCMD). For the future events (beyond latest seq
4982 * number), they would subsribe to AEN (asynchronous event notification) and
4983 * wait for the events to happen.
4984 */
4985static int
4986megasas_get_seq_num(struct megasas_instance *instance,
4987 struct megasas_evt_log_info *eli)
4988{
4989 struct megasas_cmd *cmd;
4990 struct megasas_dcmd_frame *dcmd;
4991 struct megasas_evt_log_info *el_info;
4992 dma_addr_t el_info_h = 0;
4993
4994 cmd = megasas_get_cmd(instance);
4995
4996 if (!cmd) {
4997 return -ENOMEM;
4998 }
4999
5000 dcmd = &cmd->frame->dcmd;
5001 el_info = pci_alloc_consistent(instance->pdev,
5002 sizeof(struct megasas_evt_log_info),
5003 &el_info_h);
5004
5005 if (!el_info) {
5006 megasas_return_cmd(instance, cmd);
5007 return -ENOMEM;
5008 }
5009
5010 memset(el_info, 0, sizeof(*el_info));
5011 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5012
5013 dcmd->cmd = MFI_CMD_DCMD;
5014 dcmd->cmd_status = 0x0;
5015 dcmd->sge_count = 1;
94cd65dd 5016 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5017 dcmd->timeout = 0;
780a3762 5018 dcmd->pad_0 = 0;
94cd65dd
SS		 5019 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_log_info));
5020 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_GET_INFO);
5021 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(el_info_h);
5022 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_log_info));
c4a3e0a5 5023
cfbe7554
SS		 5024 if (megasas_issue_blocked_cmd(instance, cmd, 30))
5025 dev_err(&instance->pdev->dev, "Command timedout"
5026 "from %s\n", __func__);
5027 else {
5028 /*
5029 * Copy the data back into callers buffer
5030 */
48100b0e
CH		 5031 eli->newest_seq_num = el_info->newest_seq_num;
5032 eli->oldest_seq_num = el_info->oldest_seq_num;
5033 eli->clear_seq_num = el_info->clear_seq_num;
5034 eli->shutdown_seq_num = el_info->shutdown_seq_num;
5035 eli->boot_seq_num = el_info->boot_seq_num;
cfbe7554 5036 }
c4a3e0a5
BS		 5037
5038 pci_free_consistent(instance->pdev, sizeof(struct megasas_evt_log_info),
5039 el_info, el_info_h);
5040
4026e9aa 5041 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 5042
5043 return 0;
5044}
5045
5046/**
5047 * megasas_register_aen - Registers for asynchronous event notification
5048 * @instance: Adapter soft state
5049 * @seq_num: The starting sequence number
5050 * @class_locale: Class of the event
5051 *
5052 * This function subscribes for AEN for events beyond the @seq_num. It requests
5053 * to be notified if and only if the event is of type @class_locale
5054 */
5055static int
5056megasas_register_aen(struct megasas_instance *instance, u32 seq_num,
5057 u32 class_locale_word)
5058{
5059 int ret_val;
5060 struct megasas_cmd *cmd;
5061 struct megasas_dcmd_frame *dcmd;
5062 union megasas_evt_class_locale curr_aen;
5063 union megasas_evt_class_locale prev_aen;
5064
5065 /*
5066 * If there an AEN pending already (aen_cmd), check if the
5067 * class_locale of that pending AEN is inclusive of the new
5068 * AEN request we currently have. If it is, then we don't have
5069 * to do anything. In other words, whichever events the current
5070 * AEN request is subscribing to, have already been subscribed
5071 * to.
5072 *
5073 * If the old_cmd is _not_ inclusive, then we have to abort
5074 * that command, form a class_locale that is superset of both
5075 * old and current and re-issue to the FW
5076 */
5077
5078 curr_aen.word = class_locale_word;
5079
5080 if (instance->aen_cmd) {
5081
a9555534
CH		 5082 prev_aen.word =
5083 le32_to_cpu(instance->aen_cmd->frame->dcmd.mbox.w[1]);
c4a3e0a5
BS		 5084
5085 /*
5086 * A class whose enum value is smaller is inclusive of all
5087 * higher values. If a PROGRESS (= -1) was previously
5088 * registered, then a new registration requests for higher
5089 * classes need not be sent to FW. They are automatically
5090 * included.
5091 *
5092 * Locale numbers don't have such hierarchy. They are bitmap
5093 * values
5094 */
5095 if ((prev_aen.members.class <= curr_aen.members.class) &&
3993a862 5096 !((prev_aen.members.locale & curr_aen.members.locale) ^
c4a3e0a5
BS		 5097 curr_aen.members.locale)) {
5098 /*
5099 * Previously issued event registration includes
5100 * current request. Nothing to do.
5101 */
5102 return 0;
5103 } else {
3993a862 5104 curr_aen.members.locale |= prev_aen.members.locale;
c4a3e0a5
BS		 5105
5106 if (prev_aen.members.class < curr_aen.members.class)
5107 curr_aen.members.class = prev_aen.members.class;
5108
5109 instance->aen_cmd->abort_aen = 1;
5110 ret_val = megasas_issue_blocked_abort_cmd(instance,
5111 instance->
cfbe7554 5112 aen_cmd, 30);
c4a3e0a5
BS		 5113
5114 if (ret_val) {
1be18254 5115 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to abort "
c4a3e0a5
BS		 5116 "previous AEN command\n");
5117 return ret_val;
5118 }
5119 }
5120 }
5121
5122 cmd = megasas_get_cmd(instance);
5123
5124 if (!cmd)
5125 return -ENOMEM;
5126
5127 dcmd = &cmd->frame->dcmd;
5128
5129 memset(instance->evt_detail, 0, sizeof(struct megasas_evt_detail));
5130
5131 /*
5132 * Prepare DCMD for aen registration
5133 */
5134 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5135
5136 dcmd->cmd = MFI_CMD_DCMD;
5137 dcmd->cmd_status = 0x0;
5138 dcmd->sge_count = 1;
94cd65dd 5139 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_READ);
c4a3e0a5 5140 dcmd->timeout = 0;
780a3762 5141 dcmd->pad_0 = 0;
94cd65dd
SS		 5142 dcmd->data_xfer_len = cpu_to_le32(sizeof(struct megasas_evt_detail));
5143 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_EVENT_WAIT);
5144 dcmd->mbox.w[0] = cpu_to_le32(seq_num);
39a98554 5145 instance->last_seq_num = seq_num;
94cd65dd
SS		 5146 dcmd->mbox.w[1] = cpu_to_le32(curr_aen.word);
5147 dcmd->sgl.sge32[0].phys_addr = cpu_to_le32(instance->evt_detail_h);
5148 dcmd->sgl.sge32[0].length = cpu_to_le32(sizeof(struct megasas_evt_detail));
c4a3e0a5 5149
f4c9a131
YB		 5150 if (instance->aen_cmd != NULL) {
5151 megasas_return_cmd(instance, cmd);
5152 return 0;
5153 }
5154
c4a3e0a5
BS		 5155 /*
5156 * Store reference to the cmd used to register for AEN. When an
5157 * application wants us to register for AEN, we have to abort this
5158 * cmd and re-register with a new EVENT LOCALE supplied by that app
5159 */
5160 instance->aen_cmd = cmd;
5161
5162 /*
5163 * Issue the aen registration frame
5164 */
9c915a8c 5165 instance->instancet->issue_dcmd(instance, cmd);
c4a3e0a5
BS		 5166
5167 return 0;
5168}
5169
5170/**
5171 * megasas_start_aen - Subscribes to AEN during driver load time
5172 * @instance: Adapter soft state
5173 */
5174static int megasas_start_aen(struct megasas_instance *instance)
5175{
5176 struct megasas_evt_log_info eli;
5177 union megasas_evt_class_locale class_locale;
5178
5179 /*
5180 * Get the latest sequence number from FW
5181 */
5182 memset(&eli, 0, sizeof(eli));
5183
5184 if (megasas_get_seq_num(instance, &eli))
5185 return -1;
5186
5187 /*
5188 * Register AEN with FW for latest sequence number plus 1
5189 */
5190 class_locale.members.reserved = 0;
5191 class_locale.members.locale = MR_EVT_LOCALE_ALL;
5192 class_locale.members.class = MR_EVT_CLASS_DEBUG;
5193
94cd65dd 5194 return megasas_register_aen(instance,
48100b0e 5195 le32_to_cpu(eli.newest_seq_num) + 1,
94cd65dd 5196 class_locale.word);
c4a3e0a5
BS		 5197}
5198
5199/**
5200 * megasas_io_attach - Attaches this driver to SCSI mid-layer
5201 * @instance: Adapter soft state
5202 */
5203static int megasas_io_attach(struct megasas_instance *instance)
5204{
5205 struct Scsi_Host *host = instance->host;
da0dc9fb 5206 u32 error;
c4a3e0a5
BS		 5207
5208 /*
5209 * Export parameters required by SCSI mid-layer
5210 */
5211 host->irq = instance->pdev->irq;
5212 host->unique_id = instance->unique_id;
ae09a6c1 5213 host->can_queue = instance->max_scsi_cmds;
c4a3e0a5
BS		 5214 host->this_id = instance->init_id;
5215 host->sg_tablesize = instance->max_num_sge;
42a8d2b3 5216
5217 if (instance->fw_support_ieee)
5218 instance->max_sectors_per_req = MEGASAS_MAX_SECTORS_IEEE;
5219
1fd10685
YB		 5220 /*
5221 * Check if the module parameter value for max_sectors can be used
5222 */
5223 if (max_sectors && max_sectors < instance->max_sectors_per_req)
5224 instance->max_sectors_per_req = max_sectors;
5225 else {
5226 if (max_sectors) {
5227 if (((instance->pdev->device ==
5228 PCI_DEVICE_ID_LSI_SAS1078GEN2) ||
5229 (instance->pdev->device ==
5230 PCI_DEVICE_ID_LSI_SAS0079GEN2)) &&
5231 (max_sectors <= MEGASAS_MAX_SECTORS)) {
5232 instance->max_sectors_per_req = max_sectors;
5233 } else {
1be18254 5234 dev_info(&instance->pdev->dev, "max_sectors should be > 0"
1fd10685
YB		 5235 "and <= %d (or < 1MB for GEN2 controller)\n",
5236 instance->max_sectors_per_req);
5237 }
5238 }
5239 }
5240
c4a3e0a5 5241 host->max_sectors = instance->max_sectors_per_req;
9c915a8c 5242 host->cmd_per_lun = MEGASAS_DEFAULT_CMD_PER_LUN;
c4a3e0a5
BS		 5243 host->max_channel = MEGASAS_MAX_CHANNELS - 1;
5244 host->max_id = MEGASAS_MAX_DEV_PER_CHANNEL;
5245 host->max_lun = MEGASAS_MAX_LUN;
122da302 5246 host->max_cmd_len = 16;
c4a3e0a5 5247
9c915a8c 5248 /* Fusion only supports host reset */
5a8cb85b 5249 if (instance->ctrl_context) {
9c915a8c 5250 host->hostt->eh_device_reset_handler = NULL;
5251 host->hostt->eh_bus_reset_handler = NULL;
5252 }
4026e9aa
SS		 5253 error = scsi_init_shared_tag_map(host, host->can_queue);
5254 if (error) {
5255 dev_err(&instance->pdev->dev,
5256 "Failed to shared tag from %s %d\n",
5257 __func__, __LINE__);
5258 return -ENODEV;
5259 }
9c915a8c 5260
c4a3e0a5
BS		 5261 /*
5262 * Notify the mid-layer about the new controller
5263 */
5264 if (scsi_add_host(host, &instance->pdev->dev)) {
4026e9aa
SS		 5265 dev_err(&instance->pdev->dev,
5266 "Failed to add host from %s %d\n",
5267 __func__, __LINE__);
c4a3e0a5
BS		 5268 return -ENODEV;
5269 }
5270
c4a3e0a5
BS		 5271 return 0;
5272}
5273
31ea7088 5274static int
5275megasas_set_dma_mask(struct pci_dev *pdev)
5276{
5277 /*
da0dc9fb 5278 * All our controllers are capable of performing 64-bit DMA
31ea7088 5279 */
5280 if (IS_DMA64) {
6a35528a 5281 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
31ea7088 5282
284901a9 5283 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5284 goto fail_set_dma_mask;
5285 }
5286 } else {
284901a9 5287 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)
31ea7088 5288 goto fail_set_dma_mask;
5289 }
46de63e2
SS		 5290 /*
5291 * Ensure that all data structures are allocated in 32-bit
5292 * memory.
5293 */
5294 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
5295 /* Try 32bit DMA mask and 32 bit Consistent dma mask */
5296 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
5297 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
5298 dev_info(&pdev->dev, "set 32bit DMA mask"
5299 "and 32 bit consistent mask\n");
5300 else
5301 goto fail_set_dma_mask;
5302 }
94cd65dd 5303
31ea7088 5304 return 0;
5305
5306fail_set_dma_mask:
5307 return 1;
5308}
5309
c4a3e0a5
BS		 5310/**
5311 * megasas_probe_one - PCI hotplug entry point
5312 * @pdev: PCI device structure
0d49016b 5313 * @id: PCI ids of supported hotplugged adapter
c4a3e0a5 5314 */
6f039790
GKH		 5315static int megasas_probe_one(struct pci_dev *pdev,
5316 const struct pci_device_id *id)
c4a3e0a5 5317{
d3557fc8 5318 int rval, pos;
c4a3e0a5
BS		 5319 struct Scsi_Host *host;
5320 struct megasas_instance *instance;
66192dfe 5321 u16 control = 0;
51087a86 5322 struct fusion_context *fusion = NULL;
66192dfe 5323
5324 /* Reset MSI-X in the kdump kernel */
5325 if (reset_devices) {
5326 pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX);
5327 if (pos) {
99369065 5328 pci_read_config_word(pdev, pos + PCI_MSIX_FLAGS,
66192dfe 5329 &control);
5330 if (control & PCI_MSIX_FLAGS_ENABLE) {
5331 dev_info(&pdev->dev, "resetting MSI-X\n");
5332 pci_write_config_word(pdev,
99369065 5333 pos + PCI_MSIX_FLAGS,
66192dfe 5334 control &
5335 ~PCI_MSIX_FLAGS_ENABLE);
5336 }
5337 }
5338 }
c4a3e0a5 5339
c4a3e0a5
BS		 5340 /*
5341 * PCI prepping: enable device set bus mastering and dma mask
5342 */
aeab3fd7 5343 rval = pci_enable_device_mem(pdev);
c4a3e0a5
BS		 5344
5345 if (rval) {
5346 return rval;
5347 }
5348
5349 pci_set_master(pdev);
5350
31ea7088 5351 if (megasas_set_dma_mask(pdev))
5352 goto fail_set_dma_mask;
c4a3e0a5
BS		 5353
5354 host = scsi_host_alloc(&megasas_template,
5355 sizeof(struct megasas_instance));
5356
5357 if (!host) {
1be18254 5358 dev_printk(KERN_DEBUG, &pdev->dev, "scsi_host_alloc failed\n");
c4a3e0a5
BS		 5359 goto fail_alloc_instance;
5360 }
5361
5362 instance = (struct megasas_instance *)host->hostdata;
5363 memset(instance, 0, sizeof(*instance));
da0dc9fb 5364 atomic_set(&instance->fw_reset_no_pci_access, 0);
9c915a8c 5365 instance->pdev = pdev;
c4a3e0a5 5366
9c915a8c 5367 switch (instance->pdev->device) {
5368 case PCI_DEVICE_ID_LSI_FUSION:
229fe47c 5369 case PCI_DEVICE_ID_LSI_PLASMA:
36807e67 5370 case PCI_DEVICE_ID_LSI_INVADER:
21d3c710 5371 case PCI_DEVICE_ID_LSI_FURY:
90c204bc 5372 case PCI_DEVICE_ID_LSI_INTRUDER:
5373 case PCI_DEVICE_ID_LSI_INTRUDER_24:
7364d34b 5374 case PCI_DEVICE_ID_LSI_CUTLASS_52:
5375 case PCI_DEVICE_ID_LSI_CUTLASS_53:
9c915a8c 5376 {
51087a86
SS		 5377 instance->ctrl_context_pages =
5378 get_order(sizeof(struct fusion_context));
5379 instance->ctrl_context = (void *)__get_free_pages(GFP_KERNEL,
5380 instance->ctrl_context_pages);
9c915a8c 5381 if (!instance->ctrl_context) {
1be18254 5382 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate "
9c915a8c 5383 "memory for Fusion context info\n");
5384 goto fail_alloc_dma_buf;
5385 }
5386 fusion = instance->ctrl_context;
d009b576
SS		 5387 memset(fusion, 0,
5388 ((1 << PAGE_SHIFT) << instance->ctrl_context_pages));
5a8cb85b 5389 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_FUSION) ||
5390 (instance->pdev->device == PCI_DEVICE_ID_LSI_PLASMA))
5391 fusion->adapter_type = THUNDERBOLT_SERIES;
5392 else
5393 fusion->adapter_type = INVADER_SERIES;
9c915a8c 5394 }
5395 break;
5396 default: /* For all other supported controllers */
5397
5398 instance->producer =
5399 pci_alloc_consistent(pdev, sizeof(u32),
5400 &instance->producer_h);
5401 instance->consumer =
5402 pci_alloc_consistent(pdev, sizeof(u32),
5403 &instance->consumer_h);
5404
5405 if (!instance->producer || !instance->consumer) {
1be18254 5406 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate"
9c915a8c 5407 "memory for producer, consumer\n");
5408 goto fail_alloc_dma_buf;
5409 }
c4a3e0a5 5410
9c915a8c 5411 *instance->producer = 0;
5412 *instance->consumer = 0;
5413 break;
c4a3e0a5
BS		 5414 }
5415
5765c5b8
SS		 5416 instance->system_info_buf = pci_zalloc_consistent(pdev,
5417 sizeof(struct MR_DRV_SYSTEM_INFO),
5418 &instance->system_info_h);
5419
5420 if (!instance->system_info_buf)
5421 dev_info(&instance->pdev->dev, "Can't allocate system info buffer\n");
5422
fc62b3fc
SS		 5423 /* Crash dump feature related initialisation*/
5424 instance->drv_buf_index = 0;
5425 instance->drv_buf_alloc = 0;
5426 instance->crash_dump_fw_support = 0;
5427 instance->crash_dump_app_support = 0;
5428 instance->fw_crash_state = UNAVAILABLE;
5429 spin_lock_init(&instance->crashdump_lock);
5430 instance->crash_dump_buf = NULL;
5431
5432 if (!reset_devices)
5433 instance->crash_dump_buf = pci_alloc_consistent(pdev,
5434 CRASH_DMA_BUF_SIZE,
5435 &instance->crash_dump_h);
5436 if (!instance->crash_dump_buf)
1be18254 5437 dev_err(&pdev->dev, "Can't allocate Firmware "
fc62b3fc
SS		 5438 "crash dump DMA buffer\n");
5439
c3518837 5440 megasas_poll_wait_aen = 0;
f4c9a131 5441 instance->flag_ieee = 0;
7e8a75f4 5442 instance->ev = NULL;
39a98554 5443 instance->issuepend_done = 1;
5444 instance->adprecovery = MEGASAS_HBA_OPERATIONAL;
404a8a1a 5445 instance->is_imr = 0;
c4a3e0a5
BS		 5446
5447 instance->evt_detail = pci_alloc_consistent(pdev,
5448 sizeof(struct
5449 megasas_evt_detail),
5450 &instance->evt_detail_h);
5451
5452 if (!instance->evt_detail) {
1be18254 5453 dev_printk(KERN_DEBUG, &pdev->dev, "Failed to allocate memory for "
c4a3e0a5
BS		 5454 "event detail structure\n");
5455 goto fail_alloc_dma_buf;
5456 }
5457
5458 /*
5459 * Initialize locks and queues
5460 */
5461 INIT_LIST_HEAD(&instance->cmd_pool);
39a98554 5462 INIT_LIST_HEAD(&instance->internal_reset_pending_q);
c4a3e0a5 5463
e4a082c7
SP		 5464 atomic_set(&instance->fw_outstanding,0);
5465
c4a3e0a5
BS		 5466 init_waitqueue_head(&instance->int_cmd_wait_q);
5467 init_waitqueue_head(&instance->abort_cmd_wait_q);
5468
90dc9d98 5469 spin_lock_init(&instance->mfi_pool_lock);
39a98554 5470 spin_lock_init(&instance->hba_lock);
7343eb65 5471 spin_lock_init(&instance->completion_lock);
c4a3e0a5 5472
e5a69e27 5473 mutex_init(&instance->aen_mutex);
9c915a8c 5474 mutex_init(&instance->reset_mutex);
c4a3e0a5
BS		 5475
5476 /*
5477 * Initialize PCI related and misc parameters
5478 */
c4a3e0a5
BS		 5479 instance->host = host;
5480 instance->unique_id = pdev->bus->number << 8 | pdev->devfn;
5481 instance->init_id = MEGASAS_DEFAULT_INIT_ID;
51087a86 5482 instance->ctrl_info = NULL;
c4a3e0a5 5483
ae09a6c1 5484
7bebf5c7 5485 if ((instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0073SKINNY) ||
ae09a6c1 5486 (instance->pdev->device == PCI_DEVICE_ID_LSI_SAS0071SKINNY))
f4c9a131 5487 instance->flag_ieee = 1;
7bebf5c7 5488
658dcedb 5489 megasas_dbg_lvl = 0;
05e9ebbe 5490 instance->flag = 0;
0c79e681 5491 instance->unload = 1;
05e9ebbe 5492 instance->last_time = 0;
39a98554 5493 instance->disableOnlineCtrlReset = 1;
bc93d425 5494 instance->UnevenSpanSupport = 0;
39a98554 5495
5a8cb85b 5496 if (instance->ctrl_context) {
9c915a8c 5497 INIT_WORK(&instance->work_init, megasas_fusion_ocr_wq);
fc62b3fc
SS		 5498 INIT_WORK(&instance->crash_init, megasas_fusion_crash_dump_wq);
5499 } else
9c915a8c 5500 INIT_WORK(&instance->work_init, process_fw_state_change_wq);
658dcedb 5501
0a77066a 5502 /*
5503 * Initialize MFI Firmware
5504 */
5505 if (megasas_init_fw(instance))
5506 goto fail_init_mfi;
5507
229fe47c 5508 if (instance->requestorId) {
5509 if (instance->PlasmaFW111) {
5510 instance->vf_affiliation_111 =
5511 pci_alloc_consistent(pdev, sizeof(struct MR_LD_VF_AFFILIATION_111),
5512 &instance->vf_affiliation_111_h);
5513 if (!instance->vf_affiliation_111)
1be18254 5514 dev_warn(&pdev->dev, "Can't allocate "
229fe47c 5515 "memory for VF affiliation buffer\n");
5516 } else {
5517 instance->vf_affiliation =
5518 pci_alloc_consistent(pdev,
5519 (MAX_LOGICAL_DRIVES + 1) *
5520 sizeof(struct MR_LD_VF_AFFILIATION),
5521 &instance->vf_affiliation_h);
5522 if (!instance->vf_affiliation)
1be18254 5523 dev_warn(&pdev->dev, "Can't allocate "
229fe47c 5524 "memory for VF affiliation buffer\n");
5525 }
5526 }
5527
c4a3e0a5
BS		 5528 /*
5529 * Store instance in PCI softstate
5530 */
5531 pci_set_drvdata(pdev, instance);
5532
5533 /*
5534 * Add this controller to megasas_mgmt_info structure so that it
5535 * can be exported to management applications
5536 */
5537 megasas_mgmt_info.count++;
5538 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = instance;
5539 megasas_mgmt_info.max_index++;
5540
541f90b7 5541 /*
5542 * Register with SCSI mid-layer
5543 */
5544 if (megasas_io_attach(instance))
5545 goto fail_io_attach;
5546
5547 instance->unload = 0;
aa00832b
SS		 5548 /*
5549 * Trigger SCSI to scan our drives
5550 */
5551 scsi_scan_host(host);
541f90b7 5552
c4a3e0a5
BS		 5553 /*
5554 * Initiate AEN (Asynchronous Event Notification)
5555 */
5556 if (megasas_start_aen(instance)) {
1be18254 5557 dev_printk(KERN_DEBUG, &pdev->dev, "start aen failed\n");
c4a3e0a5
BS		 5558 goto fail_start_aen;
5559 }
5560
9ea81f81
AR		 5561 /* Get current SR-IOV LD/VF affiliation */
5562 if (instance->requestorId)
5563 megasas_get_ld_vf_affiliation(instance, 1);
5564
c4a3e0a5
BS		 5565 return 0;
5566
da0dc9fb
BH		 5567fail_start_aen:
5568fail_io_attach:
c4a3e0a5
BS		 5569 megasas_mgmt_info.count--;
5570 megasas_mgmt_info.instance[megasas_mgmt_info.max_index] = NULL;
5571 megasas_mgmt_info.max_index--;
5572
d46a3ad6 5573 instance->instancet->disable_intr(instance);
d3557fc8
SS		 5574 megasas_destroy_irqs(instance);
5575
5a8cb85b 5576 if (instance->ctrl_context)
eb1b1237 5577 megasas_release_fusion(instance);
5578 else
5579 megasas_release_mfi(instance);
c8e858fe 5580 if (instance->msix_vectors)
0a77066a 5581 pci_disable_msix(instance->pdev);
d3557fc8 5582fail_init_mfi:
da0dc9fb 5583fail_alloc_dma_buf:
c4a3e0a5
BS		 5584 if (instance->evt_detail)
5585 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5586 instance->evt_detail,
5587 instance->evt_detail_h);
5588
eb1b1237 5589 if (instance->producer)
c4a3e0a5
BS		 5590 pci_free_consistent(pdev, sizeof(u32), instance->producer,
5591 instance->producer_h);
5592 if (instance->consumer)
5593 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
5594 instance->consumer_h);
5595 scsi_host_put(host);
5596
da0dc9fb
BH		 5597fail_alloc_instance:
5598fail_set_dma_mask:
c4a3e0a5
BS		 5599 pci_disable_device(pdev);
5600
5601 return -ENODEV;
5602}
5603
5604/**
5605 * megasas_flush_cache - Requests FW to flush all its caches
5606 * @instance: Adapter soft state
5607 */
5608static void megasas_flush_cache(struct megasas_instance *instance)
5609{
5610 struct megasas_cmd *cmd;
5611 struct megasas_dcmd_frame *dcmd;
5612
39a98554 5613 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR)
5614 return;
5615
c4a3e0a5
BS		 5616 cmd = megasas_get_cmd(instance);
5617
5618 if (!cmd)
5619 return;
5620
5621 dcmd = &cmd->frame->dcmd;
5622
5623 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5624
5625 dcmd->cmd = MFI_CMD_DCMD;
5626 dcmd->cmd_status = 0x0;
5627 dcmd->sge_count = 0;
94cd65dd 5628 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 5629 dcmd->timeout = 0;
780a3762 5630 dcmd->pad_0 = 0;
c4a3e0a5 5631 dcmd->data_xfer_len = 0;
94cd65dd 5632 dcmd->opcode = cpu_to_le32(MR_DCMD_CTRL_CACHE_FLUSH);
c4a3e0a5
BS		 5633 dcmd->mbox.b[0] = MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE;
5634
cfbe7554
SS		 5635 if (megasas_issue_blocked_cmd(instance, cmd, 30))
5636 dev_err(&instance->pdev->dev, "Command timedout"
5637 " from %s\n", __func__);
c4a3e0a5 5638
4026e9aa 5639 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 5640}
5641
5642/**
5643 * megasas_shutdown_controller - Instructs FW to shutdown the controller
5644 * @instance: Adapter soft state
31ea7088 5645 * @opcode: Shutdown/Hibernate
c4a3e0a5 5646 */
31ea7088 5647static void megasas_shutdown_controller(struct megasas_instance *instance,
5648 u32 opcode)
c4a3e0a5
BS		 5649{
5650 struct megasas_cmd *cmd;
5651 struct megasas_dcmd_frame *dcmd;
5652
39a98554 5653 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR)
5654 return;
5655
c4a3e0a5
BS		 5656 cmd = megasas_get_cmd(instance);
5657
5658 if (!cmd)
5659 return;
5660
5661 if (instance->aen_cmd)
cfbe7554 5662 megasas_issue_blocked_abort_cmd(instance,
e0bd0874 5663 instance->aen_cmd, MEGASAS_BLOCKED_CMD_TIMEOUT);
9c915a8c 5664 if (instance->map_update_cmd)
5665 megasas_issue_blocked_abort_cmd(instance,
e0bd0874 5666 instance->map_update_cmd, MEGASAS_BLOCKED_CMD_TIMEOUT);
3761cb4c 5667 if (instance->jbod_seq_cmd)
5668 megasas_issue_blocked_abort_cmd(instance,
5669 instance->jbod_seq_cmd, MEGASAS_BLOCKED_CMD_TIMEOUT);
5670
c4a3e0a5
BS		 5671 dcmd = &cmd->frame->dcmd;
5672
5673 memset(dcmd->mbox.b, 0, MFI_MBOX_SIZE);
5674
5675 dcmd->cmd = MFI_CMD_DCMD;
5676 dcmd->cmd_status = 0x0;
5677 dcmd->sge_count = 0;
94cd65dd 5678 dcmd->flags = cpu_to_le16(MFI_FRAME_DIR_NONE);
c4a3e0a5 5679 dcmd->timeout = 0;
780a3762 5680 dcmd->pad_0 = 0;
c4a3e0a5 5681 dcmd->data_xfer_len = 0;
94cd65dd 5682 dcmd->opcode = cpu_to_le32(opcode);
c4a3e0a5 5683
cfbe7554
SS		 5684 if (megasas_issue_blocked_cmd(instance, cmd, 30))
5685 dev_err(&instance->pdev->dev, "Command timedout"
5686 "from %s\n", __func__);
c4a3e0a5 5687
4026e9aa 5688 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 5689}
5690
33139b21 5691#ifdef CONFIG_PM
31ea7088 5692/**
ad84db2e 5693 * megasas_suspend - driver suspend entry point
5694 * @pdev: PCI device structure
31ea7088 5695 * @state: PCI power state to suspend routine
5696 */
33139b21 5697static int
31ea7088 5698megasas_suspend(struct pci_dev *pdev, pm_message_t state)
5699{
5700 struct Scsi_Host *host;
5701 struct megasas_instance *instance;
5702
5703 instance = pci_get_drvdata(pdev);
5704 host = instance->host;
0c79e681 5705 instance->unload = 1;
31ea7088 5706
229fe47c 5707 /* Shutdown SR-IOV heartbeat timer */
5708 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
5709 del_timer_sync(&instance->sriov_heartbeat_timer);
5710
31ea7088 5711 megasas_flush_cache(instance);
5712 megasas_shutdown_controller(instance, MR_DCMD_HIBERNATE_SHUTDOWN);
7e8a75f4
YB		 5713
5714 /* cancel the delayed work if this work still in queue */
5715 if (instance->ev != NULL) {
5716 struct megasas_aen_event *ev = instance->ev;
c1d390d8 5717 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 5718 instance->ev = NULL;
5719 }
5720
31ea7088 5721 tasklet_kill(&instance->isr_tasklet);
5722
5723 pci_set_drvdata(instance->pdev, instance);
d46a3ad6 5724 instance->instancet->disable_intr(instance);
c8e858fe 5725
d3557fc8
SS		 5726 megasas_destroy_irqs(instance);
5727
c8e858fe 5728 if (instance->msix_vectors)
80d9da98 5729 pci_disable_msix(instance->pdev);
31ea7088 5730
5731 pci_save_state(pdev);
5732 pci_disable_device(pdev);
5733
5734 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5735
5736 return 0;
5737}
5738
5739/**
5740 * megasas_resume- driver resume entry point
5741 * @pdev: PCI device structure
5742 */
33139b21 5743static int
31ea7088 5744megasas_resume(struct pci_dev *pdev)
5745{
d3557fc8 5746 int rval;
31ea7088 5747 struct Scsi_Host *host;
5748 struct megasas_instance *instance;
5749
5750 instance = pci_get_drvdata(pdev);
5751 host = instance->host;
5752 pci_set_power_state(pdev, PCI_D0);
5753 pci_enable_wake(pdev, PCI_D0, 0);
5754 pci_restore_state(pdev);
5755
5756 /*
5757 * PCI prepping: enable device set bus mastering and dma mask
5758 */
aeab3fd7 5759 rval = pci_enable_device_mem(pdev);
31ea7088 5760
5761 if (rval) {
1be18254 5762 dev_err(&pdev->dev, "Enable device failed\n");
31ea7088 5763 return rval;
5764 }
5765
5766 pci_set_master(pdev);
5767
5768 if (megasas_set_dma_mask(pdev))
5769 goto fail_set_dma_mask;
5770
5771 /*
5772 * Initialize MFI Firmware
5773 */
5774
31ea7088 5775 atomic_set(&instance->fw_outstanding, 0);
5776
5777 /*
5778 * We expect the FW state to be READY
5779 */
058a8fac 5780 if (megasas_transition_to_ready(instance, 0))
31ea7088 5781 goto fail_ready_state;
5782
3f1abce4 5783 /* Now re-enable MSI-X */
dd088128 5784 if (instance->msix_vectors &&
8ae80ed1
AG		 5785 pci_enable_msix_exact(instance->pdev, instance->msixentry,
5786 instance->msix_vectors))
dd088128 5787 goto fail_reenable_msix;
3f1abce4 5788
5a8cb85b 5789 if (instance->ctrl_context) {
9c915a8c 5790 megasas_reset_reply_desc(instance);
5791 if (megasas_ioc_init_fusion(instance)) {
5792 megasas_free_cmds(instance);
5793 megasas_free_cmds_fusion(instance);
5794 goto fail_init_mfi;
5795 }
5796 if (!megasas_get_map_info(instance))
5797 megasas_sync_map_info(instance);
5a8cb85b 5798 } else {
9c915a8c 5799 *instance->producer = 0;
5800 *instance->consumer = 0;
5801 if (megasas_issue_init_mfi(instance))
5802 goto fail_init_mfi;
9c915a8c 5803 }
31ea7088 5804
9c915a8c 5805 tasklet_init(&instance->isr_tasklet, instance->instancet->tasklet,
5806 (unsigned long)instance);
31ea7088 5807
d3557fc8
SS		 5808 if (instance->msix_vectors ?
5809 megasas_setup_irqs_msix(instance, 0) :
5810 megasas_setup_irqs_ioapic(instance))
5811 goto fail_init_mfi;
31ea7088 5812
229fe47c 5813 /* Re-launch SR-IOV heartbeat timer */
5814 if (instance->requestorId) {
5815 if (!megasas_sriov_start_heartbeat(instance, 0))
5816 megasas_start_timer(instance,
5817 &instance->sriov_heartbeat_timer,
5818 megasas_sriov_heartbeat_handler,
5819 MEGASAS_SRIOV_HEARTBEAT_INTERVAL_VF);
5765c5b8 5820 else {
229fe47c 5821 instance->skip_heartbeat_timer_del = 1;
5765c5b8
SS		 5822 goto fail_init_mfi;
5823 }
229fe47c 5824 }
5825
d46a3ad6 5826 instance->instancet->enable_intr(instance);
3761cb4c 5827 megasas_setup_jbod_map(instance);
0c79e681
YB		 5828 instance->unload = 0;
5829
541f90b7 5830 /*
5831 * Initiate AEN (Asynchronous Event Notification)
5832 */
5833 if (megasas_start_aen(instance))
1be18254 5834 dev_err(&instance->pdev->dev, "Start AEN failed\n");
541f90b7 5835
31ea7088 5836 return 0;
5837
31ea7088 5838fail_init_mfi:
5839 if (instance->evt_detail)
5840 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5841 instance->evt_detail,
5842 instance->evt_detail_h);
5843
5844 if (instance->producer)
5845 pci_free_consistent(pdev, sizeof(u32), instance->producer,
5846 instance->producer_h);
5847 if (instance->consumer)
5848 pci_free_consistent(pdev, sizeof(u32), instance->consumer,
5849 instance->consumer_h);
5850 scsi_host_put(host);
5851
5852fail_set_dma_mask:
5853fail_ready_state:
dd088128 5854fail_reenable_msix:
31ea7088 5855
5856 pci_disable_device(pdev);
5857
5858 return -ENODEV;
5859}
33139b21
JS		 5860#else
5861#define megasas_suspend NULL
5862#define megasas_resume NULL
5863#endif
31ea7088 5864
c4a3e0a5
BS		 5865/**
5866 * megasas_detach_one - PCI hot"un"plug entry point
5867 * @pdev: PCI device structure
5868 */
6f039790 5869static void megasas_detach_one(struct pci_dev *pdev)
c4a3e0a5
BS		 5870{
5871 int i;
5872 struct Scsi_Host *host;
5873 struct megasas_instance *instance;
9c915a8c 5874 struct fusion_context *fusion;
3761cb4c 5875 u32 pd_seq_map_sz;
c4a3e0a5
BS		 5876
5877 instance = pci_get_drvdata(pdev);
c3518837 5878 instance->unload = 1;
c4a3e0a5 5879 host = instance->host;
9c915a8c 5880 fusion = instance->ctrl_context;
c4a3e0a5 5881
229fe47c 5882 /* Shutdown SR-IOV heartbeat timer */
5883 if (instance->requestorId && !instance->skip_heartbeat_timer_del)
5884 del_timer_sync(&instance->sriov_heartbeat_timer);
5885
fc62b3fc
SS		 5886 if (instance->fw_crash_state != UNAVAILABLE)
5887 megasas_free_host_crash_buffer(instance);
c4a3e0a5
BS		 5888 scsi_remove_host(instance->host);
5889 megasas_flush_cache(instance);
31ea7088 5890 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
7e8a75f4
YB		 5891
5892 /* cancel the delayed work if this work still in queue*/
5893 if (instance->ev != NULL) {
5894 struct megasas_aen_event *ev = instance->ev;
c1d390d8 5895 cancel_delayed_work_sync(&ev->hotplug_work);
7e8a75f4
YB		 5896 instance->ev = NULL;
5897 }
5898
cfbe7554
SS		 5899 /* cancel all wait events */
5900 wake_up_all(&instance->int_cmd_wait_q);
5901
5d018ad0 5902 tasklet_kill(&instance->isr_tasklet);
c4a3e0a5
BS		 5903
5904 /*
5905 * Take the instance off the instance array. Note that we will not
5906 * decrement the max_index. We let this array be sparse array
5907 */
5908 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
5909 if (megasas_mgmt_info.instance[i] == instance) {
5910 megasas_mgmt_info.count--;
5911 megasas_mgmt_info.instance[i] = NULL;
5912
5913 break;
5914 }
5915 }
5916
d46a3ad6 5917 instance->instancet->disable_intr(instance);
c4a3e0a5 5918
d3557fc8
SS		 5919 megasas_destroy_irqs(instance);
5920
c8e858fe 5921 if (instance->msix_vectors)
80d9da98 5922 pci_disable_msix(instance->pdev);
c4a3e0a5 5923
5a8cb85b 5924 if (instance->ctrl_context) {
9c915a8c 5925 megasas_release_fusion(instance);
3761cb4c 5926 pd_seq_map_sz = sizeof(struct MR_PD_CFG_SEQ_NUM_SYNC) +
5927 (sizeof(struct MR_PD_CFG_SEQ) *
5928 (MAX_PHYSICAL_DEVICES - 1));
51087a86 5929 for (i = 0; i < 2 ; i++) {
9c915a8c 5930 if (fusion->ld_map[i])
5931 dma_free_coherent(&instance->pdev->dev,
51087a86 5932 fusion->max_map_sz,
9c915a8c 5933 fusion->ld_map[i],
51087a86
SS		 5934 fusion->ld_map_phys[i]);
5935 if (fusion->ld_drv_map[i])
5936 free_pages((ulong)fusion->ld_drv_map[i],
5937 fusion->drv_map_pages);
3761cb4c 5938 if (fusion->pd_seq_sync)
5939 dma_free_coherent(&instance->pdev->dev,
5940 pd_seq_map_sz,
5941 fusion->pd_seq_sync[i],
5942 fusion->pd_seq_phys[i]);
51087a86
SS		 5943 }
5944 free_pages((ulong)instance->ctrl_context,
5945 instance->ctrl_context_pages);
5a8cb85b 5946 } else {
9c915a8c 5947 megasas_release_mfi(instance);
9c915a8c 5948 pci_free_consistent(pdev, sizeof(u32),
5949 instance->producer,
5950 instance->producer_h);
5951 pci_free_consistent(pdev, sizeof(u32),
5952 instance->consumer,
5953 instance->consumer_h);
9c915a8c 5954 }
c4a3e0a5 5955
51087a86
SS		 5956 kfree(instance->ctrl_info);
5957
105900d5
SS		 5958 if (instance->evt_detail)
5959 pci_free_consistent(pdev, sizeof(struct megasas_evt_detail),
5960 instance->evt_detail, instance->evt_detail_h);
229fe47c 5961
5962 if (instance->vf_affiliation)
5963 pci_free_consistent(pdev, (MAX_LOGICAL_DRIVES + 1) *
5964 sizeof(struct MR_LD_VF_AFFILIATION),
5965 instance->vf_affiliation,
5966 instance->vf_affiliation_h);
5967
5968 if (instance->vf_affiliation_111)
5969 pci_free_consistent(pdev,
5970 sizeof(struct MR_LD_VF_AFFILIATION_111),
5971 instance->vf_affiliation_111,
5972 instance->vf_affiliation_111_h);
5973
5974 if (instance->hb_host_mem)
5975 pci_free_consistent(pdev, sizeof(struct MR_CTRL_HB_HOST_MEM),
5976 instance->hb_host_mem,
5977 instance->hb_host_mem_h);
5978
fc62b3fc
SS		 5979 if (instance->crash_dump_buf)
5980 pci_free_consistent(pdev, CRASH_DMA_BUF_SIZE,
5981 instance->crash_dump_buf, instance->crash_dump_h);
5982
5765c5b8
SS		 5983 if (instance->system_info_buf)
5984 pci_free_consistent(pdev, sizeof(struct MR_DRV_SYSTEM_INFO),
5985 instance->system_info_buf, instance->system_info_h);
5986
c4a3e0a5
BS		 5987 scsi_host_put(host);
5988
c4a3e0a5 5989 pci_disable_device(pdev);
c4a3e0a5
BS		 5990}
5991
5992/**
5993 * megasas_shutdown - Shutdown entry point
5994 * @device: Generic device structure
5995 */
5996static void megasas_shutdown(struct pci_dev *pdev)
5997{
5998 struct megasas_instance *instance = pci_get_drvdata(pdev);
c8e858fe 5999
0c79e681 6000 instance->unload = 1;
c4a3e0a5 6001 megasas_flush_cache(instance);
530e6fc1 6002 megasas_shutdown_controller(instance, MR_DCMD_CTRL_SHUTDOWN);
d46a3ad6 6003 instance->instancet->disable_intr(instance);
d3557fc8
SS		 6004 megasas_destroy_irqs(instance);
6005
c8e858fe 6006 if (instance->msix_vectors)
46fd256e 6007 pci_disable_msix(instance->pdev);
c4a3e0a5
BS		 6008}
6009
6010/**
6011 * megasas_mgmt_open - char node "open" entry point
6012 */
6013static int megasas_mgmt_open(struct inode *inode, struct file *filep)
6014{
6015 /*
6016 * Allow only those users with admin rights
6017 */
6018 if (!capable(CAP_SYS_ADMIN))
6019 return -EACCES;
6020
6021 return 0;
6022}
6023
c4a3e0a5
BS		 6024/**
6025 * megasas_mgmt_fasync - Async notifier registration from applications
6026 *
6027 * This function adds the calling process to a driver global queue. When an
6028 * event occurs, SIGIO will be sent to all processes in this queue.
6029 */
6030static int megasas_mgmt_fasync(int fd, struct file *filep, int mode)
6031{
6032 int rc;
6033
0b950672 6034 mutex_lock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 6035
6036 rc = fasync_helper(fd, filep, mode, &megasas_async_queue);
6037
0b950672 6038 mutex_unlock(&megasas_async_queue_mutex);
c4a3e0a5
BS		 6039
6040 if (rc >= 0) {
6041 /* For sanity check when we get ioctl */
6042 filep->private_data = filep;
6043 return 0;
6044 }
6045
6046 printk(KERN_DEBUG "megasas: fasync_helper failed [%d]\n", rc);
6047
6048 return rc;
6049}
6050
c3518837
YB		 6051/**
6052 * megasas_mgmt_poll - char node "poll" entry point
6053 * */
6054static unsigned int megasas_mgmt_poll(struct file *file, poll_table *wait)
6055{
6056 unsigned int mask;
6057 unsigned long flags;
da0dc9fb 6058
c3518837
YB		 6059 poll_wait(file, &megasas_poll_wait, wait);
6060 spin_lock_irqsave(&poll_aen_lock, flags);
6061 if (megasas_poll_wait_aen)
da0dc9fb 6062 mask = (POLLIN | POLLRDNORM);
c3518837
YB		 6063 else
6064 mask = 0;
51087a86 6065 megasas_poll_wait_aen = 0;
c3518837
YB		 6066 spin_unlock_irqrestore(&poll_aen_lock, flags);
6067 return mask;
6068}
6069
fc62b3fc
SS		 6070/*
6071 * megasas_set_crash_dump_params_ioctl:
6072 * Send CRASH_DUMP_MODE DCMD to all controllers
6073 * @cmd: MFI command frame
6074 */
6075
da0dc9fb 6076static int megasas_set_crash_dump_params_ioctl(struct megasas_cmd *cmd)
fc62b3fc
SS		 6077{
6078 struct megasas_instance *local_instance;
6079 int i, error = 0;
6080 int crash_support;
6081
6082 crash_support = cmd->frame->dcmd.mbox.w[0];
6083
6084 for (i = 0; i < megasas_mgmt_info.max_index; i++) {
6085 local_instance = megasas_mgmt_info.instance[i];
6086 if (local_instance && local_instance->crash_dump_drv_support) {
6087 if ((local_instance->adprecovery ==
6088 MEGASAS_HBA_OPERATIONAL) &&
6089 !megasas_set_crash_dump_params(local_instance,
6090 crash_support)) {
6091 local_instance->crash_dump_app_support =
6092 crash_support;
6093 dev_info(&local_instance->pdev->dev,
6094 "Application firmware crash "
6095 "dump mode set success\n");
6096 error = 0;
6097 } else {
6098 dev_info(&local_instance->pdev->dev,
6099 "Application firmware crash "
6100 "dump mode set failed\n");
6101 error = -1;
6102 }
6103 }
6104 }
6105 return error;
6106}
6107
c4a3e0a5
BS		 6108/**
6109 * megasas_mgmt_fw_ioctl - Issues management ioctls to FW
6110 * @instance: Adapter soft state
6111 * @argp: User's ioctl packet
6112 */
6113static int
6114megasas_mgmt_fw_ioctl(struct megasas_instance *instance,
6115 struct megasas_iocpacket __user * user_ioc,
6116 struct megasas_iocpacket *ioc)
6117{
6118 struct megasas_sge32 *kern_sge32;
6119 struct megasas_cmd *cmd;
6120 void *kbuff_arr[MAX_IOCTL_SGE];
6121 dma_addr_t buf_handle = 0;
6122 int error = 0, i;
6123 void *sense = NULL;
6124 dma_addr_t sense_handle;
7b2519af 6125 unsigned long *sense_ptr;
c4a3e0a5
BS		 6126
6127 memset(kbuff_arr, 0, sizeof(kbuff_arr));
6128
6129 if (ioc->sge_count > MAX_IOCTL_SGE) {
1be18254 6130 dev_printk(KERN_DEBUG, &instance->pdev->dev, "SGE count [%d] > max limit [%d]\n",
c4a3e0a5
BS		 6131 ioc->sge_count, MAX_IOCTL_SGE);
6132 return -EINVAL;
6133 }
6134
6135 cmd = megasas_get_cmd(instance);
6136 if (!cmd) {
1be18254 6137 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to get a cmd packet\n");
c4a3e0a5
BS		 6138 return -ENOMEM;
6139 }
6140
6141 /*
6142 * User's IOCTL packet has 2 frames (maximum). Copy those two
6143 * frames into our cmd's frames. cmd->frame's context will get
6144 * overwritten when we copy from user's frames. So set that value
6145 * alone separately
6146 */
6147 memcpy(cmd->frame, ioc->frame.raw, 2 * MEGAMFI_FRAME_SIZE);
94cd65dd 6148 cmd->frame->hdr.context = cpu_to_le32(cmd->index);
c3518837 6149 cmd->frame->hdr.pad_0 = 0;
94cd65dd
SS		 6150 cmd->frame->hdr.flags &= cpu_to_le16(~(MFI_FRAME_IEEE |
6151 MFI_FRAME_SGL64 |
6152 MFI_FRAME_SENSE64));
c4a3e0a5 6153
fc62b3fc
SS		 6154 if (cmd->frame->dcmd.opcode == MR_DRIVER_SET_APP_CRASHDUMP_MODE) {
6155 error = megasas_set_crash_dump_params_ioctl(cmd);
6156 megasas_return_cmd(instance, cmd);
6157 return error;
6158 }
6159
c4a3e0a5
BS		 6160 /*
6161 * The management interface between applications and the fw uses
6162 * MFI frames. E.g, RAID configuration changes, LD property changes
6163 * etc are accomplishes through different kinds of MFI frames. The
6164 * driver needs to care only about substituting user buffers with
6165 * kernel buffers in SGLs. The location of SGL is embedded in the
6166 * struct iocpacket itself.
6167 */
6168 kern_sge32 = (struct megasas_sge32 *)
6169 ((unsigned long)cmd->frame + ioc->sgl_off);
6170
6171 /*
6172 * For each user buffer, create a mirror buffer and copy in
6173 */
6174 for (i = 0; i < ioc->sge_count; i++) {
98cb7e44
BM		 6175 if (!ioc->sgl[i].iov_len)
6176 continue;
6177
9f35fa8a 6178 kbuff_arr[i] = dma_alloc_coherent(&instance->pdev->dev,
c4a3e0a5 6179 ioc->sgl[i].iov_len,
9f35fa8a 6180 &buf_handle, GFP_KERNEL);
c4a3e0a5 6181 if (!kbuff_arr[i]) {
1be18254
BH		 6182 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Failed to alloc "
6183 "kernel SGL buffer for IOCTL\n");
c4a3e0a5
BS		 6184 error = -ENOMEM;
6185 goto out;
6186 }
6187
6188 /*
6189 * We don't change the dma_coherent_mask, so
6190 * pci_alloc_consistent only returns 32bit addresses
6191 */
94cd65dd
SS		 6192 kern_sge32[i].phys_addr = cpu_to_le32(buf_handle);
6193 kern_sge32[i].length = cpu_to_le32(ioc->sgl[i].iov_len);
c4a3e0a5
BS		 6194
6195 /*
6196 * We created a kernel buffer corresponding to the
6197 * user buffer. Now copy in from the user buffer
6198 */
6199 if (copy_from_user(kbuff_arr[i], ioc->sgl[i].iov_base,
6200 (u32) (ioc->sgl[i].iov_len))) {
6201 error = -EFAULT;
6202 goto out;
6203 }
6204 }
6205
6206 if (ioc->sense_len) {
9f35fa8a
SP		 6207 sense = dma_alloc_coherent(&instance->pdev->dev, ioc->sense_len,
6208 &sense_handle, GFP_KERNEL);
c4a3e0a5
BS		 6209 if (!sense) {
6210 error = -ENOMEM;
6211 goto out;
6212 }
6213
6214 sense_ptr =
7b2519af 6215 (unsigned long *) ((unsigned long)cmd->frame + ioc->sense_off);
94cd65dd 6216 *sense_ptr = cpu_to_le32(sense_handle);
c4a3e0a5
BS		 6217 }
6218
6219 /*
6220 * Set the sync_cmd flag so that the ISR knows not to complete this
6221 * cmd to the SCSI mid-layer
6222 */
6223 cmd->sync_cmd = 1;
cfbe7554 6224 megasas_issue_blocked_cmd(instance, cmd, 0);
c4a3e0a5
BS		 6225 cmd->sync_cmd = 0;
6226
aa00832b
SS		 6227 if (instance->unload == 1) {
6228 dev_info(&instance->pdev->dev, "Driver unload is in progress "
6229 "don't submit data to application\n");
6230 goto out;
6231 }
c4a3e0a5
BS		 6232 /*
6233 * copy out the kernel buffers to user buffers
6234 */
6235 for (i = 0; i < ioc->sge_count; i++) {
6236 if (copy_to_user(ioc->sgl[i].iov_base, kbuff_arr[i],
6237 ioc->sgl[i].iov_len)) {
6238 error = -EFAULT;
6239 goto out;
6240 }
6241 }
6242
6243 /*
6244 * copy out the sense
6245 */
6246 if (ioc->sense_len) {
6247 /*
b70a41e0 6248 * sense_ptr points to the location that has the user
c4a3e0a5
BS		 6249 * sense buffer address
6250 */
7b2519af
YB		 6251 sense_ptr = (unsigned long *) ((unsigned long)ioc->frame.raw +
6252 ioc->sense_off);
c4a3e0a5 6253
b70a41e0 6254 if (copy_to_user((void __user *)((unsigned long)(*sense_ptr)),
6255 sense, ioc->sense_len)) {
1be18254 6256 dev_err(&instance->pdev->dev, "Failed to copy out to user "
b10c36a5 6257 "sense data\n");
c4a3e0a5
BS		 6258 error = -EFAULT;
6259 goto out;
6260 }
6261 }
6262
6263 /*
6264 * copy the status codes returned by the fw
6265 */
6266 if (copy_to_user(&user_ioc->frame.hdr.cmd_status,
6267 &cmd->frame->hdr.cmd_status, sizeof(u8))) {
1be18254 6268 dev_printk(KERN_DEBUG, &instance->pdev->dev, "Error copying out cmd_status\n");
c4a3e0a5
BS		 6269 error = -EFAULT;
6270 }
6271
da0dc9fb 6272out:
c4a3e0a5 6273 if (sense) {
9f35fa8a 6274 dma_free_coherent(&instance->pdev->dev, ioc->sense_len,
c4a3e0a5
BS		 6275 sense, sense_handle);
6276 }
6277
7a6a731b
BM		 6278 for (i = 0; i < ioc->sge_count; i++) {
6279 if (kbuff_arr[i])
6280 dma_free_coherent(&instance->pdev->dev,
94cd65dd 6281 le32_to_cpu(kern_sge32[i].length),
7a6a731b 6282 kbuff_arr[i],
94cd65dd 6283 le32_to_cpu(kern_sge32[i].phys_addr));
90dc9d98 6284 kbuff_arr[i] = NULL;
c4a3e0a5
BS		 6285 }
6286
4026e9aa 6287 megasas_return_cmd(instance, cmd);
c4a3e0a5
BS		 6288 return error;
6289}
6290
c4a3e0a5
BS		 6291static int megasas_mgmt_ioctl_fw(struct file *file, unsigned long arg)
6292{
6293 struct megasas_iocpacket __user *user_ioc =
6294 (struct megasas_iocpacket __user *)arg;
6295 struct megasas_iocpacket *ioc;
6296 struct megasas_instance *instance;
6297 int error;
39a98554 6298 int i;
6299 unsigned long flags;
6300 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 6301
6302 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
6303 if (!ioc)
6304 return -ENOMEM;
6305
6306 if (copy_from_user(ioc, user_ioc, sizeof(*ioc))) {
6307 error = -EFAULT;
6308 goto out_kfree_ioc;
6309 }
6310
6311 instance = megasas_lookup_instance(ioc->host_no);
6312 if (!instance) {
6313 error = -ENODEV;
6314 goto out_kfree_ioc;
6315 }
6316
229fe47c 6317 /* Adjust ioctl wait time for VF mode */
6318 if (instance->requestorId)
6319 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
6320
6321 /* Block ioctls in VF mode */
6322 if (instance->requestorId && !allow_vf_ioctls) {
6323 error = -ENODEV;
6324 goto out_kfree_ioc;
6325 }
6326
39a98554 6327 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
1be18254 6328 dev_err(&instance->pdev->dev, "Controller in crit error\n");
0c79e681
YB		 6329 error = -ENODEV;
6330 goto out_kfree_ioc;
6331 }
6332
6333 if (instance->unload == 1) {
6334 error = -ENODEV;
6335 goto out_kfree_ioc;
6336 }
6337
c4a3e0a5
BS		 6338 if (down_interruptible(&instance->ioctl_sem)) {
6339 error = -ERESTARTSYS;
6340 goto out_kfree_ioc;
6341 }
39a98554 6342
6343 for (i = 0; i < wait_time; i++) {
6344
6345 spin_lock_irqsave(&instance->hba_lock, flags);
6346 if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) {
6347 spin_unlock_irqrestore(&instance->hba_lock, flags);
6348 break;
6349 }
6350 spin_unlock_irqrestore(&instance->hba_lock, flags);
6351
6352 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6353 dev_notice(&instance->pdev->dev, "waiting"
39a98554 6354 "for controller reset to finish\n");
6355 }
6356
6357 msleep(1000);
6358 }
6359
6360 spin_lock_irqsave(&instance->hba_lock, flags);
6361 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
6362 spin_unlock_irqrestore(&instance->hba_lock, flags);
6363
1be18254 6364 dev_err(&instance->pdev->dev, "timed out while"
39a98554 6365 "waiting for HBA to recover\n");
6366 error = -ENODEV;
c64e483e 6367 goto out_up;
39a98554 6368 }
6369 spin_unlock_irqrestore(&instance->hba_lock, flags);
6370
c4a3e0a5 6371 error = megasas_mgmt_fw_ioctl(instance, user_ioc, ioc);
da0dc9fb 6372out_up:
c4a3e0a5
BS		 6373 up(&instance->ioctl_sem);
6374
da0dc9fb 6375out_kfree_ioc:
c4a3e0a5
BS		 6376 kfree(ioc);
6377 return error;
6378}
6379
6380static int megasas_mgmt_ioctl_aen(struct file *file, unsigned long arg)
6381{
6382 struct megasas_instance *instance;
6383 struct megasas_aen aen;
6384 int error;
39a98554 6385 int i;
6386 unsigned long flags;
6387 u32 wait_time = MEGASAS_RESET_WAIT_TIME;
c4a3e0a5
BS		 6388
6389 if (file->private_data != file) {
6390 printk(KERN_DEBUG "megasas: fasync_helper was not "
6391 "called first\n");
6392 return -EINVAL;
6393 }
6394
6395 if (copy_from_user(&aen, (void __user *)arg, sizeof(aen)))
6396 return -EFAULT;
6397
6398 instance = megasas_lookup_instance(aen.host_no);
6399
6400 if (!instance)
6401 return -ENODEV;
6402
39a98554 6403 if (instance->adprecovery == MEGASAS_HW_CRITICAL_ERROR) {
6404 return -ENODEV;
0c79e681
YB		 6405 }
6406
6407 if (instance->unload == 1) {
6408 return -ENODEV;
6409 }
6410
39a98554 6411 for (i = 0; i < wait_time; i++) {
6412
6413 spin_lock_irqsave(&instance->hba_lock, flags);
6414 if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL) {
6415 spin_unlock_irqrestore(&instance->hba_lock,
6416 flags);
6417 break;
6418 }
6419
6420 spin_unlock_irqrestore(&instance->hba_lock, flags);
6421
6422 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6423 dev_notice(&instance->pdev->dev, "waiting for"
39a98554 6424 "controller reset to finish\n");
6425 }
6426
6427 msleep(1000);
6428 }
6429
6430 spin_lock_irqsave(&instance->hba_lock, flags);
6431 if (instance->adprecovery != MEGASAS_HBA_OPERATIONAL) {
6432 spin_unlock_irqrestore(&instance->hba_lock, flags);
1be18254
BH		 6433 dev_err(&instance->pdev->dev, "timed out while waiting"
6434 "for HBA to recover\n");
39a98554 6435 return -ENODEV;
6436 }
6437 spin_unlock_irqrestore(&instance->hba_lock, flags);
6438
e5a69e27 6439 mutex_lock(&instance->aen_mutex);
c4a3e0a5
BS		 6440 error = megasas_register_aen(instance, aen.seq_num,
6441 aen.class_locale_word);
e5a69e27 6442 mutex_unlock(&instance->aen_mutex);
c4a3e0a5
BS		 6443 return error;
6444}
6445
6446/**
6447 * megasas_mgmt_ioctl - char node ioctl entry point
6448 */
6449static long
6450megasas_mgmt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
6451{
6452 switch (cmd) {
6453 case MEGASAS_IOC_FIRMWARE:
6454 return megasas_mgmt_ioctl_fw(file, arg);
6455
6456 case MEGASAS_IOC_GET_AEN:
6457 return megasas_mgmt_ioctl_aen(file, arg);
6458 }
6459
6460 return -ENOTTY;
6461}
6462
6463#ifdef CONFIG_COMPAT
6464static int megasas_mgmt_compat_ioctl_fw(struct file *file, unsigned long arg)
6465{
6466 struct compat_megasas_iocpacket __user *cioc =
6467 (struct compat_megasas_iocpacket __user *)arg;
6468 struct megasas_iocpacket __user *ioc =
6469 compat_alloc_user_space(sizeof(struct megasas_iocpacket));
6470 int i;
6471 int error = 0;
b3dc1a21 6472 compat_uptr_t ptr;
323c4a02 6473 unsigned long local_raw_ptr;
6474 u32 local_sense_off;
6475 u32 local_sense_len;
c4a3e0a5 6476
83aabc1b
JG		 6477 if (clear_user(ioc, sizeof(*ioc)))
6478 return -EFAULT;
c4a3e0a5
BS		 6479
6480 if (copy_in_user(&ioc->host_no, &cioc->host_no, sizeof(u16)) ||
6481 copy_in_user(&ioc->sgl_off, &cioc->sgl_off, sizeof(u32)) ||
6482 copy_in_user(&ioc->sense_off, &cioc->sense_off, sizeof(u32)) ||
6483 copy_in_user(&ioc->sense_len, &cioc->sense_len, sizeof(u32)) ||
6484 copy_in_user(ioc->frame.raw, cioc->frame.raw, 128) ||
6485 copy_in_user(&ioc->sge_count, &cioc->sge_count, sizeof(u32)))
6486 return -EFAULT;
6487
b3dc1a21
TH		 6488 /*
6489 * The sense_ptr is used in megasas_mgmt_fw_ioctl only when
6490 * sense_len is not null, so prepare the 64bit value under
6491 * the same condition.
6492 */
323c4a02 6493 if (get_user(local_raw_ptr, ioc->frame.raw) ||
6494 get_user(local_sense_off, &ioc->sense_off) ||
6495 get_user(local_sense_len, &ioc->sense_len))
6496 return -EFAULT;
6497
6498
6499 if (local_sense_len) {
b3dc1a21 6500 void __user **sense_ioc_ptr =
323c4a02 6501 (void __user **)((u8*)local_raw_ptr + local_sense_off);
b3dc1a21
TH		 6502 compat_uptr_t *sense_cioc_ptr =
6503 (compat_uptr_t *)(cioc->frame.raw + cioc->sense_off);
6504 if (get_user(ptr, sense_cioc_ptr) ||
6505 put_user(compat_ptr(ptr), sense_ioc_ptr))
6506 return -EFAULT;
6507 }
c4a3e0a5 6508
b3dc1a21 6509 for (i = 0; i < MAX_IOCTL_SGE; i++) {
c4a3e0a5
BS		 6510 if (get_user(ptr, &cioc->sgl[i].iov_base) ||
6511 put_user(compat_ptr(ptr), &ioc->sgl[i].iov_base) ||
6512 copy_in_user(&ioc->sgl[i].iov_len,
6513 &cioc->sgl[i].iov_len, sizeof(compat_size_t)))
6514 return -EFAULT;
6515 }
6516
6517 error = megasas_mgmt_ioctl_fw(file, (unsigned long)ioc);
6518
6519 if (copy_in_user(&cioc->frame.hdr.cmd_status,
6520 &ioc->frame.hdr.cmd_status, sizeof(u8))) {
6521 printk(KERN_DEBUG "megasas: error copy_in_user cmd_status\n");
6522 return -EFAULT;
6523 }
6524 return error;
6525}
6526
6527static long
6528megasas_mgmt_compat_ioctl(struct file *file, unsigned int cmd,
6529 unsigned long arg)
6530{
6531 switch (cmd) {
cb59aa6a
SP		 6532 case MEGASAS_IOC_FIRMWARE32:
6533 return megasas_mgmt_compat_ioctl_fw(file, arg);
c4a3e0a5
BS		 6534 case MEGASAS_IOC_GET_AEN:
6535 return megasas_mgmt_ioctl_aen(file, arg);
6536 }
6537
6538 return -ENOTTY;
6539}
6540#endif
6541
6542/*
6543 * File operations structure for management interface
6544 */
00977a59 6545static const struct file_operations megasas_mgmt_fops = {
c4a3e0a5
BS		 6546 .owner = THIS_MODULE,
6547 .open = megasas_mgmt_open,
c4a3e0a5
BS		 6548 .fasync = megasas_mgmt_fasync,
6549 .unlocked_ioctl = megasas_mgmt_ioctl,
c3518837 6550 .poll = megasas_mgmt_poll,
c4a3e0a5
BS		 6551#ifdef CONFIG_COMPAT
6552 .compat_ioctl = megasas_mgmt_compat_ioctl,
6553#endif
6038f373 6554 .llseek = noop_llseek,
c4a3e0a5
BS		 6555};
6556
6557/*
6558 * PCI hotplug support registration structure
6559 */
6560static struct pci_driver megasas_pci_driver = {
6561
6562 .name = "megaraid_sas",
6563 .id_table = megasas_pci_table,
6564 .probe = megasas_probe_one,
6f039790 6565 .remove = megasas_detach_one,
31ea7088 6566 .suspend = megasas_suspend,
6567 .resume = megasas_resume,
c4a3e0a5
BS		 6568 .shutdown = megasas_shutdown,
6569};
6570
6571/*
6572 * Sysfs driver attributes
6573 */
6574static ssize_t megasas_sysfs_show_version(struct device_driver *dd, char *buf)
6575{
6576 return snprintf(buf, strlen(MEGASAS_VERSION) + 2, "%s\n",
6577 MEGASAS_VERSION);
6578}
6579
6580static DRIVER_ATTR(version, S_IRUGO, megasas_sysfs_show_version, NULL);
6581
09fced19
SS		 6582static ssize_t
6583megasas_sysfs_show_release_date(struct device_driver *dd, char *buf)
6584{
6585 return snprintf(buf, strlen(MEGASAS_RELDATE) + 2, "%s\n",
6586 MEGASAS_RELDATE);
6587}
6588
6589static DRIVER_ATTR(release_date, S_IRUGO, megasas_sysfs_show_release_date, NULL);
6590
72c4fd36
YB		 6591static ssize_t
6592megasas_sysfs_show_support_poll_for_event(struct device_driver *dd, char *buf)
6593{
6594 return sprintf(buf, "%u\n", support_poll_for_event);
6595}
6596
6597static DRIVER_ATTR(support_poll_for_event, S_IRUGO,
6598 megasas_sysfs_show_support_poll_for_event, NULL);
6599
837f5fe8
YB		 6600 static ssize_t
6601megasas_sysfs_show_support_device_change(struct device_driver *dd, char *buf)
6602{
6603 return sprintf(buf, "%u\n", support_device_change);
6604}
6605
6606static DRIVER_ATTR(support_device_change, S_IRUGO,
6607 megasas_sysfs_show_support_device_change, NULL);
6608
658dcedb
SP		 6609static ssize_t
6610megasas_sysfs_show_dbg_lvl(struct device_driver *dd, char *buf)
6611{
ad84db2e 6612 return sprintf(buf, "%u\n", megasas_dbg_lvl);
658dcedb
SP		 6613}
6614
6615static ssize_t
6616megasas_sysfs_set_dbg_lvl(struct device_driver *dd, const char *buf, size_t count)
6617{
6618 int retval = count;
da0dc9fb
BH		 6619
6620 if (sscanf(buf, "%u", &megasas_dbg_lvl) < 1) {
658dcedb
SP		 6621 printk(KERN_ERR "megasas: could not set dbg_lvl\n");
6622 retval = -EINVAL;
6623 }
6624 return retval;
6625}
6626
66dca9b8 6627static DRIVER_ATTR(dbg_lvl, S_IRUGO|S_IWUSR, megasas_sysfs_show_dbg_lvl,
ad84db2e 6628 megasas_sysfs_set_dbg_lvl);
6629
7e8a75f4
YB		 6630static void
6631megasas_aen_polling(struct work_struct *work)
6632{
6633 struct megasas_aen_event *ev =
c1d390d8 6634 container_of(work, struct megasas_aen_event, hotplug_work.work);
7e8a75f4
YB		 6635 struct megasas_instance *instance = ev->instance;
6636 union megasas_evt_class_locale class_locale;
6637 struct Scsi_Host *host;
6638 struct scsi_device *sdev1;
6639 u16 pd_index = 0;
c9786842 6640 u16 ld_index = 0;
7e8a75f4 6641 int i, j, doscan = 0;
229fe47c 6642 u32 seq_num, wait_time = MEGASAS_RESET_WAIT_TIME;
7e8a75f4
YB		 6643 int error;
6644
6645 if (!instance) {
6646 printk(KERN_ERR "invalid instance!\n");
6647 kfree(ev);
6648 return;
6649 }
229fe47c 6650
6651 /* Adjust event workqueue thread wait time for VF mode */
6652 if (instance->requestorId)
6653 wait_time = MEGASAS_ROUTINE_WAIT_TIME_VF;
6654
6655 /* Don't run the event workqueue thread if OCR is running */
6656 for (i = 0; i < wait_time; i++) {
6657 if (instance->adprecovery == MEGASAS_HBA_OPERATIONAL)
6658 break;
6659 if (!(i % MEGASAS_RESET_NOTICE_INTERVAL)) {
1be18254 6660 dev_notice(&instance->pdev->dev, "%s waiting for "
229fe47c 6661 "controller reset to finish for scsi%d\n",
6662 __func__, instance->host->host_no);
6663 }
6664 msleep(1000);
6665 }
6666
7e8a75f4
YB		 6667 instance->ev = NULL;
6668 host = instance->host;
6669 if (instance->evt_detail) {
714f5177 6670 megasas_decode_evt(instance);
7e8a75f4 6671
94cd65dd 6672 switch (le32_to_cpu(instance->evt_detail->code)) {
7e8a75f4 6673 case MR_EVT_PD_INSERTED:
c9786842
YB		 6674 if (megasas_get_pd_list(instance) == 0) {
6675 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
6676 for (j = 0;
6677 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6678 j++) {
6679
6680 pd_index =
6681 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6682
da0dc9fb 6683 sdev1 = scsi_device_lookup(host, i, j, 0);
c9786842
YB		 6684
6685 if (instance->pd_list[pd_index].driveState
6686 == MR_PD_STATE_SYSTEM) {
da0dc9fb 6687 if (!sdev1)
c9786842 6688 scsi_add_device(host, i, j, 0);
c9786842
YB		 6689
6690 if (sdev1)
6691 scsi_device_put(sdev1);
6692 }
6693 }
6694 }
6695 }
6696 doscan = 0;
6697 break;
6698
7e8a75f4 6699 case MR_EVT_PD_REMOVED:
c9786842 6700 if (megasas_get_pd_list(instance) == 0) {
c9786842
YB		 6701 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
6702 for (j = 0;
6703 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6704 j++) {
6705
6706 pd_index =
6707 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6708
da0dc9fb 6709 sdev1 = scsi_device_lookup(host, i, j, 0);
c9786842
YB		 6710
6711 if (instance->pd_list[pd_index].driveState
6712 == MR_PD_STATE_SYSTEM) {
da0dc9fb 6713 if (sdev1)
c9786842 6714 scsi_device_put(sdev1);
c9786842
YB		 6715 } else {
6716 if (sdev1) {
6717 scsi_remove_device(sdev1);
6718 scsi_device_put(sdev1);
6719 }
6720 }
6721 }
6722 }
6723 }
6724 doscan = 0;
6725 break;
6726
6727 case MR_EVT_LD_OFFLINE:
4c598b23 6728 case MR_EVT_CFG_CLEARED:
c9786842 6729 case MR_EVT_LD_DELETED:
229fe47c 6730 if (!instance->requestorId ||
92bb6505 6731 megasas_get_ld_vf_affiliation(instance, 0)) {
229fe47c 6732 if (megasas_ld_list_query(instance,
6733 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
6734 megasas_get_ld_list(instance);
6735 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
6736 for (j = 0;
6737 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6738 j++) {
6739
6740 ld_index =
6741 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6742
6743 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6744
6745 if (instance->ld_ids[ld_index]
6746 != 0xff) {
6747 if (sdev1)
6748 scsi_device_put(sdev1);
6749 } else {
6750 if (sdev1) {
6751 scsi_remove_device(sdev1);
6752 scsi_device_put(sdev1);
6753 }
6754 }
c9786842
YB		 6755 }
6756 }
229fe47c 6757 doscan = 0;
c9786842 6758 }
c9786842
YB		 6759 break;
6760 case MR_EVT_LD_CREATED:
229fe47c 6761 if (!instance->requestorId ||
92bb6505 6762 megasas_get_ld_vf_affiliation(instance, 0)) {
229fe47c 6763 if (megasas_ld_list_query(instance,
6764 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
6765 megasas_get_ld_list(instance);
6766 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
6767 for (j = 0;
6768 j < MEGASAS_MAX_DEV_PER_CHANNEL;
6769 j++) {
6770 ld_index =
6771 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
6772
6773 sdev1 = scsi_device_lookup(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6774
6775 if (instance->ld_ids[ld_index]
6776 != 0xff) {
6777 if (!sdev1)
6778 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
c9786842 6779 }
229fe47c 6780 if (sdev1)
6781 scsi_device_put(sdev1);
c9786842
YB		 6782 }
6783 }
229fe47c 6784 doscan = 0;
c9786842 6785 }
c9786842 6786 break;
7e8a75f4 6787 case MR_EVT_CTRL_HOST_BUS_SCAN_REQUESTED:
c9786842 6788 case MR_EVT_FOREIGN_CFG_IMPORTED:
9c915a8c 6789 case MR_EVT_LD_STATE_CHANGE:
7e8a75f4
YB		 6790 doscan = 1;
6791 break;
c4bd2654 6792 case MR_EVT_CTRL_PROP_CHANGED:
6793 megasas_get_ctrl_info(instance);
6794 break;
7e8a75f4
YB		 6795 default:
6796 doscan = 0;
6797 break;
6798 }
6799 } else {
1be18254 6800 dev_err(&instance->pdev->dev, "invalid evt_detail!\n");
7e8a75f4
YB		 6801 kfree(ev);
6802 return;
6803 }
6804
6805 if (doscan) {
1be18254 6806 dev_info(&instance->pdev->dev, "scanning for scsi%d...\n",
229fe47c 6807 instance->host->host_no);
58968fc8
HR		 6808 if (megasas_get_pd_list(instance) == 0) {
6809 for (i = 0; i < MEGASAS_MAX_PD_CHANNELS; i++) {
6810 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL; j++) {
6811 pd_index = i*MEGASAS_MAX_DEV_PER_CHANNEL + j;
6812 sdev1 = scsi_device_lookup(host, i, j, 0);
6813 if (instance->pd_list[pd_index].driveState ==
6814 MR_PD_STATE_SYSTEM) {
6815 if (!sdev1) {
6816 scsi_add_device(host, i, j, 0);
6817 }
6818 if (sdev1)
6819 scsi_device_put(sdev1);
6820 } else {
6821 if (sdev1) {
6822 scsi_remove_device(sdev1);
6823 scsi_device_put(sdev1);
6824 }
7e8a75f4
YB		 6825 }
6826 }
6827 }
6828 }
c9786842 6829
229fe47c 6830 if (!instance->requestorId ||
92bb6505 6831 megasas_get_ld_vf_affiliation(instance, 0)) {
229fe47c 6832 if (megasas_ld_list_query(instance,
6833 MR_LD_QUERY_TYPE_EXPOSED_TO_HOST))
6834 megasas_get_ld_list(instance);
6835 for (i = 0; i < MEGASAS_MAX_LD_CHANNELS; i++) {
6836 for (j = 0; j < MEGASAS_MAX_DEV_PER_CHANNEL;
6837 j++) {
6838 ld_index =
6839 (i * MEGASAS_MAX_DEV_PER_CHANNEL) + j;
c9786842 6840
229fe47c 6841 sdev1 = scsi_device_lookup(host,
6842 MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6843 if (instance->ld_ids[ld_index]
6844 != 0xff) {
6845 if (!sdev1)
6846 scsi_add_device(host, MEGASAS_MAX_PD_CHANNELS + i, j, 0);
6847 else
6848 scsi_device_put(sdev1);
c9786842 6849 } else {
229fe47c 6850 if (sdev1) {
6851 scsi_remove_device(sdev1);
6852 scsi_device_put(sdev1);
6853 }
c9786842
YB		 6854 }
6855 }
6856 }
6857 }
7e8a75f4
YB		 6858 }
6859
da0dc9fb 6860 if (instance->aen_cmd != NULL) {
7e8a75f4
YB		 6861 kfree(ev);
6862 return ;
6863 }
6864
94cd65dd 6865 seq_num = le32_to_cpu(instance->evt_detail->seq_num) + 1;
7e8a75f4
YB		 6866
6867 /* Register AEN with FW for latest sequence number plus 1 */
6868 class_locale.members.reserved = 0;
6869 class_locale.members.locale = MR_EVT_LOCALE_ALL;
6870 class_locale.members.class = MR_EVT_CLASS_DEBUG;
6871 mutex_lock(&instance->aen_mutex);
6872 error = megasas_register_aen(instance, seq_num,
6873 class_locale.word);
6874 mutex_unlock(&instance->aen_mutex);
6875
6876 if (error)
1be18254 6877 dev_err(&instance->pdev->dev, "register aen failed error %x\n", error);
7e8a75f4
YB		 6878
6879 kfree(ev);
6880}
6881
c4a3e0a5
BS		 6882/**
6883 * megasas_init - Driver load entry point
6884 */
6885static int __init megasas_init(void)
6886{
6887 int rval;
6888
6889 /*
6890 * Announce driver version and other information
6891 */
d98a6deb 6892 pr_info("megasas: %s\n", MEGASAS_VERSION);
c4a3e0a5 6893
bd8d6dd4
KD		 6894 spin_lock_init(&poll_aen_lock);
6895
72c4fd36 6896 support_poll_for_event = 2;
837f5fe8 6897 support_device_change = 1;
72c4fd36 6898
c4a3e0a5
BS		 6899 memset(&megasas_mgmt_info, 0, sizeof(megasas_mgmt_info));
6900
6901 /*
6902 * Register character device node
6903 */
6904 rval = register_chrdev(0, "megaraid_sas_ioctl", &megasas_mgmt_fops);
6905
6906 if (rval < 0) {
6907 printk(KERN_DEBUG "megasas: failed to open device node\n");
6908 return rval;
6909 }
6910
6911 megasas_mgmt_majorno = rval;
6912
6913 /*
6914 * Register ourselves as PCI hotplug module
6915 */
4041b9cd 6916 rval = pci_register_driver(&megasas_pci_driver);
c4a3e0a5
BS		 6917
6918 if (rval) {
6774def6 6919 printk(KERN_DEBUG "megasas: PCI hotplug registration failed \n");
83aabc1b
JG		 6920 goto err_pcidrv;
6921 }
6922
6923 rval = driver_create_file(&megasas_pci_driver.driver,
6924 &driver_attr_version);
6925 if (rval)
6926 goto err_dcf_attr_ver;
72c4fd36 6927
09fced19
SS		 6928 rval = driver_create_file(&megasas_pci_driver.driver,
6929 &driver_attr_release_date);
6930 if (rval)
6931 goto err_dcf_rel_date;
6932
72c4fd36
YB		 6933 rval = driver_create_file(&megasas_pci_driver.driver,
6934 &driver_attr_support_poll_for_event);
6935 if (rval)
6936 goto err_dcf_support_poll_for_event;
6937
83aabc1b
JG		 6938 rval = driver_create_file(&megasas_pci_driver.driver,
6939 &driver_attr_dbg_lvl);
6940 if (rval)
6941 goto err_dcf_dbg_lvl;
837f5fe8
YB		 6942 rval = driver_create_file(&megasas_pci_driver.driver,
6943 &driver_attr_support_device_change);
6944 if (rval)
6945 goto err_dcf_support_device_change;
6946
c4a3e0a5 6947 return rval;
ad84db2e 6948
837f5fe8 6949err_dcf_support_device_change:
ad84db2e 6950 driver_remove_file(&megasas_pci_driver.driver,
6951 &driver_attr_dbg_lvl);
83aabc1b 6952err_dcf_dbg_lvl:
72c4fd36
YB		 6953 driver_remove_file(&megasas_pci_driver.driver,
6954 &driver_attr_support_poll_for_event);
72c4fd36 6955err_dcf_support_poll_for_event:
09fced19
SS		 6956 driver_remove_file(&megasas_pci_driver.driver,
6957 &driver_attr_release_date);
6958err_dcf_rel_date:
83aabc1b
JG		 6959 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
6960err_dcf_attr_ver:
6961 pci_unregister_driver(&megasas_pci_driver);
6962err_pcidrv:
6963 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
0d49016b 6964 return rval;
c4a3e0a5
BS		 6965}
6966
6967/**
6968 * megasas_exit - Driver unload entry point
6969 */
6970static void __exit megasas_exit(void)
6971{
658dcedb
SP		 6972 driver_remove_file(&megasas_pci_driver.driver,
6973 &driver_attr_dbg_lvl);
837f5fe8
YB		 6974 driver_remove_file(&megasas_pci_driver.driver,
6975 &driver_attr_support_poll_for_event);
6976 driver_remove_file(&megasas_pci_driver.driver,
6977 &driver_attr_support_device_change);
09fced19
SS		 6978 driver_remove_file(&megasas_pci_driver.driver,
6979 &driver_attr_release_date);
83aabc1b 6980 driver_remove_file(&megasas_pci_driver.driver, &driver_attr_version);
c4a3e0a5
BS		 6981
6982 pci_unregister_driver(&megasas_pci_driver);
6983 unregister_chrdev(megasas_mgmt_majorno, "megaraid_sas_ioctl");
6984}
6985
6986module_init(megasas_init);
6987module_exit(megasas_exit);
Linux kernel - Deliverables
This page took 1.26338 seconds and 5 git commands to generate.