Commit | Line | Data |
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8ae12a0d | 1 | /* |
ca632f55 | 2 | * SPI init/core code |
8ae12a0d DB |
3 | * |
4 | * Copyright (C) 2005 David Brownell | |
d57a4282 | 5 | * Copyright (C) 2008 Secret Lab Technologies Ltd. |
8ae12a0d DB |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
8ae12a0d | 22 | #include <linux/kernel.h> |
d57a4282 | 23 | #include <linux/kmod.h> |
8ae12a0d DB |
24 | #include <linux/device.h> |
25 | #include <linux/init.h> | |
26 | #include <linux/cache.h> | |
99adef31 MB |
27 | #include <linux/dma-mapping.h> |
28 | #include <linux/dmaengine.h> | |
94040828 | 29 | #include <linux/mutex.h> |
2b7a32f7 | 30 | #include <linux/of_device.h> |
d57a4282 | 31 | #include <linux/of_irq.h> |
86be408b | 32 | #include <linux/clk/clk-conf.h> |
5a0e3ad6 | 33 | #include <linux/slab.h> |
e0626e38 | 34 | #include <linux/mod_devicetable.h> |
8ae12a0d | 35 | #include <linux/spi/spi.h> |
74317984 | 36 | #include <linux/of_gpio.h> |
3ae22e8c | 37 | #include <linux/pm_runtime.h> |
f48c767c | 38 | #include <linux/pm_domain.h> |
025ed130 | 39 | #include <linux/export.h> |
8bd75c77 | 40 | #include <linux/sched/rt.h> |
ffbbdd21 LW |
41 | #include <linux/delay.h> |
42 | #include <linux/kthread.h> | |
64bee4d2 MW |
43 | #include <linux/ioport.h> |
44 | #include <linux/acpi.h> | |
8ae12a0d | 45 | |
56ec1978 MB |
46 | #define CREATE_TRACE_POINTS |
47 | #include <trace/events/spi.h> | |
48 | ||
8ae12a0d DB |
49 | static void spidev_release(struct device *dev) |
50 | { | |
0ffa0285 | 51 | struct spi_device *spi = to_spi_device(dev); |
8ae12a0d DB |
52 | |
53 | /* spi masters may cleanup for released devices */ | |
54 | if (spi->master->cleanup) | |
55 | spi->master->cleanup(spi); | |
56 | ||
0c868461 | 57 | spi_master_put(spi->master); |
07a389fe | 58 | kfree(spi); |
8ae12a0d DB |
59 | } |
60 | ||
61 | static ssize_t | |
62 | modalias_show(struct device *dev, struct device_attribute *a, char *buf) | |
63 | { | |
64 | const struct spi_device *spi = to_spi_device(dev); | |
8c4ff6d0 ZR |
65 | int len; |
66 | ||
67 | len = acpi_device_modalias(dev, buf, PAGE_SIZE - 1); | |
68 | if (len != -ENODEV) | |
69 | return len; | |
8ae12a0d | 70 | |
d8e328b3 | 71 | return sprintf(buf, "%s%s\n", SPI_MODULE_PREFIX, spi->modalias); |
8ae12a0d | 72 | } |
aa7da564 | 73 | static DEVICE_ATTR_RO(modalias); |
8ae12a0d | 74 | |
aa7da564 GKH |
75 | static struct attribute *spi_dev_attrs[] = { |
76 | &dev_attr_modalias.attr, | |
77 | NULL, | |
8ae12a0d | 78 | }; |
aa7da564 | 79 | ATTRIBUTE_GROUPS(spi_dev); |
8ae12a0d DB |
80 | |
81 | /* modalias support makes "modprobe $MODALIAS" new-style hotplug work, | |
82 | * and the sysfs version makes coldplug work too. | |
83 | */ | |
84 | ||
75368bf6 AV |
85 | static const struct spi_device_id *spi_match_id(const struct spi_device_id *id, |
86 | const struct spi_device *sdev) | |
87 | { | |
88 | while (id->name[0]) { | |
89 | if (!strcmp(sdev->modalias, id->name)) | |
90 | return id; | |
91 | id++; | |
92 | } | |
93 | return NULL; | |
94 | } | |
95 | ||
96 | const struct spi_device_id *spi_get_device_id(const struct spi_device *sdev) | |
97 | { | |
98 | const struct spi_driver *sdrv = to_spi_driver(sdev->dev.driver); | |
99 | ||
100 | return spi_match_id(sdrv->id_table, sdev); | |
101 | } | |
102 | EXPORT_SYMBOL_GPL(spi_get_device_id); | |
103 | ||
8ae12a0d DB |
104 | static int spi_match_device(struct device *dev, struct device_driver *drv) |
105 | { | |
106 | const struct spi_device *spi = to_spi_device(dev); | |
75368bf6 AV |
107 | const struct spi_driver *sdrv = to_spi_driver(drv); |
108 | ||
2b7a32f7 SA |
109 | /* Attempt an OF style match */ |
110 | if (of_driver_match_device(dev, drv)) | |
111 | return 1; | |
112 | ||
64bee4d2 MW |
113 | /* Then try ACPI */ |
114 | if (acpi_driver_match_device(dev, drv)) | |
115 | return 1; | |
116 | ||
75368bf6 AV |
117 | if (sdrv->id_table) |
118 | return !!spi_match_id(sdrv->id_table, spi); | |
8ae12a0d | 119 | |
35f74fca | 120 | return strcmp(spi->modalias, drv->name) == 0; |
8ae12a0d DB |
121 | } |
122 | ||
7eff2e7a | 123 | static int spi_uevent(struct device *dev, struct kobj_uevent_env *env) |
8ae12a0d DB |
124 | { |
125 | const struct spi_device *spi = to_spi_device(dev); | |
8c4ff6d0 ZR |
126 | int rc; |
127 | ||
128 | rc = acpi_device_uevent_modalias(dev, env); | |
129 | if (rc != -ENODEV) | |
130 | return rc; | |
8ae12a0d | 131 | |
e0626e38 | 132 | add_uevent_var(env, "MODALIAS=%s%s", SPI_MODULE_PREFIX, spi->modalias); |
8ae12a0d DB |
133 | return 0; |
134 | } | |
135 | ||
3ae22e8c MB |
136 | #ifdef CONFIG_PM_SLEEP |
137 | static int spi_legacy_suspend(struct device *dev, pm_message_t message) | |
8ae12a0d | 138 | { |
3c72426f | 139 | int value = 0; |
b885244e | 140 | struct spi_driver *drv = to_spi_driver(dev->driver); |
8ae12a0d | 141 | |
8ae12a0d | 142 | /* suspend will stop irqs and dma; no more i/o */ |
3c72426f DB |
143 | if (drv) { |
144 | if (drv->suspend) | |
145 | value = drv->suspend(to_spi_device(dev), message); | |
146 | else | |
147 | dev_dbg(dev, "... can't suspend\n"); | |
148 | } | |
8ae12a0d DB |
149 | return value; |
150 | } | |
151 | ||
3ae22e8c | 152 | static int spi_legacy_resume(struct device *dev) |
8ae12a0d | 153 | { |
3c72426f | 154 | int value = 0; |
b885244e | 155 | struct spi_driver *drv = to_spi_driver(dev->driver); |
8ae12a0d | 156 | |
8ae12a0d | 157 | /* resume may restart the i/o queue */ |
3c72426f DB |
158 | if (drv) { |
159 | if (drv->resume) | |
160 | value = drv->resume(to_spi_device(dev)); | |
161 | else | |
162 | dev_dbg(dev, "... can't resume\n"); | |
163 | } | |
8ae12a0d DB |
164 | return value; |
165 | } | |
166 | ||
3ae22e8c MB |
167 | static int spi_pm_suspend(struct device *dev) |
168 | { | |
169 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | |
170 | ||
171 | if (pm) | |
172 | return pm_generic_suspend(dev); | |
173 | else | |
174 | return spi_legacy_suspend(dev, PMSG_SUSPEND); | |
175 | } | |
176 | ||
177 | static int spi_pm_resume(struct device *dev) | |
178 | { | |
179 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | |
180 | ||
181 | if (pm) | |
182 | return pm_generic_resume(dev); | |
183 | else | |
184 | return spi_legacy_resume(dev); | |
185 | } | |
186 | ||
187 | static int spi_pm_freeze(struct device *dev) | |
188 | { | |
189 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | |
190 | ||
191 | if (pm) | |
192 | return pm_generic_freeze(dev); | |
193 | else | |
194 | return spi_legacy_suspend(dev, PMSG_FREEZE); | |
195 | } | |
196 | ||
197 | static int spi_pm_thaw(struct device *dev) | |
198 | { | |
199 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | |
200 | ||
201 | if (pm) | |
202 | return pm_generic_thaw(dev); | |
203 | else | |
204 | return spi_legacy_resume(dev); | |
205 | } | |
206 | ||
207 | static int spi_pm_poweroff(struct device *dev) | |
208 | { | |
209 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | |
210 | ||
211 | if (pm) | |
212 | return pm_generic_poweroff(dev); | |
213 | else | |
214 | return spi_legacy_suspend(dev, PMSG_HIBERNATE); | |
215 | } | |
216 | ||
217 | static int spi_pm_restore(struct device *dev) | |
218 | { | |
219 | const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; | |
220 | ||
221 | if (pm) | |
222 | return pm_generic_restore(dev); | |
223 | else | |
224 | return spi_legacy_resume(dev); | |
225 | } | |
8ae12a0d | 226 | #else |
3ae22e8c MB |
227 | #define spi_pm_suspend NULL |
228 | #define spi_pm_resume NULL | |
229 | #define spi_pm_freeze NULL | |
230 | #define spi_pm_thaw NULL | |
231 | #define spi_pm_poweroff NULL | |
232 | #define spi_pm_restore NULL | |
8ae12a0d DB |
233 | #endif |
234 | ||
3ae22e8c MB |
235 | static const struct dev_pm_ops spi_pm = { |
236 | .suspend = spi_pm_suspend, | |
237 | .resume = spi_pm_resume, | |
238 | .freeze = spi_pm_freeze, | |
239 | .thaw = spi_pm_thaw, | |
240 | .poweroff = spi_pm_poweroff, | |
241 | .restore = spi_pm_restore, | |
242 | SET_RUNTIME_PM_OPS( | |
243 | pm_generic_runtime_suspend, | |
244 | pm_generic_runtime_resume, | |
45f0a85c | 245 | NULL |
3ae22e8c MB |
246 | ) |
247 | }; | |
248 | ||
8ae12a0d DB |
249 | struct bus_type spi_bus_type = { |
250 | .name = "spi", | |
aa7da564 | 251 | .dev_groups = spi_dev_groups, |
8ae12a0d DB |
252 | .match = spi_match_device, |
253 | .uevent = spi_uevent, | |
3ae22e8c | 254 | .pm = &spi_pm, |
8ae12a0d DB |
255 | }; |
256 | EXPORT_SYMBOL_GPL(spi_bus_type); | |
257 | ||
b885244e DB |
258 | |
259 | static int spi_drv_probe(struct device *dev) | |
260 | { | |
261 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | |
33cf00e5 MW |
262 | int ret; |
263 | ||
86be408b SN |
264 | ret = of_clk_set_defaults(dev->of_node, false); |
265 | if (ret) | |
266 | return ret; | |
267 | ||
676e7c25 UH |
268 | ret = dev_pm_domain_attach(dev, true); |
269 | if (ret != -EPROBE_DEFER) { | |
270 | ret = sdrv->probe(to_spi_device(dev)); | |
271 | if (ret) | |
272 | dev_pm_domain_detach(dev, true); | |
273 | } | |
b885244e | 274 | |
33cf00e5 | 275 | return ret; |
b885244e DB |
276 | } |
277 | ||
278 | static int spi_drv_remove(struct device *dev) | |
279 | { | |
280 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | |
33cf00e5 MW |
281 | int ret; |
282 | ||
aec35f4e | 283 | ret = sdrv->remove(to_spi_device(dev)); |
676e7c25 | 284 | dev_pm_domain_detach(dev, true); |
b885244e | 285 | |
33cf00e5 | 286 | return ret; |
b885244e DB |
287 | } |
288 | ||
289 | static void spi_drv_shutdown(struct device *dev) | |
290 | { | |
291 | const struct spi_driver *sdrv = to_spi_driver(dev->driver); | |
292 | ||
293 | sdrv->shutdown(to_spi_device(dev)); | |
294 | } | |
295 | ||
33e34dc6 DB |
296 | /** |
297 | * spi_register_driver - register a SPI driver | |
298 | * @sdrv: the driver to register | |
299 | * Context: can sleep | |
300 | */ | |
b885244e DB |
301 | int spi_register_driver(struct spi_driver *sdrv) |
302 | { | |
303 | sdrv->driver.bus = &spi_bus_type; | |
304 | if (sdrv->probe) | |
305 | sdrv->driver.probe = spi_drv_probe; | |
306 | if (sdrv->remove) | |
307 | sdrv->driver.remove = spi_drv_remove; | |
308 | if (sdrv->shutdown) | |
309 | sdrv->driver.shutdown = spi_drv_shutdown; | |
310 | return driver_register(&sdrv->driver); | |
311 | } | |
312 | EXPORT_SYMBOL_GPL(spi_register_driver); | |
313 | ||
8ae12a0d DB |
314 | /*-------------------------------------------------------------------------*/ |
315 | ||
316 | /* SPI devices should normally not be created by SPI device drivers; that | |
317 | * would make them board-specific. Similarly with SPI master drivers. | |
318 | * Device registration normally goes into like arch/.../mach.../board-YYY.c | |
319 | * with other readonly (flashable) information about mainboard devices. | |
320 | */ | |
321 | ||
322 | struct boardinfo { | |
323 | struct list_head list; | |
2b9603a0 | 324 | struct spi_board_info board_info; |
8ae12a0d DB |
325 | }; |
326 | ||
327 | static LIST_HEAD(board_list); | |
2b9603a0 FT |
328 | static LIST_HEAD(spi_master_list); |
329 | ||
330 | /* | |
331 | * Used to protect add/del opertion for board_info list and | |
332 | * spi_master list, and their matching process | |
333 | */ | |
94040828 | 334 | static DEFINE_MUTEX(board_lock); |
8ae12a0d | 335 | |
dc87c98e GL |
336 | /** |
337 | * spi_alloc_device - Allocate a new SPI device | |
338 | * @master: Controller to which device is connected | |
339 | * Context: can sleep | |
340 | * | |
341 | * Allows a driver to allocate and initialize a spi_device without | |
342 | * registering it immediately. This allows a driver to directly | |
343 | * fill the spi_device with device parameters before calling | |
344 | * spi_add_device() on it. | |
345 | * | |
346 | * Caller is responsible to call spi_add_device() on the returned | |
347 | * spi_device structure to add it to the SPI master. If the caller | |
348 | * needs to discard the spi_device without adding it, then it should | |
349 | * call spi_dev_put() on it. | |
350 | * | |
351 | * Returns a pointer to the new device, or NULL. | |
352 | */ | |
353 | struct spi_device *spi_alloc_device(struct spi_master *master) | |
354 | { | |
355 | struct spi_device *spi; | |
dc87c98e GL |
356 | |
357 | if (!spi_master_get(master)) | |
358 | return NULL; | |
359 | ||
5fe5f05e | 360 | spi = kzalloc(sizeof(*spi), GFP_KERNEL); |
dc87c98e | 361 | if (!spi) { |
dc87c98e GL |
362 | spi_master_put(master); |
363 | return NULL; | |
364 | } | |
365 | ||
366 | spi->master = master; | |
178db7d3 | 367 | spi->dev.parent = &master->dev; |
dc87c98e GL |
368 | spi->dev.bus = &spi_bus_type; |
369 | spi->dev.release = spidev_release; | |
446411e1 | 370 | spi->cs_gpio = -ENOENT; |
dc87c98e GL |
371 | device_initialize(&spi->dev); |
372 | return spi; | |
373 | } | |
374 | EXPORT_SYMBOL_GPL(spi_alloc_device); | |
375 | ||
e13ac47b JN |
376 | static void spi_dev_set_name(struct spi_device *spi) |
377 | { | |
378 | struct acpi_device *adev = ACPI_COMPANION(&spi->dev); | |
379 | ||
380 | if (adev) { | |
381 | dev_set_name(&spi->dev, "spi-%s", acpi_dev_name(adev)); | |
382 | return; | |
383 | } | |
384 | ||
385 | dev_set_name(&spi->dev, "%s.%u", dev_name(&spi->master->dev), | |
386 | spi->chip_select); | |
387 | } | |
388 | ||
b6fb8d3a MW |
389 | static int spi_dev_check(struct device *dev, void *data) |
390 | { | |
391 | struct spi_device *spi = to_spi_device(dev); | |
392 | struct spi_device *new_spi = data; | |
393 | ||
394 | if (spi->master == new_spi->master && | |
395 | spi->chip_select == new_spi->chip_select) | |
396 | return -EBUSY; | |
397 | return 0; | |
398 | } | |
399 | ||
dc87c98e GL |
400 | /** |
401 | * spi_add_device - Add spi_device allocated with spi_alloc_device | |
402 | * @spi: spi_device to register | |
403 | * | |
404 | * Companion function to spi_alloc_device. Devices allocated with | |
405 | * spi_alloc_device can be added onto the spi bus with this function. | |
406 | * | |
e48880e0 | 407 | * Returns 0 on success; negative errno on failure |
dc87c98e GL |
408 | */ |
409 | int spi_add_device(struct spi_device *spi) | |
410 | { | |
e48880e0 | 411 | static DEFINE_MUTEX(spi_add_lock); |
74317984 JCPV |
412 | struct spi_master *master = spi->master; |
413 | struct device *dev = master->dev.parent; | |
dc87c98e GL |
414 | int status; |
415 | ||
416 | /* Chipselects are numbered 0..max; validate. */ | |
74317984 | 417 | if (spi->chip_select >= master->num_chipselect) { |
dc87c98e GL |
418 | dev_err(dev, "cs%d >= max %d\n", |
419 | spi->chip_select, | |
74317984 | 420 | master->num_chipselect); |
dc87c98e GL |
421 | return -EINVAL; |
422 | } | |
423 | ||
424 | /* Set the bus ID string */ | |
e13ac47b | 425 | spi_dev_set_name(spi); |
e48880e0 DB |
426 | |
427 | /* We need to make sure there's no other device with this | |
428 | * chipselect **BEFORE** we call setup(), else we'll trash | |
429 | * its configuration. Lock against concurrent add() calls. | |
430 | */ | |
431 | mutex_lock(&spi_add_lock); | |
432 | ||
b6fb8d3a MW |
433 | status = bus_for_each_dev(&spi_bus_type, NULL, spi, spi_dev_check); |
434 | if (status) { | |
e48880e0 DB |
435 | dev_err(dev, "chipselect %d already in use\n", |
436 | spi->chip_select); | |
e48880e0 DB |
437 | goto done; |
438 | } | |
439 | ||
74317984 JCPV |
440 | if (master->cs_gpios) |
441 | spi->cs_gpio = master->cs_gpios[spi->chip_select]; | |
442 | ||
e48880e0 DB |
443 | /* Drivers may modify this initial i/o setup, but will |
444 | * normally rely on the device being setup. Devices | |
445 | * using SPI_CS_HIGH can't coexist well otherwise... | |
446 | */ | |
7d077197 | 447 | status = spi_setup(spi); |
dc87c98e | 448 | if (status < 0) { |
eb288a1f LW |
449 | dev_err(dev, "can't setup %s, status %d\n", |
450 | dev_name(&spi->dev), status); | |
e48880e0 | 451 | goto done; |
dc87c98e GL |
452 | } |
453 | ||
e48880e0 | 454 | /* Device may be bound to an active driver when this returns */ |
dc87c98e | 455 | status = device_add(&spi->dev); |
e48880e0 | 456 | if (status < 0) |
eb288a1f LW |
457 | dev_err(dev, "can't add %s, status %d\n", |
458 | dev_name(&spi->dev), status); | |
e48880e0 | 459 | else |
35f74fca | 460 | dev_dbg(dev, "registered child %s\n", dev_name(&spi->dev)); |
dc87c98e | 461 | |
e48880e0 DB |
462 | done: |
463 | mutex_unlock(&spi_add_lock); | |
464 | return status; | |
dc87c98e GL |
465 | } |
466 | EXPORT_SYMBOL_GPL(spi_add_device); | |
8ae12a0d | 467 | |
33e34dc6 DB |
468 | /** |
469 | * spi_new_device - instantiate one new SPI device | |
470 | * @master: Controller to which device is connected | |
471 | * @chip: Describes the SPI device | |
472 | * Context: can sleep | |
473 | * | |
474 | * On typical mainboards, this is purely internal; and it's not needed | |
8ae12a0d DB |
475 | * after board init creates the hard-wired devices. Some development |
476 | * platforms may not be able to use spi_register_board_info though, and | |
477 | * this is exported so that for example a USB or parport based adapter | |
478 | * driver could add devices (which it would learn about out-of-band). | |
082c8cb4 DB |
479 | * |
480 | * Returns the new device, or NULL. | |
8ae12a0d | 481 | */ |
e9d5a461 AB |
482 | struct spi_device *spi_new_device(struct spi_master *master, |
483 | struct spi_board_info *chip) | |
8ae12a0d DB |
484 | { |
485 | struct spi_device *proxy; | |
8ae12a0d DB |
486 | int status; |
487 | ||
082c8cb4 DB |
488 | /* NOTE: caller did any chip->bus_num checks necessary. |
489 | * | |
490 | * Also, unless we change the return value convention to use | |
491 | * error-or-pointer (not NULL-or-pointer), troubleshootability | |
492 | * suggests syslogged diagnostics are best here (ugh). | |
493 | */ | |
494 | ||
dc87c98e GL |
495 | proxy = spi_alloc_device(master); |
496 | if (!proxy) | |
8ae12a0d DB |
497 | return NULL; |
498 | ||
102eb975 GL |
499 | WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias)); |
500 | ||
8ae12a0d DB |
501 | proxy->chip_select = chip->chip_select; |
502 | proxy->max_speed_hz = chip->max_speed_hz; | |
980a01c9 | 503 | proxy->mode = chip->mode; |
8ae12a0d | 504 | proxy->irq = chip->irq; |
102eb975 | 505 | strlcpy(proxy->modalias, chip->modalias, sizeof(proxy->modalias)); |
8ae12a0d DB |
506 | proxy->dev.platform_data = (void *) chip->platform_data; |
507 | proxy->controller_data = chip->controller_data; | |
508 | proxy->controller_state = NULL; | |
8ae12a0d | 509 | |
dc87c98e | 510 | status = spi_add_device(proxy); |
8ae12a0d | 511 | if (status < 0) { |
dc87c98e GL |
512 | spi_dev_put(proxy); |
513 | return NULL; | |
8ae12a0d DB |
514 | } |
515 | ||
8ae12a0d DB |
516 | return proxy; |
517 | } | |
518 | EXPORT_SYMBOL_GPL(spi_new_device); | |
519 | ||
2b9603a0 FT |
520 | static void spi_match_master_to_boardinfo(struct spi_master *master, |
521 | struct spi_board_info *bi) | |
522 | { | |
523 | struct spi_device *dev; | |
524 | ||
525 | if (master->bus_num != bi->bus_num) | |
526 | return; | |
527 | ||
528 | dev = spi_new_device(master, bi); | |
529 | if (!dev) | |
530 | dev_err(master->dev.parent, "can't create new device for %s\n", | |
531 | bi->modalias); | |
532 | } | |
533 | ||
33e34dc6 DB |
534 | /** |
535 | * spi_register_board_info - register SPI devices for a given board | |
536 | * @info: array of chip descriptors | |
537 | * @n: how many descriptors are provided | |
538 | * Context: can sleep | |
539 | * | |
8ae12a0d DB |
540 | * Board-specific early init code calls this (probably during arch_initcall) |
541 | * with segments of the SPI device table. Any device nodes are created later, | |
542 | * after the relevant parent SPI controller (bus_num) is defined. We keep | |
543 | * this table of devices forever, so that reloading a controller driver will | |
544 | * not make Linux forget about these hard-wired devices. | |
545 | * | |
546 | * Other code can also call this, e.g. a particular add-on board might provide | |
547 | * SPI devices through its expansion connector, so code initializing that board | |
548 | * would naturally declare its SPI devices. | |
549 | * | |
550 | * The board info passed can safely be __initdata ... but be careful of | |
551 | * any embedded pointers (platform_data, etc), they're copied as-is. | |
552 | */ | |
fd4a319b | 553 | int spi_register_board_info(struct spi_board_info const *info, unsigned n) |
8ae12a0d | 554 | { |
2b9603a0 FT |
555 | struct boardinfo *bi; |
556 | int i; | |
8ae12a0d | 557 | |
c7908a37 XL |
558 | if (!n) |
559 | return -EINVAL; | |
560 | ||
2b9603a0 | 561 | bi = kzalloc(n * sizeof(*bi), GFP_KERNEL); |
8ae12a0d DB |
562 | if (!bi) |
563 | return -ENOMEM; | |
8ae12a0d | 564 | |
2b9603a0 FT |
565 | for (i = 0; i < n; i++, bi++, info++) { |
566 | struct spi_master *master; | |
8ae12a0d | 567 | |
2b9603a0 FT |
568 | memcpy(&bi->board_info, info, sizeof(*info)); |
569 | mutex_lock(&board_lock); | |
570 | list_add_tail(&bi->list, &board_list); | |
571 | list_for_each_entry(master, &spi_master_list, list) | |
572 | spi_match_master_to_boardinfo(master, &bi->board_info); | |
573 | mutex_unlock(&board_lock); | |
8ae12a0d | 574 | } |
2b9603a0 FT |
575 | |
576 | return 0; | |
8ae12a0d DB |
577 | } |
578 | ||
579 | /*-------------------------------------------------------------------------*/ | |
580 | ||
b158935f MB |
581 | static void spi_set_cs(struct spi_device *spi, bool enable) |
582 | { | |
583 | if (spi->mode & SPI_CS_HIGH) | |
584 | enable = !enable; | |
585 | ||
586 | if (spi->cs_gpio >= 0) | |
587 | gpio_set_value(spi->cs_gpio, !enable); | |
588 | else if (spi->master->set_cs) | |
589 | spi->master->set_cs(spi, !enable); | |
590 | } | |
591 | ||
2de440f5 | 592 | #ifdef CONFIG_HAS_DMA |
6ad45a27 MB |
593 | static int spi_map_buf(struct spi_master *master, struct device *dev, |
594 | struct sg_table *sgt, void *buf, size_t len, | |
595 | enum dma_data_direction dir) | |
596 | { | |
597 | const bool vmalloced_buf = is_vmalloc_addr(buf); | |
598 | const int desc_len = vmalloced_buf ? PAGE_SIZE : master->max_dma_len; | |
599 | const int sgs = DIV_ROUND_UP(len, desc_len); | |
600 | struct page *vm_page; | |
601 | void *sg_buf; | |
602 | size_t min; | |
603 | int i, ret; | |
604 | ||
605 | ret = sg_alloc_table(sgt, sgs, GFP_KERNEL); | |
606 | if (ret != 0) | |
607 | return ret; | |
608 | ||
609 | for (i = 0; i < sgs; i++) { | |
610 | min = min_t(size_t, len, desc_len); | |
611 | ||
612 | if (vmalloced_buf) { | |
613 | vm_page = vmalloc_to_page(buf); | |
614 | if (!vm_page) { | |
615 | sg_free_table(sgt); | |
616 | return -ENOMEM; | |
617 | } | |
c1aefbdd CK |
618 | sg_set_page(&sgt->sgl[i], vm_page, |
619 | min, offset_in_page(buf)); | |
6ad45a27 MB |
620 | } else { |
621 | sg_buf = buf; | |
c1aefbdd | 622 | sg_set_buf(&sgt->sgl[i], sg_buf, min); |
6ad45a27 MB |
623 | } |
624 | ||
6ad45a27 MB |
625 | |
626 | buf += min; | |
627 | len -= min; | |
628 | } | |
629 | ||
630 | ret = dma_map_sg(dev, sgt->sgl, sgt->nents, dir); | |
89e4b66a GU |
631 | if (!ret) |
632 | ret = -ENOMEM; | |
6ad45a27 MB |
633 | if (ret < 0) { |
634 | sg_free_table(sgt); | |
635 | return ret; | |
636 | } | |
637 | ||
638 | sgt->nents = ret; | |
639 | ||
640 | return 0; | |
641 | } | |
642 | ||
643 | static void spi_unmap_buf(struct spi_master *master, struct device *dev, | |
644 | struct sg_table *sgt, enum dma_data_direction dir) | |
645 | { | |
646 | if (sgt->orig_nents) { | |
647 | dma_unmap_sg(dev, sgt->sgl, sgt->orig_nents, dir); | |
648 | sg_free_table(sgt); | |
649 | } | |
650 | } | |
651 | ||
2de440f5 | 652 | static int __spi_map_msg(struct spi_master *master, struct spi_message *msg) |
99adef31 | 653 | { |
99adef31 MB |
654 | struct device *tx_dev, *rx_dev; |
655 | struct spi_transfer *xfer; | |
6ad45a27 | 656 | int ret; |
3a2eba9b | 657 | |
6ad45a27 | 658 | if (!master->can_dma) |
99adef31 MB |
659 | return 0; |
660 | ||
3fc25421 GU |
661 | tx_dev = master->dma_tx->device->dev; |
662 | rx_dev = master->dma_rx->device->dev; | |
99adef31 MB |
663 | |
664 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
665 | if (!master->can_dma(master, msg->spi, xfer)) | |
666 | continue; | |
667 | ||
668 | if (xfer->tx_buf != NULL) { | |
6ad45a27 MB |
669 | ret = spi_map_buf(master, tx_dev, &xfer->tx_sg, |
670 | (void *)xfer->tx_buf, xfer->len, | |
671 | DMA_TO_DEVICE); | |
672 | if (ret != 0) | |
673 | return ret; | |
99adef31 MB |
674 | } |
675 | ||
676 | if (xfer->rx_buf != NULL) { | |
6ad45a27 MB |
677 | ret = spi_map_buf(master, rx_dev, &xfer->rx_sg, |
678 | xfer->rx_buf, xfer->len, | |
679 | DMA_FROM_DEVICE); | |
680 | if (ret != 0) { | |
681 | spi_unmap_buf(master, tx_dev, &xfer->tx_sg, | |
682 | DMA_TO_DEVICE); | |
683 | return ret; | |
99adef31 MB |
684 | } |
685 | } | |
686 | } | |
687 | ||
688 | master->cur_msg_mapped = true; | |
689 | ||
690 | return 0; | |
691 | } | |
692 | ||
693 | static int spi_unmap_msg(struct spi_master *master, struct spi_message *msg) | |
694 | { | |
695 | struct spi_transfer *xfer; | |
696 | struct device *tx_dev, *rx_dev; | |
697 | ||
6ad45a27 | 698 | if (!master->cur_msg_mapped || !master->can_dma) |
99adef31 MB |
699 | return 0; |
700 | ||
3fc25421 GU |
701 | tx_dev = master->dma_tx->device->dev; |
702 | rx_dev = master->dma_rx->device->dev; | |
99adef31 MB |
703 | |
704 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
705 | if (!master->can_dma(master, msg->spi, xfer)) | |
706 | continue; | |
707 | ||
6ad45a27 MB |
708 | spi_unmap_buf(master, rx_dev, &xfer->rx_sg, DMA_FROM_DEVICE); |
709 | spi_unmap_buf(master, tx_dev, &xfer->tx_sg, DMA_TO_DEVICE); | |
99adef31 MB |
710 | } |
711 | ||
712 | return 0; | |
713 | } | |
2de440f5 GU |
714 | #else /* !CONFIG_HAS_DMA */ |
715 | static inline int __spi_map_msg(struct spi_master *master, | |
716 | struct spi_message *msg) | |
717 | { | |
718 | return 0; | |
719 | } | |
720 | ||
721 | static inline int spi_unmap_msg(struct spi_master *master, | |
722 | struct spi_message *msg) | |
723 | { | |
724 | return 0; | |
725 | } | |
726 | #endif /* !CONFIG_HAS_DMA */ | |
727 | ||
728 | static int spi_map_msg(struct spi_master *master, struct spi_message *msg) | |
729 | { | |
730 | struct spi_transfer *xfer; | |
731 | void *tmp; | |
732 | unsigned int max_tx, max_rx; | |
733 | ||
734 | if (master->flags & (SPI_MASTER_MUST_RX | SPI_MASTER_MUST_TX)) { | |
735 | max_tx = 0; | |
736 | max_rx = 0; | |
737 | ||
738 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
739 | if ((master->flags & SPI_MASTER_MUST_TX) && | |
740 | !xfer->tx_buf) | |
741 | max_tx = max(xfer->len, max_tx); | |
742 | if ((master->flags & SPI_MASTER_MUST_RX) && | |
743 | !xfer->rx_buf) | |
744 | max_rx = max(xfer->len, max_rx); | |
745 | } | |
746 | ||
747 | if (max_tx) { | |
748 | tmp = krealloc(master->dummy_tx, max_tx, | |
749 | GFP_KERNEL | GFP_DMA); | |
750 | if (!tmp) | |
751 | return -ENOMEM; | |
752 | master->dummy_tx = tmp; | |
753 | memset(tmp, 0, max_tx); | |
754 | } | |
755 | ||
756 | if (max_rx) { | |
757 | tmp = krealloc(master->dummy_rx, max_rx, | |
758 | GFP_KERNEL | GFP_DMA); | |
759 | if (!tmp) | |
760 | return -ENOMEM; | |
761 | master->dummy_rx = tmp; | |
762 | } | |
763 | ||
764 | if (max_tx || max_rx) { | |
765 | list_for_each_entry(xfer, &msg->transfers, | |
766 | transfer_list) { | |
767 | if (!xfer->tx_buf) | |
768 | xfer->tx_buf = master->dummy_tx; | |
769 | if (!xfer->rx_buf) | |
770 | xfer->rx_buf = master->dummy_rx; | |
771 | } | |
772 | } | |
773 | } | |
774 | ||
775 | return __spi_map_msg(master, msg); | |
776 | } | |
99adef31 | 777 | |
b158935f MB |
778 | /* |
779 | * spi_transfer_one_message - Default implementation of transfer_one_message() | |
780 | * | |
781 | * This is a standard implementation of transfer_one_message() for | |
782 | * drivers which impelment a transfer_one() operation. It provides | |
783 | * standard handling of delays and chip select management. | |
784 | */ | |
785 | static int spi_transfer_one_message(struct spi_master *master, | |
786 | struct spi_message *msg) | |
787 | { | |
788 | struct spi_transfer *xfer; | |
b158935f MB |
789 | bool keep_cs = false; |
790 | int ret = 0; | |
16a0ce4e | 791 | int ms = 1; |
b158935f MB |
792 | |
793 | spi_set_cs(msg->spi, true); | |
794 | ||
795 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | |
796 | trace_spi_transfer_start(msg, xfer); | |
797 | ||
38ec10f6 MB |
798 | if (xfer->tx_buf || xfer->rx_buf) { |
799 | reinit_completion(&master->xfer_completion); | |
b158935f | 800 | |
38ec10f6 MB |
801 | ret = master->transfer_one(master, msg->spi, xfer); |
802 | if (ret < 0) { | |
803 | dev_err(&msg->spi->dev, | |
804 | "SPI transfer failed: %d\n", ret); | |
805 | goto out; | |
806 | } | |
b158935f | 807 | |
38ec10f6 MB |
808 | if (ret > 0) { |
809 | ret = 0; | |
810 | ms = xfer->len * 8 * 1000 / xfer->speed_hz; | |
811 | ms += ms + 100; /* some tolerance */ | |
16a0ce4e | 812 | |
38ec10f6 MB |
813 | ms = wait_for_completion_timeout(&master->xfer_completion, |
814 | msecs_to_jiffies(ms)); | |
815 | } | |
16a0ce4e | 816 | |
38ec10f6 MB |
817 | if (ms == 0) { |
818 | dev_err(&msg->spi->dev, | |
819 | "SPI transfer timed out\n"); | |
820 | msg->status = -ETIMEDOUT; | |
821 | } | |
822 | } else { | |
823 | if (xfer->len) | |
824 | dev_err(&msg->spi->dev, | |
825 | "Bufferless transfer has length %u\n", | |
826 | xfer->len); | |
13a42798 | 827 | } |
b158935f MB |
828 | |
829 | trace_spi_transfer_stop(msg, xfer); | |
830 | ||
831 | if (msg->status != -EINPROGRESS) | |
832 | goto out; | |
833 | ||
834 | if (xfer->delay_usecs) | |
835 | udelay(xfer->delay_usecs); | |
836 | ||
837 | if (xfer->cs_change) { | |
838 | if (list_is_last(&xfer->transfer_list, | |
839 | &msg->transfers)) { | |
840 | keep_cs = true; | |
841 | } else { | |
0b73aa63 MB |
842 | spi_set_cs(msg->spi, false); |
843 | udelay(10); | |
844 | spi_set_cs(msg->spi, true); | |
b158935f MB |
845 | } |
846 | } | |
847 | ||
848 | msg->actual_length += xfer->len; | |
849 | } | |
850 | ||
851 | out: | |
852 | if (ret != 0 || !keep_cs) | |
853 | spi_set_cs(msg->spi, false); | |
854 | ||
855 | if (msg->status == -EINPROGRESS) | |
856 | msg->status = ret; | |
857 | ||
858 | spi_finalize_current_message(master); | |
859 | ||
860 | return ret; | |
861 | } | |
862 | ||
863 | /** | |
864 | * spi_finalize_current_transfer - report completion of a transfer | |
2c675689 | 865 | * @master: the master reporting completion |
b158935f MB |
866 | * |
867 | * Called by SPI drivers using the core transfer_one_message() | |
868 | * implementation to notify it that the current interrupt driven | |
9e8f4882 | 869 | * transfer has finished and the next one may be scheduled. |
b158935f MB |
870 | */ |
871 | void spi_finalize_current_transfer(struct spi_master *master) | |
872 | { | |
873 | complete(&master->xfer_completion); | |
874 | } | |
875 | EXPORT_SYMBOL_GPL(spi_finalize_current_transfer); | |
876 | ||
ffbbdd21 LW |
877 | /** |
878 | * spi_pump_messages - kthread work function which processes spi message queue | |
879 | * @work: pointer to kthread work struct contained in the master struct | |
880 | * | |
881 | * This function checks if there is any spi message in the queue that | |
882 | * needs processing and if so call out to the driver to initialize hardware | |
883 | * and transfer each message. | |
884 | * | |
885 | */ | |
886 | static void spi_pump_messages(struct kthread_work *work) | |
887 | { | |
888 | struct spi_master *master = | |
889 | container_of(work, struct spi_master, pump_messages); | |
890 | unsigned long flags; | |
891 | bool was_busy = false; | |
892 | int ret; | |
893 | ||
894 | /* Lock queue and check for queue work */ | |
895 | spin_lock_irqsave(&master->queue_lock, flags); | |
896 | if (list_empty(&master->queue) || !master->running) { | |
b0b36b86 BF |
897 | if (!master->busy) { |
898 | spin_unlock_irqrestore(&master->queue_lock, flags); | |
899 | return; | |
ffbbdd21 LW |
900 | } |
901 | master->busy = false; | |
902 | spin_unlock_irqrestore(&master->queue_lock, flags); | |
3a2eba9b MB |
903 | kfree(master->dummy_rx); |
904 | master->dummy_rx = NULL; | |
905 | kfree(master->dummy_tx); | |
906 | master->dummy_tx = NULL; | |
b0b36b86 BF |
907 | if (master->unprepare_transfer_hardware && |
908 | master->unprepare_transfer_hardware(master)) | |
909 | dev_err(&master->dev, | |
910 | "failed to unprepare transfer hardware\n"); | |
49834de2 MB |
911 | if (master->auto_runtime_pm) { |
912 | pm_runtime_mark_last_busy(master->dev.parent); | |
913 | pm_runtime_put_autosuspend(master->dev.parent); | |
914 | } | |
56ec1978 | 915 | trace_spi_master_idle(master); |
ffbbdd21 LW |
916 | return; |
917 | } | |
918 | ||
919 | /* Make sure we are not already running a message */ | |
920 | if (master->cur_msg) { | |
921 | spin_unlock_irqrestore(&master->queue_lock, flags); | |
922 | return; | |
923 | } | |
924 | /* Extract head of queue */ | |
925 | master->cur_msg = | |
a89e2d27 | 926 | list_first_entry(&master->queue, struct spi_message, queue); |
ffbbdd21 LW |
927 | |
928 | list_del_init(&master->cur_msg->queue); | |
929 | if (master->busy) | |
930 | was_busy = true; | |
931 | else | |
932 | master->busy = true; | |
933 | spin_unlock_irqrestore(&master->queue_lock, flags); | |
934 | ||
49834de2 MB |
935 | if (!was_busy && master->auto_runtime_pm) { |
936 | ret = pm_runtime_get_sync(master->dev.parent); | |
937 | if (ret < 0) { | |
938 | dev_err(&master->dev, "Failed to power device: %d\n", | |
939 | ret); | |
940 | return; | |
941 | } | |
942 | } | |
943 | ||
56ec1978 MB |
944 | if (!was_busy) |
945 | trace_spi_master_busy(master); | |
946 | ||
7dfd2bd7 | 947 | if (!was_busy && master->prepare_transfer_hardware) { |
ffbbdd21 LW |
948 | ret = master->prepare_transfer_hardware(master); |
949 | if (ret) { | |
950 | dev_err(&master->dev, | |
951 | "failed to prepare transfer hardware\n"); | |
49834de2 MB |
952 | |
953 | if (master->auto_runtime_pm) | |
954 | pm_runtime_put(master->dev.parent); | |
ffbbdd21 LW |
955 | return; |
956 | } | |
957 | } | |
958 | ||
56ec1978 MB |
959 | trace_spi_message_start(master->cur_msg); |
960 | ||
2841a5fc MB |
961 | if (master->prepare_message) { |
962 | ret = master->prepare_message(master, master->cur_msg); | |
963 | if (ret) { | |
964 | dev_err(&master->dev, | |
965 | "failed to prepare message: %d\n", ret); | |
966 | master->cur_msg->status = ret; | |
967 | spi_finalize_current_message(master); | |
968 | return; | |
969 | } | |
970 | master->cur_msg_prepared = true; | |
971 | } | |
972 | ||
99adef31 MB |
973 | ret = spi_map_msg(master, master->cur_msg); |
974 | if (ret) { | |
975 | master->cur_msg->status = ret; | |
976 | spi_finalize_current_message(master); | |
977 | return; | |
978 | } | |
979 | ||
ffbbdd21 LW |
980 | ret = master->transfer_one_message(master, master->cur_msg); |
981 | if (ret) { | |
982 | dev_err(&master->dev, | |
1f802f82 | 983 | "failed to transfer one message from queue\n"); |
ffbbdd21 LW |
984 | return; |
985 | } | |
986 | } | |
987 | ||
988 | static int spi_init_queue(struct spi_master *master) | |
989 | { | |
990 | struct sched_param param = { .sched_priority = MAX_RT_PRIO - 1 }; | |
991 | ||
992 | INIT_LIST_HEAD(&master->queue); | |
993 | spin_lock_init(&master->queue_lock); | |
994 | ||
995 | master->running = false; | |
996 | master->busy = false; | |
997 | ||
998 | init_kthread_worker(&master->kworker); | |
999 | master->kworker_task = kthread_run(kthread_worker_fn, | |
f170168b | 1000 | &master->kworker, "%s", |
ffbbdd21 LW |
1001 | dev_name(&master->dev)); |
1002 | if (IS_ERR(master->kworker_task)) { | |
1003 | dev_err(&master->dev, "failed to create message pump task\n"); | |
98a8f5a0 | 1004 | return PTR_ERR(master->kworker_task); |
ffbbdd21 LW |
1005 | } |
1006 | init_kthread_work(&master->pump_messages, spi_pump_messages); | |
1007 | ||
1008 | /* | |
1009 | * Master config will indicate if this controller should run the | |
1010 | * message pump with high (realtime) priority to reduce the transfer | |
1011 | * latency on the bus by minimising the delay between a transfer | |
1012 | * request and the scheduling of the message pump thread. Without this | |
1013 | * setting the message pump thread will remain at default priority. | |
1014 | */ | |
1015 | if (master->rt) { | |
1016 | dev_info(&master->dev, | |
1017 | "will run message pump with realtime priority\n"); | |
1018 | sched_setscheduler(master->kworker_task, SCHED_FIFO, ¶m); | |
1019 | } | |
1020 | ||
1021 | return 0; | |
1022 | } | |
1023 | ||
1024 | /** | |
1025 | * spi_get_next_queued_message() - called by driver to check for queued | |
1026 | * messages | |
1027 | * @master: the master to check for queued messages | |
1028 | * | |
1029 | * If there are more messages in the queue, the next message is returned from | |
1030 | * this call. | |
1031 | */ | |
1032 | struct spi_message *spi_get_next_queued_message(struct spi_master *master) | |
1033 | { | |
1034 | struct spi_message *next; | |
1035 | unsigned long flags; | |
1036 | ||
1037 | /* get a pointer to the next message, if any */ | |
1038 | spin_lock_irqsave(&master->queue_lock, flags); | |
1cfd97f9 AL |
1039 | next = list_first_entry_or_null(&master->queue, struct spi_message, |
1040 | queue); | |
ffbbdd21 LW |
1041 | spin_unlock_irqrestore(&master->queue_lock, flags); |
1042 | ||
1043 | return next; | |
1044 | } | |
1045 | EXPORT_SYMBOL_GPL(spi_get_next_queued_message); | |
1046 | ||
1047 | /** | |
1048 | * spi_finalize_current_message() - the current message is complete | |
1049 | * @master: the master to return the message to | |
1050 | * | |
1051 | * Called by the driver to notify the core that the message in the front of the | |
1052 | * queue is complete and can be removed from the queue. | |
1053 | */ | |
1054 | void spi_finalize_current_message(struct spi_master *master) | |
1055 | { | |
1056 | struct spi_message *mesg; | |
1057 | unsigned long flags; | |
2841a5fc | 1058 | int ret; |
ffbbdd21 LW |
1059 | |
1060 | spin_lock_irqsave(&master->queue_lock, flags); | |
1061 | mesg = master->cur_msg; | |
1062 | master->cur_msg = NULL; | |
1063 | ||
1064 | queue_kthread_work(&master->kworker, &master->pump_messages); | |
1065 | spin_unlock_irqrestore(&master->queue_lock, flags); | |
1066 | ||
99adef31 MB |
1067 | spi_unmap_msg(master, mesg); |
1068 | ||
2841a5fc MB |
1069 | if (master->cur_msg_prepared && master->unprepare_message) { |
1070 | ret = master->unprepare_message(master, mesg); | |
1071 | if (ret) { | |
1072 | dev_err(&master->dev, | |
1073 | "failed to unprepare message: %d\n", ret); | |
1074 | } | |
1075 | } | |
1076 | master->cur_msg_prepared = false; | |
1077 | ||
ffbbdd21 LW |
1078 | mesg->state = NULL; |
1079 | if (mesg->complete) | |
1080 | mesg->complete(mesg->context); | |
56ec1978 MB |
1081 | |
1082 | trace_spi_message_done(mesg); | |
ffbbdd21 LW |
1083 | } |
1084 | EXPORT_SYMBOL_GPL(spi_finalize_current_message); | |
1085 | ||
1086 | static int spi_start_queue(struct spi_master *master) | |
1087 | { | |
1088 | unsigned long flags; | |
1089 | ||
1090 | spin_lock_irqsave(&master->queue_lock, flags); | |
1091 | ||
1092 | if (master->running || master->busy) { | |
1093 | spin_unlock_irqrestore(&master->queue_lock, flags); | |
1094 | return -EBUSY; | |
1095 | } | |
1096 | ||
1097 | master->running = true; | |
1098 | master->cur_msg = NULL; | |
1099 | spin_unlock_irqrestore(&master->queue_lock, flags); | |
1100 | ||
1101 | queue_kthread_work(&master->kworker, &master->pump_messages); | |
1102 | ||
1103 | return 0; | |
1104 | } | |
1105 | ||
1106 | static int spi_stop_queue(struct spi_master *master) | |
1107 | { | |
1108 | unsigned long flags; | |
1109 | unsigned limit = 500; | |
1110 | int ret = 0; | |
1111 | ||
1112 | spin_lock_irqsave(&master->queue_lock, flags); | |
1113 | ||
1114 | /* | |
1115 | * This is a bit lame, but is optimized for the common execution path. | |
1116 | * A wait_queue on the master->busy could be used, but then the common | |
1117 | * execution path (pump_messages) would be required to call wake_up or | |
1118 | * friends on every SPI message. Do this instead. | |
1119 | */ | |
1120 | while ((!list_empty(&master->queue) || master->busy) && limit--) { | |
1121 | spin_unlock_irqrestore(&master->queue_lock, flags); | |
f97b26b0 | 1122 | usleep_range(10000, 11000); |
ffbbdd21 LW |
1123 | spin_lock_irqsave(&master->queue_lock, flags); |
1124 | } | |
1125 | ||
1126 | if (!list_empty(&master->queue) || master->busy) | |
1127 | ret = -EBUSY; | |
1128 | else | |
1129 | master->running = false; | |
1130 | ||
1131 | spin_unlock_irqrestore(&master->queue_lock, flags); | |
1132 | ||
1133 | if (ret) { | |
1134 | dev_warn(&master->dev, | |
1135 | "could not stop message queue\n"); | |
1136 | return ret; | |
1137 | } | |
1138 | return ret; | |
1139 | } | |
1140 | ||
1141 | static int spi_destroy_queue(struct spi_master *master) | |
1142 | { | |
1143 | int ret; | |
1144 | ||
1145 | ret = spi_stop_queue(master); | |
1146 | ||
1147 | /* | |
1148 | * flush_kthread_worker will block until all work is done. | |
1149 | * If the reason that stop_queue timed out is that the work will never | |
1150 | * finish, then it does no good to call flush/stop thread, so | |
1151 | * return anyway. | |
1152 | */ | |
1153 | if (ret) { | |
1154 | dev_err(&master->dev, "problem destroying queue\n"); | |
1155 | return ret; | |
1156 | } | |
1157 | ||
1158 | flush_kthread_worker(&master->kworker); | |
1159 | kthread_stop(master->kworker_task); | |
1160 | ||
1161 | return 0; | |
1162 | } | |
1163 | ||
1164 | /** | |
1165 | * spi_queued_transfer - transfer function for queued transfers | |
1166 | * @spi: spi device which is requesting transfer | |
1167 | * @msg: spi message which is to handled is queued to driver queue | |
1168 | */ | |
1169 | static int spi_queued_transfer(struct spi_device *spi, struct spi_message *msg) | |
1170 | { | |
1171 | struct spi_master *master = spi->master; | |
1172 | unsigned long flags; | |
1173 | ||
1174 | spin_lock_irqsave(&master->queue_lock, flags); | |
1175 | ||
1176 | if (!master->running) { | |
1177 | spin_unlock_irqrestore(&master->queue_lock, flags); | |
1178 | return -ESHUTDOWN; | |
1179 | } | |
1180 | msg->actual_length = 0; | |
1181 | msg->status = -EINPROGRESS; | |
1182 | ||
1183 | list_add_tail(&msg->queue, &master->queue); | |
96b3eace | 1184 | if (!master->busy) |
ffbbdd21 LW |
1185 | queue_kthread_work(&master->kworker, &master->pump_messages); |
1186 | ||
1187 | spin_unlock_irqrestore(&master->queue_lock, flags); | |
1188 | return 0; | |
1189 | } | |
1190 | ||
1191 | static int spi_master_initialize_queue(struct spi_master *master) | |
1192 | { | |
1193 | int ret; | |
1194 | ||
ffbbdd21 | 1195 | master->transfer = spi_queued_transfer; |
b158935f MB |
1196 | if (!master->transfer_one_message) |
1197 | master->transfer_one_message = spi_transfer_one_message; | |
ffbbdd21 LW |
1198 | |
1199 | /* Initialize and start queue */ | |
1200 | ret = spi_init_queue(master); | |
1201 | if (ret) { | |
1202 | dev_err(&master->dev, "problem initializing queue\n"); | |
1203 | goto err_init_queue; | |
1204 | } | |
c3676d5c | 1205 | master->queued = true; |
ffbbdd21 LW |
1206 | ret = spi_start_queue(master); |
1207 | if (ret) { | |
1208 | dev_err(&master->dev, "problem starting queue\n"); | |
1209 | goto err_start_queue; | |
1210 | } | |
1211 | ||
1212 | return 0; | |
1213 | ||
1214 | err_start_queue: | |
ffbbdd21 | 1215 | spi_destroy_queue(master); |
c3676d5c | 1216 | err_init_queue: |
ffbbdd21 LW |
1217 | return ret; |
1218 | } | |
1219 | ||
1220 | /*-------------------------------------------------------------------------*/ | |
1221 | ||
7cb94361 | 1222 | #if defined(CONFIG_OF) |
d57a4282 GL |
1223 | /** |
1224 | * of_register_spi_devices() - Register child devices onto the SPI bus | |
1225 | * @master: Pointer to spi_master device | |
1226 | * | |
1227 | * Registers an spi_device for each child node of master node which has a 'reg' | |
1228 | * property. | |
1229 | */ | |
1230 | static void of_register_spi_devices(struct spi_master *master) | |
1231 | { | |
1232 | struct spi_device *spi; | |
1233 | struct device_node *nc; | |
d57a4282 | 1234 | int rc; |
89da4293 | 1235 | u32 value; |
d57a4282 GL |
1236 | |
1237 | if (!master->dev.of_node) | |
1238 | return; | |
1239 | ||
f3b6159e | 1240 | for_each_available_child_of_node(master->dev.of_node, nc) { |
d57a4282 GL |
1241 | /* Alloc an spi_device */ |
1242 | spi = spi_alloc_device(master); | |
1243 | if (!spi) { | |
1244 | dev_err(&master->dev, "spi_device alloc error for %s\n", | |
1245 | nc->full_name); | |
1246 | spi_dev_put(spi); | |
1247 | continue; | |
1248 | } | |
1249 | ||
1250 | /* Select device driver */ | |
1251 | if (of_modalias_node(nc, spi->modalias, | |
1252 | sizeof(spi->modalias)) < 0) { | |
1253 | dev_err(&master->dev, "cannot find modalias for %s\n", | |
1254 | nc->full_name); | |
1255 | spi_dev_put(spi); | |
1256 | continue; | |
1257 | } | |
1258 | ||
1259 | /* Device address */ | |
89da4293 TP |
1260 | rc = of_property_read_u32(nc, "reg", &value); |
1261 | if (rc) { | |
1262 | dev_err(&master->dev, "%s has no valid 'reg' property (%d)\n", | |
1263 | nc->full_name, rc); | |
d57a4282 GL |
1264 | spi_dev_put(spi); |
1265 | continue; | |
1266 | } | |
89da4293 | 1267 | spi->chip_select = value; |
d57a4282 GL |
1268 | |
1269 | /* Mode (clock phase/polarity/etc.) */ | |
1270 | if (of_find_property(nc, "spi-cpha", NULL)) | |
1271 | spi->mode |= SPI_CPHA; | |
1272 | if (of_find_property(nc, "spi-cpol", NULL)) | |
1273 | spi->mode |= SPI_CPOL; | |
1274 | if (of_find_property(nc, "spi-cs-high", NULL)) | |
1275 | spi->mode |= SPI_CS_HIGH; | |
c20151df LPC |
1276 | if (of_find_property(nc, "spi-3wire", NULL)) |
1277 | spi->mode |= SPI_3WIRE; | |
cd6339e6 ZQ |
1278 | if (of_find_property(nc, "spi-lsb-first", NULL)) |
1279 | spi->mode |= SPI_LSB_FIRST; | |
d57a4282 | 1280 | |
f477b7fb | 1281 | /* Device DUAL/QUAD mode */ |
89da4293 TP |
1282 | if (!of_property_read_u32(nc, "spi-tx-bus-width", &value)) { |
1283 | switch (value) { | |
1284 | case 1: | |
a822e99c | 1285 | break; |
89da4293 | 1286 | case 2: |
a822e99c MB |
1287 | spi->mode |= SPI_TX_DUAL; |
1288 | break; | |
89da4293 | 1289 | case 4: |
a822e99c MB |
1290 | spi->mode |= SPI_TX_QUAD; |
1291 | break; | |
1292 | default: | |
80874d8c GU |
1293 | dev_warn(&master->dev, |
1294 | "spi-tx-bus-width %d not supported\n", | |
1295 | value); | |
1296 | break; | |
a822e99c | 1297 | } |
f477b7fb | 1298 | } |
1299 | ||
89da4293 TP |
1300 | if (!of_property_read_u32(nc, "spi-rx-bus-width", &value)) { |
1301 | switch (value) { | |
1302 | case 1: | |
a822e99c | 1303 | break; |
89da4293 | 1304 | case 2: |
a822e99c MB |
1305 | spi->mode |= SPI_RX_DUAL; |
1306 | break; | |
89da4293 | 1307 | case 4: |
a822e99c MB |
1308 | spi->mode |= SPI_RX_QUAD; |
1309 | break; | |
1310 | default: | |
80874d8c GU |
1311 | dev_warn(&master->dev, |
1312 | "spi-rx-bus-width %d not supported\n", | |
1313 | value); | |
1314 | break; | |
a822e99c | 1315 | } |
f477b7fb | 1316 | } |
1317 | ||
d57a4282 | 1318 | /* Device speed */ |
89da4293 TP |
1319 | rc = of_property_read_u32(nc, "spi-max-frequency", &value); |
1320 | if (rc) { | |
1321 | dev_err(&master->dev, "%s has no valid 'spi-max-frequency' property (%d)\n", | |
1322 | nc->full_name, rc); | |
d57a4282 GL |
1323 | spi_dev_put(spi); |
1324 | continue; | |
1325 | } | |
89da4293 | 1326 | spi->max_speed_hz = value; |
d57a4282 GL |
1327 | |
1328 | /* IRQ */ | |
1329 | spi->irq = irq_of_parse_and_map(nc, 0); | |
1330 | ||
1331 | /* Store a pointer to the node in the device structure */ | |
1332 | of_node_get(nc); | |
1333 | spi->dev.of_node = nc; | |
1334 | ||
1335 | /* Register the new device */ | |
70fac17c | 1336 | request_module("%s%s", SPI_MODULE_PREFIX, spi->modalias); |
d57a4282 GL |
1337 | rc = spi_add_device(spi); |
1338 | if (rc) { | |
1339 | dev_err(&master->dev, "spi_device register error %s\n", | |
1340 | nc->full_name); | |
1341 | spi_dev_put(spi); | |
1342 | } | |
1343 | ||
1344 | } | |
1345 | } | |
1346 | #else | |
1347 | static void of_register_spi_devices(struct spi_master *master) { } | |
1348 | #endif | |
1349 | ||
64bee4d2 MW |
1350 | #ifdef CONFIG_ACPI |
1351 | static int acpi_spi_add_resource(struct acpi_resource *ares, void *data) | |
1352 | { | |
1353 | struct spi_device *spi = data; | |
1354 | ||
1355 | if (ares->type == ACPI_RESOURCE_TYPE_SERIAL_BUS) { | |
1356 | struct acpi_resource_spi_serialbus *sb; | |
1357 | ||
1358 | sb = &ares->data.spi_serial_bus; | |
1359 | if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_SPI) { | |
1360 | spi->chip_select = sb->device_selection; | |
1361 | spi->max_speed_hz = sb->connection_speed; | |
1362 | ||
1363 | if (sb->clock_phase == ACPI_SPI_SECOND_PHASE) | |
1364 | spi->mode |= SPI_CPHA; | |
1365 | if (sb->clock_polarity == ACPI_SPI_START_HIGH) | |
1366 | spi->mode |= SPI_CPOL; | |
1367 | if (sb->device_polarity == ACPI_SPI_ACTIVE_HIGH) | |
1368 | spi->mode |= SPI_CS_HIGH; | |
1369 | } | |
1370 | } else if (spi->irq < 0) { | |
1371 | struct resource r; | |
1372 | ||
1373 | if (acpi_dev_resource_interrupt(ares, 0, &r)) | |
1374 | spi->irq = r.start; | |
1375 | } | |
1376 | ||
1377 | /* Always tell the ACPI core to skip this resource */ | |
1378 | return 1; | |
1379 | } | |
1380 | ||
1381 | static acpi_status acpi_spi_add_device(acpi_handle handle, u32 level, | |
1382 | void *data, void **return_value) | |
1383 | { | |
1384 | struct spi_master *master = data; | |
1385 | struct list_head resource_list; | |
1386 | struct acpi_device *adev; | |
1387 | struct spi_device *spi; | |
1388 | int ret; | |
1389 | ||
1390 | if (acpi_bus_get_device(handle, &adev)) | |
1391 | return AE_OK; | |
1392 | if (acpi_bus_get_status(adev) || !adev->status.present) | |
1393 | return AE_OK; | |
1394 | ||
1395 | spi = spi_alloc_device(master); | |
1396 | if (!spi) { | |
1397 | dev_err(&master->dev, "failed to allocate SPI device for %s\n", | |
1398 | dev_name(&adev->dev)); | |
1399 | return AE_NO_MEMORY; | |
1400 | } | |
1401 | ||
7b199811 | 1402 | ACPI_COMPANION_SET(&spi->dev, adev); |
64bee4d2 MW |
1403 | spi->irq = -1; |
1404 | ||
1405 | INIT_LIST_HEAD(&resource_list); | |
1406 | ret = acpi_dev_get_resources(adev, &resource_list, | |
1407 | acpi_spi_add_resource, spi); | |
1408 | acpi_dev_free_resource_list(&resource_list); | |
1409 | ||
1410 | if (ret < 0 || !spi->max_speed_hz) { | |
1411 | spi_dev_put(spi); | |
1412 | return AE_OK; | |
1413 | } | |
1414 | ||
33cf00e5 | 1415 | adev->power.flags.ignore_parent = true; |
cf9eb39c | 1416 | strlcpy(spi->modalias, acpi_device_hid(adev), sizeof(spi->modalias)); |
64bee4d2 | 1417 | if (spi_add_device(spi)) { |
33cf00e5 | 1418 | adev->power.flags.ignore_parent = false; |
64bee4d2 MW |
1419 | dev_err(&master->dev, "failed to add SPI device %s from ACPI\n", |
1420 | dev_name(&adev->dev)); | |
1421 | spi_dev_put(spi); | |
1422 | } | |
1423 | ||
1424 | return AE_OK; | |
1425 | } | |
1426 | ||
1427 | static void acpi_register_spi_devices(struct spi_master *master) | |
1428 | { | |
1429 | acpi_status status; | |
1430 | acpi_handle handle; | |
1431 | ||
29896178 | 1432 | handle = ACPI_HANDLE(master->dev.parent); |
64bee4d2 MW |
1433 | if (!handle) |
1434 | return; | |
1435 | ||
1436 | status = acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, 1, | |
1437 | acpi_spi_add_device, NULL, | |
1438 | master, NULL); | |
1439 | if (ACPI_FAILURE(status)) | |
1440 | dev_warn(&master->dev, "failed to enumerate SPI slaves\n"); | |
1441 | } | |
1442 | #else | |
1443 | static inline void acpi_register_spi_devices(struct spi_master *master) {} | |
1444 | #endif /* CONFIG_ACPI */ | |
1445 | ||
49dce689 | 1446 | static void spi_master_release(struct device *dev) |
8ae12a0d DB |
1447 | { |
1448 | struct spi_master *master; | |
1449 | ||
49dce689 | 1450 | master = container_of(dev, struct spi_master, dev); |
8ae12a0d DB |
1451 | kfree(master); |
1452 | } | |
1453 | ||
1454 | static struct class spi_master_class = { | |
1455 | .name = "spi_master", | |
1456 | .owner = THIS_MODULE, | |
49dce689 | 1457 | .dev_release = spi_master_release, |
8ae12a0d DB |
1458 | }; |
1459 | ||
1460 | ||
ffbbdd21 | 1461 | |
8ae12a0d DB |
1462 | /** |
1463 | * spi_alloc_master - allocate SPI master controller | |
1464 | * @dev: the controller, possibly using the platform_bus | |
33e34dc6 | 1465 | * @size: how much zeroed driver-private data to allocate; the pointer to this |
49dce689 | 1466 | * memory is in the driver_data field of the returned device, |
0c868461 | 1467 | * accessible with spi_master_get_devdata(). |
33e34dc6 | 1468 | * Context: can sleep |
8ae12a0d DB |
1469 | * |
1470 | * This call is used only by SPI master controller drivers, which are the | |
1471 | * only ones directly touching chip registers. It's how they allocate | |
ba1a0513 | 1472 | * an spi_master structure, prior to calling spi_register_master(). |
8ae12a0d DB |
1473 | * |
1474 | * This must be called from context that can sleep. It returns the SPI | |
1475 | * master structure on success, else NULL. | |
1476 | * | |
1477 | * The caller is responsible for assigning the bus number and initializing | |
ba1a0513 | 1478 | * the master's methods before calling spi_register_master(); and (after errors |
eb4af0f5 UKK |
1479 | * adding the device) calling spi_master_put() and kfree() to prevent a memory |
1480 | * leak. | |
8ae12a0d | 1481 | */ |
e9d5a461 | 1482 | struct spi_master *spi_alloc_master(struct device *dev, unsigned size) |
8ae12a0d DB |
1483 | { |
1484 | struct spi_master *master; | |
1485 | ||
0c868461 DB |
1486 | if (!dev) |
1487 | return NULL; | |
1488 | ||
5fe5f05e | 1489 | master = kzalloc(size + sizeof(*master), GFP_KERNEL); |
8ae12a0d DB |
1490 | if (!master) |
1491 | return NULL; | |
1492 | ||
49dce689 | 1493 | device_initialize(&master->dev); |
1e8a52e1 GL |
1494 | master->bus_num = -1; |
1495 | master->num_chipselect = 1; | |
49dce689 TJ |
1496 | master->dev.class = &spi_master_class; |
1497 | master->dev.parent = get_device(dev); | |
0c868461 | 1498 | spi_master_set_devdata(master, &master[1]); |
8ae12a0d DB |
1499 | |
1500 | return master; | |
1501 | } | |
1502 | EXPORT_SYMBOL_GPL(spi_alloc_master); | |
1503 | ||
74317984 JCPV |
1504 | #ifdef CONFIG_OF |
1505 | static int of_spi_register_master(struct spi_master *master) | |
1506 | { | |
e80beb27 | 1507 | int nb, i, *cs; |
74317984 JCPV |
1508 | struct device_node *np = master->dev.of_node; |
1509 | ||
1510 | if (!np) | |
1511 | return 0; | |
1512 | ||
1513 | nb = of_gpio_named_count(np, "cs-gpios"); | |
5fe5f05e | 1514 | master->num_chipselect = max_t(int, nb, master->num_chipselect); |
74317984 | 1515 | |
8ec5d84e AL |
1516 | /* Return error only for an incorrectly formed cs-gpios property */ |
1517 | if (nb == 0 || nb == -ENOENT) | |
74317984 | 1518 | return 0; |
8ec5d84e AL |
1519 | else if (nb < 0) |
1520 | return nb; | |
74317984 JCPV |
1521 | |
1522 | cs = devm_kzalloc(&master->dev, | |
1523 | sizeof(int) * master->num_chipselect, | |
1524 | GFP_KERNEL); | |
1525 | master->cs_gpios = cs; | |
1526 | ||
1527 | if (!master->cs_gpios) | |
1528 | return -ENOMEM; | |
1529 | ||
0da83bb1 | 1530 | for (i = 0; i < master->num_chipselect; i++) |
446411e1 | 1531 | cs[i] = -ENOENT; |
74317984 JCPV |
1532 | |
1533 | for (i = 0; i < nb; i++) | |
1534 | cs[i] = of_get_named_gpio(np, "cs-gpios", i); | |
1535 | ||
1536 | return 0; | |
1537 | } | |
1538 | #else | |
1539 | static int of_spi_register_master(struct spi_master *master) | |
1540 | { | |
1541 | return 0; | |
1542 | } | |
1543 | #endif | |
1544 | ||
8ae12a0d DB |
1545 | /** |
1546 | * spi_register_master - register SPI master controller | |
1547 | * @master: initialized master, originally from spi_alloc_master() | |
33e34dc6 | 1548 | * Context: can sleep |
8ae12a0d DB |
1549 | * |
1550 | * SPI master controllers connect to their drivers using some non-SPI bus, | |
1551 | * such as the platform bus. The final stage of probe() in that code | |
1552 | * includes calling spi_register_master() to hook up to this SPI bus glue. | |
1553 | * | |
1554 | * SPI controllers use board specific (often SOC specific) bus numbers, | |
1555 | * and board-specific addressing for SPI devices combines those numbers | |
1556 | * with chip select numbers. Since SPI does not directly support dynamic | |
1557 | * device identification, boards need configuration tables telling which | |
1558 | * chip is at which address. | |
1559 | * | |
1560 | * This must be called from context that can sleep. It returns zero on | |
1561 | * success, else a negative error code (dropping the master's refcount). | |
0c868461 DB |
1562 | * After a successful return, the caller is responsible for calling |
1563 | * spi_unregister_master(). | |
8ae12a0d | 1564 | */ |
e9d5a461 | 1565 | int spi_register_master(struct spi_master *master) |
8ae12a0d | 1566 | { |
e44a45ae | 1567 | static atomic_t dyn_bus_id = ATOMIC_INIT((1<<15) - 1); |
49dce689 | 1568 | struct device *dev = master->dev.parent; |
2b9603a0 | 1569 | struct boardinfo *bi; |
8ae12a0d DB |
1570 | int status = -ENODEV; |
1571 | int dynamic = 0; | |
1572 | ||
0c868461 DB |
1573 | if (!dev) |
1574 | return -ENODEV; | |
1575 | ||
74317984 JCPV |
1576 | status = of_spi_register_master(master); |
1577 | if (status) | |
1578 | return status; | |
1579 | ||
082c8cb4 DB |
1580 | /* even if it's just one always-selected device, there must |
1581 | * be at least one chipselect | |
1582 | */ | |
1583 | if (master->num_chipselect == 0) | |
1584 | return -EINVAL; | |
1585 | ||
bb29785e GL |
1586 | if ((master->bus_num < 0) && master->dev.of_node) |
1587 | master->bus_num = of_alias_get_id(master->dev.of_node, "spi"); | |
1588 | ||
8ae12a0d | 1589 | /* convention: dynamically assigned bus IDs count down from the max */ |
a020ed75 | 1590 | if (master->bus_num < 0) { |
082c8cb4 DB |
1591 | /* FIXME switch to an IDR based scheme, something like |
1592 | * I2C now uses, so we can't run out of "dynamic" IDs | |
1593 | */ | |
8ae12a0d | 1594 | master->bus_num = atomic_dec_return(&dyn_bus_id); |
b885244e | 1595 | dynamic = 1; |
8ae12a0d DB |
1596 | } |
1597 | ||
cf32b71e ES |
1598 | spin_lock_init(&master->bus_lock_spinlock); |
1599 | mutex_init(&master->bus_lock_mutex); | |
1600 | master->bus_lock_flag = 0; | |
b158935f | 1601 | init_completion(&master->xfer_completion); |
6ad45a27 MB |
1602 | if (!master->max_dma_len) |
1603 | master->max_dma_len = INT_MAX; | |
cf32b71e | 1604 | |
8ae12a0d DB |
1605 | /* register the device, then userspace will see it. |
1606 | * registration fails if the bus ID is in use. | |
1607 | */ | |
35f74fca | 1608 | dev_set_name(&master->dev, "spi%u", master->bus_num); |
49dce689 | 1609 | status = device_add(&master->dev); |
b885244e | 1610 | if (status < 0) |
8ae12a0d | 1611 | goto done; |
35f74fca | 1612 | dev_dbg(dev, "registered master %s%s\n", dev_name(&master->dev), |
8ae12a0d DB |
1613 | dynamic ? " (dynamic)" : ""); |
1614 | ||
ffbbdd21 LW |
1615 | /* If we're using a queued driver, start the queue */ |
1616 | if (master->transfer) | |
1617 | dev_info(dev, "master is unqueued, this is deprecated\n"); | |
1618 | else { | |
1619 | status = spi_master_initialize_queue(master); | |
1620 | if (status) { | |
e93b0724 | 1621 | device_del(&master->dev); |
ffbbdd21 LW |
1622 | goto done; |
1623 | } | |
1624 | } | |
1625 | ||
2b9603a0 FT |
1626 | mutex_lock(&board_lock); |
1627 | list_add_tail(&master->list, &spi_master_list); | |
1628 | list_for_each_entry(bi, &board_list, list) | |
1629 | spi_match_master_to_boardinfo(master, &bi->board_info); | |
1630 | mutex_unlock(&board_lock); | |
1631 | ||
64bee4d2 | 1632 | /* Register devices from the device tree and ACPI */ |
12b15e83 | 1633 | of_register_spi_devices(master); |
64bee4d2 | 1634 | acpi_register_spi_devices(master); |
8ae12a0d DB |
1635 | done: |
1636 | return status; | |
1637 | } | |
1638 | EXPORT_SYMBOL_GPL(spi_register_master); | |
1639 | ||
666d5b4c MB |
1640 | static void devm_spi_unregister(struct device *dev, void *res) |
1641 | { | |
1642 | spi_unregister_master(*(struct spi_master **)res); | |
1643 | } | |
1644 | ||
1645 | /** | |
1646 | * dev_spi_register_master - register managed SPI master controller | |
1647 | * @dev: device managing SPI master | |
1648 | * @master: initialized master, originally from spi_alloc_master() | |
1649 | * Context: can sleep | |
1650 | * | |
1651 | * Register a SPI device as with spi_register_master() which will | |
1652 | * automatically be unregister | |
1653 | */ | |
1654 | int devm_spi_register_master(struct device *dev, struct spi_master *master) | |
1655 | { | |
1656 | struct spi_master **ptr; | |
1657 | int ret; | |
1658 | ||
1659 | ptr = devres_alloc(devm_spi_unregister, sizeof(*ptr), GFP_KERNEL); | |
1660 | if (!ptr) | |
1661 | return -ENOMEM; | |
1662 | ||
1663 | ret = spi_register_master(master); | |
4b92894e | 1664 | if (!ret) { |
666d5b4c MB |
1665 | *ptr = master; |
1666 | devres_add(dev, ptr); | |
1667 | } else { | |
1668 | devres_free(ptr); | |
1669 | } | |
1670 | ||
1671 | return ret; | |
1672 | } | |
1673 | EXPORT_SYMBOL_GPL(devm_spi_register_master); | |
1674 | ||
34860089 | 1675 | static int __unregister(struct device *dev, void *null) |
8ae12a0d | 1676 | { |
34860089 | 1677 | spi_unregister_device(to_spi_device(dev)); |
8ae12a0d DB |
1678 | return 0; |
1679 | } | |
1680 | ||
1681 | /** | |
1682 | * spi_unregister_master - unregister SPI master controller | |
1683 | * @master: the master being unregistered | |
33e34dc6 | 1684 | * Context: can sleep |
8ae12a0d DB |
1685 | * |
1686 | * This call is used only by SPI master controller drivers, which are the | |
1687 | * only ones directly touching chip registers. | |
1688 | * | |
1689 | * This must be called from context that can sleep. | |
1690 | */ | |
1691 | void spi_unregister_master(struct spi_master *master) | |
1692 | { | |
89fc9a1a JG |
1693 | int dummy; |
1694 | ||
ffbbdd21 LW |
1695 | if (master->queued) { |
1696 | if (spi_destroy_queue(master)) | |
1697 | dev_err(&master->dev, "queue remove failed\n"); | |
1698 | } | |
1699 | ||
2b9603a0 FT |
1700 | mutex_lock(&board_lock); |
1701 | list_del(&master->list); | |
1702 | mutex_unlock(&board_lock); | |
1703 | ||
97dbf37d | 1704 | dummy = device_for_each_child(&master->dev, NULL, __unregister); |
49dce689 | 1705 | device_unregister(&master->dev); |
8ae12a0d DB |
1706 | } |
1707 | EXPORT_SYMBOL_GPL(spi_unregister_master); | |
1708 | ||
ffbbdd21 LW |
1709 | int spi_master_suspend(struct spi_master *master) |
1710 | { | |
1711 | int ret; | |
1712 | ||
1713 | /* Basically no-ops for non-queued masters */ | |
1714 | if (!master->queued) | |
1715 | return 0; | |
1716 | ||
1717 | ret = spi_stop_queue(master); | |
1718 | if (ret) | |
1719 | dev_err(&master->dev, "queue stop failed\n"); | |
1720 | ||
1721 | return ret; | |
1722 | } | |
1723 | EXPORT_SYMBOL_GPL(spi_master_suspend); | |
1724 | ||
1725 | int spi_master_resume(struct spi_master *master) | |
1726 | { | |
1727 | int ret; | |
1728 | ||
1729 | if (!master->queued) | |
1730 | return 0; | |
1731 | ||
1732 | ret = spi_start_queue(master); | |
1733 | if (ret) | |
1734 | dev_err(&master->dev, "queue restart failed\n"); | |
1735 | ||
1736 | return ret; | |
1737 | } | |
1738 | EXPORT_SYMBOL_GPL(spi_master_resume); | |
1739 | ||
9f3b795a | 1740 | static int __spi_master_match(struct device *dev, const void *data) |
5ed2c832 DY |
1741 | { |
1742 | struct spi_master *m; | |
9f3b795a | 1743 | const u16 *bus_num = data; |
5ed2c832 DY |
1744 | |
1745 | m = container_of(dev, struct spi_master, dev); | |
1746 | return m->bus_num == *bus_num; | |
1747 | } | |
1748 | ||
8ae12a0d DB |
1749 | /** |
1750 | * spi_busnum_to_master - look up master associated with bus_num | |
1751 | * @bus_num: the master's bus number | |
33e34dc6 | 1752 | * Context: can sleep |
8ae12a0d DB |
1753 | * |
1754 | * This call may be used with devices that are registered after | |
1755 | * arch init time. It returns a refcounted pointer to the relevant | |
1756 | * spi_master (which the caller must release), or NULL if there is | |
1757 | * no such master registered. | |
1758 | */ | |
1759 | struct spi_master *spi_busnum_to_master(u16 bus_num) | |
1760 | { | |
49dce689 | 1761 | struct device *dev; |
1e9a51dc | 1762 | struct spi_master *master = NULL; |
5ed2c832 | 1763 | |
695794ae | 1764 | dev = class_find_device(&spi_master_class, NULL, &bus_num, |
5ed2c832 DY |
1765 | __spi_master_match); |
1766 | if (dev) | |
1767 | master = container_of(dev, struct spi_master, dev); | |
1768 | /* reference got in class_find_device */ | |
1e9a51dc | 1769 | return master; |
8ae12a0d DB |
1770 | } |
1771 | EXPORT_SYMBOL_GPL(spi_busnum_to_master); | |
1772 | ||
1773 | ||
1774 | /*-------------------------------------------------------------------------*/ | |
1775 | ||
7d077197 DB |
1776 | /* Core methods for SPI master protocol drivers. Some of the |
1777 | * other core methods are currently defined as inline functions. | |
1778 | */ | |
1779 | ||
1780 | /** | |
1781 | * spi_setup - setup SPI mode and clock rate | |
1782 | * @spi: the device whose settings are being modified | |
1783 | * Context: can sleep, and no requests are queued to the device | |
1784 | * | |
1785 | * SPI protocol drivers may need to update the transfer mode if the | |
1786 | * device doesn't work with its default. They may likewise need | |
1787 | * to update clock rates or word sizes from initial values. This function | |
1788 | * changes those settings, and must be called from a context that can sleep. | |
1789 | * Except for SPI_CS_HIGH, which takes effect immediately, the changes take | |
1790 | * effect the next time the device is selected and data is transferred to | |
1791 | * or from it. When this function returns, the spi device is deselected. | |
1792 | * | |
1793 | * Note that this call will fail if the protocol driver specifies an option | |
1794 | * that the underlying controller or its driver does not support. For | |
1795 | * example, not all hardware supports wire transfers using nine bit words, | |
1796 | * LSB-first wire encoding, or active-high chipselects. | |
1797 | */ | |
1798 | int spi_setup(struct spi_device *spi) | |
1799 | { | |
83596fbe | 1800 | unsigned bad_bits, ugly_bits; |
caae070c | 1801 | int status = 0; |
7d077197 | 1802 | |
f477b7fb | 1803 | /* check mode to prevent that DUAL and QUAD set at the same time |
1804 | */ | |
1805 | if (((spi->mode & SPI_TX_DUAL) && (spi->mode & SPI_TX_QUAD)) || | |
1806 | ((spi->mode & SPI_RX_DUAL) && (spi->mode & SPI_RX_QUAD))) { | |
1807 | dev_err(&spi->dev, | |
1808 | "setup: can not select dual and quad at the same time\n"); | |
1809 | return -EINVAL; | |
1810 | } | |
1811 | /* if it is SPI_3WIRE mode, DUAL and QUAD should be forbidden | |
1812 | */ | |
1813 | if ((spi->mode & SPI_3WIRE) && (spi->mode & | |
1814 | (SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD))) | |
1815 | return -EINVAL; | |
e7db06b5 DB |
1816 | /* help drivers fail *cleanly* when they need options |
1817 | * that aren't supported with their current master | |
1818 | */ | |
1819 | bad_bits = spi->mode & ~spi->master->mode_bits; | |
83596fbe GU |
1820 | ugly_bits = bad_bits & |
1821 | (SPI_TX_DUAL | SPI_TX_QUAD | SPI_RX_DUAL | SPI_RX_QUAD); | |
1822 | if (ugly_bits) { | |
1823 | dev_warn(&spi->dev, | |
1824 | "setup: ignoring unsupported mode bits %x\n", | |
1825 | ugly_bits); | |
1826 | spi->mode &= ~ugly_bits; | |
1827 | bad_bits &= ~ugly_bits; | |
1828 | } | |
e7db06b5 | 1829 | if (bad_bits) { |
eb288a1f | 1830 | dev_err(&spi->dev, "setup: unsupported mode bits %x\n", |
e7db06b5 DB |
1831 | bad_bits); |
1832 | return -EINVAL; | |
1833 | } | |
1834 | ||
7d077197 DB |
1835 | if (!spi->bits_per_word) |
1836 | spi->bits_per_word = 8; | |
1837 | ||
052eb2d4 AL |
1838 | if (!spi->max_speed_hz) |
1839 | spi->max_speed_hz = spi->master->max_speed_hz; | |
1840 | ||
caae070c LD |
1841 | if (spi->master->setup) |
1842 | status = spi->master->setup(spi); | |
7d077197 | 1843 | |
5fe5f05e | 1844 | dev_dbg(&spi->dev, "setup mode %d, %s%s%s%s%u bits/w, %u Hz max --> %d\n", |
7d077197 DB |
1845 | (int) (spi->mode & (SPI_CPOL | SPI_CPHA)), |
1846 | (spi->mode & SPI_CS_HIGH) ? "cs_high, " : "", | |
1847 | (spi->mode & SPI_LSB_FIRST) ? "lsb, " : "", | |
1848 | (spi->mode & SPI_3WIRE) ? "3wire, " : "", | |
1849 | (spi->mode & SPI_LOOP) ? "loopback, " : "", | |
1850 | spi->bits_per_word, spi->max_speed_hz, | |
1851 | status); | |
1852 | ||
1853 | return status; | |
1854 | } | |
1855 | EXPORT_SYMBOL_GPL(spi_setup); | |
1856 | ||
90808738 | 1857 | static int __spi_validate(struct spi_device *spi, struct spi_message *message) |
cf32b71e ES |
1858 | { |
1859 | struct spi_master *master = spi->master; | |
e6811d1d | 1860 | struct spi_transfer *xfer; |
6ea31293 | 1861 | int w_size; |
cf32b71e | 1862 | |
24a0013a MB |
1863 | if (list_empty(&message->transfers)) |
1864 | return -EINVAL; | |
24a0013a | 1865 | |
cf32b71e ES |
1866 | /* Half-duplex links include original MicroWire, and ones with |
1867 | * only one data pin like SPI_3WIRE (switches direction) or where | |
1868 | * either MOSI or MISO is missing. They can also be caused by | |
1869 | * software limitations. | |
1870 | */ | |
1871 | if ((master->flags & SPI_MASTER_HALF_DUPLEX) | |
1872 | || (spi->mode & SPI_3WIRE)) { | |
cf32b71e ES |
1873 | unsigned flags = master->flags; |
1874 | ||
1875 | list_for_each_entry(xfer, &message->transfers, transfer_list) { | |
1876 | if (xfer->rx_buf && xfer->tx_buf) | |
1877 | return -EINVAL; | |
1878 | if ((flags & SPI_MASTER_NO_TX) && xfer->tx_buf) | |
1879 | return -EINVAL; | |
1880 | if ((flags & SPI_MASTER_NO_RX) && xfer->rx_buf) | |
1881 | return -EINVAL; | |
1882 | } | |
1883 | } | |
1884 | ||
e6811d1d | 1885 | /** |
059b8ffe LD |
1886 | * Set transfer bits_per_word and max speed as spi device default if |
1887 | * it is not set for this transfer. | |
f477b7fb | 1888 | * Set transfer tx_nbits and rx_nbits as single transfer default |
1889 | * (SPI_NBITS_SINGLE) if it is not set for this transfer. | |
e6811d1d LD |
1890 | */ |
1891 | list_for_each_entry(xfer, &message->transfers, transfer_list) { | |
078726ce | 1892 | message->frame_length += xfer->len; |
e6811d1d LD |
1893 | if (!xfer->bits_per_word) |
1894 | xfer->bits_per_word = spi->bits_per_word; | |
a6f87fad AL |
1895 | |
1896 | if (!xfer->speed_hz) | |
059b8ffe | 1897 | xfer->speed_hz = spi->max_speed_hz; |
a6f87fad AL |
1898 | |
1899 | if (master->max_speed_hz && | |
1900 | xfer->speed_hz > master->max_speed_hz) | |
1901 | xfer->speed_hz = master->max_speed_hz; | |
56ede94a | 1902 | |
543bb255 SW |
1903 | if (master->bits_per_word_mask) { |
1904 | /* Only 32 bits fit in the mask */ | |
1905 | if (xfer->bits_per_word > 32) | |
1906 | return -EINVAL; | |
1907 | if (!(master->bits_per_word_mask & | |
1908 | BIT(xfer->bits_per_word - 1))) | |
1909 | return -EINVAL; | |
1910 | } | |
a2fd4f9f | 1911 | |
4d94bd21 II |
1912 | /* |
1913 | * SPI transfer length should be multiple of SPI word size | |
1914 | * where SPI word size should be power-of-two multiple | |
1915 | */ | |
1916 | if (xfer->bits_per_word <= 8) | |
1917 | w_size = 1; | |
1918 | else if (xfer->bits_per_word <= 16) | |
1919 | w_size = 2; | |
1920 | else | |
1921 | w_size = 4; | |
1922 | ||
4d94bd21 | 1923 | /* No partial transfers accepted */ |
6ea31293 | 1924 | if (xfer->len % w_size) |
4d94bd21 II |
1925 | return -EINVAL; |
1926 | ||
a2fd4f9f MB |
1927 | if (xfer->speed_hz && master->min_speed_hz && |
1928 | xfer->speed_hz < master->min_speed_hz) | |
1929 | return -EINVAL; | |
f477b7fb | 1930 | |
1931 | if (xfer->tx_buf && !xfer->tx_nbits) | |
1932 | xfer->tx_nbits = SPI_NBITS_SINGLE; | |
1933 | if (xfer->rx_buf && !xfer->rx_nbits) | |
1934 | xfer->rx_nbits = SPI_NBITS_SINGLE; | |
1935 | /* check transfer tx/rx_nbits: | |
1afd9989 GU |
1936 | * 1. check the value matches one of single, dual and quad |
1937 | * 2. check tx/rx_nbits match the mode in spi_device | |
f477b7fb | 1938 | */ |
db90a441 SP |
1939 | if (xfer->tx_buf) { |
1940 | if (xfer->tx_nbits != SPI_NBITS_SINGLE && | |
1941 | xfer->tx_nbits != SPI_NBITS_DUAL && | |
1942 | xfer->tx_nbits != SPI_NBITS_QUAD) | |
1943 | return -EINVAL; | |
1944 | if ((xfer->tx_nbits == SPI_NBITS_DUAL) && | |
1945 | !(spi->mode & (SPI_TX_DUAL | SPI_TX_QUAD))) | |
1946 | return -EINVAL; | |
1947 | if ((xfer->tx_nbits == SPI_NBITS_QUAD) && | |
1948 | !(spi->mode & SPI_TX_QUAD)) | |
1949 | return -EINVAL; | |
db90a441 | 1950 | } |
f477b7fb | 1951 | /* check transfer rx_nbits */ |
db90a441 SP |
1952 | if (xfer->rx_buf) { |
1953 | if (xfer->rx_nbits != SPI_NBITS_SINGLE && | |
1954 | xfer->rx_nbits != SPI_NBITS_DUAL && | |
1955 | xfer->rx_nbits != SPI_NBITS_QUAD) | |
1956 | return -EINVAL; | |
1957 | if ((xfer->rx_nbits == SPI_NBITS_DUAL) && | |
1958 | !(spi->mode & (SPI_RX_DUAL | SPI_RX_QUAD))) | |
1959 | return -EINVAL; | |
1960 | if ((xfer->rx_nbits == SPI_NBITS_QUAD) && | |
1961 | !(spi->mode & SPI_RX_QUAD)) | |
1962 | return -EINVAL; | |
db90a441 | 1963 | } |
e6811d1d LD |
1964 | } |
1965 | ||
cf32b71e | 1966 | message->status = -EINPROGRESS; |
90808738 MB |
1967 | |
1968 | return 0; | |
1969 | } | |
1970 | ||
1971 | static int __spi_async(struct spi_device *spi, struct spi_message *message) | |
1972 | { | |
1973 | struct spi_master *master = spi->master; | |
1974 | ||
1975 | message->spi = spi; | |
1976 | ||
1977 | trace_spi_message_submit(message); | |
1978 | ||
cf32b71e ES |
1979 | return master->transfer(spi, message); |
1980 | } | |
1981 | ||
568d0697 DB |
1982 | /** |
1983 | * spi_async - asynchronous SPI transfer | |
1984 | * @spi: device with which data will be exchanged | |
1985 | * @message: describes the data transfers, including completion callback | |
1986 | * Context: any (irqs may be blocked, etc) | |
1987 | * | |
1988 | * This call may be used in_irq and other contexts which can't sleep, | |
1989 | * as well as from task contexts which can sleep. | |
1990 | * | |
1991 | * The completion callback is invoked in a context which can't sleep. | |
1992 | * Before that invocation, the value of message->status is undefined. | |
1993 | * When the callback is issued, message->status holds either zero (to | |
1994 | * indicate complete success) or a negative error code. After that | |
1995 | * callback returns, the driver which issued the transfer request may | |
1996 | * deallocate the associated memory; it's no longer in use by any SPI | |
1997 | * core or controller driver code. | |
1998 | * | |
1999 | * Note that although all messages to a spi_device are handled in | |
2000 | * FIFO order, messages may go to different devices in other orders. | |
2001 | * Some device might be higher priority, or have various "hard" access | |
2002 | * time requirements, for example. | |
2003 | * | |
2004 | * On detection of any fault during the transfer, processing of | |
2005 | * the entire message is aborted, and the device is deselected. | |
2006 | * Until returning from the associated message completion callback, | |
2007 | * no other spi_message queued to that device will be processed. | |
2008 | * (This rule applies equally to all the synchronous transfer calls, | |
2009 | * which are wrappers around this core asynchronous primitive.) | |
2010 | */ | |
2011 | int spi_async(struct spi_device *spi, struct spi_message *message) | |
2012 | { | |
2013 | struct spi_master *master = spi->master; | |
cf32b71e ES |
2014 | int ret; |
2015 | unsigned long flags; | |
568d0697 | 2016 | |
90808738 MB |
2017 | ret = __spi_validate(spi, message); |
2018 | if (ret != 0) | |
2019 | return ret; | |
2020 | ||
cf32b71e | 2021 | spin_lock_irqsave(&master->bus_lock_spinlock, flags); |
568d0697 | 2022 | |
cf32b71e ES |
2023 | if (master->bus_lock_flag) |
2024 | ret = -EBUSY; | |
2025 | else | |
2026 | ret = __spi_async(spi, message); | |
568d0697 | 2027 | |
cf32b71e ES |
2028 | spin_unlock_irqrestore(&master->bus_lock_spinlock, flags); |
2029 | ||
2030 | return ret; | |
568d0697 DB |
2031 | } |
2032 | EXPORT_SYMBOL_GPL(spi_async); | |
2033 | ||
cf32b71e ES |
2034 | /** |
2035 | * spi_async_locked - version of spi_async with exclusive bus usage | |
2036 | * @spi: device with which data will be exchanged | |
2037 | * @message: describes the data transfers, including completion callback | |
2038 | * Context: any (irqs may be blocked, etc) | |
2039 | * | |
2040 | * This call may be used in_irq and other contexts which can't sleep, | |
2041 | * as well as from task contexts which can sleep. | |
2042 | * | |
2043 | * The completion callback is invoked in a context which can't sleep. | |
2044 | * Before that invocation, the value of message->status is undefined. | |
2045 | * When the callback is issued, message->status holds either zero (to | |
2046 | * indicate complete success) or a negative error code. After that | |
2047 | * callback returns, the driver which issued the transfer request may | |
2048 | * deallocate the associated memory; it's no longer in use by any SPI | |
2049 | * core or controller driver code. | |
2050 | * | |
2051 | * Note that although all messages to a spi_device are handled in | |
2052 | * FIFO order, messages may go to different devices in other orders. | |
2053 | * Some device might be higher priority, or have various "hard" access | |
2054 | * time requirements, for example. | |
2055 | * | |
2056 | * On detection of any fault during the transfer, processing of | |
2057 | * the entire message is aborted, and the device is deselected. | |
2058 | * Until returning from the associated message completion callback, | |
2059 | * no other spi_message queued to that device will be processed. | |
2060 | * (This rule applies equally to all the synchronous transfer calls, | |
2061 | * which are wrappers around this core asynchronous primitive.) | |
2062 | */ | |
2063 | int spi_async_locked(struct spi_device *spi, struct spi_message *message) | |
2064 | { | |
2065 | struct spi_master *master = spi->master; | |
2066 | int ret; | |
2067 | unsigned long flags; | |
2068 | ||
90808738 MB |
2069 | ret = __spi_validate(spi, message); |
2070 | if (ret != 0) | |
2071 | return ret; | |
2072 | ||
cf32b71e ES |
2073 | spin_lock_irqsave(&master->bus_lock_spinlock, flags); |
2074 | ||
2075 | ret = __spi_async(spi, message); | |
2076 | ||
2077 | spin_unlock_irqrestore(&master->bus_lock_spinlock, flags); | |
2078 | ||
2079 | return ret; | |
2080 | ||
2081 | } | |
2082 | EXPORT_SYMBOL_GPL(spi_async_locked); | |
2083 | ||
7d077197 DB |
2084 | |
2085 | /*-------------------------------------------------------------------------*/ | |
2086 | ||
2087 | /* Utility methods for SPI master protocol drivers, layered on | |
2088 | * top of the core. Some other utility methods are defined as | |
2089 | * inline functions. | |
2090 | */ | |
2091 | ||
5d870c8e AM |
2092 | static void spi_complete(void *arg) |
2093 | { | |
2094 | complete(arg); | |
2095 | } | |
2096 | ||
cf32b71e ES |
2097 | static int __spi_sync(struct spi_device *spi, struct spi_message *message, |
2098 | int bus_locked) | |
2099 | { | |
2100 | DECLARE_COMPLETION_ONSTACK(done); | |
2101 | int status; | |
2102 | struct spi_master *master = spi->master; | |
2103 | ||
2104 | message->complete = spi_complete; | |
2105 | message->context = &done; | |
2106 | ||
2107 | if (!bus_locked) | |
2108 | mutex_lock(&master->bus_lock_mutex); | |
2109 | ||
2110 | status = spi_async_locked(spi, message); | |
2111 | ||
2112 | if (!bus_locked) | |
2113 | mutex_unlock(&master->bus_lock_mutex); | |
2114 | ||
2115 | if (status == 0) { | |
2116 | wait_for_completion(&done); | |
2117 | status = message->status; | |
2118 | } | |
2119 | message->context = NULL; | |
2120 | return status; | |
2121 | } | |
2122 | ||
8ae12a0d DB |
2123 | /** |
2124 | * spi_sync - blocking/synchronous SPI data transfers | |
2125 | * @spi: device with which data will be exchanged | |
2126 | * @message: describes the data transfers | |
33e34dc6 | 2127 | * Context: can sleep |
8ae12a0d DB |
2128 | * |
2129 | * This call may only be used from a context that may sleep. The sleep | |
2130 | * is non-interruptible, and has no timeout. Low-overhead controller | |
2131 | * drivers may DMA directly into and out of the message buffers. | |
2132 | * | |
2133 | * Note that the SPI device's chip select is active during the message, | |
2134 | * and then is normally disabled between messages. Drivers for some | |
2135 | * frequently-used devices may want to minimize costs of selecting a chip, | |
2136 | * by leaving it selected in anticipation that the next message will go | |
2137 | * to the same chip. (That may increase power usage.) | |
2138 | * | |
0c868461 DB |
2139 | * Also, the caller is guaranteeing that the memory associated with the |
2140 | * message will not be freed before this call returns. | |
2141 | * | |
9b938b74 | 2142 | * It returns zero on success, else a negative error code. |
8ae12a0d DB |
2143 | */ |
2144 | int spi_sync(struct spi_device *spi, struct spi_message *message) | |
2145 | { | |
cf32b71e | 2146 | return __spi_sync(spi, message, 0); |
8ae12a0d DB |
2147 | } |
2148 | EXPORT_SYMBOL_GPL(spi_sync); | |
2149 | ||
cf32b71e ES |
2150 | /** |
2151 | * spi_sync_locked - version of spi_sync with exclusive bus usage | |
2152 | * @spi: device with which data will be exchanged | |
2153 | * @message: describes the data transfers | |
2154 | * Context: can sleep | |
2155 | * | |
2156 | * This call may only be used from a context that may sleep. The sleep | |
2157 | * is non-interruptible, and has no timeout. Low-overhead controller | |
2158 | * drivers may DMA directly into and out of the message buffers. | |
2159 | * | |
2160 | * This call should be used by drivers that require exclusive access to the | |
25985edc | 2161 | * SPI bus. It has to be preceded by a spi_bus_lock call. The SPI bus must |
cf32b71e ES |
2162 | * be released by a spi_bus_unlock call when the exclusive access is over. |
2163 | * | |
2164 | * It returns zero on success, else a negative error code. | |
2165 | */ | |
2166 | int spi_sync_locked(struct spi_device *spi, struct spi_message *message) | |
2167 | { | |
2168 | return __spi_sync(spi, message, 1); | |
2169 | } | |
2170 | EXPORT_SYMBOL_GPL(spi_sync_locked); | |
2171 | ||
2172 | /** | |
2173 | * spi_bus_lock - obtain a lock for exclusive SPI bus usage | |
2174 | * @master: SPI bus master that should be locked for exclusive bus access | |
2175 | * Context: can sleep | |
2176 | * | |
2177 | * This call may only be used from a context that may sleep. The sleep | |
2178 | * is non-interruptible, and has no timeout. | |
2179 | * | |
2180 | * This call should be used by drivers that require exclusive access to the | |
2181 | * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the | |
2182 | * exclusive access is over. Data transfer must be done by spi_sync_locked | |
2183 | * and spi_async_locked calls when the SPI bus lock is held. | |
2184 | * | |
2185 | * It returns zero on success, else a negative error code. | |
2186 | */ | |
2187 | int spi_bus_lock(struct spi_master *master) | |
2188 | { | |
2189 | unsigned long flags; | |
2190 | ||
2191 | mutex_lock(&master->bus_lock_mutex); | |
2192 | ||
2193 | spin_lock_irqsave(&master->bus_lock_spinlock, flags); | |
2194 | master->bus_lock_flag = 1; | |
2195 | spin_unlock_irqrestore(&master->bus_lock_spinlock, flags); | |
2196 | ||
2197 | /* mutex remains locked until spi_bus_unlock is called */ | |
2198 | ||
2199 | return 0; | |
2200 | } | |
2201 | EXPORT_SYMBOL_GPL(spi_bus_lock); | |
2202 | ||
2203 | /** | |
2204 | * spi_bus_unlock - release the lock for exclusive SPI bus usage | |
2205 | * @master: SPI bus master that was locked for exclusive bus access | |
2206 | * Context: can sleep | |
2207 | * | |
2208 | * This call may only be used from a context that may sleep. The sleep | |
2209 | * is non-interruptible, and has no timeout. | |
2210 | * | |
2211 | * This call releases an SPI bus lock previously obtained by an spi_bus_lock | |
2212 | * call. | |
2213 | * | |
2214 | * It returns zero on success, else a negative error code. | |
2215 | */ | |
2216 | int spi_bus_unlock(struct spi_master *master) | |
2217 | { | |
2218 | master->bus_lock_flag = 0; | |
2219 | ||
2220 | mutex_unlock(&master->bus_lock_mutex); | |
2221 | ||
2222 | return 0; | |
2223 | } | |
2224 | EXPORT_SYMBOL_GPL(spi_bus_unlock); | |
2225 | ||
a9948b61 | 2226 | /* portable code must never pass more than 32 bytes */ |
5fe5f05e | 2227 | #define SPI_BUFSIZ max(32, SMP_CACHE_BYTES) |
8ae12a0d DB |
2228 | |
2229 | static u8 *buf; | |
2230 | ||
2231 | /** | |
2232 | * spi_write_then_read - SPI synchronous write followed by read | |
2233 | * @spi: device with which data will be exchanged | |
2234 | * @txbuf: data to be written (need not be dma-safe) | |
2235 | * @n_tx: size of txbuf, in bytes | |
27570497 JP |
2236 | * @rxbuf: buffer into which data will be read (need not be dma-safe) |
2237 | * @n_rx: size of rxbuf, in bytes | |
33e34dc6 | 2238 | * Context: can sleep |
8ae12a0d DB |
2239 | * |
2240 | * This performs a half duplex MicroWire style transaction with the | |
2241 | * device, sending txbuf and then reading rxbuf. The return value | |
2242 | * is zero for success, else a negative errno status code. | |
b885244e | 2243 | * This call may only be used from a context that may sleep. |
8ae12a0d | 2244 | * |
0c868461 | 2245 | * Parameters to this routine are always copied using a small buffer; |
33e34dc6 DB |
2246 | * portable code should never use this for more than 32 bytes. |
2247 | * Performance-sensitive or bulk transfer code should instead use | |
0c868461 | 2248 | * spi_{async,sync}() calls with dma-safe buffers. |
8ae12a0d DB |
2249 | */ |
2250 | int spi_write_then_read(struct spi_device *spi, | |
0c4a1590 MB |
2251 | const void *txbuf, unsigned n_tx, |
2252 | void *rxbuf, unsigned n_rx) | |
8ae12a0d | 2253 | { |
068f4070 | 2254 | static DEFINE_MUTEX(lock); |
8ae12a0d DB |
2255 | |
2256 | int status; | |
2257 | struct spi_message message; | |
bdff549e | 2258 | struct spi_transfer x[2]; |
8ae12a0d DB |
2259 | u8 *local_buf; |
2260 | ||
b3a223ee MB |
2261 | /* Use preallocated DMA-safe buffer if we can. We can't avoid |
2262 | * copying here, (as a pure convenience thing), but we can | |
2263 | * keep heap costs out of the hot path unless someone else is | |
2264 | * using the pre-allocated buffer or the transfer is too large. | |
8ae12a0d | 2265 | */ |
b3a223ee | 2266 | if ((n_tx + n_rx) > SPI_BUFSIZ || !mutex_trylock(&lock)) { |
2cd94c8a MB |
2267 | local_buf = kmalloc(max((unsigned)SPI_BUFSIZ, n_tx + n_rx), |
2268 | GFP_KERNEL | GFP_DMA); | |
b3a223ee MB |
2269 | if (!local_buf) |
2270 | return -ENOMEM; | |
2271 | } else { | |
2272 | local_buf = buf; | |
2273 | } | |
8ae12a0d | 2274 | |
8275c642 | 2275 | spi_message_init(&message); |
5fe5f05e | 2276 | memset(x, 0, sizeof(x)); |
bdff549e DB |
2277 | if (n_tx) { |
2278 | x[0].len = n_tx; | |
2279 | spi_message_add_tail(&x[0], &message); | |
2280 | } | |
2281 | if (n_rx) { | |
2282 | x[1].len = n_rx; | |
2283 | spi_message_add_tail(&x[1], &message); | |
2284 | } | |
8275c642 | 2285 | |
8ae12a0d | 2286 | memcpy(local_buf, txbuf, n_tx); |
bdff549e DB |
2287 | x[0].tx_buf = local_buf; |
2288 | x[1].rx_buf = local_buf + n_tx; | |
8ae12a0d DB |
2289 | |
2290 | /* do the i/o */ | |
8ae12a0d | 2291 | status = spi_sync(spi, &message); |
9b938b74 | 2292 | if (status == 0) |
bdff549e | 2293 | memcpy(rxbuf, x[1].rx_buf, n_rx); |
8ae12a0d | 2294 | |
bdff549e | 2295 | if (x[0].tx_buf == buf) |
068f4070 | 2296 | mutex_unlock(&lock); |
8ae12a0d DB |
2297 | else |
2298 | kfree(local_buf); | |
2299 | ||
2300 | return status; | |
2301 | } | |
2302 | EXPORT_SYMBOL_GPL(spi_write_then_read); | |
2303 | ||
2304 | /*-------------------------------------------------------------------------*/ | |
2305 | ||
2306 | static int __init spi_init(void) | |
2307 | { | |
b885244e DB |
2308 | int status; |
2309 | ||
e94b1766 | 2310 | buf = kmalloc(SPI_BUFSIZ, GFP_KERNEL); |
b885244e DB |
2311 | if (!buf) { |
2312 | status = -ENOMEM; | |
2313 | goto err0; | |
2314 | } | |
2315 | ||
2316 | status = bus_register(&spi_bus_type); | |
2317 | if (status < 0) | |
2318 | goto err1; | |
8ae12a0d | 2319 | |
b885244e DB |
2320 | status = class_register(&spi_master_class); |
2321 | if (status < 0) | |
2322 | goto err2; | |
8ae12a0d | 2323 | return 0; |
b885244e DB |
2324 | |
2325 | err2: | |
2326 | bus_unregister(&spi_bus_type); | |
2327 | err1: | |
2328 | kfree(buf); | |
2329 | buf = NULL; | |
2330 | err0: | |
2331 | return status; | |
8ae12a0d | 2332 | } |
b885244e | 2333 | |
8ae12a0d DB |
2334 | /* board_info is normally registered in arch_initcall(), |
2335 | * but even essential drivers wait till later | |
b885244e DB |
2336 | * |
2337 | * REVISIT only boardinfo really needs static linking. the rest (device and | |
2338 | * driver registration) _could_ be dynamically linked (modular) ... costs | |
2339 | * include needing to have boardinfo data structures be much more public. | |
8ae12a0d | 2340 | */ |
673c0c00 | 2341 | postcore_initcall(spi_init); |
8ae12a0d | 2342 |