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0ff59f31 KH |
1 | /* |
2 | * Copyright (C) 2015 Industrial Research Institute for Automation | |
3 | * and Measurements PIAP | |
4 | * | |
5 | * Written by Krzysztof Ha?asa. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of version 2 of the GNU General Public License | |
9 | * as published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/delay.h> | |
13 | #include <linux/freezer.h> | |
14 | #include <linux/interrupt.h> | |
15 | #include <linux/kthread.h> | |
16 | #include <linux/mutex.h> | |
17 | #include <linux/pci.h> | |
18 | #include <media/videobuf2-dma-sg.h> | |
19 | #include <linux/videodev2.h> | |
20 | #include <media/v4l2-common.h> | |
21 | #include <media/v4l2-ctrls.h> | |
22 | #include <media/v4l2-device.h> | |
23 | #include <media/v4l2-ioctl.h> | |
24 | ||
25 | #define TYPE_MAX_CHANNELS 0x0F | |
26 | #define TYPE_SECOND_GEN 0x10 | |
27 | ||
28 | struct tw686x_format { | |
29 | char *name; | |
30 | unsigned int fourcc; | |
31 | unsigned int depth; | |
32 | unsigned int mode; | |
33 | }; | |
34 | ||
35 | struct dma_desc { | |
36 | dma_addr_t phys; | |
37 | void *virt; | |
38 | unsigned int size; | |
39 | }; | |
40 | ||
41 | struct vdma_desc { | |
42 | __le32 flags_length; /* 3 MSBits for flags, 13 LSBits for length */ | |
43 | __le32 phys; | |
44 | }; | |
45 | ||
46 | struct tw686x_vb2_buf { | |
47 | struct vb2_v4l2_buffer vb; | |
48 | struct list_head list; | |
49 | }; | |
50 | ||
51 | struct tw686x_video_channel { | |
52 | struct tw686x_dev *dev; | |
53 | ||
54 | struct vb2_queue vidq; | |
55 | struct list_head vidq_queued; | |
56 | struct video_device *device; | |
57 | struct dma_desc sg_tables[2]; | |
58 | struct tw686x_vb2_buf *curr_bufs[2]; | |
0ff59f31 KH |
59 | struct vdma_desc *sg_descs[2]; |
60 | ||
61 | struct v4l2_ctrl_handler ctrl_handler; | |
62 | const struct tw686x_format *format; | |
63 | struct mutex vb_mutex; | |
64 | spinlock_t qlock; | |
65 | v4l2_std_id video_standard; | |
66 | unsigned int width, height; | |
67 | enum v4l2_field field; /* supported TOP, BOTTOM, SEQ_TB and SEQ_BT */ | |
68 | unsigned int seq; /* video field or frame counter */ | |
69 | unsigned int ch; | |
70 | }; | |
71 | ||
72 | /* global device status */ | |
73 | struct tw686x_dev { | |
74 | spinlock_t irq_lock; | |
75 | ||
76 | struct v4l2_device v4l2_dev; | |
77 | struct snd_card *card; /* sound card */ | |
78 | ||
79 | unsigned int video_active; /* active video channel mask */ | |
80 | ||
81 | char name[32]; | |
82 | unsigned int type; | |
83 | struct pci_dev *pci_dev; | |
84 | __u32 __iomem *mmio; | |
85 | ||
86 | struct task_struct *video_thread; | |
87 | wait_queue_head_t video_thread_wait; | |
88 | u32 dma_requests; | |
89 | ||
90 | struct tw686x_video_channel video_channels[0]; | |
91 | }; | |
92 | ||
93 | static inline uint32_t reg_read(struct tw686x_dev *dev, unsigned int reg) | |
94 | { | |
95 | return readl(dev->mmio + reg); | |
96 | } | |
97 | ||
98 | static inline void reg_write(struct tw686x_dev *dev, unsigned int reg, | |
99 | uint32_t value) | |
100 | { | |
101 | writel(value, dev->mmio + reg); | |
102 | } | |
103 | ||
104 | static inline unsigned int max_channels(struct tw686x_dev *dev) | |
105 | { | |
106 | return dev->type & TYPE_MAX_CHANNELS; /* 4 or 8 channels */ | |
107 | } | |
108 | ||
109 | static inline unsigned int is_second_gen(struct tw686x_dev *dev) | |
110 | { | |
111 | /* each channel has its own DMA SG table */ | |
112 | return dev->type & TYPE_SECOND_GEN; | |
113 | } | |
114 | ||
e3a900a8 HV |
115 | int tw686x_kh_video_irq(struct tw686x_dev *dev); |
116 | int tw686x_kh_video_init(struct tw686x_dev *dev); | |
117 | void tw686x_kh_video_free(struct tw686x_dev *dev); |