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IB/qib: Remove modify_port and port_immutable functions
[deliverable/linux.git] / drivers / staging / rdma / hfi1 / qp.c
CommitLineData
77241056
MM		 1/*
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2015 Intel Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * BSD LICENSE
20 *
21 * Copyright(c) 2015 Intel Corporation.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50
51#include <linux/err.h>
52#include <linux/vmalloc.h>
53#include <linux/hash.h>
54#include <linux/module.h>
55#include <linux/random.h>
56#include <linux/seq_file.h>
57
58#include "hfi.h"
59#include "qp.h"
60#include "trace.h"
61#include "sdma.h"
62
63#define BITS_PER_PAGE (PAGE_SIZE*BITS_PER_BYTE)
64#define BITS_PER_PAGE_MASK (BITS_PER_PAGE-1)
65
66static unsigned int hfi1_qp_table_size = 256;
67module_param_named(qp_table_size, hfi1_qp_table_size, uint, S_IRUGO);
68MODULE_PARM_DESC(qp_table_size, "QP table size");
69
70static void flush_tx_list(struct hfi1_qp *qp);
71static int iowait_sleep(
72 struct sdma_engine *sde,
73 struct iowait *wait,
74 struct sdma_txreq *stx,
75 unsigned seq);
76static void iowait_wakeup(struct iowait *wait, int reason);
77
78static inline unsigned mk_qpn(struct hfi1_qpn_table *qpt,
79 struct qpn_map *map, unsigned off)
80{
81 return (map - qpt->map) * BITS_PER_PAGE + off;
82}
83
84/*
85 * Convert the AETH credit code into the number of credits.
86 */
87static const u16 credit_table[31] = {
88 0, /* 0 */
89 1, /* 1 */
90 2, /* 2 */
91 3, /* 3 */
92 4, /* 4 */
93 6, /* 5 */
94 8, /* 6 */
95 12, /* 7 */
96 16, /* 8 */
97 24, /* 9 */
98 32, /* A */
99 48, /* B */
100 64, /* C */
101 96, /* D */
102 128, /* E */
103 192, /* F */
104 256, /* 10 */
105 384, /* 11 */
106 512, /* 12 */
107 768, /* 13 */
108 1024, /* 14 */
109 1536, /* 15 */
110 2048, /* 16 */
111 3072, /* 17 */
112 4096, /* 18 */
113 6144, /* 19 */
114 8192, /* 1A */
115 12288, /* 1B */
116 16384, /* 1C */
117 24576, /* 1D */
118 32768 /* 1E */
119};
120
121static void get_map_page(struct hfi1_qpn_table *qpt, struct qpn_map *map)
122{
123 unsigned long page = get_zeroed_page(GFP_KERNEL);
124
125 /*
126 * Free the page if someone raced with us installing it.
127 */
128
129 spin_lock(&qpt->lock);
130 if (map->page)
131 free_page(page);
132 else
133 map->page = (void *)page;
134 spin_unlock(&qpt->lock);
135}
136
137/*
138 * Allocate the next available QPN or
139 * zero/one for QP type IB_QPT_SMI/IB_QPT_GSI.
140 */
141static int alloc_qpn(struct hfi1_devdata *dd, struct hfi1_qpn_table *qpt,
142 enum ib_qp_type type, u8 port)
143{
144 u32 i, offset, max_scan, qpn;
145 struct qpn_map *map;
146 u32 ret;
147
148 if (type == IB_QPT_SMI || type == IB_QPT_GSI) {
149 unsigned n;
150
151 ret = type == IB_QPT_GSI;
152 n = 1 << (ret + 2 * (port - 1));
153 spin_lock(&qpt->lock);
154 if (qpt->flags & n)
155 ret = -EINVAL;
156 else
157 qpt->flags |= n;
158 spin_unlock(&qpt->lock);
159 goto bail;
160 }
161
162 qpn = qpt->last + qpt->incr;
163 if (qpn >= QPN_MAX)
164 qpn = qpt->incr | ((qpt->last & 1) ^ 1);
165 /* offset carries bit 0 */
166 offset = qpn & BITS_PER_PAGE_MASK;
167 map = &qpt->map[qpn / BITS_PER_PAGE];
168 max_scan = qpt->nmaps - !offset;
169 for (i = 0;;) {
170 if (unlikely(!map->page)) {
171 get_map_page(qpt, map);
172 if (unlikely(!map->page))
173 break;
174 }
175 do {
176 if (!test_and_set_bit(offset, map->page)) {
177 qpt->last = qpn;
178 ret = qpn;
179 goto bail;
180 }
181 offset += qpt->incr;
182 /*
183 * This qpn might be bogus if offset >= BITS_PER_PAGE.
184 * That is OK. It gets re-assigned below
185 */
186 qpn = mk_qpn(qpt, map, offset);
187 } while (offset < BITS_PER_PAGE && qpn < QPN_MAX);
188 /*
189 * In order to keep the number of pages allocated to a
190 * minimum, we scan the all existing pages before increasing
191 * the size of the bitmap table.
192 */
193 if (++i > max_scan) {
194 if (qpt->nmaps == QPNMAP_ENTRIES)
195 break;
196 map = &qpt->map[qpt->nmaps++];
197 /* start at incr with current bit 0 */
198 offset = qpt->incr | (offset & 1);
199 } else if (map < &qpt->map[qpt->nmaps]) {
200 ++map;
201 /* start at incr with current bit 0 */
202 offset = qpt->incr | (offset & 1);
203 } else {
204 map = &qpt->map[0];
205 /* wrap to first map page, invert bit 0 */
206 offset = qpt->incr | ((offset & 1) ^ 1);
207 }
208 /* there can be no bits at shift and below */
209 WARN_ON(offset & (dd->qos_shift - 1));
210 qpn = mk_qpn(qpt, map, offset);
211 }
212
213 ret = -ENOMEM;
214
215bail:
216 return ret;
217}
218
219static void free_qpn(struct hfi1_qpn_table *qpt, u32 qpn)
220{
221 struct qpn_map *map;
222
223 map = qpt->map + qpn / BITS_PER_PAGE;
224 if (map->page)
225 clear_bit(qpn & BITS_PER_PAGE_MASK, map->page);
226}
227
228/*
229 * Put the QP into the hash table.
230 * The hash table holds a reference to the QP.
231 */
232static void insert_qp(struct hfi1_ibdev *dev, struct hfi1_qp *qp)
233{
234 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
235 unsigned long flags;
236
237 atomic_inc(&qp->refcount);
238 spin_lock_irqsave(&dev->qp_dev->qpt_lock, flags);
239
240 if (qp->ibqp.qp_num <= 1) {
241 rcu_assign_pointer(ibp->qp[qp->ibqp.qp_num], qp);
242 } else {
243 u32 n = qpn_hash(dev->qp_dev, qp->ibqp.qp_num);
244
245 qp->next = dev->qp_dev->qp_table[n];
246 rcu_assign_pointer(dev->qp_dev->qp_table[n], qp);
247 trace_hfi1_qpinsert(qp, n);
248 }
249
250 spin_unlock_irqrestore(&dev->qp_dev->qpt_lock, flags);
251}
252
253/*
254 * Remove the QP from the table so it can't be found asynchronously by
255 * the receive interrupt routine.
256 */
257static void remove_qp(struct hfi1_ibdev *dev, struct hfi1_qp *qp)
258{
259 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
260 u32 n = qpn_hash(dev->qp_dev, qp->ibqp.qp_num);
261 unsigned long flags;
262 int removed = 1;
263
264 spin_lock_irqsave(&dev->qp_dev->qpt_lock, flags);
265
266 if (rcu_dereference_protected(ibp->qp[0],
267 lockdep_is_held(&dev->qp_dev->qpt_lock)) == qp) {
268 RCU_INIT_POINTER(ibp->qp[0], NULL);
269 } else if (rcu_dereference_protected(ibp->qp[1],
270 lockdep_is_held(&dev->qp_dev->qpt_lock)) == qp) {
271 RCU_INIT_POINTER(ibp->qp[1], NULL);
272 } else {
273 struct hfi1_qp *q;
274 struct hfi1_qp __rcu **qpp;
275
276 removed = 0;
277 qpp = &dev->qp_dev->qp_table[n];
278 for (; (q = rcu_dereference_protected(*qpp,
279 lockdep_is_held(&dev->qp_dev->qpt_lock)))
280 != NULL;
281 qpp = &q->next)
282 if (q == qp) {
283 RCU_INIT_POINTER(*qpp,
284 rcu_dereference_protected(qp->next,
285 lockdep_is_held(&dev->qp_dev->qpt_lock)));
286 removed = 1;
287 trace_hfi1_qpremove(qp, n);
288 break;
289 }
290 }
291
292 spin_unlock_irqrestore(&dev->qp_dev->qpt_lock, flags);
293 if (removed) {
294 synchronize_rcu();
295 if (atomic_dec_and_test(&qp->refcount))
296 wake_up(&qp->wait);
297 }
298}
299
300/**
301 * free_all_qps - check for QPs still in use
302 * @qpt: the QP table to empty
303 *
304 * There should not be any QPs still in use.
305 * Free memory for table.
306 */
307static unsigned free_all_qps(struct hfi1_devdata *dd)
308{
309 struct hfi1_ibdev *dev = &dd->verbs_dev;
310 unsigned long flags;
311 struct hfi1_qp *qp;
312 unsigned n, qp_inuse = 0;
313
314 for (n = 0; n < dd->num_pports; n++) {
315 struct hfi1_ibport *ibp = &dd->pport[n].ibport_data;
316
317 if (!hfi1_mcast_tree_empty(ibp))
318 qp_inuse++;
319 rcu_read_lock();
320 if (rcu_dereference(ibp->qp[0]))
321 qp_inuse++;
322 if (rcu_dereference(ibp->qp[1]))
323 qp_inuse++;
324 rcu_read_unlock();
325 }
326
327 if (!dev->qp_dev)
328 goto bail;
329 spin_lock_irqsave(&dev->qp_dev->qpt_lock, flags);
330 for (n = 0; n < dev->qp_dev->qp_table_size; n++) {
331 qp = rcu_dereference_protected(dev->qp_dev->qp_table[n],
332 lockdep_is_held(&dev->qp_dev->qpt_lock));
333 RCU_INIT_POINTER(dev->qp_dev->qp_table[n], NULL);
334
335 for (; qp; qp = rcu_dereference_protected(qp->next,
336 lockdep_is_held(&dev->qp_dev->qpt_lock)))
337 qp_inuse++;
338 }
339 spin_unlock_irqrestore(&dev->qp_dev->qpt_lock, flags);
340 synchronize_rcu();
341bail:
342 return qp_inuse;
343}
344
345/**
346 * reset_qp - initialize the QP state to the reset state
347 * @qp: the QP to reset
348 * @type: the QP type
349 */
350static void reset_qp(struct hfi1_qp *qp, enum ib_qp_type type)
351{
352 qp->remote_qpn = 0;
353 qp->qkey = 0;
354 qp->qp_access_flags = 0;
355 iowait_init(
356 &qp->s_iowait,
357 1,
358 hfi1_do_send,
359 iowait_sleep,
360 iowait_wakeup);
361 qp->s_flags &= HFI1_S_SIGNAL_REQ_WR;
362 qp->s_hdrwords = 0;
363 qp->s_wqe = NULL;
364 qp->s_draining = 0;
365 qp->s_next_psn = 0;
366 qp->s_last_psn = 0;
367 qp->s_sending_psn = 0;
368 qp->s_sending_hpsn = 0;
369 qp->s_psn = 0;
370 qp->r_psn = 0;
371 qp->r_msn = 0;
372 if (type == IB_QPT_RC) {
373 qp->s_state = IB_OPCODE_RC_SEND_LAST;
374 qp->r_state = IB_OPCODE_RC_SEND_LAST;
375 } else {
376 qp->s_state = IB_OPCODE_UC_SEND_LAST;
377 qp->r_state = IB_OPCODE_UC_SEND_LAST;
378 }
379 qp->s_ack_state = IB_OPCODE_RC_ACKNOWLEDGE;
380 qp->r_nak_state = 0;
7c091e5c 381 qp->r_adefered = 0;
77241056
MM		 382 qp->r_aflags = 0;
383 qp->r_flags = 0;
384 qp->s_head = 0;
385 qp->s_tail = 0;
386 qp->s_cur = 0;
387 qp->s_acked = 0;
388 qp->s_last = 0;
389 qp->s_ssn = 1;
390 qp->s_lsn = 0;
391 clear_ahg(qp);
392 qp->s_mig_state = IB_MIG_MIGRATED;
393 memset(qp->s_ack_queue, 0, sizeof(qp->s_ack_queue));
394 qp->r_head_ack_queue = 0;
395 qp->s_tail_ack_queue = 0;
396 qp->s_num_rd_atomic = 0;
397 if (qp->r_rq.wq) {
398 qp->r_rq.wq->head = 0;
399 qp->r_rq.wq->tail = 0;
400 }
401 qp->r_sge.num_sge = 0;
402}
403
404static void clear_mr_refs(struct hfi1_qp *qp, int clr_sends)
405{
406 unsigned n;
407
408 if (test_and_clear_bit(HFI1_R_REWIND_SGE, &qp->r_aflags))
409 hfi1_put_ss(&qp->s_rdma_read_sge);
410
411 hfi1_put_ss(&qp->r_sge);
412
413 if (clr_sends) {
414 while (qp->s_last != qp->s_head) {
415 struct hfi1_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
416 unsigned i;
417
418 for (i = 0; i < wqe->wr.num_sge; i++) {
419 struct hfi1_sge *sge = &wqe->sg_list[i];
420
421 hfi1_put_mr(sge->mr);
422 }
423 if (qp->ibqp.qp_type == IB_QPT_UD ||
424 qp->ibqp.qp_type == IB_QPT_SMI ||
425 qp->ibqp.qp_type == IB_QPT_GSI)
e622f2f4 426 atomic_dec(&to_iah(wqe->ud_wr.ah)->refcount);
77241056
MM		 427 if (++qp->s_last >= qp->s_size)
428 qp->s_last = 0;
429 }
430 if (qp->s_rdma_mr) {
431 hfi1_put_mr(qp->s_rdma_mr);
432 qp->s_rdma_mr = NULL;
433 }
434 }
435
436 if (qp->ibqp.qp_type != IB_QPT_RC)
437 return;
438
439 for (n = 0; n < ARRAY_SIZE(qp->s_ack_queue); n++) {
440 struct hfi1_ack_entry *e = &qp->s_ack_queue[n];
441
442 if (e->opcode == IB_OPCODE_RC_RDMA_READ_REQUEST &&
443 e->rdma_sge.mr) {
444 hfi1_put_mr(e->rdma_sge.mr);
445 e->rdma_sge.mr = NULL;
446 }
447 }
448}
449
450/**
451 * hfi1_error_qp - put a QP into the error state
452 * @qp: the QP to put into the error state
453 * @err: the receive completion error to signal if a RWQE is active
454 *
455 * Flushes both send and receive work queues.
456 * Returns true if last WQE event should be generated.
457 * The QP r_lock and s_lock should be held and interrupts disabled.
458 * If we are already in error state, just return.
459 */
460int hfi1_error_qp(struct hfi1_qp *qp, enum ib_wc_status err)
461{
462 struct hfi1_ibdev *dev = to_idev(qp->ibqp.device);
463 struct ib_wc wc;
464 int ret = 0;
465
466 if (qp->state == IB_QPS_ERR || qp->state == IB_QPS_RESET)
467 goto bail;
468
469 qp->state = IB_QPS_ERR;
470
471 if (qp->s_flags & (HFI1_S_TIMER | HFI1_S_WAIT_RNR)) {
472 qp->s_flags &= ~(HFI1_S_TIMER | HFI1_S_WAIT_RNR);
473 del_timer(&qp->s_timer);
474 }
475
476 if (qp->s_flags & HFI1_S_ANY_WAIT_SEND)
477 qp->s_flags &= ~HFI1_S_ANY_WAIT_SEND;
478
479 write_seqlock(&dev->iowait_lock);
480 if (!list_empty(&qp->s_iowait.list) && !(qp->s_flags & HFI1_S_BUSY)) {
481 qp->s_flags &= ~HFI1_S_ANY_WAIT_IO;
482 list_del_init(&qp->s_iowait.list);
483 if (atomic_dec_and_test(&qp->refcount))
484 wake_up(&qp->wait);
485 }
486 write_sequnlock(&dev->iowait_lock);
487
488 if (!(qp->s_flags & HFI1_S_BUSY)) {
489 qp->s_hdrwords = 0;
490 if (qp->s_rdma_mr) {
491 hfi1_put_mr(qp->s_rdma_mr);
492 qp->s_rdma_mr = NULL;
493 }
494 flush_tx_list(qp);
495 }
496
497 /* Schedule the sending tasklet to drain the send work queue. */
498 if (qp->s_last != qp->s_head)
499 hfi1_schedule_send(qp);
500
501 clear_mr_refs(qp, 0);
502
503 memset(&wc, 0, sizeof(wc));
504 wc.qp = &qp->ibqp;
505 wc.opcode = IB_WC_RECV;
506
507 if (test_and_clear_bit(HFI1_R_WRID_VALID, &qp->r_aflags)) {
508 wc.wr_id = qp->r_wr_id;
509 wc.status = err;
510 hfi1_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
511 }
512 wc.status = IB_WC_WR_FLUSH_ERR;
513
514 if (qp->r_rq.wq) {
515 struct hfi1_rwq *wq;
516 u32 head;
517 u32 tail;
518
519 spin_lock(&qp->r_rq.lock);
520
521 /* sanity check pointers before trusting them */
522 wq = qp->r_rq.wq;
523 head = wq->head;
524 if (head >= qp->r_rq.size)
525 head = 0;
526 tail = wq->tail;
527 if (tail >= qp->r_rq.size)
528 tail = 0;
529 while (tail != head) {
530 wc.wr_id = get_rwqe_ptr(&qp->r_rq, tail)->wr_id;
531 if (++tail >= qp->r_rq.size)
532 tail = 0;
533 hfi1_cq_enter(to_icq(qp->ibqp.recv_cq), &wc, 1);
534 }
535 wq->tail = tail;
536
537 spin_unlock(&qp->r_rq.lock);
538 } else if (qp->ibqp.event_handler)
539 ret = 1;
540
541bail:
542 return ret;
543}
544
545static void flush_tx_list(struct hfi1_qp *qp)
546{
547 while (!list_empty(&qp->s_iowait.tx_head)) {
548 struct sdma_txreq *tx;
549
550 tx = list_first_entry(
551 &qp->s_iowait.tx_head,
552 struct sdma_txreq,
553 list);
554 list_del_init(&tx->list);
555 hfi1_put_txreq(
556 container_of(tx, struct verbs_txreq, txreq));
557 }
558}
559
560static void flush_iowait(struct hfi1_qp *qp)
561{
562 struct hfi1_ibdev *dev = to_idev(qp->ibqp.device);
563 unsigned long flags;
564
565 write_seqlock_irqsave(&dev->iowait_lock, flags);
566 if (!list_empty(&qp->s_iowait.list)) {
567 list_del_init(&qp->s_iowait.list);
568 if (atomic_dec_and_test(&qp->refcount))
569 wake_up(&qp->wait);
570 }
571 write_sequnlock_irqrestore(&dev->iowait_lock, flags);
572}
573
574static inline int opa_mtu_enum_to_int(int mtu)
575{
576 switch (mtu) {
577 case OPA_MTU_8192: return 8192;
578 case OPA_MTU_10240: return 10240;
579 default: return -1;
580 }
581}
582
583/**
584 * This function is what we would push to the core layer if we wanted to be a
585 * "first class citizen". Instead we hide this here and rely on Verbs ULPs
586 * to blindly pass the MTU enum value from the PathRecord to us.
587 *
588 * The actual flag used to determine "8k MTU" will change and is currently
589 * unknown.
590 */
591static inline int verbs_mtu_enum_to_int(struct ib_device *dev, enum ib_mtu mtu)
592{
593 int val = opa_mtu_enum_to_int((int)mtu);
594
595 if (val > 0)
596 return val;
597 return ib_mtu_enum_to_int(mtu);
598}
599
600
601/**
602 * hfi1_modify_qp - modify the attributes of a queue pair
603 * @ibqp: the queue pair who's attributes we're modifying
604 * @attr: the new attributes
605 * @attr_mask: the mask of attributes to modify
606 * @udata: user data for libibverbs.so
607 *
608 * Returns 0 on success, otherwise returns an errno.
609 */
610int hfi1_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
611 int attr_mask, struct ib_udata *udata)
612{
613 struct hfi1_ibdev *dev = to_idev(ibqp->device);
614 struct hfi1_qp *qp = to_iqp(ibqp);
615 enum ib_qp_state cur_state, new_state;
616 struct ib_event ev;
617 int lastwqe = 0;
618 int mig = 0;
619 int ret;
620 u32 pmtu = 0; /* for gcc warning only */
d7b8ba51 621 struct hfi1_devdata *dd = dd_from_dev(dev);
77241056
MM		 622
623 spin_lock_irq(&qp->r_lock);
624 spin_lock(&qp->s_lock);
625
626 cur_state = attr_mask & IB_QP_CUR_STATE ?
627 attr->cur_qp_state : qp->state;
628 new_state = attr_mask & IB_QP_STATE ? attr->qp_state : cur_state;
629
630 if (!ib_modify_qp_is_ok(cur_state, new_state, ibqp->qp_type,
631 attr_mask, IB_LINK_LAYER_UNSPECIFIED))
632 goto inval;
633
634 if (attr_mask & IB_QP_AV) {
d7b8ba51
MM		 635 u8 sc;
636
77241056
MM		 637 if (attr->ah_attr.dlid >= HFI1_MULTICAST_LID_BASE)
638 goto inval;
639 if (hfi1_check_ah(qp->ibqp.device, &attr->ah_attr))
640 goto inval;
d7b8ba51
MM		 641 sc = ah_to_sc(ibqp->device, &attr->ah_attr);
642 if (!qp_to_sdma_engine(qp, sc) &&
643 dd->flags & HFI1_HAS_SEND_DMA)
644 goto inval;
77241056
MM		 645 }
646
647 if (attr_mask & IB_QP_ALT_PATH) {
d7b8ba51
MM		 648 u8 sc;
649
77241056
MM		 650 if (attr->alt_ah_attr.dlid >= HFI1_MULTICAST_LID_BASE)
651 goto inval;
652 if (hfi1_check_ah(qp->ibqp.device, &attr->alt_ah_attr))
653 goto inval;
d7b8ba51
MM		 654 if (attr->alt_pkey_index >= hfi1_get_npkeys(dd))
655 goto inval;
656 sc = ah_to_sc(ibqp->device, &attr->alt_ah_attr);
657 if (!qp_to_sdma_engine(qp, sc) &&
658 dd->flags & HFI1_HAS_SEND_DMA)
77241056
MM		 659 goto inval;
660 }
661
662 if (attr_mask & IB_QP_PKEY_INDEX)
d7b8ba51 663 if (attr->pkey_index >= hfi1_get_npkeys(dd))
77241056
MM		 664 goto inval;
665
666 if (attr_mask & IB_QP_MIN_RNR_TIMER)
667 if (attr->min_rnr_timer > 31)
668 goto inval;
669
670 if (attr_mask & IB_QP_PORT)
671 if (qp->ibqp.qp_type == IB_QPT_SMI ||
672 qp->ibqp.qp_type == IB_QPT_GSI ||
673 attr->port_num == 0 ||
674 attr->port_num > ibqp->device->phys_port_cnt)
675 goto inval;
676
677 if (attr_mask & IB_QP_DEST_QPN)
678 if (attr->dest_qp_num > HFI1_QPN_MASK)
679 goto inval;
680
681 if (attr_mask & IB_QP_RETRY_CNT)
682 if (attr->retry_cnt > 7)
683 goto inval;
684
685 if (attr_mask & IB_QP_RNR_RETRY)
686 if (attr->rnr_retry > 7)
687 goto inval;
688
689 /*
690 * Don't allow invalid path_mtu values. OK to set greater
691 * than the active mtu (or even the max_cap, if we have tuned
692 * that to a small mtu. We'll set qp->path_mtu
693 * to the lesser of requested attribute mtu and active,
694 * for packetizing messages.
695 * Note that the QP port has to be set in INIT and MTU in RTR.
696 */
697 if (attr_mask & IB_QP_PATH_MTU) {
698 int mtu, pidx = qp->port_num - 1;
699
700 dd = dd_from_dev(dev);
701 mtu = verbs_mtu_enum_to_int(ibqp->device, attr->path_mtu);
702 if (mtu == -1)
703 goto inval;
704
705 if (mtu > dd->pport[pidx].ibmtu)
706 pmtu = mtu_to_enum(dd->pport[pidx].ibmtu, IB_MTU_2048);
707 else
708 pmtu = attr->path_mtu;
709 }
710
711 if (attr_mask & IB_QP_PATH_MIG_STATE) {
712 if (attr->path_mig_state == IB_MIG_REARM) {
713 if (qp->s_mig_state == IB_MIG_ARMED)
714 goto inval;
715 if (new_state != IB_QPS_RTS)
716 goto inval;
717 } else if (attr->path_mig_state == IB_MIG_MIGRATED) {
718 if (qp->s_mig_state == IB_MIG_REARM)
719 goto inval;
720 if (new_state != IB_QPS_RTS && new_state != IB_QPS_SQD)
721 goto inval;
722 if (qp->s_mig_state == IB_MIG_ARMED)
723 mig = 1;
724 } else
725 goto inval;
726 }
727
728 if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
729 if (attr->max_dest_rd_atomic > HFI1_MAX_RDMA_ATOMIC)
730 goto inval;
731
732 switch (new_state) {
733 case IB_QPS_RESET:
734 if (qp->state != IB_QPS_RESET) {
735 qp->state = IB_QPS_RESET;
736 flush_iowait(qp);
737 qp->s_flags &= ~(HFI1_S_TIMER | HFI1_S_ANY_WAIT);
738 spin_unlock(&qp->s_lock);
739 spin_unlock_irq(&qp->r_lock);
740 /* Stop the sending work queue and retry timer */
741 cancel_work_sync(&qp->s_iowait.iowork);
742 del_timer_sync(&qp->s_timer);
743 iowait_sdma_drain(&qp->s_iowait);
744 flush_tx_list(qp);
745 remove_qp(dev, qp);
746 wait_event(qp->wait, !atomic_read(&qp->refcount));
747 spin_lock_irq(&qp->r_lock);
748 spin_lock(&qp->s_lock);
749 clear_mr_refs(qp, 1);
750 clear_ahg(qp);
751 reset_qp(qp, ibqp->qp_type);
752 }
753 break;
754
755 case IB_QPS_RTR:
756 /* Allow event to re-trigger if QP set to RTR more than once */
757 qp->r_flags &= ~HFI1_R_COMM_EST;
758 qp->state = new_state;
759 break;
760
761 case IB_QPS_SQD:
762 qp->s_draining = qp->s_last != qp->s_cur;
763 qp->state = new_state;
764 break;
765
766 case IB_QPS_SQE:
767 if (qp->ibqp.qp_type == IB_QPT_RC)
768 goto inval;
769 qp->state = new_state;
770 break;
771
772 case IB_QPS_ERR:
773 lastwqe = hfi1_error_qp(qp, IB_WC_WR_FLUSH_ERR);
774 break;
775
776 default:
777 qp->state = new_state;
778 break;
779 }
780
781 if (attr_mask & IB_QP_PKEY_INDEX)
782 qp->s_pkey_index = attr->pkey_index;
783
784 if (attr_mask & IB_QP_PORT)
785 qp->port_num = attr->port_num;
786
787 if (attr_mask & IB_QP_DEST_QPN)
788 qp->remote_qpn = attr->dest_qp_num;
789
790 if (attr_mask & IB_QP_SQ_PSN) {
791 qp->s_next_psn = attr->sq_psn & PSN_MODIFY_MASK;
792 qp->s_psn = qp->s_next_psn;
793 qp->s_sending_psn = qp->s_next_psn;
794 qp->s_last_psn = qp->s_next_psn - 1;
795 qp->s_sending_hpsn = qp->s_last_psn;
796 }
797
798 if (attr_mask & IB_QP_RQ_PSN)
799 qp->r_psn = attr->rq_psn & PSN_MODIFY_MASK;
800
801 if (attr_mask & IB_QP_ACCESS_FLAGS)
802 qp->qp_access_flags = attr->qp_access_flags;
803
804 if (attr_mask & IB_QP_AV) {
805 qp->remote_ah_attr = attr->ah_attr;
806 qp->s_srate = attr->ah_attr.static_rate;
807 qp->srate_mbps = ib_rate_to_mbps(qp->s_srate);
d7b8ba51
MM		 808 qp->s_sc = ah_to_sc(ibqp->device, &qp->remote_ah_attr);
809 qp->s_sde = qp_to_sdma_engine(qp, qp->s_sc);
77241056
MM		 810 }
811
812 if (attr_mask & IB_QP_ALT_PATH) {
813 qp->alt_ah_attr = attr->alt_ah_attr;
814 qp->s_alt_pkey_index = attr->alt_pkey_index;
815 }
816
817 if (attr_mask & IB_QP_PATH_MIG_STATE) {
818 qp->s_mig_state = attr->path_mig_state;
819 if (mig) {
820 qp->remote_ah_attr = qp->alt_ah_attr;
821 qp->port_num = qp->alt_ah_attr.port_num;
822 qp->s_pkey_index = qp->s_alt_pkey_index;
823 qp->s_flags |= HFI1_S_AHG_CLEAR;
d7b8ba51
MM		 824 qp->s_sc = ah_to_sc(ibqp->device, &qp->remote_ah_attr);
825 qp->s_sde = qp_to_sdma_engine(qp, qp->s_sc);
77241056
MM		 826 }
827 }
828
829 if (attr_mask & IB_QP_PATH_MTU) {
830 struct hfi1_ibport *ibp;
831 u8 sc, vl;
832 u32 mtu;
833
834 dd = dd_from_dev(dev);
835 ibp = &dd->pport[qp->port_num - 1].ibport_data;
836
837 sc = ibp->sl_to_sc[qp->remote_ah_attr.sl];
838 vl = sc_to_vlt(dd, sc);
839
840 mtu = verbs_mtu_enum_to_int(ibqp->device, pmtu);
841 if (vl < PER_VL_SEND_CONTEXTS)
842 mtu = min_t(u32, mtu, dd->vld[vl].mtu);
843 pmtu = mtu_to_enum(mtu, OPA_MTU_8192);
844
845 qp->path_mtu = pmtu;
846 qp->pmtu = mtu;
847 }
848
849 if (attr_mask & IB_QP_RETRY_CNT) {
850 qp->s_retry_cnt = attr->retry_cnt;
851 qp->s_retry = attr->retry_cnt;
852 }
853
854 if (attr_mask & IB_QP_RNR_RETRY) {
855 qp->s_rnr_retry_cnt = attr->rnr_retry;
856 qp->s_rnr_retry = attr->rnr_retry;
857 }
858
859 if (attr_mask & IB_QP_MIN_RNR_TIMER)
860 qp->r_min_rnr_timer = attr->min_rnr_timer;
861
862 if (attr_mask & IB_QP_TIMEOUT) {
863 qp->timeout = attr->timeout;
864 qp->timeout_jiffies =
865 usecs_to_jiffies((4096UL * (1UL << qp->timeout)) /
866 1000UL);
867 }
868
869 if (attr_mask & IB_QP_QKEY)
870 qp->qkey = attr->qkey;
871
872 if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC)
873 qp->r_max_rd_atomic = attr->max_dest_rd_atomic;
874
875 if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC)
876 qp->s_max_rd_atomic = attr->max_rd_atomic;
877
878 spin_unlock(&qp->s_lock);
879 spin_unlock_irq(&qp->r_lock);
880
881 if (cur_state == IB_QPS_RESET && new_state == IB_QPS_INIT)
882 insert_qp(dev, qp);
883
884 if (lastwqe) {
885 ev.device = qp->ibqp.device;
886 ev.element.qp = &qp->ibqp;
887 ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
888 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
889 }
890 if (mig) {
891 ev.device = qp->ibqp.device;
892 ev.element.qp = &qp->ibqp;
893 ev.event = IB_EVENT_PATH_MIG;
894 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
895 }
896 ret = 0;
897 goto bail;
898
899inval:
900 spin_unlock(&qp->s_lock);
901 spin_unlock_irq(&qp->r_lock);
902 ret = -EINVAL;
903
904bail:
905 return ret;
906}
907
908int hfi1_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
909 int attr_mask, struct ib_qp_init_attr *init_attr)
910{
911 struct hfi1_qp *qp = to_iqp(ibqp);
912
913 attr->qp_state = qp->state;
914 attr->cur_qp_state = attr->qp_state;
915 attr->path_mtu = qp->path_mtu;
916 attr->path_mig_state = qp->s_mig_state;
917 attr->qkey = qp->qkey;
918 attr->rq_psn = mask_psn(qp->r_psn);
919 attr->sq_psn = mask_psn(qp->s_next_psn);
920 attr->dest_qp_num = qp->remote_qpn;
921 attr->qp_access_flags = qp->qp_access_flags;
922 attr->cap.max_send_wr = qp->s_size - 1;
923 attr->cap.max_recv_wr = qp->ibqp.srq ? 0 : qp->r_rq.size - 1;
924 attr->cap.max_send_sge = qp->s_max_sge;
925 attr->cap.max_recv_sge = qp->r_rq.max_sge;
926 attr->cap.max_inline_data = 0;
927 attr->ah_attr = qp->remote_ah_attr;
928 attr->alt_ah_attr = qp->alt_ah_attr;
929 attr->pkey_index = qp->s_pkey_index;
930 attr->alt_pkey_index = qp->s_alt_pkey_index;
931 attr->en_sqd_async_notify = 0;
932 attr->sq_draining = qp->s_draining;
933 attr->max_rd_atomic = qp->s_max_rd_atomic;
934 attr->max_dest_rd_atomic = qp->r_max_rd_atomic;
935 attr->min_rnr_timer = qp->r_min_rnr_timer;
936 attr->port_num = qp->port_num;
937 attr->timeout = qp->timeout;
938 attr->retry_cnt = qp->s_retry_cnt;
939 attr->rnr_retry = qp->s_rnr_retry_cnt;
940 attr->alt_port_num = qp->alt_ah_attr.port_num;
941 attr->alt_timeout = qp->alt_timeout;
942
943 init_attr->event_handler = qp->ibqp.event_handler;
944 init_attr->qp_context = qp->ibqp.qp_context;
945 init_attr->send_cq = qp->ibqp.send_cq;
946 init_attr->recv_cq = qp->ibqp.recv_cq;
947 init_attr->srq = qp->ibqp.srq;
948 init_attr->cap = attr->cap;
949 if (qp->s_flags & HFI1_S_SIGNAL_REQ_WR)
950 init_attr->sq_sig_type = IB_SIGNAL_REQ_WR;
951 else
952 init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
953 init_attr->qp_type = qp->ibqp.qp_type;
954 init_attr->port_num = qp->port_num;
955 return 0;
956}
957
958/**
959 * hfi1_compute_aeth - compute the AETH (syndrome + MSN)
960 * @qp: the queue pair to compute the AETH for
961 *
962 * Returns the AETH.
963 */
964__be32 hfi1_compute_aeth(struct hfi1_qp *qp)
965{
966 u32 aeth = qp->r_msn & HFI1_MSN_MASK;
967
968 if (qp->ibqp.srq) {
969 /*
970 * Shared receive queues don't generate credits.
971 * Set the credit field to the invalid value.
972 */
973 aeth |= HFI1_AETH_CREDIT_INVAL << HFI1_AETH_CREDIT_SHIFT;
974 } else {
975 u32 min, max, x;
976 u32 credits;
977 struct hfi1_rwq *wq = qp->r_rq.wq;
978 u32 head;
979 u32 tail;
980
981 /* sanity check pointers before trusting them */
982 head = wq->head;
983 if (head >= qp->r_rq.size)
984 head = 0;
985 tail = wq->tail;
986 if (tail >= qp->r_rq.size)
987 tail = 0;
988 /*
989 * Compute the number of credits available (RWQEs).
990 * There is a small chance that the pair of reads are
991 * not atomic, which is OK, since the fuzziness is
992 * resolved as further ACKs go out.
993 */
994 credits = head - tail;
995 if ((int)credits < 0)
996 credits += qp->r_rq.size;
997 /*
998 * Binary search the credit table to find the code to
999 * use.
1000 */
1001 min = 0;
1002 max = 31;
1003 for (;;) {
1004 x = (min + max) / 2;
1005 if (credit_table[x] == credits)
1006 break;
1007 if (credit_table[x] > credits)
1008 max = x;
1009 else if (min == x)
1010 break;
1011 else
1012 min = x;
1013 }
1014 aeth |= x << HFI1_AETH_CREDIT_SHIFT;
1015 }
1016 return cpu_to_be32(aeth);
1017}
1018
1019/**
1020 * hfi1_create_qp - create a queue pair for a device
1021 * @ibpd: the protection domain who's device we create the queue pair for
1022 * @init_attr: the attributes of the queue pair
1023 * @udata: user data for libibverbs.so
1024 *
1025 * Returns the queue pair on success, otherwise returns an errno.
1026 *
1027 * Called by the ib_create_qp() core verbs function.
1028 */
1029struct ib_qp *hfi1_create_qp(struct ib_pd *ibpd,
1030 struct ib_qp_init_attr *init_attr,
1031 struct ib_udata *udata)
1032{
1033 struct hfi1_qp *qp;
1034 int err;
1035 struct hfi1_swqe *swq = NULL;
1036 struct hfi1_ibdev *dev;
1037 struct hfi1_devdata *dd;
1038 size_t sz;
1039 size_t sg_list_sz;
1040 struct ib_qp *ret;
1041
1042 if (init_attr->cap.max_send_sge > hfi1_max_sges ||
1043 init_attr->cap.max_send_wr > hfi1_max_qp_wrs ||
1044 init_attr->create_flags) {
1045 ret = ERR_PTR(-EINVAL);
1046 goto bail;
1047 }
1048
1049 /* Check receive queue parameters if no SRQ is specified. */
1050 if (!init_attr->srq) {
1051 if (init_attr->cap.max_recv_sge > hfi1_max_sges ||
1052 init_attr->cap.max_recv_wr > hfi1_max_qp_wrs) {
1053 ret = ERR_PTR(-EINVAL);
1054 goto bail;
1055 }
1056 if (init_attr->cap.max_send_sge +
1057 init_attr->cap.max_send_wr +
1058 init_attr->cap.max_recv_sge +
1059 init_attr->cap.max_recv_wr == 0) {
1060 ret = ERR_PTR(-EINVAL);
1061 goto bail;
1062 }
1063 }
1064
1065 switch (init_attr->qp_type) {
1066 case IB_QPT_SMI:
1067 case IB_QPT_GSI:
1068 if (init_attr->port_num == 0 ||
1069 init_attr->port_num > ibpd->device->phys_port_cnt) {
1070 ret = ERR_PTR(-EINVAL);
1071 goto bail;
1072 }
1073 case IB_QPT_UC:
1074 case IB_QPT_RC:
1075 case IB_QPT_UD:
1076 sz = sizeof(struct hfi1_sge) *
1077 init_attr->cap.max_send_sge +
1078 sizeof(struct hfi1_swqe);
1079 swq = vmalloc((init_attr->cap.max_send_wr + 1) * sz);
1080 if (swq == NULL) {
1081 ret = ERR_PTR(-ENOMEM);
1082 goto bail;
1083 }
1084 sz = sizeof(*qp);
1085 sg_list_sz = 0;
1086 if (init_attr->srq) {
1087 struct hfi1_srq *srq = to_isrq(init_attr->srq);
1088
1089 if (srq->rq.max_sge > 1)
1090 sg_list_sz = sizeof(*qp->r_sg_list) *
1091 (srq->rq.max_sge - 1);
1092 } else if (init_attr->cap.max_recv_sge > 1)
1093 sg_list_sz = sizeof(*qp->r_sg_list) *
1094 (init_attr->cap.max_recv_sge - 1);
1095 qp = kzalloc(sz + sg_list_sz, GFP_KERNEL);
1096 if (!qp) {
1097 ret = ERR_PTR(-ENOMEM);
1098 goto bail_swq;
1099 }
1100 RCU_INIT_POINTER(qp->next, NULL);
1101 qp->s_hdr = kzalloc(sizeof(*qp->s_hdr), GFP_KERNEL);
1102 if (!qp->s_hdr) {
1103 ret = ERR_PTR(-ENOMEM);
1104 goto bail_qp;
1105 }
1106 qp->timeout_jiffies =
1107 usecs_to_jiffies((4096UL * (1UL << qp->timeout)) /
1108 1000UL);
1109 if (init_attr->srq)
1110 sz = 0;
1111 else {
1112 qp->r_rq.size = init_attr->cap.max_recv_wr + 1;
1113 qp->r_rq.max_sge = init_attr->cap.max_recv_sge;
1114 sz = (sizeof(struct ib_sge) * qp->r_rq.max_sge) +
1115 sizeof(struct hfi1_rwqe);
1116 qp->r_rq.wq = vmalloc_user(sizeof(struct hfi1_rwq) +
1117 qp->r_rq.size * sz);
1118 if (!qp->r_rq.wq) {
1119 ret = ERR_PTR(-ENOMEM);
1120 goto bail_qp;
1121 }
1122 }
1123
1124 /*
1125 * ib_create_qp() will initialize qp->ibqp
1126 * except for qp->ibqp.qp_num.
1127 */
1128 spin_lock_init(&qp->r_lock);
1129 spin_lock_init(&qp->s_lock);
1130 spin_lock_init(&qp->r_rq.lock);
1131 atomic_set(&qp->refcount, 0);
1132 init_waitqueue_head(&qp->wait);
1133 init_timer(&qp->s_timer);
1134 qp->s_timer.data = (unsigned long)qp;
1135 INIT_LIST_HEAD(&qp->rspwait);
1136 qp->state = IB_QPS_RESET;
1137 qp->s_wq = swq;
1138 qp->s_size = init_attr->cap.max_send_wr + 1;
1139 qp->s_max_sge = init_attr->cap.max_send_sge;
1140 if (init_attr->sq_sig_type == IB_SIGNAL_REQ_WR)
1141 qp->s_flags = HFI1_S_SIGNAL_REQ_WR;
1142 dev = to_idev(ibpd->device);
1143 dd = dd_from_dev(dev);
1144 err = alloc_qpn(dd, &dev->qp_dev->qpn_table, init_attr->qp_type,
1145 init_attr->port_num);
1146 if (err < 0) {
1147 ret = ERR_PTR(err);
1148 vfree(qp->r_rq.wq);
1149 goto bail_qp;
1150 }
1151 qp->ibqp.qp_num = err;
1152 qp->port_num = init_attr->port_num;
1153 reset_qp(qp, init_attr->qp_type);
1154
1155 break;
1156
1157 default:
1158 /* Don't support raw QPs */
1159 ret = ERR_PTR(-ENOSYS);
1160 goto bail;
1161 }
1162
1163 init_attr->cap.max_inline_data = 0;
1164
1165 /*
1166 * Return the address of the RWQ as the offset to mmap.
1167 * See hfi1_mmap() for details.
1168 */
1169 if (udata && udata->outlen >= sizeof(__u64)) {
1170 if (!qp->r_rq.wq) {
1171 __u64 offset = 0;
1172
1173 err = ib_copy_to_udata(udata, &offset,
1174 sizeof(offset));
1175 if (err) {
1176 ret = ERR_PTR(err);
1177 goto bail_ip;
1178 }
1179 } else {
1180 u32 s = sizeof(struct hfi1_rwq) + qp->r_rq.size * sz;
1181
1182 qp->ip = hfi1_create_mmap_info(dev, s,
1183 ibpd->uobject->context,
1184 qp->r_rq.wq);
1185 if (!qp->ip) {
1186 ret = ERR_PTR(-ENOMEM);
1187 goto bail_ip;
1188 }
1189
1190 err = ib_copy_to_udata(udata, &(qp->ip->offset),
1191 sizeof(qp->ip->offset));
1192 if (err) {
1193 ret = ERR_PTR(err);
1194 goto bail_ip;
1195 }
1196 }
1197 }
1198
1199 spin_lock(&dev->n_qps_lock);
1200 if (dev->n_qps_allocated == hfi1_max_qps) {
1201 spin_unlock(&dev->n_qps_lock);
1202 ret = ERR_PTR(-ENOMEM);
1203 goto bail_ip;
1204 }
1205
1206 dev->n_qps_allocated++;
1207 spin_unlock(&dev->n_qps_lock);
1208
1209 if (qp->ip) {
1210 spin_lock_irq(&dev->pending_lock);
1211 list_add(&qp->ip->pending_mmaps, &dev->pending_mmaps);
1212 spin_unlock_irq(&dev->pending_lock);
1213 }
1214
1215 ret = &qp->ibqp;
1216
1217 /*
1218 * We have our QP and its good, now keep track of what types of opcodes
1219 * can be processed on this QP. We do this by keeping track of what the
1220 * 3 high order bits of the opcode are.
1221 */
1222 switch (init_attr->qp_type) {
1223 case IB_QPT_SMI:
1224 case IB_QPT_GSI:
1225 case IB_QPT_UD:
1226 qp->allowed_ops = IB_OPCODE_UD_SEND_ONLY & OPCODE_QP_MASK;
1227 break;
1228 case IB_QPT_RC:
1229 qp->allowed_ops = IB_OPCODE_RC_SEND_ONLY & OPCODE_QP_MASK;
1230 break;
1231 case IB_QPT_UC:
1232 qp->allowed_ops = IB_OPCODE_UC_SEND_ONLY & OPCODE_QP_MASK;
1233 break;
1234 default:
1235 ret = ERR_PTR(-EINVAL);
1236 goto bail_ip;
1237 }
1238
1239 goto bail;
1240
1241bail_ip:
1242 if (qp->ip)
1243 kref_put(&qp->ip->ref, hfi1_release_mmap_info);
1244 else
1245 vfree(qp->r_rq.wq);
1246 free_qpn(&dev->qp_dev->qpn_table, qp->ibqp.qp_num);
1247bail_qp:
1248 kfree(qp->s_hdr);
1249 kfree(qp);
1250bail_swq:
1251 vfree(swq);
1252bail:
1253 return ret;
1254}
1255
1256/**
1257 * hfi1_destroy_qp - destroy a queue pair
1258 * @ibqp: the queue pair to destroy
1259 *
1260 * Returns 0 on success.
1261 *
1262 * Note that this can be called while the QP is actively sending or
1263 * receiving!
1264 */
1265int hfi1_destroy_qp(struct ib_qp *ibqp)
1266{
1267 struct hfi1_qp *qp = to_iqp(ibqp);
1268 struct hfi1_ibdev *dev = to_idev(ibqp->device);
1269
1270 /* Make sure HW and driver activity is stopped. */
1271 spin_lock_irq(&qp->r_lock);
1272 spin_lock(&qp->s_lock);
1273 if (qp->state != IB_QPS_RESET) {
1274 qp->state = IB_QPS_RESET;
1275 flush_iowait(qp);
1276 qp->s_flags &= ~(HFI1_S_TIMER | HFI1_S_ANY_WAIT);
1277 spin_unlock(&qp->s_lock);
1278 spin_unlock_irq(&qp->r_lock);
1279 cancel_work_sync(&qp->s_iowait.iowork);
1280 del_timer_sync(&qp->s_timer);
1281 iowait_sdma_drain(&qp->s_iowait);
1282 flush_tx_list(qp);
1283 remove_qp(dev, qp);
1284 wait_event(qp->wait, !atomic_read(&qp->refcount));
1285 spin_lock_irq(&qp->r_lock);
1286 spin_lock(&qp->s_lock);
1287 clear_mr_refs(qp, 1);
1288 clear_ahg(qp);
1289 }
1290 spin_unlock(&qp->s_lock);
1291 spin_unlock_irq(&qp->r_lock);
1292
1293 /* all user's cleaned up, mark it available */
1294 free_qpn(&dev->qp_dev->qpn_table, qp->ibqp.qp_num);
1295 spin_lock(&dev->n_qps_lock);
1296 dev->n_qps_allocated--;
1297 spin_unlock(&dev->n_qps_lock);
1298
1299 if (qp->ip)
1300 kref_put(&qp->ip->ref, hfi1_release_mmap_info);
1301 else
1302 vfree(qp->r_rq.wq);
1303 vfree(qp->s_wq);
1304 kfree(qp->s_hdr);
1305 kfree(qp);
1306 return 0;
1307}
1308
1309/**
1310 * init_qpn_table - initialize the QP number table for a device
1311 * @qpt: the QPN table
1312 */
1313static int init_qpn_table(struct hfi1_devdata *dd, struct hfi1_qpn_table *qpt)
1314{
1315 u32 offset, qpn, i;
1316 struct qpn_map *map;
1317 int ret = 0;
1318
1319 spin_lock_init(&qpt->lock);
1320
1321 qpt->last = 0;
1322 qpt->incr = 1 << dd->qos_shift;
1323
1324 /* insure we don't assign QPs from KDETH 64K window */
1325 qpn = kdeth_qp << 16;
1326 qpt->nmaps = qpn / BITS_PER_PAGE;
1327 /* This should always be zero */
1328 offset = qpn & BITS_PER_PAGE_MASK;
1329 map = &qpt->map[qpt->nmaps];
1330 dd_dev_info(dd, "Reserving QPNs for KDETH window from 0x%x to 0x%x\n",
1331 qpn, qpn + 65535);
1332 for (i = 0; i < 65536; i++) {
1333 if (!map->page) {
1334 get_map_page(qpt, map);
1335 if (!map->page) {
1336 ret = -ENOMEM;
1337 break;
1338 }
1339 }
1340 set_bit(offset, map->page);
1341 offset++;
1342 if (offset == BITS_PER_PAGE) {
1343 /* next page */
1344 qpt->nmaps++;
1345 map++;
1346 offset = 0;
1347 }
1348 }
1349 return ret;
1350}
1351
1352/**
1353 * free_qpn_table - free the QP number table for a device
1354 * @qpt: the QPN table
1355 */
1356static void free_qpn_table(struct hfi1_qpn_table *qpt)
1357{
1358 int i;
1359
1360 for (i = 0; i < ARRAY_SIZE(qpt->map); i++)
1361 free_page((unsigned long) qpt->map[i].page);
1362}
1363
1364/**
1365 * hfi1_get_credit - flush the send work queue of a QP
1366 * @qp: the qp who's send work queue to flush
1367 * @aeth: the Acknowledge Extended Transport Header
1368 *
1369 * The QP s_lock should be held.
1370 */
1371void hfi1_get_credit(struct hfi1_qp *qp, u32 aeth)
1372{
1373 u32 credit = (aeth >> HFI1_AETH_CREDIT_SHIFT) & HFI1_AETH_CREDIT_MASK;
1374
1375 /*
1376 * If the credit is invalid, we can send
1377 * as many packets as we like. Otherwise, we have to
1378 * honor the credit field.
1379 */
1380 if (credit == HFI1_AETH_CREDIT_INVAL) {
1381 if (!(qp->s_flags & HFI1_S_UNLIMITED_CREDIT)) {
1382 qp->s_flags |= HFI1_S_UNLIMITED_CREDIT;
1383 if (qp->s_flags & HFI1_S_WAIT_SSN_CREDIT) {
1384 qp->s_flags &= ~HFI1_S_WAIT_SSN_CREDIT;
1385 hfi1_schedule_send(qp);
1386 }
1387 }
1388 } else if (!(qp->s_flags & HFI1_S_UNLIMITED_CREDIT)) {
1389 /* Compute new LSN (i.e., MSN + credit) */
1390 credit = (aeth + credit_table[credit]) & HFI1_MSN_MASK;
1391 if (cmp_msn(credit, qp->s_lsn) > 0) {
1392 qp->s_lsn = credit;
1393 if (qp->s_flags & HFI1_S_WAIT_SSN_CREDIT) {
1394 qp->s_flags &= ~HFI1_S_WAIT_SSN_CREDIT;
1395 hfi1_schedule_send(qp);
1396 }
1397 }
1398 }
1399}
1400
1401void hfi1_qp_wakeup(struct hfi1_qp *qp, u32 flag)
1402{
1403 unsigned long flags;
1404
1405 spin_lock_irqsave(&qp->s_lock, flags);
1406 if (qp->s_flags & flag) {
1407 qp->s_flags &= ~flag;
1408 trace_hfi1_qpwakeup(qp, flag);
1409 hfi1_schedule_send(qp);
1410 }
1411 spin_unlock_irqrestore(&qp->s_lock, flags);
1412 /* Notify hfi1_destroy_qp() if it is waiting. */
1413 if (atomic_dec_and_test(&qp->refcount))
1414 wake_up(&qp->wait);
1415}
1416
1417static int iowait_sleep(
1418 struct sdma_engine *sde,
1419 struct iowait *wait,
1420 struct sdma_txreq *stx,
1421 unsigned seq)
1422{
1423 struct verbs_txreq *tx = container_of(stx, struct verbs_txreq, txreq);
1424 struct hfi1_qp *qp;
1425 unsigned long flags;
1426 int ret = 0;
1427 struct hfi1_ibdev *dev;
1428
1429 qp = tx->qp;
1430
1431 spin_lock_irqsave(&qp->s_lock, flags);
1432 if (ib_hfi1_state_ops[qp->state] & HFI1_PROCESS_RECV_OK) {
1433
1434 /*
1435 * If we couldn't queue the DMA request, save the info
1436 * and try again later rather than destroying the
1437 * buffer and undoing the side effects of the copy.
1438 */
1439 /* Make a common routine? */
1440 dev = &sde->dd->verbs_dev;
1441 list_add_tail(&stx->list, &wait->tx_head);
1442 write_seqlock(&dev->iowait_lock);
1443 if (sdma_progress(sde, seq, stx))
1444 goto eagain;
1445 if (list_empty(&qp->s_iowait.list)) {
1446 struct hfi1_ibport *ibp =
1447 to_iport(qp->ibqp.device, qp->port_num);
1448
1449 ibp->n_dmawait++;
1450 qp->s_flags |= HFI1_S_WAIT_DMA_DESC;
1451 list_add_tail(&qp->s_iowait.list, &sde->dmawait);
1452 trace_hfi1_qpsleep(qp, HFI1_S_WAIT_DMA_DESC);
1453 atomic_inc(&qp->refcount);
1454 }
1455 write_sequnlock(&dev->iowait_lock);
1456 qp->s_flags &= ~HFI1_S_BUSY;
1457 spin_unlock_irqrestore(&qp->s_lock, flags);
1458 ret = -EBUSY;
1459 } else {
1460 spin_unlock_irqrestore(&qp->s_lock, flags);
1461 hfi1_put_txreq(tx);
1462 }
1463 return ret;
1464eagain:
1465 write_sequnlock(&dev->iowait_lock);
1466 spin_unlock_irqrestore(&qp->s_lock, flags);
1467 list_del_init(&stx->list);
1468 return -EAGAIN;
1469}
1470
1471static void iowait_wakeup(struct iowait *wait, int reason)
1472{
1473 struct hfi1_qp *qp = container_of(wait, struct hfi1_qp, s_iowait);
1474
1475 WARN_ON(reason != SDMA_AVAIL_REASON);
1476 hfi1_qp_wakeup(qp, HFI1_S_WAIT_DMA_DESC);
1477}
1478
1479int hfi1_qp_init(struct hfi1_ibdev *dev)
1480{
1481 struct hfi1_devdata *dd = dd_from_dev(dev);
1482 int i;
1483 int ret = -ENOMEM;
1484
1485 /* allocate parent object */
1486 dev->qp_dev = kzalloc(sizeof(*dev->qp_dev), GFP_KERNEL);
1487 if (!dev->qp_dev)
1488 goto nomem;
1489 /* allocate hash table */
1490 dev->qp_dev->qp_table_size = hfi1_qp_table_size;
1491 dev->qp_dev->qp_table_bits = ilog2(hfi1_qp_table_size);
1492 dev->qp_dev->qp_table =
1493 kmalloc(dev->qp_dev->qp_table_size *
1494 sizeof(*dev->qp_dev->qp_table),
1495 GFP_KERNEL);
1496 if (!dev->qp_dev->qp_table)
1497 goto nomem;
1498 for (i = 0; i < dev->qp_dev->qp_table_size; i++)
1499 RCU_INIT_POINTER(dev->qp_dev->qp_table[i], NULL);
1500 spin_lock_init(&dev->qp_dev->qpt_lock);
1501 /* initialize qpn map */
1502 ret = init_qpn_table(dd, &dev->qp_dev->qpn_table);
1503 if (ret)
1504 goto nomem;
1505 return ret;
1506nomem:
1507 if (dev->qp_dev) {
1508 kfree(dev->qp_dev->qp_table);
1509 free_qpn_table(&dev->qp_dev->qpn_table);
1510 kfree(dev->qp_dev);
1511 }
1512 return ret;
1513}
1514
1515void hfi1_qp_exit(struct hfi1_ibdev *dev)
1516{
1517 struct hfi1_devdata *dd = dd_from_dev(dev);
1518 u32 qps_inuse;
1519
1520 qps_inuse = free_all_qps(dd);
1521 if (qps_inuse)
1522 dd_dev_err(dd, "QP memory leak! %u still in use\n",
1523 qps_inuse);
1524 if (dev->qp_dev) {
1525 kfree(dev->qp_dev->qp_table);
1526 free_qpn_table(&dev->qp_dev->qpn_table);
1527 kfree(dev->qp_dev);
1528 }
1529}
1530
1531/**
1532 *
1533 * qp_to_sdma_engine - map a qp to a send engine
1534 * @qp: the QP
1535 * @sc5: the 5 bit sc
1536 *
1537 * Return:
1538 * A send engine for the qp or NULL for SMI type qp.
1539 */
1540struct sdma_engine *qp_to_sdma_engine(struct hfi1_qp *qp, u8 sc5)
1541{
1542 struct hfi1_devdata *dd = dd_from_ibdev(qp->ibqp.device);
1543 struct sdma_engine *sde;
1544
1545 if (!(dd->flags & HFI1_HAS_SEND_DMA))
1546 return NULL;
1547 switch (qp->ibqp.qp_type) {
77241056
MM		 1548 case IB_QPT_SMI:
1549 return NULL;
1550 default:
1551 break;
1552 }
1553 sde = sdma_select_engine_sc(dd, qp->ibqp.qp_num >> dd->qos_shift, sc5);
1554 return sde;
1555}
1556
1557struct qp_iter {
1558 struct hfi1_ibdev *dev;
1559 struct hfi1_qp *qp;
1560 int specials;
1561 int n;
1562};
1563
1564struct qp_iter *qp_iter_init(struct hfi1_ibdev *dev)
1565{
1566 struct qp_iter *iter;
1567
1568 iter = kzalloc(sizeof(*iter), GFP_KERNEL);
1569 if (!iter)
1570 return NULL;
1571
1572 iter->dev = dev;
1573 iter->specials = dev->ibdev.phys_port_cnt * 2;
1574 if (qp_iter_next(iter)) {
1575 kfree(iter);
1576 return NULL;
1577 }
1578
1579 return iter;
1580}
1581
1582int qp_iter_next(struct qp_iter *iter)
1583{
1584 struct hfi1_ibdev *dev = iter->dev;
1585 int n = iter->n;
1586 int ret = 1;
1587 struct hfi1_qp *pqp = iter->qp;
1588 struct hfi1_qp *qp;
1589
1590 /*
1591 * The approach is to consider the special qps
1592 * as an additional table entries before the
1593 * real hash table. Since the qp code sets
1594 * the qp->next hash link to NULL, this works just fine.
1595 *
1596 * iter->specials is 2 * # ports
1597 *
1598 * n = 0..iter->specials is the special qp indices
1599 *
1600 * n = iter->specials..dev->qp_dev->qp_table_size+iter->specials are
1601 * the potential hash bucket entries
1602 *
1603 */
1604 for (; n < dev->qp_dev->qp_table_size + iter->specials; n++) {
1605 if (pqp) {
1606 qp = rcu_dereference(pqp->next);
1607 } else {
1608 if (n < iter->specials) {
1609 struct hfi1_pportdata *ppd;
1610 struct hfi1_ibport *ibp;
1611 int pidx;
1612
1613 pidx = n % dev->ibdev.phys_port_cnt;
1614 ppd = &dd_from_dev(dev)->pport[pidx];
1615 ibp = &ppd->ibport_data;
1616
1617 if (!(n & 1))
1618 qp = rcu_dereference(ibp->qp[0]);
1619 else
1620 qp = rcu_dereference(ibp->qp[1]);
1621 } else {
1622 qp = rcu_dereference(
1623 dev->qp_dev->qp_table[
1624 (n - iter->specials)]);
1625 }
1626 }
1627 pqp = qp;
1628 if (qp) {
1629 iter->qp = qp;
1630 iter->n = n;
1631 return 0;
1632 }
1633 }
1634 return ret;
1635}
1636
1637static const char * const qp_type_str[] = {
1638 "SMI", "GSI", "RC", "UC", "UD",
1639};
1640
1641static int qp_idle(struct hfi1_qp *qp)
1642{
1643 return
1644 qp->s_last == qp->s_acked &&
1645 qp->s_acked == qp->s_cur &&
1646 qp->s_cur == qp->s_tail &&
1647 qp->s_tail == qp->s_head;
1648}
1649
1650void qp_iter_print(struct seq_file *s, struct qp_iter *iter)
1651{
1652 struct hfi1_swqe *wqe;
1653 struct hfi1_qp *qp = iter->qp;
1654 struct sdma_engine *sde;
1655
1656 sde = qp_to_sdma_engine(qp, qp->s_sc);
1657 wqe = get_swqe_ptr(qp, qp->s_last);
1658 seq_printf(s,
1659 "N %d %s QP%u R %u %s %u %u %u f=%x %u %u %u %u %u PSN %x %x %x %x %x (%u %u %u %u %u %u) QP%u LID %x SL %u MTU %d %u %u %u SDE %p,%u\n",
1660 iter->n,
1661 qp_idle(qp) ? "I" : "B",
1662 qp->ibqp.qp_num,
1663 atomic_read(&qp->refcount),
1664 qp_type_str[qp->ibqp.qp_type],
1665 qp->state,
1666 wqe ? wqe->wr.opcode : 0,
1667 qp->s_hdrwords,
1668 qp->s_flags,
1669 atomic_read(&qp->s_iowait.sdma_busy),
1670 !list_empty(&qp->s_iowait.list),
1671 qp->timeout,
1672 wqe ? wqe->ssn : 0,
1673 qp->s_lsn,
1674 qp->s_last_psn,
1675 qp->s_psn, qp->s_next_psn,
1676 qp->s_sending_psn, qp->s_sending_hpsn,
1677 qp->s_last, qp->s_acked, qp->s_cur,
1678 qp->s_tail, qp->s_head, qp->s_size,
1679 qp->remote_qpn,
1680 qp->remote_ah_attr.dlid,
1681 qp->remote_ah_attr.sl,
1682 qp->pmtu,
1683 qp->s_retry_cnt,
1684 qp->timeout,
1685 qp->s_rnr_retry_cnt,
1686 sde,
1687 sde ? sde->this_idx : 0);
1688}
1689
1690void qp_comm_est(struct hfi1_qp *qp)
1691{
1692 qp->r_flags |= HFI1_R_COMM_EST;
1693 if (qp->ibqp.event_handler) {
1694 struct ib_event ev;
1695
1696 ev.device = qp->ibqp.device;
1697 ev.element.qp = &qp->ibqp;
1698 ev.event = IB_EVENT_COMM_EST;
1699 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
1700 }
1701}
c2f3ffb0
MM		 1702
1703/*
1704 * Switch to alternate path.
1705 * The QP s_lock should be held and interrupts disabled.
1706 */
1707void hfi1_migrate_qp(struct hfi1_qp *qp)
1708{
1709 struct ib_event ev;
1710
1711 qp->s_mig_state = IB_MIG_MIGRATED;
1712 qp->remote_ah_attr = qp->alt_ah_attr;
1713 qp->port_num = qp->alt_ah_attr.port_num;
1714 qp->s_pkey_index = qp->s_alt_pkey_index;
1715 qp->s_flags |= HFI1_S_AHG_CLEAR;
d7b8ba51
MM		 1716 qp->s_sc = ah_to_sc(qp->ibqp.device, &qp->remote_ah_attr);
1717 qp->s_sde = qp_to_sdma_engine(qp, qp->s_sc);
c2f3ffb0
MM		 1718
1719 ev.device = qp->ibqp.device;
1720 ev.element.qp = &qp->ibqp;
1721 ev.event = IB_EVENT_PATH_MIG;
1722 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
1723}
Linux kernel - Deliverables
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