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Staging: slicoss: Join split string.
[deliverable/linux.git] / drivers / staging / slicoss / slicoss.c
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4d6f6af8
GKH		 1/**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39/*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
493b67b7 50 * The driver was actually tested on Oasis and Kalahari cards.
4d6f6af8
GKH		 51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
4d6f6af8 57
4d6f6af8
GKH		 58#define KLUDGE_FOR_4GB_BOUNDARY 1
59#define DEBUG_MICROCODE 1
4d6f6af8 60#define DBG 1
4d6f6af8 61#define SLIC_INTERRUPT_PROCESS_LIMIT 1
4d6f6af8
GKH		 62#define SLIC_OFFLOAD_IP_CHECKSUM 1
63#define STATS_TIMER_INTERVAL 2
64#define PING_TIMER_INTERVAL 1
1f6876cf 65#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
4d6f6af8
GKH		 66
67#include <linux/kernel.h>
68#include <linux/string.h>
69#include <linux/errno.h>
70#include <linux/ioport.h>
71#include <linux/slab.h>
72#include <linux/interrupt.h>
73#include <linux/timer.h>
74#include <linux/pci.h>
75#include <linux/spinlock.h>
76#include <linux/init.h>
77#include <linux/bitops.h>
78#include <linux/io.h>
79#include <linux/netdevice.h>
97b3e0ed 80#include <linux/crc32.h>
4d6f6af8
GKH		 81#include <linux/etherdevice.h>
82#include <linux/skbuff.h>
83#include <linux/delay.h>
4d6f6af8
GKH		 84#include <linux/seq_file.h>
85#include <linux/kthread.h>
86#include <linux/module.h>
87#include <linux/moduleparam.h>
88
470c5736 89#include <linux/firmware.h>
4d6f6af8 90#include <linux/types.h>
4d6f6af8 91#include <linux/dma-mapping.h>
4d6f6af8
GKH		 92#include <linux/mii.h>
93#include <linux/if_vlan.h>
4d6f6af8
GKH		 94#include <asm/unaligned.h>
95
96#include <linux/ethtool.h>
4d6f6af8 97#include <linux/uaccess.h>
77faefa3
GKH		 98#include "slichw.h"
99#include "slic.h"
100
4d6f6af8 101static uint slic_first_init = 1;
1cd0989e 102static char *slic_banner = "Alacritech SLIC Technology(tm) Server and Storage Accelerator (Non-Accelerated)";
4d6f6af8
GKH		 103
104static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
4d6f6af8 105
e9eff9d6 106static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
4d6f6af8
GKH		 107static int intagg_delay = 100;
108static u32 dynamic_intagg;
4d6f6af8 109static unsigned int rcv_count;
4d6f6af8
GKH		 110
111#define DRV_NAME "slicoss"
112#define DRV_VERSION "2.0.1"
113#define DRV_AUTHOR "Alacritech, Inc. Engineering"
114#define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
115 "Non-Accelerated Driver"
116#define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
117 "All rights reserved."
118#define PFX DRV_NAME " "
119
120MODULE_AUTHOR(DRV_AUTHOR);
121MODULE_DESCRIPTION(DRV_DESCRIPTION);
122MODULE_LICENSE("Dual BSD/GPL");
123
124module_param(dynamic_intagg, int, 0);
125MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
126module_param(intagg_delay, int, 0);
127MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
128
41e043fc 129static const struct pci_device_id slic_pci_tbl[] = {
5d372900 130 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
131 { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
132 { 0 }
4d6f6af8
GKH		 133};
134
135MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
136
62f691a3 137static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
4d6f6af8
GKH		 138{
139 writel(value, reg);
140 if (flush)
141 mb();
142}
143
28980a3c
GKH		 144static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
145 u32 value, void __iomem *regh, u32 paddrh,
146 bool flush)
4d6f6af8 147{
e9eff9d6
LD		 148 spin_lock_irqsave(&adapter->bit64reglock.lock,
149 adapter->bit64reglock.flags);
4d6f6af8
GKH		 150 if (paddrh != adapter->curaddrupper) {
151 adapter->curaddrupper = paddrh;
152 writel(paddrh, regh);
153 }
154 writel(value, reg);
155 if (flush)
156 mb();
e9eff9d6
LD		 157 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
158 adapter->bit64reglock.flags);
4d6f6af8
GKH		 159}
160
4d6ea9c3
DK		 161static void slic_mcast_set_bit(struct adapter *adapter, char *address)
162{
163 unsigned char crcpoly;
4d6f6af8 164
4d6ea9c3 165 /* Get the CRC polynomial for the mac address */
97b3e0ed
PH		 166 /* we use bits 1-8 (lsb), bitwise reversed,
167 * msb (= lsb bit 0 before bitrev) is automatically discarded */
168 crcpoly = (ether_crc(ETH_ALEN, address)>>23);
4d6f6af8 169
4d6ea9c3
DK		 170 /* We only have space on the SLIC for 64 entries. Lop
171 * off the top two bits. (2^6 = 64)
172 */
173 crcpoly &= 0x3F;
4d6f6af8 174
4d6ea9c3
DK		 175 /* OR in the new bit into our 64 bit mask. */
176 adapter->mcastmask |= (u64) 1 << crcpoly;
177}
4d6f6af8 178
4d6ea9c3
DK		 179static void slic_mcast_set_mask(struct adapter *adapter)
180{
181 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 182
4d6ea9c3
DK		 183 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
184 /* Turn on all multicast addresses. We have to do this for
185 * promiscuous mode as well as ALLMCAST mode. It saves the
186 * Microcode from having to keep state about the MAC
187 * configuration.
188 */
189 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
190 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
191 FLUSH);
192 } else {
193 /* Commit our multicast mast to the SLIC by writing to the
194 * multicast address mask registers
195 */
196 slic_reg32_write(&slic_regs->slic_mcastlow,
197 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
198 slic_reg32_write(&slic_regs->slic_mcasthigh,
199 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
4d6f6af8 200 }
4d6ea9c3 201}
4d6f6af8 202
4d6ea9c3
DK		 203static void slic_timer_ping(ulong dev)
204{
205 struct adapter *adapter;
206 struct sliccard *card;
4d6f6af8 207
4d6ea9c3 208 adapter = netdev_priv((struct net_device *)dev);
4d6f6af8
GKH		 209 card = adapter->card;
210
4d6ea9c3
DK		 211 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
212 add_timer(&adapter->pingtimer);
213}
4d6f6af8 214
4d6ea9c3
DK		 215static void slic_unmap_mmio_space(struct adapter *adapter)
216{
217 if (adapter->slic_regs)
218 iounmap(adapter->slic_regs);
219 adapter->slic_regs = NULL;
220}
4d6f6af8 221
4d6ea9c3
DK		 222/*
223 * slic_link_config
224 *
225 * Write phy control to configure link duplex/speed
226 *
227 */
228static void slic_link_config(struct adapter *adapter,
229 u32 linkspeed, u32 linkduplex)
230{
231 u32 __iomem *wphy;
232 u32 speed;
233 u32 duplex;
234 u32 phy_config;
235 u32 phy_advreg;
236 u32 phy_gctlreg;
4d6f6af8 237
4d6ea9c3
DK		 238 if (adapter->state != ADAPT_UP)
239 return;
4d6f6af8 240
4d6ea9c3
DK		 241 if (linkspeed > LINK_1000MB)
242 linkspeed = LINK_AUTOSPEED;
243 if (linkduplex > LINK_AUTOD)
244 linkduplex = LINK_AUTOD;
4d6f6af8 245
4d6ea9c3 246 wphy = &adapter->slic_regs->slic_wphy;
4d6f6af8 247
4d6ea9c3
DK		 248 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
249 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
250 /* We've got a fiber gigabit interface, and register
251 * 4 is different in fiber mode than in copper mode
252 */
4d6f6af8 253
4d6ea9c3
DK		 254 /* advertise FD only @1000 Mb */
255 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
256 /* enable PAUSE frames */
257 phy_advreg |= PAR_ASYMPAUSE_FIBER;
258 slic_reg32_write(wphy, phy_advreg, FLUSH);
4d6f6af8 259
4d6ea9c3
DK		 260 if (linkspeed == LINK_AUTOSPEED) {
261 /* reset phy, enable auto-neg */
262 phy_config =
263 (MIICR_REG_PCR |
264 (PCR_RESET | PCR_AUTONEG |
265 PCR_AUTONEG_RST));
266 slic_reg32_write(wphy, phy_config, FLUSH);
267 } else { /* forced 1000 Mb FD*/
268 /* power down phy to break link
269 this may not work) */
270 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
271 slic_reg32_write(wphy, phy_config, FLUSH);
272 /* wait, Marvell says 1 sec,
273 try to get away with 10 ms */
274 mdelay(10);
4d6f6af8 275
4d6ea9c3
DK		 276 /* disable auto-neg, set speed/duplex,
277 soft reset phy, powerup */
278 phy_config =
279 (MIICR_REG_PCR |
280 (PCR_RESET | PCR_SPEED_1000 |
281 PCR_DUPLEX_FULL));
282 slic_reg32_write(wphy, phy_config, FLUSH);
283 }
284 } else { /* copper gigabit */
4d6f6af8 285
4d6ea9c3
DK		 286 /* Auto-Negotiate or 1000 Mb must be auto negotiated
287 * We've got a copper gigabit interface, and
288 * register 4 is different in copper mode than
289 * in fiber mode
290 */
291 if (linkspeed == LINK_AUTOSPEED) {
292 /* advertise 10/100 Mb modes */
293 phy_advreg =
294 (MIICR_REG_4 |
295 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
296 | PAR_ADV10HD));
297 } else {
298 /* linkspeed == LINK_1000MB -
299 don't advertise 10/100 Mb modes */
300 phy_advreg = MIICR_REG_4;
301 }
302 /* enable PAUSE frames */
303 phy_advreg |= PAR_ASYMPAUSE;
304 /* required by the Cicada PHY */
305 phy_advreg |= PAR_802_3;
306 slic_reg32_write(wphy, phy_advreg, FLUSH);
307 /* advertise FD only @1000 Mb */
308 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
309 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
4d6f6af8 310
4d6ea9c3
DK		 311 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
312 /* if a Marvell PHY
313 enable auto crossover */
314 phy_config =
315 (MIICR_REG_16 | (MRV_REG16_XOVERON));
316 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8 317
4d6ea9c3
DK		 318 /* reset phy, enable auto-neg */
319 phy_config =
320 (MIICR_REG_PCR |
321 (PCR_RESET | PCR_AUTONEG |
322 PCR_AUTONEG_RST));
323 slic_reg32_write(wphy, phy_config, FLUSH);
324 } else { /* it's a Cicada PHY */
325 /* enable and restart auto-neg (don't reset) */
326 phy_config =
327 (MIICR_REG_PCR |
328 (PCR_AUTONEG | PCR_AUTONEG_RST));
329 slic_reg32_write(wphy, phy_config, FLUSH);
330 }
4d6f6af8 331 }
4d6ea9c3
DK		 332 } else {
333 /* Forced 10/100 */
334 if (linkspeed == LINK_10MB)
335 speed = 0;
336 else
337 speed = PCR_SPEED_100;
338 if (linkduplex == LINK_HALFD)
339 duplex = 0;
340 else
341 duplex = PCR_DUPLEX_FULL;
342
343 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
344 /* if a Marvell PHY
345 disable auto crossover */
346 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
347 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8 348 }
4d6f6af8 349
4d6ea9c3
DK		 350 /* power down phy to break link (this may not work) */
351 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
352 slic_reg32_write(wphy, phy_config, FLUSH);
4d6f6af8 353
4d6ea9c3
DK		 354 /* wait, Marvell says 1 sec, try to get away with 10 ms */
355 mdelay(10);
356
357 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
358 /* if a Marvell PHY
359 disable auto-neg, set speed,
360 soft reset phy, powerup */
361 phy_config =
362 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
363 slic_reg32_write(wphy, phy_config, FLUSH);
364 } else { /* it's a Cicada PHY */
365 /* disable auto-neg, set speed, powerup */
366 phy_config = (MIICR_REG_PCR | (speed | duplex));
367 slic_reg32_write(wphy, phy_config, FLUSH);
368 }
369 }
4d6f6af8
GKH		 370}
371
4d6ea9c3 372static int slic_card_download_gbrcv(struct adapter *adapter)
4d6f6af8 373{
4d6ea9c3
DK		 374 const struct firmware *fw;
375 const char *file = "";
376 int ret;
377 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
378 u32 codeaddr;
379 u32 instruction;
380 int index = 0;
381 u32 rcvucodelen = 0;
4d6f6af8 382
4d6ea9c3
DK		 383 switch (adapter->devid) {
384 case SLIC_2GB_DEVICE_ID:
385 file = "slicoss/oasisrcvucode.sys";
386 break;
387 case SLIC_1GB_DEVICE_ID:
388 file = "slicoss/gbrcvucode.sys";
389 break;
390 default:
651d4bc7 391 return -ENOENT;
4d6ea9c3 392 }
4d6f6af8 393
4d6ea9c3
DK		 394 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
395 if (ret) {
396 dev_err(&adapter->pcidev->dev,
811e843d 397 "Failed to load firmware %s\n", file);
4d6ea9c3 398 return ret;
786ed801 399 }
4d6ea9c3
DK		 400
401 rcvucodelen = *(u32 *)(fw->data + index);
402 index += 4;
403 switch (adapter->devid) {
404 case SLIC_2GB_DEVICE_ID:
7ee34ab2
DN		 405 if (rcvucodelen != OasisRcvUCodeLen) {
406 release_firmware(fw);
4d6ea9c3 407 return -EINVAL;
7ee34ab2 408 }
4d6ea9c3
DK		 409 break;
410 case SLIC_1GB_DEVICE_ID:
7ee34ab2
DN		 411 if (rcvucodelen != GBRcvUCodeLen) {
412 release_firmware(fw);
4d6ea9c3 413 return -EINVAL;
7ee34ab2 414 }
4d6ea9c3 415 break;
4d6f6af8 416 }
4d6ea9c3
DK		 417 /* start download */
418 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
419 /* download the rcv sequencer ucode */
420 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
421 /* write out instruction address */
422 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
423
424 instruction = *(u32 *)(fw->data + index);
425 index += 4;
426 /* write out the instruction data low addr */
427 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
428
429 instruction = *(u8 *)(fw->data + index);
430 index++;
431 /* write out the instruction data high addr */
432 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
433 FLUSH);
434 }
435
436 /* download finished */
437 release_firmware(fw);
438 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
439 return 0;
4d6f6af8
GKH		 440}
441
4d6ea9c3
DK		 442MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
443MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
444
445static int slic_card_download(struct adapter *adapter)
4d6f6af8 446{
4d6ea9c3
DK		 447 const struct firmware *fw;
448 const char *file = "";
449 int ret;
450 u32 section;
451 int thissectionsize;
452 int codeaddr;
e9eff9d6 453 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6ea9c3
DK		 454 u32 instruction;
455 u32 baseaddress;
456 u32 i;
457 u32 numsects = 0;
458 u32 sectsize[3];
459 u32 sectstart[3];
460 int ucode_start, index = 0;
4d6f6af8 461
4d6ea9c3
DK		 462 switch (adapter->devid) {
463 case SLIC_2GB_DEVICE_ID:
464 file = "slicoss/oasisdownload.sys";
465 break;
466 case SLIC_1GB_DEVICE_ID:
467 file = "slicoss/gbdownload.sys";
468 break;
469 default:
670d145a 470 return -ENOENT;
4d6f6af8 471 }
4d6ea9c3
DK		 472 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
473 if (ret) {
474 dev_err(&adapter->pcidev->dev,
811e843d 475 "Failed to load firmware %s\n", file);
4d6ea9c3
DK		 476 return ret;
477 }
478 numsects = *(u32 *)(fw->data + index);
479 index += 4;
4d6ea9c3
DK		 480 for (i = 0; i < numsects; i++) {
481 sectsize[i] = *(u32 *)(fw->data + index);
482 index += 4;
483 }
484 for (i = 0; i < numsects; i++) {
485 sectstart[i] = *(u32 *)(fw->data + index);
486 index += 4;
487 }
488 ucode_start = index;
489 instruction = *(u32 *)(fw->data + index);
490 index += 4;
491 for (section = 0; section < numsects; section++) {
492 baseaddress = sectstart[section];
493 thissectionsize = sectsize[section] >> 3;
4d6f6af8 494
4d6ea9c3
DK		 495 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
496 /* Write out instruction address */
497 slic_reg32_write(&slic_regs->slic_wcs,
498 baseaddress + codeaddr, FLUSH);
499 /* Write out instruction to low addr */
17d2c643
SC		 500 slic_reg32_write(&slic_regs->slic_wcs,
501 instruction, FLUSH);
4d6ea9c3
DK		 502 instruction = *(u32 *)(fw->data + index);
503 index += 4;
504
505 /* Write out instruction to high addr */
17d2c643
SC		 506 slic_reg32_write(&slic_regs->slic_wcs,
507 instruction, FLUSH);
4d6ea9c3
DK		 508 instruction = *(u32 *)(fw->data + index);
509 index += 4;
510 }
511 }
512 index = ucode_start;
513 for (section = 0; section < numsects; section++) {
514 instruction = *(u32 *)(fw->data + index);
515 baseaddress = sectstart[section];
516 if (baseaddress < 0x8000)
517 continue;
518 thissectionsize = sectsize[section] >> 3;
519
520 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
521 /* Write out instruction address */
522 slic_reg32_write(&slic_regs->slic_wcs,
523 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
524 FLUSH);
525 /* Write out instruction to low addr */
526 slic_reg32_write(&slic_regs->slic_wcs, instruction,
527 FLUSH);
528 instruction = *(u32 *)(fw->data + index);
529 index += 4;
530 /* Write out instruction to high addr */
531 slic_reg32_write(&slic_regs->slic_wcs, instruction,
532 FLUSH);
533 instruction = *(u32 *)(fw->data + index);
534 index += 4;
535
536 /* Check SRAM location zero. If it is non-zero. Abort.*/
537/* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
538 if (failure) {
539 release_firmware(fw);
540 return -EIO;
541 }*/
542 }
543 }
544 release_firmware(fw);
545 /* Everything OK, kick off the card */
546 mdelay(10);
547 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
548
549 /* stall for 20 ms, long enough for ucode to init card
550 and reach mainloop */
551 mdelay(20);
4d6f6af8 552
d1939786 553 return 0;
4d6f6af8
GKH		 554}
555
4d6ea9c3
DK		 556MODULE_FIRMWARE("slicoss/oasisdownload.sys");
557MODULE_FIRMWARE("slicoss/gbdownload.sys");
558
559static void slic_adapter_set_hwaddr(struct adapter *adapter)
4d6f6af8 560{
4d6ea9c3 561 struct sliccard *card = adapter->card;
e52011e4 562
4d6ea9c3
DK		 563 if ((adapter->card) && (card->config_set)) {
564 memcpy(adapter->macaddr,
565 card->config.MacInfo[adapter->functionnumber].macaddrA,
566 sizeof(struct slic_config_mac));
ae7d27c0
JP		 567 if (is_zero_ether_addr(adapter->currmacaddr))
568 memcpy(adapter->currmacaddr, adapter->macaddr,
569 ETH_ALEN);
570 if (adapter->netdev)
4d6ea9c3 571 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
ae7d27c0 572 ETH_ALEN);
4d6ea9c3
DK		 573 }
574}
4d6f6af8 575
4d6ea9c3
DK		 576static void slic_intagg_set(struct adapter *adapter, u32 value)
577{
578 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
579 adapter->card->loadlevel_current = value;
580}
4d6f6af8 581
4d6ea9c3
DK		 582static void slic_soft_reset(struct adapter *adapter)
583{
584 if (adapter->card->state == CARD_UP) {
585 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
586 mdelay(1);
587 }
4d6f6af8 588
4d6ea9c3
DK		 589 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
590 FLUSH);
591 mdelay(1);
592}
e52011e4 593
4d6ea9c3
DK		 594static void slic_mac_address_config(struct adapter *adapter)
595{
596 u32 value;
597 u32 value2;
598 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
e52011e4 599
438c5826 600 value = ntohl(*(__be32 *) &adapter->currmacaddr[2]);
4d6ea9c3
DK		 601 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
602 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
e52011e4 603
4d6ea9c3
DK		 604 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
605 adapter->currmacaddr[1]) & 0xFFFF);
4d6f6af8 606
4d6ea9c3
DK		 607 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
608 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
e52011e4 609
4d6ea9c3
DK		 610 /* Write our multicast mask out to the card. This is done */
611 /* here in addition to the slic_mcast_addr_set routine */
612 /* because ALL_MCAST may have been enabled or disabled */
613 slic_mcast_set_mask(adapter);
614}
e52011e4 615
4d6ea9c3
DK		 616static void slic_mac_config(struct adapter *adapter)
617{
618 u32 value;
619 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
e52011e4 620
4d6ea9c3
DK		 621 /* Setup GMAC gaps */
622 if (adapter->linkspeed == LINK_1000MB) {
623 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
624 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
625 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
626 } else {
627 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
628 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
629 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
630 }
e52011e4 631
4d6ea9c3
DK		 632 /* enable GMII */
633 if (adapter->linkspeed == LINK_1000MB)
634 value |= GMCR_GBIT;
635
636 /* enable fullduplex */
637 if ((adapter->linkduplex == LINK_FULLD)
638 || (adapter->macopts & MAC_LOOPBACK)) {
639 value |= GMCR_FULLD;
4d6f6af8 640 }
4d6f6af8 641
4d6ea9c3
DK		 642 /* write mac config */
643 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
4d6f6af8 644
4d6ea9c3
DK		 645 /* setup mac addresses */
646 slic_mac_address_config(adapter);
647}
648
649static void slic_config_set(struct adapter *adapter, bool linkchange)
4d6f6af8 650{
4d6ea9c3
DK		 651 u32 value;
652 u32 RcrReset;
653 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 654
4d6ea9c3
DK		 655 if (linkchange) {
656 /* Setup MAC */
657 slic_mac_config(adapter);
658 RcrReset = GRCR_RESET;
659 } else {
660 slic_mac_address_config(adapter);
661 RcrReset = 0;
662 }
4d6f6af8 663
4d6ea9c3
DK		 664 if (adapter->linkduplex == LINK_FULLD) {
665 /* setup xmtcfg */
666 value = (GXCR_RESET | /* Always reset */
667 GXCR_XMTEN | /* Enable transmit */
668 GXCR_PAUSEEN); /* Enable pause */
4d6f6af8 669
4d6ea9c3 670 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
4d6f6af8 671
4d6ea9c3
DK		 672 /* Setup rcvcfg last */
673 value = (RcrReset | /* Reset, if linkchange */
674 GRCR_CTLEN | /* Enable CTL frames */
675 GRCR_ADDRAEN | /* Address A enable */
676 GRCR_RCVBAD | /* Rcv bad frames */
677 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
678 } else {
679 /* setup xmtcfg */
680 value = (GXCR_RESET | /* Always reset */
681 GXCR_XMTEN); /* Enable transmit */
4d6f6af8 682
4d6ea9c3 683 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
4d6f6af8 684
4d6ea9c3
DK		 685 /* Setup rcvcfg last */
686 value = (RcrReset | /* Reset, if linkchange */
687 GRCR_ADDRAEN | /* Address A enable */
688 GRCR_RCVBAD | /* Rcv bad frames */
689 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
4d6f6af8
GKH		 690 }
691
4d6ea9c3
DK		 692 if (adapter->state != ADAPT_DOWN) {
693 /* Only enable receive if we are restarting or running */
694 value |= GRCR_RCVEN;
4d6f6af8 695 }
4d6f6af8 696
4d6ea9c3
DK		 697 if (adapter->macopts & MAC_PROMISC)
698 value |= GRCR_RCVALL;
4d6f6af8 699
4d6ea9c3
DK		 700 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
701}
4d6f6af8 702
4d6ea9c3
DK		 703/*
704 * Turn off RCV and XMT, power down PHY
705 */
706static void slic_config_clear(struct adapter *adapter)
4d6f6af8 707{
4d6ea9c3
DK		 708 u32 value;
709 u32 phy_config;
710 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
711
712 /* Setup xmtcfg */
713 value = (GXCR_RESET | /* Always reset */
714 GXCR_PAUSEEN); /* Enable pause */
715
716 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
717
718 value = (GRCR_RESET | /* Always reset */
719 GRCR_CTLEN | /* Enable CTL frames */
720 GRCR_ADDRAEN | /* Address A enable */
721 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
722
723 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
724
725 /* power down phy */
726 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
727 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
4d6f6af8
GKH		 728}
729
4d6ea9c3
DK		 730static bool slic_mac_filter(struct adapter *adapter,
731 struct ether_header *ether_frame)
4d6f6af8 732{
9092de6d 733 struct net_device *netdev = adapter->netdev;
4d6ea9c3 734 u32 opts = adapter->macopts;
4d6f6af8 735
4d6ea9c3
DK		 736 if (opts & MAC_PROMISC)
737 return true;
4d6f6af8 738
ae7d27c0 739 if (is_broadcast_ether_addr(ether_frame->ether_dhost)) {
4d6ea9c3
DK		 740 if (opts & MAC_BCAST) {
741 adapter->rcv_broadcasts++;
742 return true;
4d6f6af8 743 }
351e836f
VH		 744
745 return false;
4d6ea9c3
DK		 746 }
747
ae7d27c0 748 if (is_multicast_ether_addr(ether_frame->ether_dhost)) {
4d6ea9c3
DK		 749 if (opts & MAC_ALLMCAST) {
750 adapter->rcv_multicasts++;
9092de6d 751 netdev->stats.multicast++;
4d6ea9c3 752 return true;
4d6f6af8 753 }
4d6ea9c3
DK		 754 if (opts & MAC_MCAST) {
755 struct mcast_address *mcaddr = adapter->mcastaddrs;
4d6f6af8 756
4d6ea9c3 757 while (mcaddr) {
8329419a
JP		 758 if (ether_addr_equal(mcaddr->address,
759 ether_frame->ether_dhost)) {
4d6ea9c3 760 adapter->rcv_multicasts++;
9092de6d 761 netdev->stats.multicast++;
4d6ea9c3
DK		 762 return true;
763 }
764 mcaddr = mcaddr->next;
765 }
351e836f 766
4d6ea9c3 767 return false;
4d6f6af8 768 }
351e836f
VH		 769
770 return false;
4d6f6af8 771 }
4d6ea9c3
DK		 772 if (opts & MAC_DIRECTED) {
773 adapter->rcv_unicasts++;
774 return true;
775 }
776 return false;
4d6f6af8 777
4d6ea9c3 778}
4d6f6af8 779
4d6ea9c3 780static int slic_mac_set_address(struct net_device *dev, void *ptr)
4d6f6af8 781{
4d6ea9c3
DK		 782 struct adapter *adapter = netdev_priv(dev);
783 struct sockaddr *addr = ptr;
4d6f6af8 784
4d6ea9c3
DK		 785 if (netif_running(dev))
786 return -EBUSY;
787 if (!adapter)
788 return -EBUSY;
4d6f6af8 789
4d6ea9c3
DK		 790 if (!is_valid_ether_addr(addr->sa_data))
791 return -EINVAL;
4d6f6af8 792
4d6ea9c3
DK		 793 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
794 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
4d6f6af8 795
4d6ea9c3
DK		 796 slic_config_set(adapter, true);
797 return 0;
4d6f6af8
GKH		 798}
799
4d6ea9c3 800static void slic_timer_load_check(ulong cardaddr)
4d6f6af8 801{
4d6ea9c3
DK		 802 struct sliccard *card = (struct sliccard *)cardaddr;
803 struct adapter *adapter = card->master;
804 u32 __iomem *intagg;
805 u32 load = card->events;
806 u32 level = 0;
4d6f6af8 807
4d6ea9c3
DK		 808 if ((adapter) && (adapter->state == ADAPT_UP) &&
809 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
81372118 810 intagg = &adapter->slic_regs->slic_intagg;
4d6ea9c3
DK		 811 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
812 if (adapter->linkspeed == LINK_1000MB)
813 level = 100;
814 else {
815 if (load > SLIC_LOAD_5)
816 level = SLIC_INTAGG_5;
817 else if (load > SLIC_LOAD_4)
818 level = SLIC_INTAGG_4;
819 else if (load > SLIC_LOAD_3)
820 level = SLIC_INTAGG_3;
821 else if (load > SLIC_LOAD_2)
822 level = SLIC_INTAGG_2;
823 else if (load > SLIC_LOAD_1)
824 level = SLIC_INTAGG_1;
825 else
826 level = SLIC_INTAGG_0;
4d6f6af8 827 }
4d6ea9c3
DK		 828 if (card->loadlevel_current != level) {
829 card->loadlevel_current = level;
830 slic_reg32_write(intagg, level, FLUSH);
4d6f6af8 831 }
4d6ea9c3
DK		 832 } else {
833 if (load > SLIC_LOAD_5)
834 level = SLIC_INTAGG_5;
835 else if (load > SLIC_LOAD_4)
836 level = SLIC_INTAGG_4;
837 else if (load > SLIC_LOAD_3)
838 level = SLIC_INTAGG_3;
839 else if (load > SLIC_LOAD_2)
840 level = SLIC_INTAGG_2;
841 else if (load > SLIC_LOAD_1)
842 level = SLIC_INTAGG_1;
843 else
844 level = SLIC_INTAGG_0;
845 if (card->loadlevel_current != level) {
846 card->loadlevel_current = level;
847 slic_reg32_write(intagg, level, FLUSH);
4d6f6af8 848 }
4d6f6af8 849 }
4d6f6af8 850 }
4d6ea9c3
DK		 851 card->events = 0;
852 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
853 add_timer(&card->loadtimer);
4d6f6af8
GKH		 854}
855
4d6ea9c3
DK		 856static int slic_upr_queue_request(struct adapter *adapter,
857 u32 upr_request,
858 u32 upr_data,
859 u32 upr_data_h,
860 u32 upr_buffer, u32 upr_buffer_h)
4d6f6af8 861{
4d6ea9c3
DK		 862 struct slic_upr *upr;
863 struct slic_upr *uprqueue;
4d6f6af8 864
4d6ea9c3
DK		 865 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
866 if (!upr)
867 return -ENOMEM;
4d6f6af8 868
4d6ea9c3
DK		 869 upr->adapter = adapter->port;
870 upr->upr_request = upr_request;
871 upr->upr_data = upr_data;
872 upr->upr_buffer = upr_buffer;
873 upr->upr_data_h = upr_data_h;
874 upr->upr_buffer_h = upr_buffer_h;
875 upr->next = NULL;
876 if (adapter->upr_list) {
877 uprqueue = adapter->upr_list;
a0a1cbef 878
4d6ea9c3
DK		 879 while (uprqueue->next)
880 uprqueue = uprqueue->next;
881 uprqueue->next = upr;
882 } else {
883 adapter->upr_list = upr;
4d6f6af8 884 }
4d6ea9c3 885 return 0;
4d6f6af8
GKH		 886}
887
4d6ea9c3 888static void slic_upr_start(struct adapter *adapter)
4d6f6af8 889{
4d6ea9c3
DK		 890 struct slic_upr *upr;
891 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 892/*
4d6ea9c3
DK		 893 char * ptr1;
894 char * ptr2;
895 uint cmdoffset;
896*/
897 upr = adapter->upr_list;
898 if (!upr)
899 return;
900 if (adapter->upr_busy)
901 return;
902 adapter->upr_busy = 1;
4d6f6af8 903
4d6ea9c3
DK		 904 switch (upr->upr_request) {
905 case SLIC_UPR_STATS:
906 if (upr->upr_data_h == 0) {
907 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
908 FLUSH);
909 } else {
910 slic_reg64_write(adapter, &slic_regs->slic_stats64,
911 upr->upr_data,
912 &slic_regs->slic_addr_upper,
913 upr->upr_data_h, FLUSH);
914 }
915 break;
4d6f6af8 916
4d6ea9c3
DK		 917 case SLIC_UPR_RLSR:
918 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
919 &slic_regs->slic_addr_upper, upr->upr_data_h,
920 FLUSH);
921 break;
4d6f6af8 922
4d6ea9c3
DK		 923 case SLIC_UPR_RCONFIG:
924 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
925 upr->upr_data, &slic_regs->slic_addr_upper,
926 upr->upr_data_h, FLUSH);
927 break;
928 case SLIC_UPR_PING:
929 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
930 break;
4d6ea9c3 931 }
4d6f6af8
GKH		 932}
933
4d6ea9c3
DK		 934static int slic_upr_request(struct adapter *adapter,
935 u32 upr_request,
936 u32 upr_data,
937 u32 upr_data_h,
938 u32 upr_buffer, u32 upr_buffer_h)
4d6f6af8 939{
4d6ea9c3 940 int rc;
4d6f6af8 941
4d6ea9c3
DK		 942 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
943 rc = slic_upr_queue_request(adapter,
944 upr_request,
945 upr_data,
946 upr_data_h, upr_buffer, upr_buffer_h);
947 if (rc)
948 goto err_unlock_irq;
4d6f6af8 949
4d6ea9c3
DK		 950 slic_upr_start(adapter);
951err_unlock_irq:
952 spin_unlock_irqrestore(&adapter->upr_lock.lock,
953 adapter->upr_lock.flags);
954 return rc;
4d6f6af8
GKH		 955}
956
4d6ea9c3 957static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
4d6f6af8 958{
4d6ea9c3
DK		 959 u32 linkstatus = adapter->pshmem->linkstatus;
960 uint linkup;
961 unsigned char linkspeed;
962 unsigned char linkduplex;
4d6f6af8 963
4d6ea9c3
DK		 964 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
965 struct slic_shmem *pshmem;
4d6f6af8 966
01d0a9b4
JP		 967 pshmem = (struct slic_shmem *)(unsigned long)
968 adapter->phys_shmem;
1033f1f7 969#if BITS_PER_LONG == 64
4d6ea9c3
DK		 970 slic_upr_queue_request(adapter,
971 SLIC_UPR_RLSR,
972 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
973 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
974 0, 0);
1033f1f7 975#else
4d6ea9c3
DK		 976 slic_upr_queue_request(adapter,
977 SLIC_UPR_RLSR,
978 (u32) &pshmem->linkstatus,
979 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
4d6ea9c3
DK		 980#endif
981 return;
982 }
983 if (adapter->state != ADAPT_UP)
984 return;
4d6f6af8 985
4d6ea9c3
DK		 986 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
987 if (linkstatus & GIG_SPEED_1000)
988 linkspeed = LINK_1000MB;
989 else if (linkstatus & GIG_SPEED_100)
990 linkspeed = LINK_100MB;
991 else
992 linkspeed = LINK_10MB;
4d6f6af8 993
4d6ea9c3
DK		 994 if (linkstatus & GIG_FULLDUPLEX)
995 linkduplex = LINK_FULLD;
996 else
997 linkduplex = LINK_HALFD;
4d6f6af8 998
4d6ea9c3
DK		 999 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
1000 return;
4d6f6af8 1001
4d6ea9c3
DK		 1002 /* link up event, but nothing has changed */
1003 if ((adapter->linkstate == LINK_UP) &&
1004 (linkup == LINK_UP) &&
1005 (adapter->linkspeed == linkspeed) &&
1006 (adapter->linkduplex == linkduplex))
1007 return;
4d6f6af8 1008
4d6ea9c3 1009 /* link has changed at this point */
4d6f6af8 1010
4d6ea9c3
DK		 1011 /* link has gone from up to down */
1012 if (linkup == LINK_DOWN) {
1013 adapter->linkstate = LINK_DOWN;
1014 return;
4d6f6af8
GKH		 1015 }
1016
4d6ea9c3
DK		 1017 /* link has gone from down to up */
1018 adapter->linkspeed = linkspeed;
1019 adapter->linkduplex = linkduplex;
1020
1021 if (adapter->linkstate != LINK_UP) {
1022 /* setup the mac */
b574488e 1023 slic_config_set(adapter, true);
4d6ea9c3
DK		 1024 adapter->linkstate = LINK_UP;
1025 netif_start_queue(adapter->netdev);
4d6f6af8 1026 }
4d6f6af8
GKH		 1027}
1028
4d6ea9c3 1029static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
4d6f6af8 1030{
4d6ea9c3
DK		 1031 struct sliccard *card = adapter->card;
1032 struct slic_upr *upr;
4d6f6af8 1033
4d6ea9c3
DK		 1034 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1035 upr = adapter->upr_list;
1036 if (!upr) {
4d6ea9c3
DK		 1037 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1038 adapter->upr_lock.flags);
1039 return;
4d6f6af8 1040 }
4d6ea9c3
DK		 1041 adapter->upr_list = upr->next;
1042 upr->next = NULL;
1043 adapter->upr_busy = 0;
4d6ea9c3
DK		 1044 switch (upr->upr_request) {
1045 case SLIC_UPR_STATS:
1046 {
1047 struct slic_stats *slicstats =
1048 (struct slic_stats *) &adapter->pshmem->inicstats;
1049 struct slic_stats *newstats = slicstats;
1050 struct slic_stats *old = &adapter->inicstats_prev;
1051 struct slicnet_stats *stst = &adapter->slic_stats;
4d6f6af8 1052
4d6ea9c3
DK		 1053 if (isr & ISR_UPCERR) {
1054 dev_err(&adapter->netdev->dev,
1055 "SLIC_UPR_STATS command failed isr[%x]\n",
1056 isr);
4d6f6af8 1057
4d6ea9c3
DK		 1058 break;
1059 }
1060 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
1061 newstats->xmit_tcp_segs_gb,
1062 old->xmit_tcp_segs_gb);
4d6f6af8 1063
4d6ea9c3
DK		 1064 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
1065 newstats->xmit_tcp_bytes_gb,
1066 old->xmit_tcp_bytes_gb);
4d6f6af8 1067
4d6ea9c3
DK		 1068 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
1069 newstats->rcv_tcp_segs_gb,
1070 old->rcv_tcp_segs_gb);
4d6f6af8 1071
4d6ea9c3
DK		 1072 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
1073 newstats->rcv_tcp_bytes_gb,
1074 old->rcv_tcp_bytes_gb);
4d6f6af8 1075
4d6ea9c3
DK		 1076 UPDATE_STATS_GB(stst->iface.xmt_bytes,
1077 newstats->xmit_bytes_gb,
1078 old->xmit_bytes_gb);
4d6f6af8 1079
4d6ea9c3
DK		 1080 UPDATE_STATS_GB(stst->iface.xmt_ucast,
1081 newstats->xmit_unicasts_gb,
1082 old->xmit_unicasts_gb);
4d6f6af8 1083
4d6ea9c3
DK		 1084 UPDATE_STATS_GB(stst->iface.rcv_bytes,
1085 newstats->rcv_bytes_gb,
1086 old->rcv_bytes_gb);
4d6f6af8 1087
4d6ea9c3
DK		 1088 UPDATE_STATS_GB(stst->iface.rcv_ucast,
1089 newstats->rcv_unicasts_gb,
1090 old->rcv_unicasts_gb);
4d6f6af8 1091
4d6ea9c3
DK		 1092 UPDATE_STATS_GB(stst->iface.xmt_errors,
1093 newstats->xmit_collisions_gb,
1094 old->xmit_collisions_gb);
4d6f6af8 1095
4d6ea9c3
DK		 1096 UPDATE_STATS_GB(stst->iface.xmt_errors,
1097 newstats->xmit_excess_collisions_gb,
1098 old->xmit_excess_collisions_gb);
4d6f6af8 1099
4d6ea9c3
DK		 1100 UPDATE_STATS_GB(stst->iface.xmt_errors,
1101 newstats->xmit_other_error_gb,
1102 old->xmit_other_error_gb);
4d6f6af8 1103
4d6ea9c3
DK		 1104 UPDATE_STATS_GB(stst->iface.rcv_errors,
1105 newstats->rcv_other_error_gb,
1106 old->rcv_other_error_gb);
4d6f6af8 1107
4d6ea9c3
DK		 1108 UPDATE_STATS_GB(stst->iface.rcv_discards,
1109 newstats->rcv_drops_gb,
1110 old->rcv_drops_gb);
a0a1cbef 1111
4d6ea9c3
DK		 1112 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
1113 adapter->rcv_drops +=
1114 (newstats->rcv_drops_gb -
1115 old->rcv_drops_gb);
1116 }
1117 memcpy(old, newstats, sizeof(struct slic_stats));
1118 break;
1119 }
1120 case SLIC_UPR_RLSR:
1121 slic_link_upr_complete(adapter, isr);
1122 break;
1123 case SLIC_UPR_RCONFIG:
1124 break;
4d6ea9c3
DK		 1125 case SLIC_UPR_PING:
1126 card->pingstatus |= (isr & ISR_PINGDSMASK);
1127 break;
4d6f6af8 1128 }
4d6ea9c3
DK		 1129 kfree(upr);
1130 slic_upr_start(adapter);
1131 spin_unlock_irqrestore(&adapter->upr_lock.lock,
1132 adapter->upr_lock.flags);
4d6f6af8
GKH		 1133}
1134
47a401a8 1135static int slic_config_get(struct adapter *adapter, u32 config, u32 config_h)
4d6f6af8 1136{
47a401a8
DM		 1137 return slic_upr_request(adapter, SLIC_UPR_RCONFIG, config, config_h,
1138 0, 0);
4d6f6af8
GKH		 1139}
1140
4d6ea9c3 1141/*
55b62cdf 1142 * Compute a checksum of the EEPROM according to RFC 1071.
4d6ea9c3 1143 */
55b62cdf 1144static u16 slic_eeprom_cksum(void *eeprom, unsigned len)
4d6f6af8 1145{
55b62cdf
DM		 1146 u16 *wp = eeprom;
1147 u32 checksum = 0;
4d6f6af8 1148
55b62cdf
DM		 1149 while (len > 1) {
1150 checksum += *(wp++);
1151 len -= 2;
1152 }
4d6f6af8 1153
55b62cdf
DM		 1154 if (len > 0)
1155 checksum += *(u8 *) wp;
4d6ea9c3 1156
4d6ea9c3 1157
55b62cdf
DM		 1158 while (checksum >> 16)
1159 checksum = (checksum & 0xFFFF) + ((checksum >> 16) & 0xFFFF);
4d6ea9c3 1160
55b62cdf 1161 return ~checksum;
4d6f6af8
GKH		 1162}
1163
4d6ea9c3 1164static void slic_rspqueue_free(struct adapter *adapter)
4d6f6af8 1165{
4d6ea9c3
DK		 1166 int i;
1167 struct slic_rspqueue *rspq = &adapter->rspqueue;
4d6f6af8 1168
4d6ea9c3
DK		 1169 for (i = 0; i < rspq->num_pages; i++) {
1170 if (rspq->vaddr[i]) {
1171 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1172 rspq->vaddr[i], rspq->paddr[i]);
1173 }
1174 rspq->vaddr[i] = NULL;
1175 rspq->paddr[i] = 0;
1176 }
1177 rspq->offset = 0;
1178 rspq->pageindex = 0;
1179 rspq->rspbuf = NULL;
4d6f6af8
GKH		 1180}
1181
4d6ea9c3 1182static int slic_rspqueue_init(struct adapter *adapter)
4d6f6af8 1183{
4d6ea9c3
DK		 1184 int i;
1185 struct slic_rspqueue *rspq = &adapter->rspqueue;
1186 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1187 u32 paddrh = 0;
1188
4d6ea9c3
DK		 1189 memset(rspq, 0, sizeof(struct slic_rspqueue));
1190
1191 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1192
1193 for (i = 0; i < rspq->num_pages; i++) {
8b983be5
JP		 1194 rspq->vaddr[i] = pci_zalloc_consistent(adapter->pcidev,
1195 PAGE_SIZE,
1196 &rspq->paddr[i]);
4d6ea9c3
DK		 1197 if (!rspq->vaddr[i]) {
1198 dev_err(&adapter->pcidev->dev,
1199 "pci_alloc_consistent failed\n");
1200 slic_rspqueue_free(adapter);
1201 return -ENOMEM;
1202 }
4d6ea9c3
DK		 1203
1204 if (paddrh == 0) {
1205 slic_reg32_write(&slic_regs->slic_rbar,
1206 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1207 DONT_FLUSH);
1208 } else {
1209 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
1210 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1211 &slic_regs->slic_addr_upper,
1212 paddrh, DONT_FLUSH);
1213 }
1214 }
1215 rspq->offset = 0;
1216 rspq->pageindex = 0;
1217 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1218 return 0;
4d6f6af8
GKH		 1219}
1220
4d6ea9c3 1221static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
4d6f6af8 1222{
4d6ea9c3
DK		 1223 struct slic_rspqueue *rspq = &adapter->rspqueue;
1224 struct slic_rspbuf *buf;
4d6f6af8 1225
4d6ea9c3
DK		 1226 if (!(rspq->rspbuf->status))
1227 return NULL;
4d6f6af8 1228
4d6ea9c3 1229 buf = rspq->rspbuf;
4d6ea9c3
DK		 1230 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1231 rspq->rspbuf++;
4d6ea9c3 1232 } else {
4d6ea9c3
DK		 1233 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1234 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1235 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
6d1b80fd 1236 rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages;
4d6ea9c3
DK		 1237 rspq->offset = 0;
1238 rspq->rspbuf = (struct slic_rspbuf *)
1239 rspq->vaddr[rspq->pageindex];
4d6ea9c3 1240 }
40991e4f 1241
4d6ea9c3
DK		 1242 return buf;
1243}
4d6f6af8 1244
4d6ea9c3
DK		 1245static void slic_cmdqmem_free(struct adapter *adapter)
1246{
1247 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1248 int i;
4d6f6af8 1249
4d6ea9c3
DK		 1250 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1251 if (cmdqmem->pages[i]) {
1252 pci_free_consistent(adapter->pcidev,
1253 PAGE_SIZE,
1254 (void *) cmdqmem->pages[i],
1255 cmdqmem->dma_pages[i]);
1256 }
1257 }
1258 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1259}
4d6f6af8 1260
4d6ea9c3
DK		 1261static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1262{
1263 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1264 u32 *pageaddr;
4d6f6af8 1265
4d6ea9c3
DK		 1266 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1267 return NULL;
1268 pageaddr = pci_alloc_consistent(adapter->pcidev,
1269 PAGE_SIZE,
1270 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
1271 if (!pageaddr)
1272 return NULL;
40991e4f 1273
4d6ea9c3
DK		 1274 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1275 cmdqmem->pagecnt++;
1276 return pageaddr;
1277}
4d6f6af8 1278
4d6ea9c3
DK		 1279static void slic_cmdq_free(struct adapter *adapter)
1280{
1281 struct slic_hostcmd *cmd;
4d6f6af8 1282
4d6ea9c3
DK		 1283 cmd = adapter->cmdq_all.head;
1284 while (cmd) {
1285 if (cmd->busy) {
1286 struct sk_buff *tempskb;
4d6f6af8 1287
4d6ea9c3
DK		 1288 tempskb = cmd->skb;
1289 if (tempskb) {
1290 cmd->skb = NULL;
1291 dev_kfree_skb_irq(tempskb);
4d6f6af8
GKH		 1292 }
1293 }
4d6ea9c3
DK		 1294 cmd = cmd->next_all;
1295 }
1296 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1297 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1298 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1299 slic_cmdqmem_free(adapter);
1300}
4d6f6af8 1301
4d6ea9c3
DK		 1302static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1303{
1304 struct slic_hostcmd *cmd;
1305 struct slic_hostcmd *prev;
1306 struct slic_hostcmd *tail;
1307 struct slic_cmdqueue *cmdq;
1308 int cmdcnt;
1309 void *cmdaddr;
1310 ulong phys_addr;
1311 u32 phys_addrl;
1312 u32 phys_addrh;
1313 struct slic_handle *pslic_handle;
4d6f6af8 1314
4d6ea9c3
DK		 1315 cmdaddr = page;
1316 cmd = (struct slic_hostcmd *)cmdaddr;
1317 cmdcnt = 0;
4d6f6af8 1318
4d6ea9c3
DK		 1319 phys_addr = virt_to_bus((void *)page);
1320 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1321 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
4d6f6af8 1322
4d6ea9c3
DK		 1323 prev = NULL;
1324 tail = cmd;
1325 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1326 (adapter->slic_handle_ix < 256)) {
1327 /* Allocate and initialize a SLIC_HANDLE for this command */
b0a0fb1e
MA		 1328 spin_lock_irqsave(&adapter->handle_lock.lock,
1329 adapter->handle_lock.flags);
1330 pslic_handle = adapter->pfree_slic_handles;
bcadb1dc 1331 adapter->pfree_slic_handles = pslic_handle->next;
b0a0fb1e
MA		 1332 spin_unlock_irqrestore(&adapter->handle_lock.lock,
1333 adapter->handle_lock.flags);
4d6ea9c3
DK		 1334 pslic_handle->type = SLIC_HANDLE_CMD;
1335 pslic_handle->address = (void *) cmd;
1336 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
1337 pslic_handle->other_handle = NULL;
1338 pslic_handle->next = NULL;
1339
1340 cmd->pslic_handle = pslic_handle;
1341 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1342 cmd->busy = false;
1343 cmd->paddrl = phys_addrl;
1344 cmd->paddrh = phys_addrh;
1345 cmd->next_all = prev;
1346 cmd->next = prev;
1347 prev = cmd;
1348 phys_addrl += SLIC_HOSTCMD_SIZE;
1349 cmdaddr += SLIC_HOSTCMD_SIZE;
1350
1351 cmd = (struct slic_hostcmd *)cmdaddr;
1352 cmdcnt++;
4d6f6af8 1353 }
4d6ea9c3
DK		 1354
1355 cmdq = &adapter->cmdq_all;
1356 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1357 tail->next_all = cmdq->head;
1358 cmdq->head = prev;
1359 cmdq = &adapter->cmdq_free;
1360 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1361 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
1362 tail->next = cmdq->head;
1363 cmdq->head = prev;
1364 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4d6f6af8
GKH		 1365}
1366
4d6ea9c3 1367static int slic_cmdq_init(struct adapter *adapter)
4d6f6af8 1368{
4d6ea9c3
DK		 1369 int i;
1370 u32 *pageaddr;
4d6f6af8 1371
4d6ea9c3
DK		 1372 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1373 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1374 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1375 spin_lock_init(&adapter->cmdq_all.lock.lock);
1376 spin_lock_init(&adapter->cmdq_free.lock.lock);
1377 spin_lock_init(&adapter->cmdq_done.lock.lock);
bae5c3d1 1378 memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem));
4d6ea9c3
DK		 1379 adapter->slic_handle_ix = 1;
1380 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1381 pageaddr = slic_cmdqmem_addpage(adapter);
4d6ea9c3
DK		 1382 if (!pageaddr) {
1383 slic_cmdq_free(adapter);
1384 return -ENOMEM;
1385 }
1386 slic_cmdq_addcmdpage(adapter, pageaddr);
1387 }
1388 adapter->slic_handle_ix = 1;
4d6f6af8 1389
4d6ea9c3 1390 return 0;
4d6f6af8
GKH		 1391}
1392
4d6ea9c3 1393static void slic_cmdq_reset(struct adapter *adapter)
4d6f6af8 1394{
4d6ea9c3
DK		 1395 struct slic_hostcmd *hcmd;
1396 struct sk_buff *skb;
1397 u32 outstanding;
4d6f6af8 1398
4d6ea9c3
DK		 1399 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
1400 adapter->cmdq_free.lock.flags);
1401 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
1402 adapter->cmdq_done.lock.flags);
1403 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1404 outstanding -= adapter->cmdq_free.count;
1405 hcmd = adapter->cmdq_all.head;
1406 while (hcmd) {
1407 if (hcmd->busy) {
1408 skb = hcmd->skb;
4d6ea9c3
DK		 1409 hcmd->busy = 0;
1410 hcmd->skb = NULL;
1411 dev_kfree_skb_irq(skb);
1412 }
1413 hcmd = hcmd->next_all;
470c5736 1414 }
4d6ea9c3
DK		 1415 adapter->cmdq_free.count = 0;
1416 adapter->cmdq_free.head = NULL;
1417 adapter->cmdq_free.tail = NULL;
1418 adapter->cmdq_done.count = 0;
1419 adapter->cmdq_done.head = NULL;
1420 adapter->cmdq_done.tail = NULL;
1421 adapter->cmdq_free.head = adapter->cmdq_all.head;
1422 hcmd = adapter->cmdq_all.head;
1423 while (hcmd) {
1424 adapter->cmdq_free.count++;
1425 hcmd->next = hcmd->next_all;
1426 hcmd = hcmd->next_all;
4d6f6af8 1427 }
4d6ea9c3
DK		 1428 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1429 dev_err(&adapter->netdev->dev,
1430 "free_count %d != all count %d\n",
1431 adapter->cmdq_free.count, adapter->cmdq_all.count);
4d6f6af8 1432 }
4d6ea9c3
DK		 1433 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
1434 adapter->cmdq_done.lock.flags);
1435 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
1436 adapter->cmdq_free.lock.flags);
4d6f6af8
GKH		 1437}
1438
4d6ea9c3 1439static void slic_cmdq_getdone(struct adapter *adapter)
4d6f6af8 1440{
4d6ea9c3
DK		 1441 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1442 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
4d6f6af8 1443
4d6ea9c3 1444 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4d6f6af8 1445
4d6ea9c3
DK		 1446 free_cmdq->head = done_cmdq->head;
1447 free_cmdq->count = done_cmdq->count;
1448 done_cmdq->head = NULL;
1449 done_cmdq->tail = NULL;
1450 done_cmdq->count = 0;
1451 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1452}
874073ea 1453
4d6ea9c3
DK		 1454static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1455{
1456 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1457 struct slic_hostcmd *cmd = NULL;
4d6f6af8 1458
4d6ea9c3
DK		 1459lock_and_retry:
1460 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1461retry:
1462 cmd = cmdq->head;
1463 if (cmd) {
1464 cmdq->head = cmd->next;
1465 cmdq->count--;
1466 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1467 } else {
1468 slic_cmdq_getdone(adapter);
1469 cmd = cmdq->head;
1470 if (cmd) {
1471 goto retry;
1472 } else {
1473 u32 *pageaddr;
874073ea 1474
4d6ea9c3
DK		 1475 spin_unlock_irqrestore(&cmdq->lock.lock,
1476 cmdq->lock.flags);
1477 pageaddr = slic_cmdqmem_addpage(adapter);
1478 if (pageaddr) {
1479 slic_cmdq_addcmdpage(adapter, pageaddr);
1480 goto lock_and_retry;
1481 }
4d6f6af8
GKH		 1482 }
1483 }
4d6ea9c3 1484 return cmd;
4d6f6af8
GKH		 1485}
1486
4d6ea9c3
DK		 1487static void slic_cmdq_putdone_irq(struct adapter *adapter,
1488 struct slic_hostcmd *cmd)
4d6f6af8 1489{
4d6ea9c3 1490 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
4d6f6af8 1491
4d6ea9c3
DK		 1492 spin_lock(&cmdq->lock.lock);
1493 cmd->busy = 0;
1494 cmd->next = cmdq->head;
1495 cmdq->head = cmd;
1496 cmdq->count++;
1497 if ((adapter->xmitq_full) && (cmdq->count > 10))
1498 netif_wake_queue(adapter->netdev);
1499 spin_unlock(&cmdq->lock.lock);
4d6f6af8
GKH		 1500}
1501
4d6ea9c3 1502static int slic_rcvqueue_fill(struct adapter *adapter)
4d6f6af8 1503{
4d6ea9c3
DK		 1504 void *paddr;
1505 u32 paddrl;
1506 u32 paddrh;
1507 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1508 int i = 0;
1509 struct device *dev = &adapter->netdev->dev;
1510
1511 while (i < SLIC_RCVQ_FILLENTRIES) {
1512 struct slic_rcvbuf *rcvbuf;
1513 struct sk_buff *skb;
1514#ifdef KLUDGE_FOR_4GB_BOUNDARY
1515retry_rcvqfill:
1516#endif
1517 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1518 if (skb) {
01d0a9b4
JP		 1519 paddr = (void *)(unsigned long)
1520 pci_map_single(adapter->pcidev,
1521 skb->data,
1522 SLIC_RCVQ_RCVBUFSIZE,
1523 PCI_DMA_FROMDEVICE);
4d6ea9c3
DK		 1524 paddrl = SLIC_GET_ADDR_LOW(paddr);
1525 paddrh = SLIC_GET_ADDR_HIGH(paddr);
1526
1527 skb->len = SLIC_RCVBUF_HEADSIZE;
1528 rcvbuf = (struct slic_rcvbuf *)skb->head;
1529 rcvbuf->status = 0;
1530 skb->next = NULL;
1531#ifdef KLUDGE_FOR_4GB_BOUNDARY
1532 if (paddrl == 0) {
1533 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1534 __func__);
1535 dev_err(dev, "skb[%p] PROBLEM\n", skb);
17d2c643
SC		 1536 dev_err(dev, " skbdata[%p]\n",
1537 skb->data);
4d6ea9c3
DK		 1538 dev_err(dev, " skblen[%x]\n", skb->len);
1539 dev_err(dev, " paddr[%p]\n", paddr);
1540 dev_err(dev, " paddrl[%x]\n", paddrl);
1541 dev_err(dev, " paddrh[%x]\n", paddrh);
17d2c643
SC		 1542 dev_err(dev, " rcvq->head[%p]\n",
1543 rcvq->head);
1544 dev_err(dev, " rcvq->tail[%p]\n",
1545 rcvq->tail);
1546 dev_err(dev, " rcvq->count[%x]\n",
1547 rcvq->count);
4d6ea9c3
DK		 1548 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1549 goto retry_rcvqfill;
1550 }
1551#else
1552 if (paddrl == 0) {
1553 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1554 __func__);
1555 dev_err(dev, "skb[%p] PROBLEM\n", skb);
17d2c643
SC		 1556 dev_err(dev, " skbdata[%p]\n",
1557 skb->data);
4d6ea9c3
DK		 1558 dev_err(dev, " skblen[%x]\n", skb->len);
1559 dev_err(dev, " paddr[%p]\n", paddr);
1560 dev_err(dev, " paddrl[%x]\n", paddrl);
1561 dev_err(dev, " paddrh[%x]\n", paddrh);
17d2c643
SC		 1562 dev_err(dev, " rcvq->head[%p]\n",
1563 rcvq->head);
1564 dev_err(dev, " rcvq->tail[%p]\n",
1565 rcvq->tail);
1566 dev_err(dev, " rcvq->count[%x]\n",
1567 rcvq->count);
4d6ea9c3
DK		 1568 dev_err(dev, "GIVE TO CARD ANYWAY\n");
1569 }
1570#endif
1571 if (paddrh == 0) {
1572 slic_reg32_write(&adapter->slic_regs->slic_hbar,
1573 (u32)paddrl, DONT_FLUSH);
1574 } else {
1575 slic_reg64_write(adapter,
1576 &adapter->slic_regs->slic_hbar64,
1577 paddrl,
1578 &adapter->slic_regs->slic_addr_upper,
1579 paddrh, DONT_FLUSH);
1580 }
1581 if (rcvq->head)
1582 rcvq->tail->next = skb;
1583 else
1584 rcvq->head = skb;
1585 rcvq->tail = skb;
1586 rcvq->count++;
1587 i++;
1588 } else {
1589 dev_err(&adapter->netdev->dev,
1590 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
1591 i);
1592 break;
1593 }
1594 }
1595 return i;
4d6f6af8
GKH		 1596}
1597
4d6ea9c3 1598static void slic_rcvqueue_free(struct adapter *adapter)
4d6f6af8 1599{
4d6ea9c3
DK		 1600 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1601 struct sk_buff *skb;
4d6f6af8 1602
4d6ea9c3
DK		 1603 while (rcvq->head) {
1604 skb = rcvq->head;
1605 rcvq->head = rcvq->head->next;
1606 dev_kfree_skb(skb);
1607 }
1608 rcvq->tail = NULL;
1609 rcvq->head = NULL;
1610 rcvq->count = 0;
1611}
4d6f6af8 1612
4d6ea9c3
DK		 1613static int slic_rcvqueue_init(struct adapter *adapter)
1614{
1615 int i, count;
1616 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4d6f6af8 1617
4d6ea9c3
DK		 1618 rcvq->tail = NULL;
1619 rcvq->head = NULL;
1620 rcvq->size = SLIC_RCVQ_ENTRIES;
1621 rcvq->errors = 0;
1622 rcvq->count = 0;
db9c9305 1623 i = SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES;
4d6ea9c3
DK		 1624 count = 0;
1625 while (i) {
1626 count += slic_rcvqueue_fill(adapter);
1627 i--;
1628 }
1629 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
1630 slic_rcvqueue_free(adapter);
1631 return -ENOMEM;
4d6f6af8 1632 }
4d6ea9c3
DK		 1633 return 0;
1634}
4d6f6af8 1635
4d6ea9c3
DK		 1636static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
1637{
1638 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1639 struct sk_buff *skb;
1640 struct slic_rcvbuf *rcvbuf;
1641 int count;
4d6f6af8 1642
4d6ea9c3
DK		 1643 if (rcvq->count) {
1644 skb = rcvq->head;
1645 rcvbuf = (struct slic_rcvbuf *)skb->head;
4d6f6af8 1646
4d6ea9c3
DK		 1647 if (rcvbuf->status & IRHDDR_SVALID) {
1648 rcvq->head = rcvq->head->next;
1649 skb->next = NULL;
1650 rcvq->count--;
4d6f6af8 1651 } else {
4d6ea9c3 1652 skb = NULL;
4d6f6af8 1653 }
4d6ea9c3
DK		 1654 } else {
1655 dev_err(&adapter->netdev->dev,
1656 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
1657 skb = NULL;
1658 }
1659 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
1660 count = slic_rcvqueue_fill(adapter);
1661 if (!count)
1662 break;
1663 }
1664 if (skb)
1665 rcvq->errors = 0;
1666 return skb;
1667}
4d6f6af8 1668
4d6ea9c3
DK		 1669static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
1670{
1671 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1672 void *paddr;
1673 u32 paddrl;
1674 u32 paddrh;
1675 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
1676 struct device *dev;
4d6f6af8 1677
01d0a9b4
JP		 1678 paddr = (void *)(unsigned long)
1679 pci_map_single(adapter->pcidev, skb->head,
1680 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
4d6ea9c3
DK		 1681 rcvbuf->status = 0;
1682 skb->next = NULL;
4d6f6af8 1683
4d6ea9c3
DK		 1684 paddrl = SLIC_GET_ADDR_LOW(paddr);
1685 paddrh = SLIC_GET_ADDR_HIGH(paddr);
4d6f6af8 1686
4d6ea9c3
DK		 1687 if (paddrl == 0) {
1688 dev = &adapter->netdev->dev;
1689 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1690 __func__);
1691 dev_err(dev, "skb[%p] PROBLEM\n", skb);
1692 dev_err(dev, " skbdata[%p]\n", skb->data);
1693 dev_err(dev, " skblen[%x]\n", skb->len);
1694 dev_err(dev, " paddr[%p]\n", paddr);
1695 dev_err(dev, " paddrl[%x]\n", paddrl);
1696 dev_err(dev, " paddrh[%x]\n", paddrh);
1697 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
1698 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
1699 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
4d6f6af8 1700 }
4d6ea9c3
DK		 1701 if (paddrh == 0) {
1702 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
1703 DONT_FLUSH);
1704 } else {
1705 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
1706 paddrl, &adapter->slic_regs->slic_addr_upper,
1707 paddrh, DONT_FLUSH);
4d6f6af8 1708 }
4d6ea9c3
DK		 1709 if (rcvq->head)
1710 rcvq->tail->next = skb;
e8bc9b7a 1711 else
4d6ea9c3
DK		 1712 rcvq->head = skb;
1713 rcvq->tail = skb;
1714 rcvq->count++;
1715 return rcvq->count;
4d6f6af8
GKH		 1716}
1717
4d6ea9c3
DK		 1718/*
1719 * slic_link_event_handler -
1720 *
1721 * Initiate a link configuration sequence. The link configuration begins
1722 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1723 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1724 * routine will follow it up witha UP configuration write command, which
1725 * will also complete asynchronously.
1726 *
1727 */
1728static void slic_link_event_handler(struct adapter *adapter)
1729{
1730 int status;
1731 struct slic_shmem *pshmem;
4d6f6af8 1732
4d6ea9c3
DK		 1733 if (adapter->state != ADAPT_UP) {
1734 /* Adapter is not operational. Ignore. */
1735 return;
4d6f6af8
GKH		 1736 }
1737
01d0a9b4 1738 pshmem = (struct slic_shmem *)(unsigned long)adapter->phys_shmem;
4d6f6af8 1739
1033f1f7 1740#if BITS_PER_LONG == 64
4d6ea9c3
DK		 1741 status = slic_upr_request(adapter,
1742 SLIC_UPR_RLSR,
1743 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1744 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1745 0, 0);
1033f1f7 1746#else
4d6ea9c3
DK		 1747 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1748 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
1749 0, 0, 0);
4d6ea9c3 1750#endif
4d6f6af8
GKH		 1751}
1752
4d6ea9c3 1753static void slic_init_cleanup(struct adapter *adapter)
4d6f6af8 1754{
4d6ea9c3
DK		 1755 if (adapter->intrregistered) {
1756 adapter->intrregistered = 0;
1757 free_irq(adapter->netdev->irq, adapter->netdev);
4d6f6af8 1758
4d6f6af8 1759 }
4d6ea9c3
DK		 1760 if (adapter->pshmem) {
1761 pci_free_consistent(adapter->pcidev,
1762 sizeof(struct slic_shmem),
1763 adapter->pshmem, adapter->phys_shmem);
1764 adapter->pshmem = NULL;
01d0a9b4 1765 adapter->phys_shmem = (dma_addr_t)(unsigned long)NULL;
4d6f6af8 1766 }
4d6ea9c3
DK		 1767
1768 if (adapter->pingtimerset) {
1769 adapter->pingtimerset = 0;
1770 del_timer(&adapter->pingtimer);
4d6f6af8 1771 }
4d6f6af8 1772
4d6ea9c3
DK		 1773 slic_rspqueue_free(adapter);
1774 slic_cmdq_free(adapter);
1775 slic_rcvqueue_free(adapter);
4d6f6af8
GKH		 1776}
1777
4d6ea9c3
DK		 1778/*
1779 * Allocate a mcast_address structure to hold the multicast address.
1780 * Link it in.
1781 */
1782static int slic_mcast_add_list(struct adapter *adapter, char *address)
4d6f6af8 1783{
4d6ea9c3 1784 struct mcast_address *mcaddr, *mlist;
4d6f6af8 1785
4d6ea9c3
DK		 1786 /* Check to see if it already exists */
1787 mlist = adapter->mcastaddrs;
1788 while (mlist) {
8329419a 1789 if (ether_addr_equal(mlist->address, address))
4d6ea9c3
DK		 1790 return 0;
1791 mlist = mlist->next;
1792 }
e8bc9b7a 1793
4d6ea9c3
DK		 1794 /* Doesn't already exist. Allocate a structure to hold it */
1795 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
1796 if (mcaddr == NULL)
1797 return 1;
a71b9978 1798
f999ac00 1799 ether_addr_copy(mcaddr->address, address);
4d6ea9c3
DK		 1800
1801 mcaddr->next = adapter->mcastaddrs;
1802 adapter->mcastaddrs = mcaddr;
4d6f6af8 1803
4d6f6af8
GKH		 1804 return 0;
1805}
1806
4d6ea9c3 1807static void slic_mcast_set_list(struct net_device *dev)
4d6f6af8 1808{
4d6ea9c3
DK		 1809 struct adapter *adapter = netdev_priv(dev);
1810 int status = 0;
1811 char *addresses;
1812 struct netdev_hw_addr *ha;
4d6f6af8 1813
4d6ea9c3
DK		 1814 netdev_for_each_mc_addr(ha, dev) {
1815 addresses = (char *) &ha->addr;
1816 status = slic_mcast_add_list(adapter, addresses);
1817 if (status != 0)
1818 break;
1819 slic_mcast_set_bit(adapter, addresses);
1820 }
1821
1822 if (adapter->devflags_prev != dev->flags) {
1823 adapter->macopts = MAC_DIRECTED;
1824 if (dev->flags) {
1825 if (dev->flags & IFF_BROADCAST)
1826 adapter->macopts |= MAC_BCAST;
1827 if (dev->flags & IFF_PROMISC)
1828 adapter->macopts |= MAC_PROMISC;
1829 if (dev->flags & IFF_ALLMULTI)
1830 adapter->macopts |= MAC_ALLMCAST;
1831 if (dev->flags & IFF_MULTICAST)
1832 adapter->macopts |= MAC_MCAST;
4d6f6af8 1833 }
4d6ea9c3
DK		 1834 adapter->devflags_prev = dev->flags;
1835 slic_config_set(adapter, true);
1836 } else {
1837 if (status == 0)
1838 slic_mcast_set_mask(adapter);
4d6f6af8 1839 }
4d6f6af8
GKH		 1840}
1841
4d6ea9c3
DK		 1842#define XMIT_FAIL_LINK_STATE 1
1843#define XMIT_FAIL_ZERO_LENGTH 2
1844#define XMIT_FAIL_HOSTCMD_FAIL 3
1845
1846static void slic_xmit_build_request(struct adapter *adapter,
1847 struct slic_hostcmd *hcmd, struct sk_buff *skb)
4d6f6af8 1848{
4d6ea9c3
DK		 1849 struct slic_host64_cmd *ihcmd;
1850 ulong phys_addr;
4d6f6af8 1851
4d6ea9c3
DK		 1852 ihcmd = &hcmd->cmd64;
1853
1854 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
1855 ihcmd->command = IHCMD_XMT_REQ;
1856 ihcmd->u.slic_buffers.totlen = skb->len;
1857 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
1858 PCI_DMA_TODEVICE);
1859 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
1860 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
1861 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
1033f1f7 1862#if BITS_PER_LONG == 64
4d6ea9c3
DK		 1863 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
1864 (u64) hcmd) + 31) >> 5);
1033f1f7 1865#else
4d6ea9c3
DK		 1866 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
1867 (u32) hcmd) + 31) >> 5);
4d6ea9c3 1868#endif
4d6f6af8
GKH		 1869}
1870
4d6ea9c3
DK		 1871static void slic_xmit_fail(struct adapter *adapter,
1872 struct sk_buff *skb,
1873 void *cmd, u32 skbtype, u32 status)
4d6f6af8 1874{
4d6ea9c3
DK		 1875 if (adapter->xmitq_full)
1876 netif_stop_queue(adapter->netdev);
1877 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
1878 switch (status) {
1879 case XMIT_FAIL_LINK_STATE:
1880 dev_err(&adapter->netdev->dev,
5d5b44b5 1881 "reject xmit skb[%p: %x] linkstate[%s] adapter[%s:%d] card[%s:%d]\n",
4d6ea9c3
DK		 1882 skb, skb->pkt_type,
1883 SLIC_LINKSTATE(adapter->linkstate),
1884 SLIC_ADAPTER_STATE(adapter->state),
1885 adapter->state,
1886 SLIC_CARD_STATE(adapter->card->state),
1887 adapter->card->state);
1888 break;
1889 case XMIT_FAIL_ZERO_LENGTH:
1890 dev_err(&adapter->netdev->dev,
1891 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
1892 skb, skb->pkt_type);
1893 break;
1894 case XMIT_FAIL_HOSTCMD_FAIL:
1895 dev_err(&adapter->netdev->dev,
17d2c643
SC		 1896 "xmit_start skb[%p] type[%x] No host commands available\n",
1897 skb, skb->pkt_type);
4d6ea9c3 1898 break;
4d6ea9c3
DK		 1899 }
1900 }
1901 dev_kfree_skb(skb);
9092de6d 1902 adapter->netdev->stats.tx_dropped++;
4d6ea9c3 1903}
e8bc9b7a 1904
4d6ea9c3
DK		 1905static void slic_rcv_handle_error(struct adapter *adapter,
1906 struct slic_rcvbuf *rcvbuf)
1907{
1908 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
9092de6d 1909 struct net_device *netdev = adapter->netdev;
4d6f6af8 1910
4d6ea9c3
DK		 1911 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
1912 if (hdr->frame_status14 & VRHSTAT_802OE)
1913 adapter->if_events.oflow802++;
1914 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
1915 adapter->if_events.Tprtoflow++;
1916 if (hdr->frame_status_b14 & VRHSTATB_802UE)
1917 adapter->if_events.uflow802++;
1918 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
1919 adapter->if_events.rcvearly++;
9092de6d 1920 netdev->stats.rx_fifo_errors++;
4d6ea9c3
DK		 1921 }
1922 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
1923 adapter->if_events.Bufov++;
9092de6d 1924 netdev->stats.rx_over_errors++;
4d6ea9c3
DK		 1925 }
1926 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
1927 adapter->if_events.Carre++;
9092de6d 1928 netdev->stats.tx_carrier_errors++;
4d6ea9c3
DK		 1929 }
1930 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
1931 adapter->if_events.Longe++;
1932 if (hdr->frame_status_b14 & VRHSTATB_PREA)
1933 adapter->if_events.Invp++;
1934 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
1935 adapter->if_events.Crc++;
9092de6d 1936 netdev->stats.rx_crc_errors++;
4d6ea9c3
DK		 1937 }
1938 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
1939 adapter->if_events.Drbl++;
1940 if (hdr->frame_status_b14 & VRHSTATB_CODE)
1941 adapter->if_events.Code++;
1942 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
1943 adapter->if_events.TpCsum++;
1944 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
1945 adapter->if_events.TpHlen++;
1946 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
1947 adapter->if_events.IpCsum++;
1948 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
1949 adapter->if_events.IpLen++;
1950 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
1951 adapter->if_events.IpHlen++;
4d6f6af8 1952 } else {
4d6ea9c3
DK		 1953 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
1954 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
1955
1956 if (xerr == VGBSTAT_XCSERR)
1957 adapter->if_events.TpCsum++;
1958 if (xerr == VGBSTAT_XUFLOW)
1959 adapter->if_events.Tprtoflow++;
1960 if (xerr == VGBSTAT_XHLEN)
1961 adapter->if_events.TpHlen++;
1962 }
1963 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
1964 u32 nerr =
1965 (hdr->
1966 frame_statusGB >> VGBSTAT_NERRSHFT) &
1967 VGBSTAT_NERRMSK;
1968 if (nerr == VGBSTAT_NCSERR)
1969 adapter->if_events.IpCsum++;
1970 if (nerr == VGBSTAT_NUFLOW)
1971 adapter->if_events.IpLen++;
1972 if (nerr == VGBSTAT_NHLEN)
1973 adapter->if_events.IpHlen++;
1974 }
1975 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
1976 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
1977
1978 if (lerr == VGBSTAT_LDEARLY)
1979 adapter->if_events.rcvearly++;
1980 if (lerr == VGBSTAT_LBOFLO)
1981 adapter->if_events.Bufov++;
1982 if (lerr == VGBSTAT_LCODERR)
1983 adapter->if_events.Code++;
1984 if (lerr == VGBSTAT_LDBLNBL)
1985 adapter->if_events.Drbl++;
1986 if (lerr == VGBSTAT_LCRCERR)
1987 adapter->if_events.Crc++;
1988 if (lerr == VGBSTAT_LOFLO)
1989 adapter->if_events.oflow802++;
1990 if (lerr == VGBSTAT_LUFLO)
1991 adapter->if_events.uflow802++;
1992 }
4d6f6af8 1993 }
4d6f6af8
GKH		 1994}
1995
4d6ea9c3
DK		 1996#define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
1997#define M_FAST_PATH 0x0040
4d6f6af8 1998
4d6ea9c3 1999static void slic_rcv_handler(struct adapter *adapter)
4d6f6af8 2000{
9092de6d 2001 struct net_device *netdev = adapter->netdev;
4d6ea9c3
DK		 2002 struct sk_buff *skb;
2003 struct slic_rcvbuf *rcvbuf;
2004 u32 frames = 0;
4d6f6af8 2005
4d6ea9c3
DK		 2006 while ((skb = slic_rcvqueue_getnext(adapter))) {
2007 u32 rx_bytes;
4d6f6af8 2008
4d6ea9c3
DK		 2009 rcvbuf = (struct slic_rcvbuf *)skb->head;
2010 adapter->card->events++;
2011 if (rcvbuf->status & IRHDDR_ERR) {
2012 adapter->rx_errors++;
2013 slic_rcv_handle_error(adapter, rcvbuf);
2014 slic_rcvqueue_reinsert(adapter, skb);
2015 continue;
2016 }
4d6f6af8 2017
4d6ea9c3
DK		 2018 if (!slic_mac_filter(adapter, (struct ether_header *)
2019 rcvbuf->data)) {
2020 slic_rcvqueue_reinsert(adapter, skb);
2021 continue;
2022 }
2023 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
2024 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
2025 skb_put(skb, rx_bytes);
9092de6d
DK		 2026 netdev->stats.rx_packets++;
2027 netdev->stats.rx_bytes += rx_bytes;
4d6ea9c3
DK		 2028#if SLIC_OFFLOAD_IP_CHECKSUM
2029 skb->ip_summed = CHECKSUM_UNNECESSARY;
2030#endif
4d6f6af8 2031
4d6ea9c3
DK		 2032 skb->dev = adapter->netdev;
2033 skb->protocol = eth_type_trans(skb, skb->dev);
2034 netif_rx(skb);
4d6f6af8 2035
4d6ea9c3
DK		 2036 ++frames;
2037#if SLIC_INTERRUPT_PROCESS_LIMIT
2038 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
2039 adapter->rcv_interrupt_yields++;
4d6f6af8
GKH		 2040 break;
2041 }
4d6ea9c3 2042#endif
4d6f6af8 2043 }
4d6ea9c3 2044 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
4d6f6af8
GKH		 2045}
2046
4d6ea9c3 2047static void slic_xmit_complete(struct adapter *adapter)
4d6f6af8 2048{
4d6ea9c3
DK		 2049 struct slic_hostcmd *hcmd;
2050 struct slic_rspbuf *rspbuf;
2051 u32 frames = 0;
2052 struct slic_handle_word slic_handle_word;
4d6f6af8 2053
4d6ea9c3
DK		 2054 do {
2055 rspbuf = slic_rspqueue_getnext(adapter);
2056 if (!rspbuf)
2057 break;
2058 adapter->xmit_completes++;
2059 adapter->card->events++;
2060 /*
2061 Get the complete host command buffer
2062 */
2063 slic_handle_word.handle_token = rspbuf->hosthandle;
4d6ea9c3
DK		 2064 hcmd =
2065 (struct slic_hostcmd *)
2066 adapter->slic_handles[slic_handle_word.handle_index].
2067 address;
2068/* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
4d6ea9c3
DK		 2069 if (hcmd->type == SLIC_CMD_DUMB) {
2070 if (hcmd->skb)
2071 dev_kfree_skb_irq(hcmd->skb);
2072 slic_cmdq_putdone_irq(adapter, hcmd);
4d6f6af8 2073 }
4d6ea9c3
DK		 2074 rspbuf->status = 0;
2075 rspbuf->hosthandle = 0;
2076 frames++;
2077 } while (1);
2078 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
4d6f6af8
GKH		 2079}
2080
f66626e4
RK		 2081static void slic_interrupt_card_up(u32 isr, struct adapter *adapter,
2082 struct net_device *dev)
2083{
2084 if (isr & ~ISR_IO) {
2085 if (isr & ISR_ERR) {
2086 adapter->error_interrupts++;
2087 if (isr & ISR_RMISS) {
2088 int count;
2089 int pre_count;
2090 int errors;
2091
2092 struct slic_rcvqueue *rcvq =
2093 &adapter->rcvqueue;
2094
2095 adapter->error_rmiss_interrupts++;
2096
2097 if (!rcvq->errors)
2098 rcv_count = rcvq->count;
2099 pre_count = rcvq->count;
2100 errors = rcvq->errors;
2101
2102 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
2103 count = slic_rcvqueue_fill(adapter);
2104 if (!count)
2105 break;
2106 }
2107 } else if (isr & ISR_XDROP) {
2108 dev_err(&dev->dev,
17d2c643
SC		 2109 "isr & ISR_ERR [%x] ISR_XDROP\n",
2110 isr);
f66626e4
RK		 2111 } else {
2112 dev_err(&dev->dev,
2113 "isr & ISR_ERR [%x]\n",
2114 isr);
2115 }
2116 }
2117
2118 if (isr & ISR_LEVENT) {
2119 adapter->linkevent_interrupts++;
2120 slic_link_event_handler(adapter);
2121 }
2122
2123 if ((isr & ISR_UPC) || (isr & ISR_UPCERR) ||
2124 (isr & ISR_UPCBSY)) {
2125 adapter->upr_interrupts++;
2126 slic_upr_request_complete(adapter, isr);
2127 }
2128 }
2129
2130 if (isr & ISR_RCV) {
2131 adapter->rcv_interrupts++;
2132 slic_rcv_handler(adapter);
2133 }
2134
2135 if (isr & ISR_CMD) {
2136 adapter->xmit_interrupts++;
2137 slic_xmit_complete(adapter);
2138 }
2139}
2140
2141
4d6ea9c3 2142static irqreturn_t slic_interrupt(int irq, void *dev_id)
4d6f6af8 2143{
4d6ea9c3
DK		 2144 struct net_device *dev = (struct net_device *)dev_id;
2145 struct adapter *adapter = netdev_priv(dev);
2146 u32 isr;
4d6f6af8 2147
4d6ea9c3
DK		 2148 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
2149 slic_reg32_write(&adapter->slic_regs->slic_icr,
2150 ICR_INT_MASK, FLUSH);
2151 isr = adapter->isrcopy = adapter->pshmem->isr;
2152 adapter->pshmem->isr = 0;
2153 adapter->num_isrs++;
2154 switch (adapter->card->state) {
2155 case CARD_UP:
f66626e4 2156 slic_interrupt_card_up(isr, adapter, dev);
4d6ea9c3 2157 break;
4d6f6af8 2158
4d6ea9c3
DK		 2159 case CARD_DOWN:
2160 if ((isr & ISR_UPC) ||
2161 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2162 adapter->upr_interrupts++;
2163 slic_upr_request_complete(adapter, isr);
2164 }
2165 break;
4d6ea9c3 2166 }
4d6f6af8 2167
4d6ea9c3
DK		 2168 adapter->isrcopy = 0;
2169 adapter->all_reg_writes += 2;
2170 adapter->isr_reg_writes++;
2171 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
2172 } else {
2173 adapter->false_interrupts++;
4d6f6af8 2174 }
4d6ea9c3 2175 return IRQ_HANDLED;
4d6f6af8
GKH		 2176}
2177
4d6ea9c3 2178#define NORMAL_ETHFRAME 0
4d6f6af8 2179
4d6ea9c3
DK		 2180static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
2181{
2182 struct sliccard *card;
2183 struct adapter *adapter = netdev_priv(dev);
2184 struct slic_hostcmd *hcmd = NULL;
2185 u32 status = 0;
4d6ea9c3 2186 void *offloadcmd = NULL;
4d6f6af8 2187
4d6ea9c3 2188 card = adapter->card;
4d6ea9c3
DK		 2189 if ((adapter->linkstate != LINK_UP) ||
2190 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
2191 status = XMIT_FAIL_LINK_STATE;
2192 goto xmit_fail;
4d6f6af8 2193
4d6ea9c3
DK		 2194 } else if (skb->len == 0) {
2195 status = XMIT_FAIL_ZERO_LENGTH;
2196 goto xmit_fail;
4d6f6af8
GKH		 2197 }
2198
cbb0920b
PH		 2199 hcmd = slic_cmdq_getfree(adapter);
2200 if (!hcmd) {
2201 adapter->xmitq_full = 1;
2202 status = XMIT_FAIL_HOSTCMD_FAIL;
2203 goto xmit_fail;
4d6ea9c3 2204 }
cbb0920b
PH		 2205 hcmd->skb = skb;
2206 hcmd->busy = 1;
2207 hcmd->type = SLIC_CMD_DUMB;
2208 slic_xmit_build_request(adapter, hcmd, skb);
9092de6d
DK		 2209 dev->stats.tx_packets++;
2210 dev->stats.tx_bytes += skb->len;
4d6f6af8 2211
4d6ea9c3
DK		 2212#ifdef DEBUG_DUMP
2213 if (adapter->kill_card) {
2214 struct slic_host64_cmd ihcmd;
4d6f6af8 2215
4d6ea9c3
DK		 2216 ihcmd = &hcmd->cmd64;
2217
2218 ihcmd->flags |= 0x40;
2219 adapter->kill_card = 0; /* only do this once */
4d6f6af8 2220 }
4d6ea9c3
DK		 2221#endif
2222 if (hcmd->paddrh == 0) {
2223 slic_reg32_write(&adapter->slic_regs->slic_cbar,
2224 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
2225 } else {
2226 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
2227 (hcmd->paddrl | hcmd->cmdsize),
2228 &adapter->slic_regs->slic_addr_upper,
2229 hcmd->paddrh, DONT_FLUSH);
2230 }
2231xmit_done:
2232 return NETDEV_TX_OK;
2233xmit_fail:
cbb0920b 2234 slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status);
4d6ea9c3 2235 goto xmit_done;
4d6f6af8
GKH		 2236}
2237
4d6ea9c3
DK		 2238
2239static void slic_adapter_freeresources(struct adapter *adapter)
4d6f6af8 2240{
4d6ea9c3 2241 slic_init_cleanup(adapter);
4d6ea9c3
DK		 2242 adapter->error_interrupts = 0;
2243 adapter->rcv_interrupts = 0;
2244 adapter->xmit_interrupts = 0;
2245 adapter->linkevent_interrupts = 0;
2246 adapter->upr_interrupts = 0;
2247 adapter->num_isrs = 0;
2248 adapter->xmit_completes = 0;
2249 adapter->rcv_broadcasts = 0;
2250 adapter->rcv_multicasts = 0;
2251 adapter->rcv_unicasts = 0;
2252}
4d6f6af8 2253
4d6ea9c3
DK		 2254static int slic_adapter_allocresources(struct adapter *adapter)
2255{
2256 if (!adapter->intrregistered) {
2257 int retval;
4d6f6af8 2258
4d6ea9c3
DK		 2259 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2260 slic_global.driver_lock.flags);
4d6f6af8 2261
4d6ea9c3
DK		 2262 retval = request_irq(adapter->netdev->irq,
2263 &slic_interrupt,
2264 IRQF_SHARED,
2265 adapter->netdev->name, adapter->netdev);
4d6f6af8 2266
4d6ea9c3
DK		 2267 spin_lock_irqsave(&slic_global.driver_lock.lock,
2268 slic_global.driver_lock.flags);
2269
2270 if (retval) {
2271 dev_err(&adapter->netdev->dev,
2272 "request_irq (%s) FAILED [%x]\n",
2273 adapter->netdev->name, retval);
2274 return retval;
4d6f6af8 2275 }
4d6ea9c3 2276 adapter->intrregistered = 1;
4d6f6af8 2277 }
d1939786 2278 return 0;
4d6f6af8
GKH		 2279}
2280
4d6ea9c3
DK		 2281/*
2282 * slic_if_init
2283 *
2284 * Perform initialization of our slic interface.
2285 *
2286 */
2287static int slic_if_init(struct adapter *adapter)
4d6f6af8 2288{
4d6ea9c3
DK		 2289 struct sliccard *card = adapter->card;
2290 struct net_device *dev = adapter->netdev;
2291 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2292 struct slic_shmem *pshmem;
2293 int rc;
4d6f6af8 2294
4d6ea9c3
DK		 2295 /* adapter should be down at this point */
2296 if (adapter->state != ADAPT_DOWN) {
2297 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
2298 __func__);
2299 rc = -EIO;
2300 goto err;
4d6f6af8 2301 }
4d6f6af8 2302
4d6ea9c3
DK		 2303 adapter->devflags_prev = dev->flags;
2304 adapter->macopts = MAC_DIRECTED;
2305 if (dev->flags) {
2306 if (dev->flags & IFF_BROADCAST)
2307 adapter->macopts |= MAC_BCAST;
2308 if (dev->flags & IFF_PROMISC)
2309 adapter->macopts |= MAC_PROMISC;
2310 if (dev->flags & IFF_ALLMULTI)
2311 adapter->macopts |= MAC_ALLMCAST;
2312 if (dev->flags & IFF_MULTICAST)
2313 adapter->macopts |= MAC_MCAST;
2314 }
2315 rc = slic_adapter_allocresources(adapter);
2316 if (rc) {
2317 dev_err(&dev->dev,
2318 "%s: slic_adapter_allocresources FAILED %x\n",
2319 __func__, rc);
2320 slic_adapter_freeresources(adapter);
2321 goto err;
2322 }
4d6f6af8 2323
4d6ea9c3 2324 if (!adapter->queues_initialized) {
83682cd2
CJB		 2325 rc = slic_rspqueue_init(adapter);
2326 if (rc)
4d6ea9c3 2327 goto err;
83682cd2
CJB		 2328 rc = slic_cmdq_init(adapter);
2329 if (rc)
4d6ea9c3 2330 goto err;
83682cd2
CJB		 2331 rc = slic_rcvqueue_init(adapter);
2332 if (rc)
4d6ea9c3
DK		 2333 goto err;
2334 adapter->queues_initialized = 1;
2335 }
4d6f6af8 2336
4d6ea9c3
DK		 2337 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2338 mdelay(1);
2339
2340 if (!adapter->isp_initialized) {
01d0a9b4
JP		 2341 pshmem = (struct slic_shmem *)(unsigned long)
2342 adapter->phys_shmem;
4d6ea9c3
DK		 2343
2344 spin_lock_irqsave(&adapter->bit64reglock.lock,
2345 adapter->bit64reglock.flags);
2346
1033f1f7 2347#if BITS_PER_LONG == 64
4d6ea9c3
DK		 2348 slic_reg32_write(&slic_regs->slic_addr_upper,
2349 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
2350 slic_reg32_write(&slic_regs->slic_isp,
2351 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
1033f1f7 2352#else
4d6ea9c3 2353 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
17d2c643
SC		 2354 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr,
2355 FLUSH);
4d6f6af8 2356#endif
4d6ea9c3
DK		 2357 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2358 adapter->bit64reglock.flags);
2359 adapter->isp_initialized = 1;
4d6f6af8 2360 }
4d6f6af8 2361
4d6ea9c3
DK		 2362 adapter->state = ADAPT_UP;
2363 if (!card->loadtimerset) {
7d2b3cf7
AM		 2364 setup_timer(&card->loadtimer, &slic_timer_load_check,
2365 (ulong)card);
4d6ea9c3
DK		 2366 card->loadtimer.expires =
2367 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
4d6ea9c3
DK		 2368 add_timer(&card->loadtimer);
2369
2370 card->loadtimerset = 1;
2371 }
2372
2373 if (!adapter->pingtimerset) {
7d2b3cf7 2374 setup_timer(&adapter->pingtimer, &slic_timer_ping, (ulong)dev);
4d6ea9c3
DK		 2375 adapter->pingtimer.expires =
2376 jiffies + (PING_TIMER_INTERVAL * HZ);
4d6ea9c3
DK		 2377 add_timer(&adapter->pingtimer);
2378 adapter->pingtimerset = 1;
2379 adapter->card->pingstatus = ISR_PINGMASK;
2380 }
2381
2382 /*
2383 * clear any pending events, then enable interrupts
2384 */
2385 adapter->isrcopy = 0;
2386 adapter->pshmem->isr = 0;
2387 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
2388 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
2389
2390 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
2391 slic_link_event_handler(adapter);
4d6f6af8 2392
4d6ea9c3
DK		 2393err:
2394 return rc;
4d6f6af8
GKH		 2395}
2396
4d6ea9c3 2397static int slic_entry_open(struct net_device *dev)
4d6f6af8 2398{
4d6ea9c3
DK		 2399 struct adapter *adapter = netdev_priv(dev);
2400 struct sliccard *card = adapter->card;
4d6ea9c3 2401 int status;
4d6f6af8 2402
4d6ea9c3 2403 netif_stop_queue(adapter->netdev);
4d6f6af8 2404
4d6ea9c3
DK		 2405 spin_lock_irqsave(&slic_global.driver_lock.lock,
2406 slic_global.driver_lock.flags);
4d6ea9c3
DK		 2407 if (!adapter->activated) {
2408 card->adapters_activated++;
2409 slic_global.num_slic_ports_active++;
2410 adapter->activated = 1;
2411 }
2412 status = slic_if_init(adapter);
4d6f6af8 2413
4d6ea9c3
DK		 2414 if (status != 0) {
2415 if (adapter->activated) {
2416 card->adapters_activated--;
2417 slic_global.num_slic_ports_active--;
2418 adapter->activated = 0;
4d6f6af8 2419 }
71329965 2420 goto spin_unlock;
4d6ea9c3
DK		 2421 }
2422 if (!card->master)
2423 card->master = adapter;
2424
71329965
DN		 2425spin_unlock:
2426 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2427 slic_global.driver_lock.flags);
2428 return status;
4d6f6af8
GKH		 2429}
2430
4d6ea9c3 2431static void slic_card_cleanup(struct sliccard *card)
4d6f6af8 2432{
4d6ea9c3
DK		 2433 if (card->loadtimerset) {
2434 card->loadtimerset = 0;
161737a6 2435 del_timer_sync(&card->loadtimer);
4d6ea9c3 2436 }
4d6f6af8 2437
4d6ea9c3 2438 kfree(card);
4d6f6af8
GKH		 2439}
2440
ecb4f387 2441static void slic_entry_remove(struct pci_dev *pcidev)
4d6f6af8 2442{
4d6ea9c3 2443 struct net_device *dev = pci_get_drvdata(pcidev);
4d6ea9c3
DK		 2444 struct adapter *adapter = netdev_priv(dev);
2445 struct sliccard *card;
2446 struct mcast_address *mcaddr, *mlist;
4d6f6af8 2447
dedabbbc
DM		 2448 unregister_netdev(dev);
2449
4d6ea9c3
DK		 2450 slic_adapter_freeresources(adapter);
2451 slic_unmap_mmio_space(adapter);
4d6ea9c3 2452
4d6ea9c3
DK		 2453 /* free multicast addresses */
2454 mlist = adapter->mcastaddrs;
2455 while (mlist) {
2456 mcaddr = mlist;
2457 mlist = mlist->next;
2458 kfree(mcaddr);
4d6f6af8 2459 }
4d6ea9c3 2460 card = adapter->card;
4d6ea9c3
DK		 2461 card->adapters_allocated--;
2462 adapter->allocated = 0;
2463 if (!card->adapters_allocated) {
2464 struct sliccard *curr_card = slic_global.slic_card;
0d0e9d9e 2465
4d6ea9c3
DK		 2466 if (curr_card == card) {
2467 slic_global.slic_card = card->next;
2468 } else {
2469 while (curr_card->next != card)
2470 curr_card = curr_card->next;
4d6ea9c3
DK		 2471 curr_card->next = card->next;
2472 }
4d6ea9c3
DK		 2473 slic_global.num_slic_cards--;
2474 slic_card_cleanup(card);
4d6f6af8 2475 }
20caa14c 2476 free_netdev(dev);
4d6ea9c3 2477 pci_release_regions(pcidev);
d99b5ac6 2478 pci_disable_device(pcidev);
4d6f6af8
GKH		 2479}
2480
4d6ea9c3 2481static int slic_entry_halt(struct net_device *dev)
4d6f6af8 2482{
4d6ea9c3
DK		 2483 struct adapter *adapter = netdev_priv(dev);
2484 struct sliccard *card = adapter->card;
2485 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
4d6f6af8 2486
4d6ea9c3
DK		 2487 spin_lock_irqsave(&slic_global.driver_lock.lock,
2488 slic_global.driver_lock.flags);
4d6ea9c3
DK		 2489 netif_stop_queue(adapter->netdev);
2490 adapter->state = ADAPT_DOWN;
2491 adapter->linkstate = LINK_DOWN;
2492 adapter->upr_list = NULL;
2493 adapter->upr_busy = 0;
2494 adapter->devflags_prev = 0;
4d6ea9c3
DK		 2495 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2496 adapter->all_reg_writes++;
2497 adapter->icr_reg_writes++;
2498 slic_config_clear(adapter);
2499 if (adapter->activated) {
2500 card->adapters_activated--;
2501 slic_global.num_slic_ports_active--;
2502 adapter->activated = 0;
2503 }
2504#ifdef AUTOMATIC_RESET
2505 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
2506#endif
2507 /*
2508 * Reset the adapter's cmd queues
2509 */
2510 slic_cmdq_reset(adapter);
4d6f6af8 2511
4d6ea9c3
DK		 2512#ifdef AUTOMATIC_RESET
2513 if (!card->adapters_activated)
2514 slic_card_init(card, adapter);
2515#endif
4d6f6af8 2516
4d6ea9c3
DK		 2517 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
2518 slic_global.driver_lock.flags);
2519 return 0;
2520}
4d6f6af8 2521
4d6ea9c3
DK		 2522static struct net_device_stats *slic_get_stats(struct net_device *dev)
2523{
2524 struct adapter *adapter = netdev_priv(dev);
4d6f6af8 2525
4d6ea9c3
DK		 2526 dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions;
2527 dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors;
2528 dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors;
2529 dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
2530 dev->stats.tx_heartbeat_errors = 0;
2531 dev->stats.tx_aborted_errors = 0;
2532 dev->stats.tx_window_errors = 0;
2533 dev->stats.tx_fifo_errors = 0;
2534 dev->stats.rx_frame_errors = 0;
2535 dev->stats.rx_length_errors = 0;
2536
2537 return &dev->stats;
4d6f6af8
GKH		 2538}
2539
4d6ea9c3 2540static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
4d6f6af8 2541{
4d6ea9c3
DK		 2542 struct adapter *adapter = netdev_priv(dev);
2543 struct ethtool_cmd edata;
2544 struct ethtool_cmd ecmd;
2545 u32 data[7];
2546 u32 intagg;
4d6f6af8 2547
4d6ea9c3
DK		 2548 switch (cmd) {
2549 case SIOCSLICSETINTAGG:
2550 if (copy_from_user(data, rq->ifr_data, 28))
2551 return -EFAULT;
2552 intagg = data[0];
2553 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
2554 __func__, intagg);
2555 slic_intagg_set(adapter, intagg);
2556 return 0;
4d6f6af8 2557
4d6ea9c3
DK		 2558#ifdef SLIC_TRACE_DUMP_ENABLED
2559 case SIOCSLICTRACEDUMP:
2560 {
2561 u32 value;
0d0e9d9e 2562
4d6ea9c3
DK		 2563 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
2564
2565 if (copy_from_user(data, rq->ifr_data, 28)) {
2566 PRINT_ERROR
2567 ("slic: copy_from_user FAILED getting initial simba param\n");
2568 return -EFAULT;
2569 }
2570
2571 value = data[0];
2572 if (tracemon_request == SLIC_DUMP_DONE) {
2573 PRINT_ERROR
2574 ("ATK Diagnostic Trace Dump Requested\n");
2575 tracemon_request = SLIC_DUMP_REQUESTED;
2576 tracemon_request_type = value;
2577 tracemon_timestamp = jiffies;
2578 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
2579 (tracemon_request ==
2580 SLIC_DUMP_IN_PROGRESS)) {
2581 PRINT_ERROR
2582 ("ATK Diagnostic Trace Dump Requested but already in progress... ignore\n");
2583 } else {
2584 PRINT_ERROR
2585 ("ATK Diagnostic Trace Dump Requested\n");
2586 tracemon_request = SLIC_DUMP_REQUESTED;
2587 tracemon_request_type = value;
2588 tracemon_timestamp = jiffies;
4d6f6af8 2589 }
4d6ea9c3 2590 return 0;
4d6f6af8 2591 }
4d6ea9c3
DK		 2592#endif
2593 case SIOCETHTOOL:
4d6ea9c3
DK		 2594 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
2595 return -EFAULT;
4d6f6af8 2596
4d6ea9c3 2597 if (ecmd.cmd == ETHTOOL_GSET) {
986d7584 2598 memset(&edata, 0, sizeof(edata));
4d6ea9c3
DK		 2599 edata.supported = (SUPPORTED_10baseT_Half |
2600 SUPPORTED_10baseT_Full |
2601 SUPPORTED_100baseT_Half |
2602 SUPPORTED_100baseT_Full |
2603 SUPPORTED_Autoneg | SUPPORTED_MII);
2604 edata.port = PORT_MII;
2605 edata.transceiver = XCVR_INTERNAL;
2606 edata.phy_address = 0;
2607 if (adapter->linkspeed == LINK_100MB)
2608 edata.speed = SPEED_100;
2609 else if (adapter->linkspeed == LINK_10MB)
2610 edata.speed = SPEED_10;
2611 else
2612 edata.speed = 0;
4d6f6af8 2613
4d6ea9c3
DK		 2614 if (adapter->linkduplex == LINK_FULLD)
2615 edata.duplex = DUPLEX_FULL;
2616 else
2617 edata.duplex = DUPLEX_HALF;
4d6f6af8 2618
4d6ea9c3
DK		 2619 edata.autoneg = AUTONEG_ENABLE;
2620 edata.maxtxpkt = 1;
2621 edata.maxrxpkt = 1;
2622 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
2623 return -EFAULT;
4d6f6af8 2624
4d6ea9c3
DK		 2625 } else if (ecmd.cmd == ETHTOOL_SSET) {
2626 if (!capable(CAP_NET_ADMIN))
2627 return -EPERM;
4d6f6af8 2628
4d6ea9c3
DK		 2629 if (adapter->linkspeed == LINK_100MB)
2630 edata.speed = SPEED_100;
2631 else if (adapter->linkspeed == LINK_10MB)
2632 edata.speed = SPEED_10;
2633 else
2634 edata.speed = 0;
2635
2636 if (adapter->linkduplex == LINK_FULLD)
2637 edata.duplex = DUPLEX_FULL;
2638 else
2639 edata.duplex = DUPLEX_HALF;
2640
2641 edata.autoneg = AUTONEG_ENABLE;
2642 edata.maxtxpkt = 1;
2643 edata.maxrxpkt = 1;
2644 if ((ecmd.speed != edata.speed) ||
2645 (ecmd.duplex != edata.duplex)) {
2646 u32 speed;
2647 u32 duplex;
2648
2649 if (ecmd.speed == SPEED_10)
2650 speed = 0;
2651 else
2652 speed = PCR_SPEED_100;
2653 if (ecmd.duplex == DUPLEX_FULL)
2654 duplex = PCR_DUPLEX_FULL;
2655 else
2656 duplex = 0;
2657 slic_link_config(adapter, speed, duplex);
2658 slic_link_event_handler(adapter);
2659 }
2660 }
2661 return 0;
2662 default:
2663 return -EOPNOTSUPP;
2664 }
4d6f6af8
GKH		 2665}
2666
4d6ea9c3 2667static void slic_config_pci(struct pci_dev *pcidev)
4d6f6af8 2668{
4d6ea9c3
DK		 2669 u16 pci_command;
2670 u16 new_command;
4d6f6af8 2671
4d6ea9c3
DK		 2672 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
2673
2674 new_command = pci_command | PCI_COMMAND_MASTER
2675 | PCI_COMMAND_MEMORY
2676 | PCI_COMMAND_INVALIDATE
2677 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
2678 if (pci_command != new_command)
2679 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
4d6f6af8
GKH		 2680}
2681
4d6ea9c3 2682static int slic_card_init(struct sliccard *card, struct adapter *adapter)
4d6f6af8 2683{
4d6ea9c3
DK		 2684 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2685 struct slic_eeprom *peeprom;
2686 struct oslic_eeprom *pOeeprom;
2687 dma_addr_t phys_config;
2688 u32 phys_configh;
2689 u32 phys_configl;
2690 u32 i = 0;
2691 struct slic_shmem *pshmem;
2692 int status;
2693 uint macaddrs = card->card_size;
2694 ushort eecodesize;
2695 ushort dramsize;
2696 ushort ee_chksum;
2697 ushort calc_chksum;
2698 struct slic_config_mac *pmac;
2699 unsigned char fruformat;
2700 unsigned char oemfruformat;
2701 struct atk_fru *patkfru;
2702 union oemfru *poemfru;
4d6f6af8 2703
4d6ea9c3
DK		 2704 /* Reset everything except PCI configuration space */
2705 slic_soft_reset(adapter);
2706
2707 /* Download the microcode */
2708 status = slic_card_download(adapter);
811e843d 2709 if (status)
4d6ea9c3 2710 return status;
4d6f6af8 2711
4d6ea9c3
DK		 2712 if (!card->config_set) {
2713 peeprom = pci_alloc_consistent(adapter->pcidev,
2714 sizeof(struct slic_eeprom),
2715 &phys_config);
4d6f6af8 2716
4d6ea9c3
DK		 2717 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2718 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
4d6f6af8 2719
4d6ea9c3
DK		 2720 if (!peeprom) {
2721 dev_err(&adapter->pcidev->dev,
811e843d 2722 "Failed to allocate DMA memory for EEPROM.\n");
4d6ea9c3 2723 return -ENOMEM;
4d6f6af8 2724 }
351e836f
VH		 2725
2726 memset(peeprom, 0, sizeof(struct slic_eeprom));
2727
4d6ea9c3
DK		 2728 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2729 mdelay(1);
01d0a9b4
JP		 2730 pshmem = (struct slic_shmem *)(unsigned long)
2731 adapter->phys_shmem;
4d6f6af8 2732
4d6ea9c3
DK		 2733 spin_lock_irqsave(&adapter->bit64reglock.lock,
2734 adapter->bit64reglock.flags);
0783c636
DM		 2735 slic_reg32_write(&slic_regs->slic_addr_upper,
2736 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
4d6ea9c3
DK		 2737 slic_reg32_write(&slic_regs->slic_isp,
2738 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2739 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2740 adapter->bit64reglock.flags);
4d6f6af8 2741
47a401a8
DM		 2742 status = slic_config_get(adapter, phys_configl, phys_configh);
2743 if (status) {
2744 dev_err(&adapter->pcidev->dev,
2745 "Failed to fetch config data from device.\n");
2746 goto card_init_err;
2747 }
4d6f6af8 2748
4d6ea9c3
DK		 2749 for (;;) {
2750 if (adapter->pshmem->isr) {
2751 if (adapter->pshmem->isr & ISR_UPC) {
2752 adapter->pshmem->isr = 0;
2753 slic_reg64_write(adapter,
2754 &slic_regs->slic_isp, 0,
2755 &slic_regs->slic_addr_upper,
2756 0, FLUSH);
2757 slic_reg32_write(&slic_regs->slic_isr,
2758 0, FLUSH);
2759
2760 slic_upr_request_complete(adapter, 0);
2761 break;
4d6ea9c3 2762 }
351e836f
VH		 2763
2764 adapter->pshmem->isr = 0;
2765 slic_reg32_write(&slic_regs->slic_isr,
2766 0, FLUSH);
4d6f6af8 2767 } else {
4d6ea9c3
DK		 2768 mdelay(1);
2769 i++;
2770 if (i > 5000) {
2771 dev_err(&adapter->pcidev->dev,
811e843d 2772 "Fetch of config data timed out.\n");
4d6ea9c3
DK		 2773 slic_reg64_write(adapter,
2774 &slic_regs->slic_isp, 0,
2775 &slic_regs->slic_addr_upper,
2776 0, FLUSH);
47a401a8
DM		 2777 status = -EINVAL;
2778 goto card_init_err;
4d6ea9c3 2779 }
4d6f6af8 2780 }
4d6ea9c3
DK		 2781 }
2782
2783 switch (adapter->devid) {
2784 /* Oasis card */
2785 case SLIC_2GB_DEVICE_ID:
2786 /* extract EEPROM data and pointers to EEPROM data */
2787 pOeeprom = (struct oslic_eeprom *) peeprom;
2788 eecodesize = pOeeprom->EecodeSize;
2789 dramsize = pOeeprom->DramSize;
2790 pmac = pOeeprom->MacInfo;
2791 fruformat = pOeeprom->FruFormat;
2792 patkfru = &pOeeprom->AtkFru;
2793 oemfruformat = pOeeprom->OemFruFormat;
2794 poemfru = &pOeeprom->OemFru;
2795 macaddrs = 2;
2796 /* Minor kludge for Oasis card
2797 get 2 MAC addresses from the
2798 EEPROM to ensure that function 1
2799 gets the Port 1 MAC address */
2800 break;
2801 default:
2802 /* extract EEPROM data and pointers to EEPROM data */
2803 eecodesize = peeprom->EecodeSize;
2804 dramsize = peeprom->DramSize;
2805 pmac = peeprom->u2.mac.MacInfo;
2806 fruformat = peeprom->FruFormat;
2807 patkfru = &peeprom->AtkFru;
2808 oemfruformat = peeprom->OemFruFormat;
2809 poemfru = &peeprom->OemFru;
4d6f6af8
GKH		 2810 break;
2811 }
4d6f6af8 2812
4d6ea9c3
DK		 2813 card->config.EepromValid = false;
2814
2815 /* see if the EEPROM is valid by checking it's checksum */
2816 if ((eecodesize <= MAX_EECODE_SIZE) &&
2817 (eecodesize >= MIN_EECODE_SIZE)) {
2818
2819 ee_chksum =
2820 *(u16 *) ((char *) peeprom + (eecodesize - 2));
2821 /*
2822 calculate the EEPROM checksum
2823 */
55b62cdf
DM		 2824 calc_chksum = slic_eeprom_cksum(peeprom,
2825 eecodesize - 2);
4d6ea9c3
DK		 2826 /*
2827 if the ucdoe chksum flag bit worked,
7864a0ac 2828 we wouldn't need this
4d6ea9c3
DK		 2829 */
2830 if (ee_chksum == calc_chksum)
2831 card->config.EepromValid = true;
2832 }
2833 /* copy in the DRAM size */
2834 card->config.DramSize = dramsize;
2835
2836 /* copy in the MAC address(es) */
2837 for (i = 0; i < macaddrs; i++) {
2838 memcpy(&card->config.MacInfo[i],
2839 &pmac[i], sizeof(struct slic_config_mac));
2840 }
4d6f6af8 2841
4d6ea9c3
DK		 2842 /* copy the Alacritech FRU information */
2843 card->config.FruFormat = fruformat;
2844 memcpy(&card->config.AtkFru, patkfru,
2845 sizeof(struct atk_fru));
e9eff9d6 2846
4d6ea9c3
DK		 2847 pci_free_consistent(adapter->pcidev,
2848 sizeof(struct slic_eeprom),
2849 peeprom, phys_config);
4d6f6af8 2850
28277a55 2851 if (!card->config.EepromValid) {
4d6ea9c3
DK		 2852 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
2853 &slic_regs->slic_addr_upper,
2854 0, FLUSH);
811e843d 2855 dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n");
4d6ea9c3
DK		 2856 return -EINVAL;
2857 }
4d6f6af8 2858
4d6ea9c3 2859 card->config_set = 1;
4d6f6af8 2860 }
4d6ea9c3 2861
811e843d
DM		 2862 status = slic_card_download_gbrcv(adapter);
2863 if (status)
2864 return status;
4d6ea9c3
DK		 2865
2866 if (slic_global.dynamic_intagg)
2867 slic_intagg_set(adapter, 0);
4d6f6af8 2868 else
4d6ea9c3 2869 slic_intagg_set(adapter, intagg_delay);
4d6f6af8 2870
4d6ea9c3
DK		 2871 /*
2872 * Initialize ping status to "ok"
2873 */
2874 card->pingstatus = ISR_PINGMASK;
4d6f6af8 2875
4d6ea9c3
DK		 2876 /*
2877 * Lastly, mark our card state as up and return success
2878 */
2879 card->state = CARD_UP;
2880 card->reset_in_progress = 0;
4d6f6af8 2881
4d6ea9c3 2882 return 0;
47a401a8
DM		 2883
2884card_init_err:
2885 pci_free_consistent(adapter->pcidev, sizeof(struct slic_eeprom),
2886 peeprom, phys_config);
2887 return status;
4d6ea9c3
DK		 2888}
2889
2890static void slic_init_driver(void)
2891{
2892 if (slic_first_init) {
2893 slic_first_init = 0;
2894 spin_lock_init(&slic_global.driver_lock.lock);
4d6f6af8 2895 }
4d6ea9c3 2896}
4d6f6af8 2897
4d6ea9c3
DK		 2898static void slic_init_adapter(struct net_device *netdev,
2899 struct pci_dev *pcidev,
2900 const struct pci_device_id *pci_tbl_entry,
2901 void __iomem *memaddr, int chip_idx)
2902{
2903 ushort index;
2904 struct slic_handle *pslic_handle;
2905 struct adapter *adapter = netdev_priv(netdev);
4d6f6af8 2906
4d6ea9c3
DK		 2907/* adapter->pcidev = pcidev;*/
2908 adapter->vendid = pci_tbl_entry->vendor;
2909 adapter->devid = pci_tbl_entry->device;
2910 adapter->subsysid = pci_tbl_entry->subdevice;
2911 adapter->busnumber = pcidev->bus->number;
2912 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
2913 adapter->functionnumber = (pcidev->devfn & 0x7);
4d6ea9c3
DK		 2914 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
2915 adapter->irq = pcidev->irq;
2916/* adapter->netdev = netdev;*/
4d6ea9c3
DK		 2917 adapter->chipid = chip_idx;
2918 adapter->port = 0; /*adapter->functionnumber;*/
2919 adapter->cardindex = adapter->port;
4d6ea9c3
DK		 2920 spin_lock_init(&adapter->upr_lock.lock);
2921 spin_lock_init(&adapter->bit64reglock.lock);
2922 spin_lock_init(&adapter->adapter_lock.lock);
2923 spin_lock_init(&adapter->reset_lock.lock);
2924 spin_lock_init(&adapter->handle_lock.lock);
4d6f6af8 2925
4d6ea9c3
DK		 2926 adapter->card_size = 1;
2927 /*
2928 Initialize slic_handle array
2929 */
4d6ea9c3
DK		 2930 /*
2931 Start with 1. 0 is an invalid host handle.
2932 */
2933 for (index = 1, pslic_handle = &adapter->slic_handles[1];
2934 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
2935
2936 pslic_handle->token.handle_index = index;
2937 pslic_handle->type = SLIC_HANDLE_FREE;
2938 pslic_handle->next = adapter->pfree_slic_handles;
2939 adapter->pfree_slic_handles = pslic_handle;
4d6f6af8 2940 }
4d6ea9c3
DK		 2941 adapter->pshmem = (struct slic_shmem *)
2942 pci_alloc_consistent(adapter->pcidev,
2943 sizeof(struct slic_shmem),
2944 &adapter->
2945 phys_shmem);
b8131fc0
DN		 2946 if (adapter->pshmem)
2947 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
4d6ea9c3 2948}
4d6f6af8 2949
4d6ea9c3
DK		 2950static const struct net_device_ops slic_netdev_ops = {
2951 .ndo_open = slic_entry_open,
2952 .ndo_stop = slic_entry_halt,
2953 .ndo_start_xmit = slic_xmit_start,
2954 .ndo_do_ioctl = slic_ioctl,
2955 .ndo_set_mac_address = slic_mac_set_address,
2956 .ndo_get_stats = slic_get_stats,
afc4b13d 2957 .ndo_set_rx_mode = slic_mcast_set_list,
4d6ea9c3
DK		 2958 .ndo_validate_addr = eth_validate_addr,
2959 .ndo_change_mtu = eth_change_mtu,
2960};
4d6f6af8 2961
4d6ea9c3
DK		 2962static u32 slic_card_locate(struct adapter *adapter)
2963{
2964 struct sliccard *card = slic_global.slic_card;
2965 struct physcard *physcard = slic_global.phys_card;
2966 ushort card_hostid;
2967 u16 __iomem *hostid_reg;
2968 uint i;
2969 uint rdhostid_offset = 0;
4d6f6af8 2970
4d6ea9c3
DK		 2971 switch (adapter->devid) {
2972 case SLIC_2GB_DEVICE_ID:
2973 rdhostid_offset = SLIC_RDHOSTID_2GB;
2974 break;
2975 case SLIC_1GB_DEVICE_ID:
2976 rdhostid_offset = SLIC_RDHOSTID_1GB;
2977 break;
4d6f6af8 2978 default:
0ab19005 2979 return -ENODEV;
4d6f6af8 2980 }
4d6f6af8 2981
4d6ea9c3
DK		 2982 hostid_reg =
2983 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
2984 rdhostid_offset);
4d6f6af8 2985
4d6ea9c3
DK		 2986 /* read the 16 bit hostid from SRAM */
2987 card_hostid = (ushort) readw(hostid_reg);
4d6f6af8 2988
4d6ea9c3
DK		 2989 /* Initialize a new card structure if need be */
2990 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2991 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
2992 if (card == NULL)
2993 return -ENOMEM;
2994
2995 card->next = slic_global.slic_card;
2996 slic_global.slic_card = card;
2997 card->busnumber = adapter->busnumber;
2998 card->slotnumber = adapter->slotnumber;
2999
3000 /* Find an available cardnum */
3001 for (i = 0; i < SLIC_MAX_CARDS; i++) {
3002 if (slic_global.cardnuminuse[i] == 0) {
3003 slic_global.cardnuminuse[i] = 1;
3004 card->cardnum = i;
3005 break;
3006 }
3007 }
3008 slic_global.num_slic_cards++;
4d6ea9c3
DK		 3009 } else {
3010 /* Card exists, find the card this adapter belongs to */
3011 while (card) {
3012 if (card->cardnum == card_hostid)
3013 break;
3014 card = card->next;
3015 }
3016 }
3017
4d6ea9c3
DK		 3018 if (!card)
3019 return -ENXIO;
3020 /* Put the adapter in the card's adapter list */
4d6ea9c3
DK		 3021 if (!card->adapter[adapter->port]) {
3022 card->adapter[adapter->port] = adapter;
3023 adapter->card = card;
3024 }
3025
3026 card->card_size = 1; /* one port per *logical* card */
3027
3028 while (physcard) {
3029 for (i = 0; i < SLIC_MAX_PORTS; i++) {
20d403e8 3030 if (physcard->adapter[i])
4d6ea9c3
DK		 3031 break;
3032 }
20d403e8
PH		 3033 if (i == SLIC_MAX_PORTS)
3034 break;
3035
4d6ea9c3
DK		 3036 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
3037 break;
3038 physcard = physcard->next;
3039 }
3040 if (!physcard) {
3041 /* no structure allocated for this physical card yet */
3042 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
34ec83f4
DN		 3043 if (!physcard) {
3044 if (card_hostid == SLIC_HOSTID_DEFAULT)
3045 kfree(card);
0608882d 3046 return -ENOMEM;
34ec83f4 3047 }
4d6ea9c3
DK		 3048
3049 physcard->next = slic_global.phys_card;
3050 slic_global.phys_card = physcard;
3051 physcard->adapters_allocd = 1;
3052 } else {
3053 physcard->adapters_allocd++;
3054 }
3055 /* Note - this is ZERO relative */
3056 adapter->physport = physcard->adapters_allocd - 1;
3057
4d6ea9c3
DK		 3058 physcard->adapter[adapter->physport] = adapter;
3059 adapter->physcard = physcard;
4d6f6af8
GKH		 3060
3061 return 0;
3062}
4d6f6af8 3063
a0c2feb1 3064static int slic_entry_probe(struct pci_dev *pcidev,
4d6ea9c3 3065 const struct pci_device_id *pci_tbl_entry)
4d6f6af8 3066{
4d6ea9c3
DK		 3067 static int cards_found;
3068 static int did_version;
3069 int err = -ENODEV;
3070 struct net_device *netdev;
3071 struct adapter *adapter;
3072 void __iomem *memmapped_ioaddr = NULL;
4d6ea9c3
DK		 3073 ulong mmio_start = 0;
3074 ulong mmio_len = 0;
3075 struct sliccard *card = NULL;
3076 int pci_using_dac = 0;
4d6f6af8 3077
4d6ea9c3 3078 slic_global.dynamic_intagg = dynamic_intagg;
4d6f6af8 3079
4d6ea9c3 3080 err = pci_enable_device(pcidev);
4d6f6af8 3081
4d6ea9c3
DK		 3082 if (err)
3083 return err;
4d6f6af8 3084
04cc3c8a
DM		 3085 if (did_version++ == 0) {
3086 dev_info(&pcidev->dev, "%s\n", slic_banner);
3087 dev_info(&pcidev->dev, "%s\n", slic_proc_version);
4d6ea9c3 3088 }
4d6f6af8 3089
4d6ea9c3
DK		 3090 if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) {
3091 pci_using_dac = 1;
1154eb51
WY		 3092 err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64));
3093 if (err) {
79b0ae8d 3094 dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n");
4d6ea9c3
DK		 3095 goto err_out_disable_pci;
3096 }
1154eb51
WY		 3097 } else {
3098 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
3099 if (err) {
3100 dev_err(&pcidev->dev, "no usable DMA configuration\n");
3101 goto err_out_disable_pci;
3102 }
4d6ea9c3
DK		 3103 pci_using_dac = 0;
3104 pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32));
4d6ea9c3 3105 }
4d6f6af8 3106
4d6ea9c3
DK		 3107 err = pci_request_regions(pcidev, DRV_NAME);
3108 if (err) {
3109 dev_err(&pcidev->dev, "can't obtain PCI resources\n");
3110 goto err_out_disable_pci;
3111 }
4d6f6af8 3112
4d6ea9c3 3113 pci_set_master(pcidev);
4d6f6af8 3114
4d6ea9c3
DK		 3115 netdev = alloc_etherdev(sizeof(struct adapter));
3116 if (!netdev) {
3117 err = -ENOMEM;
3118 goto err_out_exit_slic_probe;
4d6f6af8 3119 }
4d6f6af8 3120
4d6ea9c3 3121 SET_NETDEV_DEV(netdev, &pcidev->dev);
4d6f6af8 3122
4d6ea9c3
DK		 3123 pci_set_drvdata(pcidev, netdev);
3124 adapter = netdev_priv(netdev);
3125 adapter->netdev = netdev;
3126 adapter->pcidev = pcidev;
3127 if (pci_using_dac)
3128 netdev->features |= NETIF_F_HIGHDMA;
4d6f6af8 3129
4d6ea9c3
DK		 3130 mmio_start = pci_resource_start(pcidev, 0);
3131 mmio_len = pci_resource_len(pcidev, 0);
3132
3133
3134/* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
3135 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
3136 if (!memmapped_ioaddr) {
3137 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
3138 mmio_len, mmio_start);
1154eb51 3139 err = -ENOMEM;
4d6ea9c3 3140 goto err_out_free_netdev;
4d6f6af8 3141 }
4d6ea9c3
DK		 3142
3143 slic_config_pci(pcidev);
3144
3145 slic_init_driver();
3146
3147 slic_init_adapter(netdev,
3148 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
3149
1154eb51
WY		 3150 err = slic_card_locate(adapter);
3151 if (err) {
4d6ea9c3 3152 dev_err(&pcidev->dev, "cannot locate card\n");
eea7c703 3153 goto err_out_unmap;
4d6f6af8 3154 }
4d6ea9c3
DK		 3155
3156 card = adapter->card;
3157
3158 if (!adapter->allocated) {
3159 card->adapters_allocated++;
3160 adapter->allocated = 1;
4d6f6af8 3161 }
4d6f6af8 3162
65bc0aaa
DM		 3163 err = slic_card_init(card, adapter);
3164 if (err)
3165 goto err_out_unmap;
4d6f6af8 3166
65bc0aaa 3167 slic_adapter_set_hwaddr(adapter);
4d6f6af8 3168
563dce37 3169 netdev->base_addr = (unsigned long) memmapped_ioaddr;
4d6ea9c3
DK		 3170 netdev->irq = adapter->irq;
3171 netdev->netdev_ops = &slic_netdev_ops;
4d6f6af8 3172
4d6ea9c3
DK		 3173 strcpy(netdev->name, "eth%d");
3174 err = register_netdev(netdev);
3175 if (err) {
3176 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
3177 goto err_out_unmap;
4d6f6af8 3178 }
4d6f6af8 3179
4d6ea9c3
DK		 3180 cards_found++;
3181
65bc0aaa 3182 return 0;
4d6ea9c3
DK		 3183
3184err_out_unmap:
3185 iounmap(memmapped_ioaddr);
4d6ea9c3
DK		 3186err_out_free_netdev:
3187 free_netdev(netdev);
3188err_out_exit_slic_probe:
3189 pci_release_regions(pcidev);
3190err_out_disable_pci:
3191 pci_disable_device(pcidev);
3192 return err;
3193}
4d6f6af8
GKH		 3194
3195static struct pci_driver slic_driver = {
3196 .name = DRV_NAME,
3197 .id_table = slic_pci_tbl,
3198 .probe = slic_entry_probe,
2e0d79c5 3199 .remove = slic_entry_remove,
4d6f6af8
GKH		 3200};
3201
3202static int __init slic_module_init(void)
3203{
4d6f6af8
GKH		 3204 slic_init_driver();
3205
e8bc9b7a 3206 return pci_register_driver(&slic_driver);
4d6f6af8
GKH		 3207}
3208
3209static void __exit slic_module_cleanup(void)
3210{
4d6f6af8 3211 pci_unregister_driver(&slic_driver);
4d6f6af8
GKH		 3212}
3213
3214module_init(slic_module_init);
3215module_exit(slic_module_cleanup);
Linux kernel - Deliverables
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