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Merge tag 'driver-core-4.6-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / drivers / usb / gadget / udc / atmel_usba_udc.c
CommitLineData
914a3f3b
HS		 1/*
2 * Driver for the Atmel USBA high speed USB device controller
3 *
4 * Copyright (C) 2005-2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/clk.h>
3280e675 11#include <linux/clk/at91_pmc.h>
914a3f3b
HS		 12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <linux/io.h>
5a0e3ad6 16#include <linux/slab.h>
914a3f3b
HS		 17#include <linux/device.h>
18#include <linux/dma-mapping.h>
19#include <linux/list.h>
4747639f 20#include <linux/mfd/syscon.h>
914a3f3b 21#include <linux/platform_device.h>
4747639f 22#include <linux/regmap.h>
914a3f3b
HS		 23#include <linux/usb/ch9.h>
24#include <linux/usb/gadget.h>
8d855317 25#include <linux/usb/atmel_usba_udc.h>
914a3f3b 26#include <linux/delay.h>
4a3ae932
JCPV		 27#include <linux/of.h>
28#include <linux/of_gpio.h>
914a3f3b 29
914a3f3b
HS		 30#include "atmel_usba_udc.h"
31
914a3f3b
HS		 32#ifdef CONFIG_USB_GADGET_DEBUG_FS
33#include <linux/debugfs.h>
34#include <linux/uaccess.h>
35
36static int queue_dbg_open(struct inode *inode, struct file *file)
37{
38 struct usba_ep *ep = inode->i_private;
39 struct usba_request *req, *req_copy;
40 struct list_head *queue_data;
41
42 queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
43 if (!queue_data)
44 return -ENOMEM;
45 INIT_LIST_HEAD(queue_data);
46
47 spin_lock_irq(&ep->udc->lock);
48 list_for_each_entry(req, &ep->queue, queue) {
4b8e1233 49 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
914a3f3b
HS		 50 if (!req_copy)
51 goto fail;
914a3f3b
HS		 52 list_add_tail(&req_copy->queue, queue_data);
53 }
54 spin_unlock_irq(&ep->udc->lock);
55
56 file->private_data = queue_data;
57 return 0;
58
59fail:
60 spin_unlock_irq(&ep->udc->lock);
61 list_for_each_entry_safe(req, req_copy, queue_data, queue) {
62 list_del(&req->queue);
63 kfree(req);
64 }
65 kfree(queue_data);
66 return -ENOMEM;
67}
68
69/*
70 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
71 *
72 * b: buffer address
73 * l: buffer length
74 * I/i: interrupt/no interrupt
75 * Z/z: zero/no zero
76 * S/s: short ok/short not ok
77 * s: status
78 * n: nr_packets
79 * F/f: submitted/not submitted to FIFO
80 * D/d: using/not using DMA
81 * L/l: last transaction/not last transaction
82 */
83static ssize_t queue_dbg_read(struct file *file, char __user *buf,
84 size_t nbytes, loff_t *ppos)
85{
86 struct list_head *queue = file->private_data;
87 struct usba_request *req, *tmp_req;
88 size_t len, remaining, actual = 0;
89 char tmpbuf[38];
90
91 if (!access_ok(VERIFY_WRITE, buf, nbytes))
92 return -EFAULT;
93
5955102c 94 inode_lock(file_inode(file));
914a3f3b
HS		 95 list_for_each_entry_safe(req, tmp_req, queue, queue) {
96 len = snprintf(tmpbuf, sizeof(tmpbuf),
97 "%8p %08x %c%c%c %5d %c%c%c\n",
98 req->req.buf, req->req.length,
99 req->req.no_interrupt ? 'i' : 'I',
100 req->req.zero ? 'Z' : 'z',
101 req->req.short_not_ok ? 's' : 'S',
102 req->req.status,
103 req->submitted ? 'F' : 'f',
104 req->using_dma ? 'D' : 'd',
105 req->last_transaction ? 'L' : 'l');
106 len = min(len, sizeof(tmpbuf));
107 if (len > nbytes)
108 break;
109
110 list_del(&req->queue);
111 kfree(req);
112
113 remaining = __copy_to_user(buf, tmpbuf, len);
114 actual += len - remaining;
115 if (remaining)
116 break;
117
118 nbytes -= len;
119 buf += len;
120 }
5955102c 121 inode_unlock(file_inode(file));
914a3f3b
HS		 122
123 return actual;
124}
125
126static int queue_dbg_release(struct inode *inode, struct file *file)
127{
128 struct list_head *queue_data = file->private_data;
129 struct usba_request *req, *tmp_req;
130
131 list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
132 list_del(&req->queue);
133 kfree(req);
134 }
135 kfree(queue_data);
136 return 0;
137}
138
139static int regs_dbg_open(struct inode *inode, struct file *file)
140{
141 struct usba_udc *udc;
142 unsigned int i;
143 u32 *data;
144 int ret = -ENOMEM;
145
5955102c 146 inode_lock(inode);
914a3f3b
HS		 147 udc = inode->i_private;
148 data = kmalloc(inode->i_size, GFP_KERNEL);
149 if (!data)
150 goto out;
151
152 spin_lock_irq(&udc->lock);
153 for (i = 0; i < inode->i_size / 4; i++)
a3dd3bef 154 data[i] = usba_io_readl(udc->regs + i * 4);
914a3f3b
HS		 155 spin_unlock_irq(&udc->lock);
156
157 file->private_data = data;
158 ret = 0;
159
160out:
5955102c 161 inode_unlock(inode);
914a3f3b
HS		 162
163 return ret;
164}
165
166static ssize_t regs_dbg_read(struct file *file, char __user *buf,
167 size_t nbytes, loff_t *ppos)
168{
496ad9aa 169 struct inode *inode = file_inode(file);
914a3f3b
HS		 170 int ret;
171
5955102c 172 inode_lock(inode);
914a3f3b
HS		 173 ret = simple_read_from_buffer(buf, nbytes, ppos,
174 file->private_data,
496ad9aa 175 file_inode(file)->i_size);
5955102c 176 inode_unlock(inode);
914a3f3b
HS		 177
178 return ret;
179}
180
181static int regs_dbg_release(struct inode *inode, struct file *file)
182{
183 kfree(file->private_data);
184 return 0;
185}
186
187const struct file_operations queue_dbg_fops = {
188 .owner = THIS_MODULE,
189 .open = queue_dbg_open,
190 .llseek = no_llseek,
191 .read = queue_dbg_read,
192 .release = queue_dbg_release,
193};
194
195const struct file_operations regs_dbg_fops = {
196 .owner = THIS_MODULE,
197 .open = regs_dbg_open,
198 .llseek = generic_file_llseek,
199 .read = regs_dbg_read,
200 .release = regs_dbg_release,
201};
202
203static void usba_ep_init_debugfs(struct usba_udc *udc,
204 struct usba_ep *ep)
205{
206 struct dentry *ep_root;
207
208 ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
209 if (!ep_root)
210 goto err_root;
211 ep->debugfs_dir = ep_root;
212
213 ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
214 ep, &queue_dbg_fops);
215 if (!ep->debugfs_queue)
216 goto err_queue;
217
218 if (ep->can_dma) {
219 ep->debugfs_dma_status
220 = debugfs_create_u32("dma_status", 0400, ep_root,
221 &ep->last_dma_status);
222 if (!ep->debugfs_dma_status)
223 goto err_dma_status;
224 }
225 if (ep_is_control(ep)) {
226 ep->debugfs_state
227 = debugfs_create_u32("state", 0400, ep_root,
228 &ep->state);
229 if (!ep->debugfs_state)
230 goto err_state;
231 }
232
233 return;
234
235err_state:
236 if (ep->can_dma)
237 debugfs_remove(ep->debugfs_dma_status);
238err_dma_status:
239 debugfs_remove(ep->debugfs_queue);
240err_queue:
241 debugfs_remove(ep_root);
242err_root:
243 dev_err(&ep->udc->pdev->dev,
244 "failed to create debugfs directory for %s\n", ep->ep.name);
245}
246
247static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
248{
249 debugfs_remove(ep->debugfs_queue);
250 debugfs_remove(ep->debugfs_dma_status);
251 debugfs_remove(ep->debugfs_state);
252 debugfs_remove(ep->debugfs_dir);
253 ep->debugfs_dma_status = NULL;
254 ep->debugfs_dir = NULL;
255}
256
257static void usba_init_debugfs(struct usba_udc *udc)
258{
259 struct dentry *root, *regs;
260 struct resource *regs_resource;
261
262 root = debugfs_create_dir(udc->gadget.name, NULL);
263 if (IS_ERR(root) || !root)
264 goto err_root;
265 udc->debugfs_root = root;
266
914a3f3b
HS		 267 regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
268 CTRL_IOMEM_ID);
e59b4e91
DH		 269
270 if (regs_resource) {
271 regs = debugfs_create_file_size("regs", 0400, root, udc,
272 &regs_dbg_fops,
273 resource_size(regs_resource));
274 if (!regs)
275 goto err_regs;
276 udc->debugfs_regs = regs;
277 }
914a3f3b
HS		 278
279 usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
280
281 return;
282
283err_regs:
284 debugfs_remove(root);
285err_root:
286 udc->debugfs_root = NULL;
287 dev_err(&udc->pdev->dev, "debugfs is not available\n");
288}
289
290static void usba_cleanup_debugfs(struct usba_udc *udc)
291{
292 usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
293 debugfs_remove(udc->debugfs_regs);
294 debugfs_remove(udc->debugfs_root);
295 udc->debugfs_regs = NULL;
296 udc->debugfs_root = NULL;
297}
298#else
299static inline void usba_ep_init_debugfs(struct usba_udc *udc,
300 struct usba_ep *ep)
301{
302
303}
304
305static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
306{
307
308}
309
310static inline void usba_init_debugfs(struct usba_udc *udc)
311{
312
313}
314
315static inline void usba_cleanup_debugfs(struct usba_udc *udc)
316{
317
318}
319#endif
320
e3a912a1
BB		 321static inline u32 usba_int_enb_get(struct usba_udc *udc)
322{
323 return udc->int_enb_cache;
324}
325
326static inline void usba_int_enb_set(struct usba_udc *udc, u32 val)
327{
328 usba_writel(udc, INT_ENB, val);
329 udc->int_enb_cache = val;
330}
331
914a3f3b
HS		 332static int vbus_is_present(struct usba_udc *udc)
333{
472a6786 334 if (gpio_is_valid(udc->vbus_pin))
640e95ab 335 return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted;
914a3f3b
HS		 336
337 /* No Vbus detection: Assume always present */
338 return 1;
339}
340
3280e675 341static void toggle_bias(struct usba_udc *udc, int is_on)
e60c65d3 342{
3280e675
BB		 343 if (udc->errata && udc->errata->toggle_bias)
344 udc->errata->toggle_bias(udc, is_on);
e60c65d3
NF		 345}
346
258e2ddd
BB		 347static void generate_bias_pulse(struct usba_udc *udc)
348{
349 if (!udc->bias_pulse_needed)
350 return;
351
352 if (udc->errata && udc->errata->pulse_bias)
353 udc->errata->pulse_bias(udc);
354
355 udc->bias_pulse_needed = false;
356}
357
914a3f3b
HS		 358static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
359{
360 unsigned int transaction_len;
361
362 transaction_len = req->req.length - req->req.actual;
363 req->last_transaction = 1;
364 if (transaction_len > ep->ep.maxpacket) {
365 transaction_len = ep->ep.maxpacket;
366 req->last_transaction = 0;
367 } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
368 req->last_transaction = 0;
369
370 DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
371 ep->ep.name, req, transaction_len,
372 req->last_transaction ? ", done" : "");
373
5d4c2707 374 memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
914a3f3b
HS		 375 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
376 req->req.actual += transaction_len;
377}
378
379static void submit_request(struct usba_ep *ep, struct usba_request *req)
380{
381 DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
382 ep->ep.name, req, req->req.length);
383
384 req->req.actual = 0;
385 req->submitted = 1;
386
387 if (req->using_dma) {
388 if (req->req.length == 0) {
389 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
390 return;
391 }
392
393 if (req->req.zero)
394 usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
395 else
396 usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
397
398 usba_dma_writel(ep, ADDRESS, req->req.dma);
399 usba_dma_writel(ep, CONTROL, req->ctrl);
400 } else {
401 next_fifo_transaction(ep, req);
402 if (req->last_transaction) {
403 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
404 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
405 } else {
406 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
407 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
408 }
409 }
410}
411
412static void submit_next_request(struct usba_ep *ep)
413{
414 struct usba_request *req;
415
416 if (list_empty(&ep->queue)) {
417 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
418 return;
419 }
420
421 req = list_entry(ep->queue.next, struct usba_request, queue);
422 if (!req->submitted)
423 submit_request(ep, req);
424}
425
426static void send_status(struct usba_udc *udc, struct usba_ep *ep)
427{
428 ep->state = STATUS_STAGE_IN;
429 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
430 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
431}
432
433static void receive_data(struct usba_ep *ep)
434{
435 struct usba_udc *udc = ep->udc;
436 struct usba_request *req;
437 unsigned long status;
438 unsigned int bytecount, nr_busy;
439 int is_complete = 0;
440
441 status = usba_ep_readl(ep, STA);
442 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
443
444 DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
445
446 while (nr_busy > 0) {
447 if (list_empty(&ep->queue)) {
448 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
449 break;
450 }
451 req = list_entry(ep->queue.next,
452 struct usba_request, queue);
453
454 bytecount = USBA_BFEXT(BYTE_COUNT, status);
455
456 if (status & (1 << 31))
457 is_complete = 1;
458 if (req->req.actual + bytecount >= req->req.length) {
459 is_complete = 1;
460 bytecount = req->req.length - req->req.actual;
461 }
462
5d4c2707 463 memcpy_fromio(req->req.buf + req->req.actual,
914a3f3b
HS		 464 ep->fifo, bytecount);
465 req->req.actual += bytecount;
466
467 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
468
469 if (is_complete) {
470 DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
471 req->req.status = 0;
472 list_del_init(&req->queue);
473 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
474 spin_unlock(&udc->lock);
304f7e5e 475 usb_gadget_giveback_request(&ep->ep, &req->req);
914a3f3b
HS		 476 spin_lock(&udc->lock);
477 }
478
479 status = usba_ep_readl(ep, STA);
480 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
481
482 if (is_complete && ep_is_control(ep)) {
483 send_status(udc, ep);
484 break;
485 }
486 }
487}
488
489static void
490request_complete(struct usba_ep *ep, struct usba_request *req, int status)
491{
492 struct usba_udc *udc = ep->udc;
493
494 WARN_ON(!list_empty(&req->queue));
495
496 if (req->req.status == -EINPROGRESS)
497 req->req.status = status;
498
1bda9df8
FB		 499 if (req->using_dma)
500 usb_gadget_unmap_request(&udc->gadget, &req->req, ep->is_in);
914a3f3b
HS		 501
502 DBG(DBG_GADGET | DBG_REQ,
503 "%s: req %p complete: status %d, actual %u\n",
504 ep->ep.name, req, req->req.status, req->req.actual);
505
506 spin_unlock(&udc->lock);
304f7e5e 507 usb_gadget_giveback_request(&ep->ep, &req->req);
914a3f3b
HS		 508 spin_lock(&udc->lock);
509}
510
511static void
512request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
513{
514 struct usba_request *req, *tmp_req;
515
516 list_for_each_entry_safe(req, tmp_req, list, queue) {
517 list_del_init(&req->queue);
518 request_complete(ep, req, status);
519 }
520}
521
522static int
523usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
524{
525 struct usba_ep *ep = to_usba_ep(_ep);
526 struct usba_udc *udc = ep->udc;
527 unsigned long flags, ept_cfg, maxpacket;
528 unsigned int nr_trans;
529
530 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
531
29cc8897 532 maxpacket = usb_endpoint_maxp(desc) & 0x7ff;
914a3f3b
HS		 533
534 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
535 || ep->index == 0
536 || desc->bDescriptorType != USB_DT_ENDPOINT
537 || maxpacket == 0
538 || maxpacket > ep->fifo_size) {
539 DBG(DBG_ERR, "ep_enable: Invalid argument");
540 return -EINVAL;
541 }
542
543 ep->is_isoc = 0;
544 ep->is_in = 0;
545
546 if (maxpacket <= 8)
547 ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
548 else
549 /* LSB is bit 1, not 0 */
550 ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
551
552 DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
553 ep->ep.name, ept_cfg, maxpacket);
554
71de6b63 555 if (usb_endpoint_dir_in(desc)) {
914a3f3b
HS		 556 ep->is_in = 1;
557 ept_cfg |= USBA_EPT_DIR_IN;
558 }
559
71de6b63 560 switch (usb_endpoint_type(desc)) {
914a3f3b
HS		 561 case USB_ENDPOINT_XFER_CONTROL:
562 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
563 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
564 break;
565 case USB_ENDPOINT_XFER_ISOC:
566 if (!ep->can_isoc) {
567 DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
568 ep->ep.name);
569 return -EINVAL;
570 }
571
572 /*
573 * Bits 11:12 specify number of _additional_
574 * transactions per microframe.
575 */
29cc8897 576 nr_trans = ((usb_endpoint_maxp(desc) >> 11) & 3) + 1;
914a3f3b
HS		 577 if (nr_trans > 3)
578 return -EINVAL;
579
580 ep->is_isoc = 1;
581 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
582
583 /*
584 * Do triple-buffering on high-bandwidth iso endpoints.
585 */
586 if (nr_trans > 1 && ep->nr_banks == 3)
587 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
588 else
589 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
590 ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
591 break;
592 case USB_ENDPOINT_XFER_BULK:
593 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
594 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
595 break;
596 case USB_ENDPOINT_XFER_INT:
597 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
598 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
599 break;
600 }
601
602 spin_lock_irqsave(&ep->udc->lock, flags);
603
978def1c 604 ep->ep.desc = desc;
914a3f3b
HS		 605 ep->ep.maxpacket = maxpacket;
606
607 usba_ep_writel(ep, CFG, ept_cfg);
608 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
609
610 if (ep->can_dma) {
611 u32 ctrl;
612
e3a912a1
BB		 613 usba_int_enb_set(udc, usba_int_enb_get(udc) |
614 USBA_BF(EPT_INT, 1 << ep->index) |
615 USBA_BF(DMA_INT, 1 << ep->index));
914a3f3b
HS		 616 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
617 usba_ep_writel(ep, CTL_ENB, ctrl);
618 } else {
e3a912a1
BB		 619 usba_int_enb_set(udc, usba_int_enb_get(udc) |
620 USBA_BF(EPT_INT, 1 << ep->index));
914a3f3b
HS		 621 }
622
623 spin_unlock_irqrestore(&udc->lock, flags);
624
625 DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
626 (unsigned long)usba_ep_readl(ep, CFG));
627 DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
e3a912a1 628 (unsigned long)usba_int_enb_get(udc));
914a3f3b
HS		 629
630 return 0;
631}
632
633static int usba_ep_disable(struct usb_ep *_ep)
634{
635 struct usba_ep *ep = to_usba_ep(_ep);
636 struct usba_udc *udc = ep->udc;
637 LIST_HEAD(req_list);
638 unsigned long flags;
639
640 DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
641
642 spin_lock_irqsave(&udc->lock, flags);
643
978def1c 644 if (!ep->ep.desc) {
914a3f3b 645 spin_unlock_irqrestore(&udc->lock, flags);
40517707
DB		 646 /* REVISIT because this driver disables endpoints in
647 * reset_all_endpoints() before calling disconnect(),
648 * most gadget drivers would trigger this non-error ...
649 */
650 if (udc->gadget.speed != USB_SPEED_UNKNOWN)
651 DBG(DBG_ERR, "ep_disable: %s not enabled\n",
652 ep->ep.name);
914a3f3b
HS		 653 return -EINVAL;
654 }
f9c56cdd 655 ep->ep.desc = NULL;
914a3f3b
HS		 656
657 list_splice_init(&ep->queue, &req_list);
658 if (ep->can_dma) {
659 usba_dma_writel(ep, CONTROL, 0);
660 usba_dma_writel(ep, ADDRESS, 0);
661 usba_dma_readl(ep, STATUS);
662 }
663 usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
e3a912a1
BB		 664 usba_int_enb_set(udc, usba_int_enb_get(udc) &
665 ~USBA_BF(EPT_INT, 1 << ep->index));
914a3f3b
HS		 666
667 request_complete_list(ep, &req_list, -ESHUTDOWN);
668
669 spin_unlock_irqrestore(&udc->lock, flags);
670
671 return 0;
672}
673
674static struct usb_request *
675usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
676{
677 struct usba_request *req;
678
679 DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
680
681 req = kzalloc(sizeof(*req), gfp_flags);
682 if (!req)
683 return NULL;
684
685 INIT_LIST_HEAD(&req->queue);
914a3f3b
HS		 686
687 return &req->req;
688}
689
690static void
691usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
692{
693 struct usba_request *req = to_usba_req(_req);
694
695 DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
696
697 kfree(req);
698}
699
700static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
701 struct usba_request *req, gfp_t gfp_flags)
702{
703 unsigned long flags;
704 int ret;
705
7a64c728
FB		 706 DBG(DBG_DMA, "%s: req l/%u d/%pad %c%c%c\n",
707 ep->ep.name, req->req.length, &req->req.dma,
914a3f3b
HS		 708 req->req.zero ? 'Z' : 'z',
709 req->req.short_not_ok ? 'S' : 's',
710 req->req.no_interrupt ? 'I' : 'i');
711
712 if (req->req.length > 0x10000) {
713 /* Lengths from 0 to 65536 (inclusive) are supported */
714 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
715 return -EINVAL;
716 }
717
1bda9df8
FB		 718 ret = usb_gadget_map_request(&udc->gadget, &req->req, ep->is_in);
719 if (ret)
720 return ret;
914a3f3b 721
1bda9df8 722 req->using_dma = 1;
914a3f3b
HS		 723 req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
724 | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
f40afddd 725 | USBA_DMA_END_BUF_EN;
914a3f3b 726
f40afddd
BS		 727 if (!ep->is_in)
728 req->ctrl |= USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
914a3f3b
HS		 729
730 /*
731 * Add this request to the queue and submit for DMA if
732 * possible. Check if we're still alive first -- we may have
733 * received a reset since last time we checked.
734 */
735 ret = -ESHUTDOWN;
736 spin_lock_irqsave(&udc->lock, flags);
978def1c 737 if (ep->ep.desc) {
914a3f3b
HS		 738 if (list_empty(&ep->queue))
739 submit_request(ep, req);
740
741 list_add_tail(&req->queue, &ep->queue);
742 ret = 0;
743 }
744 spin_unlock_irqrestore(&udc->lock, flags);
745
746 return ret;
747}
748
749static int
750usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
751{
752 struct usba_request *req = to_usba_req(_req);
753 struct usba_ep *ep = to_usba_ep(_ep);
754 struct usba_udc *udc = ep->udc;
755 unsigned long flags;
756 int ret;
757
758 DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
759 ep->ep.name, req, _req->length);
760
978def1c
IS		 761 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN ||
762 !ep->ep.desc)
914a3f3b
HS		 763 return -ESHUTDOWN;
764
765 req->submitted = 0;
766 req->using_dma = 0;
767 req->last_transaction = 0;
768
769 _req->status = -EINPROGRESS;
770 _req->actual = 0;
771
772 if (ep->can_dma)
773 return queue_dma(udc, ep, req, gfp_flags);
774
775 /* May have received a reset since last time we checked */
776 ret = -ESHUTDOWN;
777 spin_lock_irqsave(&udc->lock, flags);
978def1c 778 if (ep->ep.desc) {
914a3f3b
HS		 779 list_add_tail(&req->queue, &ep->queue);
780
f42706c9
MF		 781 if ((!ep_is_control(ep) && ep->is_in) ||
782 (ep_is_control(ep)
914a3f3b
HS		 783 && (ep->state == DATA_STAGE_IN
784 || ep->state == STATUS_STAGE_IN)))
785 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
786 else
787 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
788 ret = 0;
789 }
790 spin_unlock_irqrestore(&udc->lock, flags);
791
792 return ret;
793}
794
795static void
796usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
797{
798 req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
799}
800
801static int stop_dma(struct usba_ep *ep, u32 *pstatus)
802{
803 unsigned int timeout;
804 u32 status;
805
806 /*
807 * Stop the DMA controller. When writing both CH_EN
808 * and LINK to 0, the other bits are not affected.
809 */
810 usba_dma_writel(ep, CONTROL, 0);
811
812 /* Wait for the FIFO to empty */
813 for (timeout = 40; timeout; --timeout) {
814 status = usba_dma_readl(ep, STATUS);
815 if (!(status & USBA_DMA_CH_EN))
816 break;
817 udelay(1);
818 }
819
820 if (pstatus)
821 *pstatus = status;
822
823 if (timeout == 0) {
824 dev_err(&ep->udc->pdev->dev,
825 "%s: timed out waiting for DMA FIFO to empty\n",
826 ep->ep.name);
827 return -ETIMEDOUT;
828 }
829
830 return 0;
831}
832
833static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
834{
835 struct usba_ep *ep = to_usba_ep(_ep);
836 struct usba_udc *udc = ep->udc;
5fb694f9 837 struct usba_request *req;
914a3f3b
HS		 838 unsigned long flags;
839 u32 status;
840
841 DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
842 ep->ep.name, req);
843
844 spin_lock_irqsave(&udc->lock, flags);
845
5fb694f9
SW		 846 list_for_each_entry(req, &ep->queue, queue) {
847 if (&req->req == _req)
848 break;
849 }
850
851 if (&req->req != _req) {
852 spin_unlock_irqrestore(&udc->lock, flags);
853 return -EINVAL;
854 }
855
914a3f3b
HS		 856 if (req->using_dma) {
857 /*
858 * If this request is currently being transferred,
859 * stop the DMA controller and reset the FIFO.
860 */
861 if (ep->queue.next == &req->queue) {
862 status = usba_dma_readl(ep, STATUS);
863 if (status & USBA_DMA_CH_EN)
864 stop_dma(ep, &status);
865
866#ifdef CONFIG_USB_GADGET_DEBUG_FS
867 ep->last_dma_status = status;
868#endif
869
870 usba_writel(udc, EPT_RST, 1 << ep->index);
871
872 usba_update_req(ep, req, status);
873 }
874 }
875
876 /*
877 * Errors should stop the queue from advancing until the
878 * completion function returns.
879 */
880 list_del_init(&req->queue);
881
882 request_complete(ep, req, -ECONNRESET);
883
884 /* Process the next request if any */
885 submit_next_request(ep);
886 spin_unlock_irqrestore(&udc->lock, flags);
887
888 return 0;
889}
890
891static int usba_ep_set_halt(struct usb_ep *_ep, int value)
892{
893 struct usba_ep *ep = to_usba_ep(_ep);
894 struct usba_udc *udc = ep->udc;
895 unsigned long flags;
896 int ret = 0;
897
898 DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
899 value ? "set" : "clear");
900
978def1c 901 if (!ep->ep.desc) {
914a3f3b
HS		 902 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
903 ep->ep.name);
904 return -ENODEV;
905 }
906 if (ep->is_isoc) {
907 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
908 ep->ep.name);
909 return -ENOTTY;
910 }
911
912 spin_lock_irqsave(&udc->lock, flags);
913
914 /*
915 * We can't halt IN endpoints while there are still data to be
916 * transferred
917 */
918 if (!list_empty(&ep->queue)
919 || ((value && ep->is_in && (usba_ep_readl(ep, STA)
920 & USBA_BF(BUSY_BANKS, -1L))))) {
921 ret = -EAGAIN;
922 } else {
923 if (value)
924 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
925 else
926 usba_ep_writel(ep, CLR_STA,
927 USBA_FORCE_STALL | USBA_TOGGLE_CLR);
928 usba_ep_readl(ep, STA);
929 }
930
931 spin_unlock_irqrestore(&udc->lock, flags);
932
933 return ret;
934}
935
936static int usba_ep_fifo_status(struct usb_ep *_ep)
937{
938 struct usba_ep *ep = to_usba_ep(_ep);
939
940 return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
941}
942
943static void usba_ep_fifo_flush(struct usb_ep *_ep)
944{
945 struct usba_ep *ep = to_usba_ep(_ep);
946 struct usba_udc *udc = ep->udc;
947
948 usba_writel(udc, EPT_RST, 1 << ep->index);
949}
950
951static const struct usb_ep_ops usba_ep_ops = {
952 .enable = usba_ep_enable,
953 .disable = usba_ep_disable,
954 .alloc_request = usba_ep_alloc_request,
955 .free_request = usba_ep_free_request,
956 .queue = usba_ep_queue,
957 .dequeue = usba_ep_dequeue,
958 .set_halt = usba_ep_set_halt,
959 .fifo_status = usba_ep_fifo_status,
960 .fifo_flush = usba_ep_fifo_flush,
961};
962
963static int usba_udc_get_frame(struct usb_gadget *gadget)
964{
965 struct usba_udc *udc = to_usba_udc(gadget);
966
967 return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
968}
969
58ed7b94
HS		 970static int usba_udc_wakeup(struct usb_gadget *gadget)
971{
972 struct usba_udc *udc = to_usba_udc(gadget);
973 unsigned long flags;
974 u32 ctrl;
975 int ret = -EINVAL;
976
977 spin_lock_irqsave(&udc->lock, flags);
978 if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
979 ctrl = usba_readl(udc, CTRL);
980 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
981 ret = 0;
982 }
983 spin_unlock_irqrestore(&udc->lock, flags);
984
985 return ret;
986}
987
988static int
989usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
990{
991 struct usba_udc *udc = to_usba_udc(gadget);
992 unsigned long flags;
993
d618c368 994 gadget->is_selfpowered = (is_selfpowered != 0);
58ed7b94
HS		 995 spin_lock_irqsave(&udc->lock, flags);
996 if (is_selfpowered)
997 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
998 else
999 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1000 spin_unlock_irqrestore(&udc->lock, flags);
1001
1002 return 0;
1003}
1004
d809f78f
SAS		 1005static int atmel_usba_start(struct usb_gadget *gadget,
1006 struct usb_gadget_driver *driver);
22835b80
FB		 1007static int atmel_usba_stop(struct usb_gadget *gadget);
1008
914a3f3b 1009static const struct usb_gadget_ops usba_udc_ops = {
58ed7b94
HS		 1010 .get_frame = usba_udc_get_frame,
1011 .wakeup = usba_udc_wakeup,
1012 .set_selfpowered = usba_udc_set_selfpowered,
d809f78f
SAS		 1013 .udc_start = atmel_usba_start,
1014 .udc_stop = atmel_usba_stop,
914a3f3b
HS		 1015};
1016
914a3f3b
HS		 1017static struct usb_endpoint_descriptor usba_ep0_desc = {
1018 .bLength = USB_DT_ENDPOINT_SIZE,
1019 .bDescriptorType = USB_DT_ENDPOINT,
1020 .bEndpointAddress = 0,
1021 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
551509d2 1022 .wMaxPacketSize = cpu_to_le16(64),
914a3f3b
HS		 1023 /* FIXME: I have no idea what to put here */
1024 .bInterval = 1,
1025};
1026
5056ee83 1027static struct usb_gadget usba_gadget_template = {
e8f2ea39
JCPV		 1028 .ops = &usba_udc_ops,
1029 .max_speed = USB_SPEED_HIGH,
1030 .name = "atmel_usba_udc",
914a3f3b
HS		 1031};
1032
1033/*
1034 * Called with interrupts disabled and udc->lock held.
1035 */
1036static void reset_all_endpoints(struct usba_udc *udc)
1037{
1038 struct usba_ep *ep;
1039 struct usba_request *req, *tmp_req;
1040
1041 usba_writel(udc, EPT_RST, ~0UL);
1042
1043 ep = to_usba_ep(udc->gadget.ep0);
1044 list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1045 list_del_init(&req->queue);
1046 request_complete(ep, req, -ECONNRESET);
1047 }
914a3f3b
HS		 1048}
1049
1050static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1051{
1052 struct usba_ep *ep;
1053
1054 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1055 return to_usba_ep(udc->gadget.ep0);
1056
1057 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1058 u8 bEndpointAddress;
1059
978def1c 1060 if (!ep->ep.desc)
914a3f3b 1061 continue;
978def1c 1062 bEndpointAddress = ep->ep.desc->bEndpointAddress;
914a3f3b
HS		 1063 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1064 continue;
1065 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1066 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1067 return ep;
1068 }
1069
1070 return NULL;
1071}
1072
1073/* Called with interrupts disabled and udc->lock held */
1074static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1075{
1076 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1077 ep->state = WAIT_FOR_SETUP;
1078}
1079
1080static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1081{
1082 if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1083 return 1;
1084 return 0;
1085}
1086
1087static inline void set_address(struct usba_udc *udc, unsigned int addr)
1088{
1089 u32 regval;
1090
1091 DBG(DBG_BUS, "setting address %u...\n", addr);
1092 regval = usba_readl(udc, CTRL);
1093 regval = USBA_BFINS(DEV_ADDR, addr, regval);
1094 usba_writel(udc, CTRL, regval);
1095}
1096
1097static int do_test_mode(struct usba_udc *udc)
1098{
1099 static const char test_packet_buffer[] = {
1100 /* JKJKJKJK * 9 */
1101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1102 /* JJKKJJKK * 8 */
1103 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1104 /* JJKKJJKK * 8 */
1105 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1106 /* JJJJJJJKKKKKKK * 8 */
1107 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1108 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1109 /* JJJJJJJK * 8 */
1110 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1111 /* {JKKKKKKK * 10}, JK */
1112 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1113 };
1114 struct usba_ep *ep;
1115 struct device *dev = &udc->pdev->dev;
1116 int test_mode;
1117
1118 test_mode = udc->test_mode;
1119
1120 /* Start from a clean slate */
1121 reset_all_endpoints(udc);
1122
1123 switch (test_mode) {
1124 case 0x0100:
1125 /* Test_J */
1126 usba_writel(udc, TST, USBA_TST_J_MODE);
1127 dev_info(dev, "Entering Test_J mode...\n");
1128 break;
1129 case 0x0200:
1130 /* Test_K */
1131 usba_writel(udc, TST, USBA_TST_K_MODE);
1132 dev_info(dev, "Entering Test_K mode...\n");
1133 break;
1134 case 0x0300:
1135 /*
1136 * Test_SE0_NAK: Force high-speed mode and set up ep0
1137 * for Bulk IN transfers
1138 */
68522de7 1139 ep = &udc->usba_ep[0];
914a3f3b
HS		 1140 usba_writel(udc, TST,
1141 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1142 usba_ep_writel(ep, CFG,
1143 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1144 | USBA_EPT_DIR_IN
1145 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1146 | USBA_BF(BK_NUMBER, 1));
1147 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1148 set_protocol_stall(udc, ep);
1149 dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1150 } else {
1151 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1152 dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1153 }
1154 break;
1155 case 0x0400:
1156 /* Test_Packet */
68522de7 1157 ep = &udc->usba_ep[0];
914a3f3b
HS		 1158 usba_ep_writel(ep, CFG,
1159 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1160 | USBA_EPT_DIR_IN
1161 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1162 | USBA_BF(BK_NUMBER, 1));
1163 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1164 set_protocol_stall(udc, ep);
1165 dev_err(dev, "Test_Packet: ep0 not mapped\n");
1166 } else {
1167 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1168 usba_writel(udc, TST, USBA_TST_PKT_MODE);
5d4c2707 1169 memcpy_toio(ep->fifo, test_packet_buffer,
914a3f3b
HS		 1170 sizeof(test_packet_buffer));
1171 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1172 dev_info(dev, "Entering Test_Packet mode...\n");
1173 }
1174 break;
1175 default:
1176 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1177 return -EINVAL;
1178 }
1179
1180 return 0;
1181}
1182
1183/* Avoid overly long expressions */
1184static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1185{
551509d2 1186 if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
914a3f3b
HS		 1187 return true;
1188 return false;
1189}
1190
1191static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1192{
551509d2 1193 if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
914a3f3b
HS		 1194 return true;
1195 return false;
1196}
1197
1198static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1199{
551509d2 1200 if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
914a3f3b
HS		 1201 return true;
1202 return false;
1203}
1204
1205static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1206 struct usb_ctrlrequest *crq)
1207{
40517707 1208 int retval = 0;
914a3f3b
HS		 1209
1210 switch (crq->bRequest) {
1211 case USB_REQ_GET_STATUS: {
1212 u16 status;
1213
1214 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
58ed7b94 1215 status = cpu_to_le16(udc->devstatus);
914a3f3b
HS		 1216 } else if (crq->bRequestType
1217 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
551509d2 1218 status = cpu_to_le16(0);
914a3f3b
HS		 1219 } else if (crq->bRequestType
1220 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1221 struct usba_ep *target;
1222
1223 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1224 if (!target)
1225 goto stall;
1226
1227 status = 0;
1228 if (is_stalled(udc, target))
551509d2 1229 status |= cpu_to_le16(1);
914a3f3b
HS		 1230 } else
1231 goto delegate;
1232
1233 /* Write directly to the FIFO. No queueing is done. */
551509d2 1234 if (crq->wLength != cpu_to_le16(sizeof(status)))
914a3f3b
HS		 1235 goto stall;
1236 ep->state = DATA_STAGE_IN;
a3dd3bef 1237 usba_io_writew(status, ep->fifo);
914a3f3b
HS		 1238 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1239 break;
1240 }
1241
1242 case USB_REQ_CLEAR_FEATURE: {
1243 if (crq->bRequestType == USB_RECIP_DEVICE) {
58ed7b94
HS		 1244 if (feature_is_dev_remote_wakeup(crq))
1245 udc->devstatus
1246 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1247 else
914a3f3b
HS		 1248 /* Can't CLEAR_FEATURE TEST_MODE */
1249 goto stall;
914a3f3b
HS		 1250 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1251 struct usba_ep *target;
1252
551509d2 1253 if (crq->wLength != cpu_to_le16(0)
914a3f3b
HS		 1254 || !feature_is_ep_halt(crq))
1255 goto stall;
1256 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1257 if (!target)
1258 goto stall;
1259
1260 usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1261 if (target->index != 0)
1262 usba_ep_writel(target, CLR_STA,
1263 USBA_TOGGLE_CLR);
1264 } else {
1265 goto delegate;
1266 }
1267
1268 send_status(udc, ep);
1269 break;
1270 }
1271
1272 case USB_REQ_SET_FEATURE: {
1273 if (crq->bRequestType == USB_RECIP_DEVICE) {
1274 if (feature_is_dev_test_mode(crq)) {
1275 send_status(udc, ep);
1276 ep->state = STATUS_STAGE_TEST;
1277 udc->test_mode = le16_to_cpu(crq->wIndex);
1278 return 0;
1279 } else if (feature_is_dev_remote_wakeup(crq)) {
58ed7b94 1280 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
914a3f3b
HS		 1281 } else {
1282 goto stall;
1283 }
1284 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1285 struct usba_ep *target;
1286
551509d2 1287 if (crq->wLength != cpu_to_le16(0)
914a3f3b
HS		 1288 || !feature_is_ep_halt(crq))
1289 goto stall;
1290
1291 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1292 if (!target)
1293 goto stall;
1294
1295 usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1296 } else
1297 goto delegate;
1298
1299 send_status(udc, ep);
1300 break;
1301 }
1302
1303 case USB_REQ_SET_ADDRESS:
1304 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1305 goto delegate;
1306
1307 set_address(udc, le16_to_cpu(crq->wValue));
1308 send_status(udc, ep);
1309 ep->state = STATUS_STAGE_ADDR;
1310 break;
1311
1312 default:
1313delegate:
1314 spin_unlock(&udc->lock);
1315 retval = udc->driver->setup(&udc->gadget, crq);
1316 spin_lock(&udc->lock);
1317 }
1318
1319 return retval;
1320
1321stall:
00274921 1322 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
914a3f3b
HS		 1323 "halting endpoint...\n",
1324 ep->ep.name, crq->bRequestType, crq->bRequest,
1325 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1326 le16_to_cpu(crq->wLength));
1327 set_protocol_stall(udc, ep);
1328 return -1;
1329}
1330
1331static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1332{
1333 struct usba_request *req;
1334 u32 epstatus;
1335 u32 epctrl;
1336
1337restart:
1338 epstatus = usba_ep_readl(ep, STA);
1339 epctrl = usba_ep_readl(ep, CTL);
1340
1341 DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1342 ep->ep.name, ep->state, epstatus, epctrl);
1343
1344 req = NULL;
1345 if (!list_empty(&ep->queue))
1346 req = list_entry(ep->queue.next,
1347 struct usba_request, queue);
1348
1349 if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1350 if (req->submitted)
1351 next_fifo_transaction(ep, req);
1352 else
1353 submit_request(ep, req);
1354
1355 if (req->last_transaction) {
1356 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1357 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1358 }
1359 goto restart;
1360 }
1361 if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1362 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1363
1364 switch (ep->state) {
1365 case DATA_STAGE_IN:
1366 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1367 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1368 ep->state = STATUS_STAGE_OUT;
1369 break;
1370 case STATUS_STAGE_ADDR:
1371 /* Activate our new address */
1372 usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1373 | USBA_FADDR_EN));
1374 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1375 ep->state = WAIT_FOR_SETUP;
1376 break;
1377 case STATUS_STAGE_IN:
1378 if (req) {
1379 list_del_init(&req->queue);
1380 request_complete(ep, req, 0);
1381 submit_next_request(ep);
1382 }
1383 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1384 ep->state = WAIT_FOR_SETUP;
1385 break;
1386 case STATUS_STAGE_TEST:
1387 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1388 ep->state = WAIT_FOR_SETUP;
1389 if (do_test_mode(udc))
1390 set_protocol_stall(udc, ep);
1391 break;
1392 default:
00274921 1393 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
914a3f3b
HS		 1394 "halting endpoint...\n",
1395 ep->ep.name, ep->state);
1396 set_protocol_stall(udc, ep);
1397 break;
1398 }
1399
1400 goto restart;
1401 }
1402 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1403 switch (ep->state) {
1404 case STATUS_STAGE_OUT:
1405 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1406 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1407
1408 if (req) {
1409 list_del_init(&req->queue);
1410 request_complete(ep, req, 0);
1411 }
1412 ep->state = WAIT_FOR_SETUP;
1413 break;
1414
1415 case DATA_STAGE_OUT:
1416 receive_data(ep);
1417 break;
1418
1419 default:
1420 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1421 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
00274921 1422 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
914a3f3b
HS		 1423 "halting endpoint...\n",
1424 ep->ep.name, ep->state);
1425 set_protocol_stall(udc, ep);
1426 break;
1427 }
1428
1429 goto restart;
1430 }
1431 if (epstatus & USBA_RX_SETUP) {
1432 union {
1433 struct usb_ctrlrequest crq;
1434 unsigned long data[2];
1435 } crq;
1436 unsigned int pkt_len;
1437 int ret;
1438
1439 if (ep->state != WAIT_FOR_SETUP) {
1440 /*
1441 * Didn't expect a SETUP packet at this
1442 * point. Clean up any pending requests (which
1443 * may be successful).
1444 */
1445 int status = -EPROTO;
1446
1447 /*
1448 * RXRDY and TXCOMP are dropped when SETUP
1449 * packets arrive. Just pretend we received
1450 * the status packet.
1451 */
1452 if (ep->state == STATUS_STAGE_OUT
1453 || ep->state == STATUS_STAGE_IN) {
1454 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1455 status = 0;
1456 }
1457
1458 if (req) {
1459 list_del_init(&req->queue);
1460 request_complete(ep, req, status);
1461 }
1462 }
1463
1464 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1465 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1466 if (pkt_len != sizeof(crq)) {
00274921 1467 pr_warning("udc: Invalid packet length %u "
16a45bc8 1468 "(expected %zu)\n", pkt_len, sizeof(crq));
914a3f3b
HS		 1469 set_protocol_stall(udc, ep);
1470 return;
1471 }
1472
1473 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
5d4c2707 1474 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
914a3f3b
HS		 1475
1476 /* Free up one bank in the FIFO so that we can
1477 * generate or receive a reply right away. */
1478 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1479
1480 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1481 ep->state, crq.crq.bRequestType,
1482 crq.crq.bRequest); */
1483
1484 if (crq.crq.bRequestType & USB_DIR_IN) {
1485 /*
1486 * The USB 2.0 spec states that "if wLength is
1487 * zero, there is no data transfer phase."
1488 * However, testusb #14 seems to actually
1489 * expect a data phase even if wLength = 0...
1490 */
1491 ep->state = DATA_STAGE_IN;
1492 } else {
551509d2 1493 if (crq.crq.wLength != cpu_to_le16(0))
914a3f3b
HS		 1494 ep->state = DATA_STAGE_OUT;
1495 else
1496 ep->state = STATUS_STAGE_IN;
1497 }
1498
1499 ret = -1;
1500 if (ep->index == 0)
1501 ret = handle_ep0_setup(udc, ep, &crq.crq);
1502 else {
1503 spin_unlock(&udc->lock);
1504 ret = udc->driver->setup(&udc->gadget, &crq.crq);
1505 spin_lock(&udc->lock);
1506 }
1507
1508 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1509 crq.crq.bRequestType, crq.crq.bRequest,
1510 le16_to_cpu(crq.crq.wLength), ep->state, ret);
1511
1512 if (ret < 0) {
1513 /* Let the host know that we failed */
1514 set_protocol_stall(udc, ep);
1515 }
1516 }
1517}
1518
1519static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1520{
1521 struct usba_request *req;
1522 u32 epstatus;
1523 u32 epctrl;
1524
1525 epstatus = usba_ep_readl(ep, STA);
1526 epctrl = usba_ep_readl(ep, CTL);
1527
1528 DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1529
1530 while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1531 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1532
1533 if (list_empty(&ep->queue)) {
1534 dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1535 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1536 return;
1537 }
1538
1539 req = list_entry(ep->queue.next, struct usba_request, queue);
1540
1541 if (req->using_dma) {
1542 /* Send a zero-length packet */
1543 usba_ep_writel(ep, SET_STA,
1544 USBA_TX_PK_RDY);
1545 usba_ep_writel(ep, CTL_DIS,
1546 USBA_TX_PK_RDY);
1547 list_del_init(&req->queue);
1548 submit_next_request(ep);
1549 request_complete(ep, req, 0);
1550 } else {
1551 if (req->submitted)
1552 next_fifo_transaction(ep, req);
1553 else
1554 submit_request(ep, req);
1555
1556 if (req->last_transaction) {
1557 list_del_init(&req->queue);
1558 submit_next_request(ep);
1559 request_complete(ep, req, 0);
1560 }
1561 }
1562
1563 epstatus = usba_ep_readl(ep, STA);
1564 epctrl = usba_ep_readl(ep, CTL);
1565 }
1566 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1567 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1568 receive_data(ep);
914a3f3b
HS		 1569 }
1570}
1571
1572static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1573{
1574 struct usba_request *req;
1575 u32 status, control, pending;
1576
1577 status = usba_dma_readl(ep, STATUS);
1578 control = usba_dma_readl(ep, CONTROL);
1579#ifdef CONFIG_USB_GADGET_DEBUG_FS
1580 ep->last_dma_status = status;
1581#endif
1582 pending = status & control;
1583 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1584
1585 if (status & USBA_DMA_CH_EN) {
1586 dev_err(&udc->pdev->dev,
1587 "DMA_CH_EN is set after transfer is finished!\n");
1588 dev_err(&udc->pdev->dev,
1589 "status=%#08x, pending=%#08x, control=%#08x\n",
1590 status, pending, control);
1591
1592 /*
1593 * try to pretend nothing happened. We might have to
1594 * do something here...
1595 */
1596 }
1597
1598 if (list_empty(&ep->queue))
1599 /* Might happen if a reset comes along at the right moment */
1600 return;
1601
1602 if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1603 req = list_entry(ep->queue.next, struct usba_request, queue);
1604 usba_update_req(ep, req, status);
1605
1606 list_del_init(&req->queue);
1607 submit_next_request(ep);
1608 request_complete(ep, req, 0);
1609 }
1610}
1611
1612static irqreturn_t usba_udc_irq(int irq, void *devid)
1613{
1614 struct usba_udc *udc = devid;
e3a912a1 1615 u32 status, int_enb;
914a3f3b
HS		 1616 u32 dma_status;
1617 u32 ep_status;
1618
1619 spin_lock(&udc->lock);
1620
e3a912a1 1621 int_enb = usba_int_enb_get(udc);
d134c48d 1622 status = usba_readl(udc, INT_STA) & (int_enb | USBA_HIGH_SPEED);
914a3f3b
HS		 1623 DBG(DBG_INT, "irq, status=%#08x\n", status);
1624
1625 if (status & USBA_DET_SUSPEND) {
3280e675 1626 toggle_bias(udc, 0);
914a3f3b 1627 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
e3a912a1 1628 usba_int_enb_set(udc, int_enb | USBA_WAKE_UP);
258e2ddd 1629 udc->bias_pulse_needed = true;
914a3f3b
HS		 1630 DBG(DBG_BUS, "Suspend detected\n");
1631 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1632 && udc->driver && udc->driver->suspend) {
1633 spin_unlock(&udc->lock);
1634 udc->driver->suspend(&udc->gadget);
1635 spin_lock(&udc->lock);
1636 }
1637 }
1638
1639 if (status & USBA_WAKE_UP) {
3280e675 1640 toggle_bias(udc, 1);
914a3f3b 1641 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
e3a912a1 1642 usba_int_enb_set(udc, int_enb & ~USBA_WAKE_UP);
914a3f3b
HS		 1643 DBG(DBG_BUS, "Wake Up CPU detected\n");
1644 }
1645
1646 if (status & USBA_END_OF_RESUME) {
1647 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
258e2ddd 1648 generate_bias_pulse(udc);
914a3f3b
HS		 1649 DBG(DBG_BUS, "Resume detected\n");
1650 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1651 && udc->driver && udc->driver->resume) {
1652 spin_unlock(&udc->lock);
1653 udc->driver->resume(&udc->gadget);
1654 spin_lock(&udc->lock);
1655 }
1656 }
1657
1658 dma_status = USBA_BFEXT(DMA_INT, status);
1659 if (dma_status) {
1660 int i;
1661
bcabdc24 1662 for (i = 1; i <= USBA_NR_DMAS; i++)
914a3f3b 1663 if (dma_status & (1 << i))
68522de7 1664 usba_dma_irq(udc, &udc->usba_ep[i]);
914a3f3b
HS		 1665 }
1666
1667 ep_status = USBA_BFEXT(EPT_INT, status);
1668 if (ep_status) {
1669 int i;
1670
aa7be0f8 1671 for (i = 0; i < udc->num_ep; i++)
914a3f3b 1672 if (ep_status & (1 << i)) {
68522de7
JCPV		 1673 if (ep_is_control(&udc->usba_ep[i]))
1674 usba_control_irq(udc, &udc->usba_ep[i]);
914a3f3b 1675 else
68522de7 1676 usba_ep_irq(udc, &udc->usba_ep[i]);
914a3f3b
HS		 1677 }
1678 }
1679
1680 if (status & USBA_END_OF_RESET) {
1681 struct usba_ep *ep0;
1682
1683 usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
258e2ddd 1684 generate_bias_pulse(udc);
914a3f3b
HS		 1685 reset_all_endpoints(udc);
1686
39dd96d6 1687 if (udc->gadget.speed != USB_SPEED_UNKNOWN && udc->driver) {
40517707
DB		 1688 udc->gadget.speed = USB_SPEED_UNKNOWN;
1689 spin_unlock(&udc->lock);
39dd96d6 1690 usb_gadget_udc_reset(&udc->gadget, udc->driver);
40517707
DB		 1691 spin_lock(&udc->lock);
1692 }
1693
e538dfda 1694 if (status & USBA_HIGH_SPEED)
914a3f3b 1695 udc->gadget.speed = USB_SPEED_HIGH;
e538dfda 1696 else
914a3f3b 1697 udc->gadget.speed = USB_SPEED_FULL;
e538dfda
MN		 1698 DBG(DBG_BUS, "%s bus reset detected\n",
1699 usb_speed_string(udc->gadget.speed));
914a3f3b 1700
68522de7 1701 ep0 = &udc->usba_ep[0];
978def1c 1702 ep0->ep.desc = &usba_ep0_desc;
914a3f3b
HS		 1703 ep0->state = WAIT_FOR_SETUP;
1704 usba_ep_writel(ep0, CFG,
1705 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1706 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1707 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1708 usba_ep_writel(ep0, CTL_ENB,
1709 USBA_EPT_ENABLE | USBA_RX_SETUP);
e3a912a1
BB		 1710 usba_int_enb_set(udc, int_enb | USBA_BF(EPT_INT, 1) |
1711 USBA_DET_SUSPEND | USBA_END_OF_RESUME);
914a3f3b 1712
40517707
DB		 1713 /*
1714 * Unclear why we hit this irregularly, e.g. in usbtest,
1715 * but it's clearly harmless...
1716 */
914a3f3b 1717 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
40517707
DB		 1718 dev_dbg(&udc->pdev->dev,
1719 "ODD: EP0 configuration is invalid!\n");
914a3f3b
HS		 1720 }
1721
1722 spin_unlock(&udc->lock);
1723
1724 return IRQ_HANDLED;
1725}
1726
a64ef71d
SR		 1727static int start_clock(struct usba_udc *udc)
1728{
1729 int ret;
1730
1731 if (udc->clocked)
1732 return 0;
1733
1734 ret = clk_prepare_enable(udc->pclk);
1735 if (ret)
1736 return ret;
1737 ret = clk_prepare_enable(udc->hclk);
1738 if (ret) {
1739 clk_disable_unprepare(udc->pclk);
1740 return ret;
1741 }
1742
1743 udc->clocked = true;
1744 return 0;
1745}
1746
1747static void stop_clock(struct usba_udc *udc)
1748{
1749 if (!udc->clocked)
1750 return;
1751
1752 clk_disable_unprepare(udc->hclk);
1753 clk_disable_unprepare(udc->pclk);
1754
1755 udc->clocked = false;
1756}
1757
1758static int usba_start(struct usba_udc *udc)
1759{
1760 unsigned long flags;
1761 int ret;
1762
1763 ret = start_clock(udc);
1764 if (ret)
1765 return ret;
1766
1767 spin_lock_irqsave(&udc->lock, flags);
1768 toggle_bias(udc, 1);
1769 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1770 usba_int_enb_set(udc, USBA_END_OF_RESET);
1771 spin_unlock_irqrestore(&udc->lock, flags);
1772
1773 return 0;
1774}
1775
1776static void usba_stop(struct usba_udc *udc)
1777{
1778 unsigned long flags;
1779
1780 spin_lock_irqsave(&udc->lock, flags);
1781 udc->gadget.speed = USB_SPEED_UNKNOWN;
1782 reset_all_endpoints(udc);
1783
1784 /* This will also disable the DP pullup */
1785 toggle_bias(udc, 0);
1786 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1787 spin_unlock_irqrestore(&udc->lock, flags);
1788
1789 stop_clock(udc);
1790}
1791
1792static irqreturn_t usba_vbus_irq_thread(int irq, void *devid)
914a3f3b
HS		 1793{
1794 struct usba_udc *udc = devid;
1795 int vbus;
1796
1797 /* debounce */
1798 udelay(10);
1799
a64ef71d 1800 mutex_lock(&udc->vbus_mutex);
914a3f3b 1801
640e95ab 1802 vbus = vbus_is_present(udc);
914a3f3b
HS		 1803 if (vbus != udc->vbus_prev) {
1804 if (vbus) {
a64ef71d 1805 usba_start(udc);
914a3f3b 1806 } else {
a64ef71d
SR		 1807 usba_stop(udc);
1808
1809 if (udc->driver->disconnect)
40517707 1810 udc->driver->disconnect(&udc->gadget);
914a3f3b
HS		 1811 }
1812 udc->vbus_prev = vbus;
1813 }
1814
a64ef71d 1815 mutex_unlock(&udc->vbus_mutex);
914a3f3b
HS		 1816 return IRQ_HANDLED;
1817}
1818
d809f78f
SAS		 1819static int atmel_usba_start(struct usb_gadget *gadget,
1820 struct usb_gadget_driver *driver)
914a3f3b 1821{
ffb62a14 1822 int ret;
d809f78f 1823 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
914a3f3b 1824 unsigned long flags;
914a3f3b
HS		 1825
1826 spin_lock_irqsave(&udc->lock, flags);
58ed7b94 1827 udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
914a3f3b 1828 udc->driver = driver;
914a3f3b
HS		 1829 spin_unlock_irqrestore(&udc->lock, flags);
1830
a64ef71d 1831 mutex_lock(&udc->vbus_mutex);
914a3f3b 1832
472a6786 1833 if (gpio_is_valid(udc->vbus_pin))
914a3f3b
HS		 1834 enable_irq(gpio_to_irq(udc->vbus_pin));
1835
1836 /* If Vbus is present, enable the controller and wait for reset */
a64ef71d
SR		 1837 udc->vbus_prev = vbus_is_present(udc);
1838 if (udc->vbus_prev) {
1839 ret = usba_start(udc);
1840 if (ret)
1841 goto err;
914a3f3b 1842 }
914a3f3b 1843
a64ef71d 1844 mutex_unlock(&udc->vbus_mutex);
ffb62a14 1845 return 0;
a64ef71d
SR		 1846
1847err:
1848 if (gpio_is_valid(udc->vbus_pin))
1849 disable_irq(gpio_to_irq(udc->vbus_pin));
1850
1851 mutex_unlock(&udc->vbus_mutex);
1852
1853 spin_lock_irqsave(&udc->lock, flags);
1854 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1855 udc->driver = NULL;
1856 spin_unlock_irqrestore(&udc->lock, flags);
1857 return ret;
914a3f3b 1858}
914a3f3b 1859
22835b80 1860static int atmel_usba_stop(struct usb_gadget *gadget)
914a3f3b 1861{
d809f78f 1862 struct usba_udc *udc = container_of(gadget, struct usba_udc, gadget);
914a3f3b 1863
472a6786 1864 if (gpio_is_valid(udc->vbus_pin))
914a3f3b
HS		 1865 disable_irq(gpio_to_irq(udc->vbus_pin));
1866
a64ef71d 1867 usba_stop(udc);
914a3f3b 1868
d8eb6c65 1869 udc->driver = NULL;
914a3f3b
HS		 1870
1871 return 0;
1872}
914a3f3b 1873
4a3ae932 1874#ifdef CONFIG_OF
3280e675
BB		 1875static void at91sam9rl_toggle_bias(struct usba_udc *udc, int is_on)
1876{
4747639f
AB		 1877 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
1878 is_on ? AT91_PMC_BIASEN : 0);
3280e675
BB		 1879}
1880
258e2ddd
BB		 1881static void at91sam9g45_pulse_bias(struct usba_udc *udc)
1882{
4747639f
AB		 1883 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN, 0);
1884 regmap_update_bits(udc->pmc, AT91_CKGR_UCKR, AT91_PMC_BIASEN,
1885 AT91_PMC_BIASEN);
258e2ddd
BB		 1886}
1887
3280e675
BB		 1888static const struct usba_udc_errata at91sam9rl_errata = {
1889 .toggle_bias = at91sam9rl_toggle_bias,
1890};
1891
258e2ddd
BB		 1892static const struct usba_udc_errata at91sam9g45_errata = {
1893 .pulse_bias = at91sam9g45_pulse_bias,
1894};
1895
3280e675
BB		 1896static const struct of_device_id atmel_udc_dt_ids[] = {
1897 { .compatible = "atmel,at91sam9rl-udc", .data = &at91sam9rl_errata },
258e2ddd 1898 { .compatible = "atmel,at91sam9g45-udc", .data = &at91sam9g45_errata },
3280e675
BB		 1899 { .compatible = "atmel,sama5d3-udc" },
1900 { /* sentinel */ }
1901};
1902
1903MODULE_DEVICE_TABLE(of, atmel_udc_dt_ids);
1904
4a3ae932
JCPV		 1905static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
1906 struct usba_udc *udc)
1907{
1908 u32 val;
1909 const char *name;
1910 enum of_gpio_flags flags;
1911 struct device_node *np = pdev->dev.of_node;
3280e675 1912 const struct of_device_id *match;
4a3ae932
JCPV		 1913 struct device_node *pp;
1914 int i, ret;
1915 struct usba_ep *eps, *ep;
1916
3280e675
BB		 1917 match = of_match_node(atmel_udc_dt_ids, np);
1918 if (!match)
1919 return ERR_PTR(-EINVAL);
1920
1921 udc->errata = match->data;
4747639f
AB		 1922 udc->pmc = syscon_regmap_lookup_by_compatible("atmel,at91sam9g45-pmc");
1923 if (udc->errata && IS_ERR(udc->pmc))
1924 return ERR_CAST(udc->pmc);
3280e675 1925
4a3ae932
JCPV		 1926 udc->num_ep = 0;
1927
1928 udc->vbus_pin = of_get_named_gpio_flags(np, "atmel,vbus-gpio", 0,
1929 &flags);
1930 udc->vbus_pin_inverted = (flags & OF_GPIO_ACTIVE_LOW) ? 1 : 0;
1931
1932 pp = NULL;
1933 while ((pp = of_get_next_child(np, pp)))
1934 udc->num_ep++;
1935
1936 eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * udc->num_ep,
1937 GFP_KERNEL);
1938 if (!eps)
1939 return ERR_PTR(-ENOMEM);
1940
1941 udc->gadget.ep0 = &eps[0].ep;
1942
1943 INIT_LIST_HEAD(&eps[0].ep.ep_list);
1944
1945 pp = NULL;
1946 i = 0;
1947 while ((pp = of_get_next_child(np, pp))) {
1948 ep = &eps[i];
1949
1950 ret = of_property_read_u32(pp, "reg", &val);
1951 if (ret) {
1952 dev_err(&pdev->dev, "of_probe: reg error(%d)\n", ret);
1953 goto err;
1954 }
1955 ep->index = val;
1956
1957 ret = of_property_read_u32(pp, "atmel,fifo-size", &val);
1958 if (ret) {
1959 dev_err(&pdev->dev, "of_probe: fifo-size error(%d)\n", ret);
1960 goto err;
1961 }
1962 ep->fifo_size = val;
1963
1964 ret = of_property_read_u32(pp, "atmel,nb-banks", &val);
1965 if (ret) {
1966 dev_err(&pdev->dev, "of_probe: nb-banks error(%d)\n", ret);
1967 goto err;
1968 }
1969 ep->nr_banks = val;
1970
1971 ep->can_dma = of_property_read_bool(pp, "atmel,can-dma");
1972 ep->can_isoc = of_property_read_bool(pp, "atmel,can-isoc");
1973
1974 ret = of_property_read_string(pp, "name", &name);
7674cba5
RB		 1975 if (ret) {
1976 dev_err(&pdev->dev, "of_probe: name error(%d)\n", ret);
1977 goto err;
1978 }
4a3ae932
JCPV		 1979 ep->ep.name = name;
1980
1981 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
1982 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
1983 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
1984 ep->ep.ops = &usba_ep_ops;
e117e742 1985 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
4a3ae932
JCPV		 1986 ep->udc = udc;
1987 INIT_LIST_HEAD(&ep->queue);
1988
cf261fd1
SR		 1989 if (ep->index == 0) {
1990 ep->ep.caps.type_control = true;
1991 } else {
1992 ep->ep.caps.type_iso = ep->can_isoc;
1993 ep->ep.caps.type_bulk = true;
1994 ep->ep.caps.type_int = true;
1995 }
1996
1997 ep->ep.caps.dir_in = true;
1998 ep->ep.caps.dir_out = true;
1999
4a3ae932
JCPV		 2000 if (i)
2001 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2002
2003 i++;
2004 }
2005
fb0e139d
AB		 2006 if (i == 0) {
2007 dev_err(&pdev->dev, "of_probe: no endpoint specified\n");
2008 ret = -EINVAL;
2009 goto err;
2010 }
2011
4a3ae932
JCPV		 2012 return eps;
2013err:
2014 return ERR_PTR(ret);
2015}
2016#else
2017static struct usba_ep * atmel_udc_of_init(struct platform_device *pdev,
2018 struct usba_udc *udc)
2019{
2020 return ERR_PTR(-ENOSYS);
2021}
2022#endif
2023
2024static struct usba_ep * usba_udc_pdata(struct platform_device *pdev,
2025 struct usba_udc *udc)
914a3f3b 2026{
e01ee9f5 2027 struct usba_platform_data *pdata = dev_get_platdata(&pdev->dev);
4a3ae932
JCPV		 2028 struct usba_ep *eps;
2029 int i;
2030
2031 if (!pdata)
2032 return ERR_PTR(-ENXIO);
2033
2034 eps = devm_kzalloc(&pdev->dev, sizeof(struct usba_ep) * pdata->num_ep,
2035 GFP_KERNEL);
2036 if (!eps)
2037 return ERR_PTR(-ENOMEM);
2038
2039 udc->gadget.ep0 = &eps[0].ep;
2040
2041 udc->vbus_pin = pdata->vbus_pin;
2042 udc->vbus_pin_inverted = pdata->vbus_pin_inverted;
2043 udc->num_ep = pdata->num_ep;
2044
2045 INIT_LIST_HEAD(&eps[0].ep.ep_list);
2046
2047 for (i = 0; i < pdata->num_ep; i++) {
2048 struct usba_ep *ep = &eps[i];
2049
2050 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
2051 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
2052 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
2053 ep->ep.ops = &usba_ep_ops;
2054 ep->ep.name = pdata->ep[i].name;
e117e742
RB		 2055 ep->fifo_size = pdata->ep[i].fifo_size;
2056 usb_ep_set_maxpacket_limit(&ep->ep, ep->fifo_size);
4a3ae932
JCPV		 2057 ep->udc = udc;
2058 INIT_LIST_HEAD(&ep->queue);
2059 ep->nr_banks = pdata->ep[i].nr_banks;
2060 ep->index = pdata->ep[i].index;
2061 ep->can_dma = pdata->ep[i].can_dma;
2062 ep->can_isoc = pdata->ep[i].can_isoc;
2063
47bef386
RB		 2064 if (i == 0) {
2065 ep->ep.caps.type_control = true;
2066 } else {
2067 ep->ep.caps.type_iso = ep->can_isoc;
2068 ep->ep.caps.type_bulk = true;
2069 ep->ep.caps.type_int = true;
2070 }
2071
2072 ep->ep.caps.dir_in = true;
2073 ep->ep.caps.dir_out = true;
2074
4a3ae932
JCPV		 2075 if (i)
2076 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
2077 }
2078
2079 return eps;
2080}
2081
03d6a9c9 2082static int usba_udc_probe(struct platform_device *pdev)
4a3ae932 2083{
914a3f3b
HS		 2084 struct resource *regs, *fifo;
2085 struct clk *pclk, *hclk;
e8f2ea39 2086 struct usba_udc *udc;
914a3f3b
HS		 2087 int irq, ret, i;
2088
e8f2ea39
JCPV		 2089 udc = devm_kzalloc(&pdev->dev, sizeof(*udc), GFP_KERNEL);
2090 if (!udc)
2091 return -ENOMEM;
2092
2093 udc->gadget = usba_gadget_template;
2094 INIT_LIST_HEAD(&udc->gadget.ep_list);
2095
914a3f3b
HS		 2096 regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
2097 fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
4a3ae932 2098 if (!regs || !fifo)
914a3f3b
HS		 2099 return -ENXIO;
2100
2101 irq = platform_get_irq(pdev, 0);
2102 if (irq < 0)
2103 return irq;
2104
40a8fb2a 2105 pclk = devm_clk_get(&pdev->dev, "pclk");
914a3f3b
HS		 2106 if (IS_ERR(pclk))
2107 return PTR_ERR(pclk);
40a8fb2a
JH		 2108 hclk = devm_clk_get(&pdev->dev, "hclk");
2109 if (IS_ERR(hclk))
2110 return PTR_ERR(hclk);
914a3f3b 2111
40517707 2112 spin_lock_init(&udc->lock);
a64ef71d 2113 mutex_init(&udc->vbus_mutex);
914a3f3b
HS		 2114 udc->pdev = pdev;
2115 udc->pclk = pclk;
2116 udc->hclk = hclk;
472a6786 2117 udc->vbus_pin = -ENODEV;
914a3f3b
HS		 2118
2119 ret = -ENOMEM;
40a8fb2a 2120 udc->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs));
914a3f3b
HS		 2121 if (!udc->regs) {
2122 dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
40a8fb2a 2123 return ret;
914a3f3b
HS		 2124 }
2125 dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
2126 (unsigned long)regs->start, udc->regs);
40a8fb2a 2127 udc->fifo = devm_ioremap(&pdev->dev, fifo->start, resource_size(fifo));
914a3f3b
HS		 2128 if (!udc->fifo) {
2129 dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
40a8fb2a 2130 return ret;
914a3f3b
HS		 2131 }
2132 dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
2133 (unsigned long)fifo->start, udc->fifo);
2134
914a3f3b
HS		 2135 platform_set_drvdata(pdev, udc);
2136
2137 /* Make sure we start from a clean slate */
0d98b9d6
BB		 2138 ret = clk_prepare_enable(pclk);
2139 if (ret) {
2140 dev_err(&pdev->dev, "Unable to enable pclk, aborting.\n");
40a8fb2a 2141 return ret;
0d98b9d6 2142 }
3280e675 2143
16a45bc8 2144 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
0d98b9d6 2145 clk_disable_unprepare(pclk);
914a3f3b 2146
4a3ae932
JCPV		 2147 if (pdev->dev.of_node)
2148 udc->usba_ep = atmel_udc_of_init(pdev, udc);
2149 else
2150 udc->usba_ep = usba_udc_pdata(pdev, udc);
914a3f3b 2151
3280e675
BB		 2152 toggle_bias(udc, 0);
2153
40a8fb2a
JH		 2154 if (IS_ERR(udc->usba_ep))
2155 return PTR_ERR(udc->usba_ep);
914a3f3b 2156
40a8fb2a
JH		 2157 ret = devm_request_irq(&pdev->dev, irq, usba_udc_irq, 0,
2158 "atmel_usba_udc", udc);
914a3f3b
HS		 2159 if (ret) {
2160 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
2161 irq, ret);
40a8fb2a 2162 return ret;
914a3f3b
HS		 2163 }
2164 udc->irq = irq;
2165
4a3ae932
JCPV		 2166 if (gpio_is_valid(udc->vbus_pin)) {
2167 if (!devm_gpio_request(&pdev->dev, udc->vbus_pin, "atmel_usba_udc")) {
bb0a203c
SR		 2168 irq_set_status_flags(gpio_to_irq(udc->vbus_pin),
2169 IRQ_NOAUTOEN);
a64ef71d
SR		 2170 ret = devm_request_threaded_irq(&pdev->dev,
2171 gpio_to_irq(udc->vbus_pin), NULL,
2172 usba_vbus_irq_thread, IRQF_ONESHOT,
914a3f3b
HS		 2173 "atmel_usba_udc", udc);
2174 if (ret) {
472a6786 2175 udc->vbus_pin = -ENODEV;
914a3f3b
HS		 2176 dev_warn(&udc->pdev->dev,
2177 "failed to request vbus irq; "
2178 "assuming always on\n");
914a3f3b 2179 }
969affff
JCPV		 2180 } else {
2181 /* gpio_request fail so use -EINVAL for gpio_is_valid */
b4880951 2182 udc->vbus_pin = -EINVAL;
914a3f3b
HS		 2183 }
2184 }
2185
0f91349b
SAS		 2186 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2187 if (ret)
40a8fb2a 2188 return ret;
112bf244 2189 device_init_wakeup(&pdev->dev, 1);
0f91349b 2190
914a3f3b 2191 usba_init_debugfs(udc);
4a3ae932
JCPV		 2192 for (i = 1; i < udc->num_ep; i++)
2193 usba_ep_init_debugfs(udc, &udc->usba_ep[i]);
914a3f3b
HS		 2194
2195 return 0;
914a3f3b
HS		 2196}
2197
c94e289f 2198static int usba_udc_remove(struct platform_device *pdev)
914a3f3b
HS		 2199{
2200 struct usba_udc *udc;
2201 int i;
2202
2203 udc = platform_get_drvdata(pdev);
2204
112bf244 2205 device_init_wakeup(&pdev->dev, 0);
0f91349b
SAS		 2206 usb_del_gadget_udc(&udc->gadget);
2207
4a3ae932 2208 for (i = 1; i < udc->num_ep; i++)
68522de7 2209 usba_ep_cleanup_debugfs(&udc->usba_ep[i]);
914a3f3b
HS		 2210 usba_cleanup_debugfs(udc);
2211
914a3f3b
HS		 2212 return 0;
2213}
2214
94a715ed 2215#ifdef CONFIG_PM_SLEEP
112bf244
SR		 2216static int usba_udc_suspend(struct device *dev)
2217{
2218 struct usba_udc *udc = dev_get_drvdata(dev);
2219
2220 /* Not started */
2221 if (!udc->driver)
2222 return 0;
2223
2224 mutex_lock(&udc->vbus_mutex);
2225
2226 if (!device_may_wakeup(dev)) {
2227 usba_stop(udc);
2228 goto out;
2229 }
2230
2231 /*
2232 * Device may wake up. We stay clocked if we failed
2233 * to request vbus irq, assuming always on.
2234 */
2235 if (gpio_is_valid(udc->vbus_pin)) {
2236 usba_stop(udc);
2237 enable_irq_wake(gpio_to_irq(udc->vbus_pin));
2238 }
2239
2240out:
2241 mutex_unlock(&udc->vbus_mutex);
2242 return 0;
2243}
2244
2245static int usba_udc_resume(struct device *dev)
2246{
2247 struct usba_udc *udc = dev_get_drvdata(dev);
2248
2249 /* Not started */
2250 if (!udc->driver)
2251 return 0;
2252
2253 if (device_may_wakeup(dev) && gpio_is_valid(udc->vbus_pin))
2254 disable_irq_wake(gpio_to_irq(udc->vbus_pin));
2255
2256 /* If Vbus is present, enable the controller and wait for reset */
2257 mutex_lock(&udc->vbus_mutex);
2258 udc->vbus_prev = vbus_is_present(udc);
2259 if (udc->vbus_prev)
2260 usba_start(udc);
2261 mutex_unlock(&udc->vbus_mutex);
2262
2263 return 0;
2264}
2265#endif
2266
2267static SIMPLE_DEV_PM_OPS(usba_udc_pm_ops, usba_udc_suspend, usba_udc_resume);
2268
914a3f3b 2269static struct platform_driver udc_driver = {
c94e289f 2270 .remove = usba_udc_remove,
914a3f3b
HS		 2271 .driver = {
2272 .name = "atmel_usba_udc",
112bf244 2273 .pm = &usba_udc_pm_ops,
4a3ae932 2274 .of_match_table = of_match_ptr(atmel_udc_dt_ids),
914a3f3b
HS		 2275 },
2276};
2277
52f7a82b 2278module_platform_driver_probe(udc_driver, usba_udc_probe);
914a3f3b
HS		 2279
2280MODULE_DESCRIPTION("Atmel USBA UDC driver");
e05503ef 2281MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
914a3f3b 2282MODULE_LICENSE("GPL");
f34c32f1 2283MODULE_ALIAS("platform:atmel_usba_udc");
Linux kernel - Deliverables
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