[deliverable/linux.git] / drivers / watchdog / bcm2835_wdt.c

/*
 * Watchdog driver for Broadcom BCM2835
 *
 * "bcm2708_wdog" driver written by Luke Diamand that was obtained from
 * branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
 * as a hardware reference for the Broadcom BCM2835 watchdog timer.
 *
 * Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 */

#include <linux/delay.h>
#include <linux/reboot.h>
#include <linux/types.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/watchdog.h>
#include <linux/platform_device.h>
#include <linux/of_address.h>
#include <linux/of_platform.h>

#define PM_RSTC				0x1c
#define PM_RSTS				0x20
#define PM_WDOG				0x24

#define PM_PASSWORD			0x5a000000

#define PM_WDOG_TIME_SET		0x000fffff
#define PM_RSTC_WRCFG_CLR		0xffffffcf
#define PM_RSTS_HADWRH_SET		0x00000040
#define PM_RSTC_WRCFG_SET		0x00000030
#define PM_RSTC_WRCFG_FULL_RESET	0x00000020
#define PM_RSTC_RESET			0x00000102

/*
 * The Raspberry Pi firmware uses the RSTS register to know which partiton
 * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
 * Partiton 63 is a special partition used by the firmware to indicate halt.
 */
#define PM_RSTS_RASPBERRYPI_HALT	0x555

#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)

struct bcm2835_wdt {
	void __iomem		*base;
	spinlock_t		lock;
	struct notifier_block	restart_handler;
};

static unsigned int heartbeat;
static bool nowayout = WATCHDOG_NOWAYOUT;

static int bcm2835_wdt_start(struct watchdog_device *wdog)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	uint32_t cur;
	unsigned long flags;

	spin_lock_irqsave(&wdt->lock, flags);

	writel_relaxed(PM_PASSWORD | (SECS_TO_WDOG_TICKS(wdog->timeout) &
				PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
	cur = readl_relaxed(wdt->base + PM_RSTC);
	writel_relaxed(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) |
		  PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);

	spin_unlock_irqrestore(&wdt->lock, flags);

	return 0;
}

static int bcm2835_wdt_stop(struct watchdog_device *wdog)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);

	writel_relaxed(PM_PASSWORD | PM_RSTC_RESET, wdt->base + PM_RSTC);
	return 0;
}

static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
{
	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);

	uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
	return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
}

static const struct watchdog_ops bcm2835_wdt_ops = {
	.owner =	THIS_MODULE,
	.start =	bcm2835_wdt_start,
	.stop =		bcm2835_wdt_stop,
	.get_timeleft =	bcm2835_wdt_get_timeleft,
};

static const struct watchdog_info bcm2835_wdt_info = {
	.options =	WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE |
			WDIOF_KEEPALIVEPING,
	.identity =	"Broadcom BCM2835 Watchdog timer",
};

static struct watchdog_device bcm2835_wdt_wdd = {
	.info =		&bcm2835_wdt_info,
	.ops =		&bcm2835_wdt_ops,
	.min_timeout =	1,
	.max_timeout =	WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
	.timeout =	WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
};

static int
bcm2835_restart(struct notifier_block *this, unsigned long mode, void *cmd)
{
	struct bcm2835_wdt *wdt = container_of(this, struct bcm2835_wdt,
					       restart_handler);
	u32 val;

	/* use a timeout of 10 ticks (~150us) */
	writel_relaxed(10 | PM_PASSWORD, wdt->base + PM_WDOG);
	val = readl_relaxed(wdt->base + PM_RSTC);
	val &= PM_RSTC_WRCFG_CLR;
	val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
	writel_relaxed(val, wdt->base + PM_RSTC);

	/* No sleeping, possibly atomic. */
	mdelay(1);

	return 0;
}

/*
 * We can't really power off, but if we do the normal reset scheme, and
 * indicate to bootcode.bin not to reboot, then most of the chip will be
 * powered off.
 */
static void bcm2835_power_off(void)
{
	struct device_node *np =
		of_find_compatible_node(NULL, NULL, "brcm,bcm2835-pm-wdt");
	struct platform_device *pdev = of_find_device_by_node(np);
	struct bcm2835_wdt *wdt = platform_get_drvdata(pdev);
	u32 val;

	/*
	 * We set the watchdog hard reset bit here to distinguish this reset
	 * from the normal (full) reset. bootcode.bin will not reboot after a
	 * hard reset.
	 */
	val = readl_relaxed(wdt->base + PM_RSTS);
	val |= PM_PASSWORD | PM_RSTS_RASPBERRYPI_HALT;
	writel_relaxed(val, wdt->base + PM_RSTS);

	/* Continue with normal reset mechanism */
	bcm2835_restart(&wdt->restart_handler, REBOOT_HARD, NULL);
}

static int bcm2835_wdt_probe(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	struct device_node *np = dev->of_node;
	struct bcm2835_wdt *wdt;
	int err;

	wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
	if (!wdt)
		return -ENOMEM;
	platform_set_drvdata(pdev, wdt);

	spin_lock_init(&wdt->lock);

	wdt->base = of_iomap(np, 0);
	if (!wdt->base) {
		dev_err(dev, "Failed to remap watchdog regs");
		return -ENODEV;
	}

	watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
	watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
	watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
	bcm2835_wdt_wdd.parent = &pdev->dev;
	err = watchdog_register_device(&bcm2835_wdt_wdd);
	if (err) {
		dev_err(dev, "Failed to register watchdog device");
		iounmap(wdt->base);
		return err;
	}

	wdt->restart_handler.notifier_call = bcm2835_restart;
	wdt->restart_handler.priority = 128;
	register_restart_handler(&wdt->restart_handler);
	if (pm_power_off == NULL)
		pm_power_off = bcm2835_power_off;

	dev_info(dev, "Broadcom BCM2835 watchdog timer");
	return 0;
}

static int bcm2835_wdt_remove(struct platform_device *pdev)
{
	struct bcm2835_wdt *wdt = platform_get_drvdata(pdev);

	unregister_restart_handler(&wdt->restart_handler);
	if (pm_power_off == bcm2835_power_off)
		pm_power_off = NULL;
	watchdog_unregister_device(&bcm2835_wdt_wdd);
	iounmap(wdt->base);

	return 0;
}

static void bcm2835_wdt_shutdown(struct platform_device *pdev)
{
	bcm2835_wdt_stop(&bcm2835_wdt_wdd);
}

static const struct of_device_id bcm2835_wdt_of_match[] = {
	{ .compatible = "brcm,bcm2835-pm-wdt", },
	{},
};
MODULE_DEVICE_TABLE(of, bcm2835_wdt_of_match);

static struct platform_driver bcm2835_wdt_driver = {
	.probe		= bcm2835_wdt_probe,
	.remove		= bcm2835_wdt_remove,
	.shutdown	= bcm2835_wdt_shutdown,
	.driver = {
		.name =		"bcm2835-wdt",
		.of_match_table = bcm2835_wdt_of_match,
	},
};
module_platform_driver(bcm2835_wdt_driver);

module_param(heartbeat, uint, 0);
MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");

module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
				__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
MODULE_LICENSE("GPL");
Commit	Line	Data
938d0a84 LR	1	/*
	2	* Watchdog driver for Broadcom BCM2835
	3	*
	4	* "bcm2708_wdog" driver written by Luke Diamand that was obtained from
	5	* branch "rpi-3.6.y" of git://github.com/raspberrypi/linux.git was used
	6	* as a hardware reference for the Broadcom BCM2835 watchdog timer.
	7	*
	8	* Copyright (C) 2013 Lubomir Rintel <lkundrak@v3.sk>
	9	*
	10	* This program is free software; you can redistribute it and/or modify it
	11	* under the terms of the GNU General Public License as published by the
	12	* Free Software Foundation; either version 2 of the License, or (at your
	13	* option) any later version.
	14	*/
	15
33a9f5bc EA	16	#include <linux/delay.h>
33a9f5bc EA	17	#include <linux/reboot.h>
938d0a84 LR	18	#include <linux/types.h>
	19	#include <linux/module.h>
	20	#include <linux/io.h>
	21	#include <linux/watchdog.h>
	22	#include <linux/platform_device.h>
	23	#include <linux/of_address.h>
33a9f5bc	24	#include <linux/of_platform.h>
938d0a84 LR	25
938d0a84 LR	26	#define PM_RSTC 0x1c
33a9f5bc	27	#define PM_RSTS 0x20
938d0a84 LR	28	#define PM_WDOG 0x24
	29
	30	#define PM_PASSWORD 0x5a000000
	31
	32	#define PM_WDOG_TIME_SET 0x000fffff
	33	#define PM_RSTC_WRCFG_CLR 0xffffffcf
33a9f5bc	34	#define PM_RSTS_HADWRH_SET 0x00000040
938d0a84 LR	35	#define PM_RSTC_WRCFG_SET 0x00000030
	36	#define PM_RSTC_WRCFG_FULL_RESET 0x00000020
	37	#define PM_RSTC_RESET 0x00000102
	38
898e6861 NT	39	/*
	40	* The Raspberry Pi firmware uses the RSTS register to know which partiton
	41	* to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
	42	* Partiton 63 is a special partition used by the firmware to indicate halt.
	43	*/
	44	#define PM_RSTS_RASPBERRYPI_HALT 0x555
	45
938d0a84 LR	46	#define SECS_TO_WDOG_TICKS(x) ((x) << 16)
	47	#define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
	48
	49	struct bcm2835_wdt {
	50	void __iomem *base;
	51	spinlock_t lock;
33a9f5bc	52	struct notifier_block restart_handler;
938d0a84 LR	53	};
	54
	55	static unsigned int heartbeat;
	56	static bool nowayout = WATCHDOG_NOWAYOUT;
	57
	58	static int bcm2835_wdt_start(struct watchdog_device *wdog)
	59	{
	60	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	61	uint32_t cur;
	62	unsigned long flags;
	63
	64	spin_lock_irqsave(&wdt->lock, flags);
	65
	66	writel_relaxed(PM_PASSWORD \| (SECS_TO_WDOG_TICKS(wdog->timeout) &
	67	PM_WDOG_TIME_SET), wdt->base + PM_WDOG);
	68	cur = readl_relaxed(wdt->base + PM_RSTC);
	69	writel_relaxed(PM_PASSWORD \| (cur & PM_RSTC_WRCFG_CLR) \|
	70	PM_RSTC_WRCFG_FULL_RESET, wdt->base + PM_RSTC);
	71
	72	spin_unlock_irqrestore(&wdt->lock, flags);
	73
	74	return 0;
	75	}
	76
	77	static int bcm2835_wdt_stop(struct watchdog_device *wdog)
	78	{
	79	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	80
	81	writel_relaxed(PM_PASSWORD \| PM_RSTC_RESET, wdt->base + PM_RSTC);
938d0a84 LR	82	return 0;
	83	}
	84
938d0a84 LR	85	static unsigned int bcm2835_wdt_get_timeleft(struct watchdog_device *wdog)
	86	{
	87	struct bcm2835_wdt *wdt = watchdog_get_drvdata(wdog);
	88
	89	uint32_t ret = readl_relaxed(wdt->base + PM_WDOG);
	90	return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
	91	}
	92
aea4b477	93	static const struct watchdog_ops bcm2835_wdt_ops = {
938d0a84 LR	94	.owner = THIS_MODULE,
	95	.start = bcm2835_wdt_start,
	96	.stop = bcm2835_wdt_stop,
938d0a84 LR	97	.get_timeleft = bcm2835_wdt_get_timeleft,
	98	};
	99
aea4b477	100	static const struct watchdog_info bcm2835_wdt_info = {
938d0a84 LR	101	.options = WDIOF_SETTIMEOUT \| WDIOF_MAGICCLOSE \|
	102	WDIOF_KEEPALIVEPING,
	103	.identity = "Broadcom BCM2835 Watchdog timer",
	104	};
	105
	106	static struct watchdog_device bcm2835_wdt_wdd = {
	107	.info = &bcm2835_wdt_info,
	108	.ops = &bcm2835_wdt_ops,
	109	.min_timeout = 1,
	110	.max_timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
	111	.timeout = WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET),
	112	};
	113
33a9f5bc EA	114	static int
	115	bcm2835_restart(struct notifier_block this, unsigned long mode, void cmd)
	116	{
	117	struct bcm2835_wdt *wdt = container_of(this, struct bcm2835_wdt,
	118	restart_handler);
	119	u32 val;
	120
	121	/* use a timeout of 10 ticks (~150us) */
	122	writel_relaxed(10 \| PM_PASSWORD, wdt->base + PM_WDOG);
	123	val = readl_relaxed(wdt->base + PM_RSTC);
	124	val &= PM_RSTC_WRCFG_CLR;
	125	val \|= PM_PASSWORD \| PM_RSTC_WRCFG_FULL_RESET;
	126	writel_relaxed(val, wdt->base + PM_RSTC);
	127
	128	/* No sleeping, possibly atomic. */
	129	mdelay(1);
	130
	131	return 0;
	132	}
	133
	134	/*
	135	* We can't really power off, but if we do the normal reset scheme, and
	136	* indicate to bootcode.bin not to reboot, then most of the chip will be
	137	* powered off.
	138	*/
	139	static void bcm2835_power_off(void)
	140	{
	141	struct device_node *np =
	142	of_find_compatible_node(NULL, NULL, "brcm,bcm2835-pm-wdt");
	143	struct platform_device *pdev = of_find_device_by_node(np);
	144	struct bcm2835_wdt *wdt = platform_get_drvdata(pdev);
	145	u32 val;
	146
	147	/*
	148	* We set the watchdog hard reset bit here to distinguish this reset
	149	* from the normal (full) reset. bootcode.bin will not reboot after a
	150	* hard reset.
	151	*/
	152	val = readl_relaxed(wdt->base + PM_RSTS);
898e6861	153	val \|= PM_PASSWORD \| PM_RSTS_RASPBERRYPI_HALT;
33a9f5bc EA	154	writel_relaxed(val, wdt->base + PM_RSTS);
	155
	156	/* Continue with normal reset mechanism */
	157	bcm2835_restart(&wdt->restart_handler, REBOOT_HARD, NULL);
	158	}
	159
938d0a84 LR	160	static int bcm2835_wdt_probe(struct platform_device *pdev)
	161	{
	162	struct device *dev = &pdev->dev;
	163	struct device_node *np = dev->of_node;
	164	struct bcm2835_wdt *wdt;
	165	int err;
	166
	167	wdt = devm_kzalloc(dev, sizeof(struct bcm2835_wdt), GFP_KERNEL);
8deea830	168	if (!wdt)
938d0a84	169	return -ENOMEM;
938d0a84 LR	170	platform_set_drvdata(pdev, wdt);
	171
	172	spin_lock_init(&wdt->lock);
	173
	174	wdt->base = of_iomap(np, 0);
	175	if (!wdt->base) {
	176	dev_err(dev, "Failed to remap watchdog regs");
	177	return -ENODEV;
	178	}
	179
	180	watchdog_set_drvdata(&bcm2835_wdt_wdd, wdt);
	181	watchdog_init_timeout(&bcm2835_wdt_wdd, heartbeat, dev);
	182	watchdog_set_nowayout(&bcm2835_wdt_wdd, nowayout);
6551881c	183	bcm2835_wdt_wdd.parent = &pdev->dev;
938d0a84 LR	184	err = watchdog_register_device(&bcm2835_wdt_wdd);
	185	if (err) {
	186	dev_err(dev, "Failed to register watchdog device");
	187	iounmap(wdt->base);
	188	return err;
	189	}
	190
33a9f5bc EA	191	wdt->restart_handler.notifier_call = bcm2835_restart;
	192	wdt->restart_handler.priority = 128;
	193	register_restart_handler(&wdt->restart_handler);
	194	if (pm_power_off == NULL)
	195	pm_power_off = bcm2835_power_off;
	196
938d0a84 LR	197	dev_info(dev, "Broadcom BCM2835 watchdog timer");
	198	return 0;
	199	}
	200
	201	static int bcm2835_wdt_remove(struct platform_device *pdev)
	202	{
	203	struct bcm2835_wdt *wdt = platform_get_drvdata(pdev);
	204
33a9f5bc EA	205	unregister_restart_handler(&wdt->restart_handler);
	206	if (pm_power_off == bcm2835_power_off)
	207	pm_power_off = NULL;
938d0a84 LR	208	watchdog_unregister_device(&bcm2835_wdt_wdd);
	209	iounmap(wdt->base);
	210
	211	return 0;
	212	}
	213
	214	static void bcm2835_wdt_shutdown(struct platform_device *pdev)
	215	{
	216	bcm2835_wdt_stop(&bcm2835_wdt_wdd);
	217	}
	218
	219	static const struct of_device_id bcm2835_wdt_of_match[] = {
	220	{ .compatible = "brcm,bcm2835-pm-wdt", },
	221	{},
	222	};
	223	MODULE_DEVICE_TABLE(of, bcm2835_wdt_of_match);
	224
	225	static struct platform_driver bcm2835_wdt_driver = {
	226	.probe = bcm2835_wdt_probe,
	227	.remove = bcm2835_wdt_remove,
	228	.shutdown = bcm2835_wdt_shutdown,
	229	.driver = {
	230	.name = "bcm2835-wdt",
938d0a84 LR	231	.of_match_table = bcm2835_wdt_of_match,
	232	},
	233	};
	234	module_platform_driver(bcm2835_wdt_driver);
	235
	236	module_param(heartbeat, uint, 0);
	237	MODULE_PARM_DESC(heartbeat, "Initial watchdog heartbeat in seconds");
	238
	239	module_param(nowayout, bool, 0);
	240	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
	241	__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	242
	243	MODULE_AUTHOR("Lubomir Rintel <lkundrak@v3.sk>");
	244	MODULE_DESCRIPTION("Driver for Broadcom BCM2835 watchdog timer");
	245	MODULE_LICENSE("GPL");