[deliverable/linux.git] / drivers / watchdog / lantiq_wdt.c

/*
 *  This program is free software; you can redistribute it and/or modify it
 *  under the terms of the GNU General Public License version 2 as published
 *  by the Free Software Foundation.
 *
 *  Copyright (C) 2010 John Crispin <blogic@openwrt.org>
 *  Based on EP93xx wdt driver
 */

#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt

#include <linux/module.h>
#include <linux/fs.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/of_platform.h>
#include <linux/uaccess.h>
#include <linux/clk.h>
#include <linux/io.h>

#include <lantiq_soc.h>

/*
 * Section 3.4 of the datasheet
 * The password sequence protects the WDT control register from unintended
 * write actions, which might cause malfunction of the WDT.
 *
 * essentially the following two magic passwords need to be written to allow
 * IO access to the WDT core
 */
#define LTQ_WDT_PW1		0x00BE0000
#define LTQ_WDT_PW2		0x00DC0000

#define LTQ_WDT_CR		0x0	/* watchdog control register */
#define LTQ_WDT_SR		0x8	/* watchdog status register */

#define LTQ_WDT_SR_EN		(0x1 << 31)	/* enable bit */
#define LTQ_WDT_SR_PWD		(0x3 << 26)	/* turn on power */
#define LTQ_WDT_SR_CLKDIV	(0x3 << 24)	/* turn on clock and set */
						/* divider to 0x40000 */
#define LTQ_WDT_DIVIDER		0x40000
#define LTQ_MAX_TIMEOUT		((1 << 16) - 1)	/* the reload field is 16 bit */

static bool nowayout = WATCHDOG_NOWAYOUT;

static void __iomem *ltq_wdt_membase;
static unsigned long ltq_io_region_clk_rate;

static unsigned long ltq_wdt_bootstatus;
static unsigned long ltq_wdt_in_use;
static int ltq_wdt_timeout = 30;
static int ltq_wdt_ok_to_close;

static void
ltq_wdt_enable(void)
{
	unsigned long int timeout = ltq_wdt_timeout *
			(ltq_io_region_clk_rate / LTQ_WDT_DIVIDER) + 0x1000;
	if (timeout > LTQ_MAX_TIMEOUT)
		timeout = LTQ_MAX_TIMEOUT;

	/* write the first password magic */
	ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR);
	/* write the second magic plus the configuration and new timeout */
	ltq_w32(LTQ_WDT_SR_EN | LTQ_WDT_SR_PWD | LTQ_WDT_SR_CLKDIV |
		LTQ_WDT_PW2 | timeout, ltq_wdt_membase + LTQ_WDT_CR);
}

static void
ltq_wdt_disable(void)
{
	/* write the first password magic */
	ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR);
	/*
	 * write the second password magic with no config
	 * this turns the watchdog off
	 */
	ltq_w32(LTQ_WDT_PW2, ltq_wdt_membase + LTQ_WDT_CR);
}

static ssize_t
ltq_wdt_write(struct file *file, const char __user *data,
		size_t len, loff_t *ppos)
{
	if (len) {
		if (!nowayout) {
			size_t i;

			ltq_wdt_ok_to_close = 0;
			for (i = 0; i != len; i++) {
				char c;

				if (get_user(c, data + i))
					return -EFAULT;
				if (c == 'V')
					ltq_wdt_ok_to_close = 1;
				else
					ltq_wdt_ok_to_close = 0;
			}
		}
		ltq_wdt_enable();
	}

	return len;
}

static struct watchdog_info ident = {
	.options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
			WDIOF_CARDRESET,
	.identity = "ltq_wdt",
};

static long
ltq_wdt_ioctl(struct file *file,
		unsigned int cmd, unsigned long arg)
{
	int ret = -ENOTTY;

	switch (cmd) {
	case WDIOC_GETSUPPORT:
		ret = copy_to_user((struct watchdog_info __user *)arg, &ident,
				sizeof(ident)) ? -EFAULT : 0;
		break;

	case WDIOC_GETBOOTSTATUS:
		ret = put_user(ltq_wdt_bootstatus, (int __user *)arg);
		break;

	case WDIOC_GETSTATUS:
		ret = put_user(0, (int __user *)arg);
		break;

	case WDIOC_SETTIMEOUT:
		ret = get_user(ltq_wdt_timeout, (int __user *)arg);
		if (!ret)
			ltq_wdt_enable();
		/* intentional drop through */
	case WDIOC_GETTIMEOUT:
		ret = put_user(ltq_wdt_timeout, (int __user *)arg);
		break;

	case WDIOC_KEEPALIVE:
		ltq_wdt_enable();
		ret = 0;
		break;
	}
	return ret;
}

static int
ltq_wdt_open(struct inode *inode, struct file *file)
{
	if (test_and_set_bit(0, &ltq_wdt_in_use))
		return -EBUSY;
	ltq_wdt_in_use = 1;
	ltq_wdt_enable();

	return nonseekable_open(inode, file);
}

static int
ltq_wdt_release(struct inode *inode, struct file *file)
{
	if (ltq_wdt_ok_to_close)
		ltq_wdt_disable();
	else
		pr_err("watchdog closed without warning\n");
	ltq_wdt_ok_to_close = 0;
	clear_bit(0, &ltq_wdt_in_use);

	return 0;
}

static const struct file_operations ltq_wdt_fops = {
	.owner		= THIS_MODULE,
	.write		= ltq_wdt_write,
	.unlocked_ioctl	= ltq_wdt_ioctl,
	.open		= ltq_wdt_open,
	.release	= ltq_wdt_release,
	.llseek		= no_llseek,
};

static struct miscdevice ltq_wdt_miscdev = {
	.minor	= WATCHDOG_MINOR,
	.name	= "watchdog",
	.fops	= &ltq_wdt_fops,
};

static int
ltq_wdt_probe(struct platform_device *pdev)
{
	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	struct clk *clk;

	ltq_wdt_membase = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(ltq_wdt_membase))
		return PTR_ERR(ltq_wdt_membase);

	/* we do not need to enable the clock as it is always running */
	clk = clk_get_io();
	if (IS_ERR(clk)) {
		dev_err(&pdev->dev, "Failed to get clock\n");
		return -ENOENT;
	}
	ltq_io_region_clk_rate = clk_get_rate(clk);
	clk_put(clk);

	/* find out if the watchdog caused the last reboot */
	if (ltq_reset_cause() == LTQ_RST_CAUSE_WDTRST)
		ltq_wdt_bootstatus = WDIOF_CARDRESET;

	dev_info(&pdev->dev, "Init done\n");
	return misc_register(&ltq_wdt_miscdev);
}

static int
ltq_wdt_remove(struct platform_device *pdev)
{
	misc_deregister(&ltq_wdt_miscdev);

	return 0;
}

static const struct of_device_id ltq_wdt_match[] = {
	{ .compatible = "lantiq,wdt" },
	{},
};
MODULE_DEVICE_TABLE(of, ltq_wdt_match);

static struct platform_driver ltq_wdt_driver = {
	.probe = ltq_wdt_probe,
	.remove = ltq_wdt_remove,
	.driver = {
		.name = "wdt",
		.of_match_table = ltq_wdt_match,
	},
};

module_platform_driver(ltq_wdt_driver);

module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
MODULE_DESCRIPTION("Lantiq SoC Watchdog");
MODULE_LICENSE("GPL");
Commit	Line	Data
2f58b8d0 JC	1	/*
	2	* This program is free software; you can redistribute it and/or modify it
	3	* under the terms of the GNU General Public License version 2 as published
	4	* by the Free Software Foundation.
	5	*
	6	* Copyright (C) 2010 John Crispin <blogic@openwrt.org>
	7	* Based on EP93xx wdt driver
	8	*/
	9
27c766aa JP	10	#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27c766aa JP	11
2f58b8d0 JC	12	#include <linux/module.h>
	13	#include <linux/fs.h>
	14	#include <linux/miscdevice.h>
	15	#include <linux/watchdog.h>
cdb86121	16	#include <linux/of_platform.h>
2f58b8d0 JC	17	#include <linux/uaccess.h>
	18	#include <linux/clk.h>
	19	#include <linux/io.h>
	20
cdb86121	21	#include <lantiq_soc.h>
2f58b8d0	22
cdb86121 JC	23	/*
cdb86121 JC	24	* Section 3.4 of the datasheet
2f58b8d0 JC	25	* The password sequence protects the WDT control register from unintended
	26	* write actions, which might cause malfunction of the WDT.
	27	*
	28	* essentially the following two magic passwords need to be written to allow
	29	* IO access to the WDT core
	30	*/
	31	#define LTQ_WDT_PW1 0x00BE0000
	32	#define LTQ_WDT_PW2 0x00DC0000
	33
	34	#define LTQ_WDT_CR 0x0 /* watchdog control register */
	35	#define LTQ_WDT_SR 0x8 /* watchdog status register */
	36
	37	#define LTQ_WDT_SR_EN (0x1 << 31) /* enable bit */
	38	#define LTQ_WDT_SR_PWD (0x3 << 26) /* turn on power */
	39	#define LTQ_WDT_SR_CLKDIV (0x3 << 24) /* turn on clock and set */
	40	/* divider to 0x40000 */
	41	#define LTQ_WDT_DIVIDER 0x40000
	42	#define LTQ_MAX_TIMEOUT ((1 << 16) - 1) /* the reload field is 16 bit */
	43
86a1e189	44	static bool nowayout = WATCHDOG_NOWAYOUT;
2f58b8d0 JC	45
	46	static void __iomem *ltq_wdt_membase;
	47	static unsigned long ltq_io_region_clk_rate;
	48
	49	static unsigned long ltq_wdt_bootstatus;
	50	static unsigned long ltq_wdt_in_use;
	51	static int ltq_wdt_timeout = 30;
	52	static int ltq_wdt_ok_to_close;
	53
	54	static void
	55	ltq_wdt_enable(void)
	56	{
9cfce47b	57	unsigned long int timeout = ltq_wdt_timeout *
2f58b8d0	58	(ltq_io_region_clk_rate / LTQ_WDT_DIVIDER) + 0x1000;
9cfce47b JC	59	if (timeout > LTQ_MAX_TIMEOUT)
9cfce47b JC	60	timeout = LTQ_MAX_TIMEOUT;
2f58b8d0 JC	61
	62	/* write the first password magic */
	63	ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR);
	64	/* write the second magic plus the configuration and new timeout */
	65	ltq_w32(LTQ_WDT_SR_EN \| LTQ_WDT_SR_PWD \| LTQ_WDT_SR_CLKDIV \|
9cfce47b	66	LTQ_WDT_PW2 \| timeout, ltq_wdt_membase + LTQ_WDT_CR);
2f58b8d0 JC	67	}
	68
	69	static void
	70	ltq_wdt_disable(void)
	71	{
	72	/* write the first password magic */
	73	ltq_w32(LTQ_WDT_PW1, ltq_wdt_membase + LTQ_WDT_CR);
cdb86121 JC	74	/*
cdb86121 JC	75	* write the second password magic with no config
2f58b8d0 JC	76	* this turns the watchdog off
	77	*/
	78	ltq_w32(LTQ_WDT_PW2, ltq_wdt_membase + LTQ_WDT_CR);
	79	}
	80
	81	static ssize_t
	82	ltq_wdt_write(struct file file, const char __user data,
	83	size_t len, loff_t *ppos)
	84	{
	85	if (len) {
	86	if (!nowayout) {
	87	size_t i;
	88
	89	ltq_wdt_ok_to_close = 0;
	90	for (i = 0; i != len; i++) {
	91	char c;
	92
	93	if (get_user(c, data + i))
	94	return -EFAULT;
	95	if (c == 'V')
	96	ltq_wdt_ok_to_close = 1;
	97	else
	98	ltq_wdt_ok_to_close = 0;
	99	}
	100	}
	101	ltq_wdt_enable();
	102	}
	103
	104	return len;
	105	}
	106
	107	static struct watchdog_info ident = {
	108	.options = WDIOF_MAGICCLOSE \| WDIOF_SETTIMEOUT \| WDIOF_KEEPALIVEPING \|
	109	WDIOF_CARDRESET,
	110	.identity = "ltq_wdt",
	111	};
	112
	113	static long
	114	ltq_wdt_ioctl(struct file *file,
	115	unsigned int cmd, unsigned long arg)
	116	{
	117	int ret = -ENOTTY;
	118
	119	switch (cmd) {
	120	case WDIOC_GETSUPPORT:
	121	ret = copy_to_user((struct watchdog_info __user *)arg, &ident,
	122	sizeof(ident)) ? -EFAULT : 0;
	123	break;
	124
	125	case WDIOC_GETBOOTSTATUS:
	126	ret = put_user(ltq_wdt_bootstatus, (int __user *)arg);
	127	break;
	128
	129	case WDIOC_GETSTATUS:
	130	ret = put_user(0, (int __user *)arg);
	131	break;
	132
	133	case WDIOC_SETTIMEOUT:
	134	ret = get_user(ltq_wdt_timeout, (int __user *)arg);
	135	if (!ret)
	136	ltq_wdt_enable();
	137	/* intentional drop through */
	138	case WDIOC_GETTIMEOUT:
	139	ret = put_user(ltq_wdt_timeout, (int __user *)arg);
140	break;
141
142	case WDIOC_KEEPALIVE:
143	ltq_wdt_enable();
144	ret = 0;
145	break;
146	}
147	return ret;
148	}
149
150	static int
151	ltq_wdt_open(struct inode inode, struct file file)
152	{
153	if (test_and_set_bit(0, &ltq_wdt_in_use))
154	return -EBUSY;
155	ltq_wdt_in_use = 1;
156	ltq_wdt_enable();
157
158	return nonseekable_open(inode, file);
159	}
160
161	static int
162	ltq_wdt_release(struct inode inode, struct file file)
163	{
164	if (ltq_wdt_ok_to_close)
165	ltq_wdt_disable();
166	else
27c766aa	167	pr_err("watchdog closed without warning\n");
2f58b8d0 JC	168	ltq_wdt_ok_to_close = 0;
	169	clear_bit(0, &ltq_wdt_in_use);
	170
	171	return 0;
	172	}
	173
	174	static const struct file_operations ltq_wdt_fops = {
	175	.owner = THIS_MODULE,
	176	.write = ltq_wdt_write,
	177	.unlocked_ioctl = ltq_wdt_ioctl,
	178	.open = ltq_wdt_open,
	179	.release = ltq_wdt_release,
	180	.llseek = no_llseek,
	181	};
	182
	183	static struct miscdevice ltq_wdt_miscdev = {
	184	.minor = WATCHDOG_MINOR,
	185	.name = "watchdog",
	186	.fops = &ltq_wdt_fops,
	187	};
	188
2d991a16	189	static int
2f58b8d0 JC	190	ltq_wdt_probe(struct platform_device *pdev)
	191	{
	192	struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	193	struct clk *clk;
	194
4c271bb6 TR	195	ltq_wdt_membase = devm_ioremap_resource(&pdev->dev, res);
	196	if (IS_ERR(ltq_wdt_membase))
	197	return PTR_ERR(ltq_wdt_membase);
2f58b8d0 JC	198
2f58b8d0 JC	199	/* we do not need to enable the clock as it is always running */
cdb86121 JC	200	clk = clk_get_io();
	201	if (IS_ERR(clk)) {
	202	dev_err(&pdev->dev, "Failed to get clock\n");
	203	return -ENOENT;
	204	}
2f58b8d0 JC	205	ltq_io_region_clk_rate = clk_get_rate(clk);
	206	clk_put(clk);
	207
cdb86121	208	/* find out if the watchdog caused the last reboot */
2f58b8d0 JC	209	if (ltq_reset_cause() == LTQ_RST_CAUSE_WDTRST)
	210	ltq_wdt_bootstatus = WDIOF_CARDRESET;
	211
cdb86121	212	dev_info(&pdev->dev, "Init done\n");
2f58b8d0 JC	213	return misc_register(&ltq_wdt_miscdev);
	214	}
	215
4b12b896	216	static int
2f58b8d0 JC	217	ltq_wdt_remove(struct platform_device *pdev)
	218	{
	219	misc_deregister(&ltq_wdt_miscdev);
	220
2f58b8d0 JC	221	return 0;
	222	}
	223
cdb86121 JC	224	static const struct of_device_id ltq_wdt_match[] = {
	225	{ .compatible = "lantiq,wdt" },
	226	{},
	227	};
	228	MODULE_DEVICE_TABLE(of, ltq_wdt_match);
2f58b8d0 JC	229
2f58b8d0 JC	230	static struct platform_driver ltq_wdt_driver = {
cdb86121	231	.probe = ltq_wdt_probe,
82268714	232	.remove = ltq_wdt_remove,
2f58b8d0	233	.driver = {
cdb86121	234	.name = "wdt",
cdb86121	235	.of_match_table = ltq_wdt_match,
2f58b8d0 JC	236	},
	237	};
	238
cdb86121	239	module_platform_driver(ltq_wdt_driver);
2f58b8d0	240
86a1e189	241	module_param(nowayout, bool, 0);
2f58b8d0	242	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started");
2f58b8d0 JC	243	MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
	244	MODULE_DESCRIPTION("Lantiq SoC Watchdog");
	245	MODULE_LICENSE("GPL");