[deliverable/linux.git] / drivers / watchdog / sunxi_wdt.c

/*
 *      sunxi Watchdog Driver
 *
 *      Copyright (c) 2013 Carlo Caione
 *                    2012 Henrik Nordstrom
 *
 *      This program is free software; you can redistribute it and/or
 *      modify it under the terms of the GNU General Public License
 *      as published by the Free Software Foundation; either version
 *      2 of the License, or (at your option) any later version.
 *
 *      Based on xen_wdt.c
 *      (c) Copyright 2010 Novell, Inc.
 */

#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/watchdog.h>

#define WDT_MAX_TIMEOUT         16
#define WDT_MIN_TIMEOUT         1
#define WDT_TIMEOUT_MASK        0x0F

#define WDT_CTRL_RELOAD         ((1 << 0) | (0x0a57 << 1))

#define WDT_MODE_EN             (1 << 0)

#define DRV_NAME		"sunxi-wdt"
#define DRV_VERSION		"1.0"

static bool nowayout = WATCHDOG_NOWAYOUT;
static unsigned int timeout = WDT_MAX_TIMEOUT;

/*
 * This structure stores the register offsets for different variants
 * of Allwinner's watchdog hardware.
 */
struct sunxi_wdt_reg {
	u8 wdt_ctrl;
	u8 wdt_cfg;
	u8 wdt_mode;
	u8 wdt_timeout_shift;
	u8 wdt_reset_mask;
	u8 wdt_reset_val;
};

struct sunxi_wdt_dev {
	struct watchdog_device wdt_dev;
	void __iomem *wdt_base;
	const struct sunxi_wdt_reg *wdt_regs;
};

/*
 * wdt_timeout_map maps the watchdog timer interval value in seconds to
 * the value of the register WDT_MODE at bits .wdt_timeout_shift ~ +3
 *
 * [timeout seconds] = register value
 *
 */

static const int wdt_timeout_map[] = {
	[1] = 0x1,  /* 1s  */
	[2] = 0x2,  /* 2s  */
	[3] = 0x3,  /* 3s  */
	[4] = 0x4,  /* 4s  */
	[5] = 0x5,  /* 5s  */
	[6] = 0x6,  /* 6s  */
	[8] = 0x7,  /* 8s  */
	[10] = 0x8, /* 10s */
	[12] = 0x9, /* 12s */
	[14] = 0xA, /* 14s */
	[16] = 0xB, /* 16s */
};


static int sunxi_wdt_restart(struct watchdog_device *wdt_dev,
			     unsigned long action, void *data)
{
	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	void __iomem *wdt_base = sunxi_wdt->wdt_base;
	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
	u32 val;

	/* Set system reset function */
	val = readl(wdt_base + regs->wdt_cfg);
	val &= ~(regs->wdt_reset_mask);
	val |= regs->wdt_reset_val;
	writel(val, wdt_base + regs->wdt_cfg);

	/* Set lowest timeout and enable watchdog */
	val = readl(wdt_base + regs->wdt_mode);
	val &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
	val |= WDT_MODE_EN;
	writel(val, wdt_base + regs->wdt_mode);

	/*
	 * Restart the watchdog. The default (and lowest) interval
	 * value for the watchdog is 0.5s.
	 */
	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);

	while (1) {
		mdelay(5);
		val = readl(wdt_base + regs->wdt_mode);
		val |= WDT_MODE_EN;
		writel(val, wdt_base + regs->wdt_mode);
	}
	return 0;
}

static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
{
	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	void __iomem *wdt_base = sunxi_wdt->wdt_base;
	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;

	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);

	return 0;
}

static int sunxi_wdt_set_timeout(struct watchdog_device *wdt_dev,
		unsigned int timeout)
{
	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	void __iomem *wdt_base = sunxi_wdt->wdt_base;
	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
	u32 reg;

	if (wdt_timeout_map[timeout] == 0)
		timeout++;

	sunxi_wdt->wdt_dev.timeout = timeout;

	reg = readl(wdt_base + regs->wdt_mode);
	reg &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
	reg |= wdt_timeout_map[timeout] << regs->wdt_timeout_shift;
	writel(reg, wdt_base + regs->wdt_mode);

	sunxi_wdt_ping(wdt_dev);

	return 0;
}

static int sunxi_wdt_stop(struct watchdog_device *wdt_dev)
{
	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	void __iomem *wdt_base = sunxi_wdt->wdt_base;
	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;

	writel(0, wdt_base + regs->wdt_mode);

	return 0;
}

static int sunxi_wdt_start(struct watchdog_device *wdt_dev)
{
	u32 reg;
	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	void __iomem *wdt_base = sunxi_wdt->wdt_base;
	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
	int ret;

	ret = sunxi_wdt_set_timeout(&sunxi_wdt->wdt_dev,
			sunxi_wdt->wdt_dev.timeout);
	if (ret < 0)
		return ret;

	/* Set system reset function */
	reg = readl(wdt_base + regs->wdt_cfg);
	reg &= ~(regs->wdt_reset_mask);
	reg |= regs->wdt_reset_val;
	writel(reg, wdt_base + regs->wdt_cfg);

	/* Enable watchdog */
	reg = readl(wdt_base + regs->wdt_mode);
	reg |= WDT_MODE_EN;
	writel(reg, wdt_base + regs->wdt_mode);

	return 0;
}

static const struct watchdog_info sunxi_wdt_info = {
	.identity	= DRV_NAME,
	.options	= WDIOF_SETTIMEOUT |
			  WDIOF_KEEPALIVEPING |
			  WDIOF_MAGICCLOSE,
};

static const struct watchdog_ops sunxi_wdt_ops = {
	.owner		= THIS_MODULE,
	.start		= sunxi_wdt_start,
	.stop		= sunxi_wdt_stop,
	.ping		= sunxi_wdt_ping,
	.set_timeout	= sunxi_wdt_set_timeout,
	.restart	= sunxi_wdt_restart,
};

static const struct sunxi_wdt_reg sun4i_wdt_reg = {
	.wdt_ctrl = 0x00,
	.wdt_cfg = 0x04,
	.wdt_mode = 0x04,
	.wdt_timeout_shift = 3,
	.wdt_reset_mask = 0x02,
	.wdt_reset_val = 0x02,
};

static const struct sunxi_wdt_reg sun6i_wdt_reg = {
	.wdt_ctrl = 0x10,
	.wdt_cfg = 0x14,
	.wdt_mode = 0x18,
	.wdt_timeout_shift = 4,
	.wdt_reset_mask = 0x03,
	.wdt_reset_val = 0x01,
};

static const struct of_device_id sunxi_wdt_dt_ids[] = {
	{ .compatible = "allwinner,sun4i-a10-wdt", .data = &sun4i_wdt_reg },
	{ .compatible = "allwinner,sun6i-a31-wdt", .data = &sun6i_wdt_reg },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);

static int sunxi_wdt_probe(struct platform_device *pdev)
{
	struct sunxi_wdt_dev *sunxi_wdt;
	const struct of_device_id *device;
	struct resource *res;
	int err;

	sunxi_wdt = devm_kzalloc(&pdev->dev, sizeof(*sunxi_wdt), GFP_KERNEL);
	if (!sunxi_wdt)
		return -EINVAL;

	platform_set_drvdata(pdev, sunxi_wdt);

	device = of_match_device(sunxi_wdt_dt_ids, &pdev->dev);
	if (!device)
		return -ENODEV;

	sunxi_wdt->wdt_regs = device->data;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	sunxi_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(sunxi_wdt->wdt_base))
		return PTR_ERR(sunxi_wdt->wdt_base);

	sunxi_wdt->wdt_dev.info = &sunxi_wdt_info;
	sunxi_wdt->wdt_dev.ops = &sunxi_wdt_ops;
	sunxi_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
	sunxi_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
	sunxi_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
	sunxi_wdt->wdt_dev.parent = &pdev->dev;

	watchdog_init_timeout(&sunxi_wdt->wdt_dev, timeout, &pdev->dev);
	watchdog_set_nowayout(&sunxi_wdt->wdt_dev, nowayout);
	watchdog_set_restart_priority(&sunxi_wdt->wdt_dev, 128);

	watchdog_set_drvdata(&sunxi_wdt->wdt_dev, sunxi_wdt);

	sunxi_wdt_stop(&sunxi_wdt->wdt_dev);

	err = watchdog_register_device(&sunxi_wdt->wdt_dev);
	if (unlikely(err))
		return err;

	dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
			sunxi_wdt->wdt_dev.timeout, nowayout);

	return 0;
}

static int sunxi_wdt_remove(struct platform_device *pdev)
{
	struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);

	watchdog_unregister_device(&sunxi_wdt->wdt_dev);
	watchdog_set_drvdata(&sunxi_wdt->wdt_dev, NULL);

	return 0;
}

static void sunxi_wdt_shutdown(struct platform_device *pdev)
{
	struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);

	sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
}

static struct platform_driver sunxi_wdt_driver = {
	.probe		= sunxi_wdt_probe,
	.remove		= sunxi_wdt_remove,
	.shutdown	= sunxi_wdt_shutdown,
	.driver		= {
		.name		= DRV_NAME,
		.of_match_table	= sunxi_wdt_dt_ids,
	},
};

module_platform_driver(sunxi_wdt_driver);

module_param(timeout, uint, 0);
MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");

module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
		"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
MODULE_AUTHOR("Henrik Nordstrom <henrik@henriknordstrom.net>");
MODULE_DESCRIPTION("sunxi WatchDog Timer Driver");
MODULE_VERSION(DRV_VERSION);
Commit	Line	Data
d00680ed CC	1	/*
	2	* sunxi Watchdog Driver
	3	*
	4	* Copyright (c) 2013 Carlo Caione
	5	* 2012 Henrik Nordstrom
	6	*
	7	* This program is free software; you can redistribute it and/or
	8	* modify it under the terms of the GNU General Public License
	9	* as published by the Free Software Foundation; either version
	10	* 2 of the License, or (at your option) any later version.
	11	*
	12	* Based on xen_wdt.c
	13	* (c) Copyright 2010 Novell, Inc.
	14	*/
	15
	16	#include <linux/clk.h>
440e96bc	17	#include <linux/delay.h>
d00680ed CC	18	#include <linux/err.h>
	19	#include <linux/init.h>
	20	#include <linux/io.h>
	21	#include <linux/kernel.h>
	22	#include <linux/module.h>
	23	#include <linux/moduleparam.h>
	24	#include <linux/of.h>
f2147de3	25	#include <linux/of_device.h>
d00680ed CC	26	#include <linux/platform_device.h>
	27	#include <linux/types.h>
	28	#include <linux/watchdog.h>
	29
	30	#define WDT_MAX_TIMEOUT 16
	31	#define WDT_MIN_TIMEOUT 1
f2147de3	32	#define WDT_TIMEOUT_MASK 0x0F
d00680ed	33
d00680ed CC	34	#define WDT_CTRL_RELOAD ((1 << 0) \| (0x0a57 << 1))
d00680ed CC	35
d00680ed	36	#define WDT_MODE_EN (1 << 0)
d00680ed CC	37
	38	#define DRV_NAME "sunxi-wdt"
	39	#define DRV_VERSION "1.0"
	40
	41	static bool nowayout = WATCHDOG_NOWAYOUT;
	42	static unsigned int timeout = WDT_MAX_TIMEOUT;
	43
f2147de3 CYT	44	/*
	45	* This structure stores the register offsets for different variants
	46	* of Allwinner's watchdog hardware.
	47	*/
	48	struct sunxi_wdt_reg {
	49	u8 wdt_ctrl;
	50	u8 wdt_cfg;
	51	u8 wdt_mode;
	52	u8 wdt_timeout_shift;
	53	u8 wdt_reset_mask;
	54	u8 wdt_reset_val;
	55	};
	56
d00680ed CC	57	struct sunxi_wdt_dev {
	58	struct watchdog_device wdt_dev;
	59	void __iomem *wdt_base;
f2147de3	60	const struct sunxi_wdt_reg *wdt_regs;
d00680ed CC	61	};
	62
	63	/*
	64	* wdt_timeout_map maps the watchdog timer interval value in seconds to
f2147de3	65	* the value of the register WDT_MODE at bits .wdt_timeout_shift ~ +3
d00680ed CC	66	*
	67	* [timeout seconds] = register value
	68	*
	69	*/
	70
	71	static const int wdt_timeout_map[] = {
51ee34ab EL	72	[1] = 0x1, /* 1s */
	73	[2] = 0x2, /* 2s */
	74	[3] = 0x3, /* 3s */
	75	[4] = 0x4, /* 4s */
	76	[5] = 0x5, /* 5s */
	77	[6] = 0x6, /* 6s */
	78	[8] = 0x7, /* 8s */
	79	[10] = 0x8, /* 10s */
	80	[12] = 0x9, /* 12s */
	81	[14] = 0xA, /* 14s */
	82	[16] = 0xB, /* 16s */
d00680ed CC	83	};
d00680ed CC	84
440e96bc	85
4d8b229d GR	86	static int sunxi_wdt_restart(struct watchdog_device *wdt_dev,
4d8b229d GR	87	unsigned long action, void *data)
440e96bc	88	{
0ebad1e5	89	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
d20a1d90	90	void __iomem *wdt_base = sunxi_wdt->wdt_base;
f2147de3 CYT	91	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
	92	u32 val;
	93
	94	/* Set system reset function */
	95	val = readl(wdt_base + regs->wdt_cfg);
	96	val &= ~(regs->wdt_reset_mask);
	97	val \|= regs->wdt_reset_val;
	98	writel(val, wdt_base + regs->wdt_cfg);
d20a1d90	99
f2147de3 CYT	100	/* Set lowest timeout and enable watchdog */
	101	val = readl(wdt_base + regs->wdt_mode);
	102	val &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
	103	val \|= WDT_MODE_EN;
	104	writel(val, wdt_base + regs->wdt_mode);
440e96bc MR	105
	106	/*
	107	* Restart the watchdog. The default (and lowest) interval
	108	* value for the watchdog is 0.5s.
	109	*/
f2147de3	110	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
440e96bc MR	111
	112	while (1) {
	113	mdelay(5);
f2147de3 CYT	114	val = readl(wdt_base + regs->wdt_mode);
	115	val \|= WDT_MODE_EN;
	116	writel(val, wdt_base + regs->wdt_mode);
440e96bc	117	}
0ebad1e5	118	return 0;
440e96bc MR	119	}
440e96bc MR	120
d00680ed CC	121	static int sunxi_wdt_ping(struct watchdog_device *wdt_dev)
	122	{
	123	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	124	void __iomem *wdt_base = sunxi_wdt->wdt_base;
f2147de3	125	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
d00680ed	126
f2147de3	127	writel(WDT_CTRL_RELOAD, wdt_base + regs->wdt_ctrl);
d00680ed CC	128
	129	return 0;
	130	}
	131
	132	static int sunxi_wdt_set_timeout(struct watchdog_device *wdt_dev,
	133	unsigned int timeout)
	134	{
	135	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	136	void __iomem *wdt_base = sunxi_wdt->wdt_base;
f2147de3	137	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
d00680ed CC	138	u32 reg;
	139
	140	if (wdt_timeout_map[timeout] == 0)
	141	timeout++;
	142
	143	sunxi_wdt->wdt_dev.timeout = timeout;
	144
f2147de3 CYT	145	reg = readl(wdt_base + regs->wdt_mode);
	146	reg &= ~(WDT_TIMEOUT_MASK << regs->wdt_timeout_shift);
	147	reg \|= wdt_timeout_map[timeout] << regs->wdt_timeout_shift;
	148	writel(reg, wdt_base + regs->wdt_mode);
d00680ed CC	149
	150	sunxi_wdt_ping(wdt_dev);
	151
	152	return 0;
	153	}
	154
	155	static int sunxi_wdt_stop(struct watchdog_device *wdt_dev)
	156	{
	157	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	158	void __iomem *wdt_base = sunxi_wdt->wdt_base;
f2147de3	159	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
d00680ed	160
f2147de3	161	writel(0, wdt_base + regs->wdt_mode);
d00680ed CC	162
	163	return 0;
	164	}
	165
	166	static int sunxi_wdt_start(struct watchdog_device *wdt_dev)
	167	{
	168	u32 reg;
	169	struct sunxi_wdt_dev *sunxi_wdt = watchdog_get_drvdata(wdt_dev);
	170	void __iomem *wdt_base = sunxi_wdt->wdt_base;
f2147de3	171	const struct sunxi_wdt_reg *regs = sunxi_wdt->wdt_regs;
d00680ed CC	172	int ret;
	173
	174	ret = sunxi_wdt_set_timeout(&sunxi_wdt->wdt_dev,
	175	sunxi_wdt->wdt_dev.timeout);
	176	if (ret < 0)
	177	return ret;
	178
f2147de3 CYT	179	/* Set system reset function */
	180	reg = readl(wdt_base + regs->wdt_cfg);
	181	reg &= ~(regs->wdt_reset_mask);
0919e444	182	reg \|= regs->wdt_reset_val;
f2147de3 CYT	183	writel(reg, wdt_base + regs->wdt_cfg);
	184
	185	/* Enable watchdog */
	186	reg = readl(wdt_base + regs->wdt_mode);
	187	reg \|= WDT_MODE_EN;
	188	writel(reg, wdt_base + regs->wdt_mode);
d00680ed CC	189
	190	return 0;
	191	}
	192
	193	static const struct watchdog_info sunxi_wdt_info = {
	194	.identity = DRV_NAME,
	195	.options = WDIOF_SETTIMEOUT \|
	196	WDIOF_KEEPALIVEPING \|
	197	WDIOF_MAGICCLOSE,
	198	};
	199
	200	static const struct watchdog_ops sunxi_wdt_ops = {
	201	.owner = THIS_MODULE,
	202	.start = sunxi_wdt_start,
	203	.stop = sunxi_wdt_stop,
	204	.ping = sunxi_wdt_ping,
	205	.set_timeout = sunxi_wdt_set_timeout,
0ebad1e5	206	.restart = sunxi_wdt_restart,
d00680ed CC	207	};
d00680ed CC	208
f2147de3 CYT	209	static const struct sunxi_wdt_reg sun4i_wdt_reg = {
	210	.wdt_ctrl = 0x00,
	211	.wdt_cfg = 0x04,
	212	.wdt_mode = 0x04,
	213	.wdt_timeout_shift = 3,
	214	.wdt_reset_mask = 0x02,
	215	.wdt_reset_val = 0x02,
	216	};
	217
c5ec618f CYT	218	static const struct sunxi_wdt_reg sun6i_wdt_reg = {
	219	.wdt_ctrl = 0x10,
	220	.wdt_cfg = 0x14,
	221	.wdt_mode = 0x18,
	222	.wdt_timeout_shift = 4,
	223	.wdt_reset_mask = 0x03,
	224	.wdt_reset_val = 0x01,
	225	};
	226
f2147de3 CYT	227	static const struct of_device_id sunxi_wdt_dt_ids[] = {
f2147de3 CYT	228	{ .compatible = "allwinner,sun4i-a10-wdt", .data = &sun4i_wdt_reg },
c5ec618f	229	{ .compatible = "allwinner,sun6i-a31-wdt", .data = &sun6i_wdt_reg },
f2147de3 CYT	230	{ /* sentinel */ }
	231	};
	232	MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids);
	233
1d5898b4	234	static int sunxi_wdt_probe(struct platform_device *pdev)
d00680ed CC	235	{
d00680ed CC	236	struct sunxi_wdt_dev *sunxi_wdt;
f2147de3	237	const struct of_device_id *device;
d00680ed CC	238	struct resource *res;
	239	int err;
	240
	241	sunxi_wdt = devm_kzalloc(&pdev->dev, sizeof(*sunxi_wdt), GFP_KERNEL);
	242	if (!sunxi_wdt)
	243	return -EINVAL;
	244
	245	platform_set_drvdata(pdev, sunxi_wdt);
	246
f2147de3 CYT	247	device = of_match_device(sunxi_wdt_dt_ids, &pdev->dev);
	248	if (!device)
	249	return -ENODEV;
	250
	251	sunxi_wdt->wdt_regs = device->data;
	252
d00680ed CC	253	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	254	sunxi_wdt->wdt_base = devm_ioremap_resource(&pdev->dev, res);
	255	if (IS_ERR(sunxi_wdt->wdt_base))
	256	return PTR_ERR(sunxi_wdt->wdt_base);
	257
	258	sunxi_wdt->wdt_dev.info = &sunxi_wdt_info;
	259	sunxi_wdt->wdt_dev.ops = &sunxi_wdt_ops;
	260	sunxi_wdt->wdt_dev.timeout = WDT_MAX_TIMEOUT;
	261	sunxi_wdt->wdt_dev.max_timeout = WDT_MAX_TIMEOUT;
	262	sunxi_wdt->wdt_dev.min_timeout = WDT_MIN_TIMEOUT;
	263	sunxi_wdt->wdt_dev.parent = &pdev->dev;
	264
	265	watchdog_init_timeout(&sunxi_wdt->wdt_dev, timeout, &pdev->dev);
	266	watchdog_set_nowayout(&sunxi_wdt->wdt_dev, nowayout);
0ebad1e5	267	watchdog_set_restart_priority(&sunxi_wdt->wdt_dev, 128);
d00680ed CC	268
	269	watchdog_set_drvdata(&sunxi_wdt->wdt_dev, sunxi_wdt);
	270
	271	sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
	272
	273	err = watchdog_register_device(&sunxi_wdt->wdt_dev);
	274	if (unlikely(err))
	275	return err;
	276
	277	dev_info(&pdev->dev, "Watchdog enabled (timeout=%d sec, nowayout=%d)",
	278	sunxi_wdt->wdt_dev.timeout, nowayout);
	279
	280	return 0;
	281	}
	282
1d5898b4	283	static int sunxi_wdt_remove(struct platform_device *pdev)
d00680ed CC	284	{
	285	struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
	286
	287	watchdog_unregister_device(&sunxi_wdt->wdt_dev);
	288	watchdog_set_drvdata(&sunxi_wdt->wdt_dev, NULL);
	289
	290	return 0;
	291	}
	292
	293	static void sunxi_wdt_shutdown(struct platform_device *pdev)
	294	{
	295	struct sunxi_wdt_dev *sunxi_wdt = platform_get_drvdata(pdev);
	296
	297	sunxi_wdt_stop(&sunxi_wdt->wdt_dev);
	298	}
	299
d00680ed CC	300	static struct platform_driver sunxi_wdt_driver = {
	301	.probe = sunxi_wdt_probe,
	302	.remove = sunxi_wdt_remove,
	303	.shutdown = sunxi_wdt_shutdown,
	304	.driver = {
d00680ed	305	.name = DRV_NAME,
85eee819	306	.of_match_table = sunxi_wdt_dt_ids,
d00680ed CC	307	},
	308	};
	309
	310	module_platform_driver(sunxi_wdt_driver);
	311
	312	module_param(timeout, uint, 0);
	313	MODULE_PARM_DESC(timeout, "Watchdog heartbeat in seconds");
	314
	315	module_param(nowayout, bool, 0);
	316	MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
	317	"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
	318
	319	MODULE_LICENSE("GPL");
	320	MODULE_AUTHOR("Carlo Caione <carlo.caione@gmail.com>");
	321	MODULE_AUTHOR("Henrik Nordstrom <henrik@henriknordstrom.net>");
	322	MODULE_DESCRIPTION("sunxi WatchDog Timer Driver");
	323	MODULE_VERSION(DRV_VERSION);