gas: Mention support for Intel SERIALIZE and TSXLDTRK
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
6e0e8b45
L
12020-04-07 H.J. Lu <hongjiu.lu@intel.com>
2
3 * NEWS: Mention support for Intel SERIALIZE and TSXLDTRK
4 instructions.
5
266803a2
L
62020-04-07 H.J. Lu <hongjiu.lu@intel.com>
7
8 * doc/c-z80.texi: Fix @xref warnings.
9
bb651e8b
CL
102020-04-07 Lili Cui <lili.cui@intel.com>
11
12 * config/tc-i386.c (cpu_arch): Add .TSXLDTRK.
13 (cpu_noarch): Likewise.
14 * doc/c-i386.texi: Document TSXLDTRK.
15 * testsuite/gas/i386/i386.exp: Run TSXLDTRK tests.
16 * testsuite/gas/i386/tsxldtrk.d: Likewise.
17 * testsuite/gas/i386/tsxldtrk.s: Likewise.
18 * testsuite/gas/i386/x86-64-tsxldtrk.d: Likewise.
19
4b27d27c
L
202020-04-02 Lili Cui <lili.cui@intel.com>
21
22 * config/tc-i386.c (cpu_arch): Add .serialize.
23 (cpu_noarch): Likewise.
24 * doc/c-i386.texi: Document serialize.
25 * testsuite/gas/i386/i386.exp: Run serialize tests
26 * testsuite/gas/i386/serialize.d: Likewise.
27 * testsuite/gas/i386/x86-64-serialize.d: Likewise.
28 * testsuite/gas/i386/serialize.s: Likewise.
29
bb897477
RO
302020-04-02 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
31
32 * testsuite/gas/elf/section12a.d: Use notarget instead of xfail.
33 * testsuite/gas/elf/section12b.d: Likewise.
34 * testsuite/gas/elf/section16a.d: Likewise.
35 * testsuite/gas/elf/section16b.d: Likewise.
36
59e28a97
GN
372020-04-02 Gunther Nikl <gnikl@justmail.de>
38
39 * config/tc-m68k.c (m68k_ip): Fix range check for index register
40 with a suppressed address register.
41
efc3a950
L
422020-04-01 H.J. Lu <hongjiu.lu@intel.com>
43
44 PR gas/25756
45 * config/tc-i386.h (TC_FORCE_RELOCATION_ABS): New.
46 * testsuite/gas/i386/localpic.s: Add a test for relocation
47 against local absolute symbol.
48 * testsuite/gas/i386/x86-64-localpic.s: Likewise.
49 * testsuite/gas/i386/localpic.d: Updated.
50 * testsuite/gas/i386/x86-64-localpic.d: Likewise.
51 * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise.
52
15d47c3a
RO
532020-04-01 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
54
55 PR gas/25732
56 * testsuite/gas/i386/solaris/x86-64-branch-2.d: New file.
57 * testsuite/gas/i386/solaris/x86-64-branch-3.d: New file.
58 * testsuite/gas/i386/solaris/x86-64-jump.d: Incorporate changes to
59 testsuite/gas/i386/x86-64-jump.d.
60 * gas/testsuite/gas/i386/solaris/x86-64-mpx-branch-1.d:
61 Incorporate changes to
62 gas/testsuite/gas/i386/x86-64-mpx-branch-1.d.
63 * testsuite/gas/i386/solaris/x86-64-mpx-branch-2.d : Incorporate
64 changes to testsuite/gas/i386/x86-64-mpx-branch-2.d.
65 * testsuite/gas/i386/x86-64-branch-2.d: Skip on *-*-solaris*.
66 * testsuite/gas/i386/x86-64-branch-3.d: Likewise.
67
876678f0
MR
682020-03-31 Maciej W. Rozycki <macro@linux-mips.org>
69
70 PR 25611
71 PR 25614
72 * dwarf2dbg.c: Do not include "bignum.h".
73
d1a89da5
NC
742020-03-30 Nelson Chu <nelson.chu@sifive.com>
75
76 * testsuite/gas/riscv/alias-csr.d: Move this to priv-reg-pseudo.
77 * testsuite/gas/riscv/alias-csr.s: Likewise.
78 * testsuite/gas/riscv/no-aliases-csr.d: Move this
79 to priv-reg-pseudo-noalias.
80 * testsuite/gas/riscv/bad-csr.d: Rename to priv-reg-fail-nonexistent.
81 * testsuite/gas/riscv/bad-csr.l: Likewise.
82 * testsuite/gas/riscv/bad-csr.s: Likewise.
83 * testsuite/gas/riscv/satp.d: Removed. Already included in priv-reg.
84 * testsuite/gas/riscv/satp.s: Likewise.
85 * testsuite/gas/riscv/priv-reg-pseudo.d: New testcase for all pseudo
86 csr instruction, including alias-csr testcase.
87 * testsuite/gas/riscv/priv-reg-pseudo.s: Likewise.
88 * testsuite/gas/riscv/priv-reg-pseudo-noalias.d: New testcase for all
89 pseudo instruction with objdump -Mno-aliases.
90 * testsuite/gas/riscv/priv-reg-fail-nonexistent.d: New testcase.
91 * testsuite/gas/riscv/priv-reg-fail-nonexistent.l: Likewise.
92 * testsuite/gas/riscv/priv-reg-fail-nonexistent.s: Likewise.
93 * testsuite/gas/riscv/priv-reg.d: Update CSR to 1.11.
94 * testsuite/gas/riscv/priv-reg.s: Likewise.
95 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
96 * testsuite/gas/riscv/csr-dw-regnums.d: Likewise.
97 * testsuite/gas/riscv/csr-dw-regnums.s: Likewise.
98
b7780957
J
992020-03-25 J.W. Jagersma <jwjagersma@gmail.com>
100
101 * config/obj-coff.c (obj_coff_section): Set the bss flag on
102 sections with the "b" attribute.
103
d1023b5d
AM
1042020-03-22 Alan Modra <amodra@gmail.com>
105
106 * testsuite/gas/s12z/truncated.d: Update expected output.
107
0d832e7f
SB
1082020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
109
110 PR 25690
111 * config/tc-z80.c (md_pseudo_table): Add xdef anf xref pseudo ops.
112 * doc/c-z80.texi: Update documentation.
113
327ef784
NC
1142020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
115
116 PR 25641
117 PR 25668
118 PR 25633
119 Fix disassembling ED+A4/AC/B4/BC opcodes.
120 Fix assembling lines containing colonless label and instruction
121 with first operand inside parentheses.
122 Fix registration of unsupported by target CPU registers.
123 * config/tc-z80.c: See above.
124 * config/tc-z80.h: See above.
125 * testsuite/gas/z80/colonless.d: Update test.
126 * testsuite/gas/z80/colonless.s: Likewise.
127 * testsuite/gas/z80/ez80_adl_all.d: Likewise.
128 * testsuite/gas/z80/ez80_unsup_regs.d: Likewise.
129 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
130 * testsuite/gas/z80/gbz80_unsup_regs.d: Likewise.
131 * testsuite/gas/z80/r800_unsup_regs.d: Likewise.
132 * testsuite/gas/z80/unsup_regs.s: Likewise.
133 * testsuite/gas/z80/z180_unsup_regs.d: Likewise.
134 * testsuite/gas/z80/z80.exp: Likewise.
135 * testsuite/gas/z80/z80_strict_unsup_regs.d: Likewise.
136 * testsuite/gas/z80/z80_unsup_regs.d: Likewise.
137 * testsuite/gas/z80/z80n_unsup_regs.d: Likewise.
138
66d1f7cc
AV
1392020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
140
141 PR 25660
142 * config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
143 (parse_operands): Handle new operand codes.
144 (do_neon_dyadic_long): Make shape check accept the scalar variants.
145 (asm_opcode_insns): Fix operand codes for vaddl and vsubl.
146 * testsuite/gas/arm/mve-vaddsub-it.s: New test.
147 * testsuite/gas/arm/mve-vaddsub-it.d: New test.
148 * testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
149 * testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
150 * testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
151 * testsuite/gas/arm/nomve-vaddsub-it.d: New test.
152
9e8f1c90
L
1532020-03-11 H.J. Lu <hongjiu.lu@intel.com>
154
155 * NEWS: Mention x86 assembler options for CVE-2020-0551.
156
97b4a8f7
L
1572020-03-11 H.J. Lu <hongjiu.lu@intel.com>
158
159 * testsuite/gas/i386/i386.exp: Run new tests.
160 * testsuite/gas/i386/lfence-byte.d: New file.
161 * testsuite/gas/i386/lfence-byte.e: Likewise.
162 * testsuite/gas/i386/lfence-byte.s: Likewise.
163 * testsuite/gas/i386/lfence-indbr-a.d: Likewise.
164 * testsuite/gas/i386/lfence-indbr-b.d: Likewise.
165 * testsuite/gas/i386/lfence-indbr-c.d: Likewise.
166 * testsuite/gas/i386/lfence-indbr.e: Likewise.
167 * testsuite/gas/i386/lfence-indbr.s: Likewise.
168 * testsuite/gas/i386/lfence-load.d: Likewise.
169 * testsuite/gas/i386/lfence-load.s: Likewise.
170 * testsuite/gas/i386/lfence-ret-a.d: Likewise.
171 * testsuite/gas/i386/lfence-ret-b.d: Likewise.
172 * testsuite/gas/i386/lfence-ret.s: Likewise.
173 * testsuite/gas/i386/x86-64-lfence-byte.d: Likewise.
174 * testsuite/gas/i386/x86-64-lfence-byte.e: Likewise.
175 * testsuite/gas/i386/x86-64-lfence-byte.s: Likewise.
176 * testsuite/gas/i386/x86-64-lfence-indbr-a.d: Likewise.
177 * testsuite/gas/i386/x86-64-lfence-indbr-b.d: Likewise.
178 * testsuite/gas/i386/x86-64-lfence-indbr-c.d: Likewise.
179 * testsuite/gas/i386/x86-64-lfence-indbr.e: Likewise.
180 * testsuite/gas/i386/x86-64-lfence-indbr.s: Likewise.
181 * testsuite/gas/i386/x86-64-lfence-load.d: Likewise.
182 * testsuite/gas/i386/x86-64-lfence-load.s: Likewise.
183 * testsuite/gas/i386/x86-64-lfence-ret-a.d: Likewise.
184 * testsuite/gas/i386/x86-64-lfence-ret-b.d: Likewise.
185
ae531041
L
1862020-03-11 H.J. Lu <hongjiu.lu@intel.com>
187
188 * config/tc-i386.c (lfence_after_load): New.
189 (lfence_before_indirect_branch_kind): New.
190 (lfence_before_indirect_branch): New.
191 (lfence_before_ret_kind): New.
192 (lfence_before_ret): New.
193 (last_insn): New.
194 (load_insn_p): New.
195 (insert_lfence_after): New.
196 (insert_lfence_before): New.
197 (md_assemble): Call insert_lfence_before and insert_lfence_after.
198 Set last_insn.
199 (OPTION_MLFENCE_AFTER_LOAD): New.
200 (OPTION_MLFENCE_BEFORE_INDIRECT_BRANCH): New.
201 (OPTION_MLFENCE_BEFORE_RET): New.
202 (md_longopts): Add -mlfence-after-load=,
203 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
204 (md_parse_option): Handle -mlfence-after-load=,
205 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
206 (md_show_usage): Display -mlfence-after-load=,
207 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
208 (i386_cons_align): New.
209 * config/tc-i386.h (i386_cons_align): New.
210 (md_cons_align): New.
211 * doc/c-i386.texi: Document -mlfence-after-load=,
212 -mlfence-before-indirect-branch= and -mlfence-before-ret=.
213
5496f3c6
NC
2142020-03-11 Nick Clifton <nickc@redhat.com>
215
216 PR 25611
217 PR 25614
218 * dwarf2dbg.c (DWARF2_FILE_TIME_NAME): Default to -1.
219 (DWARF2_FILE_SIZE_NAME): Default to -1.
220 (DWARF2_LINE_VERSION): Default to the current dwarf level or 3,
221 whichever is higher.
222 (DWARF2_LINE_MAX_OPS_PER_INSN): Provide a default value of 1.
223 (NUM_MD5_BYTES): Define.
224 (struct file entry): Add md5 field.
225 (get_filenum): Delete and replace with...
226 (get_basename): New function.
227 (get_directory_table_entry): New function.
228 (allocate_filenum): New function.
229 (allocate_filename_to_slot): New function.
230 (dwarf2_where): Use new functions.
231 (dwarf2_directive_filename): Add support for extended .file
232 pseudo-op.
233 (dwarf2_directive_loc): Allow the use of file number zero with
234 DWARF 5 or higher.
235 (out_file_list): Rename to...
236 (out_dir_and_file_list): Add DWARF 5 support.
237 (out_debug_line): Emit extra values into the section header for
238 DWARF 5.
239 (out_debug_str): Allow for file 0 to be used with DWARF 5.
240 * doc/as.texi (.file): Update the description of this pseudo-op.
241 * testsuite/gas/elf-dwarf-5-file0.s: Add more lines.
242 * testsuite/gas/elf-dwarf-5-file0.d: Update expected dump output.
243 * testsuite/gas/lns/lns-diag-1.l: Update expected error message.
244 * NEWS: Mention the new feature.
245
a6a1f5e0
AM
2462020-03-10 Alan Modra <amodra@gmail.com>
247
248 * config/tc-csky.c (get_operand_value): Rewrite 1 << 31 expressions
249 to avoid signed overflow.
250 * config/tc-mcore.c (md_assemble): Likewise.
251 * config/tc-mips.c (gpr_read_mask, gpr_write_mask): Likewise.
252 * config/tc-nds32.c (SET_ADDEND): Likewise.
253 * config/tc-nios2.c (nios2_assemble_arg_R): Likewise.
254
3fabc179
JB
2552020-03-09 Jan Beulich <jbeulich@suse.com>
256
257 * testsuite/gas/i386/avx.s: Add long-form VCMP[PS][SD] pseudos.
258 * testsuite/gas/i386/avx.d, testsuite/gas/i386/avx-16bit.d,
259 testsuite/gas/i386/avx-intel.d: Adjust expectations.
260
190e5fc8
AM
2612020-03-07 Alan Modra <amodra@gmail.com>
262
263 * testsuite/gas/elf/dwarf-5-file0.s: Don't start directives in
264 first column.
265
84d9ab33
NC
2662020-03-06 Nick Clifton <nickc@redhat.com>
267
268 PR 25614
269 * dwarf2dbg.c (dwarf2_directive_filename): Allow a file number of
270 0 if the dwarf_level is 5 or more. Complain if a filename follows
271 a file 0.
272 * testsuite/gas/elf/dwarf-5-file0.s: New test.
273 * testsuite/gas/elf/dwarf-5-file0.d: New test driver.
274 * testsuite/gas/elf/elf.exp: Run the new test.
275
276 PR 25612
277 * config/tc-ia64.h (DWARF2_VERISION): Fix typo.
278 * doc/as.texi: Fix another typo.
279
31bf1864
NC
2802020-03-06 Nick Clifton <nickc@redhat.com>
281
282 PR 25612
283 * as.c (dwarf_level): Define.
284 (show_usage): Add --gdwarf-3, --gdwarf-4 and --gdwarf-5.
285 (parse_args): Add support for the new options.
286 as.h (dwarf_level): Prototype.
287 * dwarf2dbg.c (DWARF2_VERSION): Use dwarf_level as default version
288 value.
289 * config/tc-ia64.h (DWARF2_VERISION): Update definition.
290 (DWARF2_LINE_VERSION): Remove definition.
291 * doc/as.texi: Document the new options.
292
3c968de5
NC
2932020-03-06 Nick Clifton <nickc@redhat.com>
294
295 PR 25572
296 * as.c (main): Allow matching input and outputs when they are
297 not regular files.
298
bc49bfd8
JB
2992020-03-06 Jan Beulich <jbeulich@suse.com>
300
301 * config/tc-i386.c (match_mem_size): Generalize broadcast special
302 casing.
303 (check_VecOperands): Zap xmmword/ymmword/zmmword when more than
304 one of byte/word/dword/qword is set alongside a SIMD register in
305 a template's operand.
306
4873e243
JB
3072020-03-06 Jan Beulich <jbeulich@suse.com>
308
309 * config/tc-i386.c (match_template): Extend code in logic
310 rejecting certain suffixes in certain modes to also cover mask
311 register use and VecSIB. Drop special casing of broadcast. Skip
312 immediates in the check.
313
e365e234
JB
3142020-03-06 Jan Beulich <jbeulich@suse.com>
315
316 * config/tc-i386.c (match_template): Fold duplicate code in
317 logic rejecting certain suffixes in certain modes. Drop
318 pointless "else".
319
4ed21b58
JB
3202020-03-06 Jan Beulich <jbeulich@suse.com>
321
322 * config/tc-i386.c (process_suffix): Exlucde !vexw insns
323 alongside !norex64 ones.
324 * testsuite/gas/i386/x86-64-avx512bw.s: Test VPEXTR* and VPINSR*
325 with both 32- and 64-bit GPR operands.
326 * testsuite/gas/i386/x86-64-avx512f.s: Test VEXTRACTPS with both
327 32- and 64-bit GPR operands.
328 * testsuite/gas/i386/x86-64-avx512bw-intel.d,
329 testsuite/gas/i386/x86-64-avx512bw.d,
330 testsuite/gas/i386/x86-64-avx512f-intel.d,
331 testsuite/gas/i386/x86-64-avx512f.d: Adjust expectations.
332
643bb870
JB
3332020-03-06 Jan Beulich <jbeulich@suse.com>
334
335 * config/tc-i386.c (md_assemble): Drop use of rex64.
336 (process_suffix): For REX.W for 64-bit CRC32.
337
a23b33b3
JB
3382020-03-06 Jan Beulich <jbeulich@suse.com>
339
340 * config/tc-i386.c (i386_addressing_mode): For 32-bit
341 addressing for MPX insns without base/index.
342 * testsuite/gas/i386/mpx-16bit.s,
343 * testsuite/gas/i386/mpx-16bit.d: New.
344 * testsuite/gas/i386/i386.exp: Run new test.
345
a0497384
JB
3462020-03-06 Jan Beulich <jbeulich@suse.com>
347
348 * testsuite/gas/i386/adx.s, testsuite/gas/i386/cet.s,
349 testsuite/gas/i386/ept.s, testsuite/gas/i386/fsgs.s,
350 testsuite/gas/i386/invpcid.s, testsuite/gas/i386/movdir.s,
351 testsuite/gas/i386/ptwrite.s, testsuite/gas/i386/vmx.s,
352 * testsuite/gas/i386/code16.s: Add CR, DR, and TR access cases
353 as well as a BSWAP one.
354 * testsuite/gas/i386/rdpid.s: Add 16-bit case.
355 * testsuite/gas/i386/sse2-16bit.s: Cover more insns.
356 * testsuite/gas/i386/adx-intel.d, testsuite/gas/i386/adx.d,
357 testsuite/gas/i386/cet-intel.d, testsuite/gas/i386/cet.d,
358 testsuite/gas/i386/code16.d, testsuite/gas/i386/ept-intel.d,
359 testsuite/gas/i386/ept.d, testsuite/gas/i386/fsgs-intel.d,
360 testsuite/gas/i386/fsgs.d, testsuite/gas/i386/invpcid-intel.d,
361 testsuite/gas/i386/invpcid.d, testsuite/gas/i386/movdir-intel.d,
362 testsuite/gas/i386/movdir.d, testsuite/gas/i386/ptwrite-intel.d,
363 testsuite/gas/i386/ptwrite.d, testsuite/gas/i386/rdpid-intel.d,
364 testsuite/gas/i386/rdpid.d, testsuite/gas/i386/sse2-16bit.d,
365 testsuite/gas/i386/vmx.d: Adjust expectations.
366
b630c145
JB
3672020-03-06 Jan Beulich <jbeulich@suse.com>
368
369 * config/tc-i386.c (md_assemble): Also exclude tpause and umwait
370 from having their operands swapped.
371 * testsuite/gas/i386/waitpkg.s,
372 testsuite/gas/i386/x86-64-waitpkg.s: Add tpause and umwait
373 3-operand cases as well as testing of 16-bit code generation.
374 * testsuite/gas/i386/waitpkg.d,
375 testsuite/gas/i386/waitpkg-intel.d,
376 testsuite/gas/i386/x86-64-waitpkg.d,
377 testsuite/gas/i386/x86-64-waitpkg-intel.d: Adjust expectations.
378
de48783e
NC
3792020-03-04 Nelson Chu <nelson.chu@sifive.com>
380
dee35d02
NC
381 * config/tc-riscv.c (percent_op_utype): Support the modifier
382 %got_pcrel_hi.
383 * doc/c-riscv.texi: Add documentation.
384 * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
385 modifier %got_pcrel_hi.
386 * testsuite/gas/riscv/no-relax-reloc.s: Likewise.
387 * testsuite/gas/riscv/relax-reloc.d: Likewise.
388 * testsuite/gas/riscv/relax-reloc.s: Likewise.
389
de48783e
NC
390 * doc/c-riscv.texi (relocation modifiers): Add documentation.
391 (RISC-V-Formats): Update the section name from "Instruction Formats"
392 to "RISC-V Instruction Formats".
393
749479c8
AO
3942020-03-04 Alexandre Oliva <oliva@adacore.com>
395
396 * config/tc-arm.c (md_apply_fix): Warn if a PC-relative load is
397 detected in a section which does not have at least 4 byte
398 alignment.
399 * testsuite/gas/arm/armv8-ar-it-bad.s: Add alignment directive.
400 * testsuite/gas/arm/ldr-t.s: Likewise.
401 * testsuite/gas/arm/sp-pc-usage-t.s: Likewise.
402 * testsuite/gas/arm/sp-pc-usage-t.d: Finish test at end of
403 disassembly, ignoring any NOPs that may have been inserted because
404 of section alignment.
405 * testsuite/gas/arm/ldr-t.d: Likewise.
406
a847e322
JB
4072020-03-04 Jan Beulich <jbeulich@suse.com>
408
409 * config/tc-i386.c (cpu_arch): Add .sev_es entry.
410 * doc/c-i386.texi: Mention sev_es.
411 * testsuite/gas/i386/arch-13.s: Add SEV-ES case.
412 * testsuite/gas/i386/arch-13.d: Extend -march=. Adjust
413 expectations.
414 * testsuite/gas/i386/arch-13-znver1.d,
415 testsuite/gas/i386/arch-13-znver2.d: Extend -march=.
416
3cd7f3e3
L
4172020-03-03 H.J. Lu <hongjiu.lu@intel.com>
418
419 * config/tc-i386.c (match_template): Replace ignoresize and
420 defaultsize with mnemonicsize.
421 (process_suffix): Likewise.
422
b8ba1385
SB
4232020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
424
425 PR 25627
426 * config/tc-z80.c (emit_ld_rr_m): Fix invalid compilation of
427 instruction LD IY,(HL).
428 * testsuite/gas/z80/ez80_adl_all.d: Update expected disassembly.
429 * testsuite/gas/z80/ez80_adl_all.s: Add tests of the instruction.
430 * testsuite/gas/z80/ez80_z80_all.d: Update expected disassembly.
431 * testsuite/gas/z80/ez80_z80_all.s: Add tests of the instruction.
432
10d97a0f
L
4332020-03-03 H.J. Lu <hongjiu.lu@intel.com>
434
435 PR gas/25622
436 * testsuite/gas/i386/i386.exp: Run x86-64-default-suffix and
437 x86-64-default-suffix-avx.
438 * testsuite/gas/i386/noreg64.s: Remove cvtsi2sd, cvtsi2ss,
439 vcvtsi2sd, vcvtsi2ss, vcvtusi2sd and vcvtusi2ss entries.
440 * testsuite/gas/i386/noreg64.d: Updated.
441 * testsuite/gas/i386/noreg64.l: Likewise.
442 * testsuite/gas/i386/x86-64-default-suffix-avx.d: New file.
443 * testsuite/gas/i386/x86-64-default-suffix.d: Likewise.
444 * testsuite/gas/i386/x86-64-default-suffix.s: Likewise.
445
8326546e
SB
4462020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
447
448 PR 25604
449 * config/tc-z80.c (contains_register): Prevent an illegal memory
450 access when checking an expression for a register name.
451
e3e896e6
AM
4522020-03-03 Alan Modra <amodra@gmail.com>
453
454 * config/obj-coff.h: Remove vestiges of coff-m68k and pe-mips
455 support.
456
a4dd6c97
AM
4572020-03-02 Alan Modra <amodra@gmail.com>
458
459 * config/tc-m32r.c (md_begin): Set SEC_SMALL_DATA on .scommon section.
460 * config/tc-mips.c (s_change_sec): Set SEC_SMALL_DATA for .sdata
461 and .sbss sections.
462 * config/tc-score.c: Delete !BFD_ASSEMBLER code throughout.
463 (s3_s_change_sec): Set SEC_SMALL_DATA for .sbss section.
464 (s3_s_score_lcomm): Likewise.
465 * config/tc-score7.c: Similarly.
466 * read.c (bss_alloc): Set SEC_SMALL_DATA for .sbss section.
467
dec7b24b
YS
4682020-02-28 YunQiang Su <syq@debian.org>
469
470 PR gas/25539
471 * config/tc-mips.c (fix_loongson3_llsc): Compare label value
472 to handle multi-labels.
473 (has_label_name): New.
474
cceb53b8
MM
4752020-02-26 Matthew Malcomson <matthew.malcomson@arm.com>
476
477 * config/tc-arm.c (enum pred_instruction_type): Remove
478 NEUTRAL_IT_NO_VPT_INSN predication type.
479 (cxn_handle_predication): Modify to require condition suffixes.
480 (handle_pred_state): Remove NEUTRAL_IT_NO_VPT_INSN cases.
481 * testsuite/gas/arm/cde-scalar.s: Update test.
482 * testsuite/gas/arm/cde-warnings.l: Update test.
483 * testsuite/gas/arm/cde-warnings.s: Update test.
484
da3ec71f
AM
4852020-02-26 Alan Modra <amodra@gmail.com>
486
487 * config/tc-arm.c (reg_expected_msgs[REG_TYPE_RNB]): Don't use
488 N_() on empty string.
489
42135cad
AM
4902020-02-26 Alan Modra <amodra@gmail.com>
491
492 * read.c (read_a_source_file): Call strncpy with length one
493 less than size of original_case_string.
494
dc1e8a47
AM
4952020-02-26 Alan Modra <amodra@gmail.com>
496
497 * config/obj-elf.c: Indent labels correctly.
498 * config/obj-macho.c: Likewise.
499 * config/tc-aarch64.c: Likewise.
500 * config/tc-alpha.c: Likewise.
501 * config/tc-arm.c: Likewise.
502 * config/tc-cr16.c: Likewise.
503 * config/tc-crx.c: Likewise.
504 * config/tc-frv.c: Likewise.
505 * config/tc-i386-intel.c: Likewise.
506 * config/tc-i386.c: Likewise.
507 * config/tc-ia64.c: Likewise.
508 * config/tc-mn10200.c: Likewise.
509 * config/tc-mn10300.c: Likewise.
510 * config/tc-nds32.c: Likewise.
511 * config/tc-riscv.c: Likewise.
512 * config/tc-s12z.c: Likewise.
513 * config/tc-xtensa.c: Likewise.
514 * config/tc-z80.c: Likewise.
515 * read.c: Likewise.
516 * symbols.c: Likewise.
517 * write.c: Likewise.
518
bd0cf5a6
NC
5192020-02-20 Nelson Chu <nelson.chu@sifive.com>
520
54b2aec1
NC
521 * config/tc-riscv.c (riscv_ip): New boolean insn_with_csr to indicate
522 we are assembling instruction with CSR. Call riscv_csr_read_only_check
523 after parsing all arguments.
524 (enum csr_insn_type): New enum is used to classify the CSR instruction.
525 (riscv_csr_insn_type, riscv_csr_read_only_check): New functions. These
526 are used to check if we write a read-only CSR by the CSR instruction.
527 * testsuite/gas/riscv/priv-reg-fail-read-only-01.s: New testcase. Test
528 all CSR for the read-only CSR checking.
529 * testsuite/gas/riscv/priv-reg-fail-read-only-01.d: Likewise.
530 * testsuite/gas/riscv/priv-reg-fail-read-only-01.l: Likewise.
531 * testsuite/gas/riscv/priv-reg-fail-read-only-02.s: New testcase. Test
532 all CSR instructions for the read-only CSR checking.
533 * testsuite/gas/riscv/priv-reg-fail-read-only-02.d: Likewise.
534 * testsuite/gas/riscv/priv-reg-fail-read-only-02.l: Likewise.
535
2ca89224
NC
536 * config/tc-riscv.c (struct riscv_set_options): New field csr_check.
537 (riscv_opts): Initialize it.
538 (reg_lookup_internal): Check the `riscv_opts.csr_check`
539 before doing the CSR checking.
540 (enum options): Add OPTION_CSR_CHECK and OPTION_NO_CSR_CHECK.
541 (md_longopts): Add mcsr-check and mno-csr-check.
542 (md_parse_option): Handle new enum option values.
543 (s_riscv_option): Handle new long options.
544 * doc/c-riscv.texi: Add description for the new .option and assembler
545 options.
546 * testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
547 the CSR checking.
548 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
549
bd0cf5a6
NC
550 * config/tc-riscv.c (csr_extra_hash): New.
551 (enum riscv_csr_class): New enum. Used to decide
552 whether or not this CSR is legal in the current ISA string.
553 (struct riscv_csr_extra): New structure to hold all extra information
554 of CSR.
555 (riscv_init_csr_hashes): New. According to the DECLARE_CSR and
556 DECLARE_CSR_ALIAS, insert CSR extra information into csr_extra_hash.
557 Call hash_reg_name to insert CSR address into reg_names_hash.
558 (reg_csr_lookup_internal, riscv_csr_class_check): New functions.
559 Decide whether the CSR is valid according to the csr_extra_hash.
560 (reg_lookup_internal): Call reg_csr_lookup_internal for CSRs.
561 (init_opcode_hash): Update 'if (hash_error != NULL)' as hash_error is
562 not a boolean. This is same as riscv_init_csr_hash, so keep the
563 consistent usage.
564 (md_begin): Call riscv_init_csr_hashes for each DECLARE_CSR.
565 * testsuite/gas/riscv/csr-dw-regnums.d: Add -march=rv32if option.
566 * testsuite/gas/riscv/priv-reg.d: Add f-ext by -march option.
567 * testsuite/gas/riscv/priv-reg-fail-fext.d: New testcase. The source
568 file is `priv-reg.s`, and the ISA is rv32i without f-ext, so the
569 f-ext CSR are not allowed.
570 * testsuite/gas/riscv/priv-reg-fail-fext.l: Likewise.
571 * testsuite/gas/riscv/priv-reg-fail-rv32-only.d: New testcase. The
572 source file is `priv-reg.s`, and the ISA is rv64if, so the
573 rv32-only CSR are not allowed.
574 * testsuite/gas/riscv/priv-reg-fail-rv32-only.l: Likewise.
575
10a95fcc
AM
5762020-02-21 Alan Modra <amodra@gmail.com>
577
578 * config/tc-pdp11.c (md_apply_fix): Handle BFD_RELOC_32.
579 (tc_gen_reloc): Only give a BAD_CASE assertion on pcrel relocs.
580
dda2980f
AM
5812020-02-21 Alan Modra <amodra@gmail.com>
582
583 PR 25569
584 * config/obj-aout.c (obj_aout_frob_file_before_fix): Don't loop
585 on section size adjustment, instead perform another write if
586 exec header size is larger than section size.
587
bd3380bc
NC
5882020-02-19 Nelson Chu <nelson.chu@sifive.com>
589
590 * doc/c-riscv.texi: Add the doc entries for -march-attr/
591 -mno-arch-attr command line options.
592
fa164239
JW
5932020-02-19 Nelson Chu <nelson.chu@sifive.com>
594
595 * testsuite/gas/riscv/c-add-addi.d: New testcase.
596 * testsuite/gas/riscv/c-add-addi.s: Likewise.
597
fcaaac0a
SB
5982020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
599
600 PR 25576
601 * config/tc-z80.c (md_parse_option): Do not use an underscore
602 prefix for local labels in SDCC compatability mode.
603 (z80_start_line_hook): Remove SDCC dollar label support.
604 * testsuite/gas/z80/sdcc.d: Update expected disassembly.
605 * testsuite/gas/z80/sdcc.s: Likewise.
606
6072020-02-19 Sergey Belyashov <sergey.belyashov@gmail.com>
608
609 PR 25517
610 * config/tc-z80.c: Add -march option.
611 * doc/as.texi: Update Z80 documentation.
612 * doc/c-z80.texi: Likewise.
613 * testsuite/gas/z80/ez80_adl_all.d: Update command line.
614 * testsuite/gas/z80/ez80_adl_suf.d: Likewise.
615 * testsuite/gas/z80/ez80_pref_dis.d: Likewise.
616 * testsuite/gas/z80/ez80_z80_all.d: Likewise.
617 * testsuite/gas/z80/ez80_z80_suf.d: Likewise.
618 * testsuite/gas/z80/gbz80_all.d: Likewise.
619 * testsuite/gas/z80/r800_extra.d: Likewise.
620 * testsuite/gas/z80/r800_ii8.d: Likewise.
621 * testsuite/gas/z80/r800_z80_doc.d: Likewise.
622 * testsuite/gas/z80/sdcc.d: Likewise.
623 * testsuite/gas/z80/z180.d: Likewise.
624 * testsuite/gas/z80/z180_z80_doc.d: Likewise.
625 * testsuite/gas/z80/z80_doc.d: Likewise.
626 * testsuite/gas/z80/z80_ii8.d: Likewise.
627 * testsuite/gas/z80/z80_in_f_c.d: Likewise.
628 * testsuite/gas/z80/z80_op_ii_ld.d: Likewise.
629 * testsuite/gas/z80/z80_out_c_0.d: Likewise.
630 * testsuite/gas/z80/z80_sli.d: Likewise.
631 * testsuite/gas/z80/z80n_all.d: Likewise.
632 * testsuite/gas/z80/z80n_reloc.d: Likewise.
633
a7e12755
L
6342020-02-19 H.J. Lu <hongjiu.lu@intel.com>
635
636 * config/tc-i386.c (output_insn): Mark cvtpi2ps and cvtpi2pd
637 with GNU_PROPERTY_X86_FEATURE_2_MMX.
638 * testsuite/gas/i386/i386.exp: Run property-3 and
639 x86-64-property-3.
640 * testsuite/gas/i386/property-3.d: New file.
641 * testsuite/gas/i386/property-3.s: Likewise.
642 * testsuite/gas/i386/x86-64-property-3.d: Likewise.
643
272a84b1
L
6442020-02-17 H.J. Lu <hongjiu.lu@intel.com>
645
646 * config/tc-i386.c (cpu_arch): Add .popcnt.
647 * doc/c-i386.texi: Remove abm and .abm. Add popcnt and .popcnt.
648 Add a tab before @samp{.sse4a}.
649
c8f8eebc
JB
6502020-02-17 Jan Beulich <jbeulich@suse.com>
651
652 * config/tc-i386.c (process_suffix): Don't try to guess a suffix
653 for AddrPrefixOpReg templates. Combine the two pieces of
654 addrprefixopreg handling. Reject 16-bit address reg in 64-bit
655 mode.
656
eedb0f2c
JB
6572020-02-17 Jan Beulich <jbeulich@suse.com>
658
659 PR gas/14439
660 * config/tc-i386.c (md_assemble): Also suppress operand
661 swapping for MONITOR{,X} and MWAIT{,X}.
662 * testsuite/gas/i386/sse3.s, testsuite/gas/i386/x86-64-sse3.s:
663 Add Intel syntax monitor/mwait tests.
664 * testsuite/gas/i386/sse3.d, testsuite/gas/i386/x86-64-sse3.d:
665 Adjust expectations.
666 *testsuite/gas/i386/sse3-intel.d,
667 testsuite/gas/i386/x86-64-sse3-intel.d: New.
668 * testsuite/gas/i386/i386.exp: Run new tests.
669
b9915cbc
JB
6702020-02-17 Jan Beulich <jbeulich@suse.com>
671
672 PR gas/6518
673 * config/tc-i386.c (process_suffix): Re-work Intel-syntax
674 [XYZ]MMWord memory operand ambiguity recognition logic (largely
675 re-indentation).
676 * testsuite/gas/i386/avx512dq-inval.s: Add vcvtqq2ps/vcvtuqq2ps
677 cases.
678 * testsuite/gas/i386/inval-avx512f.s: Also test vcvtneps2bf16.
679 * testsuite/gas/i386/avx512dq-inval.l,
680 testsuite/gas/i386/inval-avx.l,
681 testsuite/gas/i386/inval-avx512f.l: Adjust expectations.
682 * testsuite/gas/i386/avx512vl-ambig.s,
683 testsuite/gas/i386/avx512vl-ambig.l: New.
684 * testsuite/gas/i386/i386.exp: Run new test.
685
af5c13b0
L
6862020-02-16 H.J. Lu <hongjiu.lu@intel.com>
687
688 * config/tc-i386.c (cpu_arch): Add .sse4a and nosse4a. Restore
689 nosse4.
690 * doc/c-i386.texi: Document sse4a and nosse4a.
691
07d98387
L
6922020-02-14 H.J. Lu <hongjiu.lu@intel.com>
693
694 * doc/c-i386.texi: Remove the old movsx and movzx documentation
695 for AT&T syntax.
696
65fca059
JB
6972020-02-14 Jan Beulich <jbeulich@suse.com>
698
699 PR gas/25438
700 * config/tc-i386.c (md_assemble): Move movsx/movzx special
701 casing ...
702 (process_suffix): ... here. Consider just the first operand
703 initially.
704 (check_long_reg): Drop opcode 0x63 special case again.
705 * testsuite/gas/i386/i386.s, testsuite/gas/i386/iamcu-1.s,
706 testsuite/gas/i386/ilp32/x86-64.s, testsuite/gas/i386/x86_64.s:
707 Move ambiguous operand size tests ...
708 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
709 testsuite/gas/i386/noreg64.s: ... here.
710 * testsuite/gas/i386/i386.d, testsuite/gas/i386/i386-intel.d
711 testsuite/gas/i386/iamcu-1.d, testsuite/gas/i386/ilp32/x86-64.d,
712 testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
713 testsuite/gas/i386/movx16.l, testsuite/gas/i386/movx32.l,
714 testsuite/gas/i386/movx64.l, testsuite/gas/i386/noreg16.d,
715 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
716 testsuite/gas/i386/x86-64-movsxd.d,
717 testsuite/gas/i386/x86-64-movsxd-intel.d,
718 testsuite/gas/i386/x86_64.d, testsuite/gas/i386/x86_64-intel.d:
719 Adjust expectations.
720 * testsuite/gas/i386/movx16.s, testsuite/gas/i386/movx16.l,
721 testsuite/gas/i386/movx32.s, testsuite/gas/i386/movx32.l,
722 testsuite/gas/i386/movx64.s, testsuite/gas/i386/movx64.l: New.
723 * testsuite/gas/i386/i386.exp: Run new tests.
724
b6773884
JB
7252020-02-14 Jan Beulich <jbeulich@suse.com>
726
727 * config/tc-i386.c (process_operands): Also skip segment
728 override prefix emission if it matches an already present one.
729 * testsuite/gas/i386/prefix32.s: Add double segment override
730 cases.
731 * testsuite/gas/i386/prefix32.l: Adjust expectations.
732
92334ad2
JB
7332020-02-14 Jan Beulich <jbeulich@suse.com>
734
735 * config/tc-i386.c (process_operands): Drop ineffectual segment
736 overrides when optimizing.
737 * testsuite/gas/i386/lea-optimize.d: New.
738 * testsuite/gas/i386/i386.exp: Run new test.
739
7402020-02-14 Jan Beulich <jbeulich@suse.com>
514a8bb0
JB
741
742 * config/tc-i386.c (process_operands): Also check insn prefix
743 for ineffectual segment override warning. Don't cover possible
744 VEX/EVEX encoded insns there.
745 * testsuite/gas/i386/lea.s, testsuite/gas/i386/lea.d,
746 testsuite/gas/i386/lea.e: New.
747 * testsuite/gas/i386/i386.exp: Run new test.
748
0e6724de
L
7492020-02-14 H.J. Lu <hongjiu.lu@intel.com>
750
751 PR gas/25438
752 * doc/c-i386.texi: Document movsx, movsxd and movzx for AT&T
753 syntax.
754
292676c1
L
7552020-02-13 Fangrui Song <maskray@google.com>
756 H.J. Lu <hongjiu.lu@intel.com>
757
758 PR gas/25551
759 * config/tc-i386.c (tc_i386_fix_adjustable): Don't check
760 BFD_RELOC_386_PLT32 nor BFD_RELOC_X86_64_PLT32.
761 * testsuite/gas/i386/i386.exp: Run relax-5 and x86-64-relax-4.
762 * testsuite/gas/i386/relax-5.d: New file.
763 * testsuite/gas/i386/relax-5.s: Likewise.
764 * testsuite/gas/i386/x86-64-relax-4.d: Likewise.
765 * testsuite/gas/i386/x86-64-relax-4.s: Likewise.
766
7deea9aa
JB
7672020-02-13 Jan Beulich <jbeulich@suse.com>
768
769 * config/tc-i386.c (cpu_noarch): Use CPU_ANY_SSE4_FLAGS in
770 "nosse4" entry.
771
6c0946d0
JB
7722020-02-12 Jan Beulich <jbeulich@suse.com>
773
774 * config/tc-i386.c (avx512): New (at file scope), moved from
775 (check_VecOperands): ... here.
776 (process_suffix): Add [XYZ]MMword operand size handling.
777 * testsuite/gas/i386/avx512dq-inval.s: Add VFPCLASS tests.
778 * testsuite/gas/i386/noavx512-2.s: Add Intel syntax VFPCLASS
779 tests.
780 * testsuite/gas/i386/avx512dq-inval.l,
781 testsuite/gas/i386/noavx512-2.l: Adjust expectations.
782
5990e377
JB
7832020-02-12 Jan Beulich <jbeulich@suse.com>
784
785 PR gas/24546
786 * config/tc-i386.c (match_template): Apply AMD64 check to 64-bit
787 code only.
788 * config/tc-i386-intel.c (i386_intel_operand): Also handle
789 CALL/JMP in O_tbyte_ptr case.
790 * doc/c-i386.texi: Mention far call and full pointer load ISA
791 differences.
792 * testsuite/gas/i386/x86-64-branch-3.s,
793 testsuite/gas/i386/x86-64-intel64.s: Add 64-bit far call cases.
794 * testsuite/gas/i386/x86-64-branch-3.d,
795 testsuite/gas/i386/x86-64-intel64.d: Adjust expectations.
796 * testsuite/gas/i386/x86-64-branch-5.l,
797 testsuite/gas/i386/x86-64-branch-5.s: New.
798 * testsuite/gas/i386/i386.exp: Run new test.
799
9706160a
JB
8002020-02-12 Jan Beulich <jbeulich@suse.com>
801
802 PR gas/25438
803 * config/tc-i386.c (REGISTER_WARNINGS): Delete.
804 (check_byte_reg): Skip only source operand of CRC32. Drop Non-
805 64-bit-only warning.
806 (check_word_reg): Consistently error on mismatching register
807 size and suffix.
808 * testsuite/gas/i386/general.s: Replace dword GPR with word one
809 for movw. Replace suffix / GPR for orb.
810 * testsuite/gas/i386/inval.s: Add tests for movw with dword and
811 byte GPRs as well as ones for inb/outb with a word accumulator.
812 * testsuite/gas/i386/general.l, testsuite/gas/i386/intelbad.l,
813 testsuite/gas/i386/inval.l: Adjust expectations.
814
5de4d9ef
JB
8152020-02-12 Jan Beulich <jbeulich@suse.com>
816
817 * config/tc-i386.c (operand_type_register_match): Also fall
818 through initial two if()-s when the template allows for a GPR
819 operand. Adjust comment.
820
50128d0c
JB
8212020-02-11 Jan Beulich <jbeulich@suse.com>
822
823 (struct _i386_insn): New field "short_form".
824 (optimize_encoding): Drop setting of shortform field.
825 (process_suffix): Set i.short_form. Replace shortform use.
826 (process_operands): Replace shortform use.
827
1ed818b4
MM
8282020-02-11 Matthew Malcomson <matthew.malcomson@arm.com>
829
830 * config/tc-arm.c (vcx_handle_register_arguments): Remove `for`
831 loop initial declaration.
832
5aae9ae9
MM
8332020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
834
835 * config/tc-arm.c (NEON_MAX_TYPE_ELS): Increment to account for
836 instructions that can have 5 arguments.
837 (enum operand_parse_code): Add new operands.
838 (parse_operands): Account for new operands.
839 (S5): New macro.
840 (enum neon_shape_el): Introduce P suffixes for coprocessor.
841 (neon_select_shape): Account for P suffix.
842 (LOW1): Move macro to global position.
843 (HI4): Move macro to global position.
844 (vcx_assign_vec_d): New.
845 (vcx_assign_vec_m): New.
846 (vcx_assign_vec_n): New.
847 (enum vcx_reg_type): New.
848 (vcx_get_reg_type): New.
849 (vcx_size_pos): New.
850 (vcx_vec_pos): New.
851 (vcx_handle_shape): New.
852 (vcx_ensure_register_in_range): New.
853 (vcx_handle_register_arguments): New.
854 (vcx_handle_insn_block): New.
855 (vcx_handle_common_checks): New.
856 (do_vcx1): New.
857 (do_vcx2): New.
858 (do_vcx3): New.
859 * testsuite/gas/arm/cde-missing-fp.d: New test.
860 * testsuite/gas/arm/cde-missing-fp.l: New test.
861 * testsuite/gas/arm/cde-missing-mve.d: New test.
862 * testsuite/gas/arm/cde-missing-mve.l: New test.
863 * testsuite/gas/arm/cde-mve-or-neon.d: New test.
864 * testsuite/gas/arm/cde-mve-or-neon.s: New test.
865 * testsuite/gas/arm/cde-mve.s: New test.
866 * testsuite/gas/arm/cde-warnings.l:
867 * testsuite/gas/arm/cde-warnings.s:
868 * testsuite/gas/arm/cde.d:
869 * testsuite/gas/arm/cde.s:
870
4934a27c
MM
8712020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
872 Matthew Malcomson <matthew.malcomson@arm.com>
873
874 * config/tc-arm.c (arm_ext_cde*): New feature sets for each
875 CDE coprocessor that can be enabled.
876 (enum pred_instruction_type): New pred type.
877 (BAD_NO_VPT): New error message.
878 (BAD_CDE): New error message.
879 (BAD_CDE_COPROC): New error message.
880 (enum operand_parse_code): Add new immediate operands.
881 (parse_operands): Account for new immediate operands.
882 (check_cde_operand): New.
883 (cde_coproc_enabled): New.
884 (cde_coproc_pos): New.
885 (cde_handle_coproc): New.
886 (cxn_handle_predication): New.
887 (do_custom_instruction_1): New.
888 (do_custom_instruction_2): New.
889 (do_custom_instruction_3): New.
890 (do_cx1): New.
891 (do_cx1a): New.
892 (do_cx1d): New.
893 (do_cx1da): New.
894 (do_cx2): New.
895 (do_cx2a): New.
896 (do_cx2d): New.
897 (do_cx2da): New.
898 (do_cx3): New.
899 (do_cx3a): New.
900 (do_cx3d): New.
901 (do_cx3da): New.
902 (handle_pred_state): Define new IT block behaviour.
903 (insns): Add newn CX*{,d}{,a} instructions.
904 (CDE_EXTENSIONS,armv8m_main_ext_table,armv8_1m_main_ext_table):
905 Define new cdecp extension strings.
906 * doc/c-arm.texi: Document new cdecp extension arguments.
907 * testsuite/gas/arm/cde-scalar.d: New test.
908 * testsuite/gas/arm/cde-scalar.s: New test.
909 * testsuite/gas/arm/cde-warnings.d: New test.
910 * testsuite/gas/arm/cde-warnings.l: New test.
911 * testsuite/gas/arm/cde-warnings.s: New test.
912 * testsuite/gas/arm/cde.d: New test.
913 * testsuite/gas/arm/cde.s: New test.
914
4b5aaf5f
L
9152020-02-10 H.J. Lu <hongjiu.lu@intel.com>
916
917 PR gas/25516
918 * config/tc-i386.c (intel64): Renamed to ...
919 (isa64): This.
920 (match_template): Accept Intel64 only instruction by default.
921 (i386_displacement): Updated.
922 (md_parse_option): Updated.
923 * c-i386.texi: Update -mamd64/-mintel64 documentation.
924 * testsuite/gas/i386/i386.exp: Run x86-64-sysenter. Pass
925 -mamd64 to x86-64-sysenter-amd.
926 * testsuite/gas/i386/x86-64-sysenter.d: New file.
927
33176d91
AM
9282020-02-10 Alan Modra <amodra@gmail.com>
929
930 * config/obj-elf.c (obj_elf_change_section): Error for section
931 type, attr or entsize changes in assembly.
932 * testsuite/gas/elf/elf.exp: Pass -Z to gas for section5 test.
933 * testsuite/gas/elf/section5.l: Update.
934
82194874
AM
9352020-02-10 Alan Modra <amodra@gmail.com>
936
937 * output-file.c (output_file_close): Do a normal close when
938 flag_always_generate_output.
939 * write.c (write_object_file): Don't stop output when
940 flag_always_generate_output.
941
9fc0b501
SB
9422020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
943
944 PR 25469
945 * config/tc-z80.c: Add -gbz80 command line option to generate code
946 for the GameBoy Z80. Add support for generating DWARF.
947 * config/tc-z80.h: Add support for DWARF debug information
948 generation.
949 * doc/c-z80.texi: Document new command line option.
950 * testsuite/gas/z80/gbz80_all.d: New file.
951 * testsuite/gas/z80/gbz80_all.s: New file.
952 * testsuite/gas/z80/z80.exp: Run the new tests.
953 * testsuite/gas/z80/z80n_all.d: New file.
954 * testsuite/gas/z80/z80n_all.s: New file.
955 * testsuite/gas/z80/z80n_reloc.d: New file.
956
b7d07216
L
9572020-02-06 H.J. Lu <hongjiu.lu@intel.com>
958
959 PR gas/25381
960 * config/obj-elf.c (get_section): Also check
961 linked_to_symbol_name.
962 (obj_elf_change_section): Also set map_head.linked_to_symbol_name.
963 (obj_elf_parse_section_letters): Handle the 'o' flag.
964 (build_group_lists): Renamed to ...
965 (build_additional_section_info): This. Set elf_linked_to_section
966 from map_head.linked_to_symbol_name.
967 (elf_adjust_symtab): Updated.
968 * config/obj-elf.h (elf_section_match): Add linked_to_symbol_name.
969 * doc/as.texi: Document the 'o' flag.
970 * testsuite/gas/elf/elf.exp: Run PR gas/25381 tests.
971 * testsuite/gas/elf/section18.d: New file.
972 * testsuite/gas/elf/section18.s: Likewise.
973 * testsuite/gas/elf/section19.d: Likewise.
974 * testsuite/gas/elf/section19.s: Likewise.
975 * testsuite/gas/elf/section20.d: Likewise.
976 * testsuite/gas/elf/section20.s: Likewise.
977 * testsuite/gas/elf/section21.d: Likewise.
978 * testsuite/gas/elf/section21.l: Likewise.
979 * testsuite/gas/elf/section21.s: Likewise.
980
5eb617a7
L
9812020-02-06 H.J. Lu <hongjiu.lu@intel.com>
982
983 * NEWS: Mention x86 assembler options to align branches for
984 binutils 2.34.
985
986ac314
L
9862020-02-06 H.J. Lu <hongjiu.lu@intel.com>
987
988 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique
989 only for ELF targets.
990 * testsuite/gas/i386/unique.d: Don't xfail.
991 * testsuite/gas/i386/x86-64-unique.d: Likewise.
992
19234a6d
AM
9932020-02-06 Alan Modra <amodra@gmail.com>
994
995 * testsuite/gas/i386/unique.d: xfail for non-elf targets.
996 * testsuite/gas/i386/x86-64-unique.d: Likewise.
997
02e0be69
AM
9982020-02-06 Alan Modra <amodra@gmail.com>
999
1000 * testsuite/gas/elf/section12a.d: Use supports_gnu_osabi in
1001 xfail, and rename test.
1002 * testsuite/gas/elf/section12b.d: Likewise.
1003 * testsuite/gas/elf/section16a.d: Likewise.
1004 * testsuite/gas/elf/section16b.d: Likewise.
1005
a8c4d40b
L
10062020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1007
1008 PR gas/25380
1009 * config/obj-elf.c (section_match): Removed.
1010 (get_section): Also match SEC_ASSEMBLER_SECTION_ID and
1011 section_id.
1012 (obj_elf_change_section): Replace info and group_name arguments
1013 with match_p. Also update the section ID and flags from match_p.
1014 (obj_elf_section): Handle "unique,N". Update call to
1015 obj_elf_change_section.
1016 * config/obj-elf.h (elf_section_match): New.
1017 (obj_elf_change_section): Updated.
1018 * config/tc-arm.c (start_unwind_section): Update call to
1019 obj_elf_change_section.
1020 * config/tc-ia64.c (obj_elf_vms_common): Likewise.
1021 * config/tc-microblaze.c (microblaze_s_data): Likewise.
1022 (microblaze_s_sdata): Likewise.
1023 (microblaze_s_rdata): Likewise.
1024 (microblaze_s_bss): Likewise.
1025 * config/tc-mips.c (s_change_section): Likewise.
1026 * config/tc-msp430.c (msp430_profiler): Likewise.
1027 * config/tc-rx.c (parse_rx_section): Likewise.
1028 * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
1029 * doc/as.texi: Document "unique,N" in .section directive.
1030 * testsuite/gas/elf/elf.exp: Run "unique,N" tests.
1031 * testsuite/gas/elf/section15.d: New file.
1032 * testsuite/gas/elf/section15.s: Likewise.
1033 * testsuite/gas/elf/section16.s: Likewise.
1034 * testsuite/gas/elf/section16a.d: Likewise.
1035 * testsuite/gas/elf/section16b.d: Likewise.
1036 * testsuite/gas/elf/section17.d: Likewise.
1037 * testsuite/gas/elf/section17.l: Likewise.
1038 * testsuite/gas/elf/section17.s: Likewise.
1039 * testsuite/gas/i386/unique.d: Likewise.
1040 * testsuite/gas/i386/unique.s: Likewise.
1041 * testsuite/gas/i386/x86-64-unique.d: Likewise.
1042 * testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
1043
575d37ae
L
10442020-02-02 H.J. Lu <hongjiu.lu@intel.com>
1045
1046 * testsuite/gas/elf/section13.s: Replace @nobits with %nobits.
1047
2384096c
G
10482020-02-01 Anthony Green <green@moxielogic.com>
1049
1050 * config/tc-moxie.c (md_begin): Don't force big-endian mode.
1051
95441c43
SL
10522020-01-31 Sandra Loosemore <sandra@codesourcery.com>
1053
1054 * config/tc-nios2.c (nios2_cons): Handle %gotoff as well as
1055 %tls_ldo.
1056
d465d695
AV
10572020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
1058
1059 PR gas/25472
1060 * config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
1061 (armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
1062 +mve.
1063 * testsuite/gas/arm/mve_dsp.d: New test.
1064
d26cc8a9
NC
10652020-01-31 Nick Clifton <nickc@redhat.com>
1066
1067 * config/tc-s390.c (s390_elf_suffix): Return ELF_SUFFIX_NONE
1068 rather than BFD_RELOC_NONE.
1069
90e9955a
SP
10702020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
1071
1072 * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
1073 to support VLDMIA instruction for MVE.
1074 (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
1075 instruction for MVE.
1076 (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
1077 instruction for MVE.
1078 (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
1079 instruction for MVE.
1080 * testsuite/gas/arm/mve-ldst.d: New test.
1081 * testsuite/gas/arm/mve-ldst.s: Likewise.
1082
53943f32
NC
10832020-01-31 Nick Clifton <nickc@redhat.com>
1084
1085 * po/fr.po: Updated French translation.
1086 * po/ru.po: Updated Russian translation.
1087
c3036ed0
RS
10882020-01-31 Richard Sandiford <richard.sandiford@arm.com>
1089
1090 * testsuite/gas/aarch64/sve-bfloat-movprfx.s: Use .h rather than
1091 .s for the movprfx.
1092 * testsuite/gas/aarch64/sve-bfloat-movprfx.d: Update accordingly.
1093 * testsuite/gas/aarch64/sve-movprfx_28.d,
1094 * testsuite/gas/aarch64/sve-movprfx_28.l,
1095 * testsuite/gas/aarch64/sve-movprfx_28.s: New test.
1096
2ae4c703
JB
10972020-01-30 Jan Beulich <jbeulich@suse.com>
1098
1099 * config/tc-i386.c (output_disp): Tighten base_opcode check.
1100 * testsuite/gas/i386/got.s: Add LSL, MOVLPS, and BNDCN cases.
1101 * testsuite/gas/i386/got-no-relax.d, testsuite/gas/i386/got.d:
1102 Adjust expectations.
1103
bd434cc4
JM
11042020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
1105
1106 * testsuite/gas/bpf/alu.d: Update expected opcode for `neg'.
1107 * testsuite/gas/bpf/alu-be.d: Likewise.
1108 * testsuite/gas/bpf/alu32.d: Likewise for `neg32'.
1109 * testsuite/gas/bpf/alu32-be.d: Likewise.
1110
aeab2b26
JB
11112020-01-30 Jan Beulich <jbeulich@suse.com>
1112
1113 * testsuite/gas/i386/x86-64-branch-2.s,
1114 testsuite/gas/i386/x86-64-branch-4.s,
1115 testsuite/gas/i386/x86-64-branch.s: Add RETW cases.
1116 * testsuite/gas/i386/ilp32/x86-64-branch.d,
1117 testsuite/gas/i386/x86-64-branch-2.d,
1118 testsuite/gas/i386/x86-64-branch-4.l,
1119 testsuite/gas/i386/x86-64-branch.d: Adjust expectations.
1120
873494c8
JB
11212020-01-30 Jan Beulich <jbeulich@suse.com>
1122
1123 * config/tc-i386.c (process_suffix): .
1124 testsuite/gas/i386/noreg64.s: Add IRET and LRET cases.
1125 testsuite/gas/i386/x86-64-opcode.s: Add suffix to IRET and LRET.
1126 Add LRETQ case.
1127 testsuite/gas/i386/x86-64-suffix.s: Drop IRET case without
1128 suffix.
1129 testsuite/gas/i386/x86_64.s: Add RETF cases.
1130 * testsuite/gas/i386/k1om.d, testsuite/gas/i386/l1om.d,
1131 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l,
1132 testsuite/gas/i386/x86-64-opcode.d,
1133 testsuite/gas/i386/x86-64-suffix-intel.d,
1134 testsuite/gas/i386/x86-64-suffix.d,
1135 testsuite/gas/i386/x86_64-intel.d
1136 testsuite/gas/i386/x86_64.d: Adjust expectations.
1137 * testsuite/gas/i386/x86-64-suffix.e,
1138 testsuite/gas/i386/x86_64.e: New.
1139
62b3f548
JB
11402020-01-30 Jan Beulich <jbeulich@suse.com>
1141
1142 * config/tc-i386.c (process_suffix): Redo and move FLDENV et al
1143 special case.
1144
bc31405e
L
11452020-01-27 H.J. Lu <hongjiu.lu@intel.com>
1146
1147 PR binutils/25445
1148 * config/tc-i386.c (check_long_reg): Also convert to QWORD for
1149 movsxd.
1150 * doc/c-i386.texi: Add a node for AMD64 vs. Intel64 ISA
1151 differences. Document movslq and movsxd.
1152 * testsuite/gas/i386/i386.exp: Run PR binutils/25445 tests.
1153 * testsuite/gas/i386/x86-64-movsxd-intel.d: New file.
1154 * testsuite/gas/i386/x86-64-movsxd-intel64-intel.d: Likewise.
1155 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.l: Likewise.
1156 * testsuite/gas/i386/x86-64-movsxd-intel64-inval.s: Likewise.
1157 * testsuite/gas/i386/x86-64-movsxd-intel64.d: Likewise.
1158 * testsuite/gas/i386/x86-64-movsxd-intel64.s: Likewise.
1159 * testsuite/gas/i386/x86-64-movsxd-inval.l: Likewise.
1160 * testsuite/gas/i386/x86-64-movsxd-inval.s: Likewise.
1161 * testsuite/gas/i386/x86-64-movsxd.d: Likewise.
1162 * testsuite/gas/i386/x86-64-movsxd.s: Likewise.
1163
e3696f67
AM
11642020-01-27 Alan Modra <amodra@gmail.com>
1165
1166 * testsuite/gas/all/gas.exp: Replace case statements with switch
1167 statements.
1168 * testsuite/gas/elf/elf.exp: Likewise.
1169 * testsuite/gas/macros/macros.exp: Likewise.
1170 * testsuite/lib/gas-defs.exp: Likewise.
1171
7568c93b
TC
11722020-01-27 Tamar Christina <tamar.christina@arm.com>
1173
1174 PR 25403
1175 * testsuite/gas/aarch64/armv8_4-a.d: Add cfinv.
1176 * testsuite/gas/aarch64/armv8_4-a.s: Likewise.
1177
403d1bd9
JW
11782020-01-22 Maxim Blinov <maxim.blinov@embecosm.com>
1179
1180 * testsuite/gas/riscv/march-ok-s.d: sx is no longer valid and
1181 s exts must be known, so rename *ok* to *fail*.
1182 * testsuite/gas/riscv/march-ok-sx.d: Likewise.
1183 * testsuite/gas/riscv/march-ok-s-with-version: Likewise.
1184 * testsuite/gas/riscv/march-fail-s.l: Expected error messages for
1185 above change.
1186 * testsuite/gas/riscv/march-fail-sx.l: Likewise.
1187 * testsuite/gas/riscv/march-fail-sx-with-version.l: Likewise.
1188
be4c5e58
L
11892020-01-22 H.J. Lu <hongjiu.lu@intel.com>
1190
1191 PR gas/25438
1192 * config/tc-i386.c (check_long_reg): Always disallow double word
1193 suffix in mnemonic with word general register.
1194 * testsuite/gas/i386/general.s: Replace word general register
1195 with double word general register for movl.
1196 * testsuite/gas/i386/inval.s: Add tests for movl with word general
1197 register.
1198 * testsuite/gas/i386/general.l: Updated.
1199 * testsuite/gas/i386/inval.l: Likewise.
1200
9e7028aa
AM
12012020-01-22 Alan Modra <amodra@gmail.com>
1202
1203 * config/tc-ppc.c (parse_tls_arg): Handle tls arg for
1204 __tls_get_addr_desc and __tls_get_addr_opt.
1205
e3ed17f3
JB
12062020-01-21 Jan Beulich <jbeulich@suse.com>
1207
1208 * testsuite/gas/i386/inval-crc32.s,
1209 testsuite/gas/i386/x86-64-inval-crc32.s: Add alignment directive.
1210 * testsuite/gas/i386/inval-crc32.l,
1211 testsuite/gas/i386/x86-64-inval-crc32.l: Adjust expectations.
1212
1a035124
JB
12132020-01-21 Jan Beulich <jbeulich@suse.com>
1214
1215 * config/tc-i386.c (process_suffix): Merge CRC32 handling into
1216 generic code path. Deal with No_lSuf being set in a template.
1217 * testsuite/gas/i386/inval-crc32.l,
1218 testsuite/gas/i386/x86-64-inval-crc32.l: Expect warning(s)
1219 instead of error(s) when operand size is ambiguous.
1220 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1221 testsuite/gas/i386/noreg64.s: Add CRC32 tests.
1222 * testsuite/gas/i386/noreg16.d, testsuite/gas/i386/noreg16.l,
1223 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg32.l,
1224 testsuite/gas/i386/noreg64.d, testsuite/gas/i386/noreg64.l:
1225 Adjust expectations.
1226
c006a730
JB
12272020-01-21 Jan Beulich <jbeulich@suse.com>
1228
1229 * config/tc-i386.c (process_suffix): Drop SYSRET special case
1230 and an intel_syntax check. Re-write lack-of-suffix processing
1231 logic.
1232 * doc/c-i386.texi: Document operand size defaults for suffix-
1233 less AT&T syntax insns.
1234 * testsuite/gas/i386/bundle.s, testsuite/gas/i386/lock-1.s,
1235 testsuite/gas/i386/opcode.s, testsuite/gas/i386/sse3.s,
1236 testsuite/gas/i386/x86-64-avx-scalar.s,
1237 testsuite/gas/i386/x86-64-avx.s,
1238 testsuite/gas/i386/x86-64-bundle.s,
1239 testsuite/gas/i386/x86-64-intel64.s,
1240 testsuite/gas/i386/x86-64-lock-1.s,
1241 testsuite/gas/i386/x86-64-opcode.s,
1242 testsuite/gas/i386/x86-64-sse2avx.s,
1243 testsuite/gas/i386/x86-64-sse3.s: Add missing suffixes.
1244 * testsuite/gas/i386/nops.s, testsuite/gas/i386/sse-noavx.s,
1245 testsuite/gas/i386/x86-64-nops.s,
1246 testsuite/gas/i386/x86-64-ptwrite.s,
1247 testsuite/gas/i386/x86-64-simd.s,
1248 testsuite/gas/i386/x86-64-sse-noavx.s,
1249 testsuite/gas/i386/x86-64-suffix.s: Drop bogus suffix-less
1250 insns.
1251 * testsuite/gas/i386/noreg16.s, testsuite/gas/i386/noreg32.s,
1252 testsuite/gas/i386/noreg64.s: Add further tests.
1253 * testsuite/gas/i386/ilp32/x86-64-nops.d,
1254 testsuite/gas/i386/nops.d, testsuite/gas/i386/noreg16.d,
1255 testsuite/gas/i386/noreg32.d, testsuite/gas/i386/noreg64.d,
1256 testsuite/gas/i386/sse-noavx.d,
1257 testsuite/gas/i386/x86-64-intel64.d,
1258 testsuite/gas/i386/x86-64-nops.d,
1259 testsuite/gas/i386/x86-64-opcode.d,
1260 testsuite/gas/i386/x86-64-ptwrite-intel.d,
1261 testsuite/gas/i386/x86-64-ptwrite.d,
1262 testsuite/gas/i386/x86-64-simd-intel.d,
1263 testsuite/gas/i386/x86-64-simd-suffix.d,
1264 testsuite/gas/i386/x86-64-simd.d,
1265 testsuite/gas/i386/x86-64-sse-noavx.d
1266 testsuite/gas/i386/x86-64-suffix.d,
1267 testsuite/gas/i386/x86-64-suffix-intel.d: Adjust expectations.
1268 * testsuite/gas/i386/noreg16.l, testsuite/gas/i386/noreg32.l,
1269 testsuite/gas/i386/noreg64.l: New.
1270 * testsuite/gas/i386/i386.exp: Run new tests.
1271
c906a69a
JB
12722020-01-21 Jan Beulich <jbeulich@suse.com>
1273
1274 * testsuite/gas/i386/avx512_bf16_vl.s,
1275 testsuite/gas/i386/x86-64-avx512_bf16_vl.s: Add broadcast forms
1276 of VCVTNEPS2BF16{X,Y}. Add operand-size less Intel syntax
1277 broadcast forms of VCVTNEPS2BF16.
1278 * testsuite/gas/i386/avx512_bf16_vl.d,
1279 testsuite/gas/i386/x86-64-avx512_bf16_vl.d: Adjust expectations.
1280
26916852
NC
12812020-01-20 Nick Clifton <nickc@redhat.com>
1282
1283 * po/uk.po: Updated Ukranian translation.
1284
14470f07
L
12852020-01-20 H.J. Lu <hongjiu.lu@intel.com>
1286
1287 PR ld/25416
1288 * config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
1289 for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
1290 x32 object.
1291 * testsuite/gas/i386/ilp32/x32-tls.d: Updated.
1292 * testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
1293 R_X86_64_GOTPC32_TLSDESC relocation.
1294
1b1bb2c6
NC
12952020-01-18 Nick Clifton <nickc@redhat.com>
1296
1297 * configure: Regenerate.
1298 * po/gas.pot: Regenerate.
1299
ae774686
NC
13002020-01-18 Nick Clifton <nickc@redhat.com>
1301
1302 Binutils 2.34 branch created.
1303
42e04b36
L
13042020-01-17 H.J. Lu <hongjiu.lu@intel.com>
1305
1306 * config/tc-i386.c (_i386_insn): Replace vex_encoding_vex2
1307 with vex_encoding_vex.
1308 (parse_insn): Likewise.
1309 * doc/c-i386.texi: Replace {vex2} with {vex}. Update {vex}
1310 and {vex3} documentation.
1311 * testsuite/gas/i386/pseudos.s: Replace 3 {vex2} tests with
1312 {vex}.
1313 * testsuite/gas/i386/x86-64-pseudos.s: Likewise.
1314
2da2eaf4
AV
13152020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
1316
1317 PR 25376
1318 * config/tc-arm.c (mve_ext, mve_fp_ext): Use CORE_HIGH.
1319 (armv8_1m_main_ext_table): Use CORE_HIGH for mve.
1320 * testsuite/arm/armv8_1-m-fpu-mve-1.s: New.
1321 * testsuite/arm/armv8_1-m-fpu-mve-1.d: New.
1322 * testsuite/arm/armv8_1-m-fpu-mve-2.s: New.
1323 * testsuite/arm/armv8_1-m-fpu-mve-2.d: New.
1324
45a4bb20
JB
13252020-01-16 Jan Beulich <jbeulich@suse.com>
1326
1327 * config/tc-i386.c (match_template): Drop found_cpu_match local
1328 variable.
1329
4814632e
JB
13302020-01-16 Jan Beulich <jbeulich@suse.com>
1331
1332 * testsuite/gas/i386/avx512dq-inval.l,
1333 testsuite/gas/i386/avx512dq-inval.s: New.
1334 * testsuite/gas/i386/i386.exp: Run new test.
1335
131cb553
JL
13362020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
1337
1338 * config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
1339 relocations when the target is 430X, except when extracting part of an
1340 expression.
1341 (msp430_srcoperand): Adjust comment.
1342 Initialize the expp member of the msp430_operand_s struct as
1343 appropriate.
1344 (msp430_dstoperand): Likewise.
1345 * testsuite/gas/msp430/msp430.exp: Run new test.
1346 * testsuite/gas/msp430/reloc-lo-430x.d: New test.
1347 * testsuite/gas/msp430/reloc-lo-430x.s: New test.
1348
c24d0e8d
AM
13492020-01-15 Alan Modra <amodra@gmail.com>
1350
1351 * configure.tgt: Add sparc-*-freebsd case.
1352
e44925ae
LC
13532020-01-14 Lili Cui <lili.cui@intel.com>
1354
1355 * testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
1356 * testsuite/gas/i386/align-branch-1b.d: Likewise.
1357 * testsuite/gas/i386/align-branch-1c.d: Likewise.
1358 * testsuite/gas/i386/align-branch-1d.d: Likewise.
1359 * testsuite/gas/i386/align-branch-1e.d: Likewise.
1360 * testsuite/gas/i386/align-branch-1f.d: Likewise.
1361 * testsuite/gas/i386/align-branch-1g.d: Likewise.
1362 * testsuite/gas/i386/align-branch-1h.d: Likewise.
1363 * testsuite/gas/i386/align-branch-1i.d: Likewise.
1364 * testsuite/gas/i386/align-branch-5.d: Likewise.
1365 * testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
1366 * testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
1367 * testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
1368 * testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
1369 * testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
1370 * testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
1371 * testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
1372 * testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
1373 * testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
1374 * testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
1375 * testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
1376 x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
1377
7a6bf3be
SB
13782020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
1379
1380 PR 25377
1381 * config/tc-z80.c: Add support for half precision, single
1382 precision and double precision floating point values.
1383 * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
1384 * doc/as.texi: Add new z80 command line options.
1385 * doc/c-z80.texi: Document new z80 command line options.
1386 * testsuite/gas/z80/ez80_pref_dis.s: New test.
1387 * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
1388 * testsuite/gas/z80/z80.exp: Run the new test.
1389 * testsuite/gas/z80/fp_math48.d: Use correct command line option.
1390 * testsuite/gas/z80/fp_zeda32.d: Likewise.
1391 * testsuite/gas/z80/strings.d: Update expected output.
1392
82e9597c
MM
13932020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
1394
1395 * config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
1396 dependency.
1397
5e4f7e05
CZ
13982020-01-13 Claudiu Zissulescu <claziss@gmail.com>
1399
1400 * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
1401 the CPU.
1402 * config/tc-arc.h: Add header if/defs.
1403 * testsuite/gas/arc/pseudos.d: Improve matching pattern.
1404
febda64f
AM
14052020-01-13 Alan Modra <amodra@gmail.com>
1406
1407 * testsuite/gas/wasm32/allinsn.d: Update expected output.
1408
5496abe1
AM
14092020-01-13 Alan Modra <amodra@gmail.com>
1410
1411 * config/tc-tic4x.c (tic4x_operands_match): Correct tic3x trap
1412 insertion.
1413
ec4181f2
AM
14142020-01-10 Alan Modra <amodra@gmail.com>
1415
1416 * testsuite/gas/elf/pr14891.s: Don't start directives in first column.
1417 * testsuite/gas/elf/pr21661.d: Don't run on hpux.
1418
40c75bc8
SB
14192020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1420
1421 PR 25224
1422 * config/tc-z80.c (emit_ld_m_rr): Use integer types when checking
1423 opcode byte values.
1424 (emit_ld_r_r): Likewise.
1425 (emit_ld_rr_m): Likewise.
1426 (emit_ld_rr_nn): Likewise.
1427
72aea328
JB
14282020-01-09 Jan Beulich <jbeulich@suse.com>
1429
1430 * config/tc-i386.c (optimize_encoding): Add
1431 is_any_vex_encoding() invocations. Drop respective
1432 i.tm.extension_opcode == None checks.
1433
3f93af61
JB
14342020-01-09 Jan Beulich <jbeulich@suse.com>
1435
1436 * config/tc-i386.c (md_assemble): Check RegRex is clear during
1437 REX transformations. Correct comment indentation.
1438
7697afb6
JB
14392020-01-09 Jan Beulich <jbeulich@suse.com>
1440
1441 * config/tc-i386.c (optimize_encoding): Generalize register
1442 transformation for TEST optimization.
1443
d835a58b
JB
14442020-01-09 Jan Beulich <jbeulich@suse.com>
1445
1446 * testsuite/gas/i386/x86-64-sysenter-amd.s,
1447 testsuite/gas/i386/x86-64-sysenter-amd.d,
1448 testsuite/gas/i386/x86-64-sysenter-amd.l,
1449 testsuite/gas/i386/x86-64-sysenter-intel.d,
1450 testsuite/gas/i386/x86-64-sysenter-mixed.d: New.
1451 * testsuite/gas/i386/i386.exp: Run new tests.
1452
915808f6
NC
14532020-01-08 Nick Clifton <nickc@redhat.com>
1454
1455 PR 25284
1456 * doc/as.texi (Align): Document the fact that all arguments can be
1457 omitted.
1458 (Balign): Likewise.
1459 (P2align): Likewise.
1460
f1f28025
NC
14612020-01-08 Nick Clifton <nickc@redhat.com>
1462
1463 PR 14891
1464 * config/obj-elf.c (obj_elf_section): Fail if the section name is
1465 already defined as a different symbol type.
1466 * testsuite/gas/elf/pr14891.s: New test source file.
1467 * testsuite/gas/elf/pr14891.d: New test driver.
1468 * testsuite/gas/elf/pr14891.s: New test expected error output.
1469 * testsuite/gas/elf/elf.exp: Run the new test.
1470
030a2e78
AM
14712020-01-08 Alan Modra <amodra@gmail.com>
1472
1473 * config/tc-z8k.c (md_begin): Make idx unsigned.
1474 (get_specific): Likewise for this_index.
1475
2a1ebfb2
CZ
14762020-01-07 Claudiu Zissulescu <claziss@synopsys.com>
1477
1478 * onfig/tc-arc.c (parse_reloc_symbol): New function.
1479 (tokenize_arguments): Clean up, use parse_reloc_symbol function.
1480 (md_operand): Set X_md to absent.
1481 (arc_parse_name): Check for X_md.
1482
16d87673
SB
14832020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1484
1485 PR 25311
1486 * as.h (TC_STRING_ESCAPES): Provide a default definition.
1487 * app.c (do_scrub_chars): Use TC_STRING_ESCAPES instead of
1488 NO_STRING_ESCAPES.
1489 * read.c (next_char_of_string): Likewise.
1490 * config/tc-ppc.h (TC_STRING_ESCAPES): Define.
1491 * config/tc-z80.h (TC_STRING_ESCAPES): Define.
1492
a2322019
NC
14932020-01-03 Nick Clifton <nickc@redhat.com>
1494
1495 * po/sv.po: Updated Swedish translation.
1496
5437a02a
JB
14972020-01-03 Jan Beulich <jbeulich@suse.com>
1498
1499 * testsuite/gas/aarch64/f64mm.s: Scale index of LD1RO{H,W,D}.
1500 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1501
567dfba2
JB
15022020-01-03 Jan Beulich <jbeulich@suse.com>
1503
1504 * testsuite/gas/aarch64/i8mm.s: Add 128-bit form tests for
1505 by-element usdot. Add 64-bit form tests for by-element sudot.
1506 * testsuite/gas/aarch64/i8mm.d: Adjust expectations.
1507
8c45011a
JB
15082020-01-03 Jan Beulich <jbeulich@suse.com>
1509
1510 * testsuite/gas/aarch64/f64mm.s: Drop 'i' from uzip<n>.
1511 * testsuite/gas/aarch64/f64mm.d: Adjust expectations.
1512
f4950f76
JB
15132020-01-03 Jan Beulich <jbeulich@suse.com>
1514
1515 * testsuite/gas/aarch64/f64mm.d,
1516 testsuite/gas/aarch64/sve-movprfx-mm.d: Adjust expectations.
1517
6655dba2
SB
15182020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
1519
1520 * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add
1521 support for assembler code generated by SDCC. Add new relocation
1522 types. Add z80-elf target support.
1523 * config/tc-z80.h: Add z80-elf target support. Enable dollar local
1524 labels. Local labels starts from ".L".
1525 * NEWS: Mention the new support.
1526 * testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
1527 * testsuite/gas/all/fwdexp.s: Likewise.
1528 * testsuite/gas/all/cond.l: Likewise.
1529 * testsuite/gas/all/cond.s: Likewise.
1530 * testsuite/gas/all/fwdexp.d: Likewise.
1531 * testsuite/gas/all/fwdexp.s: Likewise.
1532 * testsuite/gas/elf/section2.e-mips: Likewise.
1533 * testsuite/gas/elf/section2.l: Likewise.
1534 * testsuite/gas/elf/section2.s: Likewise.
1535 * testsuite/gas/macros/app1.d: Likewise.
1536 * testsuite/gas/macros/app1.s: Likewise.
1537 * testsuite/gas/macros/app2.d: Likewise.
1538 * testsuite/gas/macros/app2.s: Likewise.
1539 * testsuite/gas/macros/app3.d: Likewise.
1540 * testsuite/gas/macros/app3.s: Likewise.
1541 * testsuite/gas/macros/app4.d: Likewise.
1542 * testsuite/gas/macros/app4.s: Likewise.
1543 * testsuite/gas/macros/app4b.s: Likewise.
1544 * testsuite/gas/z80/suffix.d: Fix failure on ELF target.
1545 * testsuite/gas/z80/z80.exp: Add new tests
1546 * testsuite/gas/z80/dollar.d: New file.
1547 * testsuite/gas/z80/dollar.s: New file.
1548 * testsuite/gas/z80/ez80_adl_all.d: New file.
1549 * testsuite/gas/z80/ez80_adl_all.s: New file.
1550 * testsuite/gas/z80/ez80_adl_suf.d: New file.
1551 * testsuite/gas/z80/ez80_isuf.s: New file.
1552 * testsuite/gas/z80/ez80_z80_all.d: New file.
1553 * testsuite/gas/z80/ez80_z80_all.s: New file.
1554 * testsuite/gas/z80/ez80_z80_suf.d: New file.
1555 * testsuite/gas/z80/r800_extra.d: New file.
1556 * testsuite/gas/z80/r800_extra.s: New file.
1557 * testsuite/gas/z80/r800_ii8.d: New file.
1558 * testsuite/gas/z80/r800_z80_doc.d: New file.
1559 * testsuite/gas/z80/z180.d: New file.
1560 * testsuite/gas/z80/z180.s: New file.
1561 * testsuite/gas/z80/z180_z80_doc.d: New file.
1562 * testsuite/gas/z80/z80_doc.d: New file.
1563 * testsuite/gas/z80/z80_doc.s: New file.
1564 * testsuite/gas/z80/z80_ii8.d: New file.
1565 * testsuite/gas/z80/z80_ii8.s: New file.
1566 * testsuite/gas/z80/z80_in_f_c.d: New file.
1567 * testsuite/gas/z80/z80_in_f_c.s: New file.
1568 * testsuite/gas/z80/z80_op_ii_ld.d: New file.
1569 * testsuite/gas/z80/z80_op_ii_ld.s: New file.
1570 * testsuite/gas/z80/z80_out_c_0.d: New file.
1571 * testsuite/gas/z80/z80_out_c_0.s: New file.
1572 * testsuite/gas/z80/z80_reloc.d: New file.
1573 * testsuite/gas/z80/z80_reloc.s: New file.
1574 * testsuite/gas/z80/z80_sli.d: New file.
1575 * testsuite/gas/z80/z80_sli.s: New file.
1576
a65b5de6
SN
15772020-01-02 Szabolcs Nagy <szabolcs.nagy@arm.com>
1578
1579 * config/tc-arm.c (parse_reg_list): Use REG_TYPE_RN instead of
1580 REGLIST_RN.
1581
b14ce8bf
AM
15822020-01-01 Alan Modra <amodra@gmail.com>
1583
1584 Update year range in copyright notice of all files.
1585
0b114740 1586For older changes see ChangeLog-2019
3499769a 1587\f
0b114740 1588Copyright (C) 2020 Free Software Foundation, Inc.
3499769a
AM
1589
1590Copying and distribution of this file, with or without modification,
1591are permitted in any medium without royalty provided the copyright
1592notice and this notice are preserved.
1593
1594Local Variables:
1595mode: change-log
1596left-margin: 8
1597fill-column: 74
1598version-control: never
1599End:
This page took 0.322905 seconds and 4 git commands to generate.