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Add support for Andes NDS32:
[deliverable/binutils-gdb.git] / gas / ChangeLog
CommitLineData
35c08157
KLC		 12013-12-13 Kuan-Lin Chen <kuanlinchentw@gmail.com>
2 Wei-Cheng Wang <cole945@gmail.com>
3 Hsiang-Kai Wang <hsiangkai@gmail.com>
4 Hui-Wen Ni <sabrinanitw@gmail.com>
5
6 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nds32.c.
7 (TARGET_CPU_HFILES): Add config/tc-nds32.h.
8 * Makefile.in: Regenerate.
9 * configure.in (nds32): Add nds32 target extension config support.
10 * configure.tgt : Add case for nds32-*-elf* and nds32-*-linux*.
11 * configure: Regenerate.
12 * config/tc-nds32.c: New file for nds32.
13 * config/tc-nds32.h: New file for nds32.
14 * doc/Makefile.am (CPU_DOCS): Add c-nds32.texi.
15 * doc/Makefile.in: Regenerate.
16 * doc/as.texinfo: Add nds32 options.
17 * doc/all.texi: Set NDS32.
18 * doc/c-nds32.texi: New file dor nds32 document.
19 * NEWS: Announce Andes nds32 support.
20
f2c7d7ee
RM		 212013-12-10 Roland McGrath <mcgrathr@google.com>
22
23 * Makefile.am (install-exec-bindir): Prefix libtool invocation
24 with $(INSTALL_PROGRAM_ENV).
25 (install-exec-tooldir): Likewise.
26 * Makefile.in: Regenerate.
27
594d8fa8
MF		 282013-12-07 Mike Frysinger <vapier@gentoo.org>
29
30 * config/bfin-aux.h: Remove +x file mode.
31 * config/tc-epiphany.c: Likewise.
32 * config/tc-epiphany.h: Likewise.
33
c2a5914e
TG		 342013-12-03 Tristan Gingold <gingold@adacore.com>
35
36 * config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic
37 overflow on pointers.
38
9a73e520
YZ		 392013-11-19 Yufeng Zhang <yufeng.zhang@arm.com>
40
41 Revert
42
43 2013-11-19 Nick Clifton <nickc@redhat.com>
44
45 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
46 for deprecated system registers when parsing pstate fields.
47
03e621be
NC		 482013-11-19 Nick Clifton <nickc@redhat.com>
49
50 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
51 for deprecated system registers when parsing pstate fields.
52
a8d14a88
CM		 532013-11-19 Catherine Moore <clm@codesourcery.com>
54
55 * config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
56 (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
57 (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
58 (INSN_DMULT): Define.
59 (INSN_DMULTU): Define.
60 (insns_between): Detect PMC RM7000 errata.
61 (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
62 OPTION_NO_FIX_PMC_RM7000.
63 * doc/as.texinfo: Document new options.
64 * doc/c-mips.texi: Likewise.
03e621be 65
cf3f45fa
AM		 662013-11-19 Alexey Makhalov <makhaloff@gmail.com>
67
68 PR gas/16109
69 * app.c (do_scrub_chars): Only insert a newline character if
70 end-of-file has been reached.
71
c06ec724
L		 722013-11-18 H.J. Lu <hongjiu.lu@intel.com>
73
74 * config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
75 argument.
76
c9fb6e58
YZ		 772013-11-18 Renlin Li <Renlin.Li@arm.com>
78
79 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
80 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
81 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
82 (cpu_arch_ver): Likewise.
83 * doc/c-arm.texi: Document armv7ve.
84
18cf6de4
YZ		 852013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
86
87 * config/tc-aarch64.c (parse_sys_reg): Support
88 S2_<op1>_<Cn>_<Cm>_<op2>.
89
a203d9b7
YZ		 902013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
91
92 Revert
93
94 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
95
96 * config/tc-aarch64.c (set_other_error): New function.
97 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
98 the variable to which it points with 'o'.
99 (parse_operands): Update; check for write to read-only system
100 registers or read from write-only ones.
101
c3320543
L		 1022013-11-17 H.J. Lu <hongjiu.lu@intel.com>
103
104 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
105 indicate if instruction has the BND prefix. Return
106 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
107 bnd_prefix isn't zero.
108 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
109 if needed.
110 (output_jump): Update reloc call.
111 (output_interseg_jump): Likewise.
112 (output_disp): Likewise.
113 (output_imm): Likewise.
114 (x86_cons_fix_new): Likewise.
115 (lex_got): Add an argument, bnd_prefix, to indicate if
116 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
117 if needed.
118 (x86_cons): Update lex_got call.
119 (i386_immediate): Likewise.
120 (i386_displacement): Likewise.
121 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
122 BFD_RELOC_X86_64_PLT32_BND.
123 (tc_gen_reloc): Likewise.
124 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
125
75468c93
YZ		 1262013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
127
128 * config/tc-aarch64.c (set_other_error): New function.
129 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
130 the variable to which it points with 'o'.
131 (parse_operands): Update; check for write to read-only system
132 registers or read from write-only ones.
133
ad8ecc81
MZ		 1342013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
135
136 * config/tc-i386.c (check_VecOperands): Reorder checks.
137
b83a9376
CM		 1382013-11-11 Catherine Moore <clm@codesourcery.com>
139
140 * config/mips/tc-mips.c (convert_reg_type): Use
141 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
142 (reg_needs_delay): Likewise.
143 (insns_between): Likewise.
144
e2b5892e
JBG		 1452013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
146
147 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
148
49eec193
YZ		 1492013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
150
151 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
152 call aarch64_sys_reg_deprecated_p and warn about the deprecated
153 system registers.
154
68a64283
YZ		 1552013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
156
157 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
158
8db49cc2
WN		 1592013-11-05 Will Newton <will.newton@linaro.org>
160
161 PR gas/16103
162 * config/tc-aarch64.c (parse_operands): Avoid trying to
163 parse a vector register as an immediate.
164
e4630f71
JB		 1652013-11-04 Jan Beulich <jbeulich@suse.com>
166
167 * config/tc-i386.c (check_long_reg): Correct comment indentation.
168 (check_qword_reg): Correct comment and its indentation.
169 (check_word_reg): Extend comment and correct its indentation. Also
170 check for 64-bit register.
171
6911b7dc
AM		 1722013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
173
174 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
175 (ppc_elf_localentry): New function.
176 (ppc_force_relocation): Force relocs on all branches to localenty
177 symbols.
178 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
179
ee67d69a
AM		 1802013-10-30 Alan Modra <amodra@gmail.com>
181
182 * config/tc-ppc.c: Include elf/ppc64.h.
183 (ppc_abiversion): New variable.
184 (md_pseudo_table): Add .abiversion.
185 (ppc_elf_abiversion, ppc_elf_end): New functions.
186 * config/tc-ppc.h (md_end): Define.
187
f9c6b907
AM		 1882013-10-30 Alan Modra <amodra@gmail.com>
189
190 * config/tc-ppc.c (SEX16): Don't mask.
191 (REPORT_OVERFLOW_HI): Define as zero.
192 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
193 @tprel@high, and @tprel@higha modifiers.
194 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
195 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
196 Handle new relocs.
197 (md_apply_fix): Similarly.
198
9d5de888
CF		 1992013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
200
201 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
202 (fpr_write_mask): Test MSA registers.
203 (can_swap_branch_p): Check fpr write followed by fpr read.
204
3fc1d038
NC		 2052013-10-18 Nick Clifton <nickc@redhat.com>
206
207 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
208
56d438b1
CF		 2092013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
210 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
211
212 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
213 (md_longopts): Add mmsa and mno-msa.
214 (mips_ases): Add msa.
215 (RTYPE_MASK): Update.
216 (RTYPE_MSA): New define.
217 (OT_REG_ELEMENT): Replace with...
218 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
219 (mips_operand_token): Replace reg_element with index.
220 (mips_parse_argument_token): Treat vector indices as separate tokens.
221 Handle register indices.
222 (md_begin): Add MSA register names.
223 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
224 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
225 (match_mdmx_imm_reg_operand): Update accordingly.
226 (match_imm_index_operand): New function.
227 (match_reg_index_operand): New function.
228 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
229 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
230 (md_show_usage): Print -mmsa and -mno-msa.
231 * doc/as.texinfo: Document -mmsa and -mno-msa.
232 * doc/c-mips.texi: Document -mmsa and -mno-msa.
233 Document .set msa and .set nomsa.
234
b2e951ec
NC		 2352013-10-14 Nick Clifton <nickc@redhat.com>
236
237 * read.c (add_include_dir): Use xrealloc.
238 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
239 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
240
ae335a4e
SL		 2412013-10-13 Sandra Loosemore <sandra@codesourcery.com>
242
243 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
244 also test/refer to "sstatus". Reformat the warning message.
245
0e1c2434
SK		 2462013-10-10 Sean Keys <skeys@ipdatasys.com>
247
248 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
249
47cd3fa7
JB		 2502013-10-10 Jan Beulich <jbeulich@suse.com>
251
252 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
253 swapping for bndmk, bndldx, and bndstx.
254
6085f853
NC		 2552013-10-09 Nick Clifton <nickc@redhat.com>
256
b7b2bb1d
NC		 257 PR gas/16025
258 * config/tc-epiphany.c (md_convert_frag): Add missing break
259 statement.
260
6085f853
NC		 261 PR gas/16026
262 * config/tc-mn10200.c (md_convert_frag): Add missing break
263 statement.
264
cecf1424
JB		 2652013-10-08 Jan Beulich <jbeulich@suse.com>
266
267 * tc-i386.c (check_word_reg): Remove misplaced "else".
268 (check_long_reg): Restore symmetry with check_word_reg.
269
d3bfe16e
JB		 2702013-10-08 Jan Beulich <jbeulich@suse.com>
271
272 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
273 LR/PC check.
274
38d77545
NC		 2752013-10-08 Nick Clifton <nickc@redhat.com>
276
277 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
278 for "<foo>a". Issue error messages for unrecognised or corrrupt
279 size extensions.
280
fe8b4cc3
KT		 2812013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
282
283 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
284 possible.
285
c7b0bd56
SE		 2862013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
287
288 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
289 * doc/c-i386.texi: Add -march=bdver4 option.
290
cc9afea3
AM		 2912013-09-20 Alan Modra <amodra@gmail.com>
292
293 * configure: Regenerate.
294
58ca03a2
TG		 2952013-09-18 Tristan Gingold <gingold@adacore.com>
296
297 * NEWS: Add marker for 2.24.
298
ab905915
NC		 2992013-09-18 Nick Clifton <nickc@redhat.com>
300
301 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
302 (move_data): New variable.
303 (md_parse_option): Parse -md.
304 (msp430_section): New function. Catch references to the .bss or
305 .data sections and generate a special symbol for use by the libcrt
306 library.
307 (md_pseudo_table): Intercept .section directives.
308 (md_longopt): Add -md
309 (md_show_usage): Likewise.
310 (msp430_operands): Generate a warning message if a NOP is inserted
311 into the instruction stream.
312 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
313
f1c38003
SE		 3142013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
315
316 * config/tc-mips.c (mips_elf_final_processing): Set
ab905915 317 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
f1c38003 318
1d50d57c
WN		 3192013-09-16 Will Newton <will.newton@linaro.org>
320
321 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
322 disallowing element size 64 with interleave other than 1.
323
173d3447
CF		 3242013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
325
326 * config/tc-mips.c (match_insn): Set error when $31 is used for
327 bltzal* and bgezal*.
328
ac21e7da
TG		 3292013-09-04 Tristan Gingold <gingold@adacore.com>
330
331 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
332 symbols.
333
74db7efb
NC		 3342013-09-04 Roland McGrath <mcgrathr@google.com>
335
336 PR gas/15914
337 * config/tc-arm.c (T16_32_TAB): Add _udf.
338 (do_t_udf): New function.
339 (insns): Add "udf".
340
664a88c6
DD		 3412013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
342
343 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
344 assembler errors at correct position.
345
9aff4b7a
NC		 3462013-08-23 Yuri Chornoivan <yurchor@ukr.net>
347
348 PR binutils/15834
349 * config/tc-ia64.c: Fix typos.
350 * config/tc-sparc.c: Likewise.
351 * config/tc-z80.c: Likewise.
352 * doc/c-i386.texi: Likewise.
353 * doc/c-m32r.texi: Likewise.
354
4f2374c7
WN		 3552013-08-23 Will Newton <will.newton@linaro.org>
356
9aff4b7a 357 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
4f2374c7
WN		 358 for pre-indexed addressing modes.
359
b4e6cb80
AM		 3602013-08-21 Alan Modra <amodra@gmail.com>
361
362 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
363 range check label number for use with fb_low_counter array.
364
1661c76c
RS		 3652013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
366
367 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
368 (mips_parse_argument_token, validate_micromips_insn, md_begin)
369 (check_regno, match_float_constant, check_completed_insn, append_insn)
370 (match_insn, match_mips16_insn, match_insns, macro_start)
371 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
372 (mips16_ip, mips_set_option_string, md_parse_option)
373 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
374 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
375 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
376 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
377 Start error messages with a lower-case letter. Do not end error
378 messages with a period. Wrap long messages to 80 character-lines.
379 Use "cannot" instead of "can't" and "can not".
380
b0e6f033
RS		 3812013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
382
383 * config/tc-mips.c (imm_expr): Expand comment.
384 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
385 when populated.
386
e423441d
RS		 3872013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
388
389 * config/tc-mips.c (imm2_expr): Delete.
390 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
391
5e0dc5ba
RS		 3922013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
393
394 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
395 (macro): Remove M_DEXT and M_DINS handling.
396
60f20e8b
RS		 3972013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
398
399 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
400 lax_max with lax_match.
401 (match_int_operand): Update accordingly. Don't report an error
402 for !lax_match-only cases.
403 (match_insn): Replace more_alts with lax_match and use it to
404 initialize the mips_arg_info field. Add a complete_p parameter.
405 Handle implicit VU0 suffixes here.
406 (match_invalid_for_isa, match_insns, match_mips16_insns): New
407 functions.
408 (mips_ip, mips16_ip): Use them.
409
d436c1c2
RS		 4102013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
411
412 * config/tc-mips.c (match_expression): Report uses of registers here.
413 Add a "must be an immediate expression" error. Handle elided offsets
414 here rather than...
415 (match_int_operand): ...here.
416
1a00e612
RS		 4172013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
418
419 * config/tc-mips.c (mips_arg_info): Remove soft_match.
420 (match_out_of_range, match_not_constant): New functions.
421 (match_const_int): Remove fallback parameter and check for soft_match.
422 Use match_not_constant.
423 (match_mapped_int_operand, match_addiusp_operand)
424 (match_perf_reg_operand, match_save_restore_list_operand)
425 (match_mdmx_imm_reg_operand): Update accordingly. Use
426 match_out_of_range and set_insn_error* instead of as_bad.
427 (match_int_operand): Likewise. Use match_not_constant in the
428 !allows_nonconst case.
429 (match_float_constant): Report invalid float constants.
430 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
431 match_float_constant to check for invalid constants. Fail the
432 match if match_const_int or match_float_constant return false.
433 (mips_ip): Update accordingly.
434 (mips16_ip): Likewise. Undo null termination of instruction name
435 once lookup is complete.
436
e3de51ce
RS		 4372013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
438
439 * config/tc-mips.c (mips_insn_error_format): New enum.
440 (mips_insn_error): New struct.
441 (insn_error): Change to a mips_insn_error.
442 (clear_insn_error, set_insn_error_format, set_insn_error)
443 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
444 functions.
445 (mips_parse_argument_token, md_assemble, match_insn)
446 (match_mips16_insn): Use them instead of manipulating insn_error
447 directly.
448 (mips_ip, mips16_ip): Likewise. Simplify control flow.
449
97d87491
RS		 4502013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
451
452 * config/tc-mips.c (normalize_constant_expr): Move further up file.
453 (normalize_address_expr): Likewise.
454 (match_insn, match_mips16_insn): New functions, split out from...
455 (mips_ip, mips16_ip): ...here.
456
0f35dbc4
RS		 4572013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
458
459 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
460 OP_OPTIONAL_REG.
461 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
462 for optional operands.
463
27285eed
AM		 4642013-08-16 Alan Modra <amodra@gmail.com>
465
466 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
467 modifiers generally.
468
cbe02d4f
AM		 4692013-08-16 Alan Modra <amodra@gmail.com>
470
471 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
472
3c02c47f
DE		 4732013-08-14 David Edelsohn <dje.gcc@gmail.com>
474
475 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
476 argument as alignment.
477
4046d87a
NC		 4782013-08-09 Nick Clifton <nickc@redhat.com>
479
480 * config/tc-rl78.c (elf_flags): New variable.
481 (enum options): Add OPTION_G10.
482 (md_longopts): Add mg10.
483 (md_parse_option): Parse -mg10.
484 (rl78_elf_final_processing): New function.
485 * config/tc-rl78.c (tc_final_processing): Define.
486 * doc/c-rl78.texi: Document -mg10 option.
487
ee5734f0
RS		 4882013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
489
490 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
491 suffixes to be elided too.
492 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
493 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
494 to be omitted too.
495
13896403
RS		 4962013-08-05 John Tytgat <john@bass-software.com>
497
498 * po/POTFILES.in: Regenerate.
499
d6787ef9
EB		 5002013-08-05 Eric Botcazou <ebotcazou@adacore.com>
501 Konrad Eisele <konrad@gaisler.com>
502
503 * config/tc-sparc.c (sparc_arch_types): Add leon.
504 (sparc_arch): Move sparc4 around and add leon.
505 (sparc_target_format): Document -Aleon.
506 * doc/c-sparc.texi: Likewise.
507
da8bca91
RS		 5082013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
509
510 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
511
14daeee3
RS		 5122013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
513 Richard Sandiford <rdsandiford@googlemail.com>
514
515 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
516 (RWARN): Bump to 0x8000000.
517 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
518 (RTYPE_R5900_ACC): New register types.
519 (RTYPE_MASK): Include them.
520 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
521 macros.
522 (reg_names): Include them.
523 (mips_parse_register_1): New function, split out from...
524 (mips_parse_register): ...here. Add a channels_ptr parameter.
525 Look for VU0 channel suffixes when nonnull.
526 (reg_lookup): Update the call to mips_parse_register.
527 (mips_parse_vu0_channels): New function.
528 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
529 (mips_operand_token): Add a "channels" field to the union.
530 Extend the comment above "ch" to OT_DOUBLE_CHAR.
531 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
532 (mips_parse_argument_token): Handle channel suffixes here too.
533 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
534 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
535 Handle '#' formats.
536 (md_begin): Register $vfN and $vfI registers.
537 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
538 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
539 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
540 (match_vu0_suffix_operand): New function.
541 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
542 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
543 (mips_lookup_insn): New function.
544 (mips_ip): Use it. Allow "+K" operands to be elided at the end
545 of an instruction. Handle '#' sequences.
546
c0ebe874
RS		 5472013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
548
549 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
550 values and use it instead of sreg, treg, xreg, etc.
551
3ccad066
RS		 5522013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
553
554 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
555 and mips_int_operand_max.
556 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
557 Delete.
558 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
559 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
560 instead of mips16_immed_operand.
561
0acfaea6
RS		 5622013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
563
564 * config/tc-mips.c (mips16_macro): Don't use move_register.
565 (mips16_ip): Allow macros to use 'p'.
566
fc76e730
RS		 5672013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
568
569 * config/tc-mips.c (MAX_OPERANDS): New macro.
570 (mips_operand_array): New structure.
571 (mips_operands, mips16_operands, micromips_operands): New arrays.
572 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
573 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
574 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
575 (micromips_to_32_reg_q_map): Delete.
576 (insn_operands, insn_opno, insn_extract_operand): New functions.
577 (validate_mips_insn): Take a mips_operand_array as argument and
578 use it to build up a list of operands. Extend to handle INSN_MACRO
579 and MIPS16.
580 (validate_mips16_insn): New function.
581 (validate_micromips_insn): Take a mips_operand_array as argument.
582 Handle INSN_MACRO.
583 (md_begin): Initialize mips_operands, mips16_operands and
584 micromips_operands. Call validate_mips_insn and
585 validate_micromips_insn for macro instructions too.
586 Call validate_mips16_insn for MIPS16 instructions.
587 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
588 New functions.
589 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
590 them. Handle INSN_UDI.
591 (get_append_method): Use gpr_read_mask.
592
26545944
RS		 5932013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
594
595 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
596 flags for MIPS16 and non-MIPS16 instructions.
597 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
598 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
599 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
600 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
601 and non-MIPS16 instructions. Fix formatting.
602
85fcb30f
RS		 6032013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
604
605 * config/tc-mips.c (reg_needs_delay): Move later in file.
606 Use gpr_write_mask.
607 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
608
43234a1e
L		 6092013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
610 Alexander Ivchenko <alexander.ivchenko@intel.com>
611 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
612 Sergey Lega <sergey.s.lega@intel.com>
613 Anna Tikhonova <anna.tikhonova@intel.com>
614 Ilya Tocar <ilya.tocar@intel.com>
615 Andrey Turetskiy <andrey.turetskiy@intel.com>
616 Ilya Verbin <ilya.verbin@intel.com>
617 Kirill Yukhin <kirill.yukhin@intel.com>
618 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
619
620 * config/tc-i386-intel.c (O_zmmword_ptr): New.
621 (i386_types): Add zmmword.
622 (i386_intel_simplify_register): Allow regzmm.
623 (i386_intel_simplify): Handle zmmwords.
624 (i386_intel_operand): Handle RC/SAE, vector operations and
625 zmmwords.
626 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
627 (struct RC_Operation): New.
628 (struct Mask_Operation): New.
629 (struct Broadcast_Operation): New.
630 (vex_prefix): Size of bytes increased to 4 to support EVEX
631 encoding.
632 (enum i386_error): Add new error codes: unsupported_broadcast,
633 broadcast_not_on_src_operand, broadcast_needed,
634 unsupported_masking, mask_not_on_destination, no_default_mask,
635 unsupported_rc_sae, rc_sae_operand_not_last_imm,
636 invalid_register_operand, try_vector_disp8.
637 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
638 rounding, broadcast, memshift.
639 (struct RC_name): New.
640 (RC_NamesTable): New.
641 (evexlig): New.
642 (evexwig): New.
643 (extra_symbol_chars): Add '{'.
644 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
645 (i386_operand_type): Add regzmm, regmask and vec_disp8.
646 (match_mem_size): Handle zmmwords.
647 (operand_type_match): Handle zmm-registers.
648 (mode_from_disp_size): Handle vec_disp8.
649 (fits_in_vec_disp8): New.
650 (md_begin): Handle {} properly.
651 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
652 (build_vex_prefix): Handle vrex.
653 (build_evex_prefix): New.
654 (process_immext): Adjust to properly handle EVEX.
655 (md_assemble): Add EVEX encoding support.
656 (swap_2_operands): Correctly handle operands with masking,
657 broadcasting or RC/SAE.
658 (check_VecOperands): Support EVEX features.
659 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
660 (match_template): Support regzmm and handle new error codes.
661 (process_suffix): Handle zmmwords and zmm-registers.
662 (check_byte_reg): Extend to zmm-registers.
663 (process_operands): Extend to zmm-registers.
664 (build_modrm_byte): Handle EVEX.
665 (output_insn): Adjust to properly handle EVEX case.
666 (disp_size): Handle vec_disp8.
667 (output_disp): Support compressed disp8*N evex feature.
668 (output_imm): Handle RC/SAE immediates properly.
669 (check_VecOperations): New.
670 (i386_immediate): Handle EVEX features.
671 (i386_index_check): Handle zmmwords and zmm-registers.
672 (RC_SAE_immediate): New.
673 (i386_att_operand): Handle EVEX features.
674 (parse_real_register): Add a check for ZMM/Mask registers.
675 (OPTION_MEVEXLIG): New.
676 (OPTION_MEVEXWIG): New.
677 (md_longopts): Add mevexlig and mevexwig.
678 (md_parse_option): Handle mevexlig and mevexwig options.
679 (md_show_usage): Add description for mevexlig and mevexwig.
680 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
681 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
682
a0046408
L		 6832013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
684
685 * config/tc-i386.c (cpu_arch): Add .sha.
686 * doc/c-i386.texi: Document sha/.sha.
687
7e8b059b
L		 6882013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
689 Kirill Yukhin <kirill.yukhin@intel.com>
690 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
691
692 * config/tc-i386.c (BND_PREFIX): New.
693 (struct _i386_insn): Add new field bnd_prefix.
694 (add_bnd_prefix): New.
695 (cpu_arch): Add MPX.
696 (i386_operand_type): Add regbnd.
697 (md_assemble): Handle BND prefixes.
698 (parse_insn): Likewise.
699 (output_branch): Likewise.
700 (output_jump): Likewise.
701 (build_modrm_byte): Handle regbnd.
702 (OPTION_MADD_BND_PREFIX): New.
703 (md_longopts): Add entry for 'madd-bnd-prefix'.
704 (md_parse_option): Handle madd-bnd-prefix option.
705 (md_show_usage): Add description for madd-bnd-prefix
706 option.
707 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
708
7fa9fcb6
TG		 7092013-07-24 Tristan Gingold <gingold@adacore.com>
710
711 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
712 xcoff targets.
713
614eb277
AK		 7142013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
715
716 * config/tc-s390.c (s390_machine): Don't force the .machine
717 argument to lower case.
718
e673710a
KT		 7192013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
720
721 * config/tc-arm.c (s_arm_arch_extension): Improve error message
722 for invalid extension.
723
69091a2c
YZ		 7242013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
725
726 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
727 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
728 (aarch64_abi): New variable.
729 (ilp32_p): Change to be a macro.
730 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
731 (struct aarch64_option_abi_value_table): New struct.
732 (aarch64_abis): New table.
733 (aarch64_parse_abi): New function.
734 (aarch64_long_opts): Add entry for -mabi=.
735 * doc/as.texinfo (Target AArch64 options): Document -mabi.
736 * doc/c-aarch64.texi: Likewise.
737
faf786e6
NC		 7382013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
739
740 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
741 unsigned comparison.
742
f0c00282
NC		 7432013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
744
cbe02d4f 745 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
f0c00282 746 RX610.
cbe02d4f 747 * config/rx-parse.y: (rx_check_float_support): Add function to
f0c00282
NC		 748 check floating point operation support for target RX100 and
749 RX200.
cbe02d4f
AM		 750 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
751 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
752 RX200, RX600, and RX610
f0c00282 753
8c997c27
NC		 7542013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
755
756 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
757
8be59acb
NC		 7582013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
759
760 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
761 * doc/c-avr.texi: Likewise.
762
4a06e5a2
RS		 7632013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
764
765 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
766 error with older GCCs.
767 (mips16_macro_build): Dereference args.
768
a92713e6
RS		 7692013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
770
771 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
772 New functions, split out from...
773 (reg_lookup): ...here. Remove itbl support.
774 (reglist_lookup): Delete.
775 (mips_operand_token_type): New enum.
776 (mips_operand_token): New structure.
777 (mips_operand_tokens): New variable.
778 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
779 (mips_parse_arguments): New functions.
780 (md_begin): Initialize mips_operand_tokens.
781 (mips_arg_info): Add a token field. Remove optional_reg field.
782 (match_char, match_expression): New functions.
783 (match_const_int): Use match_expression. Remove "s" argument
784 and return a boolean result. Remove O_register handling.
785 (match_regno, match_reg, match_reg_range): New functions.
786 (match_int_operand, match_mapped_int_operand, match_msb_operand)
787 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
788 (match_addiusp_operand, match_clo_clz_dest_operand)
789 (match_lwm_swm_list_operand, match_entry_exit_operand)
790 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
791 (match_tied_reg_operand): Remove "s" argument and return a boolean
792 result. Match tokens rather than text. Update calls to
793 match_const_int. Rely on match_regno to call check_regno.
794 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
795 "arg" argument. Return a boolean result.
796 (parse_float_constant): Replace with...
797 (match_float_constant): ...this new function.
798 (match_operand): Remove "s" argument and return a boolean result.
799 Update calls to subfunctions.
800 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
801 rather than string-parsing routines. Update handling of optional
802 registers for token scheme.
803
89565f1b
RS		 8042013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
805
806 * config/tc-mips.c (parse_float_constant): Split out from...
807 (mips_ip): ...here.
808
3c14a432
RS		 8092013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
810
811 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
812 Delete.
813
364215c8
RS		 8142013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
815
816 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
817 (match_entry_exit_operand): New function.
818 (match_save_restore_list_operand): Likewise.
819 (match_operand): Use them.
820 (check_absolute_expr): Delete.
821 (mips16_ip): Rewrite main parsing loop to use mips_operands.
822
9e12b7a2
RS		 8232013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
824
825 * config/tc-mips.c: Enable functions commented out in previous patch.
826 (SKIP_SPACE_TABS): Move further up file.
827 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
828 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
829 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
830 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
831 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
832 (micromips_imm_b_map, micromips_imm_c_map): Delete.
833 (mips_lookup_reg_pair): Delete.
834 (macro): Use report_bad_range and report_bad_field.
835 (mips_immed, expr_const_in_range): Delete.
836 (mips_ip): Rewrite main parsing loop to use new functions.
837
a1d78564
RS		 8382013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
839
840 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
841 Change return type to bfd_boolean.
842 (report_bad_range, report_bad_field): New functions.
843 (mips_arg_info): New structure.
844 (match_const_int, convert_reg_type, check_regno, match_int_operand)
845 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
846 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
847 (match_addiusp_operand, match_clo_clz_dest_operand)
848 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
849 (match_pc_operand, match_tied_reg_operand, match_operand)
850 (check_completed_insn): New functions, commented out for now.
851
e077a1c8
RS		 8522013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
853
854 * config/tc-mips.c (insn_insert_operand): New function.
855 (macro_build, mips16_macro_build): Put null character check
856 in the for loop and convert continues to breaks. Use operand
857 structures to handle constant operands.
858
ab902481
RS		 8592013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
860
861 * config/tc-mips.c (validate_mips_insn): Move further up file.
862 Add insn_bits and decode_operand arguments. Use the mips_operand
863 fields to work out which bits an operand occupies. Detect double
864 definitions.
865 (validate_micromips_insn): Move further up file. Call into
866 validate_mips_insn.
867
2f8b73cc
RS		 8682013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
869
870 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
871
c8276761
RS		 8722013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
873
874 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
875 and "~".
876 (macro): Update accordingly.
877
77bd4346
RS		 8782013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
879
880 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
881 (imm_reloc): Delete.
882 (md_assemble): Remove imm_reloc handling.
883 (mips_ip): Update commentary. Use offset_expr and offset_reloc
884 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
885 Use a temporary array rather than imm_reloc when parsing
886 constant expressions. Remove imm_reloc initialization.
887 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
888 for the relaxable field. Use a relax_char variable to track the
889 type of this field. Remove imm_reloc initialization.
890
cc537e56
RS		 8912013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
892
893 * config/tc-mips.c (mips16_ip): Handle "I".
894
ba92f887
MR		 8952013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
896
897 * config/tc-mips.c (mips_flag_nan2008): New variable.
898 (options): Add OPTION_NAN enum value.
899 (md_longopts): Handle it.
900 (md_parse_option): Likewise.
901 (s_nan): New function.
902 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
903 (md_show_usage): Add -mnan.
904
905 * doc/as.texinfo (Overview): Add -mnan.
906 * doc/c-mips.texi (MIPS Opts): Document -mnan.
907 (MIPS NaN Encodings): New node. Document .nan directive.
908 (MIPS-Dependent): List the new node.
909
c1094734
TG		 9102013-07-09 Tristan Gingold <gingold@adacore.com>
911
912 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
913
0cbbe1b8
RS		 9142013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
915
916 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
917 for 'A' and assume that the constant has been elided if the result
918 is an O_register.
919
f2ae14a1
RS		 9202013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
921
922 * config/tc-mips.c (gprel16_reloc_p): New function.
923 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
924 BFD_RELOC_UNUSED.
925 (offset_high_part, small_offset_p): New functions.
926 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
927 register load and store macros, handle the 16-bit offset case first.
928 If a 16-bit offset is not suitable for the instruction we're
929 generating, load it into the temporary register using
930 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
931 M_L_DAB code once the address has been constructed. For double load
932 and store macros, again handle the 16-bit offset case first.
933 If the second register cannot be accessed from the same high
934 part as the first, load it into AT using ADDRESS_ADDI_INSN.
935 Fix the handling of LD in cases where the first register is the
936 same as the base. Also handle the case where the offset is
937 not 16 bits and the second register cannot be accessed from the
938 same high part as the first. For unaligned loads and stores,
939 fuse the offbits == 12 and old "ab" handling. Apply this handling
940 whenever the second offset needs a different high part from the first.
941 Construct the offset using ADDRESS_ADDI_INSN where possible,
942 for offbits == 16 as well as offbits == 12. Use offset_reloc
943 when constructing the individual loads and stores.
944 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
945 and offset_reloc before matching against a particular opcode.
946 Handle elided 'A' constants. Allow 'A' constants to use
947 relocation operators.
948
5c324c16
RS		 9492013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
950
951 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
952 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
953 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
954
23e69e47
RS		 9552013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
956
957 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
958 Require the msb to be <= 31 for "+s". Check that the size is <= 31
959 for both "+s" and "+S".
960
27c5c572
RS		 9612013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
962
963 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
964 (mips_ip, mips16_ip): Handle "+i".
965
e76ff5ab
RS		 9662013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
967
968 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
969 (micromips_to_32_reg_h_map): Rename to...
970 (micromips_to_32_reg_h_map1): ...this.
971 (micromips_to_32_reg_i_map): Rename to...
972 (micromips_to_32_reg_h_map2): ...this.
973 (mips_lookup_reg_pair): New function.
974 (gpr_write_mask, macro): Adjust after above renaming.
975 (validate_micromips_insn): Remove "mi" handling.
976 (mips_ip): Likewise. Parse both registers in a pair for "mh".
977
fa7616a4
RS		 9782013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
979
980 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
981 (mips_ip): Remove "+D" and "+T" handling.
982
fb798c50
AK		 9832013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
984
985 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
986 relocs.
987
2c0a3565
MS		 9882013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
989
4aa2c5e2
MS		 990 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
991
9922013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
993
2c0a3565
MS		 994 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
995 (aarch64_force_relocation): Likewise.
996
f40da81b
AM		 9972013-07-02 Alan Modra <amodra@gmail.com>
998
999 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
1000
81566a9b
MR		 10012013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
1002
1003 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
1004 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
1005 Replace @sc{mips16} with literal `MIPS16'.
1006 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
1007
a6bb11b2
YZ		 10082013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1009
1010 * config/tc-aarch64.c (reloc_table): Replace
1011 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
1012 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
1013 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
1014 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
1015 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
1016 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
1017 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
1018 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
1019 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
1020 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
1021 (aarch64_force_relocation): Likewise.
1022
cec5225b
YZ		 10232013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1024
1025 * config/tc-aarch64.c (ilp32_p): New static variable.
1026 (elf64_aarch64_target_format): Return the target according to the
1027 value of 'ilp32_p'.
1028 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
1029 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
1030 (aarch64_dwarf2_addr_size): New function.
1031 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
1032 (DWARF2_ADDR_SIZE): New define.
1033
e335d9cb
RS		 10342013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1035
1036 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
1037
18870af7
RS		 10382013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1039
1040 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
1041
833794fc
MR		 10422013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
1043
1044 * config/tc-mips.c (mips_set_options): Add insn32 member.
1045 (mips_opts): Initialize it.
1046 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
1047 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
1048 (md_longopts): Add "minsn32" and "mno-insn32" options.
1049 (is_size_valid): Handle insn32 mode.
1050 (md_assemble): Pass instruction string down to macro.
1051 (brk_fmt): Add second dimension and insn32 mode initializers.
1052 (mfhl_fmt): Likewise.
1053 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
1054 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
1055 (macro_build_jalr, move_register): Handle insn32 mode.
1056 (macro_build_branch_rs): Likewise.
1057 (macro): Handle insn32 mode.
1058 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
1059 (mips_ip): Handle insn32 mode.
1060 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
1061 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
1062 (mips_handle_align): Handle insn32 mode.
1063 (md_show_usage): Add -minsn32 and -mno-insn32.
1064
1065 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
1066 -mno-insn32 options.
1067 (-minsn32, -mno-insn32): New options.
1068 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
1069 options.
1070 (MIPS assembly options): New node. Document .set insn32 and
1071 .set noinsn32.
1072 (MIPS-Dependent): List the new node.
1073
d1706f38
NC		 10742013-06-25 Nick Clifton <nickc@redhat.com>
1075
1076 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1077 the PC in indirect addressing on 430xv2 parts.
1078 (msp430_operands): Add version test to hardware bug encoding
1079 restrictions.
1080
477330fc
RM		 10812013-06-24 Roland McGrath <mcgrathr@google.com>
1082
d996d970
RM		 1083 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1084 so it skips whitespace before it.
1085 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1086
477330fc
RM		 1087 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1088 (arm_reg_parse_multi): Skip whitespace first.
1089 (parse_reg_list): Likewise.
1090 (parse_vfp_reg_list): Likewise.
1091 (s_arm_unwind_save_mmxwcg): Likewise.
1092
24382199
NC		 10932013-06-24 Nick Clifton <nickc@redhat.com>
1094
1095 PR gas/15623
1096 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1097
c3678916
RS		 10982013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1099
1100 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1101
42429eac
RS		 11022013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1103
1104 * config/tc-mips.c: Assert that offsetT and valueT are at least
1105 8 bytes in size.
1106 (GPR_SMIN, GPR_SMAX): New macros.
1107 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1108
f3ded42a
RS		 11092013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1110
1111 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1112 conditions. Remove any code deselected by them.
1113 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1114
e8044f35
RS		 11152013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1116
1117 * NEWS: Note removal of ECOFF support.
1118 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1119 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1120 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1121 * Makefile.in: Regenerate.
1122 * configure.in: Remove MIPS ECOFF references.
1123 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1124 Delete cases.
1125 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1126 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1127 (mips-*-*): ...this single case.
1128 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1129 MIPS emulations to be e-mipself*.
1130 * configure: Regenerate.
1131 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1132 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1133 (mips-*-sysv*): Remove coff and ecoff cases.
1134 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1135 * ecoff.c: Remove reference to MIPS ECOFF.
1136 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1137 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1138 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1139 (mips_hi_fixup): Tweak comment.
1140 (append_insn): Require a howto.
1141 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1142
98508b2a
RS		 11432013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1144
1145 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1146 Use "CPU" instead of "cpu".
1147 * doc/c-mips.texi: Likewise.
1148 (MIPS Opts): Rename to MIPS Options.
1149 (MIPS option stack): Rename to MIPS Option Stack.
1150 (MIPS ASE instruction generation overrides): Rename to
1151 MIPS ASE Instruction Generation Overrides (for now).
1152 (MIPS floating-point): Rename to MIPS Floating-Point.
1153
fc16f8cc
RS		 11542013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1155
1156 * doc/c-mips.texi (MIPS Macros): New section.
1157 (MIPS Object): Replace with...
1158 (MIPS Small Data): ...this new section.
1159
5a7560b5
RS		 11602013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1161
1162 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1163 Capitalize name. Use @kindex instead of @cindex for .set entries.
1164
a1b86ab7
RS		 11652013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1166
1167 * doc/c-mips.texi (MIPS Stabs): Remove section.
1168
c6278170
RS		 11692013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1170
1171 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1172 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1173 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1174 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1175 (mips_ase): New structure.
1176 (mips_ases): New table.
1177 (FP64_ASES): New macro.
1178 (mips_ase_groups): New array.
1179 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1180 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1181 functions.
1182 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1183 (md_parse_option): Use mips_ases and mips_set_ase instead of
1184 separate case statements for each ASE option.
1185 (mips_after_parse_args): Use FP64_ASES. Use
1186 mips_check_isa_supports_ases to check the ASEs against
1187 other options.
1188 (s_mipsset): Use mips_ases and mips_set_ase instead of
1189 separate if statements for each ASE option. Use
1190 mips_check_isa_supports_ases, even when a non-ASE option
1191 is specified.
1192
63a4bc21
KT		 11932013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1194
1195 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1196
c31f3936
RS		 11972013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1198
1199 * config/tc-mips.c (md_shortopts, options, md_longopts)
1200 (md_longopts_size): Move earlier in file.
1201
846ef2d0
RS		 12022013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1203
1204 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1205 with a single "ase" bitmask.
1206 (mips_opts): Update accordingly.
1207 (file_ase, file_ase_explicit): New variables.
1208 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1209 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1210 (ISA_HAS_ROR): Adjust for mips_set_options change.
1211 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1212 (mips_ip): Adjust for mips_set_options change.
1213 (md_parse_option): Likewise. Update file_ase_explicit.
1214 (mips_after_parse_args): Adjust for mips_set_options change.
1215 Use bitmask operations to select the default ASEs. Set file_ase
1216 rather than individual per-ASE variables.
1217 (s_mipsset): Adjust for mips_set_options change.
1218 (mips_elf_final_processing): Test file_ase rather than
1219 file_ase_mdmx. Remove commented-out code.
1220
d16afab6
RS		 12212013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1222
1223 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1224 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1225 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1226 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1227 (mips_after_parse_args): Use the new "ase" field to choose
1228 the default ASEs.
1229 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1230 "ase" field.
1231
e83a675f
RE		 12322013-06-18 Richard Earnshaw <rearnsha@arm.com>
1233
1234 * config/tc-arm.c (symbol_preemptible): New function.
1235 (relax_branch): Use it.
1236
7f3c4072
CM		 12372013-06-17 Catherine Moore <clm@codesourcery.com>
1238 Maciej W. Rozycki <macro@codesourcery.com>
1239 Chao-Ying Fu <fu@mips.com>
1240
1241 * config/tc-mips.c (mips_set_options): Add ase_eva.
1242 (mips_set_options mips_opts): Add ase_eva.
1243 (file_ase_eva): Declare.
1244 (ISA_SUPPORTS_EVA_ASE): Define.
1245 (IS_SEXT_9BIT_NUM): Define.
1246 (MIPS_CPU_ASE_EVA): Define.
1247 (is_opcode_valid): Add support for ase_eva.
1248 (macro_build): Likewise.
1249 (macro): Likewise.
1250 (validate_mips_insn): Likewise.
1251 (validate_micromips_insn): Likewise.
1252 (mips_ip): Likewise.
1253 (options): Add OPTION_EVA and OPTION_NO_EVA.
1254 (md_longopts): Add -meva and -mno-eva.
1255 (md_parse_option): Process new options.
1256 (mips_after_parse_args): Check for valid EVA combinations.
1257 (s_mipsset): Likewise.
1258
e410add4
RS		 12592013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1260
1261 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1262 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1263 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1264 (dwarf2_gen_line_info_1): Update call accordingly.
1265 (dwarf2_move_insn): New function.
1266 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1267
6a50d470
RS		 12682013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1269
1270 Revert:
1271
1272 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1273
1274 PR gas/13024
1275 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1276 (dwarf2_gen_line_info_1): Delete.
1277 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1278 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1279 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1280 (dwarf2_directive_loc): Push previous .locs instead of generating
1281 them immediately.
1282
f122319e
CF		 12832013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1284
1285 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1286 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1287
909c7f9c
NC		 12882013-06-13 Nick Clifton <nickc@redhat.com>
1289
1290 PR gas/15602
1291 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1292 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1293 function. Generates an error if the adjusted offset is out of a
1294 16-bit range.
1295
5d5755a7
SL		 12962013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1297
1298 * config/tc-nios2.c (md_apply_fix): Mask constant
1299 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1300
3bf0dbfb
MR		 13012013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1302
1303 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1304 MIPS-3D instructions either.
1305 (md_convert_frag): Update the COPx branch mask accordingly.
1306
1307 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1308 option.
1309 * doc/as.texinfo (Overview): Add --relax-branch and
1310 --no-relax-branch.
1311 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1312 --no-relax-branch.
1313
9daf7bab
SL		 13142013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1315
1316 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1317 omitted.
1318
d301a56b
RS		 13192013-06-08 Catherine Moore <clm@codesourcery.com>
1320
1321 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1322 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1323 (append_insn): Change INSN_xxxx to ASE_xxxx.
1324
7bab7634
DC		 13252013-06-01 George Thomas <george.thomas@atmel.com>
1326
cbe02d4f 1327 * gas/config/tc-avr.c: Change ISA for devices with USB support to
7bab7634
DC		 1328 AVR_ISA_XMEGAU
1329
f60cf82f
L		 13302013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1331
1332 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1333 for ELF.
1334
a3f278e2
CM		 13352013-05-31 Paul Brook <paul@codesourcery.com>
1336
a3f278e2
CM		 1337 * config/tc-mips.c (s_ehword): New.
1338
067ec077
CM		 13392013-05-30 Paul Brook <paul@codesourcery.com>
1340
1341 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1342
d6101ac2
MR		 13432013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1344
1345 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1346 convert relocs who have no relocatable field either. Rephrase
1347 the conditional so that the PC-relative check is only applied
1348 for REL targets.
1349
f19ccbda
MR		 13502013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1351
1352 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1353 calculation.
1354
418009c2
YZ		 13552013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1356
1357 * config/tc-aarch64.c (reloc_table): Update to use
477330fc 1358 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
418009c2
YZ		 1359 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1360 (md_apply_fix): Likewise.
1361 (aarch64_force_relocation): Likewise.
1362
0a8897c7
KT		 13632013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1364
1365 * config/tc-arm.c (it_fsm_post_encode): Improve
1366 warning messages about deprecated IT block formats.
1367
89d2a2a3
MS		 13682013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1369
1370 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1371 inside fx_done condition.
1372
c77c0862
RS		 13732013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1374
1375 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1376
c0637f3a
PB		 13772013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1378
1379 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1380 and clean up warning when using PRINT_OPCODE_TABLE.
1381
5656a981
AM		 13822013-05-20 Alan Modra <amodra@gmail.com>
1383
1384 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1385 and data fixups performing shift/high adjust/sign extension on
1386 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1387 when writing data fixups rather than recalculating size.
1388
997b26e8
JBG		 13892013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1390
1391 * doc/c-msp430.texi: Fix typo.
1392
9f6e76f4
TG		 13932013-05-16 Tristan Gingold <gingold@adacore.com>
1394
1395 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1396 are also TOC symbols.
1397
638d3803
NC		 13982013-05-16 Nick Clifton <nickc@redhat.com>
1399
1400 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1401 Add -mcpu command to specify core type.
997b26e8 1402 * doc/c-msp430.texi: Update documentation.
638d3803 1403
b015e599
AP		 14042013-05-09 Andrew Pinski <apinski@cavium.com>
1405
1406 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1407 (mips_opts): Update for the new field.
1408 (file_ase_virt): New variable.
1409 (ISA_SUPPORTS_VIRT_ASE): New macro.
1410 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1411 (MIPS_CPU_ASE_VIRT): New define.
1412 (is_opcode_valid): Handle ase_virt.
1413 (macro_build): Handle "+J".
1414 (validate_mips_insn): Likewise.
1415 (mips_ip): Likewise.
1416 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1417 (md_longopts): Add mvirt and mnovirt
1418 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1419 (mips_after_parse_args): Handle ase_virt field.
1420 (s_mipsset): Handle "virt" and "novirt".
1421 (mips_elf_final_processing): Add a comment about virt ASE might need
1422 a new flag.
1423 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1424 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1425 Document ".set virt" and ".set novirt".
1426
da8094d7
AM		 14272013-05-09 Alan Modra <amodra@gmail.com>
1428
1429 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1430 control of operand flag bits.
1431
c5f8c205
AM		 14322013-05-07 Alan Modra <amodra@gmail.com>
1433
1434 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1435 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1436 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1437 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1438 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1439 Shift and sign-extend fieldval for use by some VLE reloc
1440 operand->insert functions.
1441
b47468a6
CM		 14422013-05-06 Paul Brook <paul@codesourcery.com>
1443 Catherine Moore <clm@codesourcery.com>
1444
c5f8c205
AM		 1445 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1446 (limited_pcrel_reloc_p): Likewise.
b47468a6
CM		 1447 (md_apply_fix): Likewise.
1448 (tc_gen_reloc): Likewise.
1449
2de39019
CM		 14502013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1451
1452 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1453 (mips_fix_adjustable): Adjust pc-relative check to use
1454 limited_pc_reloc_p.
1455
754e2bb9
RS		 14562013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1457
1458 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1459 (s_mips_stab): Do not restrict to stabn only.
1460
13761a11
NC		 14612013-05-02 Nick Clifton <nickc@redhat.com>
1462
1463 * config/tc-msp430.c: Add support for the MSP430X architecture.
1464 Add code to insert a NOP instruction after any instruction that
1465 might change the interrupt state.
1466 Add support for the LARGE memory model.
1467 Add code to initialise the .MSP430.attributes section.
1468 * config/tc-msp430.h: Add support for the MSP430X architecture.
1469 * doc/c-msp430.texi: Document the new -mL and -mN command line
1470 options.
1471 * NEWS: Mention support for the MSP430X architecture.
1472
df26367c
MR		 14732013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1474
1475 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1476 alpha*-*-linux*ecoff*.
1477
f02d8318
CF		 14782013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1479
1480 * config/tc-mips.c (mips_ip): Add sizelo.
1481 For "+C", "+G", and "+H", set sizelo and compare against it.
1482
b40bf0a2
NC		 14832013-04-29 Nick Clifton <nickc@redhat.com>
1484
1485 * as.c (Options): Add -gdwarf-sections.
1486 (parse_args): Likewise.
1487 * as.h (flag_dwarf_sections): Declare.
1488 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1489 (process_entries): When -gdwarf-sections is enabled generate
1490 fragmentary .debug_line sections.
1491 (out_debug_line): Set the section for the .debug_line section end
1492 symbol.
1493 * doc/as.texinfo: Document -gdwarf-sections.
1494 * NEWS: Mention -gdwarf-sections.
1495
8eeccb77 14962013-04-26 Christian Groessler <chris@groessler.org>
00a3147e
CG		 1497
1498 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1499 according to the target parameter. Don't call s_segm since s_segm
1500 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1501 initialized yet.
1502 (md_begin): Call s_segm according to target parameter from command
1503 line.
1504
49926cd0
AM		 15052013-04-25 Alan Modra <amodra@gmail.com>
1506
1507 * configure.in: Allow little-endian linux.
1508 * configure: Regenerate.
1509
e3031850
SL		 15102013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1511
1512 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1513 "fstatus" control register to "eccinj".
1514
cb948fc0
KT		 15152013-04-19 Kai Tietz <ktietz@redhat.com>
1516
1517 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1518
4455e9ad
JB		 15192013-04-15 Julian Brown <julian@codesourcery.com>
1520
1521 * expr.c (add_to_result, subtract_from_result): Make global.
1522 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1523 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1524 subtract_from_result to handle extra bit of precision for .sleb128
1525 directive operands.
1526
956a6ba3
JB		 15272013-04-10 Julian Brown <julian@codesourcery.com>
1528
1529 * read.c (convert_to_bignum): Add sign parameter. Use it
1530 instead of X_unsigned to determine sign of resulting bignum.
1531 (emit_expr): Pass extra argument to convert_to_bignum.
1532 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1533 X_extrabit to convert_to_bignum.
1534 (parse_bitfield_cons): Set X_extrabit.
1535 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1536 Initialise X_extrabit field as appropriate.
1537 (add_to_result): New.
1538 (subtract_from_result): New.
1539 (expr): Use above.
1540 * expr.h (expressionS): Add X_extrabit field.
1541
eb9f3f00
JB		 15422013-04-10 Jan Beulich <jbeulich@suse.com>
1543
1544 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1545 register being PC when is_t or writeback, and use distinct
1546 diagnostic for the latter case.
1547
ccb84d65
JB		 15482013-04-10 Jan Beulich <jbeulich@suse.com>
1549
1550 * gas/config/tc-arm.c (parse_operands): Re-write
1551 po_barrier_or_imm().
1552 (do_barrier): Remove bogus constraint().
1553 (do_t_barrier): Remove.
1554
4d13caa0
NC		 15552013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1556
1557 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1558 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1559 ATmega2564RFR2
1560 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1561
16d02dc9
JB		 15622013-04-09 Jan Beulich <jbeulich@suse.com>
1563
1564 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1565 Use local variable Rt in more places.
1566 (do_vmsr): Accept all control registers.
1567
05ac0ffb
JB		 15682013-04-09 Jan Beulich <jbeulich@suse.com>
1569
1570 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1571 if there was none specified for moves between scalar and core
1572 register.
1573
2d51fb74
JB		 15742013-04-09 Jan Beulich <jbeulich@suse.com>
1575
1576 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1577 NEON_ALL_LANES case.
1578
94dcf8bf
JB		 15792013-04-08 Jan Beulich <jbeulich@suse.com>
1580
1581 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1582 PC-relative VSTR.
1583
1472d06f
JB		 15842013-04-08 Jan Beulich <jbeulich@suse.com>
1585
1586 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1587 entry to sp_fiq.
1588
0c76cae8
AM		 15892013-04-03 Alan Modra <amodra@gmail.com>
1590
1591 * doc/as.texinfo: Add support to generate man options for h8300.
1592 * doc/c-h8300.texi: Likewise.
1593
92eb40d9
RR		 15942013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1595
1596 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1597 Cortex-A57.
1598
51dcdd4d
NC		 15992013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1600
1601 PR binutils/15068
1602 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1603
c5d685bf
NC		 16042013-03-26 Nick Clifton <nickc@redhat.com>
1605
9b978282
NC		 1606 PR gas/15295
1607 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1608 start of the file each time.
1609
c5d685bf
NC		 1610 PR gas/15178
1611 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1612 FreeBSD targets.
1613
9699c833
TG		 16142013-03-26 Douglas B Rupp <rupp@gnat.com>
1615
1616 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1617 after fixup.
1618
4755303e
WN		 16192013-03-21 Will Newton <will.newton@linaro.org>
1620
1621 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1622 pc-relative str instructions in Thumb mode.
1623
81f5558e
NC		 16242013-03-21 Michael Schewe <michael.schewe@gmx.net>
1625
1626 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1627 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1628 R_H8_DISP32A16.
1629 * config/tc-h8300.h: Remove duplicated defines.
1630
71863e73
NC		 16312013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1632
1633 PR gas/15282
1634 * tc-avr.c (mcu_has_3_byte_pc): New function.
1635 (tc_cfi_frame_initial_instructions): Call it to find return
1636 address size.
1637
795b8e6b
NC		 16382013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1639
1640 PR gas/15095
1641 * config/tc-tic6x.c (tic6x_try_encode): Handle
1642 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1643 encode register pair numbers when required.
1644
ba86b375
WN		 16452013-03-15 Will Newton <will.newton@linaro.org>
1646
1647 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1648 in vstr in Thumb mode for pre-ARMv7 cores.
1649
9e6f3811
AS		 16502013-03-14 Andreas Schwab <schwab@suse.de>
1651
1652 * doc/c-arc.texi (ARC Directives): Revert last change and use
1653 @itemize instead of @table.
1654 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1655
b10bf8c5
NC		 16562013-03-14 Nick Clifton <nickc@redhat.com>
1657
1658 PR gas/15273
1659 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1660 NULL message, instead just check ARM_CPU_IS_ANY directly.
1661
ba724cfc
NC		 16622013-03-14 Nick Clifton <nickc@redhat.com>
1663
1664 PR gas/15212
9e6f3811 1665 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
ba724cfc
NC		 1666 for table format.
1667 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1668 to the @item directives.
1669 (ARM-Neon-Alignment): Move to correct place in the document.
1670 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1671 formatting.
1672 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1673 @smallexample.
1674
531a94fd
SL		 16752013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1676
1677 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1678 case. Add default BAD_CASE to switch.
1679
dad60f8e
SL		 16802013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1681
1682 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1683 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1684
dd5181d5
KT		 16852013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1686
1687 * config/tc-arm.c (crc_ext_armv8): New feature set.
1688 (UNPRED_REG): New macro.
1689 (do_crc32_1): New function.
1690 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1691 do_crc32ch, do_crc32cw): Likewise.
1692 (TUEc): New macro.
1693 (insns): Add entries for crc32 mnemonics.
1694 (arm_extensions): Add entry for crc.
1695
8e723a10
CLT		 16962013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1697
1698 * write.h (struct fix): Add fx_dot_frag field.
1699 (dot_frag): Declare.
1700 * write.c (dot_frag): New variable.
1701 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1702 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1703 * expr.c (expr): Save value of frag_now in dot_frag when setting
1704 dot_value.
1705 * read.c (emit_expr): Likewise. Delete comments.
1706
be05d201
L		 17072013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1708
1709 * config/tc-i386.c (flag_code_names): Removed.
1710 (i386_index_check): Rewrote.
1711
62b0d0d5
YZ		 17122013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1713
1714 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1715 add comment.
1716 (aarch64_double_precision_fmovable): New function.
1717 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1718 function; handle hexadecimal representation of IEEE754 encoding.
1719 (parse_operands): Update the call to parse_aarch64_imm_float.
1720
165de32a
L		 17212013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1722
1723 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1724 (check_hle): Updated.
1725 (md_assemble): Likewise.
1726 (parse_insn): Likewise.
1727
d5de92cf
L		 17282013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1729
1730 * config/tc-i386.c (_i386_insn): Add rep_prefix.
9e6f3811 1731 (md_assemble): Check if REP prefix is OK.
d5de92cf
L		 1732 (parse_insn): Remove expecting_string_instruction. Set
1733 i.rep_prefix.
1734
e60bb1dd
YZ		 17352013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1736
1737 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1738
aeebdd9b
YZ		 17392013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1740
1741 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1742 for system registers.
1743
4107ae22
DD		 17442013-02-27 DJ Delorie <dj@redhat.com>
1745
1746 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1747 (rl78_op): Handle %code().
1748 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1749 (tc_gen_reloc): Likwise; convert to a computed reloc.
1750 (md_apply_fix): Likewise.
1751
151fa98f
NC		 17522013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1753
1754 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1755
70a8bc5b 17562013-02-25 Terry Guo <terry.guo@arm.com>
1757
1758 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1759 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1760 list of accepted CPUs.
1761
5c111e37
L		 17622013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1763
1764 PR gas/15159
1765 * config/tc-i386.c (cpu_arch): Add ".smap".
1766
1767 * doc/c-i386.texi: Document smap.
1768
8a75745d
MR		 17692013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1770
1771 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1772 mips_assembling_insn appropriately.
1773 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1774
79850f26
MR		 17752013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1776
cf29fc61 1777 * config/tc-mips.c (append_insn): Correct indentation, remove
79850f26
MR		 1778 extraneous braces.
1779
4c261dff
NC		 17802013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1781
5c111e37 1782 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
4c261dff 1783
ea33f281
NC		 17842013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1785
1786 * configure.tgt: Add nios2-*-rtems*.
1787
a1ccaec9
YZ		 17882013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1789
1790 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1791 NULL.
1792
0aa27725
RS		 17932013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1794
1795 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1796 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1797
da4339ed
NC		 17982013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1799
1800 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1801 core.
1802
36591ba1 18032013-02-06 Sandra Loosemore <sandra@codesourcery.com>
5c111e37 1804 Andrew Jenner <andrew@codesourcery.com>
36591ba1
SL		 1805
1806 Based on patches from Altera Corporation.
1807
1808 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1809 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1810 * Makefile.in: Regenerated.
1811 * configure.tgt: Add case for nios2*-linux*.
1812 * config/obj-elf.c: Conditionally include elf/nios2.h.
1813 * config/tc-nios2.c: New file.
1814 * config/tc-nios2.h: New file.
1815 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1816 * doc/Makefile.in: Regenerated.
1817 * doc/all.texi: Set NIOSII.
1818 * doc/as.texinfo (Overview): Add Nios II options.
1819 (Machine Dependencies): Include c-nios2.texi.
1820 * doc/c-nios2.texi: New file.
1821 * NEWS: Note Altera Nios II support.
1822
94d4433a
AM		 18232013-02-06 Alan Modra <amodra@gmail.com>
1824
1825 PR gas/14255
1826 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1827 Don't skip fixups with fx_subsy non-NULL.
1828 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1829 with fx_subsy non-NULL.
1830
ace9af6f
L		 18312013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1832
1833 * doc/c-metag.texi: Add "@c man" markers.
1834
89d67ed9
AM		 18352013-02-04 Alan Modra <amodra@gmail.com>
1836
1837 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1838 related code.
1839 (TC_ADJUST_RELOC_COUNT): Delete.
1840 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1841
89072bd6
AM		 18422013-02-04 Alan Modra <amodra@gmail.com>
1843
1844 * po/POTFILES.in: Regenerate.
1845
f9b2d544
NC		 18462013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1847
1848 * config/tc-metag.c: Make SWAP instruction less permissive with
1849 its operands.
1850
392ca752
DD		 18512013-01-29 DJ Delorie <dj@redhat.com>
1852
1853 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1854 relocs in .word/.etc statements.
1855
427d0db6
RM		 18562013-01-29 Roland McGrath <mcgrathr@google.com>
1857
1858 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1859 immediate value for 8-bit offset" error so it shows line info.
1860
4faf939a
JM		 18612013-01-24 Joseph Myers <joseph@codesourcery.com>
1862
1863 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1864 for 64-bit output.
1865
78c8d46c
NC		 18662013-01-24 Nick Clifton <nickc@redhat.com>
1867
1868 * config/tc-v850.c: Add support for e3v5 architecture.
1869 * doc/c-v850.texi: Mention new support.
1870
fb5b7503
NC		 18712013-01-23 Nick Clifton <nickc@redhat.com>
1872
1873 PR gas/15039
1874 * config/tc-avr.c: Include dwarf2dbg.h.
1875
8ce3d284
L		 18762013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1877
1878 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1879 (tc_i386_fix_adjustable): Likewise.
1880 (lex_got): Likewise.
1881 (tc_gen_reloc): Likewise.
1882
f5555712
YZ		 18832013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1884
1885 * config/tc-aarch64.c (output_operand_error_record): Change to output
1886 the out-of-range error message as value-expected message if there is
1887 only one single value in the expected range.
1888 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1889 LSL #0 as a programmer-friendly feature.
1890
8fd4256d
L		 18912013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1892
1893 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1894 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1895 BFD_RELOC_64_SIZE relocations.
1896 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1897 for it.
1898 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1899 relocations against local symbols.
1900
a5840dce
AM		 19012013-01-16 Alan Modra <amodra@gmail.com>
1902
1903 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1904 finding some sort of toc syntax error, and break to avoid
1905 compiler uninit warning.
1906
af89796a
L		 19072013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1908
1909 PR gas/15019
1910 * config/tc-i386.c (lex_got): Increment length by 1 if the
1911 relocation token is removed.
1912
dd42f060
NC		 19132013-01-15 Nick Clifton <nickc@redhat.com>
1914
1915 * config/tc-v850.c (md_assemble): Allow signed values for
1916 V850E_IMMEDIATE.
1917
464e3686
SK		 19182013-01-11 Sean Keys <skeys@ipdatasys.com>
1919
1920 * config/tc-xgate.c (md_begin): Fix mistake made when going from
af89796a 1921 git to cvs.
464e3686 1922
5817ffd1
PB		 19232013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1924
1925 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1926 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1927 * config/tc-ppc.c (md_show_usage): Likewise.
1928 (ppc_handle_align): Handle power8's group ending nop.
1929
f4b1f6a9
SK		 19302013-01-10 Sean Keys <skeys@ipdatasys.com>
1931
1932 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
af89796a 1933 that the assember exits after the opcodes have been printed.
f4b1f6a9 1934
34bca508
L		 19352013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1936
1937 * app.c: Remove trailing white spaces.
1938 * as.c: Likewise.
1939 * as.h: Likewise.
1940 * cond.c: Likewise.
1941 * dw2gencfi.c: Likewise.
1942 * dwarf2dbg.h: Likewise.
1943 * ecoff.c: Likewise.
1944 * input-file.c: Likewise.
1945 * itbl-lex.h: Likewise.
1946 * output-file.c: Likewise.
1947 * read.c: Likewise.
1948 * sb.c: Likewise.
1949 * subsegs.c: Likewise.
1950 * symbols.c: Likewise.
1951 * write.c: Likewise.
1952 * config/tc-i386.c: Likewise.
1953 * doc/Makefile.am: Likewise.
1954 * doc/Makefile.in: Likewise.
1955 * doc/c-aarch64.texi: Likewise.
1956 * doc/c-alpha.texi: Likewise.
1957 * doc/c-arc.texi: Likewise.
1958 * doc/c-arm.texi: Likewise.
1959 * doc/c-avr.texi: Likewise.
1960 * doc/c-bfin.texi: Likewise.
1961 * doc/c-cr16.texi: Likewise.
1962 * doc/c-d10v.texi: Likewise.
1963 * doc/c-d30v.texi: Likewise.
1964 * doc/c-h8300.texi: Likewise.
1965 * doc/c-hppa.texi: Likewise.
1966 * doc/c-i370.texi: Likewise.
1967 * doc/c-i386.texi: Likewise.
1968 * doc/c-i860.texi: Likewise.
1969 * doc/c-m32c.texi: Likewise.
1970 * doc/c-m32r.texi: Likewise.
1971 * doc/c-m68hc11.texi: Likewise.
1972 * doc/c-m68k.texi: Likewise.
1973 * doc/c-microblaze.texi: Likewise.
1974 * doc/c-mips.texi: Likewise.
1975 * doc/c-msp430.texi: Likewise.
1976 * doc/c-mt.texi: Likewise.
1977 * doc/c-s390.texi: Likewise.
1978 * doc/c-score.texi: Likewise.
1979 * doc/c-sh.texi: Likewise.
1980 * doc/c-sh64.texi: Likewise.
1981 * doc/c-tic54x.texi: Likewise.
1982 * doc/c-tic6x.texi: Likewise.
1983 * doc/c-v850.texi: Likewise.
1984 * doc/c-xc16x.texi: Likewise.
1985 * doc/c-xgate.texi: Likewise.
1986 * doc/c-xtensa.texi: Likewise.
1987 * doc/c-z80.texi: Likewise.
1988 * doc/internals.texi: Likewise.
1989
4c665b71
RM		 19902013-01-10 Roland McGrath <mcgrathr@google.com>
1991
1992 * hash.c (hash_new_sized): Make it global.
1993 * hash.h: Declare it.
1994 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1995 pass a small size.
1996
a3c62988
NC		 19972013-01-10 Will Newton <will.newton@imgtec.com>
1998
1999 * Makefile.am: Add Meta.
2000 * Makefile.in: Regenerate.
2001 * config/tc-metag.c: New file.
2002 * config/tc-metag.h: New file.
2003 * configure.tgt: Add Meta.
2004 * doc/Makefile.am: Add Meta.
2005 * doc/Makefile.in: Regenerate.
2006 * doc/all.texi: Add Meta.
2007 * doc/as.texiinfo: Document Meta options.
2008 * doc/c-metag.texi: New file.
2009
b37df7c4
SE		 20102013-01-09 Steve Ellcey <sellcey@mips.com>
2011
2012 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
2013 calls.
2014 * config/tc-mips.c (internalError): Remove, replace with abort.
2015
a3251895
YZ		 20162013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
2017
2018 * config/tc-aarch64.c (parse_operands): Change to compare the result
2019 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
2020
8ab8155f
NC		 20212013-01-07 Nick Clifton <nickc@redhat.com>
2022
2023 PR gas/14887
2024 * config/tc-arm.c (skip_past_char): Skip whitespace before the
2025 anticipated character.
2026 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
2027 here as it is no longer needed.
2028
a4ac1c42
AS		 20292013-01-06 Andreas Schwab <schwab@linux-m68k.org>
2030
2031 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
2032 * doc/c-score.texi (SCORE-Opts): Likewise.
2033 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2034
e407c74b
NC		 20352013-01-04 Juergen Urban <JuergenUrban@gmx.de>
2036
2037 * config/tc-mips.c: Add support for MIPS r5900.
2038 Add M_LQ_AB and M_SQ_AB to support large values for instructions
2039 lq and sq.
2040 (can_swap_branch_p, get_append_method): Detect some conditional
2041 short loops to fix a bug on the r5900 by NOP in the branch delay
2042 slot.
2043 (M_MUL): Support 3 operands in multu on r5900.
2044 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
2045 (s_mipsset): Force 32 bit floating point on r5900.
2046 (mips_ip): Check parameter range of instructions mfps and mtps on
2047 r5900.
2048 * configure.in: Detect CPU type when target string contains r5900
2049 (e.g. mips64r5900el-linux-gnu).
2050
62658407
L		 20512013-01-02 H.J. Lu <hongjiu.lu@intel.com>
2052
2053 * as.c (parse_args): Update copyright year to 2013.
2054
95830fd1
YZ		 20552013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
2056
2057 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
2058 and "cortex57".
2059
517bb291 20602013-01-02 Nick Clifton <nickc@redhat.com>
d709e4e6 2061
517bb291
NC		 2062 PR gas/14987
2063 * config/tc-arm.c (parse_address_main): Skip whitespace before a
2064 closing bracket.
d709e4e6 2065
517bb291 2066For older changes see ChangeLog-2012
08d56133 2067\f
517bb291 2068Copyright (C) 2013 Free Software Foundation, Inc.
752937aa
NC		 2069
2070Copying and distribution of this file, with or without modification,
2071are permitted in any medium without royalty provided the copyright
2072notice and this notice are preserved.
2073
08d56133
NC		 2074Local Variables:
2075mode: change-log
2076left-margin: 8
2077fill-column: 74
2078version-control: never
2079End:
GDB Binutils - Deliverables
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